Re: [PATCH v5 08/12] ARM: dts: imx7s: add multiplexer controls

2018-05-18 Thread Rui Miguel Silva

Hi Rob,
On Fri 18 May 2018 at 16:51, Rob Herring wrote:
On Fri, May 18, 2018 at 10:28:02AM +0100, Rui Miguel Silva 
wrote:
The IOMUXC General Purpose Register has bitfield to control 
video bus
multiplexer to control the CSI input between the MIPI-CSI2 and 
parallel

interface. Add that register and mask.

Signed-off-by: Rui Miguel Silva 
Reviewed-by: Philipp Zabel 
---
 arch/arm/boot/dts/imx7s.dtsi | 8 +++-
 1 file changed, 7 insertions(+), 1 deletion(-)

diff --git a/arch/arm/boot/dts/imx7s.dtsi 
b/arch/arm/boot/dts/imx7s.dtsi

index 67450ad89940..3590dab529f9 100644
--- a/arch/arm/boot/dts/imx7s.dtsi
+++ b/arch/arm/boot/dts/imx7s.dtsi
@@ -520,8 +520,14 @@
 
 			gpr: iomuxc-gpr@3034 {
 compatible = 
 "fsl,imx7d-iomuxc-gpr",
-	"fsl,imx6q-iomuxc-gpr", 
"syscon";
+	"fsl,imx6q-iomuxc-gpr", 
"syscon", "simple-mfd";

reg = <0x3034 0x1>;
+
+   mux: mux-controller {
+   compatible = "mmio-mux";
+   #mux-control-cells = <1>;
+	mux-reg-masks = <0x14 
0x0010>;


If 1 bit control, then #mux-control-cells can be 0.


Ack.




+   };
};
 
 			ocotp: ocotp-ctrl@3035 {

--
2.17.0





Re: [PATCH v5 08/12] ARM: dts: imx7s: add multiplexer controls

2018-05-18 Thread Rob Herring
On Fri, May 18, 2018 at 10:28:02AM +0100, Rui Miguel Silva wrote:
> The IOMUXC General Purpose Register has bitfield to control video bus
> multiplexer to control the CSI input between the MIPI-CSI2 and parallel
> interface. Add that register and mask.
> 
> Signed-off-by: Rui Miguel Silva 
> Reviewed-by: Philipp Zabel 
> ---
>  arch/arm/boot/dts/imx7s.dtsi | 8 +++-
>  1 file changed, 7 insertions(+), 1 deletion(-)
> 
> diff --git a/arch/arm/boot/dts/imx7s.dtsi b/arch/arm/boot/dts/imx7s.dtsi
> index 67450ad89940..3590dab529f9 100644
> --- a/arch/arm/boot/dts/imx7s.dtsi
> +++ b/arch/arm/boot/dts/imx7s.dtsi
> @@ -520,8 +520,14 @@
>  
>   gpr: iomuxc-gpr@3034 {
>   compatible = "fsl,imx7d-iomuxc-gpr",
> - "fsl,imx6q-iomuxc-gpr", "syscon";
> + "fsl,imx6q-iomuxc-gpr", "syscon", 
> "simple-mfd";
>   reg = <0x3034 0x1>;
> +
> + mux: mux-controller {
> + compatible = "mmio-mux";
> + #mux-control-cells = <1>;
> + mux-reg-masks = <0x14 0x0010>;

If 1 bit control, then #mux-control-cells can be 0.

> + };
>   };
>  
>   ocotp: ocotp-ctrl@3035 {
> -- 
> 2.17.0
> 


[PATCH v5 08/12] ARM: dts: imx7s: add multiplexer controls

2018-05-18 Thread Rui Miguel Silva
The IOMUXC General Purpose Register has bitfield to control video bus
multiplexer to control the CSI input between the MIPI-CSI2 and parallel
interface. Add that register and mask.

Signed-off-by: Rui Miguel Silva 
Reviewed-by: Philipp Zabel 
---
 arch/arm/boot/dts/imx7s.dtsi | 8 +++-
 1 file changed, 7 insertions(+), 1 deletion(-)

diff --git a/arch/arm/boot/dts/imx7s.dtsi b/arch/arm/boot/dts/imx7s.dtsi
index 67450ad89940..3590dab529f9 100644
--- a/arch/arm/boot/dts/imx7s.dtsi
+++ b/arch/arm/boot/dts/imx7s.dtsi
@@ -520,8 +520,14 @@
 
gpr: iomuxc-gpr@3034 {
compatible = "fsl,imx7d-iomuxc-gpr",
-   "fsl,imx6q-iomuxc-gpr", "syscon";
+   "fsl,imx6q-iomuxc-gpr", "syscon", 
"simple-mfd";
reg = <0x3034 0x1>;
+
+   mux: mux-controller {
+   compatible = "mmio-mux";
+   #mux-control-cells = <1>;
+   mux-reg-masks = <0x14 0x0010>;
+   };
};
 
ocotp: ocotp-ctrl@3035 {
-- 
2.17.0