Re: [Patch v2 10/11] s5p-mfc: Add support for HEVC encoder
On Tue, 2017-03-28 at 10:15 +0530, Smitha T Murthy wrote: > On Mon, 2017-03-27 at 14:09 +0200, Andrzej Hajda wrote: > > Hi Smitha, > > > > Sorry for late reply, it seems I have missed this email. > > > > > > On 14.03.2017 12:41, Smitha T Murthy wrote: > > > On Tue, 2017-03-07 at 12:33 +0100, Andrzej Hajda wrote: > > >> On 03.03.2017 10:07, Smitha T Murthy wrote: > > >>> Add HEVC encoder support and necessary registers, V4L2 CIDs, > > >>> and hevc encoder parameters > > >>> > > >>> Signed-off-by: Smitha T Murthy > > >>> --- > > >>> drivers/media/platform/s5p-mfc/regs-mfc-v10.h | 28 +- > > >>> drivers/media/platform/s5p-mfc/s5p_mfc.c|1 + > > >>> drivers/media/platform/s5p-mfc/s5p_mfc_cmd_v6.c |3 + > > >>> drivers/media/platform/s5p-mfc/s5p_mfc_common.h | 55 ++- > > >>> drivers/media/platform/s5p-mfc/s5p_mfc_enc.c| 595 > > >>> +++ > > >>> drivers/media/platform/s5p-mfc/s5p_mfc_opr.h|8 + > > >>> drivers/media/platform/s5p-mfc/s5p_mfc_opr_v6.c | 200 > > >>> drivers/media/platform/s5p-mfc/s5p_mfc_opr_v6.h |8 + > > >>> 8 files changed, 896 insertions(+), 2 deletions(-) > > >>> > > >>> diff --git a/drivers/media/platform/s5p-mfc/regs-mfc-v10.h > > >>> b/drivers/media/platform/s5p-mfc/regs-mfc-v10.h > > >>> index 846dcf5..caf02ff 100644 > > >>> --- a/drivers/media/platform/s5p-mfc/regs-mfc-v10.h > > >>> +++ b/drivers/media/platform/s5p-mfc/regs-mfc-v10.h > > >>> @@ -20,13 +20,35 @@ > > >>> #define S5P_FIMV_MFC_STATE_V10 0x7124 > > >>> #define S5P_FIMV_D_STATIC_BUFFER_ADDR_V10 0xF570 > > >>> #define S5P_FIMV_D_STATIC_BUFFER_SIZE_V10 0xF574 > > >>> +#define S5P_FIMV_E_NUM_T_LAYER_V10 0xFBAC > > >>> +#define S5P_FIMV_E_HIERARCHICAL_QP_LAYER0_V10 0xFBB0 > > >>> +#define S5P_FIMV_E_HIERARCHICAL_QP_LAYER1_V10 0xFBB4 > > >>> +#define S5P_FIMV_E_HIERARCHICAL_QP_LAYER2_V10 0xFBB8 > > >>> +#define S5P_FIMV_E_HIERARCHICAL_QP_LAYER3_V10 0xFBBC > > >>> +#define S5P_FIMV_E_HIERARCHICAL_QP_LAYER4_V10 0xFBC0 > > >>> +#define S5P_FIMV_E_HIERARCHICAL_QP_LAYER5_V10 0xFBC4 > > >>> +#define S5P_FIMV_E_HIERARCHICAL_QP_LAYER6_V10 0xFBC8 > > >>> +#define S5P_FIMV_E_HIERARCHICAL_BIT_RATE_LAYER0_V100xFD18 > > >>> +#define S5P_FIMV_E_HIERARCHICAL_BIT_RATE_LAYER1_V100xFD1C > > >>> +#define S5P_FIMV_E_HIERARCHICAL_BIT_RATE_LAYER2_V100xFD20 > > >>> +#define S5P_FIMV_E_HIERARCHICAL_BIT_RATE_LAYER3_V100xFD24 > > >>> +#define S5P_FIMV_E_HIERARCHICAL_BIT_RATE_LAYER4_V100xFD28 > > >>> +#define S5P_FIMV_E_HIERARCHICAL_BIT_RATE_LAYER5_V100xFD2C > > >>> +#define S5P_FIMV_E_HIERARCHICAL_BIT_RATE_LAYER6_V100xFD30 > > >>> +#define S5P_FIMV_E_HEVC_OPTIONS_V100xFDD4 > > >>> +#define S5P_FIMV_E_HEVC_REFRESH_PERIOD_V10 0xFDD8 > > >>> +#define S5P_FIMV_E_HEVC_CHROMA_QP_OFFSET_V10 0xFDDC > > >>> +#define S5P_FIMV_E_HEVC_LF_BETA_OFFSET_DIV2_V100xFDE0 > > >>> +#define S5P_FIMV_E_HEVC_LF_TC_OFFSET_DIV2_V10 0xFDE4 > > >>> +#define S5P_FIMV_E_HEVC_NAL_CONTROL_V100xFDE8 > > >>> > > >>> /* MFCv10 Context buffer sizes */ > > >>> #define MFC_CTX_BUF_SIZE_V10 (30 * SZ_1K)/* 30KB */ > > >>> #define MFC_H264_DEC_CTX_BUF_SIZE_V10 (2 * SZ_1M) /* 2MB */ > > >>> #define MFC_OTHER_DEC_CTX_BUF_SIZE_V10 (20 * SZ_1K)/* 20KB */ > > >>> #define MFC_H264_ENC_CTX_BUF_SIZE_V10 (100 * SZ_1K) /* 100KB */ > > >>> -#define MFC_OTHER_ENC_CTX_BUF_SIZE_V10 (15 * SZ_1K)/* 15KB */ > > >>> +#define MFC_HEVC_ENC_CTX_BUF_SIZE_V10 (30 * SZ_1K)/* 30KB */ > > >>> +#define MFC_OTHER_ENC_CTX_BUF_SIZE_V10 (15 * SZ_1K) /* 15KB */ > > >>> > > >>> /* MFCv10 variant defines */ > > >>> #define MAX_FW_SIZE_V10(SZ_1M) /* 1MB */ > > >>> @@ -58,5 +80,9 @@ > > >>> #define ENC_V100_VP8_ME_SIZE(x, y) \ > > >>> ENC_V100_BASE_SIZE(x, y) > > >>> > > >>> +#define ENC_V100_HEVC_ME_SIZE(x, y)\ > > >>> + (((x + 3) * (y + 3) * 32) \ > > >>> ++ ((y * 128) + 1280) * DIV_ROUND_UP(x, 4)) > > >>> + > > >>> #endif /*_REGS_MFC_V10_H*/ > > >>> > > >>> diff --git a/drivers/media/platform/s5p-mfc/s5p_mfc.c > > >>> b/drivers/media/platform/s5p-mfc/s5p_mfc.c > > >>> index b014038..b01c556 100644 > > >>> --- a/drivers/media/platform/s5p-mfc/s5p_mfc.c > > >>> +++ b/drivers/media/platform/s5p-mfc/s5p_mfc.c > > >>> @@ -1549,6 +1549,7 @@ static int s5p_mfc_resume(struct device *dev) > > >>> .h264_dec_ctx = MFC_H264_DEC_CTX_BUF_SIZE_V10, > > >>> .other_dec_ctx = MFC_OTHER_DEC_CTX_BUF_SIZE_V10, > > >>> .h264_enc_ctx = MFC_H264_ENC_CTX_BUF_SIZE_V10, > > >>> + .hevc_enc_ctx = MFC_HEVC_ENC_CTX_BUF_SIZE_V10, > > >>> .other_enc_ctx = MFC_OTHER_ENC_CTX_BUF_SIZE_V10, > > >>> }; > > >>> > > >>> diff --git a/drivers/media/platform/s5p-mfc/s5p_mfc_cmd_v6.c >
Re: [Patch v2 10/11] s5p-mfc: Add support for HEVC encoder
On Mon, 2017-03-27 at 14:09 +0200, Andrzej Hajda wrote: > Hi Smitha, > > Sorry for late reply, it seems I have missed this email. > > > On 14.03.2017 12:41, Smitha T Murthy wrote: > > On Tue, 2017-03-07 at 12:33 +0100, Andrzej Hajda wrote: > >> On 03.03.2017 10:07, Smitha T Murthy wrote: > >>> Add HEVC encoder support and necessary registers, V4L2 CIDs, > >>> and hevc encoder parameters > >>> > >>> Signed-off-by: Smitha T Murthy > >>> --- > >>> drivers/media/platform/s5p-mfc/regs-mfc-v10.h | 28 +- > >>> drivers/media/platform/s5p-mfc/s5p_mfc.c|1 + > >>> drivers/media/platform/s5p-mfc/s5p_mfc_cmd_v6.c |3 + > >>> drivers/media/platform/s5p-mfc/s5p_mfc_common.h | 55 ++- > >>> drivers/media/platform/s5p-mfc/s5p_mfc_enc.c| 595 > >>> +++ > >>> drivers/media/platform/s5p-mfc/s5p_mfc_opr.h|8 + > >>> drivers/media/platform/s5p-mfc/s5p_mfc_opr_v6.c | 200 > >>> drivers/media/platform/s5p-mfc/s5p_mfc_opr_v6.h |8 + > >>> 8 files changed, 896 insertions(+), 2 deletions(-) > >>> > >>> diff --git a/drivers/media/platform/s5p-mfc/regs-mfc-v10.h > >>> b/drivers/media/platform/s5p-mfc/regs-mfc-v10.h > >>> index 846dcf5..caf02ff 100644 > >>> --- a/drivers/media/platform/s5p-mfc/regs-mfc-v10.h > >>> +++ b/drivers/media/platform/s5p-mfc/regs-mfc-v10.h > >>> @@ -20,13 +20,35 @@ > >>> #define S5P_FIMV_MFC_STATE_V10 0x7124 > >>> #define S5P_FIMV_D_STATIC_BUFFER_ADDR_V100xF570 > >>> #define S5P_FIMV_D_STATIC_BUFFER_SIZE_V100xF574 > >>> +#define S5P_FIMV_E_NUM_T_LAYER_V10 0xFBAC > >>> +#define S5P_FIMV_E_HIERARCHICAL_QP_LAYER0_V100xFBB0 > >>> +#define S5P_FIMV_E_HIERARCHICAL_QP_LAYER1_V100xFBB4 > >>> +#define S5P_FIMV_E_HIERARCHICAL_QP_LAYER2_V100xFBB8 > >>> +#define S5P_FIMV_E_HIERARCHICAL_QP_LAYER3_V100xFBBC > >>> +#define S5P_FIMV_E_HIERARCHICAL_QP_LAYER4_V100xFBC0 > >>> +#define S5P_FIMV_E_HIERARCHICAL_QP_LAYER5_V100xFBC4 > >>> +#define S5P_FIMV_E_HIERARCHICAL_QP_LAYER6_V100xFBC8 > >>> +#define S5P_FIMV_E_HIERARCHICAL_BIT_RATE_LAYER0_V10 0xFD18 > >>> +#define S5P_FIMV_E_HIERARCHICAL_BIT_RATE_LAYER1_V10 0xFD1C > >>> +#define S5P_FIMV_E_HIERARCHICAL_BIT_RATE_LAYER2_V10 0xFD20 > >>> +#define S5P_FIMV_E_HIERARCHICAL_BIT_RATE_LAYER3_V10 0xFD24 > >>> +#define S5P_FIMV_E_HIERARCHICAL_BIT_RATE_LAYER4_V10 0xFD28 > >>> +#define S5P_FIMV_E_HIERARCHICAL_BIT_RATE_LAYER5_V10 0xFD2C > >>> +#define S5P_FIMV_E_HIERARCHICAL_BIT_RATE_LAYER6_V10 0xFD30 > >>> +#define S5P_FIMV_E_HEVC_OPTIONS_V10 0xFDD4 > >>> +#define S5P_FIMV_E_HEVC_REFRESH_PERIOD_V10 0xFDD8 > >>> +#define S5P_FIMV_E_HEVC_CHROMA_QP_OFFSET_V10 0xFDDC > >>> +#define S5P_FIMV_E_HEVC_LF_BETA_OFFSET_DIV2_V10 0xFDE0 > >>> +#define S5P_FIMV_E_HEVC_LF_TC_OFFSET_DIV2_V100xFDE4 > >>> +#define S5P_FIMV_E_HEVC_NAL_CONTROL_V10 0xFDE8 > >>> > >>> /* MFCv10 Context buffer sizes */ > >>> #define MFC_CTX_BUF_SIZE_V10 (30 * SZ_1K)/* 30KB */ > >>> #define MFC_H264_DEC_CTX_BUF_SIZE_V10(2 * SZ_1M) /* 2MB */ > >>> #define MFC_OTHER_DEC_CTX_BUF_SIZE_V10 (20 * SZ_1K)/* 20KB */ > >>> #define MFC_H264_ENC_CTX_BUF_SIZE_V10(100 * SZ_1K) /* 100KB */ > >>> -#define MFC_OTHER_ENC_CTX_BUF_SIZE_V10 (15 * SZ_1K)/* 15KB */ > >>> +#define MFC_HEVC_ENC_CTX_BUF_SIZE_V10(30 * SZ_1K)/* 30KB */ > >>> +#define MFC_OTHER_ENC_CTX_BUF_SIZE_V10 (15 * SZ_1K) /* 15KB */ > >>> > >>> /* MFCv10 variant defines */ > >>> #define MAX_FW_SIZE_V10 (SZ_1M) /* 1MB */ > >>> @@ -58,5 +80,9 @@ > >>> #define ENC_V100_VP8_ME_SIZE(x, y) \ > >>> ENC_V100_BASE_SIZE(x, y) > >>> > >>> +#define ENC_V100_HEVC_ME_SIZE(x, y) \ > >>> + (((x + 3) * (y + 3) * 32) \ > >>> + + ((y * 128) + 1280) * DIV_ROUND_UP(x, 4)) > >>> + > >>> #endif /*_REGS_MFC_V10_H*/ > >>> > >>> diff --git a/drivers/media/platform/s5p-mfc/s5p_mfc.c > >>> b/drivers/media/platform/s5p-mfc/s5p_mfc.c > >>> index b014038..b01c556 100644 > >>> --- a/drivers/media/platform/s5p-mfc/s5p_mfc.c > >>> +++ b/drivers/media/platform/s5p-mfc/s5p_mfc.c > >>> @@ -1549,6 +1549,7 @@ static int s5p_mfc_resume(struct device *dev) > >>> .h264_dec_ctx = MFC_H264_DEC_CTX_BUF_SIZE_V10, > >>> .other_dec_ctx = MFC_OTHER_DEC_CTX_BUF_SIZE_V10, > >>> .h264_enc_ctx = MFC_H264_ENC_CTX_BUF_SIZE_V10, > >>> + .hevc_enc_ctx = MFC_HEVC_ENC_CTX_BUF_SIZE_V10, > >>> .other_enc_ctx = MFC_OTHER_ENC_CTX_BUF_SIZE_V10, > >>> }; > >>> > >>> diff --git a/drivers/media/platform/s5p-mfc/s5p_mfc_cmd_v6.c > >>> b/drivers/media/platform/s5p-mfc/s5p_mfc_cmd_v6.c > >>> index 102b47e..7521fce 100644 > >>> --- a/drivers/media/platform/s5p-mfc/s5p_mfc_cmd_v6.c > >>> +++ b/drivers/media/platform/s5p-mfc/s5p_mfc_cmd_v6.c > >>> @@ -122,6 +122,9 @@ static int
Re: [Patch v2 10/11] s5p-mfc: Add support for HEVC encoder
Hi Smitha, Sorry for late reply, it seems I have missed this email. On 14.03.2017 12:41, Smitha T Murthy wrote: > On Tue, 2017-03-07 at 12:33 +0100, Andrzej Hajda wrote: >> On 03.03.2017 10:07, Smitha T Murthy wrote: >>> Add HEVC encoder support and necessary registers, V4L2 CIDs, >>> and hevc encoder parameters >>> >>> Signed-off-by: Smitha T Murthy >>> --- >>> drivers/media/platform/s5p-mfc/regs-mfc-v10.h | 28 +- >>> drivers/media/platform/s5p-mfc/s5p_mfc.c|1 + >>> drivers/media/platform/s5p-mfc/s5p_mfc_cmd_v6.c |3 + >>> drivers/media/platform/s5p-mfc/s5p_mfc_common.h | 55 ++- >>> drivers/media/platform/s5p-mfc/s5p_mfc_enc.c| 595 >>> +++ >>> drivers/media/platform/s5p-mfc/s5p_mfc_opr.h|8 + >>> drivers/media/platform/s5p-mfc/s5p_mfc_opr_v6.c | 200 >>> drivers/media/platform/s5p-mfc/s5p_mfc_opr_v6.h |8 + >>> 8 files changed, 896 insertions(+), 2 deletions(-) >>> >>> diff --git a/drivers/media/platform/s5p-mfc/regs-mfc-v10.h >>> b/drivers/media/platform/s5p-mfc/regs-mfc-v10.h >>> index 846dcf5..caf02ff 100644 >>> --- a/drivers/media/platform/s5p-mfc/regs-mfc-v10.h >>> +++ b/drivers/media/platform/s5p-mfc/regs-mfc-v10.h >>> @@ -20,13 +20,35 @@ >>> #define S5P_FIMV_MFC_STATE_V10 0x7124 >>> #define S5P_FIMV_D_STATIC_BUFFER_ADDR_V10 0xF570 >>> #define S5P_FIMV_D_STATIC_BUFFER_SIZE_V10 0xF574 >>> +#define S5P_FIMV_E_NUM_T_LAYER_V10 0xFBAC >>> +#define S5P_FIMV_E_HIERARCHICAL_QP_LAYER0_V10 0xFBB0 >>> +#define S5P_FIMV_E_HIERARCHICAL_QP_LAYER1_V10 0xFBB4 >>> +#define S5P_FIMV_E_HIERARCHICAL_QP_LAYER2_V10 0xFBB8 >>> +#define S5P_FIMV_E_HIERARCHICAL_QP_LAYER3_V10 0xFBBC >>> +#define S5P_FIMV_E_HIERARCHICAL_QP_LAYER4_V10 0xFBC0 >>> +#define S5P_FIMV_E_HIERARCHICAL_QP_LAYER5_V10 0xFBC4 >>> +#define S5P_FIMV_E_HIERARCHICAL_QP_LAYER6_V10 0xFBC8 >>> +#define S5P_FIMV_E_HIERARCHICAL_BIT_RATE_LAYER0_V100xFD18 >>> +#define S5P_FIMV_E_HIERARCHICAL_BIT_RATE_LAYER1_V100xFD1C >>> +#define S5P_FIMV_E_HIERARCHICAL_BIT_RATE_LAYER2_V100xFD20 >>> +#define S5P_FIMV_E_HIERARCHICAL_BIT_RATE_LAYER3_V100xFD24 >>> +#define S5P_FIMV_E_HIERARCHICAL_BIT_RATE_LAYER4_V100xFD28 >>> +#define S5P_FIMV_E_HIERARCHICAL_BIT_RATE_LAYER5_V100xFD2C >>> +#define S5P_FIMV_E_HIERARCHICAL_BIT_RATE_LAYER6_V100xFD30 >>> +#define S5P_FIMV_E_HEVC_OPTIONS_V100xFDD4 >>> +#define S5P_FIMV_E_HEVC_REFRESH_PERIOD_V10 0xFDD8 >>> +#define S5P_FIMV_E_HEVC_CHROMA_QP_OFFSET_V10 0xFDDC >>> +#define S5P_FIMV_E_HEVC_LF_BETA_OFFSET_DIV2_V100xFDE0 >>> +#define S5P_FIMV_E_HEVC_LF_TC_OFFSET_DIV2_V10 0xFDE4 >>> +#define S5P_FIMV_E_HEVC_NAL_CONTROL_V100xFDE8 >>> >>> /* MFCv10 Context buffer sizes */ >>> #define MFC_CTX_BUF_SIZE_V10 (30 * SZ_1K)/* 30KB */ >>> #define MFC_H264_DEC_CTX_BUF_SIZE_V10 (2 * SZ_1M) /* 2MB */ >>> #define MFC_OTHER_DEC_CTX_BUF_SIZE_V10 (20 * SZ_1K)/* 20KB */ >>> #define MFC_H264_ENC_CTX_BUF_SIZE_V10 (100 * SZ_1K) /* 100KB */ >>> -#define MFC_OTHER_ENC_CTX_BUF_SIZE_V10 (15 * SZ_1K)/* 15KB */ >>> +#define MFC_HEVC_ENC_CTX_BUF_SIZE_V10 (30 * SZ_1K)/* 30KB */ >>> +#define MFC_OTHER_ENC_CTX_BUF_SIZE_V10 (15 * SZ_1K) /* 15KB */ >>> >>> /* MFCv10 variant defines */ >>> #define MAX_FW_SIZE_V10(SZ_1M) /* 1MB */ >>> @@ -58,5 +80,9 @@ >>> #define ENC_V100_VP8_ME_SIZE(x, y) \ >>> ENC_V100_BASE_SIZE(x, y) >>> >>> +#define ENC_V100_HEVC_ME_SIZE(x, y)\ >>> + (((x + 3) * (y + 3) * 32) \ >>> ++ ((y * 128) + 1280) * DIV_ROUND_UP(x, 4)) >>> + >>> #endif /*_REGS_MFC_V10_H*/ >>> >>> diff --git a/drivers/media/platform/s5p-mfc/s5p_mfc.c >>> b/drivers/media/platform/s5p-mfc/s5p_mfc.c >>> index b014038..b01c556 100644 >>> --- a/drivers/media/platform/s5p-mfc/s5p_mfc.c >>> +++ b/drivers/media/platform/s5p-mfc/s5p_mfc.c >>> @@ -1549,6 +1549,7 @@ static int s5p_mfc_resume(struct device *dev) >>> .h264_dec_ctx = MFC_H264_DEC_CTX_BUF_SIZE_V10, >>> .other_dec_ctx = MFC_OTHER_DEC_CTX_BUF_SIZE_V10, >>> .h264_enc_ctx = MFC_H264_ENC_CTX_BUF_SIZE_V10, >>> + .hevc_enc_ctx = MFC_HEVC_ENC_CTX_BUF_SIZE_V10, >>> .other_enc_ctx = MFC_OTHER_ENC_CTX_BUF_SIZE_V10, >>> }; >>> >>> diff --git a/drivers/media/platform/s5p-mfc/s5p_mfc_cmd_v6.c >>> b/drivers/media/platform/s5p-mfc/s5p_mfc_cmd_v6.c >>> index 102b47e..7521fce 100644 >>> --- a/drivers/media/platform/s5p-mfc/s5p_mfc_cmd_v6.c >>> +++ b/drivers/media/platform/s5p-mfc/s5p_mfc_cmd_v6.c >>> @@ -122,6 +122,9 @@ static int s5p_mfc_open_inst_cmd_v6(struct s5p_mfc_ctx >>> *ctx) >>> case S5P_MFC_CODEC_VP8_ENC: >>> codec_type = S5P_FIMV_CODEC_VP8_ENC_V7; >>> break; >>> + case S5P_MFC_CODE
Re: [Patch v2 10/11] s5p-mfc: Add support for HEVC encoder
On Tue, 2017-03-07 at 12:33 +0100, Andrzej Hajda wrote: > On 03.03.2017 10:07, Smitha T Murthy wrote: > > Add HEVC encoder support and necessary registers, V4L2 CIDs, > > and hevc encoder parameters > > > > Signed-off-by: Smitha T Murthy > > --- > > drivers/media/platform/s5p-mfc/regs-mfc-v10.h | 28 +- > > drivers/media/platform/s5p-mfc/s5p_mfc.c|1 + > > drivers/media/platform/s5p-mfc/s5p_mfc_cmd_v6.c |3 + > > drivers/media/platform/s5p-mfc/s5p_mfc_common.h | 55 ++- > > drivers/media/platform/s5p-mfc/s5p_mfc_enc.c| 595 > > +++ > > drivers/media/platform/s5p-mfc/s5p_mfc_opr.h|8 + > > drivers/media/platform/s5p-mfc/s5p_mfc_opr_v6.c | 200 > > drivers/media/platform/s5p-mfc/s5p_mfc_opr_v6.h |8 + > > 8 files changed, 896 insertions(+), 2 deletions(-) > > > > diff --git a/drivers/media/platform/s5p-mfc/regs-mfc-v10.h > > b/drivers/media/platform/s5p-mfc/regs-mfc-v10.h > > index 846dcf5..caf02ff 100644 > > --- a/drivers/media/platform/s5p-mfc/regs-mfc-v10.h > > +++ b/drivers/media/platform/s5p-mfc/regs-mfc-v10.h > > @@ -20,13 +20,35 @@ > > #define S5P_FIMV_MFC_STATE_V10 0x7124 > > #define S5P_FIMV_D_STATIC_BUFFER_ADDR_V10 0xF570 > > #define S5P_FIMV_D_STATIC_BUFFER_SIZE_V10 0xF574 > > +#define S5P_FIMV_E_NUM_T_LAYER_V10 0xFBAC > > +#define S5P_FIMV_E_HIERARCHICAL_QP_LAYER0_V10 0xFBB0 > > +#define S5P_FIMV_E_HIERARCHICAL_QP_LAYER1_V10 0xFBB4 > > +#define S5P_FIMV_E_HIERARCHICAL_QP_LAYER2_V10 0xFBB8 > > +#define S5P_FIMV_E_HIERARCHICAL_QP_LAYER3_V10 0xFBBC > > +#define S5P_FIMV_E_HIERARCHICAL_QP_LAYER4_V10 0xFBC0 > > +#define S5P_FIMV_E_HIERARCHICAL_QP_LAYER5_V10 0xFBC4 > > +#define S5P_FIMV_E_HIERARCHICAL_QP_LAYER6_V10 0xFBC8 > > +#define S5P_FIMV_E_HIERARCHICAL_BIT_RATE_LAYER0_V100xFD18 > > +#define S5P_FIMV_E_HIERARCHICAL_BIT_RATE_LAYER1_V100xFD1C > > +#define S5P_FIMV_E_HIERARCHICAL_BIT_RATE_LAYER2_V100xFD20 > > +#define S5P_FIMV_E_HIERARCHICAL_BIT_RATE_LAYER3_V100xFD24 > > +#define S5P_FIMV_E_HIERARCHICAL_BIT_RATE_LAYER4_V100xFD28 > > +#define S5P_FIMV_E_HIERARCHICAL_BIT_RATE_LAYER5_V100xFD2C > > +#define S5P_FIMV_E_HIERARCHICAL_BIT_RATE_LAYER6_V100xFD30 > > +#define S5P_FIMV_E_HEVC_OPTIONS_V100xFDD4 > > +#define S5P_FIMV_E_HEVC_REFRESH_PERIOD_V10 0xFDD8 > > +#define S5P_FIMV_E_HEVC_CHROMA_QP_OFFSET_V10 0xFDDC > > +#define S5P_FIMV_E_HEVC_LF_BETA_OFFSET_DIV2_V100xFDE0 > > +#define S5P_FIMV_E_HEVC_LF_TC_OFFSET_DIV2_V10 0xFDE4 > > +#define S5P_FIMV_E_HEVC_NAL_CONTROL_V100xFDE8 > > > > /* MFCv10 Context buffer sizes */ > > #define MFC_CTX_BUF_SIZE_V10 (30 * SZ_1K)/* 30KB */ > > #define MFC_H264_DEC_CTX_BUF_SIZE_V10 (2 * SZ_1M) /* 2MB */ > > #define MFC_OTHER_DEC_CTX_BUF_SIZE_V10 (20 * SZ_1K)/* 20KB */ > > #define MFC_H264_ENC_CTX_BUF_SIZE_V10 (100 * SZ_1K) /* 100KB */ > > -#define MFC_OTHER_ENC_CTX_BUF_SIZE_V10 (15 * SZ_1K)/* 15KB */ > > +#define MFC_HEVC_ENC_CTX_BUF_SIZE_V10 (30 * SZ_1K)/* 30KB */ > > +#define MFC_OTHER_ENC_CTX_BUF_SIZE_V10 (15 * SZ_1K) /* 15KB */ > > > > /* MFCv10 variant defines */ > > #define MAX_FW_SIZE_V10(SZ_1M) /* 1MB */ > > @@ -58,5 +80,9 @@ > > #define ENC_V100_VP8_ME_SIZE(x, y) \ > > ENC_V100_BASE_SIZE(x, y) > > > > +#define ENC_V100_HEVC_ME_SIZE(x, y)\ > > + (((x + 3) * (y + 3) * 32) \ > > ++ ((y * 128) + 1280) * DIV_ROUND_UP(x, 4)) > > + > > #endif /*_REGS_MFC_V10_H*/ > > > > diff --git a/drivers/media/platform/s5p-mfc/s5p_mfc.c > > b/drivers/media/platform/s5p-mfc/s5p_mfc.c > > index b014038..b01c556 100644 > > --- a/drivers/media/platform/s5p-mfc/s5p_mfc.c > > +++ b/drivers/media/platform/s5p-mfc/s5p_mfc.c > > @@ -1549,6 +1549,7 @@ static int s5p_mfc_resume(struct device *dev) > > .h264_dec_ctx = MFC_H264_DEC_CTX_BUF_SIZE_V10, > > .other_dec_ctx = MFC_OTHER_DEC_CTX_BUF_SIZE_V10, > > .h264_enc_ctx = MFC_H264_ENC_CTX_BUF_SIZE_V10, > > + .hevc_enc_ctx = MFC_HEVC_ENC_CTX_BUF_SIZE_V10, > > .other_enc_ctx = MFC_OTHER_ENC_CTX_BUF_SIZE_V10, > > }; > > > > diff --git a/drivers/media/platform/s5p-mfc/s5p_mfc_cmd_v6.c > > b/drivers/media/platform/s5p-mfc/s5p_mfc_cmd_v6.c > > index 102b47e..7521fce 100644 > > --- a/drivers/media/platform/s5p-mfc/s5p_mfc_cmd_v6.c > > +++ b/drivers/media/platform/s5p-mfc/s5p_mfc_cmd_v6.c > > @@ -122,6 +122,9 @@ static int s5p_mfc_open_inst_cmd_v6(struct s5p_mfc_ctx > > *ctx) > > case S5P_MFC_CODEC_VP8_ENC: > > codec_type = S5P_FIMV_CODEC_VP8_ENC_V7; > > break; > > + case S5P_MFC_CODEC_HEVC_ENC: > > + codec_type = S5P_FIMV_CODEC_HEVC_ENC; > > + break; > > default: > >
Re: [Patch v2 10/11] s5p-mfc: Add support for HEVC encoder
On 03.03.2017 10:07, Smitha T Murthy wrote: > Add HEVC encoder support and necessary registers, V4L2 CIDs, > and hevc encoder parameters > > Signed-off-by: Smitha T Murthy > --- > drivers/media/platform/s5p-mfc/regs-mfc-v10.h | 28 +- > drivers/media/platform/s5p-mfc/s5p_mfc.c|1 + > drivers/media/platform/s5p-mfc/s5p_mfc_cmd_v6.c |3 + > drivers/media/platform/s5p-mfc/s5p_mfc_common.h | 55 ++- > drivers/media/platform/s5p-mfc/s5p_mfc_enc.c| 595 > +++ > drivers/media/platform/s5p-mfc/s5p_mfc_opr.h|8 + > drivers/media/platform/s5p-mfc/s5p_mfc_opr_v6.c | 200 > drivers/media/platform/s5p-mfc/s5p_mfc_opr_v6.h |8 + > 8 files changed, 896 insertions(+), 2 deletions(-) > > diff --git a/drivers/media/platform/s5p-mfc/regs-mfc-v10.h > b/drivers/media/platform/s5p-mfc/regs-mfc-v10.h > index 846dcf5..caf02ff 100644 > --- a/drivers/media/platform/s5p-mfc/regs-mfc-v10.h > +++ b/drivers/media/platform/s5p-mfc/regs-mfc-v10.h > @@ -20,13 +20,35 @@ > #define S5P_FIMV_MFC_STATE_V10 0x7124 > #define S5P_FIMV_D_STATIC_BUFFER_ADDR_V100xF570 > #define S5P_FIMV_D_STATIC_BUFFER_SIZE_V100xF574 > +#define S5P_FIMV_E_NUM_T_LAYER_V10 0xFBAC > +#define S5P_FIMV_E_HIERARCHICAL_QP_LAYER0_V100xFBB0 > +#define S5P_FIMV_E_HIERARCHICAL_QP_LAYER1_V100xFBB4 > +#define S5P_FIMV_E_HIERARCHICAL_QP_LAYER2_V100xFBB8 > +#define S5P_FIMV_E_HIERARCHICAL_QP_LAYER3_V100xFBBC > +#define S5P_FIMV_E_HIERARCHICAL_QP_LAYER4_V100xFBC0 > +#define S5P_FIMV_E_HIERARCHICAL_QP_LAYER5_V100xFBC4 > +#define S5P_FIMV_E_HIERARCHICAL_QP_LAYER6_V100xFBC8 > +#define S5P_FIMV_E_HIERARCHICAL_BIT_RATE_LAYER0_V10 0xFD18 > +#define S5P_FIMV_E_HIERARCHICAL_BIT_RATE_LAYER1_V10 0xFD1C > +#define S5P_FIMV_E_HIERARCHICAL_BIT_RATE_LAYER2_V10 0xFD20 > +#define S5P_FIMV_E_HIERARCHICAL_BIT_RATE_LAYER3_V10 0xFD24 > +#define S5P_FIMV_E_HIERARCHICAL_BIT_RATE_LAYER4_V10 0xFD28 > +#define S5P_FIMV_E_HIERARCHICAL_BIT_RATE_LAYER5_V10 0xFD2C > +#define S5P_FIMV_E_HIERARCHICAL_BIT_RATE_LAYER6_V10 0xFD30 > +#define S5P_FIMV_E_HEVC_OPTIONS_V10 0xFDD4 > +#define S5P_FIMV_E_HEVC_REFRESH_PERIOD_V10 0xFDD8 > +#define S5P_FIMV_E_HEVC_CHROMA_QP_OFFSET_V10 0xFDDC > +#define S5P_FIMV_E_HEVC_LF_BETA_OFFSET_DIV2_V10 0xFDE0 > +#define S5P_FIMV_E_HEVC_LF_TC_OFFSET_DIV2_V100xFDE4 > +#define S5P_FIMV_E_HEVC_NAL_CONTROL_V10 0xFDE8 > > /* MFCv10 Context buffer sizes */ > #define MFC_CTX_BUF_SIZE_V10 (30 * SZ_1K)/* 30KB */ > #define MFC_H264_DEC_CTX_BUF_SIZE_V10(2 * SZ_1M) /* 2MB */ > #define MFC_OTHER_DEC_CTX_BUF_SIZE_V10 (20 * SZ_1K)/* 20KB */ > #define MFC_H264_ENC_CTX_BUF_SIZE_V10(100 * SZ_1K) /* 100KB */ > -#define MFC_OTHER_ENC_CTX_BUF_SIZE_V10 (15 * SZ_1K)/* 15KB */ > +#define MFC_HEVC_ENC_CTX_BUF_SIZE_V10(30 * SZ_1K)/* 30KB */ > +#define MFC_OTHER_ENC_CTX_BUF_SIZE_V10 (15 * SZ_1K) /* 15KB */ > > /* MFCv10 variant defines */ > #define MAX_FW_SIZE_V10 (SZ_1M) /* 1MB */ > @@ -58,5 +80,9 @@ > #define ENC_V100_VP8_ME_SIZE(x, y) \ > ENC_V100_BASE_SIZE(x, y) > > +#define ENC_V100_HEVC_ME_SIZE(x, y) \ > + (((x + 3) * (y + 3) * 32) \ > + + ((y * 128) + 1280) * DIV_ROUND_UP(x, 4)) > + > #endif /*_REGS_MFC_V10_H*/ > > diff --git a/drivers/media/platform/s5p-mfc/s5p_mfc.c > b/drivers/media/platform/s5p-mfc/s5p_mfc.c > index b014038..b01c556 100644 > --- a/drivers/media/platform/s5p-mfc/s5p_mfc.c > +++ b/drivers/media/platform/s5p-mfc/s5p_mfc.c > @@ -1549,6 +1549,7 @@ static int s5p_mfc_resume(struct device *dev) > .h264_dec_ctx = MFC_H264_DEC_CTX_BUF_SIZE_V10, > .other_dec_ctx = MFC_OTHER_DEC_CTX_BUF_SIZE_V10, > .h264_enc_ctx = MFC_H264_ENC_CTX_BUF_SIZE_V10, > + .hevc_enc_ctx = MFC_HEVC_ENC_CTX_BUF_SIZE_V10, > .other_enc_ctx = MFC_OTHER_ENC_CTX_BUF_SIZE_V10, > }; > > diff --git a/drivers/media/platform/s5p-mfc/s5p_mfc_cmd_v6.c > b/drivers/media/platform/s5p-mfc/s5p_mfc_cmd_v6.c > index 102b47e..7521fce 100644 > --- a/drivers/media/platform/s5p-mfc/s5p_mfc_cmd_v6.c > +++ b/drivers/media/platform/s5p-mfc/s5p_mfc_cmd_v6.c > @@ -122,6 +122,9 @@ static int s5p_mfc_open_inst_cmd_v6(struct s5p_mfc_ctx > *ctx) > case S5P_MFC_CODEC_VP8_ENC: > codec_type = S5P_FIMV_CODEC_VP8_ENC_V7; > break; > + case S5P_MFC_CODEC_HEVC_ENC: > + codec_type = S5P_FIMV_CODEC_HEVC_ENC; > + break; > default: > codec_type = S5P_FIMV_CODEC_NONE_V6; > } > diff --git a/drivers/media/platform/s5p-mfc/s5p_mfc_common.h > b/drivers/media/platform/s5p-mfc/s5p_mfc_common.h > index e720ce6..c55fa6c 100644 > --- a/drivers/media/platform/s5p-mfc/s5p_mfc_com
[Patch v2 10/11] s5p-mfc: Add support for HEVC encoder
Add HEVC encoder support and necessary registers, V4L2 CIDs, and hevc encoder parameters Signed-off-by: Smitha T Murthy --- drivers/media/platform/s5p-mfc/regs-mfc-v10.h | 28 +- drivers/media/platform/s5p-mfc/s5p_mfc.c|1 + drivers/media/platform/s5p-mfc/s5p_mfc_cmd_v6.c |3 + drivers/media/platform/s5p-mfc/s5p_mfc_common.h | 55 ++- drivers/media/platform/s5p-mfc/s5p_mfc_enc.c| 595 +++ drivers/media/platform/s5p-mfc/s5p_mfc_opr.h|8 + drivers/media/platform/s5p-mfc/s5p_mfc_opr_v6.c | 200 drivers/media/platform/s5p-mfc/s5p_mfc_opr_v6.h |8 + 8 files changed, 896 insertions(+), 2 deletions(-) diff --git a/drivers/media/platform/s5p-mfc/regs-mfc-v10.h b/drivers/media/platform/s5p-mfc/regs-mfc-v10.h index 846dcf5..caf02ff 100644 --- a/drivers/media/platform/s5p-mfc/regs-mfc-v10.h +++ b/drivers/media/platform/s5p-mfc/regs-mfc-v10.h @@ -20,13 +20,35 @@ #define S5P_FIMV_MFC_STATE_V10 0x7124 #define S5P_FIMV_D_STATIC_BUFFER_ADDR_V10 0xF570 #define S5P_FIMV_D_STATIC_BUFFER_SIZE_V10 0xF574 +#define S5P_FIMV_E_NUM_T_LAYER_V10 0xFBAC +#define S5P_FIMV_E_HIERARCHICAL_QP_LAYER0_V10 0xFBB0 +#define S5P_FIMV_E_HIERARCHICAL_QP_LAYER1_V10 0xFBB4 +#define S5P_FIMV_E_HIERARCHICAL_QP_LAYER2_V10 0xFBB8 +#define S5P_FIMV_E_HIERARCHICAL_QP_LAYER3_V10 0xFBBC +#define S5P_FIMV_E_HIERARCHICAL_QP_LAYER4_V10 0xFBC0 +#define S5P_FIMV_E_HIERARCHICAL_QP_LAYER5_V10 0xFBC4 +#define S5P_FIMV_E_HIERARCHICAL_QP_LAYER6_V10 0xFBC8 +#define S5P_FIMV_E_HIERARCHICAL_BIT_RATE_LAYER0_V100xFD18 +#define S5P_FIMV_E_HIERARCHICAL_BIT_RATE_LAYER1_V100xFD1C +#define S5P_FIMV_E_HIERARCHICAL_BIT_RATE_LAYER2_V100xFD20 +#define S5P_FIMV_E_HIERARCHICAL_BIT_RATE_LAYER3_V100xFD24 +#define S5P_FIMV_E_HIERARCHICAL_BIT_RATE_LAYER4_V100xFD28 +#define S5P_FIMV_E_HIERARCHICAL_BIT_RATE_LAYER5_V100xFD2C +#define S5P_FIMV_E_HIERARCHICAL_BIT_RATE_LAYER6_V100xFD30 +#define S5P_FIMV_E_HEVC_OPTIONS_V100xFDD4 +#define S5P_FIMV_E_HEVC_REFRESH_PERIOD_V10 0xFDD8 +#define S5P_FIMV_E_HEVC_CHROMA_QP_OFFSET_V10 0xFDDC +#define S5P_FIMV_E_HEVC_LF_BETA_OFFSET_DIV2_V100xFDE0 +#define S5P_FIMV_E_HEVC_LF_TC_OFFSET_DIV2_V10 0xFDE4 +#define S5P_FIMV_E_HEVC_NAL_CONTROL_V100xFDE8 /* MFCv10 Context buffer sizes */ #define MFC_CTX_BUF_SIZE_V10 (30 * SZ_1K)/* 30KB */ #define MFC_H264_DEC_CTX_BUF_SIZE_V10 (2 * SZ_1M) /* 2MB */ #define MFC_OTHER_DEC_CTX_BUF_SIZE_V10 (20 * SZ_1K)/* 20KB */ #define MFC_H264_ENC_CTX_BUF_SIZE_V10 (100 * SZ_1K) /* 100KB */ -#define MFC_OTHER_ENC_CTX_BUF_SIZE_V10 (15 * SZ_1K)/* 15KB */ +#define MFC_HEVC_ENC_CTX_BUF_SIZE_V10 (30 * SZ_1K)/* 30KB */ +#define MFC_OTHER_ENC_CTX_BUF_SIZE_V10 (15 * SZ_1K) /* 15KB */ /* MFCv10 variant defines */ #define MAX_FW_SIZE_V10(SZ_1M) /* 1MB */ @@ -58,5 +80,9 @@ #define ENC_V100_VP8_ME_SIZE(x, y) \ ENC_V100_BASE_SIZE(x, y) +#define ENC_V100_HEVC_ME_SIZE(x, y)\ + (((x + 3) * (y + 3) * 32) \ ++ ((y * 128) + 1280) * DIV_ROUND_UP(x, 4)) + #endif /*_REGS_MFC_V10_H*/ diff --git a/drivers/media/platform/s5p-mfc/s5p_mfc.c b/drivers/media/platform/s5p-mfc/s5p_mfc.c index b014038..b01c556 100644 --- a/drivers/media/platform/s5p-mfc/s5p_mfc.c +++ b/drivers/media/platform/s5p-mfc/s5p_mfc.c @@ -1549,6 +1549,7 @@ static int s5p_mfc_resume(struct device *dev) .h264_dec_ctx = MFC_H264_DEC_CTX_BUF_SIZE_V10, .other_dec_ctx = MFC_OTHER_DEC_CTX_BUF_SIZE_V10, .h264_enc_ctx = MFC_H264_ENC_CTX_BUF_SIZE_V10, + .hevc_enc_ctx = MFC_HEVC_ENC_CTX_BUF_SIZE_V10, .other_enc_ctx = MFC_OTHER_ENC_CTX_BUF_SIZE_V10, }; diff --git a/drivers/media/platform/s5p-mfc/s5p_mfc_cmd_v6.c b/drivers/media/platform/s5p-mfc/s5p_mfc_cmd_v6.c index 102b47e..7521fce 100644 --- a/drivers/media/platform/s5p-mfc/s5p_mfc_cmd_v6.c +++ b/drivers/media/platform/s5p-mfc/s5p_mfc_cmd_v6.c @@ -122,6 +122,9 @@ static int s5p_mfc_open_inst_cmd_v6(struct s5p_mfc_ctx *ctx) case S5P_MFC_CODEC_VP8_ENC: codec_type = S5P_FIMV_CODEC_VP8_ENC_V7; break; + case S5P_MFC_CODEC_HEVC_ENC: + codec_type = S5P_FIMV_CODEC_HEVC_ENC; + break; default: codec_type = S5P_FIMV_CODEC_NONE_V6; } diff --git a/drivers/media/platform/s5p-mfc/s5p_mfc_common.h b/drivers/media/platform/s5p-mfc/s5p_mfc_common.h index e720ce6..c55fa6c 100644 --- a/drivers/media/platform/s5p-mfc/s5p_mfc_common.h +++ b/drivers/media/platform/s5p-mfc/s5p_mfc_common.h @@ -68,7 +68,7 @@ static inline dma_addr_t s5p_mfc_mem_cookie(void *a, void *b) #define MFC_ENC_CAP_PLANE_COUNT1 #define MFC_ENC_OUT_PLANE_COUNT2 #define STUFF_BYTE 4
