Hello, The following question is not totally in the scope of v4l2, but more about your advise concering dma alternatives for non-expreciened v4l2 device writer. We intend to use the fpga for concurrent 3xHD and 3xSD.
We have some dillema regadring the fpga to choose from: ALTERA fpga which use contiguous dma memory, or Xilinx fpga which is using scatter-gather architecture. With xilinx, it seems that the sg architecture can also be used as contiguous according to the following: "... While these descriptors are not required to be contiguous, they should be contained within an 8 megabyte region which corresponds to the width of the AXI_PCIe_SG port" it seems according to the above description that sg-list can be used as single contiguous descriptor (with dma-cotig), though the 8MBytes seems like a problematic constrain. This constrain make it difficult to be used with dma-contig solution in v4l2. Our current direction is try to imeplement it as simple as possible. Therefore we prefer the dma contiguous solution (I think that together with CMA and a strong cpu like 64-bit i7 it can handle contigious memory for 3xHD and 3xSD allocation). Any feedback is appreciated, Ran -- To unsubscribe from this list: send the line "unsubscribe linux-media" in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
