Re: [PATCH v4 1/3] media: soc_camera: rcar_vin: Add scaling support

2014-11-27 Thread Simon Horman
Hi Guennadi,

On Sun, Nov 23, 2014 at 12:45:38PM +0100, Guennadi Liakhovetski wrote:
 From: Koji Matsuoka koji.matsuoka...@renesas.com
 
 Signed-off-by: Koji Matsuoka koji.matsuoka...@renesas.com
 Signed-off-by: Yoshihiro Kaneko ykaneko0...@gmail.com
 [g.liakhovet...@gmx.de: minor stylistic and formatting corrections]
 Signed-off-by: Guennadi Liakhovetski g.liakhovet...@gmx.de
 ---
 
 Kaneko-san, Matsuoka-san, could you please have a look at this version of 
 this your patch? Are my changes to it ok? Also, please test this my 
 branch: 
 http://git.linuxtv.org/cgit.cgi/gliakhovetski/v4l-dvb.git/log/?h=for-3.19-1 
 before I push it to Mauro. Patches applied more or less cleanly, and there 
 don't seem to be any functional dependencies, that I might have broken, 
 the driver compiles with no warnings, still, would be good if you could 
 test it! Otherwise waiting for updates for other your patches! Patch 
 rcar_vin: Add BT.709 24-bit RGB888 input support is also marked Ok by 
 me, but I couldn't push it yet, because it depends on other patches, that 
 have to be updated.

Thanks for reworking this patch.
I will see about getting someone to look into testing it and
re-working the other patches.

 Thanks
 Guennadi
 
  drivers/media/platform/soc_camera/rcar_vin.c | 451 
 ++-
  1 file changed, 442 insertions(+), 9 deletions(-)
 
 diff --git a/drivers/media/platform/soc_camera/rcar_vin.c 
 b/drivers/media/platform/soc_camera/rcar_vin.c
 index c60560a..c71ef2b 100644
 --- a/drivers/media/platform/soc_camera/rcar_vin.c
 +++ b/drivers/media/platform/soc_camera/rcar_vin.c
 @@ -64,6 +64,30 @@
  #define VNDMR_REG0x58/* Video n Data Mode Register */
  #define VNDMR2_REG   0x5C/* Video n Data Mode Register 2 */
  #define VNUVAOF_REG  0x60/* Video n UV Address Offset Register */
 +#define VNC1A_REG0x80/* Video n Coefficient Set C1A Register */
 +#define VNC1B_REG0x84/* Video n Coefficient Set C1B Register */
 +#define VNC1C_REG0x88/* Video n Coefficient Set C1C Register */
 +#define VNC2A_REG0x90/* Video n Coefficient Set C2A Register */
 +#define VNC2B_REG0x94/* Video n Coefficient Set C2B Register */
 +#define VNC2C_REG0x98/* Video n Coefficient Set C2C Register */
 +#define VNC3A_REG0xA0/* Video n Coefficient Set C3A Register */
 +#define VNC3B_REG0xA4/* Video n Coefficient Set C3B Register */
 +#define VNC3C_REG0xA8/* Video n Coefficient Set C3C Register */
 +#define VNC4A_REG0xB0/* Video n Coefficient Set C4A Register */
 +#define VNC4B_REG0xB4/* Video n Coefficient Set C4B Register */
 +#define VNC4C_REG0xB8/* Video n Coefficient Set C4C Register */
 +#define VNC5A_REG0xC0/* Video n Coefficient Set C5A Register */
 +#define VNC5B_REG0xC4/* Video n Coefficient Set C5B Register */
 +#define VNC5C_REG0xC8/* Video n Coefficient Set C5C Register */
 +#define VNC6A_REG0xD0/* Video n Coefficient Set C6A Register */
 +#define VNC6B_REG0xD4/* Video n Coefficient Set C6B Register */
 +#define VNC6C_REG0xD8/* Video n Coefficient Set C6C Register */
 +#define VNC7A_REG0xE0/* Video n Coefficient Set C7A Register */
 +#define VNC7B_REG0xE4/* Video n Coefficient Set C7B Register */
 +#define VNC7C_REG0xE8/* Video n Coefficient Set C7C Register */
 +#define VNC8A_REG0xF0/* Video n Coefficient Set C8A Register */
 +#define VNC8B_REG0xF4/* Video n Coefficient Set C8B Register */
 +#define VNC8C_REG0xF8/* Video n Coefficient Set C8C Register */
  
  /* Register bit fields for R-Car VIN */
  /* Video n Main Control Register bits */
 @@ -117,6 +141,324 @@ enum chip_id {
   RCAR_E1,
  };
  
 +struct vin_coeff {
 + unsigned short xs_value;
 + u32 coeff_set[24];
 +};
 +
 +static const struct vin_coeff vin_coeff_set[] = {
 + { 0x, {
 + 0x, 0x, 0x,
 + 0x, 0x, 0x,
 + 0x, 0x, 0x,
 + 0x, 0x, 0x,
 + 0x, 0x, 0x,
 + 0x, 0x, 0x,
 + 0x, 0x, 0x,
 + 0x, 0x, 0x },
 + },
 + { 0x1000, {
 + 0x000fa400, 0x000fa400, 0x09625902,
 + 0x03f8, 0x0403, 0x3de0d9f0,
 + 0x001fffed, 0x0804, 0x3cc1f9c3,
 + 0x001003de, 0x0c01, 0x3cb34d7f,
 + 0x002003d2, 0x0c00, 0x3d24a92d,
 + 0x00200bca, 0x0bff, 0x3df600d2,

Re: [PATCH v4 1/3] media: soc_camera: rcar_vin: Add scaling support

2014-11-25 Thread Yoshihiro Kaneko
Hello Guennadi,

I'm so sorry for the long delay in my reply.
Please give me some more time to test the patches.

Regards,
Kaneko

2014-11-23 20:45 GMT+09:00 Guennadi Liakhovetski g.liakhovet...@gmx.de:
 From: Koji Matsuoka koji.matsuoka...@renesas.com

 Signed-off-by: Koji Matsuoka koji.matsuoka...@renesas.com
 Signed-off-by: Yoshihiro Kaneko ykaneko0...@gmail.com
 [g.liakhovet...@gmx.de: minor stylistic and formatting corrections]
 Signed-off-by: Guennadi Liakhovetski g.liakhovet...@gmx.de
 ---

 Kaneko-san, Matsuoka-san, could you please have a look at this version of
 this your patch? Are my changes to it ok? Also, please test this my
 branch:
 http://git.linuxtv.org/cgit.cgi/gliakhovetski/v4l-dvb.git/log/?h=for-3.19-1
 before I push it to Mauro. Patches applied more or less cleanly, and there
 don't seem to be any functional dependencies, that I might have broken,
 the driver compiles with no warnings, still, would be good if you could
 test it! Otherwise waiting for updates for other your patches! Patch
 rcar_vin: Add BT.709 24-bit RGB888 input support is also marked Ok by
 me, but I couldn't push it yet, because it depends on other patches, that
 have to be updated.

 Thanks
 Guennadi

  drivers/media/platform/soc_camera/rcar_vin.c | 451 
 ++-
  1 file changed, 442 insertions(+), 9 deletions(-)

 diff --git a/drivers/media/platform/soc_camera/rcar_vin.c 
 b/drivers/media/platform/soc_camera/rcar_vin.c
 index c60560a..c71ef2b 100644
 --- a/drivers/media/platform/soc_camera/rcar_vin.c
 +++ b/drivers/media/platform/soc_camera/rcar_vin.c
 @@ -64,6 +64,30 @@
  #define VNDMR_REG  0x58/* Video n Data Mode Register */
  #define VNDMR2_REG 0x5C/* Video n Data Mode Register 2 */
  #define VNUVAOF_REG0x60/* Video n UV Address Offset Register */
 +#define VNC1A_REG  0x80/* Video n Coefficient Set C1A Register */
 +#define VNC1B_REG  0x84/* Video n Coefficient Set C1B Register */
 +#define VNC1C_REG  0x88/* Video n Coefficient Set C1C Register */
 +#define VNC2A_REG  0x90/* Video n Coefficient Set C2A Register */
 +#define VNC2B_REG  0x94/* Video n Coefficient Set C2B Register */
 +#define VNC2C_REG  0x98/* Video n Coefficient Set C2C Register */
 +#define VNC3A_REG  0xA0/* Video n Coefficient Set C3A Register */
 +#define VNC3B_REG  0xA4/* Video n Coefficient Set C3B Register */
 +#define VNC3C_REG  0xA8/* Video n Coefficient Set C3C Register */
 +#define VNC4A_REG  0xB0/* Video n Coefficient Set C4A Register */
 +#define VNC4B_REG  0xB4/* Video n Coefficient Set C4B Register */
 +#define VNC4C_REG  0xB8/* Video n Coefficient Set C4C Register */
 +#define VNC5A_REG  0xC0/* Video n Coefficient Set C5A Register */
 +#define VNC5B_REG  0xC4/* Video n Coefficient Set C5B Register */
 +#define VNC5C_REG  0xC8/* Video n Coefficient Set C5C Register */
 +#define VNC6A_REG  0xD0/* Video n Coefficient Set C6A Register */
 +#define VNC6B_REG  0xD4/* Video n Coefficient Set C6B Register */
 +#define VNC6C_REG  0xD8/* Video n Coefficient Set C6C Register */
 +#define VNC7A_REG  0xE0/* Video n Coefficient Set C7A Register */
 +#define VNC7B_REG  0xE4/* Video n Coefficient Set C7B Register */
 +#define VNC7C_REG  0xE8/* Video n Coefficient Set C7C Register */
 +#define VNC8A_REG  0xF0/* Video n Coefficient Set C8A Register */
 +#define VNC8B_REG  0xF4/* Video n Coefficient Set C8B Register */
 +#define VNC8C_REG  0xF8/* Video n Coefficient Set C8C Register */

  /* Register bit fields for R-Car VIN */
  /* Video n Main Control Register bits */
 @@ -117,6 +141,324 @@ enum chip_id {
 RCAR_E1,
  };

 +struct vin_coeff {
 +   unsigned short xs_value;
 +   u32 coeff_set[24];
 +};
 +
 +static const struct vin_coeff vin_coeff_set[] = {
 +   { 0x, {
 +   0x, 0x, 0x,
 +   0x, 0x, 0x,
 +   0x, 0x, 0x,
 +   0x, 0x, 0x,
 +   0x, 0x, 0x,
 +   0x, 0x, 0x,
 +   0x, 0x, 0x,
 +   0x, 0x, 0x },
 +   },
 +   { 0x1000, {
 +   0x000fa400, 0x000fa400, 0x09625902,
 +   0x03f8, 0x0403, 0x3de0d9f0,
 +   0x001fffed, 0x0804, 0x3cc1f9c3,
 +   0x001003de, 0x0c01, 0x3cb34d7f,
 +   0x002003d2, 0x0c00, 0x3d24a92d,
 +