Re: [PATCHv2 2/3] drm: exynos: hdmi: use hdmiphy as PHY
Hi Tomasz, On 04/08/2014 04:37 PM, Tomasz Stanislawski wrote: The HDMIPHY (physical interface) is controlled by a single bit in a power controller's regiter. It was implemented as clock. It was a simple but effective hack. This power controller register has also bits to control HDMI clock divider ratio. I guess current drivers do not change it, but how do you want to implement access to it if some HDMI driver in the future will need to change ratio. I guess in case of clk it would be easier. Regards Andrzej -- To unsubscribe from this list: send the line unsubscribe linux-media in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
Re: [PATCHv2 2/3] drm: exynos: hdmi: use hdmiphy as PHY
Hi Andrzej, On 9 April 2014 16:00, Andrzej Hajda a.ha...@samsung.com wrote: Hi Tomasz, On 04/08/2014 04:37 PM, Tomasz Stanislawski wrote: The HDMIPHY (physical interface) is controlled by a single bit in a power controller's regiter. It was implemented as clock. It was a simple but effective hack. This power controller register has also bits to control HDMI clock divider ratio. I guess current drivers do not change it, but how do you want to implement access to it if some HDMI driver in the future will need to change ratio. I guess in case of clk it would be easier. If it is really required to change this divider, it should be registered as a clock provider in clock driver exposing single divider clock. Regards, Rahul Sharma Regards Andrzej ___ dri-devel mailing list dri-de...@lists.freedesktop.org http://lists.freedesktop.org/mailman/listinfo/dri-devel -- To unsubscribe from this list: send the line unsubscribe linux-media in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
Re: [PATCHv2 2/3] drm: exynos: hdmi: use hdmiphy as PHY
Hi Andrzej, This issue could be solved by exporting a regmap from PMU driver or Exynos clock provider for the usage by exynos-simple-phy. The operations on PHYs from exynos-simple-phy provider would be chained to PMU driver and protected by a spinlock in the regmap. Luckily, the divider is not used as far as I know. Regards, Tomasz Stanislawski On 04/09/2014 12:30 PM, Andrzej Hajda wrote: Hi Tomasz, On 04/08/2014 04:37 PM, Tomasz Stanislawski wrote: The HDMIPHY (physical interface) is controlled by a single bit in a power controller's regiter. It was implemented as clock. It was a simple but effective hack. This power controller register has also bits to control HDMI clock divider ratio. I guess current drivers do not change it, but how do you want to implement access to it if some HDMI driver in the future will need to change ratio. I guess in case of clk it would be easier. Regards Andrzej -- To unsubscribe from this list: send the line unsubscribe linux-media in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
