Re: [RFC][PATCH v2 4/5] input: serio: add support for Amstrad Delta serial keyboard port
On Mon, Mar 29, 2010 at 04:30:41PM +0200, Janusz Krzysztofik wrote:
The patch introduces a serio driver that supports a keyboard serial port found
on the Amstrad Delta videophone board.
After initializing the hardware, the driver reads its input data from a buffer
filled in by the board FIQ (Fast Interrupt Request) handler.
Standard AT keyboard driver (atkbd) will be used on top of the serio layer
for
handling the E3 keyboard (called mailboard) connected to the port. Since the
device generated scancodes differ from what the atkbd expects, a custom key
code to scan code table must be loaded from userspace for the keyboard to be
useable.
Compiles and works on to of patch 3/5:
omap1: Amstrad Delta: use FIQ for processing GPIO interrupts
Created and tested against linux-2.6.34-rc2.
Signed-off-by: Janusz Krzysztofik jkrzy...@tis.icnet.pl
---
v2 changes:
- use correct variable name for return value in ams_delta_kbd_init(),
- remove scan code to key code mapping,
- refreshed against linux-2.6.34-rc2.
drivers/input/serio/Kconfig |9 +
drivers/input/serio/Makefile |1
drivers/input/serio/ams_delta_keyboard.c | 171
+++
3 files changed, 181 insertions(+)
diff -uprN git.orig/drivers/input/serio/Kconfig
git/drivers/input/serio/Kconfig
--- git.orig/drivers/input/serio/Kconfig 2010-03-25 15:55:42.0
+0100
+++ git/drivers/input/serio/Kconfig 2010-03-28 23:42:09.0 +0200
@@ -209,4 +209,13 @@ config SERIO_ALTERA_PS2
To compile this driver as a module, choose M here: the
module will be called altera_ps2.
+config SERIO_AMS_DELTA
+ tristate Amstrad Delta (E3) keyboard support
+ depends on MACH_AMS_DELTA AMS_DELTA_FIQ
+ ---help---
+ Say Y here if has an E3 and want to use the separate keyboard
+
+ To compile this driver as a module, choose M here: the
+ module will be called ams_delta_keyboard
+
endif
diff -uprN git.orig/drivers/input/serio/Makefile
git/drivers/input/serio/Makefile
--- git.orig/drivers/input/serio/Makefile 2010-03-25 15:55:42.0
+0100
+++ git/drivers/input/serio/Makefile 2010-03-28 23:42:09.0 +0200
@@ -21,5 +21,6 @@ obj-$(CONFIG_SERIO_PCIPS2) += pcips2.o
obj-$(CONFIG_SERIO_MACEPS2) += maceps2.o
obj-$(CONFIG_SERIO_LIBPS2) += libps2.o
obj-$(CONFIG_SERIO_RAW) += serio_raw.o
+obj-$(CONFIG_SERIO_AMS_DELTA)+= ams_delta_keyboard.o
obj-$(CONFIG_SERIO_XILINX_XPS_PS2) += xilinx_ps2.o
obj-$(CONFIG_SERIO_ALTERA_PS2) += altera_ps2.o
diff -uprN git.orig/drivers/input/serio/ams_delta_keyboard.c
git/drivers/input/serio/ams_delta_keyboard.c
--- git.orig/drivers/input/serio/ams_delta_keyboard.c 1970-01-01
01:00:00.0 +0100
+++ git/drivers/input/serio/ams_delta_keyboard.c 2010-03-28
23:42:09.0 +0200
@@ -0,0 +1,171 @@
+/*
+ * Amstrad E3 (delta) keyboard driver
+ *
+ * Copyright (c) 2006 Matt Callow
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of the GNU General Public License version 2 as published
by
+ * the Free Software Foundation.
+ *
+ * Thanks to Cliff Lawson for his help
+ *
+ * The Amstrad Delta keyboard (or mailboard) is connected to GPIO 0 (clock)
+ * and GPIO 1 (data). It uses normal PC-AT style serial transmission,
+ * but the data and clock lines are inverted on the E3 mainboard,
+ * and the scancodes produced are non-standard
+ *
+ * Due to the strict timing requirements of the interface,
+ * the serial data stream is read using a FIQ handler, and then
+ * the resulting byte stream passed to this driver via a circular buffer.
+ */
+#include linux/gpio.h
+#include linux/init.h
+#include linux/irq.h
+#include linux/module.h
+#include linux/serio.h
+#include asm/fiq.h
+#include plat/board-ams-delta.h
+#include mach/ams-delta-fiq.h
+
+MODULE_AUTHOR(Matt Callow);
+MODULE_DESCRIPTION(AMS Delta (E3) Keyboard driver);
+MODULE_LICENSE(GPL);
+
+#define MAX_SCANCODE 0x84
Not needed anymore?
+
+static struct serio *ams_delta_kbd_port;
+
+static int check_data(int data)
+{
+ int i;
+ int parity = 0;
+
+ /* check valid stop bit */
+ if (!(data 0x400)) {
+ printk(KERN_WARNING
+ Invalid stop bit in AMS keyboard
+ data=0x%X\r\n, data);
Consider switching top dev_err(), dev_warning(), etc. Also do not split
text strings, even if you run over 80 column limit. BTW, why \r\n in
the message?
+ return 0;
+ }
+ /* calculate the parity */
+ for (i = 1; i 10; i++) {
+ if (data (1 i))
+ parity++;
+ }
+ /* it should be odd */
+ if (!(parity 0x01)) {
+ printk(KERN_WARNING
+ Paritiy check failed in AMS keyboard
+
[PATCH v3 1/1] Registering sgx device and it's platform data
In this patch SGX powervr_device is registered with it's platform specific
data to provide information about setting constraint through
omap_pm_set_min_bus_tput.
This patch removes the requirement of EXPORT_SYMBOL for the same function.
Signed-off-by: Preshit Agarwal preshit.agar...@ti.com
Signed-off-by: Felipe Balbi felipe.ba...@nokia.com
Signed-off-by: Allen Pais allen.p...@ti.com
---
arch/arm/mach-omap2/devices.c | 32
arch/arm/mach-omap2/include/mach/omap_sgxdef.h | 11
2 files changed, 43 insertions(+), 0 deletions(-)
create mode 100644 arch/arm/mach-omap2/include/mach/omap_sgxdef.h
diff --git a/arch/arm/mach-omap2/devices.c b/arch/arm/mach-omap2/devices.c
index 7131d8d..fe76248 100644
--- a/arch/arm/mach-omap2/devices.c
+++ b/arch/arm/mach-omap2/devices.c
@@ -27,6 +27,7 @@
#include mach/gpio.h
#include plat/mmc.h
+#include mach/omap_sgxdef.h
#include mux.h
#if defined(CONFIG_VIDEO_OMAP2) || defined(CONFIG_VIDEO_OMAP2_MODULE)
@@ -773,6 +774,36 @@ static inline void omap_hdq_init(void)
static inline void omap_hdq_init(void) {}
#endif
+#ifdef CONFIG_PM
+static void omap_sgx_pm_constraints(struct device *dev, u8 agent_id,
+ unsigned long r)
+{
+ omap_pm_set_min_bus_tput(dev, agent_id, r);
+}
+#else
+static inline void omap_sgx_pm_constraints(struct device *dev, u8 agent_id,
+ unsigned long r)
+{
+}
+#endif
+
+struct sgx_platform_data omap_sgx_data = {
+ .set_min_bus_tput = omap_sgx_pm_constraints,
+};
+
+static struct platform_device powervr_device = {
+ .name = pvrsrvkm,
+ .id = -1,
+ .dev= {
+ .platform_data = omap_sgx_data,
+ },
+};
+
+static void omap_init_sgx(void)
+{
+ (void) platform_device_register(powervr_device);
+}
+
/*-*/
static int __init omap2_init_devices(void)
@@ -787,6 +818,7 @@ static int __init omap2_init_devices(void)
omap_hdq_init();
omap_init_sti();
omap_init_sha1_md5();
+ omap_init_sgx();
return 0;
}
diff --git a/arch/arm/mach-omap2/include/mach/omap_sgxdef.h
b/arch/arm/mach-omap2/include/mach/omap_sgxdef.h
new file mode 100644
index 000..195df97
--- /dev/null
+++ b/arch/arm/mach-omap2/include/mach/omap_sgxdef.h
@@ -0,0 +1,11 @@
+#ifndef OMAP_SGXDEF_H
+#define OMAP_SGXDEF_H
+
+#include plat/omap-pm.h
+
+struct sgx_platform_data {
+ void (*set_min_bus_tput)(struct device *dev, u8 agent_id,
+ unsigned long r);
+};
+
+#endif
--
1.5.4.3--
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Re: [PATCH] OMAP3: clock: fix enable bit used for dpll4_m4x2 clock
Hi Ranjith, On Fri, 26 Mar 2010, Ranjith Lohithakshan wrote: The enable bit for dpll4_m4x2 clock should be OMAP3430_PWRDN_DSS1_SHIFT. The code erroneously uses OMAP3430_PWRDN_CAM_SHIFT which is meant for dpll4_m5x2 clock. This came into notice during a recent review of the clock tree. Signed-off-by: Ranjith Lohithakshan ranji...@ti.com Thanks, queued for 2.6.34-rcX. - Paul -- To unsubscribe from this list: send the line unsubscribe linux-omap in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
[PATCH 1/4] OMAP: HWMOD: Adding clockdomain check
From: Thara Gopinath th...@ti.com This patch adds check for presence of clockdomain structure in the API omap_hwmod_get_pwrdm before trying to access the powerdomain structure. This will prevent unnecessary crashing of the system in case of a clock node with out an associated clockdomain. Signed-off-by: Thara Gopinath th...@ti.com Signed-off-by: Paul Walmsley p...@pwsan.com --- arch/arm/mach-omap2/omap_hwmod.c |3 +++ 1 files changed, 3 insertions(+), 0 deletions(-) diff --git a/arch/arm/mach-omap2/omap_hwmod.c b/arch/arm/mach-omap2/omap_hwmod.c index c664947..e436dcb 100644 --- a/arch/arm/mach-omap2/omap_hwmod.c +++ b/arch/arm/mach-omap2/omap_hwmod.c @@ -1511,6 +1511,9 @@ struct powerdomain *omap_hwmod_get_pwrdm(struct omap_hwmod *oh) c = oh-slaves[oh-_mpu_port_index]-_clk; } + if (!c-clkdm) + return NULL; + return c-clkdm-pwrdm.ptr; } -- To unsubscribe from this list: send the line unsubscribe linux-omap in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
[PATCH 0/4] OMAP clock/hwmod fixes for 2.6.34-rc
Hi, here are some OMAP clock and hwmod fix patches that we're planning to send upstream soon; comments welcome. - Paul --- Rajendra Nayak (1): OMAP4: prcm: Use logical OR instead of bitwise OR Ranjith Lohithakshan (1): OMAP3: clock: fix enable bit used for dpll4_m4x2 clock Thara Gopinath (2): OMAP: HWMOD: Adding clockdomain check OMAP: HWMOD: Bug fixes in hwmod structure definitions arch/arm/mach-omap2/clock3xxx_data.c |2 +- arch/arm/mach-omap2/clockdomain.c|6 +++--- arch/arm/mach-omap2/omap_hwmod.c |3 +++ arch/arm/mach-omap2/powerdomain.c|2 +- arch/arm/mach-omap2/prcm.c |4 ++-- arch/arm/plat-omap/include/plat/omap_hwmod.h |2 +- 6 files changed, 11 insertions(+), 8 deletions(-) -- To unsubscribe from this list: send the line unsubscribe linux-omap in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
[PATCH 2/4] OMAP: HWMOD: Bug fixes in hwmod structure definitions
From: Thara Gopinath th...@ti.com
This patch corrects the width of sysc_flags in hwmod sysconfig structure
where the values to be stored to this variable exceed the current
field width.
Signed-off-by: Thara Gopinath th...@ti.com
[p...@pwsan.com: edited to apply; rearranged structure members to pack]
Signed-off-by: Paul Walmsley p...@pwsan.com
---
arch/arm/plat-omap/include/plat/omap_hwmod.h |2 +-
1 files changed, 1 insertions(+), 1 deletions(-)
diff --git a/arch/arm/plat-omap/include/plat/omap_hwmod.h
b/arch/arm/plat-omap/include/plat/omap_hwmod.h
index 440b416..36d6ea5 100644
--- a/arch/arm/plat-omap/include/plat/omap_hwmod.h
+++ b/arch/arm/plat-omap/include/plat/omap_hwmod.h
@@ -294,8 +294,8 @@ struct omap_hwmod_class_sysconfig {
u16 rev_offs;
u16 sysc_offs;
u16 syss_offs;
+ u16 sysc_flags;
u8 idlemodes;
- u8 sysc_flags;
u8 clockact;
struct omap_hwmod_sysc_fields *sysc_fields;
};
--
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[PATCH 3/4] OMAP4: prcm: Use logical OR instead of bitwise OR
From: Rajendra Nayak rna...@ti.com
This patch fixes usage of bitwise OR in if conditions, and instead
uses logical OR.
Signed-off-by: Rajendra Nayak rna...@ti.com
Cc: Abhijit Pagare abhijitpag...@ti.com
Cc: Tony Lindgren t...@atomide.com
Signed-off-by: Paul Walmsley p...@pwsan.com
---
arch/arm/mach-omap2/clockdomain.c |6 +++---
arch/arm/mach-omap2/powerdomain.c |2 +-
arch/arm/mach-omap2/prcm.c|4 ++--
3 files changed, 6 insertions(+), 6 deletions(-)
diff --git a/arch/arm/mach-omap2/clockdomain.c
b/arch/arm/mach-omap2/clockdomain.c
index b87ad66..6e568ec 100644
--- a/arch/arm/mach-omap2/clockdomain.c
+++ b/arch/arm/mach-omap2/clockdomain.c
@@ -240,7 +240,7 @@ static void _omap2_clkdm_set_hwsup(struct clockdomain
*clkdm, int enable)
bits = OMAP24XX_CLKSTCTRL_ENABLE_AUTO;
else
bits = OMAP24XX_CLKSTCTRL_DISABLE_AUTO;
- } else if (cpu_is_omap34xx() | cpu_is_omap44xx()) {
+ } else if (cpu_is_omap34xx() || cpu_is_omap44xx()) {
if (enable)
bits = OMAP34XX_CLKSTCTRL_ENABLE_AUTO;
else
@@ -812,7 +812,7 @@ int omap2_clkdm_sleep(struct clockdomain *clkdm)
cm_set_mod_reg_bits(OMAP24XX_FORCESTATE,
clkdm-pwrdm.ptr-prcm_offs, OMAP2_PM_PWSTCTRL);
- } else if (cpu_is_omap34xx() | cpu_is_omap44xx()) {
+ } else if (cpu_is_omap34xx() || cpu_is_omap44xx()) {
u32 bits = (OMAP34XX_CLKSTCTRL_FORCE_SLEEP
__ffs(clkdm-clktrctrl_mask));
@@ -856,7 +856,7 @@ int omap2_clkdm_wakeup(struct clockdomain *clkdm)
cm_clear_mod_reg_bits(OMAP24XX_FORCESTATE,
clkdm-pwrdm.ptr-prcm_offs, OMAP2_PM_PWSTCTRL);
- } else if (cpu_is_omap34xx() | cpu_is_omap44xx()) {
+ } else if (cpu_is_omap34xx() || cpu_is_omap44xx()) {
u32 bits = (OMAP34XX_CLKSTCTRL_FORCE_WAKEUP
__ffs(clkdm-clktrctrl_mask));
diff --git a/arch/arm/mach-omap2/powerdomain.c
b/arch/arm/mach-omap2/powerdomain.c
index 9a0fb38..ebfce7d 100644
--- a/arch/arm/mach-omap2/powerdomain.c
+++ b/arch/arm/mach-omap2/powerdomain.c
@@ -222,7 +222,7 @@ void pwrdm_init(struct powerdomain **pwrdm_list)
{
struct powerdomain **p = NULL;
- if (cpu_is_omap24xx() | cpu_is_omap34xx()) {
+ if (cpu_is_omap24xx() || cpu_is_omap34xx()) {
pwrstctrl_reg_offs = OMAP2_PM_PWSTCTRL;
pwrstst_reg_offs = OMAP2_PM_PWSTST;
} else if (cpu_is_omap44xx()) {
diff --git a/arch/arm/mach-omap2/prcm.c b/arch/arm/mach-omap2/prcm.c
index 81872aa..fc3fd38 100644
--- a/arch/arm/mach-omap2/prcm.c
+++ b/arch/arm/mach-omap2/prcm.c
@@ -123,7 +123,7 @@ struct omap3_prcm_regs prcm_context;
u32 omap_prcm_get_reset_sources(void)
{
/* XXX This presumably needs modification for 34XX */
- if (cpu_is_omap24xx() | cpu_is_omap34xx())
+ if (cpu_is_omap24xx() || cpu_is_omap34xx())
return prm_read_mod_reg(WKUP_MOD, OMAP2_RM_RSTST) 0x7f;
if (cpu_is_omap44xx())
return prm_read_mod_reg(WKUP_MOD, OMAP4_RM_RSTST) 0x7f;
@@ -157,7 +157,7 @@ void omap_prcm_arch_reset(char mode)
else
WARN_ON(1);
- if (cpu_is_omap24xx() | cpu_is_omap34xx())
+ if (cpu_is_omap24xx() || cpu_is_omap34xx())
prm_set_mod_reg_bits(OMAP_RST_DPLL3, prcm_offs,
OMAP2_RM_RSTCTRL);
if (cpu_is_omap44xx())
--
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[PATCH 4/4] OMAP3: clock: fix enable bit used for dpll4_m4x2 clock
From: Ranjith Lohithakshan ranji...@ti.com
The enable bit for dpll4_m4x2 clock should be OMAP3430_PWRDN_DSS1_SHIFT.
The code erroneously uses OMAP3430_PWRDN_CAM_SHIFT which is meant for
dpll4_m5x2 clock.
This came into notice during a recent review of the clock tree.
Signed-off-by: Ranjith Lohithakshan ranji...@ti.com
Signed-off-by: Paul Walmsley p...@pwsan.com
---
arch/arm/mach-omap2/clock3xxx_data.c |2 +-
1 files changed, 1 insertions(+), 1 deletions(-)
diff --git a/arch/arm/mach-omap2/clock3xxx_data.c
b/arch/arm/mach-omap2/clock3xxx_data.c
index d5153b6..9cba556 100644
--- a/arch/arm/mach-omap2/clock3xxx_data.c
+++ b/arch/arm/mach-omap2/clock3xxx_data.c
@@ -895,7 +895,7 @@ static struct clk dpll4_m4x2_ck = {
.ops= clkops_omap2_dflt_wait,
.parent = dpll4_m4_ck,
.enable_reg = OMAP_CM_REGADDR(PLL_MOD, CM_CLKEN),
- .enable_bit = OMAP3430_PWRDN_CAM_SHIFT,
+ .enable_bit = OMAP3430_PWRDN_DSS1_SHIFT,
.flags = INVERT_ENABLE,
.clkdm_name = dpll4_clkdm,
.recalc = omap3_clkoutx2_recalc,
--
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RE: [PATCH] OMAP: DSS2: GFX FIFO UNDERFLOW issue fixed
-Original Message-
From: Hiremath, Vaibhav
Sent: Monday, March 22, 2010 6:40 PM
To: linux-omap@vger.kernel.org
Cc: tomi.valkei...@nokia.com; Hiremath, Vaibhav
Subject: [PATCH] OMAP: DSS2: GFX FIFO UNDERFLOW issue fixed
From: Vaibhav Hiremath hvaib...@ti.com
In case of 720P with 90/270 degree rotation, the system reports
GFX_FIFO_UNDERFLOW error which usually happens if DSS DMA is not able to
fill
the FIFO as per requirement.
In TRM (section 11.2.6.1.3), where is has been clearly mentioned that,
To improve the performance on 90 degree rotation, split the data access on
write side and not read side.
That means, read should always happen on 0 degree and write should go to
respective rotation view.
[Hiremath, Vaibhav] Tomi,
Any comment on this patch.
Thanks,
Vaibhav
Signed-off-by: Vaibhav Hiremath hvaib...@ti.com
---
drivers/video/omap2/omapfb/omapfb-main.c | 85 +++
--
1 files changed, 56 insertions(+), 29 deletions(-)
diff --git a/drivers/video/omap2/omapfb/omapfb-main.c
b/drivers/video/omap2/omapfb/omapfb-main.c
index 4a76917..fea6b08 100644
--- a/drivers/video/omap2/omapfb/omapfb-main.c
+++ b/drivers/video/omap2/omapfb/omapfb-main.c
@@ -184,6 +184,11 @@ static unsigned omapfb_get_vrfb_offset(const struct
omapfb_info *ofbi, int rot)
static u32 omapfb_get_region_rot_paddr(const struct omapfb_info *ofbi, int
rot)
{
if (ofbi-rotation_type == OMAP_DSS_ROT_VRFB) {
+ if (rot == FB_ROTATE_CW)
+ rot = FB_ROTATE_CCW;
+ else if (rot == FB_ROTATE_CCW)
+ rot = FB_ROTATE_CW;
+
return ofbi-region.vrfb.paddr[rot]
+ omapfb_get_vrfb_offset(ofbi, rot);
} else {
@@ -191,20 +196,32 @@ static u32 omapfb_get_region_rot_paddr(const struct
omapfb_info *ofbi, int rot)
}
}
-static u32 omapfb_get_region_paddr(const struct omapfb_info *ofbi)
+static u32 omapfb_get_region_paddr(struct omapfb_info *ofbi, int rot)
{
- if (ofbi-rotation_type == OMAP_DSS_ROT_VRFB)
- return ofbi-region.vrfb.paddr[0];
- else
+ if (ofbi-rotation_type == OMAP_DSS_ROT_VRFB) {
+ if (rot == FB_ROTATE_CW)
+ rot = FB_ROTATE_CCW;
+ else if (rot == FB_ROTATE_CCW)
+ rot = FB_ROTATE_CW;
+
+ return ofbi-region.vrfb.paddr[rot];
+ } else {
return ofbi-region.paddr;
+ }
}
-static void __iomem *omapfb_get_region_vaddr(const struct omapfb_info
*ofbi)
+static void __iomem *omapfb_get_region_vaddr(struct omapfb_info *ofbi, int
rot)
{
- if (ofbi-rotation_type == OMAP_DSS_ROT_VRFB)
- return ofbi-region.vrfb.vaddr[0];
- else
+ if (ofbi-rotation_type == OMAP_DSS_ROT_VRFB) {
+ if (rot == FB_ROTATE_CW)
+ rot = FB_ROTATE_CCW;
+ else if (rot == FB_ROTATE_CCW)
+ rot = FB_ROTATE_CW;
+
+ return ofbi-region.vrfb.vaddr[rot];
+ } else {
return ofbi-region.vaddr;
+ }
}
static struct omapfb_colormode omapfb_colormodes[] = {
@@ -503,7 +520,7 @@ static int setup_vrfb_rotation(struct fb_info *fbi)
unsigned bytespp;
bool yuv_mode;
enum omap_color_mode mode;
- int r;
+ int r, rotation = var-rotate;
bool reconf;
if (!rg-size || ofbi-rotation_type != OMAP_DSS_ROT_VRFB)
@@ -511,6 +528,11 @@ static int setup_vrfb_rotation(struct fb_info *fbi)
DBG(setup_vrfb_rotation\n);
+ if (rotation == FB_ROTATE_CW)
+ rotation = FB_ROTATE_CCW;
+ else if (rotation == FB_ROTATE_CCW)
+ rotation = FB_ROTATE_CW;
+
r = fb_mode_to_dss_mode(var, mode);
if (r)
return r;
@@ -534,32 +556,35 @@ static int setup_vrfb_rotation(struct fb_info *fbi)
vrfb-yres != var-yres_virtual)
reconf = true;
- if (vrfb-vaddr[0] reconf) {
+ if (vrfb-vaddr[rotation] reconf) {
fbi-screen_base = NULL;
fix-smem_start = 0;
fix-smem_len = 0;
- iounmap(vrfb-vaddr[0]);
- vrfb-vaddr[0] = NULL;
+ iounmap(vrfb-vaddr[rotation]);
+ vrfb-vaddr[rotation] = NULL;
DBG(setup_vrfb_rotation: reset fb\n);
}
- if (vrfb-vaddr[0])
+ if (vrfb-vaddr[rotation])
return 0;
- omap_vrfb_setup(rg-vrfb, rg-paddr,
- var-xres_virtual,
- var-yres_virtual,
- bytespp, yuv_mode);
+ if (rotation == FB_ROTATE_CW || rotation == FB_ROTATE_CCW)
+ omap_vrfb_setup(rg-vrfb, rg-paddr,
+ var-yres_virtual, var-xres_virtual,
+ bytespp, yuv_mode);
+ else
+ omap_vrfb_setup(rg-vrfb, rg-paddr,
+
RE: [PATCH 1/2] OMAP3EVM: Made backlight GPIO default state to off
-Original Message- From: Hiremath, Vaibhav Sent: Monday, March 22, 2010 6:41 PM To: linux-omap@vger.kernel.org Cc: tomi.valkei...@nokia.com; t...@atomide.com; Hiremath, Vaibhav Subject: [PATCH 1/2] OMAP3EVM: Made backlight GPIO default state to off From: Vaibhav Hiremath hvaib...@ti.com If you choose default output to DVI, the LCD backlight still gets powered, since panel-disable function never gets called for LCD. So, during init put backlight GPIO to off state and the driverr code will decide which output to enable explicitly. [Hiremath, Vaibhav] Tony, Do you see any issues with this patch? I think we can merge this patch series. Thanks, Vaibhav Signed-off-by: Vaibhav Hiremath hvaib...@ti.com --- arch/arm/mach-omap2/board-omap3evm.c |5 - 1 files changed, 4 insertions(+), 1 deletions(-) diff --git a/arch/arm/mach-omap2/board-omap3evm.c b/arch/arm/mach- omap2/board-omap3evm.c index 74bbdcb..f2a52c3 100644 --- a/arch/arm/mach-omap2/board-omap3evm.c +++ b/arch/arm/mach-omap2/board-omap3evm.c @@ -420,7 +420,10 @@ static int omap3evm_twl_gpio_setup(struct device *dev, /* TWL4030_GPIO_MAX + 0 == ledA, LCD Backlight control */ gpio_request(gpio + TWL4030_GPIO_MAX, EN_LCD_BKL); - gpio_direction_output(gpio + TWL4030_GPIO_MAX, 0); + if (get_omap3_evm_rev() = OMAP3EVM_BOARD_GEN_2) + gpio_direction_output(gpio + TWL4030_GPIO_MAX, 1); + else + gpio_direction_output(gpio + TWL4030_GPIO_MAX, 0); /* gpio + 7 == DVI Enable */ gpio_request(gpio + 7, EN_DVI); -- 1.6.2.4 -- To unsubscribe from this list: send the line unsubscribe linux-omap in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
RE: [PATCH] OMAP: LCD LS037V7DW01: Add Backlight driver support
-Original Message-
From: Hiremath, Vaibhav
Sent: Monday, March 22, 2010 6:42 PM
To: linux-omap@vger.kernel.org
Cc: tomi.valkei...@nokia.com; Hiremath, Vaibhav
Subject: [PATCH] OMAP: LCD LS037V7DW01: Add Backlight driver support
From: Vaibhav Hiremath hvaib...@ti.com
Tested on OMAP3EVM for OMAP3530 and AM/DM 3730.
[Hiremath, Vaibhav] Tomi,
This patch is also pending, can you please review the same and provide your
comments (if any) or merge it to your tree.
Thanks,
Vaibhav
Signed-off-by: Vaibhav Hiremath hvaib...@ti.com
---
arch/arm/mach-omap2/board-omap3evm.c | 32
.../video/omap2/displays/panel-sharp-ls037v7dw01.c | 75
2 files changed, 107 insertions(+), 0 deletions(-)
diff --git a/arch/arm/mach-omap2/board-omap3evm.c b/arch/arm/mach-
omap2/board-omap3evm.c
index f2a52c3..ad74340 100644
--- a/arch/arm/mach-omap2/board-omap3evm.c
+++ b/arch/arm/mach-omap2/board-omap3evm.c
@@ -253,6 +253,36 @@ static void omap3_evm_disable_lcd(struct
omap_dss_device *dssdev)
lcd_enabled = 0;
}
+/*
+ * PWMA/B register offsets (TWL4030_MODULE_PWMA)
+ */
+#define TWL_LED_EN 0x0
+#define TWL_LED_PWMON0x0
+#define TWL_LED_PWMOFF 0x1
+
+static void omap3evm_set_bl_intensity(struct omap_dss_device *dssdev, int
level)
+{
+ unsigned char c;
+
+ if (level 100)
+ return;
+ /*
+ * Enable LEDA for backlight
+ */
+ twl_i2c_write_u8(TWL4030_MODULE_LED, 0x11, TWL_LED_EN);
+
+ c = ((125 * (100 - level)) / 100);
+ if (get_omap3_evm_rev() = OMAP3EVM_BOARD_GEN_2) {
+ c += 1;
+ twl_i2c_write_u8(TWL4030_MODULE_PWMA, 0x7F, TWL_LED_PWMOFF);
+ twl_i2c_write_u8(TWL4030_MODULE_PWMA, c, TWL_LED_PWMON);
+ } else {
+ c += 2;
+ twl_i2c_write_u8(TWL4030_MODULE_PWMA, 0x1, TWL_LED_PWMON);
+ twl_i2c_write_u8(TWL4030_MODULE_PWMA, c, TWL_LED_PWMOFF);
+ }
+}
+
static struct omap_dss_device omap3_evm_lcd_device = {
.name = lcd,
.driver_name= sharp_ls_panel,
@@ -260,6 +290,8 @@ static struct omap_dss_device omap3_evm_lcd_device = {
.phy.dpi.data_lines = 18,
.platform_enable= omap3_evm_enable_lcd,
.platform_disable = omap3_evm_disable_lcd,
+ .max_backlight_level= 100,
+ .set_backlight = omap3evm_set_bl_intensity,
};
static int omap3_evm_enable_tv(struct omap_dss_device *dssdev)
diff --git a/drivers/video/omap2/displays/panel-sharp-ls037v7dw01.c
b/drivers/video/omap2/displays/panel-sharp-ls037v7dw01.c
index 8d51a5e..d4fcd69 100644
--- a/drivers/video/omap2/displays/panel-sharp-ls037v7dw01.c
+++ b/drivers/video/omap2/displays/panel-sharp-ls037v7dw01.c
@@ -20,10 +20,16 @@
#include linux/module.h
#include linux/delay.h
#include linux/device.h
+#include linux/backlight.h
+#include linux/fb.h
#include linux/err.h
#include plat/display.h
+struct sharp_data {
+ struct backlight_device *bl;
+};
+
static struct omap_video_timings sharp_ls_timings = {
.x_res = 480,
.y_res = 640,
@@ -39,18 +45,87 @@ static struct omap_video_timings sharp_ls_timings = {
.vbp= 1,
};
+static int sharp_ls_bl_update_status(struct backlight_device *bl)
+{
+ struct omap_dss_device *dssdev = dev_get_drvdata(bl-dev);
+ int level;
+
+ if (!dssdev-set_backlight)
+ return -EINVAL;
+
+ if (bl-props.fb_blank == FB_BLANK_UNBLANK
+ bl-props.power == FB_BLANK_UNBLANK)
+ level = bl-props.brightness;
+ else
+ level = 0;
+
+ return dssdev-set_backlight(dssdev, level);
+}
+
+static int sharp_ls_bl_get_brightness(struct backlight_device *bl)
+{
+ if (bl-props.fb_blank == FB_BLANK_UNBLANK
+ bl-props.power == FB_BLANK_UNBLANK)
+ return bl-props.brightness;
+
+ return 0;
+}
+
+static const struct backlight_ops sharp_ls_bl_ops = {
+ .get_brightness = sharp_ls_bl_get_brightness,
+ .update_status = sharp_ls_bl_update_status,
+};
+
+
+
static int sharp_ls_panel_probe(struct omap_dss_device *dssdev)
{
+ struct backlight_device *bl;
+ struct sharp_data *sd;
+ int r;
+
dssdev-panel.config = OMAP_DSS_LCD_TFT | OMAP_DSS_LCD_IVS |
OMAP_DSS_LCD_IHS;
dssdev-panel.acb = 0x28;
dssdev-panel.timings = sharp_ls_timings;
+ sd = kzalloc(sizeof(*sd), GFP_KERNEL);
+ if (!sd)
+ return -ENOMEM;
+
+ dev_set_drvdata(dssdev-dev, sd);
+
+ bl = backlight_device_register(sharp-ls, dssdev-dev, dssdev,
+ sharp_ls_bl_ops);
+ if (IS_ERR(bl)) {
+ r = PTR_ERR(bl);
+ kfree(sd);
+ return r;
+ }
+ sd-bl = bl;
+
+ bl-props.fb_blank = FB_BLANK_UNBLANK;
+
Re: [PATCH v3 1/1] Registering sgx device and it's platform data
On Tue, Mar 30, 2010 at 09:06:33AM +0200, ext Agarwal, Preshit wrote: diff --git a/arch/arm/mach-omap2/include/mach/omap_sgxdef.h b/arch/arm/mach-omap2/include/mach/omap_sgxdef.h new file mode 100644 index 000..195df97 --- /dev/null +++ b/arch/arm/mach-omap2/include/mach/omap_sgxdef.h @@ -0,0 +1,11 @@ you're missing the gpl header on this file. -- balbi -- To unsubscribe from this list: send the line unsubscribe linux-omap in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
Re: [PATCH v3 1/1] Registering sgx device and it's platform data
Hello Preshit,
a minor comment:
On Tue, 30 Mar 2010, Agarwal, Preshit wrote:
In this patch SGX powervr_device is registered with it's platform
specific data to provide information about setting constraint through
omap_pm_set_min_bus_tput. This patch removes the requirement of
EXPORT_SYMBOL for the same function.
Signed-off-by: Preshit Agarwal preshit.agar...@ti.com
Signed-off-by: Felipe Balbi felipe.ba...@nokia.com
Signed-off-by: Allen Pais allen.p...@ti.com
---
arch/arm/mach-omap2/devices.c | 32
arch/arm/mach-omap2/include/mach/omap_sgxdef.h | 11
2 files changed, 43 insertions(+), 0 deletions(-)
create mode 100644 arch/arm/mach-omap2/include/mach/omap_sgxdef.h
diff --git a/arch/arm/mach-omap2/devices.c b/arch/arm/mach-omap2/devices.c
index 7131d8d..fe76248 100644
--- a/arch/arm/mach-omap2/devices.c
+++ b/arch/arm/mach-omap2/devices.c
@@ -27,6 +27,7 @@
#include mach/gpio.h
#include plat/mmc.h
+#include mach/omap_sgxdef.h
#include mux.h
#if defined(CONFIG_VIDEO_OMAP2) || defined(CONFIG_VIDEO_OMAP2_MODULE)
@@ -773,6 +774,36 @@ static inline void omap_hdq_init(void)
static inline void omap_hdq_init(void) {}
#endif
+#ifdef CONFIG_PM
+static void omap_sgx_pm_constraints(struct device *dev, u8 agent_id,
+ unsigned long r)
I would suggest that you name this function be named something more
specific, such as omap_sgx_set_bus_tput(), since the SGX driver may also
need to set other PM constraints later, such as wakeup latency
constraints.
+{
+ omap_pm_set_min_bus_tput(dev, agent_id, r);
+}
+#else
+static inline void omap_sgx_pm_constraints(struct device *dev, u8 agent_id,
+ unsigned long r)
+{
+}
+#endif
+
+struct sgx_platform_data omap_sgx_data = {
+ .set_min_bus_tput = omap_sgx_pm_constraints,
+};
+
+static struct platform_device powervr_device = {
+ .name = pvrsrvkm,
+ .id = -1,
+ .dev= {
+ .platform_data = omap_sgx_data,
+ },
+};
+
+static void omap_init_sgx(void)
+{
+ (void) platform_device_register(powervr_device);
+}
+
/*-*/
static int __init omap2_init_devices(void)
@@ -787,6 +818,7 @@ static int __init omap2_init_devices(void)
omap_hdq_init();
omap_init_sti();
omap_init_sha1_md5();
+ omap_init_sgx();
return 0;
}
diff --git a/arch/arm/mach-omap2/include/mach/omap_sgxdef.h
b/arch/arm/mach-omap2/include/mach/omap_sgxdef.h
new file mode 100644
index 000..195df97
--- /dev/null
+++ b/arch/arm/mach-omap2/include/mach/omap_sgxdef.h
@@ -0,0 +1,11 @@
+#ifndef OMAP_SGXDEF_H
+#define OMAP_SGXDEF_H
+
+#include plat/omap-pm.h
+
+struct sgx_platform_data {
+ void (*set_min_bus_tput)(struct device *dev, u8 agent_id,
+ unsigned long r);
+};
+
+#endif
--
1.5.4.3--
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- Paul
--
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Re: [PATCHV2] OMAP3 PM: Fix for DSP Crash at OPP 1 and 2 under DVFS+SR operation
On Thu, 11 Mar 2010, Vishwanath BS wrote:
From: Shweta Gulati shweta.gul...@ti.com
DSP usage at VDD1 OPP1 and OPP2 with Smartreflex enabled and any MM UCs
running DSP codec was earlier restricted as DSP crashed.
The root cause is wrong DPLL1/DPLL2 Bypass clock at VDD1 OPP1 and OPP2.
The solution is to make sure DPLL1/DPLL2 bypass clock is always less than
maximum supported frequency for the specific OPP
Tested on 3630 ZOOM3.
changes in V2 : Rebased to new OPP implementation
Signed-off-by: Shweta Gulati shweta.gul...@ti.com
Signed-off-by: Vishwanath BS vishwanath...@ti.com
---
arch/arm/mach-omap2/cm-regbits-34xx.h |4 ++--
arch/arm/mach-omap2/pm34xx.c | 23 +++
arch/arm/mach-omap2/resource34xx.c| 28 +++-
3 files changed, 52 insertions(+), 3 deletions(-)
diff --git a/arch/arm/mach-omap2/cm-regbits-34xx.h
b/arch/arm/mach-omap2/cm-regbits-34xx.h
index a3a3ca0..ee420ab 100644
--- a/arch/arm/mach-omap2/cm-regbits-34xx.h
+++ b/arch/arm/mach-omap2/cm-regbits-34xx.h
@@ -81,7 +81,7 @@
/* CM_CLKSEL1_PLL_IVA2 */
#define OMAP3430_IVA2_CLK_SRC_SHIFT 19
-#define OMAP3430_IVA2_CLK_SRC_MASK (0x3 19)
+#define OMAP3430_IVA2_CLK_SRC_MASK (0x7 19)
This is an ES2+ only setting, so please change the original value to
OMAP3430ES1_IVA2_CLK_SRC_MASK and add a new macro here for
OMAP3430ES2_IVA2_CLK_SRC_MASK.
#define OMAP3430_IVA2_DPLL_MULT_SHIFT8
#define OMAP3430_IVA2_DPLL_MULT_MASK (0x7ff 8)
#define OMAP3430_IVA2_DPLL_DIV_SHIFT 0
@@ -126,7 +126,7 @@
/* CM_CLKSEL1_PLL_MPU */
#define OMAP3430_MPU_CLK_SRC_SHIFT 19
-#define OMAP3430_MPU_CLK_SRC_MASK(0x3 19)
+#define OMAP3430_MPU_CLK_SRC_MASK(0x7 19)
Presumably this is the same.
#define OMAP3430_MPU_DPLL_MULT_SHIFT 8
#define OMAP3430_MPU_DPLL_MULT_MASK (0x7ff 8)
#define OMAP3430_MPU_DPLL_DIV_SHIFT 0
diff --git a/arch/arm/mach-omap2/pm34xx.c b/arch/arm/mach-omap2/pm34xx.c
index b51b461..494e5e6
--- a/arch/arm/mach-omap2/pm34xx.c
+++ b/arch/arm/mach-omap2/pm34xx.c
@@ -828,6 +828,29 @@ static void __init omap3_d2d_idle(void)
static void __init prcm_setup_regs(void)
{
+ u32 cm_clksel1_mpu, cm_clksel1_iva2;
+
+ /*set Bypass clock dividers for MPU and IVA */
+ cm_clksel1_mpu = cm_read_mod_reg(MPU_MOD, CM_CLKSEL1);
+ cm_clksel1_iva2 = cm_read_mod_reg(OMAP3430_IVA2_MOD, CM_CLKSEL1);
+ if (cpu_is_omap3630()) {
+ cm_clksel1_iva2 = (cm_clksel1_iva2
+ ~(OMAP3430_IVA2_CLK_SRC_MASK)) |
+ (0x2 OMAP3430_IVA2_CLK_SRC_SHIFT);
+ cm_clksel1_mpu = (cm_clksel1_mpu
+ ~(OMAP3430_MPU_CLK_SRC_MASK)) |
+ (0x1 OMAP3430_MPU_CLK_SRC_SHIFT);
+ } else if (cpu_is_omap34xx()) {
+ cm_clksel1_iva2 = (cm_clksel1_iva2
+ ~(OMAP3430_IVA2_CLK_SRC_MASK)) |
+ (0x4 OMAP3430_IVA2_CLK_SRC_SHIFT);
+ cm_clksel1_mpu = (cm_clksel1_mpu
+ ~(OMAP3430_MPU_CLK_SRC_MASK)) |
+ (0x2 OMAP3430_MPU_CLK_SRC_SHIFT);
+ }
+ cm_write_mod_reg(cm_clksel1_iva2, OMAP3430_IVA2_MOD, CM_CLKSEL1);
This should use the clock framework. You should use clk_set_rate() on
dpll2_fck.
+ cm_write_mod_reg(cm_clksel1_mpu, MPU_MOD, CM_CLKSEL1);
This should use the clock framework. You should use clk_set_rate() on
dpll1_fck.
+
/* XXX Reset all wkdeps. This should be done when initializing
* powerdomains */
prm_write_mod_reg(0, OMAP3430_IVA2_MOD, PM_WKDEP);
diff --git a/arch/arm/mach-omap2/resource34xx.c
b/arch/arm/mach-omap2/resource34xx.c
index c6cce8b..03d7fce
--- a/arch/arm/mach-omap2/resource34xx.c
+++ b/arch/arm/mach-omap2/resource34xx.c
@@ -276,12 +276,13 @@ static unsigned long compute_lpj(unsigned long ref,
u_int div, u_int mult)
static int program_opp_freq(int res, int target_level, int current_level)
{
- int ret = 0, l3_div;
+ int ret = 0, l3_div, mpu_div, iva2_div;
int *curr_opp;
unsigned long mpu_freq, dsp_freq, l3_freq;
#ifndef CONFIG_CPU_FREQ
unsigned long mpu_cur_freq;
#endif
+ u32 cm_clksel1_mpu, cm_clksel1_iva2, max_core_clk;
/* Check if I can actually switch or not */
if (res == VDD1_OPP) {
@@ -299,6 +300,31 @@ static int program_opp_freq(int res, int target_level,
int current_level)
lock_scratchpad_sem();
if (res == VDD1_OPP) {
+ /* adjust bypass clock diviers */
+ max_core_clk = ULONG_MAX;
+ opp_find_freq_floor(OPP_L3,
RE: [PATCHV2] OMAP3 PM: Fix for DSP Crash at OPP 1 and 2 under DVFS+SR operation
On Mon, 29 Mar 2010, Sripathy, Vishwanath wrote: -Original Message- From: Kevin Hilman [mailto:khil...@deeprootsystems.com] Please add this support by modifying/extending the existing clock/DPLL management code instead of manually writing registers. Min/max dividers in clock framework are for dpll lock frequency, where as in the patch, we configure dpll bypass frequency. Shall I add a new API in dpll.c to configure bypass clock dividers? That API is called clk_set_rate() and is already present as you can see by grep'ping clock3xxx_data.c for OMAP3430_MPU_CLK_SRC_MASK (as one example). - Paul -- To unsubscribe from this list: send the line unsubscribe linux-omap in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
Re: [PATCHv2 1/2] crypto: updates omap sham device related platform code
Hi Dmitry,
a few comments:
On Thu, 25 Mar 2010, Dmitry Kasatkin wrote:
- registration
- clocks
Signed-off-by: Dmitry Kasatkin dmitry.kasat...@nokia.com
---
arch/arm/mach-omap2/clock2420_data.c |2 +-
arch/arm/mach-omap2/clock2430_data.c |2 +-
arch/arm/mach-omap2/clock3xxx_data.c |2 +-
arch/arm/mach-omap2/devices.c | 26 --
arch/arm/plat-omap/include/plat/omap34xx.h |5 +
5 files changed, 32 insertions(+), 5 deletions(-)
diff --git a/arch/arm/mach-omap2/clock2420_data.c
b/arch/arm/mach-omap2/clock2420_data.c
index d932b14..1820a55 100644
--- a/arch/arm/mach-omap2/clock2420_data.c
+++ b/arch/arm/mach-omap2/clock2420_data.c
@@ -1836,7 +1836,7 @@ static struct omap_clk omap2420_clks[] = {
CLK(NULL, vlynq_ick,vlynq_ick, CK_242X),
CLK(NULL, vlynq_fck,vlynq_fck, CK_242X),
CLK(NULL, des_ick, des_ick, CK_242X),
- CLK(NULL, sha_ick, sha_ick, CK_242X),
+ CLK(omap-sham,ick, sha_ick, CK_242X),
CLK(omap_rng, ick, rng_ick, CK_242X),
CLK(NULL, aes_ick, aes_ick, CK_242X),
CLK(NULL, pka_ick, pka_ick, CK_242X),
diff --git a/arch/arm/mach-omap2/clock2430_data.c
b/arch/arm/mach-omap2/clock2430_data.c
index 0438b6e..5884ac6 100644
--- a/arch/arm/mach-omap2/clock2430_data.c
+++ b/arch/arm/mach-omap2/clock2430_data.c
@@ -1924,7 +1924,7 @@ static struct omap_clk omap2430_clks[] = {
CLK(NULL, sdma_ick, sdma_ick, CK_243X),
CLK(NULL, sdrc_ick, sdrc_ick, CK_243X),
CLK(NULL, des_ick, des_ick, CK_243X),
- CLK(NULL, sha_ick, sha_ick, CK_243X),
+ CLK(omap-sham,ick, sha_ick, CK_243X),
CLK(omap_rng, ick, rng_ick, CK_243X),
CLK(NULL, aes_ick, aes_ick, CK_243X),
CLK(NULL, pka_ick, pka_ick, CK_243X),
diff --git a/arch/arm/mach-omap2/clock3xxx_data.c
b/arch/arm/mach-omap2/clock3xxx_data.c
index d5153b6..5a974dc 100644
--- a/arch/arm/mach-omap2/clock3xxx_data.c
+++ b/arch/arm/mach-omap2/clock3xxx_data.c
@@ -3360,7 +3360,7 @@ static struct omap_clk omap3xxx_clks[] = {
CLK(mmci-omap-hs.2, ick, mmchs3_ick,CK_3430ES2 | CK_AM35XX),
CLK(NULL, icr_ick, icr_ick, CK_343X),
CLK(NULL, aes2_ick, aes2_ick, CK_343X),
- CLK(NULL, sha12_ick,sha12_ick, CK_343X),
+ CLK(omap-sham,ick, sha12_ick, CK_343X),
CLK(NULL, des2_ick, des2_ick, CK_343X),
CLK(mmci-omap-hs.1, ick, mmchs2_ick,CK_3XXX),
CLK(mmci-omap-hs.0, ick, mmchs1_ick,CK_3XXX),
The above changes are all
Acked-by: Paul Walmsley p...@pwsan.com
... but ...
diff --git a/arch/arm/mach-omap2/devices.c b/arch/arm/mach-omap2/devices.c
index 23e4d77..3e20b9c 100644
--- a/arch/arm/mach-omap2/devices.c
+++ b/arch/arm/mach-omap2/devices.c
@@ -26,6 +26,7 @@
#include plat/mux.h
#include mach/gpio.h
#include plat/mmc.h
+#include plat/dma.h
#include mux.h
@@ -453,7 +454,9 @@ static void omap_init_mcspi(void)
static inline void omap_init_mcspi(void) {}
#endif
-#ifdef CONFIG_OMAP_SHA1_MD5
+#if defined(CONFIG_CRYPTO_DEV_OMAP_SHAM) ||
defined(CONFIG_CRYPTO_DEV_OMAP_SHAM_MODULE)
+
+#ifdef CONFIG_ARCH_OMAP2
static struct resource sha1_md5_resources[] = {
{
.start = OMAP24XX_SEC_SHA1MD5_BASE,
@@ -465,9 +468,28 @@ static struct resource sha1_md5_resources[] = {
.flags = IORESOURCE_IRQ,
}
};
+#endif
+
+#ifdef CONFIG_ARCH_OMAP3
+static struct resource sha1_md5_resources[] = {
+ {
+ .start = OMAP34XX_SEC_SHA1MD5_BASE,
+ .end= OMAP34XX_SEC_SHA1MD5_BASE + 0x64,
+ .flags = IORESOURCE_MEM,
+ },
+ {
+ .start = INT_34XX_SHA1MD52_IRQ,
+ .flags = IORESOURCE_IRQ,
+ },
+ {
+ .start = OMAP34XX_DMA_SHA1MD5_RX,
+ .flags = IORESOURCE_DMA,
+ }
+};
+#endif
The above will break multi-OMAP2 kernels. Please change the above to make
the variable names unique on a per-SoC basis (e.g.,
omap3_sha1_md5_resources) and modify the SHA1/MD5 device registration code
to use the appropriate struct resource array at runtime. For an example,
see mach-omap2/devices.c:omap_init_mbox().
static struct platform_device sha1_md5_device = {
- .name = OMAP SHA1/MD5,
+ .name = omap-sham,
.id = -1,
.num_resources = ARRAY_SIZE(sha1_md5_resources),
.resource = sha1_md5_resources,
diff --git a/arch/arm/plat-omap/include/plat/omap34xx.h
b/arch/arm/plat-omap/include/plat/omap34xx.h
index 2845fdc..98fc8b4 100644
--- a/arch/arm/plat-omap/include/plat/omap34xx.h
RE: [PATCHV2] OMAP3 PM: Fix for DSP Crash at OPP 1 and 2 under DVFS+SR operation
-Original Message- From: Paul Walmsley [mailto:p...@pwsan.com] Sent: Tuesday, March 30, 2010 3:01 PM To: Sripathy, Vishwanath Cc: Kevin Hilman; linux-omap@vger.kernel.org; Gulati, Shweta Subject: RE: [PATCHV2] OMAP3 PM: Fix for DSP Crash at OPP 1 and 2 under DVFS+SR operation On Mon, 29 Mar 2010, Sripathy, Vishwanath wrote: -Original Message- From: Kevin Hilman [mailto:khil...@deeprootsystems.com] Please add this support by modifying/extending the existing clock/DPLL management code instead of manually writing registers. Min/max dividers in clock framework are for dpll lock frequency, where as in the patch, we configure dpll bypass frequency. Shall I add a new API in dpll.c to configure bypass clock dividers? That API is called clk_set_rate() and is already present as you can see by grep'ping clock3xxx_data.c for OMAP3430_MPU_CLK_SRC_MASK (as one example). Thanks, I will repost the patch. - Paul -- To unsubscribe from this list: send the line unsubscribe linux-omap in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
Re: [PATCH v3 1/1] Registering sgx device and it's platform data
Hi, On Tue, Mar 30, 2010 at 10:49:19AM +0200, ext Paul Walmsley wrote: I would suggest that you name this function be named something more specific, such as omap_sgx_set_bus_tput(), since the SGX driver may also need to set other PM constraints later, such as wakeup latency constraints. then it could just add the contraints to the same function instead of passing another pointer to driver ?? -- balbi -- To unsubscribe from this list: send the line unsubscribe linux-omap in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
Re: [RFC][PATCH v2 4/5] input: serio: add support for Amstrad Delta serial keyboard port
Tuesday 30 March 2010 08:56:19 Dmitry Torokhov wrote:
On Mon, Mar 29, 2010 at 04:30:41PM +0200, Janusz Krzysztofik wrote:
The patch introduces a serio driver that supports a keyboard serial port
found on the Amstrad Delta videophone board.
[snip]
+#define MAX_SCANCODE 0x84
Not needed anymore?
[snip]
+ printk(KERN_WARNING
+ Invalid stop bit in AMS keyboard
+data=0x%X\r\n, data);
Consider switching top dev_err(), dev_warning(), etc. Also do not split
text strings, even if you run over 80 column limit. BTW, why \r\n in
the message?
[snip]
+ serio = kmalloc(sizeof(struct serio), GFP_KERNEL);
kzalloc() please.
[snip]
+ snprintf(serio-phys, sizeof(serio-phys), %s/serio0, GPIO);
strlcpy(serio-phys, GPIO/serio0, sizeof(serio-phys)); ?
[snip]
+ if (gpio_request(AMS_DELTA_GPIO_PIN_KEYBRD_DATA, kbd-data)) {
+ printk(KERN_ERR Couldn't request gpio pin for keyboard data);
+ err = -EINVAL;
Why do you mangle return value of gpio_request()? Just return what it
reported. Same goes for request_irq() below.
[snip]
+ /* enable keyboard */
+ ams_delta_latch2_write(AMD_DELTA_LATCH2_KEYBRD_PWR,
+ AMD_DELTA_LATCH2_KEYBRD_PWR);
This shoukd probably go into open() method of the serio port.
[snip]
+ /* disable keyboard */
+ ams_delta_latch2_write(AMD_DELTA_LATCH2_KEYBRD_PWR, 0);
And this into close().
Hi Dmitry,
Thanks for your review time. I agree with all your comments and will address
them in next version.
Regards,
Janusz
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[PATCH]omap hsmmc: fix incorrect capability reporting
MMC slots that support 8 bit mode also support 4 bit mode. The capability flag has to reflect this, otherwise SDHC cards operate in 1 bit mode. Signed-off-by: Kishore Kadiyala kishore.kadiy...@ti.com Signed-off-by: Venkatraman S svenk...@ti.com --- drivers/mmc/host/omap_hsmmc.c |2 +- 1 files changed, 1 insertions(+), 1 deletions(-) diff --git a/drivers/mmc/host/omap_hsmmc.c b/drivers/mmc/host/omap_hsmmc.c index 83f0aff..dbf83a6 100644 --- a/drivers/mmc/host/omap_hsmmc.c +++ b/drivers/mmc/host/omap_hsmmc.c @@ -2093,7 +2093,7 @@ static int __init omap_hsmmc_probe(struct platform_device *pdev) if (mmc_slot(host).wires = 8) mmc-caps |= MMC_CAP_8_BIT_DATA; - else if (mmc_slot(host).wires = 4) + if (mmc_slot(host).wires = 4) mmc-caps |= MMC_CAP_4_BIT_DATA; if (mmc_slot(host).nonremovable) -- 1.6.3.3 -- To unsubscribe from this list: send the line unsubscribe linux-omap in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
Re: [E3-hacking] [RFC][PATCH v2 1/5] omap1: Amstrad Delta: add FIQ handler for serial keyboard port interrupt processing
Monday 29 March 2010 20:32:11 Ralph Corderoy wrote: Hi Janusz, My ARM's not used much these days so I don't know how much this matters and may be incorrect so I've cut down the CC list, but given it's a FIQ handler and speed matters... Hi Ralph, Not only speed; there is a very low size limit for FIQ handler and I already have had problems with fitting into the available space with the code, so your hints are really appreciated. And thanks for pushing me into reading the ARM Assembly Language book, so I would be able to do more than just understanding and copy-pasting the code ;). +key: @Is it a keyboard interrupt? + ldr r11, [r12,#GPIO_INTERRUPT_STATUS] @ get GPIO interrupt status + and r10, r11, #MBRD_CLK_MASK@ reveal keyboard bit + cmp r10, #MBRD_CLK_MASK @ is keyboard bit low? + bne mdm @ no - spurious - try mdm Couldn't that be an `ands' instruction if MBRD_CLK_MASK has one-bit set? Then the cmp could be deleted. Agree. +state: + ldr r10, [r9,#FIQ_STATE] + cmp r10, #0 @ are we expecting start bit? + bne data@ no - in data processing state Similarly, an `ldrs' here would make the cmp redundant. I'm not sure if the S suffix is also valid for memory transfer instructions, so I readd linux-omap and linux-arm-kernel to the CC list. There's other similar bits elsewhere. Yes, I'll try to recognize and optimize them all for next version. Thanks, Janusz -- To unsubscribe from this list: send the line unsubscribe linux-omap in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
RE: [PATCH]omap hsmmc: fix incorrect capability reporting
-Original Message- From: svenk...@gmail.com [mailto:svenk...@gmail.com] On Behalf Of Venkatraman S Sent: Tuesday, March 30, 2010 9:37 AM To: linux-...@vger.kernel.org; linux-omap@vger.kernel.org; kishore.kadiy...@ti.com Cc: Madhusudhan Chikkature Subject: [PATCH]omap hsmmc: fix incorrect capability reporting MMC slots that support 8 bit mode also support 4 bit mode. The capability flag has to reflect this, otherwise SDHC cards operate in 1 bit mode. Signed-off-by: Kishore Kadiyala kishore.kadiy...@ti.com Signed-off-by: Venkatraman S svenk...@ti.com --- drivers/mmc/host/omap_hsmmc.c |2 +- 1 files changed, 1 insertions(+), 1 deletions(-) diff --git a/drivers/mmc/host/omap_hsmmc.c b/drivers/mmc/host/omap_hsmmc.c index 83f0aff..dbf83a6 100644 --- a/drivers/mmc/host/omap_hsmmc.c +++ b/drivers/mmc/host/omap_hsmmc.c @@ -2093,7 +2093,7 @@ static int __init omap_hsmmc_probe(struct platform_device *pdev) if (mmc_slot(host).wires = 8) mmc-caps |= MMC_CAP_8_BIT_DATA; - else if (mmc_slot(host).wires = 4) + if (mmc_slot(host).wires = 4) mmc-caps |= MMC_CAP_4_BIT_DATA; Since 8-bit is the max how about: if (mmc_slot(host).wires == 8) mmc-caps |= MMC_CAP_8_BIT_DATA | MMC_CAP_4_BIT_DATA; if (mmc_slot(host).wires == 4) mmc-caps |= MMC_CAP_4_BIT_DATA; This would be little easy to read the code. Regards, Madhu if (mmc_slot(host).nonremovable) -- 1.6.3.3 -- To unsubscribe from this list: send the line unsubscribe linux-omap in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
Where did the twl4030 battery charging code go?
I'm looking in linux-2.6.33-rc3 to turn on the battery backup charger to get the RTC working on a Logic SOM, and I don't see drivers/mfd/twl4030_bci_battery.c anymore. Digging through Tony's trees I find it was removed way back at:: http://git.kernel.org/?p=linux/kernel/git/tmlind/linux-omap-2.6.git;a=commitdiff;h=b122a4b8a18ebbb0b5de90baeb54650a53cd9d7d Did this code resurface anywhere in the new kernels? -- To unsubscribe from this list: send the line unsubscribe linux-omap in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
Re: [PATCH] DSPBRIDGE:Fix sparse warnings
Please ignore this patch.
Regards,
Deepak
Chitriki Rudramuni, Deepak wrote:
This patch fixes sparse warning cast removes address space of expression
in drivers/dsp/bridge/wmd/tiomap_io.c
Signed-off-by: Deepak Chitriki deepak.chitr...@ti.com
---
drivers/dsp/bridge/wmd/tiomap_io.c | 10 +-
1 files changed, 5 insertions(+), 5 deletions(-)
diff --git a/drivers/dsp/bridge/wmd/tiomap_io.c
b/drivers/dsp/bridge/wmd/tiomap_io.c
index b5504a9..cc20f65 100644
--- a/drivers/dsp/bridge/wmd/tiomap_io.c
+++ b/drivers/dsp/bridge/wmd/tiomap_io.c
@@ -431,22 +431,22 @@ dsp_status sm_interrupt_dsp(struct wmd_dev_context
*dev_context, u16 mb_val)
* 2:0 AUTO_IVA2_DPLL - Enabling IVA2 DPLL auto control
* in CM_AUTOIDLE_PLL_IVA2 register
*/
- *(reg_uword32 *) (resources.dw_cm_base + 0x34) = 0x1;
+ *(reg_uword32 *) ((u32)(resources.dw_cm_base) + 0x34) = 0x1;
/*
* 7:4 IVA2_DPLL_FREQSEL - IVA2 internal frq set to
* 0.75 MHz - 1.0 MHz
* 2:0 EN_IVA2_DPLL - Enable IVA2 DPLL in lock mode
*/
- temp = *(reg_uword32 *) (resources.dw_cm_base + 0x4);
+ temp = *(reg_uword32 *) ((u32)(resources.dw_cm_base) + 0x4);
temp = (temp 0xFF08) | 0x37;
- *(reg_uword32 *) (resources.dw_cm_base + 0x4) = temp;
+ *(reg_uword32 *) ((u32)(resources.dw_cm_base) + 0x4) = temp;
/* Restore mailbox settings */
omap_mbox_restore_ctx(dev_context-mbox);
/* Access MMU SYS CONFIG register to generate a short wakeup */
- temp = *(reg_uword32 *) (resources.dw_dmmu_base + 0x10);
+ temp = *(reg_uword32 *) ((u32)(resources.dw_dmmu_base) + 0x10);
dev_context-dw_brd_state = BRD_RUNNING;
} else if (dev_context-dw_brd_state == BRD_RETENTION) {
@@ -462,4 +462,4 @@ dsp_status sm_interrupt_dsp(struct wmd_dev_context
*dev_context, u16 mb_val)
}
return DSP_SOK;
-}
\ No newline at end of file
+}
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Re: [PATCH]omap hsmmc: fix incorrect capability reporting
Madhusudhan madhu...@ti.com wrote: -Original Message- From: Venkatraman S Sent: Tuesday, March 30, 2010 9:37 AM To: linux-...@vger.kernel.org; linux-omap@vger.kernel.org; kishore.kadiy...@ti.com Cc: Madhusudhan Chikkature Subject: [PATCH]omap hsmmc: fix incorrect capability reporting MMC slots that support 8 bit mode also support 4 bit mode. The capability flag has to reflect this, otherwise SDHC cards operate in 1 bit mode. Signed-off-by: Kishore Kadiyala kishore.kadiy...@ti.com Signed-off-by: Venkatraman S svenk...@ti.com --- drivers/mmc/host/omap_hsmmc.c | 2 +- 1 files changed, 1 insertions(+), 1 deletions(-) diff --git a/drivers/mmc/host/omap_hsmmc.c b/drivers/mmc/host/omap_hsmmc.c index 83f0aff..dbf83a6 100644 --- a/drivers/mmc/host/omap_hsmmc.c +++ b/drivers/mmc/host/omap_hsmmc.c @@ -2093,7 +2093,7 @@ static int __init omap_hsmmc_probe(struct platform_device *pdev) if (mmc_slot(host).wires = 8) mmc-caps |= MMC_CAP_8_BIT_DATA; - else if (mmc_slot(host).wires = 4) + if (mmc_slot(host).wires = 4) mmc-caps |= MMC_CAP_4_BIT_DATA; Since 8-bit is the max how about: if (mmc_slot(host).wires == 8) mmc-caps |= MMC_CAP_8_BIT_DATA | MMC_CAP_4_BIT_DATA; if (mmc_slot(host).wires == 4) mmc-caps |= MMC_CAP_4_BIT_DATA; This would be little easy to read the code. Sure. Works for me. -- To unsubscribe from this list: send the line unsubscribe linux-omap in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
Re: [PATCH]omap hsmmc: fix incorrect capability reporting
S, Venkatraman had written, on 03/30/2010 01:11 PM, the following: [..] diff --git a/drivers/mmc/host/omap_hsmmc.c b/drivers/mmc/host/omap_hsmmc.c index 83f0aff..dbf83a6 100644 --- a/drivers/mmc/host/omap_hsmmc.c +++ b/drivers/mmc/host/omap_hsmmc.c @@ -2093,7 +2093,7 @@ static int __init omap_hsmmc_probe(struct platform_device *pdev) if (mmc_slot(host).wires = 8) mmc-caps |= MMC_CAP_8_BIT_DATA; - else if (mmc_slot(host).wires = 4) + if (mmc_slot(host).wires = 4) mmc-caps |= MMC_CAP_4_BIT_DATA; Since 8-bit is the max how about: if (mmc_slot(host).wires == 8) mmc-caps |= MMC_CAP_8_BIT_DATA | MMC_CAP_4_BIT_DATA; if (mmc_slot(host).wires == 4) mmc-caps |= MMC_CAP_4_BIT_DATA; This would be little easy to read the code. Sure. Works for me. nitpicky comment: might be better off using a switch(mmc_slot(host).wires) statement instead of using == if that is the intention here.. -- Regards, Nishanth Menon -- To unsubscribe from this list: send the line unsubscribe linux-omap in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
Re: [PATCH]omap hsmmc: fix incorrect capability reporting
Nishanth Menon n...@ti.com wrote: S, Venkatraman had written, on 03/30/2010 01:11 PM, the following: [..] diff --git a/drivers/mmc/host/omap_hsmmc.c b/drivers/mmc/host/omap_hsmmc.c index 83f0aff..dbf83a6 100644 --- a/drivers/mmc/host/omap_hsmmc.c +++ b/drivers/mmc/host/omap_hsmmc.c @@ -2093,7 +2093,7 @@ static int __init omap_hsmmc_probe(struct platform_device *pdev) if (mmc_slot(host).wires = 8) mmc-caps |= MMC_CAP_8_BIT_DATA; - else if (mmc_slot(host).wires = 4) + if (mmc_slot(host).wires = 4) mmc-caps |= MMC_CAP_4_BIT_DATA; Since 8-bit is the max how about: if (mmc_slot(host).wires == 8) mmc-caps |= MMC_CAP_8_BIT_DATA | MMC_CAP_4_BIT_DATA; if (mmc_slot(host).wires == 4) mmc-caps |= MMC_CAP_4_BIT_DATA; This would be little easy to read the code. Sure. Works for me. nitpicky comment: might be better off using a switch(mmc_slot(host).wires) statement instead of using == if that is the intention here.. Too verbose for just 2 cases, with the 'case's and 'default's adding nothing to readability. YMMV. Thanks, Venkat. -- To unsubscribe from this list: send the line unsubscribe linux-omap in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
RE: [PATCH] arm: Fix DEBUG_LL for omap zoom2/3
-Original Message- From: linux-omap-ow...@vger.kernel.org [mailto:linux-omap- ow...@vger.kernel.org] On Behalf Of Tony Lindgren Sent: Tuesday, March 23, 2010 10:27 AM To: Pais, Allen Cc: linux-arm-ker...@lists.infradead.org; linux-omap@vger.kernel.org; Pandita, Vikram Subject: Re: [PATCH] arm: Fix DEBUG_LL for omap zoom2/3 * Pais, Allen allen.p...@ti.com [100322 22:42]: With this patch[DEBUG_LL + earlyprintk], I still haven't been able to boot the kernel. Is it working on your side. The commit am using is : a842b5f9ce70e1b738eabb4d719860070180ed1c I think you will also need the 3630 serial fixes series posted recently. I just merged those into omap-fixes-for-linus (and master) branch(es). Maybe give it a try with at commit b3c7740a120c8a7775cb63b4d094466da5c01692 + this patch? Thanks, I'll pull in those fixes. I believe the mux errors are fixed. Have a look at http://dev.omapzoom.org/?p=manju/kernel-omap3- dev.git;a=commit;h=3499f5023ee90dc6ee3868a3147b87fe22a1d9b7 Patch must have been missed some how. OK, we really should get fixes like that to mainline kernel ASAP to avoid duplicating the effort. Then at least one issue remains for zoom3 to be usable.. I'm getting tons of MMC errors trying to mount root on it: mmcblk1: error -110 transferring data, sector 2097024, nr 8, card status 0x900 end_request: I/O error, dev mmcblk1, sector 2097024 ... Any ideas if that's fixed somewhere also? Tony, What is the branch on which the kernel is built? I tried the master branch and the omap-fixes-for-linus both does not seem to boot Zoom3. Regards, Madhu Regards, Tony -- To unsubscribe from this list: send the line unsubscribe linux-omap in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html -- To unsubscribe from this list: send the line unsubscribe linux-omap in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
Re: [E3-hacking] [RFC][PATCH v2 1/5] omap1: Amstrad Delta: add FIQ handler for serial keyboard port interrupt processing
Hi Janusz, And thanks for pushing me into reading the ARM Assembly Language book, so I would be able to do more than just understanding and copy-pasting the code ;). It's a lovely instruction set compared to many others. +state: + ldr r10, [r9,#FIQ_STATE] + cmp r10, #0 @ are we expecting start bit? + bne data@ no - in data processing state Similarly, an `ldrs' here would make the cmp redundant. I'm not sure if the S suffix is also valid for memory transfer instructions No, you're correct. Memory transfers can't do the set ALU flags S-bit. Sorry to mislead. Cheers, Ralph. -- To unsubscribe from this list: send the line unsubscribe linux-omap in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
DSPBRIDGE: Implement WDT3 to notify DSP hangs
From 7349444302a782997d6eba64d46908c0915c12a1 Mon Sep 17 00:00:00 2001
From: Fernando Guzman Lugo x0095...@ti.com
Date: Tue, 30 Mar 2010 21:52:25 -0600
Subject: [PATCH] DSPBRIDGE: Implement WDT3 to notify DSP hangs
This patch implements wdt3 feature to notify wdt3 overflow.
This new feature can be chosen by doing make menuconfig,
default is disabled.
WDT3 is upcount Timer incrementing every functional clock tick
till it reaches programmed timeout value. On reaching timeout
value, if INTerrupt bit for WDT3 is enabled, then an interrupt
is generated to MPU.
After receiving this Interrupt, any client can register within
bridge driver to be notified of this event and prepare for
DSP recovery.
Signed-off-by: Fernando Guzman Lugo x0095...@ti.com
Signed-off-by: Armando Uribe x0095...@ti.com
Signed-off-by: Somashekar Chandrappa somasheka...@ti.com
---
arch/arm/plat-omap/include/dspbridge/_chnl_sm.h |7 +
arch/arm/plat-omap/include/dspbridge/cfgdefs.h |1 -
arch/arm/plat-omap/include/dspbridge/dbdefs.h |3 +
arch/arm/plat-omap/include/dspbridge/wdt.h | 79
arch/arm/plat-omap/include/plat/omap34xx.h |3 +
drivers/dsp/bridge/Kconfig | 17 +++
drivers/dsp/bridge/Makefile |2 +-
drivers/dsp/bridge/rmgr/drv.c |8 --
drivers/dsp/bridge/rmgr/proc.c |8 +-
drivers/dsp/bridge/wmd/io_sm.c |4 +
drivers/dsp/bridge/wmd/tiomap3430.c |7 +
drivers/dsp/bridge/wmd/tiomap3430_pwr.c |7 +
drivers/dsp/bridge/wmd/tiomap_io.c |2 +
drivers/dsp/bridge/wmd/ue_deh.c | 13 ++
drivers/dsp/bridge/wmd/wdt.c| 148 +++
15 files changed, 296 insertions(+), 13 deletions(-)
create mode 100644 arch/arm/plat-omap/include/dspbridge/wdt.h
create mode 100644 drivers/dsp/bridge/wmd/wdt.c
diff --git a/arch/arm/plat-omap/include/dspbridge/_chnl_sm.h
b/arch/arm/plat-omap/include/dspbridge/_chnl_sm.h
index f394ba6..f8bdc93 100644
--- a/arch/arm/plat-omap/include/dspbridge/_chnl_sm.h
+++ b/arch/arm/plat-omap/include/dspbridge/_chnl_sm.h
@@ -99,7 +99,14 @@ struct shm {
struct opp_rqst_struct opp_request;
/* load monitor information structure */
struct load_mon_struct load_mon_info;
+#ifdef CONFIG_BRIDGE_WDT3
+ /* Flag for WDT enable/disable F/I clocks */
+ u32 wdt_setclocks;
+ u32 wdt_overflow; /* WDT overflow time */
+ char dummy[176];/* padding to 256 byte boundary */
+#else
char dummy[184];/* padding to 256 byte boundary */
+#endif
u32 shm_dbg_var[64];/* shared memory debug variables */
};
diff --git a/arch/arm/plat-omap/include/dspbridge/cfgdefs.h
b/arch/arm/plat-omap/include/dspbridge/cfgdefs.h
index bd24611..a71fc7b 100644
--- a/arch/arm/plat-omap/include/dspbridge/cfgdefs.h
+++ b/arch/arm/plat-omap/include/dspbridge/cfgdefs.h
@@ -70,7 +70,6 @@ struct cfg_hostres {
void __iomem *dw_per_base;
u32 dw_per_pm_base;
u32 dw_core_pm_base;
- void __iomem *dw_wd_timer_dsp_base;
void __iomem *dw_dmmu_base;
void __iomem *dw_sys_ctrl_base;
};
diff --git a/arch/arm/plat-omap/include/dspbridge/dbdefs.h
b/arch/arm/plat-omap/include/dspbridge/dbdefs.h
index 7fcc4aa..b5d3097 100644
--- a/arch/arm/plat-omap/include/dspbridge/dbdefs.h
+++ b/arch/arm/plat-omap/include/dspbridge/dbdefs.h
@@ -53,6 +53,7 @@
#define DSP_SYSERROR0x0020
#define DSP_EXCEPTIONABORT 0x0300
#define DSP_PWRERROR0x0080
+#define DSP_WDTOVERFLOW0x0040
/* IVA exception events (IVA MMU fault) */
#define IVA_MMUFAULT0x0040
@@ -124,6 +125,7 @@ typedef u32 dsp_status; /* API return code type
*/
DSP_STREAMIOCOMPLETION | \
DSP_MMUFAULT | \
DSP_SYSERROR | \
+ DSP_WDTOVERFLOW | \
DSP_PWRERROR)) \
!((x) ~(DSP_PROCESSORSTATECHANGE | \
DSP_PROCESSORATTACH | \
@@ -134,6 +136,7 @@ typedef u32 dsp_status; /* API return code type
*/
DSP_STREAMIOCOMPLETION | \
DSP_MMUFAULT | \
DSP_SYSERROR | \
+ DSP_WDTOVERFLOW | \
DSP_PWRERROR
#define IS_VALID_NODE_EVENT(x)(((x) == 0) || \
diff --git a/arch/arm/plat-omap/include/dspbridge/wdt.h
b/arch/arm/plat-omap/include/dspbridge/wdt.h
new file mode 100644
index 000..4c00ba5
--- /dev/null
+++ b/arch/arm/plat-omap/include/dspbridge/wdt.h
@@ -0,0 +1,79 @@
+/*
+ * wdt.h
+ *
+ * DSP-BIOS Bridge driver support functions for TI OMAP
Re: [PATCH]omap hsmmc: fix incorrect capability reporting
please drop this patch , as correct patch is available at https://patchwork.kernel.org/patch/78713/ Regards, Kishore On Wed, Mar 31, 2010 at 12:12 AM, Venkatraman S svenk...@ti.com wrote: Nishanth Menon n...@ti.com wrote: S, Venkatraman had written, on 03/30/2010 01:11 PM, the following: [..] diff --git a/drivers/mmc/host/omap_hsmmc.c b/drivers/mmc/host/omap_hsmmc.c index 83f0aff..dbf83a6 100644 --- a/drivers/mmc/host/omap_hsmmc.c +++ b/drivers/mmc/host/omap_hsmmc.c @@ -2093,7 +2093,7 @@ static int __init omap_hsmmc_probe(struct platform_device *pdev) if (mmc_slot(host).wires = 8) mmc-caps |= MMC_CAP_8_BIT_DATA; - else if (mmc_slot(host).wires = 4) + if (mmc_slot(host).wires = 4) mmc-caps |= MMC_CAP_4_BIT_DATA; Since 8-bit is the max how about: if (mmc_slot(host).wires == 8) mmc-caps |= MMC_CAP_8_BIT_DATA | MMC_CAP_4_BIT_DATA; if (mmc_slot(host).wires == 4) mmc-caps |= MMC_CAP_4_BIT_DATA; This would be little easy to read the code. Sure. Works for me. nitpicky comment: might be better off using a switch(mmc_slot(host).wires) statement instead of using == if that is the intention here.. Too verbose for just 2 cases, with the 'case's and 'default's adding nothing to readability. YMMV. Thanks, Venkat. -- To unsubscribe from this list: send the line unsubscribe linux-omap in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html -- To unsubscribe from this list: send the line unsubscribe linux-omap in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
