Re: [PATCH v2 1/5] OMAP2xxx: hwmod: add I2C hwmods for OMAP2420, 2430
Hi Rajendra, On Fri, 17 Sep 2010, Rajendra Nayak wrote: From: Paul Walmsley p...@pwsan.com Add hwmod structures for I2C controllers on OMAP2420/2430. Looking at this series, patch 3 seems to be missing. Could you please investigate why? regards - Paul -- To unsubscribe from this list: send the line unsubscribe linux-omap in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
Re: [PATCH 3/5] omap3: cm-t3517: add support for usb host.
On Mon, Sep 20, 2010 at 09:46:34AM -0500, Igor Grinberg wrote: On 09/20/10 08:39, Felipe Balbi wrote: On Thu, Sep 16, 2010 at 04:12:06AM -0500, Igor Grinberg wrote: Yes it will, but even if the hub reset gpio is for some reason unavailable, we don't want to disable ehci completely... then you should set the gpio to an invalid number, otherwise you might cause lots of WARN() to appear due to fiddling with unrequested gpio. What gpio should be set to invalid number? the one which fails to be requested. It is a reset gpio for usb _hub_ and it has nothing to do with ehci. Can you please, explain the case when I might cause those WARN()'s? ok, I misunderstood then. Nevermind -- balbi -- To unsubscribe from this list: send the line unsubscribe linux-omap in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
Re: [PATCH v2 1/5] OMAP2xxx: hwmod: add I2C hwmods for OMAP2420, 2430
On Fri, 17 Sep 2010, Rajendra Nayak wrote:
From: Paul Walmsley p...@pwsan.com
Add hwmod structures for I2C controllers on OMAP2420/2430.
Signed-off-by: Paul Walmsley p...@pwsan.com
Signed-off-by: Rajendra Nayak rna...@ti.com
Some items that stick out in this patch that should be fixed:
+static struct omap_hwmod omap2420_i2c1_hwmod = {
+ .name = i2c1,
+ .mpu_irqs = i2c1_mpu_irqs,
+ .mpu_irqs_cnt = ARRAY_SIZE(i2c1_mpu_irqs),
+ .sdma_reqs = i2c1_sdma_reqs,
+ .sdma_reqs_cnt = ARRAY_SIZE(i2c1_sdma_reqs),
+ .main_clk = i2c1_fck,
+ .prcm = {
+ .omap2 = {
+ .prcm_reg_id = 1,
+ .module_bit = OMAP2420_EN_I2C1_SHIFT,
+ .idlest_reg_id = 1,
+ .idlest_idle_bit = OMAP2420_EN_I2C1_SHIFT,
This should be OMAP2420_ST_I2C1_SHIFT, not OMAP2420_EN_I2C1_SHIFT.
Likewise for the other entries.
+static struct omap_hwmod omap2430_i2c1_hwmod = {
+ .name = i2c1,
+ .mpu_irqs = i2c1_mpu_irqs,
+ .mpu_irqs_cnt = ARRAY_SIZE(i2c1_mpu_irqs),
+ .sdma_reqs = i2c1_sdma_reqs,
+ .sdma_reqs_cnt = ARRAY_SIZE(i2c1_sdma_reqs),
+ .main_clk = i2c1_fck,
+ .prcm = {
+ .omap2 = {
+ .prcm_reg_id = 1,
+ .module_bit = OMAP2430_EN_I2CHS1_SHIFT,
+ .idlest_reg_id = 1,
This is wrong - the idlest_reg_id for the 2430 I2CHS blocks is different.
Were these patches tested on 2430?
+ .idlest_idle_bit = OMAP2430_EN_I2CHS1_SHIFT,
+ },
+ },
+ .slaves = omap2430_i2c1_slaves,
+ .slaves_cnt = ARRAY_SIZE(omap2430_i2c1_slaves),
+ .class = i2c_class,
+ .dev_attr = i2c1_dev_attr,
+ .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP2430),
+};
- Paul
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Re: [PATCH v2 1/5] OMAP2xxx: hwmod: add I2C hwmods for OMAP2420, 2430
On Tue, 21 Sep 2010, Paul Walmsley wrote: Hi Rajendra, On Fri, 17 Sep 2010, Rajendra Nayak wrote: From: Paul Walmsley p...@pwsan.com Add hwmod structures for I2C controllers on OMAP2420/2430. Looking at this series, patch 3 seems to be missing. Could you please investigate why? Oops, never mind - I see it now. - Paul -- To unsubscribe from this list: send the line unsubscribe linux-omap in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
Re: [PATCH v2 2/5] OMAP3: hwmod: add I2C hwmods for OMAP3430
On Fri, 17 Sep 2010, Rajendra Nayak wrote:
Add hwmod structures for I2C controllers on OMAP3430.
Also in this patch:
+static struct omap_hwmod omap3xxx_i2c1_hwmod = {
+ .name = i2c1,
+ .mpu_irqs = i2c1_mpu_irqs,
+ .mpu_irqs_cnt = ARRAY_SIZE(i2c1_mpu_irqs),
+ .sdma_reqs = i2c1_sdma_reqs,
+ .sdma_reqs_cnt = ARRAY_SIZE(i2c1_sdma_reqs),
+ .main_clk = i2c1_fck,
+ .prcm = {
+ .omap2 = {
+ .prcm_reg_id = 1,
+ .module_bit = OMAP3430_GRPSEL_I2C1_SHIFT,
+ .idlest_reg_id = 1,
+ .idlest_idle_bit = OMAP3430_GRPSEL_I2C1_SHIFT,
This should be OMAP3430_ST_I2C1_SHIFT; likewise for the rest of the I2C
hwmods.
+ },
+ },
+ .slaves = omap3xxx_i2c1_slaves,
+ .slaves_cnt = ARRAY_SIZE(omap3xxx_i2c1_slaves),
+ .class = i2c_class,
+ .dev_attr = i2c1_dev_attr,
+ .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP3430),
+};
- Paul
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Re: [RFC v.4] omap: hwspinlock: Added hwspinlock driver
On 9/20/2010 7:30 PM, Kevin Hilman wrote:
Ohad Ben-Coheno...@wizery.com writes:
Hi Hari,
On Thu, Aug 12, 2010 at 12:44 AM, Kanigeri, Harih-kanige...@ti.com wrote:
+/* Attempt to acquire a spinlock once */
+int hwspinlock_trylock(struct hwspinlock *handle)
+{
+ int retval = 0;
+
+ if (WARN_ON(handle == NULL))
+ return -EINVAL;
+
+ if (WARN_ON(in_irq()))
+ return -EPERM;
+
+ if (pm_runtime_get(handle-pdev-dev) 0)
+ return -ENODEV;
+
+ /* Attempt to acquire the lock by reading from it */
+ retval = readl(handle-lock_reg);
+
+ if (retval == HWSPINLOCK_BUSY)
+ pm_runtime_put(handle-pdev-dev);
Any reason for using pm_runtime_put instead of pm_runtime_put_sync?
Using pm_runtime_gett_sync pm_runtime_put_sync have been recommended by
Kevin Hilman.
Actually is there a need to call pm_runtime_put_sync for hwspinlock ? Spinlocks
are used by the co-processors and we have to ensure that the device doesn't
enter some low power mode without the knowledge of Co-processor. I don't think
run time PM is needed for hwspinlock.
Just doing pm_runtime_get_sync at probe time for all the spinlock instances
should be good.
It would probably make more sense to call pm_runtime_get_sync during
hwspinlock_request{_specific}, and then call pm_runtime_put during
hwspinlock_free.
This way the runtime PM's usage_count will reflect the number of locks
that are actually used, and if that number drops to (or never go
beyond) zero, it is desirable to have the hwspinlock's clock disabled.
This is also safe since no other core will use the hwspinlock if it
wasn't requested by the MPU beforehand (and if it does, we better know
about it and fix it).
FWIW, I agree with Ohad.
An additional benefit of using runtime PM is that the runtime PM core is
growing some useful debug and statistics features so that userspace
tools (including newer versions of powertop) can present useful stats
about which devices are active and how often etc.
And I agree with both of you.
Just to explain the context to Hari. IP like hwspinlock or mailbox does
not require functional clock to work. Because of that you can use it
without explicit clock enable thanks to the PRCM automatic modes.
So in theory you do not have to enable / idle hwmod for each spinlock
request or even during the probe, and this is what the original patches
from Simon were doing. I asked Simon to add explicit pm_runtime call,
even if useless, because of the reason mentioned by Kevin, but also
because the driver should not assume any automatic mode in the HW. That
IP can be used in other SoC that will not have PRCM at all.
In our case these calls will be mostly NOP, but that's still needed.
Regards,
Benoit
Kevin
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Re: [PATCH v2 3/4] omap4 hsmmc: Register offset handling
Hi Benoit, On Tue, Sep 21, 2010 at 2:26 AM, Cousson, Benoit b-cous...@ti.com wrote: Hi Kishore On 9/18/2010 6:34 PM, Kadiyala, Kishore wrote: The offset handling implementation of omap4 mmc registers which was already present can't be reused once hwmod modifications are done for mmc driver. Since hwmod data file for OMAP4 is an auto generated the base address for MMC will remain same as OMAP3 and thus the offset deviation of registers should be updated in the hsmmc driver. That explanation does not sound very accurate to me. The fact that the hwmods are auto-generated has nothing to do with your offset problem. Agree the change log needs to be updated as said but when coming to implementation this how it is: With current mainline kernel, offset appending is already implemented in mach-omap2/devices.c and works fine [here bases are updated with 0x100 and then passed to driver which has same register offset's as OMAP3]. When hwmod modifications are done to the MMC driver, the base address are picked from omap_hwmod_44xx_data.c and omap_device is build. Coming to the driver it still has the same old register offset's as OMAP3 and there should be a way to add 0x100 some where. The current patch moves the offset appending to the driver file which is updated in mach-omap2/hsmmc.c which will fit for current implementation and even hwmod adaptation. The real cause is due to the update of the IP to support the new PM programming model. Because of that, and to keep a certain level of compatibility, the legacy registers were all shifted by 0x100 and the new one were added from offset 0 to 0x10. Regards, Benoit snip Regards, Kishore -- To unsubscribe from this list: send the line unsubscribe linux-omap in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
RE: [PATCH v2 2/5] OMAP3: hwmod: add I2C hwmods for OMAP3430
-Original Message-
From: Paul Walmsley [mailto:p...@pwsan.com]
Sent: Tuesday, September 21, 2010 12:47 PM
To: Nayak, Rajendra
Cc: linux-omap@vger.kernel.org; Kevin Hilman
Subject: Re: [PATCH v2 2/5] OMAP3: hwmod: add I2C hwmods for OMAP3430
On Fri, 17 Sep 2010, Rajendra Nayak wrote:
Add hwmod structures for I2C controllers on OMAP3430.
Also in this patch:
+static struct omap_hwmod omap3xxx_i2c1_hwmod = {
+ .name = i2c1,
+ .mpu_irqs = i2c1_mpu_irqs,
+ .mpu_irqs_cnt = ARRAY_SIZE(i2c1_mpu_irqs),
+ .sdma_reqs = i2c1_sdma_reqs,
+ .sdma_reqs_cnt = ARRAY_SIZE(i2c1_sdma_reqs),
+ .main_clk = i2c1_fck,
+ .prcm = {
+ .omap2 = {
+ .prcm_reg_id = 1,
+ .module_bit = OMAP3430_GRPSEL_I2C1_SHIFT,
+ .idlest_reg_id = 1,
+ .idlest_idle_bit = OMAP3430_GRPSEL_I2C1_SHIFT,
This should be OMAP3430_ST_I2C1_SHIFT; likewise for the rest of the I2C
hwmods.
Thanks. Will fix this too.
+ },
+ },
+ .slaves = omap3xxx_i2c1_slaves,
+ .slaves_cnt = ARRAY_SIZE(omap3xxx_i2c1_slaves),
+ .class = i2c_class,
+ .dev_attr = i2c1_dev_attr,
+ .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP3430),
+};
- Paul
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RE: [PATCH v2 1/5] OMAP2xxx: hwmod: add I2C hwmods for OMAP2420, 2430
Hi Rajendra,
On Tue, 21 Sep 2010, Nayak, Rajendra wrote:
-Original Message-
From: Paul Walmsley [mailto:p...@pwsan.com]
Sent: Tuesday, September 21, 2010 12:39 PM
To: Nayak, Rajendra
Cc: linux-omap@vger.kernel.org; Kevin Hilman
Subject: Re: [PATCH v2 1/5] OMAP2xxx: hwmod: add I2C hwmods for OMAP2420,
2430
On Fri, 17 Sep 2010, Rajendra Nayak wrote:
From: Paul Walmsley p...@pwsan.com
Add hwmod structures for I2C controllers on OMAP2420/2430.
Signed-off-by: Paul Walmsley p...@pwsan.com
Signed-off-by: Rajendra Nayak rna...@ti.com
+static struct omap_hwmod omap2430_i2c1_hwmod = {
+ .name = i2c1,
+ .mpu_irqs = i2c1_mpu_irqs,
+ .mpu_irqs_cnt = ARRAY_SIZE(i2c1_mpu_irqs),
+ .sdma_reqs = i2c1_sdma_reqs,
+ .sdma_reqs_cnt = ARRAY_SIZE(i2c1_sdma_reqs),
+ .main_clk = i2c1_fck,
+ .prcm = {
+ .omap2 = {
+ .prcm_reg_id = 1,
+ .module_bit = OMAP2430_EN_I2CHS1_SHIFT,
+ .idlest_reg_id = 1,
This is wrong - the idlest_reg_id for the 2430 I2CHS blocks is different.
Were these patches tested on 2430?
I did boot test on a 2430SDP after hacking around a lot with configs and
commenting
out a bunch of stuff.
And I looked for this in the boot log and assumed I2C was fine
i2c_omap i2c_omap.1: bus 1 rev3.7 at 100 kHz
i2c_omap i2c_omap.2: bus 2 rev3.7 at 2600 kHz
I will certainly have a relook again.
My original comment was somewhat inaccurate. Looking again at the 2430
TRM, it looks like the idlest_reg_id is correct, but that the prcm_reg_id
is not quite correct, at least for the FCLKEN register - not currently
used by hwmod. We may have to add a workaround flag for the 2430 I2CHS
case.
I can see why this didn't cause a problem in your testing. The clock
framework writes to the correct FCLKEN bit, and the hwmod code currently
doesn't touch the FCLKEN bit. And then the hwmod code checks the
correct IDLEST bit.
It may be that the clock framework is also buggy for the 2430 I2CHS case -
that code will probably write to CM_ICLKEN2_CORE for 2430 I2CHS, but it
should write to CM_ICLKEN1_CORE. sigh...
- Paul
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RE: [PATCH v4 2/2] OMAP: DSS2: Use dss_features framework on DSS2 code
Any more comments?
Archit
Taneja, Archit wrote:
From: Archit Taneja arc...@ti.com
Calls init functions of dss_features during dss_probe, and
the following features are made omap independent:
- number of managers, overlays
- supported color modes for each overlay
- supported displays for each manager
- global aplha, and restriction of global alpha for video1 pipeline
- The register field ranges : FIRHINC, FIRVINC, FIFOHIGHTHRESHOLD
FIFOLOWTHRESHOLD and FIFOSIZE
Signed-off-by: Archit Taneja arc...@ti.com
---
arch/arm/plat-omap/include/plat/display.h | 31
drivers/video/omap2/dss/core.c|3 ++
drivers/video/omap2/dss/dispc.c | 56
-
drivers/video/omap2/dss/manager.c | 33 -
drivers/video/omap2/dss/overlay.c | 24 +---
5 files changed, 60 insertions(+), 87 deletions(-)
diff --git a/arch/arm/plat-omap/include/plat/display.h
b/arch/arm/plat-omap/include/plat/display.h
index 8bd15bd..c915a66
--- a/arch/arm/plat-omap/include/plat/display.h
+++ b/arch/arm/plat-omap/include/plat/display.h
@@ -81,37 +81,6 @@ enum omap_color_mode {
OMAP_DSS_COLOR_ARGB32 = 1 11, /* ARGB32 */
OMAP_DSS_COLOR_RGBA32 = 1 12, /* RGBA32 */
OMAP_DSS_COLOR_RGBX32 = 1 13, /* RGBx32 */
-
- OMAP_DSS_COLOR_GFX_OMAP2 =
- OMAP_DSS_COLOR_CLUT1 | OMAP_DSS_COLOR_CLUT2 |
- OMAP_DSS_COLOR_CLUT4 | OMAP_DSS_COLOR_CLUT8 |
- OMAP_DSS_COLOR_RGB12U | OMAP_DSS_COLOR_RGB16 |
- OMAP_DSS_COLOR_RGB24U | OMAP_DSS_COLOR_RGB24P,
-
- OMAP_DSS_COLOR_VID_OMAP2 =
- OMAP_DSS_COLOR_RGB16 | OMAP_DSS_COLOR_RGB24U |
- OMAP_DSS_COLOR_RGB24P | OMAP_DSS_COLOR_YUV2 |
- OMAP_DSS_COLOR_UYVY,
-
- OMAP_DSS_COLOR_GFX_OMAP3 =
- OMAP_DSS_COLOR_CLUT1 | OMAP_DSS_COLOR_CLUT2 |
- OMAP_DSS_COLOR_CLUT4 | OMAP_DSS_COLOR_CLUT8 |
- OMAP_DSS_COLOR_RGB12U | OMAP_DSS_COLOR_ARGB16 |
- OMAP_DSS_COLOR_RGB16 | OMAP_DSS_COLOR_RGB24U |
- OMAP_DSS_COLOR_RGB24P | OMAP_DSS_COLOR_ARGB32 |
- OMAP_DSS_COLOR_RGBA32 | OMAP_DSS_COLOR_RGBX32,
-
- OMAP_DSS_COLOR_VID1_OMAP3 =
- OMAP_DSS_COLOR_RGB12U | OMAP_DSS_COLOR_RGB16 |
- OMAP_DSS_COLOR_RGB24U | OMAP_DSS_COLOR_RGB24P |
- OMAP_DSS_COLOR_YUV2 | OMAP_DSS_COLOR_UYVY,
-
- OMAP_DSS_COLOR_VID2_OMAP3 =
- OMAP_DSS_COLOR_RGB12U | OMAP_DSS_COLOR_ARGB16 |
- OMAP_DSS_COLOR_RGB16 | OMAP_DSS_COLOR_RGB24U |
- OMAP_DSS_COLOR_RGB24P | OMAP_DSS_COLOR_YUV2 |
- OMAP_DSS_COLOR_UYVY | OMAP_DSS_COLOR_ARGB32 |
- OMAP_DSS_COLOR_RGBA32 | OMAP_DSS_COLOR_RGBX32,
};
enum omap_lcd_display_type {
diff --git a/drivers/video/omap2/dss/core.c
b/drivers/video/omap2/dss/core.c index b3a498f..8e89f60
--- a/drivers/video/omap2/dss/core.c
+++ b/drivers/video/omap2/dss/core.c
@@ -37,6 +37,7 @@
#include plat/clock.h
#include dss.h
+#include dss_features.h
static struct {
struct platform_device *pdev;
@@ -502,6 +503,8 @@ static int omap_dss_probe(struct
platform_device *pdev)
core.pdev = pdev;
+ dss_features_init();
+
dss_init_overlay_managers(pdev);
dss_init_overlays(pdev);
diff --git a/drivers/video/omap2/dss/dispc.c
b/drivers/video/omap2/dss/dispc.c index 90eb110..fa40fa5
--- a/drivers/video/omap2/dss/dispc.c
+++ b/drivers/video/omap2/dss/dispc.c
@@ -39,6 +39,7 @@
#include plat/display.h
#include dss.h
+#include dss_features.h
/* DISPC */
#define DISPC_BASE 0x48050400
@@ -774,12 +775,12 @@ static void _dispc_set_vid_size(enum
omap_plane plane, int width, int height)
static void _dispc_setup_global_alpha(enum omap_plane plane,
u8 global_alpha) {
-
- BUG_ON(plane == OMAP_DSS_VIDEO1);
-
- if (cpu_is_omap24xx())
+ if (!dss_has_feature(FEAT_GLOBAL_ALPHA))
return;
+ BUG_ON(!dss_has_feature(FEAT_GLOBAL_ALPHA_VID1)
+ plane == OMAP_DSS_VIDEO1);
+
if (plane == OMAP_DSS_GFX)
REG_FLD_MOD(DISPC_GLOBAL_ALPHA, global_alpha, 7, 0);
else if (plane == OMAP_DSS_VIDEO2)
@@ -949,17 +950,14 @@ static void dispc_read_plane_fifo_sizes(void)
DISPC_VID_FIFO_SIZE_STATUS(1) };
u32 size;
int plane;
+ u8 start, end;
enable_clocks(1);
- for (plane = 0; plane ARRAY_SIZE(dispc.fifo_size); ++plane) {
- if (cpu_is_omap24xx())
- size =
FLD_GET(dispc_read_reg(fsz_reg[plane]), 8, 0);
- else if (cpu_is_omap34xx())
- size =
FLD_GET(dispc_read_reg(fsz_reg[plane]), 10, 0);
- else
- BUG();
+ dss_feat_get_reg_field(FEAT_REG_FIFOSIZE, start, end);
+ for (plane = 0; plane
RE: [PATCH v2 1/5] OMAP2xxx: hwmod: add I2C hwmods for OMAP2420, 2430
On Tue, 21 Sep 2010, Paul Walmsley wrote: My original comment was somewhat inaccurate. Looking again at the 2430 TRM, it looks like the idlest_reg_id is correct, but that the prcm_reg_id is not quite correct, at least for the FCLKEN register - not currently used by hwmod. We may have to add a workaround flag for the 2430 I2CHS case. I can see why this didn't cause a problem in your testing. The clock framework writes to the correct FCLKEN bit, and the hwmod code currently doesn't touch the FCLKEN bit. And then the hwmod code checks the correct IDLEST bit. It may be that the clock framework is also buggy for the 2430 I2CHS case - that code will probably write to CM_ICLKEN2_CORE for 2430 I2CHS, but it should write to CM_ICLKEN1_CORE. sigh... Just double-checked the clock code and data - it looks like the clock code is doing the right thing for 2430 I2CHS: it uses CM_ICLKEN1_CORE, CM_FCLKEN2_CORE, and CM_IDLEST1_CORE, despite the commit log comments on 3dc2197579089c5b74c7fba666c8ccf1a449afb4, which are wrong. So, that issue that I raised was a false alarm. But it would be good if you could drop a comment at the top of the two 2430 I2CHS hwmod structures, and simply note that the CM_FCLKEN* registers for those IP blocks don't follow the usual pattern. That way, that knowledge won't be lost completely once the IDLEST handling is removed from the clock framework, which we'll do as soon as the I2C hwmod code is merged. Sorry about the confusion, - Paul -- To unsubscribe from this list: send the line unsubscribe linux-omap in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
RE: [Query] Garbled characters on gtkterm
I'm not seeing these, just booted my n800 last night with the cbus patches from Felipe. I believe all I did was yes | ARCH=arm make oldconfig on the n8x0_defconfig that we still have around. I've seen things like that with some USB serial dongles earlier, I believe that the pl2303 based one worked, and then the ftdi driver one produced garbage. AFAIK, this was related to some problem with the serial port level shifter, I think this was with n810. It is working fine now. I have just changed from Linux gtkterm to Windows TeraTerm. --tarun -- To unsubscribe from this list: send the line unsubscribe linux-omap in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
[PATCH v2 00/10] OMAP2/TWL: Fix Sparse warnings
This v2 version of sparse fixes series has review comments incorporated which are archived at: http://www.spinics.net/lists/linux-omap/msg35427.html Out of total 11 patches in v1 series, three patches are dropped from this version since two patches are accepted and already applied in other mailing lists. The remaining one patch requires clarification on API usage in audio driver. With 2.6.36-rc5, some more sparse warnings are introduced. For fixing these new warnings, two new patches added into this series. As per tony's suggestion, http://www.spinics.net/lists/linux-omap/msg36474.html I have cc'ed respective maintainers and mailing lists for the patches and also I will setup git branch for these patches for pull request if there are no further review comments. Testing: Patch series tested and verified with omap3_defconfig build and boot tested on omap zoom3. G, Manjunath Kondaiah (10): OMAP: mach-omap2: Fix miscellaneous sparse warnings OMAP: mach-omap2: Fix incorrect assignment warnings OMAP: mach-omap2: Fix static declaration warnings OMAP: mach-omap2: Fix static function warnings OMAP: plat-omap: Fix static function warnings OMAP: NAND: Fix static declaration warning TWL CORE: Fix sparse warning TWL IRQ: Fix fucntion declaration warnings OMAP2/3: Convert write/read functions to raw read/write OMAP3: Keypad: Fix incorrect type initializer arch/arm/mach-omap2/board-3430sdp.c|2 +- arch/arm/mach-omap2/board-am3517evm.c |5 +-- arch/arm/mach-omap2/board-cm-t35.c |2 +- arch/arm/mach-omap2/board-devkit8000.c |2 +- arch/arm/mach-omap2/board-igep0020.c |4 +- arch/arm/mach-omap2/board-ldp.c|2 +- arch/arm/mach-omap2/board-n8x0.c | 16 + arch/arm/mach-omap2/board-omap3evm.c |8 +++--- arch/arm/mach-omap2/board-omap3stalker.c |4 +- arch/arm/mach-omap2/board-omap3touchbook.c |2 +- arch/arm/mach-omap2/board-rx51-peripherals.c |4 ++- arch/arm/mach-omap2/board-rx51-sdram.c |2 +- arch/arm/mach-omap2/board-rx51-video.c |2 + arch/arm/mach-omap2/board-zoom-debugboard.c|2 + arch/arm/mach-omap2/board-zoom-peripherals.c |4 ++- arch/arm/mach-omap2/control.c |5 ++- arch/arm/mach-omap2/gpmc-onenand.c |8 +++--- arch/arm/mach-omap2/include/mach/board-flash.h |2 + arch/arm/mach-omap2/include/mach/board-rx51.h | 11 + arch/arm/mach-omap2/irq.c |1 - arch/arm/mach-omap2/mux2420.c |2 +- arch/arm/mach-omap2/mux2430.c |2 +- arch/arm/mach-omap2/mux34xx.c | 12 +- arch/arm/mach-omap2/pm-debug.c |2 +- arch/arm/mach-omap2/pm34xx.c |2 +- arch/arm/mach-omap2/powerdomain.c | 28 arch/arm/mach-omap2/prcm.c |2 +- arch/arm/mach-omap2/timer-gp.c |1 + arch/arm/plat-omap/cpu-omap.c |4 +- arch/arm/plat-omap/dmtimer.c |6 ++-- arch/arm/plat-omap/fb.c|1 + arch/arm/plat-omap/include/plat/dmtimer.h |4 ++- arch/arm/plat-omap/include/plat/sdrc.h |1 + arch/arm/plat-omap/mcbsp.c | 10 arch/arm/plat-omap/sram.c | 13 ++- drivers/mfd/twl-core.c |2 +- drivers/mtd/nand/omap2.c |6 ++-- drivers/mtd/onenand/omap2.c|2 +- include/linux/i2c/twl.h|5 include/linux/omapfb.h |5 40 files changed, 96 insertions(+), 102 deletions(-) create mode 100644 arch/arm/mach-omap2/include/mach/board-rx51.h Cc: linux-arm-ker...@lists.infradead.org Cc: Tony Lindgren t...@atomide.com Cc: Nishanth Menon n...@ti.com -- To unsubscribe from this list: send the line unsubscribe linux-omap in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
[PATCH v2 01/10] OMAP: mach-omap2: Fix incorrect assignment warnings
This patch fixes below sparse warnings for incorrect assignments.
arch/arm/mach-omap2/control.c:195:16: warning: incorrect type in assignment
(different address spaces)
arch/arm/mach-omap2/control.c:195:16:expected unsigned int [usertype]
*v_addr
arch/arm/mach-omap2/control.c:195:16:got void [noderef] asn:2*noident
arch/arm/mach-omap2/control.c:199:25: warning: incorrect type in argument 1
(different address spaces)
arch/arm/mach-omap2/control.c:199:25:expected void const volatile [noderef]
asn:2*noident
arch/arm/mach-omap2/control.c:199:25:got unsigned int [usertype] *
arch/arm/mach-omap2/control.c:320:28: warning: incorrect type in assignment
(different address spaces)
arch/arm/mach-omap2/control.c:320:28:expected void *[noderef]
asn:2scratchpad_address
arch/arm/mach-omap2/control.c:320:28:got void [noderef] asn:2*noident
arch/arm/mach-omap2/control.c:321:9: warning: incorrect type in argument 1
(different address spaces)
arch/arm/mach-omap2/control.c:321:9:expected void volatile [noderef]
asn:2*noident
arch/arm/mach-omap2/control.c:321:9:got void *[noderef]
asn:2scratchpad_address
arch/arm/mach-omap2/control.c:324:9: warning: incorrect type in argument 1
(different address spaces)
arch/arm/mach-omap2/control.c:324:9:expected void volatile [noderef]
asn:2*noident
arch/arm/mach-omap2/control.c:324:9:got void *
arch/arm/mach-omap2/control.c:327:9: warning: incorrect type in argument 1
(different address spaces)
arch/arm/mach-omap2/control.c:327:9:expected void volatile [noderef]
asn:2*noident
arch/arm/mach-omap2/control.c:327:9:got void *
arch/arm/mach-omap2/control.c:334:9: warning: incorrect type in argument 1
(different address spaces)
arch/arm/mach-omap2/control.c:334:9:expected void volatile [noderef]
asn:2*noident
arch/arm/mach-omap2/control.c:334:9:got void *
arch/arm/mach-omap2/control.c:321:9: warning: dereference of noderef expression
arch/arm/mach-omap2/control.c:324:9: warning: dereference of noderef expression
arch/arm/mach-omap2/control.c:327:9: warning: dereference of noderef expression
arch/arm/mach-omap2/control.c:334:9: warning: dereference of noderef expression
arch/arm/mach-omap2/pm34xx.c:323:28: warning: incorrect type in assignment
(different address spaces)
arch/arm/mach-omap2/pm34xx.c:323:28:expected unsigned int [usertype]
*scratchpad_address
arch/arm/mach-omap2/pm34xx.c:323:28:got void [noderef] asn:2*noident
arch/arm/mach-omap2/pm34xx.c:326:26: warning: incorrect type in argument 1
(different address spaces)
arch/arm/mach-omap2/pm34xx.c:326:26:expected void const volatile [noderef]
asn:2*noident
arch/arm/mach-omap2/pm34xx.c:326:26:got unsigned int [usertype] *
arch/arm/mach-omap2/pm34xx.c:329:26: warning: incorrect type in argument 1
(different address spaces)
arch/arm/mach-omap2/pm34xx.c:329:26:expected void const volatile [noderef]
asn:2*noident
arch/arm/mach-omap2/pm34xx.c:329:26:got unsigned int [usertype] *
arch/arm/mach-omap2/pm34xx.c:334:29: warning: incorrect type in argument 1
(different address spaces)
arch/arm/mach-omap2/pm34xx.c:334:29:expected void const volatile [noderef]
asn:2*noident
arch/arm/mach-omap2/pm34xx.c:334:29:got unsigned int [usertype] *
Signed-off-by: G, Manjunath Kondaiah manj...@ti.com
Cc: linux-arm-ker...@lists.infradead.org
Cc: Tony Lindgren t...@atomide.com
Cc: Nishanth Menon n...@ti.com
---
arch/arm/mach-omap2/control.c |4 ++--
arch/arm/mach-omap2/pm34xx.c |2 +-
2 files changed, 3 insertions(+), 3 deletions(-)
diff --git a/arch/arm/mach-omap2/control.c b/arch/arm/mach-omap2/control.c
index a8d20ee..7405936 100644
--- a/arch/arm/mach-omap2/control.c
+++ b/arch/arm/mach-omap2/control.c
@@ -190,7 +190,7 @@ void omap_ctrl_writel(u32 val, u16 offset)
void omap3_clear_scratchpad_contents(void)
{
u32 max_offset = OMAP343X_SCRATCHPAD_ROM_OFFSET;
- u32 *v_addr;
+ void __iomem *v_addr;
u32 offset = 0;
v_addr = OMAP2_L4_IO_ADDRESS(OMAP343X_SCRATCHPAD_ROM);
if (prm_read_mod_reg(OMAP3430_GR_MOD, OMAP3_PRM_RSTST_OFFSET)
@@ -206,7 +206,7 @@ void omap3_clear_scratchpad_contents(void)
/* Populate the scratchpad structure with restore structure */
void omap3_save_scratchpad_contents(void)
{
- void * __iomem scratchpad_address;
+ void __iomem *scratchpad_address;
u32 arm_context_addr;
struct omap3_scratchpad scratchpad_contents;
struct omap3_scratchpad_prcm_block prcm_block_contents;
diff --git a/arch/arm/mach-omap2/pm34xx.c b/arch/arm/mach-omap2/pm34xx.c
index 7b03426..4af19a6 100644
--- a/arch/arm/mach-omap2/pm34xx.c
+++ b/arch/arm/mach-omap2/pm34xx.c
@@ -316,7 +316,7 @@ static void restore_control_register(u32 val)
/* Function to restore the table entry that was modified for enabling MMU */
static void restore_table_entry(void)
{
- u32 *scratchpad_address;
+ void __iomem *scratchpad_address;
u32 previous_value,
[PATCH v2 02/10] OMAP: mach-omap2: Fix static declaration warnings
This patch fixes sparse warnings due to non declaration of
static structures and variables.
Sparse warning logs fixed:
arch/arm/mach-omap2/control.c:88:6: warning: symbol 'omap3_secure_ram_storage'
was not declared. Should it be static?
n
arch/arm/mach-omap2/timer-gp.c:50:22: warning: symbol 'gptimer_wakeup' was not
declared. Should it be static?
arch/arm/mach-omap2/timer-gp.c:240:18: warning: symbol 'omap_timer' was not
declared. Should it be static?
arch/arm/mach-omap2/prcm.c:121:24: warning: symbol 'prcm_context' was not
declared. Should it be static?
arch/arm/mach-omap2/mux2420.c:510:29: warning: symbol 'omap2420_pop_ball' was
not declared. Should it be static?
arch/arm/mach-omap2/mux2430.c:589:29: warning: symbol 'omap2430_pop_ball' was
not declared. Should it be static?
arch/arm/mach-omap2/mux34xx.c:934:28: warning: symbol 'omap3_cus_subset' was
not declared. Should it be static?
arch/arm/mach-omap2/mux34xx.c:1080:29: warning: symbol 'omap3_cus_ball' was not
declared. Should it be static?
arch/arm/mach-omap2/mux34xx.c:1272:28: warning: symbol 'omap3_cbb_subset' was
not declared. Should it be static?
arch/arm/mach-omap2/mux34xx.c:1393:29: warning: symbol 'omap3_cbb_ball' was not
declared. Should it be static?
arch/arm/mach-omap2/mux34xx.c:1603:28: warning: symbol 'omap36xx_cbp_subset'
was not declared. Should it be static?
arch/arm/mach-omap2/mux34xx.c:1821:29: warning: symbol 'omap36xx_cbp_ball' was
not declared. Should it be static?
arch/arm/mach-omap2/pm-debug.c:165:15: warning: symbol 'pm_dbg_dir' was not
declared. Should it be static?
arch/arm/mach-omap2/board-omap3evm.c:587:30: warning: symbol 'ads7846_config'
was not declared. Should it be static?
arch/arm/mach-omap2/board-omap3evm.c:606:23: warning: symbol
'omap3evm_spi_board_info' was not declared. Should it be static?
arch/arm/mach-omap2/board-rx51-sdram.c:46:25: warning: symbol
'rx51_sdrc_params' was not declared. Should it be static?
arch/arm/mach-omap2/board-rx51-sdram.c:211:25: warning: symbol
'rx51_get_sdram_timings' was not declared. Should it be static?
arch/arm/mach-omap2/board-omap3touchbook.c:64:15: warning: symbol
'touchbook_revision' was not declared. Should it be static?
arch/arm/mach-omap2/board-am3517evm.c:350:24: warning: symbol
'am3517_evm_dss_device' was not declared. Should it be static?
arch/arm/mach-omap2/board-omap3stalker.c:567:23: warning: symbol
'omap3stalker_spi_board_info' was not declared. Should it be static?
Signed-off-by: G, Manjunath Kondaiah manj...@ti.com
Cc: linux-arm-ker...@lists.infradead.org
Cc: Tony Lindgren t...@atomide.com
Cc: Nishanth Menon n...@ti.com
---
arch/arm/mach-omap2/board-am3517evm.c |2 +-
arch/arm/mach-omap2/board-omap3evm.c |4 ++--
arch/arm/mach-omap2/board-omap3stalker.c |2 +-
arch/arm/mach-omap2/board-omap3touchbook.c |2 +-
arch/arm/mach-omap2/board-rx51-sdram.c |2 +-
arch/arm/mach-omap2/control.c |1 +
arch/arm/mach-omap2/mux2420.c |2 +-
arch/arm/mach-omap2/mux2430.c |2 +-
arch/arm/mach-omap2/mux34xx.c | 12 ++--
arch/arm/mach-omap2/pm-debug.c |2 +-
arch/arm/mach-omap2/prcm.c |2 +-
arch/arm/plat-omap/include/plat/dmtimer.h |2 ++
arch/arm/plat-omap/include/plat/sdrc.h |1 +
13 files changed, 20 insertions(+), 16 deletions(-)
diff --git a/arch/arm/mach-omap2/board-am3517evm.c
b/arch/arm/mach-omap2/board-am3517evm.c
index 4d0f585..197289b 100644
--- a/arch/arm/mach-omap2/board-am3517evm.c
+++ b/arch/arm/mach-omap2/board-am3517evm.c
@@ -347,7 +347,7 @@ static struct omap_dss_board_info am3517_evm_dss_data = {
.default_device = am3517_evm_lcd_device,
};
-struct platform_device am3517_evm_dss_device = {
+static struct platform_device am3517_evm_dss_device = {
.name = omapdss,
.id = -1,
.dev= {
diff --git a/arch/arm/mach-omap2/board-omap3evm.c
b/arch/arm/mach-omap2/board-omap3evm.c
index f76d9c0..892b740 100644
--- a/arch/arm/mach-omap2/board-omap3evm.c
+++ b/arch/arm/mach-omap2/board-omap3evm.c
@@ -584,7 +584,7 @@ static int ads7846_get_pendown_state(void)
return !gpio_get_value(OMAP3_EVM_TS_GPIO);
}
-struct ads7846_platform_data ads7846_config = {
+static struct ads7846_platform_data ads7846_config = {
.x_max = 0x0fff,
.y_max = 0x0fff,
.x_plate_ohms = 180,
@@ -603,7 +603,7 @@ static struct omap2_mcspi_device_config
ads7846_mcspi_config = {
.single_channel = 1,/* 0: slave, 1: master */
};
-struct spi_board_info omap3evm_spi_board_info[] = {
+static struct spi_board_info omap3evm_spi_board_info[] = {
[0] = {
.modalias = ads7846,
.bus_num= 1,
diff --git a/arch/arm/mach-omap2/board-omap3stalker.c
b/arch/arm/mach-omap2/board-omap3stalker.c
index bcd01d2..70067d6 100644
[PATCH v2 03/10] OMAP: mach-omap2: Fix static function warnings
This patch fixes sparse warnings due non declarations of static functions.
arch/arm/mach-omap2/timer-gp.c:115:12: warning: symbol
'omap2_gp_clockevent_set_gptimer' was not declared. Should it be static?
arch/arm/mach-omap2/powerdomain.c:993:5: warning: symbol
'pwrdm_set_lowpwrstchange' was not declared. Should it be static?
arch/arm/mach-omap2/board-flash.c:141:8: warning: symbol 'board_nand_init' was
not declared. Should it be static?
arch/arm/mach-omap2/board-n8x0.c:416:6: warning: symbol
'n8x0_mmc_slot1_cover_handler' was not declared. Should it be static?
arch/arm/mach-omap2/board-n8x0.c:544:13: warning: symbol 'n8x0_mmc_init' was
not declared. Should it be static?
arch/arm/mach-omap2/board-rx51-peripherals.c:902:13: warning: symbol
'rx51_peripherals_init' was not declared. Should it be static?
arch/arm/mach-omap2/board-rx51-video.c:107:13: warning: symbol
'rx51_video_mem_init' was not declared. Should it be static?
arch/arm/mach-omap2/board-zoom-debugboard.c:155:12: warning: symbol
'zoom_debugboard_init' was not declared. Should it be static?
arch/arm/mach-omap2/board-zoom-peripherals.c:280:13: warning: symbol
'zoom_peripherals_init' was not declared. Should it be static?
arch/arm/mach-omap2/board-igep0020.c:110:13: warning: symbol 'igep2_flash_init'
was not declared. Should it be static?
arch/arm/mach-omap2/board-am3517evm.c:109:6: warning: symbol
'am3517_evm_ethernet_init' was not declared. Should it be static?
Signed-off-by: G, Manjunath Kondaiah manj...@ti.com
Cc: linux-arm-ker...@lists.infradead.org
Cc: Tony Lindgren t...@atomide.com
Cc: Nishanth Menon n...@ti.com
---
arch/arm/mach-omap2/board-am3517evm.c |2 +-
arch/arm/mach-omap2/board-igep0020.c |4 +-
arch/arm/mach-omap2/board-n8x0.c | 16 +
arch/arm/mach-omap2/board-rx51-peripherals.c |2 +
arch/arm/mach-omap2/board-rx51-video.c |2 +
arch/arm/mach-omap2/board-zoom-debugboard.c|2 +
arch/arm/mach-omap2/board-zoom-peripherals.c |2 +
arch/arm/mach-omap2/include/mach/board-flash.h |2 +
arch/arm/mach-omap2/include/mach/board-rx51.h | 11 +
arch/arm/mach-omap2/powerdomain.c | 28
arch/arm/mach-omap2/timer-gp.c |1 +
arch/arm/plat-omap/include/plat/dmtimer.h |2 +-
12 files changed, 27 insertions(+), 47 deletions(-)
create mode 100644 arch/arm/mach-omap2/include/mach/board-rx51.h
diff --git a/arch/arm/mach-omap2/board-am3517evm.c
b/arch/arm/mach-omap2/board-am3517evm.c
index 197289b..ae22ea8 100644
--- a/arch/arm/mach-omap2/board-am3517evm.c
+++ b/arch/arm/mach-omap2/board-am3517evm.c
@@ -106,7 +106,7 @@ static void am3517_disable_ethernet_int(void)
regval = omap_ctrl_readl(AM35XX_CONTROL_LVL_INTR_CLEAR);
}
-void am3517_evm_ethernet_init(struct emac_platform_data *pdata)
+static void am3517_evm_ethernet_init(struct emac_platform_data *pdata)
{
unsigned int regval;
diff --git a/arch/arm/mach-omap2/board-igep0020.c
b/arch/arm/mach-omap2/board-igep0020.c
index 175f043..fbcb888 100644
--- a/arch/arm/mach-omap2/board-igep0020.c
+++ b/arch/arm/mach-omap2/board-igep0020.c
@@ -107,7 +107,7 @@ static struct platform_device igep2_onenand_device = {
},
};
-void __init igep2_flash_init(void)
+static void __init igep2_flash_init(void)
{
u8 cs = 0;
u8 onenandcs = GPMC_CS_NUM + 1;
@@ -141,7 +141,7 @@ void __init igep2_flash_init(void)
}
#else
-void __init igep2_flash_init(void) {}
+static void __init igep2_flash_init(void) {}
#endif
#if defined(CONFIG_SMSC911X) || defined(CONFIG_SMSC911X_MODULE)
diff --git a/arch/arm/mach-omap2/board-n8x0.c b/arch/arm/mach-omap2/board-n8x0.c
index a3e2b49..3b69ba2 100644
--- a/arch/arm/mach-omap2/board-n8x0.c
+++ b/arch/arm/mach-omap2/board-n8x0.c
@@ -383,15 +383,6 @@ static void n8x0_mmc_callback(void *data, u8 card_mask)
omap_mmc_notify_cover_event(mmc_device, index, *openp);
}
-void n8x0_mmc_slot1_cover_handler(void *arg, int closed_state)
-{
- if (mmc_device == NULL)
- return;
-
- slot1_cover_open = !closed_state;
- omap_mmc_notify_cover_event(mmc_device, 0, closed_state);
-}
-
static int n8x0_mmc_late_init(struct device *dev)
{
int r, bit, *openp;
@@ -511,7 +502,7 @@ static struct omap_mmc_platform_data mmc1_data = {
static struct omap_mmc_platform_data *mmc_data[OMAP24XX_NR_MMC];
-void __init n8x0_mmc_init(void)
+static void __init n8x0_mmc_init(void)
{
int err;
@@ -560,11 +551,6 @@ void __init n8x0_mmc_init(void)
void __init n8x0_mmc_init(void)
{
}
-
-void n8x0_mmc_slot1_cover_handler(void *arg, int state)
-{
-}
-
#endif /* CONFIG_MMC_OMAP */
#ifdef CONFIG_MENELAUS
diff --git a/arch/arm/mach-omap2/board-rx51-peripherals.c
b/arch/arm/mach-omap2/board-rx51-peripherals.c
index 9a5eb87..83d4efd 100644
--- a/arch/arm/mach-omap2/board-rx51-peripherals.c
+++
[PATCH v2 04/10] OMAP: mach-omap2: Fix miscellaneous sparse warnings
This patch fixes miscellaneous sparse warnings in mach-omap2.
arch/arm/mach-omap2/board-am3517evm.c:141:17: warning: Initializer entry
defined twice
arch/arm/mach-omap2/board-am3517evm.c:142:18: also defined here
arch/arm/mach-omap2/irq.c:50:35: warning: Using plain integer as NULL pointer
Signed-off-by: G, Manjunath Kondaiah manj...@ti.com
Cc: Tony Lindgren t...@atomide.com
Cc: linux-arm-ker...@lists.infradead.org
Cc: Nishanth Menon n...@ti.com
---
arch/arm/mach-omap2/board-am3517evm.c |1 -
arch/arm/mach-omap2/irq.c |1 -
2 files changed, 0 insertions(+), 2 deletions(-)
diff --git a/arch/arm/mach-omap2/board-am3517evm.c
b/arch/arm/mach-omap2/board-am3517evm.c
index ae22ea8..b091741 100644
--- a/arch/arm/mach-omap2/board-am3517evm.c
+++ b/arch/arm/mach-omap2/board-am3517evm.c
@@ -139,7 +139,6 @@ static void am3517_evm_ethernet_init(struct
emac_platform_data *pdata)
static struct i2c_board_info __initdata am3517evm_i2c1_boardinfo[] = {
{
I2C_BOARD_INFO(s35390a, 0x30),
- .type = s35390a,
},
};
diff --git a/arch/arm/mach-omap2/irq.c b/arch/arm/mach-omap2/irq.c
index 26aeef5..32eeabe 100644
--- a/arch/arm/mach-omap2/irq.c
+++ b/arch/arm/mach-omap2/irq.c
@@ -47,7 +47,6 @@ static struct omap_irq_bank {
} __attribute__ ((aligned(4))) irq_banks[] = {
{
/* MPU INTC */
- .base_reg = 0,
.nr_irqs= 96,
},
};
--
1.7.0.4
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[PATCH v2 05/10] OMAP: plat-omap: Fix static function warnings
This patch fixes sparse warnings due non declarations of static functions.
arch/arm/plat-omap/sram.c:130:13: warning: symbol 'omap_detect_sram' was not
declared. Should it be static?
arch/arm/plat-omap/sram.c:216:13: warning: symbol 'omap_map_sram' was not
declared. Should it be static?
arch/arm/plat-omap/sram.c:348:12: warning: symbol 'omap242x_sram_init' was not
declared. Should it be static?
arch/arm/plat-omap/sram.c:369:12: warning: symbol 'omap243x_sram_init' was not
declared. Should it be static?
arch/arm/plat-omap/sram.c:425:12: warning: symbol 'omap34xx_sram_init' was not
declared. Should it be static?
arch/arm/plat-omap/sram.c:441:12: warning: symbol 'omap44xx_sram_init' was not
declared. Should it be static
arch/arm/plat-omap/mcbsp.c:36:6: warning: symbol 'omap_mcbsp_write' was not
declared. Should it be static?
arch/arm/plat-omap/mcbsp.c:50:5: warning: symbol 'omap_mcbsp_read' was not
declared. Should it be static?
arch/arm/plat-omap/mcbsp.c:65:6: warning: symbol 'omap_mcbsp_st_write' was not
declared. Should it be static?
arch/arm/plat-omap/mcbsp.c:70:5: warning: symbol 'omap_mcbsp_st_read' was not
declared. Should it be static?
arch/arm/plat-omap/mcbsp.c:1648:15: warning: symbol 'omap_st_add' was not
declared. Should it be static?
arch/arm/plat-omap/fb.c:414:15: warning: symbol 'omapfb_reserve_sram' was not
declared. Should it be static?
arch/arm/plat-omap/cpu-omap.c:43:5: warning: symbol 'omap_verify_speed' was not
declared. Should it be static?
arch/arm/plat-omap/cpu-omap.c:61:14: warning: symbol 'omap_getspeed' was not
declared. Should it be static?
Signed-off-by: G, Manjunath Kondaiah manj...@ti.com
Cc: linux-arm-ker...@lists.infradead.org
Cc: Tony Lindgren t...@atomide.com
Cc: Nishanth Menon n...@ti.com
---
arch/arm/plat-omap/cpu-omap.c |4 ++--
arch/arm/plat-omap/fb.c |1 +
arch/arm/plat-omap/mcbsp.c| 10 +-
arch/arm/plat-omap/sram.c | 13 +++--
include/linux/omapfb.h|5 +
5 files changed, 20 insertions(+), 13 deletions(-)
diff --git a/arch/arm/plat-omap/cpu-omap.c b/arch/arm/plat-omap/cpu-omap.c
index 6d3d333..11c54ec 100644
--- a/arch/arm/plat-omap/cpu-omap.c
+++ b/arch/arm/plat-omap/cpu-omap.c
@@ -40,7 +40,7 @@ static struct clk *mpu_clk;
/* TODO: Add support for SDRAM timing changes */
-int omap_verify_speed(struct cpufreq_policy *policy)
+static int omap_verify_speed(struct cpufreq_policy *policy)
{
if (freq_table)
return cpufreq_frequency_table_verify(policy, freq_table);
@@ -58,7 +58,7 @@ int omap_verify_speed(struct cpufreq_policy *policy)
return 0;
}
-unsigned int omap_getspeed(unsigned int cpu)
+static unsigned int omap_getspeed(unsigned int cpu)
{
unsigned long rate;
diff --git a/arch/arm/plat-omap/fb.c b/arch/arm/plat-omap/fb.c
index 0054b95..9a12893 100644
--- a/arch/arm/plat-omap/fb.c
+++ b/arch/arm/plat-omap/fb.c
@@ -421,3 +421,4 @@ unsigned long omapfb_reserve_sram(unsigned long sram_pstart,
}
#endif
+EXPORT_SYMBOL(omapfb_reserve_sram);
diff --git a/arch/arm/plat-omap/mcbsp.c b/arch/arm/plat-omap/mcbsp.c
index e31496e..a81fa35 100644
--- a/arch/arm/plat-omap/mcbsp.c
+++ b/arch/arm/plat-omap/mcbsp.c
@@ -33,7 +33,7 @@
struct omap_mcbsp **mcbsp_ptr;
int omap_mcbsp_count, omap_mcbsp_cache_size;
-void omap_mcbsp_write(struct omap_mcbsp *mcbsp, u16 reg, u32 val)
+static void omap_mcbsp_write(struct omap_mcbsp *mcbsp, u16 reg, u32 val)
{
if (cpu_class_is_omap1()) {
((u16 *)mcbsp-reg_cache)[reg / sizeof(u16)] = (u16)val;
@@ -47,7 +47,7 @@ void omap_mcbsp_write(struct omap_mcbsp *mcbsp, u16 reg, u32
val)
}
}
-int omap_mcbsp_read(struct omap_mcbsp *mcbsp, u16 reg, bool from_cache)
+static int omap_mcbsp_read(struct omap_mcbsp *mcbsp, u16 reg, bool from_cache)
{
if (cpu_class_is_omap1()) {
return !from_cache ? __raw_readw(mcbsp-io_base + reg) :
@@ -62,12 +62,12 @@ int omap_mcbsp_read(struct omap_mcbsp *mcbsp, u16 reg, bool
from_cache)
}
#ifdef CONFIG_ARCH_OMAP3
-void omap_mcbsp_st_write(struct omap_mcbsp *mcbsp, u16 reg, u32 val)
+static void omap_mcbsp_st_write(struct omap_mcbsp *mcbsp, u16 reg, u32 val)
{
__raw_writel(val, mcbsp-st_data-io_base_st + reg);
}
-int omap_mcbsp_st_read(struct omap_mcbsp *mcbsp, u16 reg)
+static int omap_mcbsp_st_read(struct omap_mcbsp *mcbsp, u16 reg)
{
return __raw_readl(mcbsp-st_data-io_base_st + reg);
}
@@ -1645,7 +1645,7 @@ static const struct attribute_group sidetone_attr_group =
{
.attrs = (struct attribute **)sidetone_attrs,
};
-int __devinit omap_st_add(struct omap_mcbsp *mcbsp)
+static int __devinit omap_st_add(struct omap_mcbsp *mcbsp)
{
struct omap_mcbsp_platform_data *pdata = mcbsp-pdata;
struct omap_mcbsp_st_data *st_data;
diff --git a/arch/arm/plat-omap/sram.c b/arch/arm/plat-omap/sram.c
index 226b2e8..f178c2a 100644
--- a/arch/arm/plat-omap/sram.c
+++ b/arch/arm/plat-omap/sram.c
@@
[PATCH v2 06/10] OMAP: NAND: Fix static declaration warning
This patch fixes sparse warning for static declaration of variable use_dma
drivers/mtd/nand/omap2.c:114:11: warning: symbol 'use_dma' was not declared.
Should it be static?
Signed-off-by: G, Manjunath Kondaiah manj...@ti.com
Cc: linux-arm-ker...@lists.infradead.org
Cc: linux-...@lists.infradead.org
Cc: Tony Lindgren t...@atomide.com
Cc: Nishanth Menon n...@ti.com
---
drivers/mtd/nand/omap2.c |4 ++--
1 files changed, 2 insertions(+), 2 deletions(-)
diff --git a/drivers/mtd/nand/omap2.c b/drivers/mtd/nand/omap2.c
index 133d515..439e80d 100644
--- a/drivers/mtd/nand/omap2.c
+++ b/drivers/mtd/nand/omap2.c
@@ -111,11 +111,11 @@ static int use_dma = 1;
module_param(use_dma, bool, 0);
MODULE_PARM_DESC(use_dma, enable/disable use of DMA);
#else
-const int use_dma;
+static const int use_dma;
#endif
#else
const int use_prefetch;
-const int use_dma;
+static const int use_dma;
#endif
struct omap_nand_info {
--
1.7.0.4
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[PATCH v2 07/10] TWL CORE: Fix sparse warning
Fixes below sparse warning.
drivers/mfd/twl-core.c:258:20: warning: symbol 'twl_map' was not declared.
Should it be static?
Signed-off-by: G, Manjunath Kondaiah manj...@ti.com
Cc: linux-arm-ker...@lists.infradead.org
Cc: Samuel Ortiz sa...@linux.intel.com
Cc: Tony Lindgren t...@atomide.com
Cc: Nishanth Menon n...@ti.com
---
drivers/mfd/twl-core.c |2 +-
1 files changed, 1 insertions(+), 1 deletions(-)
diff --git a/drivers/mfd/twl-core.c b/drivers/mfd/twl-core.c
index 720e099..53c371a 100644
--- a/drivers/mfd/twl-core.c
+++ b/drivers/mfd/twl-core.c
@@ -255,7 +255,7 @@ struct twl_mapping {
unsigned char sid; /* Slave ID */
unsigned char base; /* base address */
};
-struct twl_mapping *twl_map;
+static struct twl_mapping *twl_map;
static struct twl_mapping twl4030_map[TWL4030_MODULE_LAST + 1] = {
/*
--
1.7.0.4
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[PATCH v2 08/10] TWL IRQ: Fix fucntion declaration warnings
Fixes following sparse warnings for twl4030 and twl6030 irq files. drivers/mfd/twl4030-irq.c:783:5: warning: symbol 'twl4030_init_irq' was not declared. Should it be static? drivers/mfd/twl4030-irq.c:863:5: warning: symbol 'twl4030_exit_irq' was not declared. Should it be static? drivers/mfd/twl4030-irq.c:873:5: warning: symbol 'twl4030_init_chip_irq' was not declared. Should it be static? drivers/mfd/twl6030-irq.c:226:5: warning: symbol 'twl6030_init_irq' was not declared. Should it be static? drivers/mfd/twl6030-irq.c:290:5: warning: symbol 'twl6030_exit_irq' was not declared. Should it be static? Signed-off-by: G, Manjunath Kondaiah manj...@ti.com Cc: linux-arm-ker...@lists.infradead.org Cc: Samuel Ortiz sa...@linux.intel.com Cc: Tony Lindgren t...@atomide.com Cc: Nishanth Menon n...@ti.com --- include/linux/i2c/twl.h |5 + 1 files changed, 5 insertions(+), 0 deletions(-) diff --git a/include/linux/i2c/twl.h b/include/linux/i2c/twl.h index 6de90bf..c61e90a 100644 --- a/include/linux/i2c/twl.h +++ b/include/linux/i2c/twl.h @@ -172,6 +172,11 @@ int twl_i2c_read(u8 mod_no, u8 *value, u8 reg, unsigned num_bytes); int twl6030_interrupt_unmask(u8 bit_mask, u8 offset); int twl6030_interrupt_mask(u8 bit_mask, u8 offset); +int twl6030_init_irq(int irq_num, unsigned irq_base, unsigned irq_end); +int twl6030_exit_irq(void); +int twl4030_init_irq(int irq_num, unsigned irq_base, unsigned irq_end); +int twl4030_exit_irq(void); +int twl4030_init_chip_irq(const char *chip); /*--*/ -- 1.7.0.4 -- To unsubscribe from this list: send the line unsubscribe linux-omap in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
[PATCH v2 09/10] OMAP2/3: Convert write/read functions to raw read/write
Following sparse warnings exists due to use of writel/w and readl/w functions.
This patch fixes the sparse warnings by converting readl/w functions usage into
__raw_readl/__raw_readw functions.
arch/arm/mach-omap2/board-omap3evm.c:77:12: warning: symbol '__v' shadows an
earlier one
arch/arm/mach-omap2/board-omap3evm.c:77:12: originally declared here
arch/arm/mach-omap2/gpmc-onenand.c:49:8: warning: symbol '__v' shadows an
earlier one
arch/arm/mach-omap2/gpmc-onenand.c:49:8: originally declared here
arch/arm/mach-omap2/gpmc-onenand.c:89:8: warning: symbol '__v' shadows an
earlier one
arch/arm/mach-omap2/gpmc-onenand.c:89:8: originally declared here
arch/arm/mach-omap2/gpmc-onenand.c:101:8: warning: symbol '__v' shadows an
earlier one
arch/arm/mach-omap2/gpmc-onenand.c:101:8: originally declared here
arch/arm/mach-omap2/gpmc-onenand.c:151:9: warning: symbol '__v' shadows an
earlier one
arch/arm/mach-omap2/gpmc-onenand.c:151:9: originally declared here
arch/arm/plat-omap/dmtimer.c:295:10: warning: symbol '__v' shadows an earlier
one
arch/arm/plat-omap/dmtimer.c:295:10: originally declared here
arch/arm/plat-omap/dmtimer.c:298:9: warning: symbol '__v' shadows an earlier one
arch/arm/plat-omap/dmtimer.c:298:9: originally declared here
arch/arm/plat-omap/dmtimer.c:311:10: warning: symbol '__v' shadows an earlier
one
arch/arm/plat-omap/dmtimer.c:311:10: originally declared here
drivers/mtd/nand/omap2.c:484:15: warning: symbol '__v' shadows an earlier one
drivers/mtd/nand/omap2.c:484:15: originally declared here
drivers/mtd/onenand/omap2.c:86:9: warning: symbol '__v' shadows an earlier one
drivers/mtd/onenand/omap2.c:86:9: originally declared here
Signed-off-by: G, Manjunath Kondaiah manj...@ti.com
Cc: linux-arm-ker...@lists.infradead.org
Cc: linux-...@lists.infradead.org
---
arch/arm/mach-omap2/board-omap3evm.c |2 +-
arch/arm/mach-omap2/gpmc-onenand.c |8
arch/arm/plat-omap/dmtimer.c |6 +++---
drivers/mtd/nand/omap2.c |2 +-
drivers/mtd/onenand/omap2.c |2 +-
5 files changed, 10 insertions(+), 10 deletions(-)
diff --git a/arch/arm/mach-omap2/board-omap3evm.c
b/arch/arm/mach-omap2/board-omap3evm.c
index 892b740..738d832 100644
--- a/arch/arm/mach-omap2/board-omap3evm.c
+++ b/arch/arm/mach-omap2/board-omap3evm.c
@@ -74,7 +74,7 @@ static void __init omap3_evm_get_revision(void)
ioaddr = ioremap_nocache(OMAP3EVM_ETHR_START, SZ_1K);
if (!ioaddr)
return;
- smsc_id = readl(ioaddr + OMAP3EVM_ETHR_ID_REV) 0x;
+ smsc_id = __raw_readl(ioaddr + OMAP3EVM_ETHR_ID_REV) 0x;
iounmap(ioaddr);
switch (smsc_id) {
diff --git a/arch/arm/mach-omap2/gpmc-onenand.c
b/arch/arm/mach-omap2/gpmc-onenand.c
index 7bb6922..128bbef 100644
--- a/arch/arm/mach-omap2/gpmc-onenand.c
+++ b/arch/arm/mach-omap2/gpmc-onenand.c
@@ -46,7 +46,7 @@ static int omap2_onenand_set_async_mode(int cs, void __iomem
*onenand_base)
const int t_wph = 30;
/* Ensure sync read and sync write are disabled */
- reg = readw(onenand_base + ONENAND_REG_SYS_CFG1);
+ reg = __raw_readw(onenand_base + ONENAND_REG_SYS_CFG1);
reg = ~ONENAND_SYS_CFG1_SYNC_READ ~ONENAND_SYS_CFG1_SYNC_WRITE;
writew(reg, onenand_base + ONENAND_REG_SYS_CFG1);
@@ -86,7 +86,7 @@ static int omap2_onenand_set_async_mode(int cs, void __iomem
*onenand_base)
return err;
/* Ensure sync read and sync write are disabled */
- reg = readw(onenand_base + ONENAND_REG_SYS_CFG1);
+ reg = __raw_readw(onenand_base + ONENAND_REG_SYS_CFG1);
reg = ~ONENAND_SYS_CFG1_SYNC_READ ~ONENAND_SYS_CFG1_SYNC_WRITE;
writew(reg, onenand_base + ONENAND_REG_SYS_CFG1);
@@ -98,7 +98,7 @@ static void set_onenand_cfg(void __iomem *onenand_base, int
latency,
{
u32 reg;
- reg = readw(onenand_base + ONENAND_REG_SYS_CFG1);
+ reg = __raw_readw(onenand_base + ONENAND_REG_SYS_CFG1);
reg = ~((0x7 ONENAND_SYS_CFG1_BRL_SHIFT) | (0x7 9));
reg |= (latency ONENAND_SYS_CFG1_BRL_SHIFT) |
ONENAND_SYS_CFG1_BL_16;
@@ -148,7 +148,7 @@ static int omap2_onenand_set_sync_mode(struct
omap_onenand_platform_data *cfg,
err = omap2_onenand_set_async_mode(cs, onenand_base);
if (err)
return err;
- reg = readw(onenand_base + ONENAND_REG_VERSION_ID);
+ reg = __raw_readw(onenand_base + ONENAND_REG_VERSION_ID);
switch ((reg 4) 0xf) {
case 0:
freq = 40;
diff --git a/arch/arm/plat-omap/dmtimer.c b/arch/arm/plat-omap/dmtimer.c
index 44bafda..c2920db 100644
--- a/arch/arm/plat-omap/dmtimer.c
+++ b/arch/arm/plat-omap/dmtimer.c
@@ -292,10 +292,10 @@ static spinlock_t dm_timer_lock;
static inline u32 omap_dm_timer_read_reg(struct omap_dm_timer *timer, u32 reg)
{
if (timer-posted)
- while
[PATCH v2 10/10] OMAP3: Keypad: Fix incorrect type initializer
The keypad matrix variable declaration is not matching
with structure variable keymap declared in keypad_matrix.h.
Due to this, following sparse warnings are generated with omap3_defconfig.
arch/arm/mach-omap2/board-devkit8000.c:223:14: warning: incorrect type in
initializer (different signedness)
arch/arm/mach-omap2/board-devkit8000.c:223:14:expected unsigned int const
[usertype] *keymap
arch/arm/mach-omap2/board-devkit8000.c:223:14:got int static [toplevel]
*noident
arch/arm/mach-omap2/board-ldp.c:107:14: warning: incorrect type in initializer
(different signedness)
arch/arm/mach-omap2/board-ldp.c:107:14:expected unsigned int const
[usertype] *keymap
arch/arm/mach-omap2/board-ldp.c:107:14:got int static [toplevel] *noident
arch/arm/mach-omap2/board-omap3evm.c:472:14: warning: incorrect type in
initializer (different signedness)
arch/arm/mach-omap2/board-omap3evm.c:472:14:expected unsigned int const
[usertype] *keymap
arch/arm/mach-omap2/board-omap3evm.c:472:14:got int static [toplevel]
*noident
arch/arm/mach-omap2/board-3430sdp.c:114:14: warning: incorrect type in
initializer (different signedness)
arch/arm/mach-omap2/board-3430sdp.c:114:14:expected unsigned int const
[usertype] *keymap
arch/arm/mach-omap2/board-3430sdp.c:114:14:got int static [toplevel]
*noident
arch/arm/mach-omap2/board-rx51-peripherals.c:248:14: warning: incorrect type in
initializer (different signedness)
arch/arm/mach-omap2/board-rx51-peripherals.c:248:14:expected unsigned int
const [usertype] *keymap
arch/arm/mach-omap2/board-rx51-peripherals.c:248:14:got int static
[toplevel] *noident
arch/arm/mach-omap2/board-zoom-peripherals.c:88:14: warning: incorrect type in
initializer (different signedness)
arch/arm/mach-omap2/board-zoom-peripherals.c:88:14:expected unsigned int
const [usertype] *keymap
arch/arm/mach-omap2/board-zoom-peripherals.c:88:14:got int static
[toplevel] *noident
arch/arm/mach-omap2/board-cm-t35.c:568:14: warning: incorrect type in
initializer (different signedness)
arch/arm/mach-omap2/board-cm-t35.c:568:14:expected unsigned int const
[usertype] *keymap
arch/arm/mach-omap2/board-cm-t35.c:568:14:got int static [toplevel]
*noident
arch/arm/mach-omap2/board-omap3stalker.c:415:13: warning: incorrect type in
initializer (different signedness)
arch/arm/mach-omap2/board-omap3stalker.c:415:13:expected unsigned int const
[usertype] *keymap
arch/arm/mach-omap2/board-omap3stalker.c:415:13:got int static [toplevel]
*noident
This patch modifies the variable keymap declaration as per declaration in
matrix_keymap structure.
Signed-off-by: G, Manjunath Kondaiah manj...@ti.com
Cc: linux-in...@vger.kernel.org
Cc: Dmitry Torokhov d...@mail.ru
Cc: linux-arm-ker...@lists.infradead.org
Cc: Tony Lindgren t...@atomide.com
Cc: Nishanth Menon n...@ti.com
---
arch/arm/mach-omap2/board-3430sdp.c |2 +-
arch/arm/mach-omap2/board-cm-t35.c |2 +-
arch/arm/mach-omap2/board-devkit8000.c |2 +-
arch/arm/mach-omap2/board-ldp.c |2 +-
arch/arm/mach-omap2/board-omap3evm.c |2 +-
arch/arm/mach-omap2/board-omap3stalker.c |2 +-
arch/arm/mach-omap2/board-rx51-peripherals.c |2 +-
arch/arm/mach-omap2/board-zoom-peripherals.c |2 +-
8 files changed, 8 insertions(+), 8 deletions(-)
diff --git a/arch/arm/mach-omap2/board-3430sdp.c
b/arch/arm/mach-omap2/board-3430sdp.c
index 67b95b5..41b42f7 100644
--- a/arch/arm/mach-omap2/board-3430sdp.c
+++ b/arch/arm/mach-omap2/board-3430sdp.c
@@ -76,7 +76,7 @@ static struct cpuidle_params omap3_cpuidle_params_table[] = {
{1, 1, 3, 30},
};
-static int board_keymap[] = {
+static uint32_t board_keymap[] = {
KEY(0, 0, KEY_LEFT),
KEY(0, 1, KEY_RIGHT),
KEY(0, 2, KEY_A),
diff --git a/arch/arm/mach-omap2/board-cm-t35.c
b/arch/arm/mach-omap2/board-cm-t35.c
index e10bc10..a022089 100644
--- a/arch/arm/mach-omap2/board-cm-t35.c
+++ b/arch/arm/mach-omap2/board-cm-t35.c
@@ -558,7 +558,7 @@ static struct twl4030_usb_data cm_t35_usb_data = {
.usb_mode = T2_USB_MODE_ULPI,
};
-static int cm_t35_keymap[] = {
+static uint32_t cm_t35_keymap[] = {
KEY(0, 0, KEY_A), KEY(0, 1, KEY_B), KEY(0, 2, KEY_LEFT),
KEY(1, 0, KEY_UP), KEY(1, 1, KEY_ENTER), KEY(1, 2, KEY_DOWN),
KEY(2, 0, KEY_RIGHT), KEY(2, 1, KEY_C), KEY(2, 2, KEY_D),
diff --git a/arch/arm/mach-omap2/board-devkit8000.c
b/arch/arm/mach-omap2/board-devkit8000.c
index a07086d..49b442b 100644
--- a/arch/arm/mach-omap2/board-devkit8000.c
+++ b/arch/arm/mach-omap2/board-devkit8000.c
@@ -198,7 +198,7 @@ static struct platform_device devkit8000_dss_device = {
static struct regulator_consumer_supply devkit8000_vdda_dac_supply =
REGULATOR_SUPPLY(vdda_dac, omapdss);
-static int board_keymap[] = {
+static uint32_t board_keymap[] = {
KEY(0, 0, KEY_1),
KEY(1, 0, KEY_2),
Re: [PATCH V3 1/2] input: CMA3000 Accelerometer driver
On 09/21/10 06:46, Hemanth V wrote: - Original Message - From: Jonathan Cameron ker...@jic23.retrosnub.co.uk To: Dmitry Torokhov dmitry.torok...@gmail.com Cc: Hemanth V heman...@ti.com; linux-in...@vger.kernel.org; linux-ker...@vger.kernel.org; linux-omap@vger.kernel.org Sent: Tuesday, September 14, 2010 6:40 PM Subject: Re: [PATCH V3 1/2] input: CMA3000 Accelerometer driver On 09/14/10 09:00, Dmitry Torokhov wrote: On Wed, Sep 08, 2010 at 12:37:40PM +0100, Jonathan Cameron wrote: I'm happy to see your driver go in as it is currently, what bothers me is that we will end up with incompatible interfaces for all the accelerometers Dmitry takes! This is a valid concern. How about I chicken out and will not merge any new sysfs knobs until you guys decide on reasonable interface? Most set up is done by board code anyways, sysfs is more of nice-to-have? Hemanth, would removing the sysfs hooks from this driver be ok with you? I'd personally have favoured a merge, add new interfaces when agreed and deprecate old ones approach, but it is Dmitry's call. Perhaps it is better to get the majority of the device functionality in place now and add the bells and whistles later. For input device things are probably mostly fixed for a particular board design. There are definitely interesting things one can do if the knobs are available but they (I think) mostly fall outside of using the device for input! Dmitry, Jonathan I am ok to remove the sysfs entries for now, but would cause some limitations like not being able to change sampling frequency / disabling interrupts runtime. Wanted to clarify if the intention is to come up with a standard sysfs interface for all accelerometer drivers under input/misc including adxl34x. The intent is to come up with an interface covering a much wider range of devices if at all possible. I've proposed options for conventional threshold and rate of change interrupts on IIO (you were cc'd IIRC). I'll propose those on to lkml shortly and suggest that others suggest the interfaces they would like to see added (or object to the syntax for the ones I've covered!) To be honest, sampling frequency is much more general and I would imagine applies to lots of input drivers. Do you already have a standard for this Dmitry? Jonathan -- To unsubscribe from this list: send the line unsubscribe linux-omap in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
[PATCH v2] OMAP3: Keypad: Fix failure exit path in probe
The failure exit paths seems to be wrong in probe function.
This patch corrects exit failure paths for error handling
cases.
Boot warning incase of request irq failure:
[1.553985] twl4030_keypad twl4030_keypad: request_irq failed for irq no=369
[1.561157] [ cut here ]
[1.565795] WARNING: at kernel/irq/manage.c:899 __free_irq+0x88/0x164()
[1.572418] Trying to free already-free IRQ 369
[1.576965] Modules linked in:
[1.580047] [c00470ec] (unwind_backtrace+0x0/0xe4) from [c0078b5c]
(warn_slowpath_common+0x4c/0x64)
[1.589477] [c0078b5c] (warn_slowpath_common+0x4c/0x64) from [c0078bf4]
(warn_slowpath_fmt+0x2c/0x3c)
[1.599060] [c0078bf4] (warn_slowpath_fmt+0x2c/0x3c) from [c00adb90]
(__free_irq+0x88/0x164)
[1.607849] [c00adb90] (__free_irq+0x88/0x164) from [c00adca8]
(free_irq+0x3c/0x5c)
[1.615875] [c00adca8] (free_irq+0x3c/0x5c) from [c043ab2c]
(twl4030_kp_probe+0x308/0x374)
[1.624511] [c043ab2c] (twl4030_kp_probe+0x308/0x374) from [c023c338]
(platform_drv_probe+0x14/0x18)
[1.634033] [c023c338] (platform_drv_probe+0x14/0x18) from [c023b4dc]
(driver_probe_device+0xc8/0x184)
[1.643707] [c023b4dc] (driver_probe_device+0xc8/0x184) from [c023b600]
(__driver_attach+0x68/0x8c)
[1.653106] [c023b600] (__driver_attach+0x68/0x8c) from [c023ad34]
(bus_for_each_dev+0x48/0x74)
[1.662170] [c023ad34] (bus_for_each_dev+0x48/0x74) from [c023a690]
(bus_add_driver+0x9c/0x210)
[1.671234] [c023a690] (bus_add_driver+0x9c/0x210) from [c023b8f8]
(driver_register+0xa8/0x134)
[1.680297] [c023b8f8] (driver_register+0xa8/0x134) from [c0041340]
(do_one_initcall+0x58/0x1b4)
[1.689453] [c0041340] (do_one_initcall+0x58/0x1b4) from [c0008574]
(kernel_init+0x98/0x150)
[1.698272] [c0008574] (kernel_init+0x98/0x150) from [c0042970]
(kernel_thread_exit+0x0/0x8)
[1.707214] ---[ end trace 6559b322ad3cbdfe ]---
[1.718292] twl4030_keypad: probe of twl4030_keypad failed with error -16
Signed-off-by: G, Manjunath Kondaiah manj...@ti.com
Cc: linux-in...@vger.kernel.org
Cc: Dmitry Torokhov d...@mail.ru
Cc: linux-arm-ker...@lists.infradead.org
Cc: linux-in...@vger.kernel.org
Cc: Tony Lindgren t...@atomide.com
---
version v1 : initial patch
version v2 : CC'ed input subsystem and arm kernel mailing lists.
drivers/input/keyboard/twl4030_keypad.c | 10 --
1 files changed, 4 insertions(+), 6 deletions(-)
diff --git a/drivers/input/keyboard/twl4030_keypad.c
b/drivers/input/keyboard/twl4030_keypad.c
index fb16b5e..39a9f30 100644
--- a/drivers/input/keyboard/twl4030_keypad.c
+++ b/drivers/input/keyboard/twl4030_keypad.c
@@ -347,8 +347,7 @@ static int __devinit twl4030_kp_probe(struct
platform_device *pdev)
kp = kzalloc(sizeof(*kp), GFP_KERNEL);
input = input_allocate_device();
if (!kp || !input) {
- error = -ENOMEM;
- goto err1;
+ return -ENOMEM;
}
/* Get the debug Device */
@@ -406,23 +405,22 @@ static int __devinit twl4030_kp_probe(struct
platform_device *pdev)
if (error) {
dev_info(kp-dbg_dev, request_irq failed for irq no=%d\n,
kp-irq);
- goto err3;
+ goto err2;
}
/* Enable KP and TO interrupts now. */
reg = (u8) ~(KEYP_IMR1_KP | KEYP_IMR1_TO);
if (twl4030_kpwrite_u8(kp, reg, KEYP_IMR1)) {
error = -EIO;
- goto err4;
+ goto err3;
}
platform_set_drvdata(pdev, kp);
return 0;
-err4:
+err3:
/* mask all events - we don't care about the result */
(void) twl4030_kpwrite_u8(kp, 0xff, KEYP_IMR1);
-err3:
free_irq(kp-irq, NULL);
err2:
input_unregister_device(input);
--
1.7.0.4
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[PATCH] OMAP: ZOOM2: Change GPIO to enable LCD NEC NL8048HL11-01B on OMAP34x-II MDP
The PIN which controls LCD's reset signal (VGA_nRESET/h_GPIO_96) was not
configured as a GPIO. We had to modify the OMAP MUX, and select this PIN
(CAM_XCLKA) as an output GPIO (OMAP_MUX_MODE4). (kernel 2.6.35)
Be aware of changing this PIN will probably disable the camera, because
it was previously configured as a camera clock.
Signed-off-by: Yanick Saugy yanick.sa...@heig-vd.ch
--- a/arch/arm/mach-omap2/board-zoom2.c 2010-09-15 15:27:05.148399721 +0200
+++ b/arch/arm/mach-omap2/board-zoom2.c 2010-09-15 14:46:09.792900019 +0200
@@ -71,6 +71,7 @@ static struct twl4030_platform_data zoom
#ifdef CONFIG_OMAP_MUX
static struct omap_board_mux board_mux[] __initdata = {
+ OMAP3_MUX(CAM_XCLKA, OMAP_MUX_MODE4 | OMAP_PIN_OUTPUT),
{ .reg_offset = OMAP_MUX_TERMINATOR },
};
#else
@@ -82,6 +83,7 @@ static void __init omap_zoom2_init(void)
omap3_mux_init(board_mux, OMAP_PACKAGE_CBB);
zoom_peripherals_init();
zoom_debugboard_init();
+zoom_display_init(OMAP_DSS_VENC_TYPE_COMPOSITE);
}
static void __init omap_zoom2_map_io(void)
--
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RE: [PATCH RESEND v4 1/4] omap3: nand: prefetch in irq mode support
Tony,
-Original Message-
From: linux-omap-ow...@vger.kernel.org [mailto:linux-omap-
ow...@vger.kernel.org] On Behalf Of Ghorai, Sukumar
Sent: Monday, September 20, 2010 7:01 PM
To: Tony Lindgren
Cc: linux-omap@vger.kernel.org; linux-...@lists.infradead.org; linux-arm-
ker...@lists.infradead.org
Subject: RE: [PATCH RESEND v4 1/4] omap3: nand: prefetch in irq mode
support
Tony,
-Original Message-
From: Ghorai, Sukumar
Sent: Saturday, September 18, 2010 11:55 PM
To: 'Tony Lindgren'
Cc: 'linux-omap@vger.kernel.org'; 'linux-...@lists.infradead.org';
'linux-
arm-ker...@lists.infradead.org'
Subject: RE: [PATCH RESEND v4 1/4] omap3: nand: prefetch in irq mode
support
Tony,
-Original Message-
From: Tony Lindgren [mailto:t...@atomide.com]
Sent: Friday, September 17, 2010 11:25 PM
To: Ghorai, Sukumar
Cc: linux-omap@vger.kernel.org; linux-...@lists.infradead.org; linux-
arm-
ker...@lists.infradead.org; Vimal Singh
Subject: Re: [PATCH RESEND v4 1/4] omap3: nand: prefetch in irq mode
support
* Sukumar Ghorai s-gho...@ti.com [100916 00:53]:
This patch enable prefetch-irq mode for NAND.
--- a/drivers/mtd/nand/omap2.c
+++ b/drivers/mtd/nand/omap2.c
@@ -467,6 +485,152 @@ static void omap_write_buf_dma_pref(struct
mtd_info *mtd,
omap_nand_dma_transfer(mtd, (u_char *) buf, len, 0x1);
}
+/*
+ * omap_nand_irq - GMPC irq handler
+ * @this_irq: gpmc irq number
+ * @dev: omap_nand_info structure pointer is passed here
+ */
+static irqreturn_t omap_nand_irq(int this_irq, void *dev)
+{
+ struct omap_nand_info *info = (struct omap_nand_info *) dev;
+ u32 bytes;
+ u32 irq_stat;
+
+ irq_stat = gpmc_read_status(GPMC_GET_IRQ_STATUS);
+ bytes = gpmc_read_status(GPMC_PREFETCH_FIFO_CNT);
+ bytes = bytes 0xFFFC; /* io in multiple of 4 bytes */
+ if (info-iomode == OMAP_NAND_IO_WRITE) { /* checks for write
io */
+ if (irq_stat 0x2)
+ goto done;
+
+ if (info-buf_len (info-buf_len bytes))
+ bytes = info-buf_len;
+ else if (!info-buf_len)
+ bytes = 0;
+ iowrite32_rep(info-nand.IO_ADDR_W,
+ (u32 *)info-buf, bytes
2);
+ info-buf = info-buf + bytes;
+ info-buf_len -= bytes;
+
+ } else {
+ ioread32_rep(info-nand.IO_ADDR_R,
+ (u32 *)info-buf, bytes
2);
+ info-buf = info-buf + bytes;
+
+ if (irq_stat 0x2)
+ goto done;
+ }
+ gpmc_cs_configure(info-gpmc_cs, GPMC_SET_IRQ_STATUS,
irq_stat);
+ irq_stat = gpmc_read_status(GPMC_GET_IRQ_STATUS);
+
+ return IRQ_HANDLED;
+
+done:
+ complete(info-comp);
+ /* disable irq */
+ gpmc_cs_configure(info-gpmc_cs, GPMC_ENABLE_IRQ, 0);
+
+ /* clear status */
+ gpmc_cs_configure(info-gpmc_cs, GPMC_SET_IRQ_STATUS,
irq_stat);
+ irq_stat = gpmc_read_status(GPMC_GET_IRQ_STATUS);
+
+ return IRQ_HANDLED;
+}
This handler should be in gpmc.c as it may be needed for other GPMC
connected devices on the same system. You can use chained irq handlers
to allow all the drivers to use the interrupt then.
[Ghorai]
You mean as this function used the gpmc-irq number in nand file, so
handler should move to gpmc.c file?
1. For that we need to add one io-struct (to keep io buffer status)
in gpmc.c;
2. Also need help how to sync between gpmc.c/omap_nand_irq() and
omap2.c/omap_write_buf_irq_pref(), men how read/write function know that
work done in interrupt-context? Or you prefer to move the complete IO
function (omap_read/write_buf_irq_pref) to gpmc.c?
3. gpmc does not now about the read and write address that's
applicable for NAND. So how to pass the IO address from omap2.c to
gpmc.c,
interrupt handler?
So, please let me know your suggestion again such that I can post this
time itself. Otherwise again it will miss from coming release, this was
posted/reviewed for last release too. And suggest to void repeating of
missing release window again.
[Ghorai] Please reply with your 2nd suggestion.
[Ghorai] Please reply with your 2nd suggestion.
Regards,
Tony
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More majordomo
RE: [PATCH v2 1/5] OMAP2xxx: hwmod: add I2C hwmods for OMAP2420, 2430
-Original Message- From: Paul Walmsley [mailto:p...@pwsan.com] Sent: Tuesday, September 21, 2010 1:36 PM To: Nayak, Rajendra Cc: linux-omap@vger.kernel.org; Kevin Hilman Subject: RE: [PATCH v2 1/5] OMAP2xxx: hwmod: add I2C hwmods for OMAP2420, 2430 On Tue, 21 Sep 2010, Paul Walmsley wrote: My original comment was somewhat inaccurate. Looking again at the 2430 TRM, it looks like the idlest_reg_id is correct, but that the prcm_reg_id is not quite correct, at least for the FCLKEN register - not currently used by hwmod. We may have to add a workaround flag for the 2430 I2CHS case. I can see why this didn't cause a problem in your testing. The clock framework writes to the correct FCLKEN bit, and the hwmod code currently doesn't touch the FCLKEN bit. And then the hwmod code checks the correct IDLEST bit. It may be that the clock framework is also buggy for the 2430 I2CHS case - that code will probably write to CM_ICLKEN2_CORE for 2430 I2CHS, but it should write to CM_ICLKEN1_CORE. sigh... Just double-checked the clock code and data - it looks like the clock code is doing the right thing for 2430 I2CHS: it uses CM_ICLKEN1_CORE, CM_FCLKEN2_CORE, and CM_IDLEST1_CORE, despite the commit log comments on 3dc2197579089c5b74c7fba666c8ccf1a449afb4, which are wrong. So, that issue that I raised was a false alarm. But it would be good if you could drop a comment at the top of the two 2430 I2CHS hwmod structures, and simply note that the CM_FCLKEN* registers for those IP blocks don't follow the usual pattern. That way, that knowledge won't be lost completely once the IDLEST handling is removed from the clock framework, which we'll do as soon as the I2C hwmod code is merged. Sure, will add a note on this. Sorry about the confusion, - Paul -- To unsubscribe from this list: send the line unsubscribe linux-omap in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
[PATCH v7 6/6] OMAP: WDT: Use PM runtime APIs instead of clk FW APIs
Call runtime pm APIs pm_runtime_put_sync() and pm_runtime_get_sync()
for enabling/disabling the clocks, sysconfig settings instead of using
clock FW APIs.
Signed-off-by: Charulatha V ch...@ti.com
---
drivers/watchdog/omap_wdt.c | 42 +++---
1 files changed, 7 insertions(+), 35 deletions(-)
diff --git a/drivers/watchdog/omap_wdt.c b/drivers/watchdog/omap_wdt.c
index 76b58ab..dbbc580 100644
--- a/drivers/watchdog/omap_wdt.c
+++ b/drivers/watchdog/omap_wdt.c
@@ -38,11 +38,11 @@
#include linux/err.h
#include linux/platform_device.h
#include linux/moduleparam.h
-#include linux/clk.h
#include linux/bitops.h
#include linux/io.h
#include linux/uaccess.h
#include linux/slab.h
+#include linux/pm_runtime.h
#include mach/hardware.h
#include plat/prcm.h
@@ -61,8 +61,6 @@ struct omap_wdt_dev {
void __iomem*base; /* physical */
struct device *dev;
int omap_wdt_users;
- struct clk *ick;
- struct clk *fck;
struct resource *mem;
struct miscdevice omap_wdt_miscdev;
};
@@ -146,8 +144,7 @@ static int omap_wdt_open(struct inode *inode, struct file
*file)
if (test_and_set_bit(1, (unsigned long *)(wdev-omap_wdt_users)))
return -EBUSY;
- clk_enable(wdev-ick);/* Enable the interface clock */
- clk_enable(wdev-fck);/* Enable the functional clock */
+ pm_runtime_get_sync(wdev-dev);
/* initialize prescaler */
while (__raw_readl(base + OMAP_WATCHDOG_WPS) 0x01)
@@ -177,8 +174,7 @@ static int omap_wdt_release(struct inode *inode, struct
file *file)
omap_wdt_disable(wdev);
- clk_disable(wdev-ick);
- clk_disable(wdev-fck);
+ pm_runtime_put_sync(wdev-dev);
#else
printk(KERN_CRIT omap_wdt: Unexpected close, not stopping!\n);
#endif
@@ -292,19 +288,7 @@ static int __devinit omap_wdt_probe(struct platform_device
*pdev)
wdev-omap_wdt_users = 0;
wdev-mem = mem;
-
- wdev-ick = clk_get(pdev-dev, ick);
- if (IS_ERR(wdev-ick)) {
- ret = PTR_ERR(wdev-ick);
- wdev-ick = NULL;
- goto err_clk;
- }
- wdev-fck = clk_get(pdev-dev, fck);
- if (IS_ERR(wdev-fck)) {
- ret = PTR_ERR(wdev-fck);
- wdev-fck = NULL;
- goto err_clk;
- }
+ wdev-dev = pdev-dev;
wdev-base = ioremap(res-start, resource_size(res));
if (!wdev-base) {
@@ -314,8 +298,8 @@ static int __devinit omap_wdt_probe(struct platform_device
*pdev)
platform_set_drvdata(pdev, wdev);
- clk_enable(wdev-ick);
- clk_enable(wdev-fck);
+ pm_runtime_enable(wdev-dev);
+ pm_runtime_get_sync(wdev-dev);
omap_wdt_disable(wdev);
omap_wdt_adjust_timeout(timer_margin);
@@ -333,11 +317,7 @@ static int __devinit omap_wdt_probe(struct platform_device
*pdev)
__raw_readl(wdev-base + OMAP_WATCHDOG_REV) 0xFF,
timer_margin);
- /* autogate OCP interface clock */
- __raw_writel(0x01, wdev-base + OMAP_WATCHDOG_SYS_CONFIG);
-
- clk_disable(wdev-ick);
- clk_disable(wdev-fck);
+ pm_runtime_put_sync(wdev-dev);
omap_wdt_dev = pdev;
@@ -349,12 +329,6 @@ err_misc:
err_ioremap:
wdev-base = NULL;
-
-err_clk:
- if (wdev-ick)
- clk_put(wdev-ick);
- if (wdev-fck)
- clk_put(wdev-fck);
kfree(wdev);
err_kzalloc:
@@ -386,8 +360,6 @@ static int __devexit omap_wdt_remove(struct platform_device
*pdev)
release_mem_region(res-start, resource_size(res));
platform_set_drvdata(pdev, NULL);
- clk_put(wdev-ick);
- clk_put(wdev-fck);
iounmap(wdev-base);
kfree(wdev);
--
1.7.0.4
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[PATCH v7 1/6] OMAP3: hwmod data: Add watchdog timer
Add watchdog timer hwmod data for OMAP3 chip
Signed-off-by: Charulatha V ch...@ti.com
---
arch/arm/mach-omap2/omap_hwmod_3xxx_data.c | 66
1 files changed, 66 insertions(+), 0 deletions(-)
diff --git a/arch/arm/mach-omap2/omap_hwmod_3xxx_data.c
b/arch/arm/mach-omap2/omap_hwmod_3xxx_data.c
index 5d8eb58..5bfe9c9 100644
--- a/arch/arm/mach-omap2/omap_hwmod_3xxx_data.c
+++ b/arch/arm/mach-omap2/omap_hwmod_3xxx_data.c
@@ -21,6 +21,7 @@
#include omap_hwmod_common_data.h
#include prm-regbits-34xx.h
+#include cm-regbits-34xx.h
/*
* OMAP3xxx hardware module integration data
@@ -36,6 +37,7 @@ static struct omap_hwmod omap3xxx_iva_hwmod;
static struct omap_hwmod omap3xxx_l3_main_hwmod;
static struct omap_hwmod omap3xxx_l4_core_hwmod;
static struct omap_hwmod omap3xxx_l4_per_hwmod;
+static struct omap_hwmod omap3xxx_wd_timer2_hwmod;
/* L3 - L4_CORE interface */
static struct omap_hwmod_ocp_if omap3xxx_l3_main__l4_core = {
@@ -197,6 +199,69 @@ static struct omap_hwmod omap3xxx_iva_hwmod = {
.omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP3430)
};
+/* l4_wkup - wd_timer2 */
+static struct omap_hwmod_addr_space omap3xxx_wd_timer2_addrs[] = {
+ {
+ .pa_start = 0x48314000,
+ .pa_end = 0x4831407f,
+ .flags = ADDR_TYPE_RT
+ },
+};
+
+static struct omap_hwmod_ocp_if omap3xxx_l4_wkup__wd_timer2 = {
+ .master = omap3xxx_l4_wkup_hwmod,
+ .slave = omap3xxx_wd_timer2_hwmod,
+ .clk= wdt2_ick,
+ .addr = omap3xxx_wd_timer2_addrs,
+ .addr_cnt = ARRAY_SIZE(omap3xxx_wd_timer2_addrs),
+ .user = OCP_USER_MPU | OCP_USER_SDMA,
+};
+
+/*
+ * 'wd_timer' class
+ * 32-bit watchdog upward counter that generates a pulse on the reset pin on
+ * overflow condition
+ */
+
+static struct omap_hwmod_class_sysconfig omap3xxx_wd_timer_sysc = {
+ .rev_offs = 0x,
+ .sysc_offs = 0x0010,
+ .syss_offs = 0x0014,
+ .sysc_flags = (SYSC_HAS_SIDLEMODE | SYSC_HAS_EMUFREE |
+ SYSC_HAS_ENAWAKEUP | SYSC_HAS_SOFTRESET |
+ SYSC_HAS_AUTOIDLE | SYSC_HAS_CLOCKACTIVITY),
+ .idlemodes = (SIDLE_FORCE | SIDLE_NO | SIDLE_SMART),
+ .sysc_fields= omap_hwmod_sysc_type1,
+};
+
+static struct omap_hwmod_class omap3xxx_wd_timer_hwmod_class = {
+ .name = wd_timer,
+ .sysc = omap3xxx_wd_timer_sysc,
+};
+
+/* wd_timer2 */
+static struct omap_hwmod_ocp_if *omap3xxx_wd_timer2_slaves[] = {
+ omap3xxx_l4_wkup__wd_timer2,
+};
+
+static struct omap_hwmod omap3xxx_wd_timer2_hwmod = {
+ .name = wd_timer2,
+ .class = omap3xxx_wd_timer_hwmod_class,
+ .main_clk = wdt2_fck,
+ .prcm = {
+ .omap2 = {
+ .prcm_reg_id = 1,
+ .module_bit = OMAP3430_EN_WDT2_SHIFT,
+ .module_offs = WKUP_MOD,
+ .idlest_reg_id = 1,
+ .idlest_idle_bit = OMAP3430_ST_WDT2_SHIFT,
+ },
+ },
+ .slaves = omap3xxx_wd_timer2_slaves,
+ .slaves_cnt = ARRAY_SIZE(omap3xxx_wd_timer2_slaves),
+ .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP3430),
+};
+
static __initdata struct omap_hwmod *omap3xxx_hwmods[] = {
omap3xxx_l3_main_hwmod,
omap3xxx_l4_core_hwmod,
@@ -204,6 +269,7 @@ static __initdata struct omap_hwmod *omap3xxx_hwmods[] = {
omap3xxx_l4_wkup_hwmod,
omap3xxx_mpu_hwmod,
omap3xxx_iva_hwmod,
+ omap3xxx_wd_timer2_hwmod,
NULL,
};
--
1.7.0.4
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[PATCH v7 4/6] OMAP4: hwmod data: Add watchdog timer
From: Benoit Cousson b-cous...@ti.com
Add watchdog timer hwmod data for OMAP4 chip
Signed-off-by: Benoit Cousson b-cous...@ti.com
Signed-off-by: Charulatha V ch...@ti.com
---
arch/arm/mach-omap2/omap_hwmod_44xx_data.c | 135
1 files changed, 135 insertions(+), 0 deletions(-)
diff --git a/arch/arm/mach-omap2/omap_hwmod_44xx_data.c
b/arch/arm/mach-omap2/omap_hwmod_44xx_data.c
index e20b0ee..8660fea 100644
--- a/arch/arm/mach-omap2/omap_hwmod_44xx_data.c
+++ b/arch/arm/mach-omap2/omap_hwmod_44xx_data.c
@@ -452,6 +452,136 @@ static struct omap_hwmod omap44xx_mpu_hwmod = {
.omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430),
};
+/*
+ * 'wd_timer' class
+ * 32-bit watchdog upward counter that generates a pulse on the reset pin on
+ * overflow condition
+ */
+
+static struct omap_hwmod_class_sysconfig omap44xx_wd_timer_sysc = {
+ .rev_offs = 0x,
+ .sysc_offs = 0x0010,
+ .syss_offs = 0x0014,
+ .sysc_flags = (SYSC_HAS_SIDLEMODE | SYSC_HAS_EMUFREE |
+ SYSC_HAS_SOFTRESET),
+ .idlemodes = (SIDLE_FORCE | SIDLE_NO | SIDLE_SMART),
+ .sysc_fields= omap_hwmod_sysc_type1,
+};
+
+static struct omap_hwmod_class omap44xx_wd_timer_hwmod_class = {
+ .name = wd_timer,
+ .sysc = omap44xx_wd_timer_sysc,
+};
+
+/* wd_timer2 */
+static struct omap_hwmod omap44xx_wd_timer2_hwmod;
+static struct omap_hwmod_irq_info omap44xx_wd_timer2_irqs[] = {
+ { .irq = 80 + OMAP44XX_IRQ_GIC_START },
+};
+
+static struct omap_hwmod_addr_space omap44xx_wd_timer2_addrs[] = {
+ {
+ .pa_start = 0x4a314000,
+ .pa_end = 0x4a31407f,
+ .flags = ADDR_TYPE_RT
+ },
+};
+
+/* l4_wkup - wd_timer2 */
+static struct omap_hwmod_ocp_if omap44xx_l4_wkup__wd_timer2 = {
+ .master = omap44xx_l4_wkup_hwmod,
+ .slave = omap44xx_wd_timer2_hwmod,
+ .clk= l4_wkup_clk_mux_ck,
+ .addr = omap44xx_wd_timer2_addrs,
+ .addr_cnt = ARRAY_SIZE(omap44xx_wd_timer2_addrs),
+ .user = OCP_USER_MPU | OCP_USER_SDMA,
+};
+
+/* wd_timer2 slave ports */
+static struct omap_hwmod_ocp_if *omap44xx_wd_timer2_slaves[] = {
+ omap44xx_l4_wkup__wd_timer2,
+};
+
+static struct omap_hwmod omap44xx_wd_timer2_hwmod = {
+ .name = wd_timer2,
+ .class = omap44xx_wd_timer_hwmod_class,
+ .mpu_irqs = omap44xx_wd_timer2_irqs,
+ .mpu_irqs_cnt = ARRAY_SIZE(omap44xx_wd_timer2_irqs),
+ .main_clk = wd_timer2_fck,
+ .prcm = {
+ .omap4 = {
+ .clkctrl_reg = OMAP4430_CM_WKUP_WDT2_CLKCTRL,
+ },
+ },
+ .slaves = omap44xx_wd_timer2_slaves,
+ .slaves_cnt = ARRAY_SIZE(omap44xx_wd_timer2_slaves),
+ .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430),
+};
+
+/* wd_timer3 */
+static struct omap_hwmod omap44xx_wd_timer3_hwmod;
+static struct omap_hwmod_irq_info omap44xx_wd_timer3_irqs[] = {
+ { .irq = 36 + OMAP44XX_IRQ_GIC_START },
+};
+
+static struct omap_hwmod_addr_space omap44xx_wd_timer3_addrs[] = {
+ {
+ .pa_start = 0x4013,
+ .pa_end = 0x4013007f,
+ .flags = ADDR_TYPE_RT
+ },
+};
+
+/* l4_abe - wd_timer3 */
+static struct omap_hwmod_ocp_if omap44xx_l4_abe__wd_timer3 = {
+ .master = omap44xx_l4_abe_hwmod,
+ .slave = omap44xx_wd_timer3_hwmod,
+ .clk= ocp_abe_iclk,
+ .addr = omap44xx_wd_timer3_addrs,
+ .addr_cnt = ARRAY_SIZE(omap44xx_wd_timer3_addrs),
+ .user = OCP_USER_MPU,
+};
+
+/* l4_abe - wd_timer3 (dma) */
+static struct omap_hwmod_addr_space omap44xx_wd_timer3_dma_addrs[] = {
+ {
+ .pa_start = 0x4903,
+ .pa_end = 0x4903007f,
+ .flags = ADDR_TYPE_RT
+ },
+};
+
+static struct omap_hwmod_ocp_if omap44xx_l4_abe__wd_timer3_dma = {
+ .master = omap44xx_l4_abe_hwmod,
+ .slave = omap44xx_wd_timer3_hwmod,
+ .clk= ocp_abe_iclk,
+ .addr = omap44xx_wd_timer3_dma_addrs,
+ .addr_cnt = ARRAY_SIZE(omap44xx_wd_timer3_dma_addrs),
+ .user = OCP_USER_SDMA,
+};
+
+/* wd_timer3 slave ports */
+static struct omap_hwmod_ocp_if *omap44xx_wd_timer3_slaves[] = {
+ omap44xx_l4_abe__wd_timer3,
+ omap44xx_l4_abe__wd_timer3_dma,
+};
+
+static struct omap_hwmod omap44xx_wd_timer3_hwmod = {
+ .name = wd_timer3,
+ .class = omap44xx_wd_timer_hwmod_class,
+ .mpu_irqs = omap44xx_wd_timer3_irqs,
+ .mpu_irqs_cnt = ARRAY_SIZE(omap44xx_wd_timer3_irqs),
+ .main_clk = wd_timer3_fck,
+ .prcm = {
+ .omap4 = {
+ .clkctrl_reg =
[PATCH v7 5/6] OMAP: WDT: Split OMAP1 and OMAP2PLUS device registration
This patch splits omap_init_wdt() into separate omap_init_wdt()
functions under mach-omap1 and mach-omap2 and set them up with
subsys_initcall.
Also it uses omap_device_build() API instead of
platform_device_register() for watchdog timer device registration
for OMAP2plus chips.
For OMAP2plus chips, the device specific data defined in centralized
hwmod database will be used.
Signed-off-by: Charulatha V ch...@ti.com
---
arch/arm/mach-omap1/devices.c | 27 +++
arch/arm/mach-omap2/devices.c | 39 +++
arch/arm/plat-omap/devices.c | 41 -
3 files changed, 66 insertions(+), 41 deletions(-)
diff --git a/arch/arm/mach-omap1/devices.c b/arch/arm/mach-omap1/devices.c
index aa07256..39447fa 100644
--- a/arch/arm/mach-omap1/devices.c
+++ b/arch/arm/mach-omap1/devices.c
@@ -232,3 +232,30 @@ static int __init omap1_init_devices(void)
}
arch_initcall(omap1_init_devices);
+#if defined(CONFIG_OMAP_WATCHDOG) || defined(CONFIG_OMAP_WATCHDOG_MODULE)
+
+static struct resource wdt_resources[] = {
+ {
+ .start = 0xfffeb000,
+ .end= 0xfffeb07F,
+ .flags = IORESOURCE_MEM,
+ },
+};
+
+static struct platform_device omap_wdt_device = {
+ .name = omap_wdt,
+ .id = -1,
+ .num_resources = ARRAY_SIZE(wdt_resources),
+ .resource = wdt_resources,
+};
+
+static int __init omap_init_wdt(void)
+{
+ if (!cpu_is_omap16xx())
+ return;
+
+ platform_device_register(omap_wdt_device);
+ return 0;
+}
+subsys_initcall(omap_init_wdt);
+#endif
diff --git a/arch/arm/mach-omap2/devices.c b/arch/arm/mach-omap2/devices.c
index 2dbb265..439bfb3 100644
--- a/arch/arm/mach-omap2/devices.c
+++ b/arch/arm/mach-omap2/devices.c
@@ -15,6 +15,7 @@
#include linux/platform_device.h
#include linux/io.h
#include linux/clk.h
+#include linux/err.h
#include mach/hardware.h
#include mach/irqs.h
@@ -28,6 +29,8 @@
#include mach/gpio.h
#include plat/mmc.h
#include plat/dma.h
+#include plat/omap_hwmod.h
+#include plat/omap_device.h
#include mux.h
@@ -859,3 +862,39 @@ static int __init omap2_init_devices(void)
return 0;
}
arch_initcall(omap2_init_devices);
+
+#if defined(CONFIG_OMAP_WATCHDOG) || defined(CONFIG_OMAP_WATCHDOG_MODULE)
+struct omap_device_pm_latency omap_wdt_latency[] = {
+ [0] = {
+ .deactivate_func = omap_device_idle_hwmods,
+ .activate_func = omap_device_enable_hwmods,
+ .flags = OMAP_DEVICE_LATENCY_AUTO_ADJUST,
+ },
+};
+
+static int __init omap_init_wdt(void)
+{
+ int id = -1;
+ struct omap_device *od;
+ struct omap_hwmod *oh;
+ char *oh_name = wd_timer2;
+ char *dev_name = omap_wdt;
+
+ if (!cpu_class_is_omap2())
+ return 0;
+
+ oh = omap_hwmod_lookup(oh_name);
+ if (!oh) {
+ pr_err(Could not look up wd_timer%d hwmod\n, id);
+ return -EINVAL;
+ }
+
+ od = omap_device_build(dev_name, id, oh, NULL, 0,
+ omap_wdt_latency,
+ ARRAY_SIZE(omap_wdt_latency), 0);
+ WARN(IS_ERR(od), Cant build omap_device for %s:%s.\n,
+ dev_name, oh-name);
+ return 0;
+}
+subsys_initcall(omap_init_wdt);
+#endif
diff --git a/arch/arm/plat-omap/devices.c b/arch/arm/plat-omap/devices.c
index d1920be..8e88e0e 100644
--- a/arch/arm/plat-omap/devices.c
+++ b/arch/arm/plat-omap/devices.c
@@ -232,46 +232,6 @@ static void omap_init_uwire(void)
static inline void omap_init_uwire(void) {}
#endif
-/*-*/
-
-#ifdefined(CONFIG_OMAP_WATCHDOG) || defined(CONFIG_OMAP_WATCHDOG_MODULE)
-
-static struct resource wdt_resources[] = {
- {
- .flags = IORESOURCE_MEM,
- },
-};
-
-static struct platform_device omap_wdt_device = {
- .name = omap_wdt,
- .id = -1,
- .num_resources = ARRAY_SIZE(wdt_resources),
- .resource = wdt_resources,
-};
-
-static void omap_init_wdt(void)
-{
- if (cpu_is_omap16xx())
- wdt_resources[0].start = 0xfffeb000;
- else if (cpu_is_omap2420())
- wdt_resources[0].start = 0x48022000; /* WDT2 */
- else if (cpu_is_omap2430())
- wdt_resources[0].start = 0x49016000; /* WDT2 */
- else if (cpu_is_omap343x())
- wdt_resources[0].start = 0x48314000; /* WDT2 */
- else if (cpu_is_omap44xx())
- wdt_resources[0].start = 0x4a314000;
- else
- return;
-
- wdt_resources[0].end = wdt_resources[0].start + 0x4f;
-
- (void) platform_device_register(omap_wdt_device);
-}
-#else
-static inline void omap_init_wdt(void) {}
-#endif
-
/*
* This gets called after
RE: [PATCH v2] OMAP3: Keypad: Fix failure exit path in probe
Hi, -Original Message- From: Ameya Palande [mailto:ameya.pala...@nokia.com] Sent: Tuesday, September 21, 2010 7:04 PM To: G, Manjunath Kondaiah Cc: linux-omap@vger.kernel.org; linux-in...@vger.kernel.org; Dmitry Torokhov; linux-arm-ker...@lists.infradead.org; Tony Lindgren Subject: Re: [PATCH v2] OMAP3: Keypad: Fix failure exit path in probe Hi Manjunath, On Tue, 2010-09-21 at 13:49 +0200, ext G, Manjunath Kondaiah wrote: The failure exit paths seems to be wrong in probe function. This patch corrects exit failure paths for error handling cases. https://patchwork.kernel.org/patch/160551/ Any comments on this? Looks fine. Sorry, I didn't look at the change. This version seems to be better. -Manjunath
RE: [PATCH v6 00/13] OMAP: GPIO: Implement GPIO in hwmod way
-Original Message-
From: Kevin Hilman [mailto:khil...@deeprootsystems.com]
Sent: Tuesday, September 21, 2010 5:37 AM
To: Varadarajan, Charulatha
Cc: t...@atomide.com; linux-omap@vger.kernel.org; p...@pwsan.com; Cousson,
Benoit; Nayak, Rajendra; Basak, Partha
Subject: Re: [PATCH v6 00/13] OMAP: GPIO: Implement GPIO in hwmod way
Varadarajan, Charulatha ch...@ti.com writes:
This patch series makes OMAP2PLUS specific GPIO implemented in hwmod
FW way. This is done by implementing GPIO module in platform device
model.
This patch series is generated on origin/pm-wip/pm-core which
has Kevin's pm-next series, the runtime PM core patch series,
and a collection of hwmod fixes that Paul/Benoit have lined up
for 2.6.37.
Tested on OMAP2430, OMAP44430, OMAP3430 SDP and zoom3 boards.
Also verified that this patch series does not break the OMAP1 build.
This patch series is created on top of the following patches:
1. OMAP: HWMOD: Handle opt clocks using clk_add_alias
[https://patchwork.kernel.org/patch/124531/]
2. OMAP2+: GPIO: move late PM out of interrupts-disabled idle path
[https://patchwork.kernel.org/patch/176172/]
3. OMAP: CPUIDLE: Enable IRQs during device activity check and idle
management
by Kevin
This series is tested on OMAP4430 ES2 using the below series
http://www.spinics.net/lists/linux-omap/msg36023.html
Hi Charu,
I haven't been fully through the series, but here's some quick feedback
based on what I tried today.
Basically, I got stuck because the first board I tried it on was the
35xx-based OMAP3EVM platform, which uses a GPIO-based interrupt for the
network. My setup uses DHCP + nfsroot, so the GPIO IRQ must be working
during boot.
The first thing I noticed, is that GPIO interrupts are not firing during
boot, so neither the DHCP or the nfsroot works during boot. I haven't
been able to fully debug this, but the 3430SDP should have the same
issue for its smc91x if you set it up for DHCP + nfsroot. This is
working fine on my pm-wip/idle-reorg branch which has the prerequisites
you mentioned, but didn't work when I applied the clk_alias patch plus
this series.
I tested this GPIO series in pm-wip/idle-reorg branch with clock
add alias patch and I did not see any issues. I tested with DHCP + nfsroot
on SDP3430. Please provide me some more info on this.
The other change when debugging I made was to make the
'workaround_enable' hack bank specific. Now that the bank idles can be
called independetly, this would get cleared as soon as one of the banks
clears it. It should be a per-bank flag[1]
Agreed. Even I was wondering why this was not bank specific in the
original code. Will do this in the next series after we get the above
issue fixed.
Another thing I noticed was that ENWAKEUP is no longer set in the
SYSCONFIG register for each bank, as it was before. To avoid this kind
of functional change, I did[2]
I'll get back to digging a bit tomorrow, but hopefully you can debug
this further before I get to it.
Kevin
[1]
diff --git a/arch/arm/plat-omap/gpio.c b/arch/arm/plat-omap/gpio.c
index 2f5c1eb..3b60418 100644
--- a/arch/arm/plat-omap/gpio.c
+++ b/arch/arm/plat-omap/gpio.c
@@ -170,6 +170,7 @@ struct gpio_bank {
struct omap_gpio_regs gpio_context;
struct powerdomain *pwrdm;
bool dbck_flag;
+ int workaround_enabled;
};
static void omap_gpio_save_context(struct device *dev);
@@ -1830,8 +1831,6 @@ static int omap_gpio_resume(struct device *dev)
return 0;
}
-static int workaround_enabled;
-
static int gpio_bank_runtime_suspend(struct device *dev)
{
struct platform_device *pdev = to_platform_device(dev);
@@ -1887,7 +1886,7 @@ static int gpio_bank_runtime_suspend(struct device
*dev)
__raw_writel(l2, bank-base + OMAP4_GPIO_RISINGDETECT);
}
- workaround_enabled = 1;
+ bank-workaround_enabled = 1;
return 0;
}
@@ -1900,7 +1899,7 @@ static int gpio_bank_runtime_resume(struct device
*dev)
if (bank-dbck_enable_mask)
clk_enable(bank-dbck);
- if ((!workaround_enabled) || (!(bank-enabled_non_wakeup_gpios)))
+ if ((!bank-workaround_enabled) || (!(bank-
enabled_non_wakeup_gpios)))
return 0;
if (bank-method == METHOD_GPIO_24XX) {
@@ -2110,11 +2109,11 @@ void omap2_gpio_prepare_for_idle(void)
{
int i;
- workaround_enabled = 0;
-
for (i = 0; i gpio_bank_count; i++) {
struct gpio_bank *bank = gpio_bank[i];
+ bank-workaround_enabled = 0;
+
/* If the gpio bank is not used, do nothing */
if ((!bank-pwrdm) || !(bank-mod_usage))
continue;
[2]
diff --git a/arch/arm/mach-omap2/gpio.c b/arch/arm/mach-omap2/gpio.c
index e759311..ae7487f 100644
--- a/arch/arm/mach-omap2/gpio.c
+++ b/arch/arm/mach-omap2/gpio.c
@@ -54,6 +54,8 @@ static int
[PATCH v3 0/5] Convert I2C driver to use omap_device/runtime PM
This series makes I2C device registration use hwmod and omap_device api's and converts the I2C driver to use runtime PM api's. Patches apply on the pm-core branch from Kevin's tree. v3 has minor review comment fixes over v2 The series is boot tested on a 2430sdp platform along with being tested on 3430sdp and 4430sdp. 4430sdp tests are done using the below series http://www.spinics.net/lists/linux-omap/msg36023.html Paul Walmsley (2): OMAP2xxx: hwmod: add I2C hwmods for OMAP2420, 2430 OMAP: I2C: split device registration and convert OMAP2+ to omap_device Rajendra Nayak (3): OMAP3: hwmod: add I2C hwmods for OMAP3430 OMAP4: hwmod: add I2C hwmods for OMAP4430 OMAP: I2C: Convert i2c driver to use PM runtime api's arch/arm/mach-omap2/cm-regbits-24xx.h |4 + arch/arm/mach-omap2/omap_hwmod_2420_data.c | 140 - arch/arm/mach-omap2/omap_hwmod_2430_data.c | 154 ++- arch/arm/mach-omap2/omap_hwmod_3xxx_data.c | 232 +++ arch/arm/mach-omap2/omap_hwmod_44xx_data.c | 237 arch/arm/mach-omap2/prm-regbits-34xx.h |3 + arch/arm/plat-omap/i2c.c | 124 ++- arch/arm/plat-omap/include/plat/i2c.h | 16 ++ arch/arm/plat-omap/include/plat/l4_3xxx.h | 24 +++ drivers/i2c/busses/i2c-omap.c | 67 +++-- include/linux/i2c-omap.h |5 + 11 files changed, 881 insertions(+), 125 deletions(-) create mode 100644 arch/arm/plat-omap/include/plat/l4_3xxx.h -- To unsubscribe from this list: send the line unsubscribe linux-omap in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
[PATCH v3 4/5] OMAP: I2C: split device registration and convert OMAP2+ to omap_device
From: Paul Walmsley p...@pwsan.com
Split the OMAP1 and OMAP2+ platform_device build and register code.
Convert the OMAP2+ variant to use omap_device.
This patch was developed in collaboration with Rajendra Nayak
rna...@ti.com.
Signed-off-by: Paul Walmsley p...@pwsan.com
Signed-off-by: Rajendra Nayak rna...@ti.com
Cc: Kevin Hilman khil...@deeprootsystems.com
---
arch/arm/plat-omap/i2c.c | 124 ++
include/linux/i2c-omap.h |5 ++
2 files changed, 54 insertions(+), 75 deletions(-)
diff --git a/arch/arm/plat-omap/i2c.c b/arch/arm/plat-omap/i2c.c
index a5ce4f0..a5bff9c 100644
--- a/arch/arm/plat-omap/i2c.c
+++ b/arch/arm/plat-omap/i2c.c
@@ -27,18 +27,18 @@
#include linux/platform_device.h
#include linux/i2c.h
#include linux/i2c-omap.h
+#include linux/slab.h
+#include linux/err.h
+#include linux/clk.h
#include mach/irqs.h
#include plat/mux.h
#include plat/i2c.h
#include plat/omap-pm.h
+#include plat/omap_device.h
#define OMAP_I2C_SIZE 0x3f
#define OMAP1_I2C_BASE 0xfffb3800
-#define OMAP2_I2C_BASE10x4807
-#define OMAP2_I2C_BASE20x48072000
-#define OMAP2_I2C_BASE30x4806
-#define OMAP4_I2C_BASE40x4835
static const char name[] = i2c_omap;
@@ -55,15 +55,6 @@ static const char name[] = i2c_omap;
static struct resource i2c_resources[][2] = {
{ I2C_RESOURCE_BUILDER(0, 0) },
-#ifdefined(CONFIG_ARCH_OMAP2PLUS)
- { I2C_RESOURCE_BUILDER(OMAP2_I2C_BASE2, 0) },
-#endif
-#ifdefined(CONFIG_ARCH_OMAP3) || defined(CONFIG_ARCH_OMAP4)
- { I2C_RESOURCE_BUILDER(OMAP2_I2C_BASE3, 0) },
-#endif
-#ifdefined(CONFIG_ARCH_OMAP4)
- { I2C_RESOURCE_BUILDER(OMAP4_I2C_BASE4, 0) },
-#endif
};
#define I2C_DEV_BUILDER(bus_id, res, data) \
@@ -77,18 +68,11 @@ static struct resource i2c_resources[][2] = {
}, \
}
-static struct omap_i2c_bus_platform_data i2c_pdata[ARRAY_SIZE(i2c_resources)];
+#define MAX_OMAP_I2C_HWMOD_NAME_LEN16
+#define OMAP_I2C_MAX_CONTROLLERS 4
+static struct omap_i2c_bus_platform_data i2c_pdata[OMAP_I2C_MAX_CONTROLLERS];
static struct platform_device omap_i2c_devices[] = {
I2C_DEV_BUILDER(1, i2c_resources[0], i2c_pdata[0]),
-#ifdefined(CONFIG_ARCH_OMAP2PLUS)
- I2C_DEV_BUILDER(2, i2c_resources[1], i2c_pdata[1]),
-#endif
-#ifdefined(CONFIG_ARCH_OMAP3) || defined(CONFIG_ARCH_OMAP4)
- I2C_DEV_BUILDER(3, i2c_resources[2], i2c_pdata[2]),
-#endif
-#ifdefined(CONFIG_ARCH_OMAP4)
- I2C_DEV_BUILDER(4, i2c_resources[3], i2c_pdata[3]),
-#endif
};
#define OMAP_I2C_CMDLINE_SETUP (BIT(31))
@@ -109,35 +93,20 @@ static int __init omap_i2c_nr_ports(void)
return ports;
}
-/* Shared between omap2 and 3 */
-static resource_size_t omap2_i2c_irq[3] __initdata = {
- INT_24XX_I2C1_IRQ,
- INT_24XX_I2C2_IRQ,
- INT_34XX_I2C3_IRQ,
-};
-
-static resource_size_t omap4_i2c_irq[4] __initdata = {
- OMAP44XX_IRQ_I2C1,
- OMAP44XX_IRQ_I2C2,
- OMAP44XX_IRQ_I2C3,
- OMAP44XX_IRQ_I2C4,
-};
-
-static inline int omap1_i2c_add_bus(struct platform_device *pdev, int bus_id)
+static inline int omap1_i2c_add_bus(int bus_id)
{
- struct omap_i2c_bus_platform_data *pd;
- struct resource *res;
-
- pd = pdev-dev.platform_data;
- res = pdev-resource;
- res[0].start = OMAP1_I2C_BASE;
- res[0].end = res[0].start + OMAP_I2C_SIZE;
- res[1].start = INT_I2C;
+ struct platform_device *pdev;
+ struct omap_i2c_bus_platform_data *pdata;
+
omap1_i2c_mux_pins(bus_id);
+ pdev = omap_i2c_devices[bus_id - 1];
+ pdata = i2c_pdata[bus_id - 1];
+
return platform_device_register(pdev);
}
+
/*
* XXX This function is a temporary compatibility wrapper - only
* needed until the I2C driver can be converted to call
@@ -148,52 +117,57 @@ static void omap_pm_set_max_mpu_wakeup_lat_compat(struct
device *dev, long t)
omap_pm_set_max_mpu_wakeup_lat(dev, t);
}
-static inline int omap2_i2c_add_bus(struct platform_device *pdev, int bus_id)
-{
- struct resource *res;
- resource_size_t *irq;
+static struct omap_device_pm_latency omap_i2c_latency[] = {
+ [0] = {
+ .deactivate_func= omap_device_idle_hwmods,
+ .activate_func = omap_device_enable_hwmods,
+ .flags = OMAP_DEVICE_LATENCY_AUTO_ADJUST,
+ },
+};
- res = pdev-resource;
+static inline int omap2_i2c_add_bus(int bus_id)
+{
+ int l;
+ struct omap_hwmod *oh;
+ struct omap_device *od;
+ char oh_name[MAX_OMAP_I2C_HWMOD_NAME_LEN];
+ struct omap_i2c_bus_platform_data *pdata;
- if (!cpu_is_omap44xx())
- irq = omap2_i2c_irq;
- else
- irq = omap4_i2c_irq;
+ omap2_i2c_mux_pins(bus_id);
- if (bus_id == 1)
[PATCH v3 2/5] OMAP3: hwmod: add I2C hwmods for OMAP3430
Add hwmod structures for I2C controllers on OMAP3430.
This patch was developed in collaboration with Paul Walmsley p...@pwsan.com.
Signed-off-by: Rajendra Nayak rna...@ti.com
Signed-off-by: Paul Walmsley p...@pwsan.com
Cc: Kevin Hilman khil...@deeprootsystems.com
---
arch/arm/mach-omap2/omap_hwmod_3xxx_data.c | 232
arch/arm/mach-omap2/prm-regbits-34xx.h |3 +
arch/arm/plat-omap/include/plat/i2c.h | 16 ++
arch/arm/plat-omap/include/plat/l4_3xxx.h | 24 +++
4 files changed, 275 insertions(+), 0 deletions(-)
create mode 100644 arch/arm/plat-omap/include/plat/l4_3xxx.h
diff --git a/arch/arm/mach-omap2/omap_hwmod_3xxx_data.c
b/arch/arm/mach-omap2/omap_hwmod_3xxx_data.c
index 5d8eb58..a3ccab7 100644
--- a/arch/arm/mach-omap2/omap_hwmod_3xxx_data.c
+++ b/arch/arm/mach-omap2/omap_hwmod_3xxx_data.c
@@ -17,6 +17,9 @@
#include mach/irqs.h
#include plat/cpu.h
#include plat/dma.h
+#include plat/l4_3xxx.h
+#include plat/i2c.h
+#include plat/omap34xx.h
#include omap_hwmod_common_data.h
@@ -36,6 +39,9 @@ static struct omap_hwmod omap3xxx_iva_hwmod;
static struct omap_hwmod omap3xxx_l3_main_hwmod;
static struct omap_hwmod omap3xxx_l4_core_hwmod;
static struct omap_hwmod omap3xxx_l4_per_hwmod;
+static struct omap_hwmod omap3xxx_i2c1_hwmod;
+static struct omap_hwmod omap3xxx_i2c2_hwmod;
+static struct omap_hwmod omap3xxx_i2c3_hwmod;
/* L3 - L4_CORE interface */
static struct omap_hwmod_ocp_if omap3xxx_l3_main__l4_core = {
@@ -90,6 +96,85 @@ static struct omap_hwmod_ocp_if omap3xxx_l4_core__l4_wkup = {
.user = OCP_USER_MPU | OCP_USER_SDMA,
};
+
+/* I2C IP block address space length (in bytes) */
+#define OMAP2_I2C_AS_LEN 128
+
+/* L4 CORE - I2C1 interface */
+static struct omap_hwmod_addr_space omap3xxx_i2c1_addr_space[] = {
+ {
+ .pa_start = 0x4807,
+ .pa_end = 0x4807 + OMAP2_I2C_AS_LEN - 1,
+ .flags = ADDR_TYPE_RT,
+ },
+};
+
+static struct omap_hwmod_ocp_if omap3_l4_core__i2c1 = {
+ .master = omap3xxx_l4_core_hwmod,
+ .slave = omap3xxx_i2c1_hwmod,
+ .clk= i2c1_ick,
+ .addr = omap3xxx_i2c1_addr_space,
+ .addr_cnt = ARRAY_SIZE(omap3xxx_i2c1_addr_space),
+ .fw = {
+ .omap2 = {
+ .l4_fw_region = OMAP3_L4_CORE_FW_I2C1_REGION,
+ .l4_prot_group = 7,
+ .flags = OMAP_FIREWALL_L4,
+ }
+ },
+ .user = OCP_USER_MPU | OCP_USER_SDMA,
+};
+
+/* L4 CORE - I2C2 interface */
+static struct omap_hwmod_addr_space omap3xxx_i2c2_addr_space[] = {
+ {
+ .pa_start = 0x48072000,
+ .pa_end = 0x48072000 + OMAP2_I2C_AS_LEN - 1,
+ .flags = ADDR_TYPE_RT,
+ },
+};
+
+static struct omap_hwmod_ocp_if omap3_l4_core__i2c2 = {
+ .master = omap3xxx_l4_core_hwmod,
+ .slave = omap3xxx_i2c2_hwmod,
+ .clk= i2c2_ick,
+ .addr = omap3xxx_i2c2_addr_space,
+ .addr_cnt = ARRAY_SIZE(omap3xxx_i2c2_addr_space),
+ .fw = {
+ .omap2 = {
+ .l4_fw_region = OMAP3_L4_CORE_FW_I2C2_REGION,
+ .l4_prot_group = 7,
+ .flags = OMAP_FIREWALL_L4,
+ }
+ },
+ .user = OCP_USER_MPU | OCP_USER_SDMA,
+};
+
+/* L4 CORE - I2C3 interface */
+static struct omap_hwmod_addr_space omap3xxx_i2c3_addr_space[] = {
+ {
+ .pa_start = 0x4806,
+ .pa_end = 0x4806 + OMAP2_I2C_AS_LEN - 1,
+ .flags = ADDR_TYPE_RT,
+ },
+};
+
+static struct omap_hwmod_ocp_if omap3_l4_core__i2c3 = {
+ .master = omap3xxx_l4_core_hwmod,
+ .slave = omap3xxx_i2c3_hwmod,
+ .clk= i2c3_ick,
+ .addr = omap3xxx_i2c3_addr_space,
+ .addr_cnt = ARRAY_SIZE(omap3xxx_i2c3_addr_space),
+ .fw = {
+ .omap2 = {
+ .l4_fw_region = OMAP3_L4_CORE_FW_I2C3_REGION,
+ .l4_prot_group = 7,
+ .flags = OMAP_FIREWALL_L4,
+ }
+ },
+ .user = OCP_USER_MPU | OCP_USER_SDMA,
+};
+
/* Slave interfaces on the L4_CORE interconnect */
static struct omap_hwmod_ocp_if *omap3xxx_l4_core_slaves[] = {
omap3xxx_l3_main__l4_core,
@@ -98,6 +183,9 @@ static struct omap_hwmod_ocp_if *omap3xxx_l4_core_slaves[] =
{
/* Master interfaces on the L4_CORE interconnect */
static struct omap_hwmod_ocp_if *omap3xxx_l4_core_masters[] = {
omap3xxx_l4_core__l4_wkup,
+ omap3_l4_core__i2c1,
+ omap3_l4_core__i2c2,
+ omap3_l4_core__i2c3,
};
/* L4 CORE */
@@ -197,6 +285,147 @@ static struct omap_hwmod omap3xxx_iva_hwmod = {
[PATCH v3 3/5] OMAP4: hwmod: add I2C hwmods for OMAP4430
Add hwmod structures for I2C controllers on OMAP4430.
Signed-off-by: Rajendra Nayak rna...@ti.com
Signed-off-by: Benoit Cousson b-cous...@ti.com
---
arch/arm/mach-omap2/omap_hwmod_44xx_data.c | 237
1 files changed, 237 insertions(+), 0 deletions(-)
diff --git a/arch/arm/mach-omap2/omap_hwmod_44xx_data.c
b/arch/arm/mach-omap2/omap_hwmod_44xx_data.c
index e20b0ee..2cb63fc 100644
--- a/arch/arm/mach-omap2/omap_hwmod_44xx_data.c
+++ b/arch/arm/mach-omap2/omap_hwmod_44xx_data.c
@@ -383,6 +383,238 @@ static struct omap_hwmod omap44xx_l4_wkup_hwmod = {
};
/*
+ * 'i2c' class
+ * multimaster high-speed i2c controller
+ */
+
+static struct omap_hwmod_class_sysconfig omap44xx_i2c_sysc = {
+ .sysc_offs = 0x0010,
+ .syss_offs = 0x0090,
+ .sysc_flags = (SYSC_HAS_ENAWAKEUP | SYSC_HAS_SIDLEMODE |
+ SYSC_HAS_CLOCKACTIVITY | SYSC_HAS_SOFTRESET |
+ SYSC_HAS_AUTOIDLE),
+ .idlemodes = (SIDLE_FORCE | SIDLE_NO | SIDLE_SMART),
+ .sysc_fields= omap_hwmod_sysc_type1,
+};
+
+static struct omap_hwmod_class omap44xx_i2c_hwmod_class = {
+ .name = i2c,
+ .sysc = omap44xx_i2c_sysc,
+};
+
+/* i2c1 */
+static struct omap_hwmod omap44xx_i2c1_hwmod;
+static struct omap_hwmod_irq_info omap44xx_i2c1_irqs[] = {
+ { .irq = 56 + OMAP44XX_IRQ_GIC_START },
+};
+
+static struct omap_hwmod_dma_info omap44xx_i2c1_sdma_reqs[] = {
+ { .name = tx, .dma_req = 26 + OMAP44XX_DMA_REQ_START },
+ { .name = rx, .dma_req = 27 + OMAP44XX_DMA_REQ_START },
+};
+
+static struct omap_hwmod_addr_space omap44xx_i2c1_addrs[] = {
+ {
+ .pa_start = 0x4807,
+ .pa_end = 0x480700ff,
+ .flags = ADDR_TYPE_RT
+ },
+};
+
+/* l4_per - i2c1 */
+static struct omap_hwmod_ocp_if omap44xx_l4_per__i2c1 = {
+ .master = omap44xx_l4_per_hwmod,
+ .slave = omap44xx_i2c1_hwmod,
+ .clk= l4_div_ck,
+ .addr = omap44xx_i2c1_addrs,
+ .addr_cnt = ARRAY_SIZE(omap44xx_i2c1_addrs),
+ .user = OCP_USER_MPU | OCP_USER_SDMA,
+};
+
+/* i2c1 slave ports */
+static struct omap_hwmod_ocp_if *omap44xx_i2c1_slaves[] = {
+ omap44xx_l4_per__i2c1,
+};
+
+static struct omap_hwmod omap44xx_i2c1_hwmod = {
+ .name = i2c1,
+ .class = omap44xx_i2c_hwmod_class,
+ .flags = HWMOD_INIT_NO_RESET,
+ .mpu_irqs = omap44xx_i2c1_irqs,
+ .mpu_irqs_cnt = ARRAY_SIZE(omap44xx_i2c1_irqs),
+ .sdma_reqs = omap44xx_i2c1_sdma_reqs,
+ .sdma_reqs_cnt = ARRAY_SIZE(omap44xx_i2c1_sdma_reqs),
+ .main_clk = i2c1_fck,
+ .prcm = {
+ .omap4 = {
+ .clkctrl_reg = OMAP4430_CM_L4PER_I2C1_CLKCTRL,
+ },
+ },
+ .slaves = omap44xx_i2c1_slaves,
+ .slaves_cnt = ARRAY_SIZE(omap44xx_i2c1_slaves),
+ .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430),
+};
+
+/* i2c2 */
+static struct omap_hwmod omap44xx_i2c2_hwmod;
+static struct omap_hwmod_irq_info omap44xx_i2c2_irqs[] = {
+ { .irq = 57 + OMAP44XX_IRQ_GIC_START },
+};
+
+static struct omap_hwmod_dma_info omap44xx_i2c2_sdma_reqs[] = {
+ { .name = tx, .dma_req = 28 + OMAP44XX_DMA_REQ_START },
+ { .name = rx, .dma_req = 29 + OMAP44XX_DMA_REQ_START },
+};
+
+static struct omap_hwmod_addr_space omap44xx_i2c2_addrs[] = {
+ {
+ .pa_start = 0x48072000,
+ .pa_end = 0x480720ff,
+ .flags = ADDR_TYPE_RT
+ },
+};
+
+/* l4_per - i2c2 */
+static struct omap_hwmod_ocp_if omap44xx_l4_per__i2c2 = {
+ .master = omap44xx_l4_per_hwmod,
+ .slave = omap44xx_i2c2_hwmod,
+ .clk= l4_div_ck,
+ .addr = omap44xx_i2c2_addrs,
+ .addr_cnt = ARRAY_SIZE(omap44xx_i2c2_addrs),
+ .user = OCP_USER_MPU | OCP_USER_SDMA,
+};
+
+/* i2c2 slave ports */
+static struct omap_hwmod_ocp_if *omap44xx_i2c2_slaves[] = {
+ omap44xx_l4_per__i2c2,
+};
+
+static struct omap_hwmod omap44xx_i2c2_hwmod = {
+ .name = i2c2,
+ .class = omap44xx_i2c_hwmod_class,
+ .flags = HWMOD_INIT_NO_RESET,
+ .mpu_irqs = omap44xx_i2c2_irqs,
+ .mpu_irqs_cnt = ARRAY_SIZE(omap44xx_i2c2_irqs),
+ .sdma_reqs = omap44xx_i2c2_sdma_reqs,
+ .sdma_reqs_cnt = ARRAY_SIZE(omap44xx_i2c2_sdma_reqs),
+ .main_clk = i2c2_fck,
+ .prcm = {
+ .omap4 = {
+ .clkctrl_reg = OMAP4430_CM_L4PER_I2C2_CLKCTRL,
+ },
+ },
+ .slaves = omap44xx_i2c2_slaves,
+ .slaves_cnt = ARRAY_SIZE(omap44xx_i2c2_slaves),
+ .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430),
+};
+
+/* i2c3 */
+static struct omap_hwmod
[PATCH v3 1/5] OMAP2xxx: hwmod: add I2C hwmods for OMAP2420, 2430
From: Paul Walmsley p...@pwsan.com
Add hwmod structures for I2C controllers on OMAP2420/2430.
Signed-off-by: Paul Walmsley p...@pwsan.com
Signed-off-by: Rajendra Nayak rna...@ti.com
Cc: Kevin Hilman khil...@deeprootsystems.com
---
arch/arm/mach-omap2/cm-regbits-24xx.h |4 +
arch/arm/mach-omap2/omap_hwmod_2420_data.c | 140 +-
arch/arm/mach-omap2/omap_hwmod_2430_data.c | 154 +++-
3 files changed, 294 insertions(+), 4 deletions(-)
diff --git a/arch/arm/mach-omap2/cm-regbits-24xx.h
b/arch/arm/mach-omap2/cm-regbits-24xx.h
index da51cc3..5986e2b 100644
--- a/arch/arm/mach-omap2/cm-regbits-24xx.h
+++ b/arch/arm/mach-omap2/cm-regbits-24xx.h
@@ -126,8 +126,12 @@
#define OMAP24XX_ST_HDQ_MASK (1 23)
#define OMAP2420_ST_I2C2_SHIFT 20
#define OMAP2420_ST_I2C2_MASK (1 20)
+#define OMAP2430_ST_I2CHS1_SHIFT 20
+#define OMAP2430_ST_I2CHS1_MASK(1 20)
#define OMAP2420_ST_I2C1_SHIFT 19
#define OMAP2420_ST_I2C1_MASK (1 19)
+#define OMAP2430_ST_I2CHS2_SHIFT 19
+#define OMAP2430_ST_I2CHS2_MASK(1 19)
#define OMAP24XX_ST_MCBSP2_SHIFT 16
#define OMAP24XX_ST_MCBSP2_MASK(1 16)
#define OMAP24XX_ST_MCBSP1_SHIFT 15
diff --git a/arch/arm/mach-omap2/omap_hwmod_2420_data.c
b/arch/arm/mach-omap2/omap_hwmod_2420_data.c
index 3cc768e..d5e1c9d 100644
--- a/arch/arm/mach-omap2/omap_hwmod_2420_data.c
+++ b/arch/arm/mach-omap2/omap_hwmod_2420_data.c
@@ -15,9 +15,12 @@
#include mach/irqs.h
#include plat/cpu.h
#include plat/dma.h
+#include plat/i2c.h
+#include plat/omap24xx.h
#include omap_hwmod_common_data.h
+#include cm-regbits-24xx.h
#include prm-regbits-24xx.h
/*
@@ -71,6 +74,8 @@ static struct omap_hwmod omap2420_l3_main_hwmod = {
};
static struct omap_hwmod omap2420_l4_wkup_hwmod;
+static struct omap_hwmod omap2420_i2c1_hwmod;
+static struct omap_hwmod omap2420_i2c2_hwmod;
/* L4_CORE - L4_WKUP interface */
static struct omap_hwmod_ocp_if omap2420_l4_core__l4_wkup = {
@@ -79,6 +84,45 @@ static struct omap_hwmod_ocp_if omap2420_l4_core__l4_wkup = {
.user = OCP_USER_MPU | OCP_USER_SDMA,
};
+/* I2C IP block address space length (in bytes) */
+#define OMAP2_I2C_AS_LEN 128
+
+/* L4 CORE - I2C1 interface */
+static struct omap_hwmod_addr_space omap2420_i2c1_addr_space[] = {
+ {
+ .pa_start = 0x4807,
+ .pa_end = 0x4807 + OMAP2_I2C_AS_LEN - 1,
+ .flags = ADDR_TYPE_RT,
+ },
+};
+
+static struct omap_hwmod_ocp_if omap2420_l4_core__i2c1 = {
+ .master = omap2420_l4_core_hwmod,
+ .slave = omap2420_i2c1_hwmod,
+ .clk= i2c1_ick,
+ .addr = omap2420_i2c1_addr_space,
+ .addr_cnt = ARRAY_SIZE(omap2420_i2c1_addr_space),
+ .user = OCP_USER_MPU | OCP_USER_SDMA,
+};
+
+/* L4 CORE - I2C2 interface */
+static struct omap_hwmod_addr_space omap2420_i2c2_addr_space[] = {
+ {
+ .pa_start = 0x48072000,
+ .pa_end = 0x48072000 + OMAP2_I2C_AS_LEN - 1,
+ .flags = ADDR_TYPE_RT,
+ },
+};
+
+static struct omap_hwmod_ocp_if omap2420_l4_core__i2c2 = {
+ .master = omap2420_l4_core_hwmod,
+ .slave = omap2420_i2c2_hwmod,
+ .clk= i2c2_ick,
+ .addr = omap2420_i2c2_addr_space,
+ .addr_cnt = ARRAY_SIZE(omap2420_i2c2_addr_space),
+ .user = OCP_USER_MPU | OCP_USER_SDMA,
+};
+
/* Slave interfaces on the L4_CORE interconnect */
static struct omap_hwmod_ocp_if *omap2420_l4_core_slaves[] = {
omap2420_l3_main__l4_core,
@@ -87,6 +131,8 @@ static struct omap_hwmod_ocp_if *omap2420_l4_core_slaves[] =
{
/* Master interfaces on the L4_CORE interconnect */
static struct omap_hwmod_ocp_if *omap2420_l4_core_masters[] = {
omap2420_l4_core__l4_wkup,
+ omap2420_l4_core__i2c1,
+ omap2420_l4_core__i2c2
};
/* L4 CORE */
@@ -165,12 +211,104 @@ static struct omap_hwmod omap2420_iva_hwmod = {
.omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP2420)
};
+/* I2C common */
+static struct omap_hwmod_class_sysconfig i2c_sysc = {
+ .rev_offs = 0x00,
+ .sysc_offs = 0x20,
+ .syss_offs = 0x10,
+ .sysc_flags = SYSC_HAS_SOFTRESET,
+ .sysc_fields= omap_hwmod_sysc_type1,
+};
+
+static struct omap_hwmod_class i2c_class = {
+ .name = i2c,
+ .sysc = i2c_sysc,
+};
+
+static struct omap_i2c_dev_attr i2c_dev_attr;
+
+/* I2C1 */
+
+static struct omap_hwmod_irq_info i2c1_mpu_irqs[] = {
+ { .irq = INT_24XX_I2C1_IRQ, },
+};
+
+static
[PATCH v3 5/5] OMAP: I2C: Convert i2c driver to use PM runtime api's
This patch converts the i2c driver to use PM runtime apis
Signed-off-by: Rajendra Nayak rna...@ti.com
Cc: Kevin Hilman khil...@deeprootsystems.com
Cc: Paul Walmsley p...@pwsan.com
---
drivers/i2c/busses/i2c-omap.c | 67 +
1 files changed, 21 insertions(+), 46 deletions(-)
diff --git a/drivers/i2c/busses/i2c-omap.c b/drivers/i2c/busses/i2c-omap.c
index 7674efb..126bde9 100644
--- a/drivers/i2c/busses/i2c-omap.c
+++ b/drivers/i2c/busses/i2c-omap.c
@@ -39,6 +39,7 @@
#include linux/io.h
#include linux/slab.h
#include linux/i2c-omap.h
+#include linux/pm_runtime.h
/* I2C controller revisions */
#define OMAP_I2C_REV_2 0x20
@@ -175,8 +176,6 @@ struct omap_i2c_dev {
void __iomem*base; /* virtual */
int irq;
int reg_shift; /* bit shift for I2C register
addresses */
- struct clk *iclk; /* Interface clock */
- struct clk *fclk; /* Functional clock */
struct completion cmd_complete;
struct resource *ioarea;
u32 latency;/* maximum mpu wkup latency */
@@ -265,45 +264,18 @@ static inline u16 omap_i2c_read_reg(struct omap_i2c_dev
*i2c_dev, int reg)
(i2c_dev-regs[reg] i2c_dev-reg_shift));
}
-static int __init omap_i2c_get_clocks(struct omap_i2c_dev *dev)
+static void omap_i2c_unidle(struct omap_i2c_dev *dev)
{
- int ret;
+ struct platform_device *pdev;
+ struct omap_i2c_bus_platform_data *pdata;
- dev-iclk = clk_get(dev-dev, ick);
- if (IS_ERR(dev-iclk)) {
- ret = PTR_ERR(dev-iclk);
- dev-iclk = NULL;
- return ret;
- }
+ WARN_ON(!dev-idle);
- dev-fclk = clk_get(dev-dev, fck);
- if (IS_ERR(dev-fclk)) {
- ret = PTR_ERR(dev-fclk);
- if (dev-iclk != NULL) {
- clk_put(dev-iclk);
- dev-iclk = NULL;
- }
- dev-fclk = NULL;
- return ret;
- }
+ pdev = to_platform_device(dev-dev);
+ pdata = pdev-dev.platform_data;
- return 0;
-}
+ pm_runtime_get_sync(pdev-dev);
-static void omap_i2c_put_clocks(struct omap_i2c_dev *dev)
-{
- clk_put(dev-fclk);
- dev-fclk = NULL;
- clk_put(dev-iclk);
- dev-iclk = NULL;
-}
-
-static void omap_i2c_unidle(struct omap_i2c_dev *dev)
-{
- WARN_ON(!dev-idle);
-
- clk_enable(dev-iclk);
- clk_enable(dev-fclk);
if (cpu_is_omap34xx()) {
omap_i2c_write_reg(dev, OMAP_I2C_CON_REG, 0);
omap_i2c_write_reg(dev, OMAP_I2C_PSC_REG, dev-pscstate);
@@ -326,10 +298,15 @@ static void omap_i2c_unidle(struct omap_i2c_dev *dev)
static void omap_i2c_idle(struct omap_i2c_dev *dev)
{
+ struct platform_device *pdev;
+ struct omap_i2c_bus_platform_data *pdata;
u16 iv;
WARN_ON(dev-idle);
+ pdev = to_platform_device(dev-dev);
+ pdata = pdev-dev.platform_data;
+
dev-iestate = omap_i2c_read_reg(dev, OMAP_I2C_IE_REG);
if (dev-rev = OMAP_I2C_REV_ON_4430)
omap_i2c_write_reg(dev, OMAP_I2C_IRQENABLE_CLR, 1);
@@ -345,8 +322,8 @@ static void omap_i2c_idle(struct omap_i2c_dev *dev)
omap_i2c_read_reg(dev, OMAP_I2C_STAT_REG);
}
dev-idle = 1;
- clk_disable(dev-fclk);
- clk_disable(dev-iclk);
+
+ pm_runtime_put_sync(pdev-dev);
}
static int omap_i2c_init(struct omap_i2c_dev *dev)
@@ -356,6 +333,7 @@ static int omap_i2c_init(struct omap_i2c_dev *dev)
unsigned long fclk_rate = 1200;
unsigned long timeout;
unsigned long internal_clk = 0;
+ struct clk *fclk;
if (dev-rev = OMAP_I2C_REV_2) {
/* Disable I2C controller before soft reset */
@@ -414,7 +392,8 @@ static int omap_i2c_init(struct omap_i2c_dev *dev)
* always returns 12MHz for the functional clock, we can
* do this bit unconditionally.
*/
- fclk_rate = clk_get_rate(dev-fclk);
+ fclk = clk_get(dev-dev, fck);
+ fclk_rate = clk_get_rate(fclk);
/* TRM for 5912 says the I2C clock must be prescaled to be
* between 7 - 12 MHz. The XOR input clock is typically
@@ -443,7 +422,8 @@ static int omap_i2c_init(struct omap_i2c_dev *dev)
internal_clk = 9600;
else
internal_clk = 4000;
- fclk_rate = clk_get_rate(dev-fclk) / 1000;
+ fclk = clk_get(dev-dev, fck);
+ fclk_rate = clk_get_rate(fclk) / 1000;
/* Compute prescaler divisor */
psc = fclk_rate / internal_clk;
@@ -1046,14 +1026,12 @@ omap_i2c_probe(struct platform_device
[PATCH] OMAP: hwmod: Enable module wakeup if in smartidle
If a module's OCP slave port is programmed to be in smartidle, its also necessary that they have module level wakeup enabled. Update _sysc_enable in hwmod framework to do this. Signed-off-by: Rajendra Nayak rna...@ti.com Signed-off-by: Partha Basak p-bas...@ti.com Signed-off-by: Benoît Cousson b-cous...@ti.com Cc: Paul Walmsley p...@pwsan.com Cc: Kevin Hilman khil...@deeprootsystems.com --- arch/arm/mach-omap2/omap_hwmod.c |6 -- 1 files changed, 4 insertions(+), 2 deletions(-) diff --git a/arch/arm/mach-omap2/omap_hwmod.c b/arch/arm/mach-omap2/omap_hwmod.c index cb911d7..d82e7e8 100644 --- a/arch/arm/mach-omap2/omap_hwmod.c +++ b/arch/arm/mach-omap2/omap_hwmod.c @@ -659,8 +659,6 @@ static void _sysc_enable(struct omap_hwmod *oh) _set_module_autoidle(oh, idlemode, v); } - /* XXX OCP ENAWAKEUP bit? */ - /* * XXX The clock framework should handle this, by * calling into this code. But this must wait until the @@ -671,6 +669,10 @@ static void _sysc_enable(struct omap_hwmod *oh) _set_clockactivity(oh, oh-class-sysc-clockact, v); _write_sysconfig(v, oh); + + /* If slave is in SMARTIDLE, also enable wakeup */ + if ((sf SYSC_HAS_SIDLEMODE) !(oh-flags HWMOD_SWSUP_SIDLE)) + _enable_wakeup(oh); } /** -- 1.7.0.4 -- To unsubscribe from this list: send the line unsubscribe linux-omap in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
Re: [PATCH] OMAP4: HSMMC cmd line reset change
* Madhusudhan madhu...@ti.com [100920 09:06]: Please don't use cpu_is_omap tests in the drivers, drivers should be generic. Instead, just pass a feature flag in the platform_data for this feature like HSMMC_REVERSE_RESET_LOGIC or similar. This is not a feature. It is like an ERRATA fix. I am yet to receive an errata number though. How about dealing with this like an errata fix similar to the way in arch/mach-omap2/serial.c done for the uart case? Yes setting some HSMMC_ERRATA_XYZ flag works too. The mmc ip revision will not help because it really does not change to distinguish such issues. OK. Then I guess your only option is to pass the errata flag in the platform_data. Regards, Tony -- To unsubscribe from this list: send the line unsubscribe linux-omap in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
Re: [PATCH RESEND v4 1/4] omap3: nand: prefetch in irq mode support
* Ghorai, Sukumar s-gho...@ti.com [100918 11:16]: This handler should be in gpmc.c as it may be needed for other GPMC connected devices on the same system. You can use chained irq handlers to allow all the drivers to use the interrupt then. [Ghorai] You mean as this function used the gpmc-irq number in nand file, so handler should move to gpmc.c file? Yes, other GPMC connected drivers may want to use it too for their chip selects. 1. For that we need to add one io-struct (to keep io buffer status) in gpmc.c; 2. Also need help how to sync between gpmc.c/omap_nand_irq() and omap2.c/omap_write_buf_irq_pref(), men how read/write function know that work done in interrupt-context? Or you prefer to move the complete IO function (omap_read/write_buf_irq_pref) to gpmc.c? 3. gpmc does not now about the read and write address that's applicable for NAND. So how to pass the IO address from omap2.c to gpmc.c, interrupt handler? Hmm, I don't follow you. You can have the interrupt handler both in gpmc.c and in the nand driver with set_irq_chained_handler() and set_irq_data(). We are doing that already in lots of places, like gpio.c and twl4030-irq.c. So, please let me know your suggestion again such that I can post this time itself. Otherwise again it will miss from coming release, this was posted/reviewed for last release too. And suggest to void repeating of missing release window again. Yes would be nice to get this patch in, to me it seems that this issue is the only blocker. It should be pretty easy change to make. Regards, Tony -- To unsubscribe from this list: send the line unsubscribe linux-omap in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
SMP_ON_UP? - Build break with custom minimal defconfig
Hi all, I was trying to use current linux-omap master to put together a custom minimal defconfig for a beagleboard, and I'm seeing a compile error: CC init/main.o In file included from include/linux/highmem.h:9, from include/linux/pagemap.h:10, from include/linux/mempolicy.h:70, from init/main.c:50: /home/userdata/a0393673/kernels/tony/linux-omap-2.6/arch/arm/include/asm/cacheflush.h: In function '__flush_icache_all': /home/userdata/a0393673/kernels/tony/linux-omap-2.6/arch/arm/include/asm/cacheflush.h:332: error: implicit declaration of function '__flush_icache_preferred' make[1]: *** [init/main.o] Error 1 make: *** [init] Error 2 I think this is related to the recent SMP_ON_UP patches. The reduced .config I'm using (generated using `make savedefconfig`) is below. I'll try and debug in a while, but just reporting for now. - Anand == CUT HERE == CONFIG_EXPERIMENTAL=y CONFIG_SYSVIPC=y CONFIG_BSD_PROCESS_ACCT=y CONFIG_IKCONFIG=y CONFIG_IKCONFIG_PROC=y CONFIG_LOG_BUF_SHIFT=16 CONFIG_BLK_DEV_INITRD=y CONFIG_EMBEDDED=y # CONFIG_SYSCTL_SYSCALL is not set CONFIG_KALLSYMS_EXTRA_PASS=y CONFIG_PERF_EVENTS=y CONFIG_SLAB=y CONFIG_MODULES=y CONFIG_MODULE_FORCE_LOAD=y CONFIG_MODULE_UNLOAD=y CONFIG_MODULE_FORCE_UNLOAD=y CONFIG_MODVERSIONS=y CONFIG_MODULE_SRCVERSION_ALL=y # CONFIG_BLK_DEV_BSG is not set CONFIG_ARCH_OMAP=y CONFIG_OMAP_RESET_CLOCKS=y CONFIG_OMAP_MUX_DEBUG=y CONFIG_OMAP_DM_TIMER=y # CONFIG_ARCH_OMAP2PLUS_TYPICAL is not set # CONFIG_ARCH_OMAP2 is not set # CONFIG_ARCH_OMAP4 is not set # CONFIG_MACH_DEVKIT8000 is not set # CONFIG_MACH_OMAP_LDP is not set # CONFIG_MACH_OVERO is not set # CONFIG_MACH_OMAP3EVM is not set # CONFIG_MACH_OMAP3517EVM is not set # CONFIG_MACH_OMAP3_PANDORA is not set # CONFIG_MACH_OMAP3_TOUCHBOOK is not set # CONFIG_MACH_OMAP_3430SDP is not set # CONFIG_MACH_NOKIA_RX51 is not set # CONFIG_MACH_OMAP_ZOOM2 is not set # CONFIG_MACH_OMAP_ZOOM3 is not set # CONFIG_MACH_CM_T35 is not set # CONFIG_MACH_IGEP0020 is not set # CONFIG_MACH_SBC3530 is not set # CONFIG_MACH_OMAP_3630SDP is not set CONFIG_ARM_THUMBEE=y CONFIG_NO_HZ=y CONFIG_HIGH_RES_TIMERS=y CONFIG_AEABI=y CONFIG_LEDS=y CONFIG_ZBOOT_ROM_TEXT=0x0 CONFIG_ZBOOT_ROM_BSS=0x0 CONFIG_CMDLINE=root=/dev/mmcblk0p2 rootwait console=ttyS2,115200 CONFIG_KEXEC=y CONFIG_FPE_NWFPE=y CONFIG_VFP=y CONFIG_NEON=y CONFIG_BINFMT_MISC=y CONFIG_UEVENT_HELPER_PATH=/sbin/hotplug CONFIG_MTD=y CONFIG_MTD_CONCAT=y CONFIG_MTD_CMDLINE_PARTS=y CONFIG_MTD_CHAR=y CONFIG_MTD_BLOCK=y CONFIG_MTD_OOPS=y CONFIG_MTD_CFI=y CONFIG_MTD_CFI_INTELEXT=y CONFIG_MTD_NAND=y CONFIG_MTD_NAND_OMAP2=y CONFIG_MTD_ONENAND=y CONFIG_MTD_ONENAND_VERIFY_WRITE=y CONFIG_MTD_ONENAND_OMAP2=y CONFIG_MTD_UBI=y CONFIG_BLK_DEV_LOOP=y CONFIG_BLK_DEV_RAM=y CONFIG_BLK_DEV_RAM_SIZE=16384 CONFIG_EEPROM_LEGACY=y CONFIG_SCSI=y CONFIG_BLK_DEV_SD=y CONFIG_SCSI_MULTI_LUN=y CONFIG_SCSI_SCAN_ASYNC=y # CONFIG_INPUT_MOUSEDEV is not set CONFIG_INPUT_EVDEV=y # CONFIG_INPUT_KEYBOARD is not set # CONFIG_INPUT_MOUSE is not set CONFIG_INPUT_MISC=y CONFIG_INPUT_TWL4030_PWRBUTTON=y CONFIG_SERIO_LIBPS2=y CONFIG_VT_HW_CONSOLE_BINDING=y CONFIG_SERIAL_8250=y CONFIG_SERIAL_8250_CONSOLE=y CONFIG_SERIAL_8250_NR_UARTS=32 CONFIG_SERIAL_8250_EXTENDED=y CONFIG_SERIAL_8250_MANY_PORTS=y CONFIG_SERIAL_8250_SHARE_IRQ=y CONFIG_SERIAL_8250_DETECT_IRQ=y CONFIG_SERIAL_8250_RSA=y # CONFIG_LEGACY_PTYS is not set CONFIG_HW_RANDOM=y CONFIG_I2C=y CONFIG_I2C_CHARDEV=y CONFIG_I2C_OMAP=y CONFIG_GPIO_SYSFS=y CONFIG_GPIO_TWL4030=y CONFIG_WATCHDOG=y CONFIG_OMAP_WATCHDOG=y CONFIG_TWL4030_WATCHDOG=y CONFIG_TWL4030_CORE=y CONFIG_TWL4030_POWER=y CONFIG_REGULATOR=y CONFIG_REGULATOR_TWL4030=y CONFIG_REGULATOR_TPS65023=y CONFIG_REGULATOR_TPS6507X=y CONFIG_USB_GADGET=y CONFIG_USB_GADGET_DEBUG=y CONFIG_USB_GADGET_DEBUG_FILES=y CONFIG_USB_GADGET_DEBUG_FS=y CONFIG_USB_FILE_STORAGE=m CONFIG_TWL4030_USB=y CONFIG_MMC=y CONFIG_MMC_UNSAFE_RESUME=y CONFIG_SDIO_UART=y CONFIG_MMC_OMAP=y CONFIG_MMC_OMAP_HS=y CONFIG_NEW_LEDS=y CONFIG_LEDS_CLASS=y CONFIG_LEDS_GPIO=y CONFIG_LEDS_TRIGGERS=y CONFIG_LEDS_TRIGGER_TIMER=y CONFIG_LEDS_TRIGGER_HEARTBEAT=y CONFIG_LEDS_TRIGGER_DEFAULT_ON=y CONFIG_RTC_CLASS=y CONFIG_RTC_DRV_TWL4030=y CONFIG_EXT2_FS=y CONFIG_EXT3_FS=y # CONFIG_EXT3_FS_XATTR is not set CONFIG_QUOTA=y CONFIG_QFMT_V2=y CONFIG_MSDOS_FS=y CONFIG_VFAT_FS=y CONFIG_TMPFS=y CONFIG_JFFS2_FS=y CONFIG_JFFS2_SUMMARY=y CONFIG_JFFS2_FS_XATTR=y CONFIG_JFFS2_COMPRESSION_OPTIONS=y CONFIG_JFFS2_LZO=y CONFIG_JFFS2_RUBIN=y CONFIG_UBIFS_FS=y CONFIG_CRAMFS=y CONFIG_PARTITION_ADVANCED=y CONFIG_NLS_CODEPAGE_437=y CONFIG_NLS_ISO8859_1=y CONFIG_PRINTK_TIME=y CONFIG_MAGIC_SYSRQ=y CONFIG_DEBUG_FS=y CONFIG_DEBUG_KERNEL=y CONFIG_SCHEDSTATS=y CONFIG_TIMER_STATS=y CONFIG_PROVE_LOCKING=y CONFIG_DEBUG_SPINLOCK_SLEEP=y # CONFIG_DEBUG_BUGVERBOSE is not set CONFIG_DEBUG_INFO=y # CONFIG_RCU_CPU_STALL_DETECTOR is not set CONFIG_KEYS=y CONFIG_SECURITY=y CONFIG_CRYPTO_CBC=y CONFIG_CRYPTO_ECB=y CONFIG_CRYPTO_MD5=y
Re: SMP_ON_UP? - Build break with custom minimal defconfig
* Gadiyar, Anand gadi...@ti.com [100921 08:41]: Hi all, I was trying to use current linux-omap master to put together a custom minimal defconfig for a beagleboard, and I'm seeing a compile error: CC init/main.o In file included from include/linux/highmem.h:9, from include/linux/pagemap.h:10, from include/linux/mempolicy.h:70, from init/main.c:50: /home/userdata/a0393673/kernels/tony/linux-omap-2.6/arch/arm/include/asm/cacheflush.h: In function '__flush_icache_all': /home/userdata/a0393673/kernels/tony/linux-omap-2.6/arch/arm/include/asm/cacheflush.h:332: error: implicit declaration of function '__flush_icache_preferred' make[1]: *** [init/main.o] Error 1 make: *** [init] Error 2 I think this is related to the recent SMP_ON_UP patches. The reduced .config I'm using (generated using `make savedefconfig`) is below. I'll try and debug in a while, but just reporting for now. Yes that sounds like a bug in a smp_on_up related patch. Will try your defconfig here too. Thanks, Tony -- To unsubscribe from this list: send the line unsubscribe linux-omap in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
Re: SMP_ON_UP? - Build break with custom minimal defconfig
CC init/main.o In file included from include/linux/highmem.h:9, from include/linux/pagemap.h:10, from include/linux/mempolicy.h:70, from init/main.c:50: /home/userdata/a0393673/kernels/tony/linux-omap-2.6/arch/arm/include/asm/cacheflush.h: In function '__flush_icache_all': /home/userdata/a0393673/kernels/tony/linux-omap-2.6/arch/arm/include/asm/cacheflush.h:332: error: implicit declaration of function '__flush_icache_preferred' make[1]: *** [init/main.o] Error 1 make: *** [init] Error 2 I think this is related to the recent SMP_ON_UP patches. The reduced .config I'm using (generated using `make savedefconfig`) is below. I'll try and debug in a while, but just reporting for now. Yes that sounds like a bug in a smp_on_up related patch. Will try your defconfig here too. Found it - it's due to a typo in the defines. Patch coming up in a few minutes. - Anand -- To unsubscribe from this list: send the line unsubscribe linux-omap in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
Re: [PATCH 00/11] OMAP: Serial: Add omap-serial driver with platform support
SNIP Also the patch series updates various low level platform specific serial data to support omap-uarts with hwmod framework and adds support for uart4 on OMAP3630. This series is missing a couple things to work more broadly on all boards, specifically 3630-based boards. First, due to the current UART idle code base, you need to enable all OMAP UARTs 36xx. Enabling less than all OMAP UARTs will break the current idle code. As we discussed, the next phase we will move the idle management from this serial.c hackery into the omap-serial driver iteself. Until then, you need to call omap_serial_init() on Zoom2/Zoom3. Patch below[1] Also, you previously had a patch that updated omap_uart_idle_init() to handle 36xx and specifically UART4. Without that, struct omap_uart_state is not setup correctly for UART4, and thus cannot be properly idled on 3630. ok fine, I will I incorporate initialize all uarts patch for zoom boards. Are you referring to this patch? https://patchwork.kernel.org/patch/108066/ Is this still needed if we have initialized all uarts? This patch might not needed if we have initialized all uarts right? Right. We don't need the above patchwork patch if all UARTs are initialized. The other patch I was referring to was the one that added UART4 support to omap_uart_idle_init() (added the wk_en, wk_st, padconf etc.) I had a pending request for you to drop the muxmode from that patch, but the rest of it was still needed. Also, it's been a while since I tested this on OMAP2. Please re-test on OMAP2 with the whole series. Also, please report here the other platforms this was tested on. The final needs to be tested on OMAP2, 3 and 4 before merge. Yes Sure, Just FYI this patch series was also tested on omap2,3,4. OK, be sure to test Zoom3, because my testing on Zoom3 led to a crash as soon as idle was enabled due to the missing init of all UARTs. This patch series applied on top of pm-core branch commit 4c1f85cdc189d41ee53c1bc3957a908c91cffc00 Merge: ca1684b 96c4e27 Author: Kevin Hilman khil...@deeprootsystems.com Date: Thu Sep 16 15:29:06 2010 -0700 with below changes: 1) if (uart-timeout) uart-timeout = (30 * HZ); 2) #define DEFAULT_TIMEOUT 5 [temporary change for timeout] I see ret count getting incremented on ZOOM3 even without UART4 support to omap_uart_idle_init() patch. I dont see any crash. Logs Snip: / # mount -t debugfs debugfs /debug / # / # / # echo 1 /debug/pm_debug/sleep_while_idle / # cat /debug/pm_debug/count usbhost_pwrdm (RET),OFF:0,RET:1,INA:0,ON:1,RET-LOGIC-OFF:0,RET-MEMBANK1-OFF:0 sgx_pwrdm (OFF),OFF:1,RET:0,INA:0,ON:1,RET-LOGIC-OFF:0,RET-MEMBANK1-OFF:0 per_pwrdm (ON),OFF:0,RET:773,INA:0,ON:774,RET-LOGIC-OFF:0,RET-MEMBANK1-OFF:0 dss_pwrdm (RET),OFF:0,RET:1,INA:0,ON:1,RET-LOGIC-OFF:0,RET-MEMBANK1-OFF:0 cam_pwrdm (RET),OFF:0,RET:1,INA:0,ON:1,RET-LOGIC-OFF:0,RET-MEMBANK1-OFF:0 core_pwrdm (ON),OFF:0,RET:794,INA:0,ON:795,RET-LOGIC-OFF:0,RET-MEMBANK1-OFF:0,RET-MEMBANK2-OFF:0 neon_pwrdm (ON),OFF:0,RET:796,INA:0,ON:797,RET-LOGIC-OFF:0 mpu_pwrdm (ON),OFF:0,RET:796,INA:0,ON:797,RET-LOGIC-OFF:0,RET-MEMBANK1-OFF:0 iva2_pwrdm (RET),OFF:0,RET:1,INA:0,ON:1,RET-LOGIC-OFF:0,RET-MEMBANK1-OFF:0,RET-MEMBANK2-OFF:0,RET-MEMBANK3-OFF:0,RET-MEMBANK4-OFF:0 per_clkdm-per_pwrdm (11) usbhost_clkdm-usbhost_pwrdm (0) cam_clkdm-cam_pwrdm (0) dss_clkdm-dss_pwrdm (0) core_l4_clkdm-core_pwrdm (9) core_l3_clkdm-core_pwrdm (5) d2d_clkdm-core_pwrdm (0) sgx_clkdm-sgx_pwrdm (0) iva2_clkdm-iva2_pwrdm (0) neon_clkdm-neon_pwrdm (0) mpu_clkdm-mpu_pwrdm (0) prm_clkdm-wkup_pwrdm (0) cm_clkdm-core_pwrdm (0) -- --- Regards, Govindraj.R -- To unsubscribe from this list: send the line unsubscribe linux-omap in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
[PATCH 1/5] omap3: Introduce CompuLab CM-T3517 module.
Add basic suppot, enable uart and led.
Signed-off-by: Igor Grinberg grinb...@compulab.co.il
---
arch/arm/mach-omap2/Kconfig |7 ++
arch/arm/mach-omap2/Makefile |1 +
arch/arm/mach-omap2/board-cm-t3517.c | 109 ++
arch/arm/plat-omap/include/plat/uncompress.h |1 +
4 files changed, 118 insertions(+), 0 deletions(-)
create mode 100644 arch/arm/mach-omap2/board-cm-t3517.c
diff --git a/arch/arm/mach-omap2/Kconfig b/arch/arm/mach-omap2/Kconfig
index bb85f24..9ceb72b 100644
--- a/arch/arm/mach-omap2/Kconfig
+++ b/arch/arm/mach-omap2/Kconfig
@@ -216,6 +216,13 @@ config MACH_CM_T35
select OMAP_PACKAGE_CUS
select OMAP_MUX
+config MACH_CM_T3517
+ bool CompuLab CM-T3517 module
+ depends on ARCH_OMAP3
+ default y
+ select OMAP_PACKAGE_CBB
+ select OMAP_MUX
+
config MACH_IGEP0020
bool IGEP v2 board
depends on ARCH_OMAP3
diff --git a/arch/arm/mach-omap2/Makefile b/arch/arm/mach-omap2/Makefile
index 88d3a1e..7d991d0 100644
--- a/arch/arm/mach-omap2/Makefile
+++ b/arch/arm/mach-omap2/Makefile
@@ -146,6 +146,7 @@ obj-$(CONFIG_MACH_OMAP_3630SDP) +=
board-3630sdp.o \
hsmmc.o
obj-$(CONFIG_MACH_CM_T35) += board-cm-t35.o \
hsmmc.o
+obj-$(CONFIG_MACH_CM_T3517)+= board-cm-t3517.o
obj-$(CONFIG_MACH_IGEP0020)+= board-igep0020.o \
hsmmc.o
obj-$(CONFIG_MACH_OMAP3_TOUCHBOOK) += board-omap3touchbook.o \
diff --git a/arch/arm/mach-omap2/board-cm-t3517.c
b/arch/arm/mach-omap2/board-cm-t3517.c
new file mode 100644
index 000..507d2d5
--- /dev/null
+++ b/arch/arm/mach-omap2/board-cm-t3517.c
@@ -0,0 +1,109 @@
+/*
+ * linux/arch/arm/mach-omap2/board-cm-t3517.c
+ *
+ * Support for the CompuLab CM-T3517 modules
+ *
+ * Copyright (C) 2010 CompuLab, Ltd.
+ * Author: Igor Grinberg grinb...@compulab.co.il
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * version 2 as published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful, but
+ * WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
+ * General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA
+ * 02110-1301 USA
+ *
+ */
+
+#include linux/kernel.h
+#include linux/init.h
+#include linux/platform_device.h
+#include linux/gpio.h
+#include linux/leds.h
+
+#include asm/mach-types.h
+#include asm/mach/arch.h
+#include asm/mach/map.h
+
+#include plat/board.h
+#include plat/common.h
+#include plat/control.h
+
+#include mux.h
+
+#if defined(CONFIG_LEDS_GPIO) || defined(CONFIG_LEDS_GPIO_MODULE)
+static struct gpio_led cm_t3517_leds[] = {
+ [0] = {
+ .gpio = 186,
+ .name = cm-t3517:green,
+ .default_trigger= heartbeat,
+ .active_low = 0,
+ },
+};
+
+static struct gpio_led_platform_data cm_t3517_led_pdata = {
+ .num_leds = ARRAY_SIZE(cm_t3517_leds),
+ .leds = cm_t3517_leds,
+};
+
+static struct platform_device cm_t3517_led_device = {
+ .name = leds-gpio,
+ .id = -1,
+ .dev= {
+ .platform_data = cm_t3517_led_pdata,
+ },
+};
+
+static void __init cm_t3517_init_leds(void)
+{
+ platform_device_register(cm_t3517_led_device);
+}
+#else
+static inline void cm_t3517_init_leds(void) {}
+#endif
+
+
+static struct omap_board_config_kernel cm_t3517_config[] __initdata = {
+};
+
+static void __init cm_t3517_init_irq(void)
+{
+ omap_board_config = cm_t3517_config;
+ omap_board_config_size = ARRAY_SIZE(cm_t3517_config);
+
+ omap2_init_common_hw(NULL, NULL);
+ omap_init_irq();
+ omap_gpio_init();
+}
+
+static struct omap_board_mux board_mux[] __initdata = {
+ /* GPIO186 - Green LED */
+ OMAP3_MUX(SYS_CLKOUT2, OMAP_MUX_MODE4 | OMAP_PIN_OUTPUT),
+
+ { .reg_offset = OMAP_MUX_TERMINATOR },
+};
+
+static void __init cm_t3517_init(void)
+{
+ omap3_mux_init(board_mux, OMAP_PACKAGE_CBB);
+ omap_serial_init();
+ cm_t3517_init_leds();
+}
+
+MACHINE_START(CM_T3517, Compulab CM-T3517)
+ .phys_io= 0x4800,
+ .io_pg_offst= ((0xd800) 18) 0xfffc,
+ .boot_params= 0x8100,
+ .map_io = omap3_map_io,
+ .reserve= omap_reserve,
+ .init_irq = cm_t3517_init_irq,
+ .init_machine = cm_t3517_init,
+ .timer = omap_timer,
[PATCH 0/5] Support for CompuLab CM-T3517 modules
CompuLab CM-T3517 module is based on AM3517 (Sitara) SoC. CM-T3517 supports on-board 256/128MB DDR2 DRAM, 512/128MB NAND flash, WIFI-BlueTooth combo chip, USB HUB, AC97 Codec, TouchScreen controller, RTC. This patch series add a basic support for CM-T3517 and some of its peripheral devices. Based on: commit 44ed8ecfeb1f639c59897de3f551f50e3f0fd52e Merge: 96542e6 0cbe681 Author: Tony Lindgren t...@atomide.com Date: Mon Sep 20 15:14:25 2010 -0700 Linux-omap rebuilt: Merged in the smp-on-up patches for testing Igor Grinberg (5): omap3: Introduce CompuLab CM-T3517 module. omap3: cm-t3517: add support for v3020 rtc. omap3: cm-t3517: add support for usb host. omap3: cm-t3517: add support for NAND flash omap3: cm-t3517: add support for TI HECC arch/arm/mach-omap2/Kconfig |7 + arch/arm/mach-omap2/Makefile |1 + arch/arm/mach-omap2/board-cm-t3517.c | 294 ++ arch/arm/plat-omap/include/plat/uncompress.h |1 + 4 files changed, 303 insertions(+), 0 deletions(-) create mode 100644 arch/arm/mach-omap2/board-cm-t3517.c -- To unsubscribe from this list: send the line unsubscribe linux-omap in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
[PATCH 3/5] omap3: cm-t3517: add support for usb host.
add support for hsusb host ports 1, 2 and on-module usb hub.
Signed-off-by: Igor Grinberg grinb...@compulab.co.il
---
arch/arm/mach-omap2/board-cm-t3517.c | 50 ++
1 files changed, 50 insertions(+), 0 deletions(-)
diff --git a/arch/arm/mach-omap2/board-cm-t3517.c
b/arch/arm/mach-omap2/board-cm-t3517.c
index 2b41c6d..2c7082d 100644
--- a/arch/arm/mach-omap2/board-cm-t3517.c
+++ b/arch/arm/mach-omap2/board-cm-t3517.c
@@ -25,6 +25,7 @@
#include linux/kernel.h
#include linux/init.h
#include linux/platform_device.h
+#include linux/delay.h
#include linux/gpio.h
#include linux/leds.h
#include linux/rtc-v3020.h
@@ -36,6 +37,7 @@
#include plat/board.h
#include plat/common.h
#include plat/control.h
+#include plat/usb.h
#include mux.h
@@ -100,6 +102,47 @@ static void __init cm_t3517_init_rtc(void)
static inline void cm_t3517_init_rtc(void) {}
#endif
+#if defined(CONFIG_USB_EHCI_HCD) || defined(CONFIG_USB_EHCI_HCD_MODULE)
+#define HSUSB1_RESET_GPIO (146)
+#define HSUSB2_RESET_GPIO (147)
+#define USB_HUB_RESET_GPIO (152)
+
+static struct ehci_hcd_omap_platform_data cm_t3517_ehci_pdata __initdata = {
+ .port_mode[0] = EHCI_HCD_OMAP_MODE_PHY,
+ .port_mode[1] = EHCI_HCD_OMAP_MODE_PHY,
+ .port_mode[2] = EHCI_HCD_OMAP_MODE_UNKNOWN,
+
+ .phy_reset = true,
+ .reset_gpio_port[0] = HSUSB1_RESET_GPIO,
+ .reset_gpio_port[1] = HSUSB2_RESET_GPIO,
+ .reset_gpio_port[2] = -EINVAL,
+};
+
+static int cm_t3517_init_usbh(void)
+{
+ int err;
+
+ err = gpio_request(USB_HUB_RESET_GPIO, usb hub rst);
+ if (err) {
+ pr_err(CM-T3517: usb hub rst gpio request failed: %d\n, err);
+ } else {
+ gpio_direction_output(USB_HUB_RESET_GPIO, 0);
+ udelay(10);
+ gpio_set_value(USB_HUB_RESET_GPIO, 1);
+ msleep(1);
+ }
+
+ usb_ehci_init(cm_t3517_ehci_pdata);
+
+ return 0;
+}
+#else
+static inline int cm_t3517_init_usbh(void)
+{
+ return 0;
+}
+#endif
+
static struct omap_board_config_kernel cm_t3517_config[] __initdata = {
};
@@ -121,6 +164,12 @@ static struct omap_board_mux board_mux[] __initdata = {
OMAP3_MUX(MCBSP4_DX, OMAP_MUX_MODE4 | OMAP_PIN_INPUT),
OMAP3_MUX(MCBSP_CLKS, OMAP_MUX_MODE4 | OMAP_PIN_INPUT),
OMAP3_MUX(UART3_CTS_RCTX, OMAP_MUX_MODE4 | OMAP_PIN_INPUT),
+ /* HSUSB1 RESET */
+ OMAP3_MUX(UART2_TX, OMAP_MUX_MODE4 | OMAP_PIN_OUTPUT),
+ /* HSUSB2 RESET */
+ OMAP3_MUX(UART2_RX, OMAP_MUX_MODE4 | OMAP_PIN_OUTPUT),
+ /* CM-T3517 USB HUB nRESET */
+ OMAP3_MUX(MCBSP4_CLKX, OMAP_MUX_MODE4 | OMAP_PIN_OUTPUT),
{ .reg_offset = OMAP_MUX_TERMINATOR },
};
@@ -131,6 +180,7 @@ static void __init cm_t3517_init(void)
omap_serial_init();
cm_t3517_init_leds();
cm_t3517_init_rtc();
+ cm_t3517_init_usbh();
}
MACHINE_START(CM_T3517, Compulab CM-T3517)
--
1.7.1
--
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[PATCH 2/5] omap3: cm-t3517: add support for v3020 rtc.
add support for v3020 rtc.
Signed-off-by: Igor Grinberg grinb...@compulab.co.il
---
arch/arm/mach-omap2/board-cm-t3517.c | 36 ++
1 files changed, 36 insertions(+), 0 deletions(-)
diff --git a/arch/arm/mach-omap2/board-cm-t3517.c
b/arch/arm/mach-omap2/board-cm-t3517.c
index 507d2d5..2b41c6d 100644
--- a/arch/arm/mach-omap2/board-cm-t3517.c
+++ b/arch/arm/mach-omap2/board-cm-t3517.c
@@ -27,6 +27,7 @@
#include linux/platform_device.h
#include linux/gpio.h
#include linux/leds.h
+#include linux/rtc-v3020.h
#include asm/mach-types.h
#include asm/mach/arch.h
@@ -69,6 +70,35 @@ static void __init cm_t3517_init_leds(void)
static inline void cm_t3517_init_leds(void) {}
#endif
+#if defined(CONFIG_RTC_DRV_V3020) || defined(CONFIG_RTC_DRV_V3020_MODULE)
+#define RTC_IO_GPIO(153)
+#define RTC_WR_GPIO(154)
+#define RTC_RD_GPIO(160)
+#define RTC_CS_GPIO(163)
+
+struct v3020_platform_data cm_t3517_v3020_pdata = {
+ .use_gpio = 1,
+ .gpio_cs= RTC_CS_GPIO,
+ .gpio_wr= RTC_WR_GPIO,
+ .gpio_rd= RTC_RD_GPIO,
+ .gpio_io= RTC_IO_GPIO,
+};
+
+static struct platform_device cm_t3517_rtc_device = {
+ .name = v3020,
+ .id = -1,
+ .dev= {
+ .platform_data = cm_t3517_v3020_pdata,
+ }
+};
+
+static void __init cm_t3517_init_rtc(void)
+{
+ platform_device_register(cm_t3517_rtc_device);
+}
+#else
+static inline void cm_t3517_init_rtc(void) {}
+#endif
static struct omap_board_config_kernel cm_t3517_config[] __initdata = {
};
@@ -86,6 +116,11 @@ static void __init cm_t3517_init_irq(void)
static struct omap_board_mux board_mux[] __initdata = {
/* GPIO186 - Green LED */
OMAP3_MUX(SYS_CLKOUT2, OMAP_MUX_MODE4 | OMAP_PIN_OUTPUT),
+ /* RTC GPIOs: IO, WR#, RD#, CS# */
+ OMAP3_MUX(MCBSP4_DR, OMAP_MUX_MODE4 | OMAP_PIN_INPUT),
+ OMAP3_MUX(MCBSP4_DX, OMAP_MUX_MODE4 | OMAP_PIN_INPUT),
+ OMAP3_MUX(MCBSP_CLKS, OMAP_MUX_MODE4 | OMAP_PIN_INPUT),
+ OMAP3_MUX(UART3_CTS_RCTX, OMAP_MUX_MODE4 | OMAP_PIN_INPUT),
{ .reg_offset = OMAP_MUX_TERMINATOR },
};
@@ -95,6 +130,7 @@ static void __init cm_t3517_init(void)
omap3_mux_init(board_mux, OMAP_PACKAGE_CBB);
omap_serial_init();
cm_t3517_init_leds();
+ cm_t3517_init_rtc();
}
MACHINE_START(CM_T3517, Compulab CM-T3517)
--
1.7.1
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[PATCH 4/5] omap3: cm-t3517: add support for NAND flash
add support for NAND flash.
Signed-off-by: Igor Grinberg grinb...@compulab.co.il
---
arch/arm/mach-omap2/board-cm-t3517.c | 54 ++
1 files changed, 54 insertions(+), 0 deletions(-)
diff --git a/arch/arm/mach-omap2/board-cm-t3517.c
b/arch/arm/mach-omap2/board-cm-t3517.c
index 2c7082d..4c26cf5 100644
--- a/arch/arm/mach-omap2/board-cm-t3517.c
+++ b/arch/arm/mach-omap2/board-cm-t3517.c
@@ -29,6 +29,9 @@
#include linux/gpio.h
#include linux/leds.h
#include linux/rtc-v3020.h
+#include linux/mtd/mtd.h
+#include linux/mtd/nand.h
+#include linux/mtd/partitions.h
#include asm/mach-types.h
#include asm/mach/arch.h
@@ -38,6 +41,8 @@
#include plat/common.h
#include plat/control.h
#include plat/usb.h
+#include plat/nand.h
+#include plat/gpmc.h
#include mux.h
@@ -143,6 +148,54 @@ static inline int cm_t3517_init_usbh(void)
}
#endif
+#if defined(CONFIG_MTD_NAND_OMAP2) || defined(CONFIG_MTD_NAND_OMAP2_MODULE)
+#define NAND_BLOCK_SIZESZ_128K
+
+static struct mtd_partition cm_t3517_nand_partitions[] = {
+ {
+ .name = xloader,
+ .offset = 0,/* Offset = 0x0 */
+ .size = 4 * NAND_BLOCK_SIZE,
+ .mask_flags = MTD_WRITEABLE
+ },
+ {
+ .name = uboot,
+ .offset = MTDPART_OFS_APPEND, /* Offset = 0x8 */
+ .size = 15 * NAND_BLOCK_SIZE,
+ },
+ {
+ .name = uboot environment,
+ .offset = MTDPART_OFS_APPEND, /* Offset = 0x26 */
+ .size = 2 * NAND_BLOCK_SIZE,
+ },
+ {
+ .name = linux,
+ .offset = MTDPART_OFS_APPEND, /* Offset = 0x28 */
+ .size = 32 * NAND_BLOCK_SIZE,
+ },
+ {
+ .name = rootfs,
+ .offset = MTDPART_OFS_APPEND, /* Offset = 0x68 */
+ .size = MTDPART_SIZ_FULL,
+ },
+};
+
+static struct omap_nand_platform_data cm_t3517_nand_data = {
+ .parts = cm_t3517_nand_partitions,
+ .nr_parts = ARRAY_SIZE(cm_t3517_nand_partitions),
+ .dma_channel= -1, /* disable DMA in OMAP NAND driver */
+ .cs = 0,
+};
+
+static void __init cm_t3517_init_nand(void)
+{
+ if (gpmc_nand_init(cm_t3517_nand_data) 0)
+ pr_err(CM-T3517: NAND initialization failed\n);
+}
+#else
+static inline void cm_t3517_init_nand(void) {}
+#endif
+
static struct omap_board_config_kernel cm_t3517_config[] __initdata = {
};
@@ -179,6 +232,7 @@ static void __init cm_t3517_init(void)
omap3_mux_init(board_mux, OMAP_PACKAGE_CBB);
omap_serial_init();
cm_t3517_init_leds();
+ cm_t3517_init_nand();
cm_t3517_init_rtc();
cm_t3517_init_usbh();
}
--
1.7.1
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[PATCH 5/5] omap3: cm-t3517: add support for TI HECC
add support for TI HECC.
Signed-off-by: Igor Grinberg grinb...@compulab.co.il
---
arch/arm/mach-omap2/board-cm-t3517.c | 45 ++
1 files changed, 45 insertions(+), 0 deletions(-)
diff --git a/arch/arm/mach-omap2/board-cm-t3517.c
b/arch/arm/mach-omap2/board-cm-t3517.c
index 4c26cf5..1115b8a 100644
--- a/arch/arm/mach-omap2/board-cm-t3517.c
+++ b/arch/arm/mach-omap2/board-cm-t3517.c
@@ -32,6 +32,7 @@
#include linux/mtd/mtd.h
#include linux/mtd/nand.h
#include linux/mtd/partitions.h
+#include linux/can/platform/ti_hecc.h
#include asm/mach-types.h
#include asm/mach/arch.h
@@ -44,6 +45,8 @@
#include plat/nand.h
#include plat/gpmc.h
+#include mach/am35xx.h
+
#include mux.h
#if defined(CONFIG_LEDS_GPIO) || defined(CONFIG_LEDS_GPIO_MODULE)
@@ -77,6 +80,47 @@ static void __init cm_t3517_init_leds(void)
static inline void cm_t3517_init_leds(void) {}
#endif
+#if defined(CONFIG_CAN_TI_HECC) || defined(CONFIG_CAN_TI_HECC_MODULE)
+static struct resource cm_t3517_hecc_resources[] = {
+ {
+ .start = AM35XX_IPSS_HECC_BASE,
+ .end= AM35XX_IPSS_HECC_BASE + SZ_16K - 1,
+ .flags = IORESOURCE_MEM,
+ },
+ {
+ .start = INT_35XX_HECC0_IRQ,
+ .end= INT_35XX_HECC0_IRQ,
+ .flags = IORESOURCE_IRQ,
+ },
+};
+
+static struct ti_hecc_platform_data cm_t3517_hecc_pdata = {
+ .scc_hecc_offset= AM35XX_HECC_SCC_HECC_OFFSET,
+ .scc_ram_offset = AM35XX_HECC_SCC_RAM_OFFSET,
+ .hecc_ram_offset= AM35XX_HECC_RAM_OFFSET,
+ .mbx_offset = AM35XX_HECC_MBOX_OFFSET,
+ .int_line = AM35XX_HECC_INT_LINE,
+ .version= AM35XX_HECC_VERSION,
+};
+
+static struct platform_device cm_t3517_hecc_device = {
+ .name = ti_hecc,
+ .id = 1,
+ .num_resources = ARRAY_SIZE(cm_t3517_hecc_resources),
+ .resource = cm_t3517_hecc_resources,
+ .dev= {
+ .platform_data = cm_t3517_hecc_pdata,
+ },
+};
+
+static void cm_t3517_init_hecc(void)
+{
+ platform_device_register(cm_t3517_hecc_device);
+}
+#else
+static inline void cm_t3517_init_hecc(void) {}
+#endif
+
#if defined(CONFIG_RTC_DRV_V3020) || defined(CONFIG_RTC_DRV_V3020_MODULE)
#define RTC_IO_GPIO(153)
#define RTC_WR_GPIO(154)
@@ -235,6 +279,7 @@ static void __init cm_t3517_init(void)
cm_t3517_init_nand();
cm_t3517_init_rtc();
cm_t3517_init_usbh();
+ cm_t3517_init_hecc();
}
MACHINE_START(CM_T3517, Compulab CM-T3517)
--
1.7.1
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Re: [PATCH 0/3] OMAP: hwmod: Add hardreset and softreset management
Hi Paul, On 9/21/2010 7:03 AM, Paul Walmsley wrote: Hi Benoît, I regret the delay - Considering the job you did on that reset series, you are already forgiven :-) On Thu, 5 Aug 2010, Benoit Cousson wrote: Here are a reset management series. - The first patch will be removed as soon as we will have the proper OMAP4 support for the prm_xxx accessors. - The second one is adding hardreset support in order to allow syslink driver to manage properly the DSP and IPU processor reset. - The last one is forcing a sofreset after the first init. Some IP might require sofreset after each wakeup from power domain OFF mode. That still needs to be confirm. I've reviewed these patches and made a few changes. The PRM register twiddling has been moved out into a prm44xx.c file. I also added OMAP2/3 hardreset support, based on your code. Could you take a quick look at the updated series (in subsequent E-mails, or the git branch below) and let me know if you are okay with it? I took some liberties in preserving your changelogs and Signed-off-by's across the changes, so please let me know if you'd like any changes in that regard. That's really good. The low level reset does indeed belong to PRM more than the hwmod core code. Thanks for the OMAP2/3 stuff as well, IVA people were starting to ping me for that support. I've just rebased my OMAP4 hwmods series on top on this one, and it work fine. Are you targeting that series for 2.6.37? I have a couple of patches on top of that code that will fix the softreset with optional clocks. This code is fixing the GPIO reset issue that I observed in the past. I'll send you that soon. Thanks, Benoit -- To unsubscribe from this list: send the line unsubscribe linux-omap in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
[PATCH] ARM: fix build break due to typo in cacheflush.h
commit 9d85ac1e6 introduced a small typo. This causes the build to break when CONFIG_CPU_V7 is set and CONFIG_CPU_V6 and CONFIG_SMP_ON_UP are not. (log below) CC init/main.o In file included from include/linux/highmem.h:9, from include/linux/pagemap.h:10, from include/linux/mempolicy.h:70, from init/main.c:50: arch/arm/include/asm/cacheflush.h: In function '__flush_icache_all': arch/arm/include/asm/cacheflush.h:332: error: implicit declaration of function '__flush_icache_preferred' make[1]: *** [init/main.o] Error 1 make: *** [init] Error 2 Signed-off-by: Anand Gadiyar gadi...@ti.com Cc: Tony Lindgren t...@atomide.com --- arch/arm/include/asm/cacheflush.h |2 +- 1 file changed, 1 insertion(+), 1 deletion(-) Index: linux-omap-2.6/arch/arm/include/asm/cacheflush.h === --- linux-omap-2.6.orig/arch/arm/include/asm/cacheflush.h +++ linux-omap-2.6/arch/arm/include/asm/cacheflush.h @@ -324,7 +324,7 @@ extern void copy_to_user_page(struct vm_ #elif __LINUX_ARM_ARCH__ == 6 defined(CONFIG_ARM_ERRATA_411920) #define __flush_icache_preferred __cpuc_flush_icache_all #else -#define __fluch_icache_preferred __flush_icache_all_generic +#define __flush_icache_preferred __flush_icache_all_generic #endif static inline void __flush_icache_all(void) -- To unsubscribe from this list: send the line unsubscribe linux-omap in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
Re: [PATCH] ARM: fix build break due to typo in cacheflush.h
* Anand Gadiyar gadi...@ti.com [100921 08:57]: commit 9d85ac1e6 introduced a small typo. This causes the build to break when CONFIG_CPU_V7 is set and CONFIG_CPU_V6 and CONFIG_SMP_ON_UP are not. (log below) CC init/main.o In file included from include/linux/highmem.h:9, from include/linux/pagemap.h:10, from include/linux/mempolicy.h:70, from init/main.c:50: arch/arm/include/asm/cacheflush.h: In function '__flush_icache_all': arch/arm/include/asm/cacheflush.h:332: error: implicit declaration of function '__flush_icache_preferred' make[1]: *** [init/main.o] Error 1 make: *** [init] Error 2 Signed-off-by: Anand Gadiyar gadi...@ti.com Cc: Tony Lindgren t...@atomide.com --- arch/arm/include/asm/cacheflush.h |2 +- 1 file changed, 1 insertion(+), 1 deletion(-) Index: linux-omap-2.6/arch/arm/include/asm/cacheflush.h === --- linux-omap-2.6.orig/arch/arm/include/asm/cacheflush.h +++ linux-omap-2.6/arch/arm/include/asm/cacheflush.h @@ -324,7 +324,7 @@ extern void copy_to_user_page(struct vm_ #elif __LINUX_ARM_ARCH__ == 6 defined(CONFIG_ARM_ERRATA_411920) #define __flush_icache_preferred __cpuc_flush_icache_all #else -#define __fluch_icache_preferred __flush_icache_all_generic +#define __flush_icache_preferred __flush_icache_all_generic #endif static inline void __flush_icache_all(void) Thanks, will merge that into the original patch with your S-O-B and repost. Tony -- To unsubscribe from this list: send the line unsubscribe linux-omap in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
Re: [PATCH 0/3] OMAP: hwmod: Add hardreset and softreset management
Hi Benoît, On Tue, 21 Sep 2010, Cousson, Benoit wrote: That's really good. The low level reset does indeed belong to PRM more than the hwmod core code. Thanks for the OMAP2/3 stuff as well, IVA people were starting to ping me for that support. I've just rebased my OMAP4 hwmods series on top on this one, and it work fine. Cool. Are you targeting that series for 2.6.37? Yep, I'll send those patches to the linux-arm-kernel mailing list today, along with the other hwmod base patches; I'd like to get those in for 2.6.37. I have a couple of patches on top of that code that will fix the softreset with optional clocks. This code is fixing the GPIO reset issue that I observed in the past. I'll send you that soon. OK, sounds good. If you cc the linux-arm-kernel mailing list when you send them out, that will make it easier to add those to the 2.6.37 queue if they arrive on time. Thanks for the review and for the comments, - Paul
Re: [PATCH] ARM: Handle __flush_icache_all for CONFIG_SMP_ON_UP
* Tony Lindgren t...@atomide.com [100914 12:04]:
Here's a patch for __flush_icache_all. I believe this is the last
remaining patch we need.
The only other thing I can think of are the conflicts with
CONFIG_CPU_32v6K, on early ARM1136 and later ARM11 systems if somebody
wants to compile a kernel that supports both. But that's not needed for
omap2, so we can boot now omap2, 3 and 4 with a single defconfig :)
Here's an updated version with a typo fix s/fluch/flush/ from Anand.
Regards,
Tony
From: Tony Lindgren t...@atomide.com
Date: Mon, 20 Sep 2010 16:37:16 -0700
Subject: [PATCH] ARM: Handle __flush_icache_all for CONFIG_SMP_ON_UP
Do this by adding flush_icache_all to cache_fns for ARMv6 and 7.
As flush_icache_all may neeed to be called from flush_kern_cache_all,
add it as the first entry in the cache_fns.
Note that now we can remove the ARM_ERRATA_411920 dependency
to !SMP so it can be selected on UP ARMv6 processors, such
as omap2.
Signed-off-by: Tony Lindgren t...@atomide.com
Signed-off-by: Anand Gadiyar gadi...@ti.com
--- a/arch/arm/Kconfig
+++ b/arch/arm/Kconfig
@@ -1017,7 +1017,7 @@ endif
config ARM_ERRATA_411920
bool ARM errata: Invalidation of the Instruction Cache operation can
fail
- depends on CPU_V6 !SMP
+ depends on CPU_V6
help
Invalidation of the Instruction Cache operation can
fail. This erratum is present in 1136 (before r1p4), 1156 and 1176.
--- a/arch/arm/include/asm/cacheflush.h
+++ b/arch/arm/include/asm/cacheflush.h
@@ -156,6 +156,12 @@
* Please note that the implementation of these, and the required
* effects are cache-type (VIVT/VIPT/PIPT) specific.
*
+ * flush_icache_all()
+ *
+ * Unconditionally clean and invalidate the entire icache.
+ * Currently only needed for cache-v6.S and cache-v7.S, see
+ * __flush_icache_all for the generic implementation.
+ *
* flush_kern_all()
*
* Unconditionally clean and invalidate the entire cache.
@@ -206,6 +212,7 @@
*/
struct cpu_cache_fns {
+ void (*flush_icache_all)(void);
void (*flush_kern_all)(void);
void (*flush_user_all)(void);
void (*flush_user_range)(unsigned long, unsigned long, unsigned int);
@@ -227,6 +234,7 @@ struct cpu_cache_fns {
extern struct cpu_cache_fns cpu_cache;
+#define __cpuc_flush_icache_allcpu_cache.flush_icache_all
#define __cpuc_flush_kern_all cpu_cache.flush_kern_all
#define __cpuc_flush_user_all cpu_cache.flush_user_all
#define __cpuc_flush_user_rangecpu_cache.flush_user_range
@@ -246,6 +254,7 @@ extern struct cpu_cache_fns cpu_cache;
#else
+#define __cpuc_flush_icache_all__glue(_CACHE,_flush_icache_all)
#define __cpuc_flush_kern_all __glue(_CACHE,_flush_kern_cache_all)
#define __cpuc_flush_user_all __glue(_CACHE,_flush_user_cache_all)
#define __cpuc_flush_user_range
__glue(_CACHE,_flush_user_cache_range)
@@ -253,6 +262,7 @@ extern struct cpu_cache_fns cpu_cache;
#define __cpuc_coherent_user_range __glue(_CACHE,_coherent_user_range)
#define __cpuc_flush_dcache_area __glue(_CACHE,_flush_kern_dcache_area)
+extern void __cpuc_flush_icache_all(void);
extern void __cpuc_flush_kern_all(void);
extern void __cpuc_flush_user_all(void);
extern void __cpuc_flush_user_range(unsigned long, unsigned long, unsigned
int);
@@ -291,6 +301,37 @@ extern void copy_to_user_page(struct vm_area_struct *,
struct page *,
/*
* Convert calls to our calling convention.
*/
+
+/* Invalidate I-cache */
+#define __flush_icache_all_generic() \
+ asm(mcrp15, 0, %0, c7, c5, 0 \
+ : : r (0));
+
+/* Invalidate I-cache inner shareable */
+#define __flush_icache_all_v7_smp()\
+ asm(mcrp15, 0, %0, c7, c1, 0 \
+ : : r (0));
+
+/*
+ * Optimized __flush_icache_all for the common cases. Note that UP ARMv7
+ * will fall through to use __flush_icache_all_generic.
+ */
+#if (defined(CONFIG_CPU_V7) defined(CONFIG_CPU_V6)) || \
+ defined(CONFIG_SMP_ON_UP)
+#define __flush_icache_preferred __cpuc_flush_icache_all
+#elif __LINUX_ARM_ARCH__ = 7 defined(CONFIG_SMP)
+#define __flush_icache_preferred __flush_icache_all_v7_smp
+#elif __LINUX_ARM_ARCH__ == 6 defined(CONFIG_ARM_ERRATA_411920)
+#define __flush_icache_preferred __cpuc_flush_icache_all
+#else
+#define __flush_icache_preferred __flush_icache_all_generic
+#endif
+
+static inline void __flush_icache_all(void)
+{
+ __flush_icache_preferred();
+}
+
#define flush_cache_all() __cpuc_flush_kern_all()
static inline void vivt_flush_cache_mm(struct mm_struct *mm)
@@ -366,21 +407,6 @@ extern void flush_cache_page(struct vm_area_struct *vma,
unsigned long user_addr
#define
Re: [PATCH 3/5] omap3: cm-t3517: add support for usb host.
On Tue, Sep 21, 2010 at 9:33 PM, Igor Grinberg grinb...@compulab.co.il wrote:
add support for hsusb host ports 1, 2 and on-module usb hub.
Signed-off-by: Igor Grinberg grinb...@compulab.co.il
---
arch/arm/mach-omap2/board-cm-t3517.c | 50
++
...
@@ -100,6 +102,47 @@ static void __init cm_t3517_init_rtc(void)
static inline void cm_t3517_init_rtc(void) {}
#endif
+#if defined(CONFIG_USB_EHCI_HCD) || defined(CONFIG_USB_EHCI_HCD_MODULE)
Hi Igor,
Do we really need to make these conditional on the driver being built?
The hardware is present on the board at all times, right?
It should be okay to execute this code independent of whether
the driver is built or not. The device registration can be unconditional
and if there is no driver present, we won't probe anyway.
(I see some similar logic in usb-ehci.c - probably a good idea to remove
it as well).
- Anand
+#define HSUSB1_RESET_GPIO (146)
+#define HSUSB2_RESET_GPIO (147)
+#define USB_HUB_RESET_GPIO (152)
+
+static struct ehci_hcd_omap_platform_data cm_t3517_ehci_pdata __initdata = {
+ .port_mode[0] = EHCI_HCD_OMAP_MODE_PHY,
+ .port_mode[1] = EHCI_HCD_OMAP_MODE_PHY,
+ .port_mode[2] = EHCI_HCD_OMAP_MODE_UNKNOWN,
+
+ .phy_reset = true,
+ .reset_gpio_port[0] = HSUSB1_RESET_GPIO,
+ .reset_gpio_port[1] = HSUSB2_RESET_GPIO,
+ .reset_gpio_port[2] = -EINVAL,
+};
+
+static int cm_t3517_init_usbh(void)
+{
+ int err;
+
+ err = gpio_request(USB_HUB_RESET_GPIO, usb hub rst);
+ if (err) {
+ pr_err(CM-T3517: usb hub rst gpio request failed: %d\n,
err);
+ } else {
+ gpio_direction_output(USB_HUB_RESET_GPIO, 0);
+ udelay(10);
+ gpio_set_value(USB_HUB_RESET_GPIO, 1);
+ msleep(1);
+ }
+
+ usb_ehci_init(cm_t3517_ehci_pdata);
+
+ return 0;
+}
+#else
+static inline int cm_t3517_init_usbh(void)
+{
+ return 0;
+}
+#endif
+
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Re: [PATCH v2] OMAP3: Keypad: Fix failure exit path in probe
Hi,
On Tue, Sep 21, 2010 at 07:11:01PM +0530, G, Manjunath Kondaiah wrote:
Hi,
-Original Message-
From: Ameya Palande [mailto:ameya.pala...@nokia.com]
Sent: Tuesday, September 21, 2010 7:04 PM
To: G, Manjunath Kondaiah
Cc: linux-omap@vger.kernel.org; linux-in...@vger.kernel.org;
Dmitry Torokhov; linux-arm-ker...@lists.infradead.org; Tony Lindgren
Subject: Re: [PATCH v2] OMAP3: Keypad: Fix failure exit path in probe
Hi Manjunath,
On Tue, 2010-09-21 at 13:49 +0200, ext G, Manjunath Kondaiah wrote:
The failure exit paths seems to be wrong in probe function.
This patch corrects exit failure paths for error handling cases.
And also adds memory leak...
https://patchwork.kernel.org/patch/160551/
Any comments on this?
Looks fine. Sorry, I didn't look at the change. This version seems to
be better.
I do not understand why we need to separate memory allocations. It looks
like the minimal patch should be like one below.
Thanks.
--
Dmitry
Input: twl4030_keypad - fix error handling path
From: Dmitry Torokhov dmitry.torok...@gmail.com
We should not try to call free_irq() when request_irq() failed.
Reported-by: G, Manjunath Kondaiah manj...@ti.com
Signed-off-by: Dmitry Torokhov d...@mail.ru
---
drivers/input/keyboard/twl4030_keypad.c |7 +++
1 files changed, 3 insertions(+), 4 deletions(-)
diff --git a/drivers/input/keyboard/twl4030_keypad.c
b/drivers/input/keyboard/twl4030_keypad.c
index fb16b5e..09bef79 100644
--- a/drivers/input/keyboard/twl4030_keypad.c
+++ b/drivers/input/keyboard/twl4030_keypad.c
@@ -406,23 +406,22 @@ static int __devinit twl4030_kp_probe(struct
platform_device *pdev)
if (error) {
dev_info(kp-dbg_dev, request_irq failed for irq no=%d\n,
kp-irq);
- goto err3;
+ goto err2;
}
/* Enable KP and TO interrupts now. */
reg = (u8) ~(KEYP_IMR1_KP | KEYP_IMR1_TO);
if (twl4030_kpwrite_u8(kp, reg, KEYP_IMR1)) {
error = -EIO;
- goto err4;
+ goto err3;
}
platform_set_drvdata(pdev, kp);
return 0;
-err4:
+err3:
/* mask all events - we don't care about the result */
(void) twl4030_kpwrite_u8(kp, 0xff, KEYP_IMR1);
-err3:
free_irq(kp-irq, NULL);
err2:
input_unregister_device(input);
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[PATCH 00/11] OMAP: hwmod: core patches for 2.6.37
Hello, This series contains hwmod core fixes and improvements, and is intended for merging via Tony's tree for 2.6.37. The patches in this series are also available via git at git://git.pwsan.com/linux-2.6 hwmod_2.6.37 based on v2.6.36-rc5. regards, - Paul --- hwmod_2.6.37 textdata bss dec hex filename 6531587 455008 5615992 12602587 c04cdb vmlinux.omap2plus.orig 6533467 456160 5615992 12605619 c058b3 vmlinux.omap2plus.patched Benoit Cousson (4): OMAP: hwmod: Rename dma_ch to dma_req OMAP: hwmod: Do not disable clocks if hwmod already in idle OMAP4: prcm: Add temporarily helper functions for rmw and read inside the PRM OMAP: hwmod: Force a softreset during _setup Benoît Cousson (2): OMAP4: PRM: add module hard reset support OMAP: hwmod: Add hardreset management support Kevin Hilman (1): OMAP: hwmod: separate list locking and hwmod hardware locking Liam Girdwood (1): OMAP: hwmod: Fix omap_hwmod_reset wrong state test Paul Walmsley (2): OMAP2/3: PRM: add module hard reset support OMAP: hwmod: add an hardreset API for use by other core code Rajeev Kulkarni (1): OMAP4: prcm: Fix global warm reset bit position arch/arm/mach-omap2/Makefile |4 arch/arm/mach-omap2/omap_hwmod.c | 348 ++ arch/arm/mach-omap2/prcm.c | 29 ++ arch/arm/mach-omap2/prm.h| 18 + arch/arm/mach-omap2/prm2xxx_3xxx.c | 110 arch/arm/mach-omap2/prm44xx.c| 116 + arch/arm/plat-omap/include/plat/omap_hwmod.h | 36 ++- arch/arm/plat-omap/include/plat/prcm.h |2 8 files changed, 593 insertions(+), 70 deletions(-) create mode 100644 arch/arm/mach-omap2/prm2xxx_3xxx.c create mode 100644 arch/arm/mach-omap2/prm44xx.c -- To unsubscribe from this list: send the line unsubscribe linux-omap in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
[PATCH 04/11] OMAP4: prcm: Fix global warm reset bit position
From: Rajeev Kulkarni raje...@ti.com OMAP4 platform has different register bits for Warm and Cold Resets. Write one into appropriate bits. Signed-off-by: Rajeev Kulkarni raje...@ti.com Cc: Leed Aguilar leed.agui...@ti.com [b-cous...@ti.com: Change the define with the proper one from omap4 headers] Signed-off-by: Benoit Cousson b-cous...@ti.com Signed-off-by: Paul Walmsley p...@pwsan.com --- arch/arm/mach-omap2/prcm.c |5 +++-- 1 files changed, 3 insertions(+), 2 deletions(-) diff --git a/arch/arm/mach-omap2/prcm.c b/arch/arm/mach-omap2/prcm.c index c201374..96f4616 100644 --- a/arch/arm/mach-omap2/prcm.c +++ b/arch/arm/mach-omap2/prcm.c @@ -33,6 +33,7 @@ #include cm.h #include prm.h #include prm-regbits-24xx.h +#include prm-regbits-44xx.h static void __iomem *prm_base; static void __iomem *cm_base; @@ -161,8 +162,8 @@ void omap_prcm_arch_reset(char mode, const char *cmd) prm_set_mod_reg_bits(OMAP_RST_DPLL3_MASK, prcm_offs, OMAP2_RM_RSTCTRL); if (cpu_is_omap44xx()) - prm_set_mod_reg_bits(OMAP_RST_DPLL3_MASK, prcm_offs, -OMAP4_RM_RSTCTRL); + prm_set_mod_reg_bits(OMAP4430_RST_GLOBAL_WARM_SW_MASK, +prcm_offs, OMAP4_RM_RSTCTRL); } static inline u32 __omap_prcm_read(void __iomem *base, s16 module, u16 reg) -- To unsubscribe from this list: send the line unsubscribe linux-omap in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
[PATCH 08/11] OMAP2/3: PRM: add module hard reset support
This patch adds hard-reset support for processor modules (e.g., DSP, IVA)
on OMAP2/3 platforms. It's based on the OMAP4 hard-reset support that Benoît
developed in the previous patch.
This patch is a collaboration between Benoît Cousson b-cous...@ti.com
and Paul Walmsley p...@pwsan.com.
Signed-off-by: Paul Walmsley p...@pwsan.com
Cc: Benoît Cousson b-cous...@ti.com
---
arch/arm/mach-omap2/Makefile |2 -
arch/arm/mach-omap2/prm.h |5 ++
arch/arm/mach-omap2/prm2xxx_3xxx.c | 110
3 files changed, 116 insertions(+), 1 deletions(-)
create mode 100644 arch/arm/mach-omap2/prm2xxx_3xxx.c
diff --git a/arch/arm/mach-omap2/Makefile b/arch/arm/mach-omap2/Makefile
index c0da784..eb2504a 100644
--- a/arch/arm/mach-omap2/Makefile
+++ b/arch/arm/mach-omap2/Makefile
@@ -5,7 +5,7 @@
# Common support
obj-y := id.o io.o control.o mux.o devices.o serial.o gpmc.o timer-gp.o pm.o
-omap-2-3-common= irq.o sdrc.o
+omap-2-3-common= irq.o sdrc.o prm2xxx_3xxx.o
hwmod-common = omap_hwmod.o \
omap_hwmod_common_data.o
prcm-common= prcm.o powerdomain.o
diff --git a/arch/arm/mach-omap2/prm.h b/arch/arm/mach-omap2/prm.h
index bc7e6e6..7be040b 100644
--- a/arch/arm/mach-omap2/prm.h
+++ b/arch/arm/mach-omap2/prm.h
@@ -246,6 +246,11 @@ static inline u32 prm_clear_mod_reg_bits(u32 bits, s16
module, s16 idx)
return prm_rmw_mod_reg_bits(bits, 0x0, module, idx);
}
+/* These omap2_ PRM functions apply to both OMAP2 and 3 */
+int omap2_prm_is_hardreset_asserted(s16 prm_mod, u8 shift);
+int omap2_prm_assert_hardreset(s16 prm_mod, u8 shift);
+int omap2_prm_deassert_hardreset(s16 prm_mod, u8 shift);
+
int omap4_prm_is_hardreset_asserted(void __iomem *rstctrl_reg, u8 shift);
int omap4_prm_assert_hardreset(void __iomem *rstctrl_reg, u8 shift);
int omap4_prm_deassert_hardreset(void __iomem *rstctrl_reg, u8 shift);
diff --git a/arch/arm/mach-omap2/prm2xxx_3xxx.c
b/arch/arm/mach-omap2/prm2xxx_3xxx.c
new file mode 100644
index 000..421771e
--- /dev/null
+++ b/arch/arm/mach-omap2/prm2xxx_3xxx.c
@@ -0,0 +1,110 @@
+/*
+ * OMAP2/3 PRM module functions
+ *
+ * Copyright (C) 2010 Texas Instruments, Inc.
+ * Copyright (C) 2010 Nokia Corporation
+ * Benoît Cousson
+ * Paul Walmsley
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+
+#include linux/kernel.h
+#include linux/delay.h
+#include linux/errno.h
+#include linux/err.h
+
+#include plat/common.h
+#include plat/cpu.h
+#include plat/prcm.h
+
+#include prm.h
+#include prm-regbits-24xx.h
+#include prm-regbits-34xx.h
+
+/**
+ * omap2_prm_is_hardreset_asserted - read the HW reset line state of
+ * submodules contained in the hwmod module
+ * @prm_mod: PRM submodule base (e.g. CORE_MOD)
+ * @shift: register bit shift corresponding to the reset line to check
+ *
+ * Returns 1 if the (sub)module hardreset line is currently asserted,
+ * 0 if the (sub)module hardreset line is not currently asserted, or
+ * -EINVAL if called while running on a non-OMAP2/3 chip.
+ */
+int omap2_prm_is_hardreset_asserted(s16 prm_mod, u8 shift)
+{
+ if (!(cpu_is_omap24xx() || cpu_is_omap34xx()))
+ return -EINVAL;
+
+ return prm_read_mod_bits_shift(prm_mod, OMAP2_RM_RSTCTRL,
+ (1 shift));
+}
+
+/**
+ * omap2_prm_assert_hardreset - assert the HW reset line of a submodule
+ * @prm_mod: PRM submodule base (e.g. CORE_MOD)
+ * @shift: register bit shift corresponding to the reset line to assert
+ *
+ * Some IPs like dsp or iva contain processors that require an HW
+ * reset line to be asserted / deasserted in order to fully enable the
+ * IP. These modules may have multiple hard-reset lines that reset
+ * different 'submodules' inside the IP block. This function will
+ * place the submodule into reset. Returns 0 upon success or -EINVAL
+ * upon an argument error.
+ */
+int omap2_prm_assert_hardreset(s16 prm_mod, u8 shift)
+{
+ u32 mask;
+
+ if (!(cpu_is_omap24xx() || cpu_is_omap34xx()))
+ return -EINVAL;
+
+ mask = 1 shift;
+ prm_rmw_mod_reg_bits(mask, mask, prm_mod, OMAP2_RM_RSTCTRL);
+
+ return 0;
+}
+
+/**
+ * omap2_prm_deassert_hardreset - deassert a submodule hardreset line and wait
+ * @prm_mod: PRM submodule base (e.g. CORE_MOD)
+ * @shift: register bit shift corresponding to the reset line to deassert
+ *
+ * Some IPs like dsp or iva contain processors that require an HW
+ * reset line to be asserted / deasserted in order to fully enable the
+ * IP. These modules may have multiple hard-reset lines that reset
+ * different 'submodules' inside the IP block. This function will
+ * take the submodule out of reset and wait until the
[PATCH 09/11] OMAP: hwmod: Add hardreset management support
From: Benoît Cousson b-cous...@ti.com
Most processor IPs does have a hardreset signal controlled by the PRM.
This is different of the softreset used for local IP reset from the
SYSCONFIG register.
The granularity can be much finer than orginal HWMOD, for ex, the IVA
hwmod contains 3 reset lines, the IPU 3 as well, the DSP 2...
Since this granularity is needed by the driver, we have to ensure
than one hwmod exist for each hardreset line.
- Store reset lines as hwmod resources that a driver can query by name like
an irq or sdma line.
- Add two functions for asserting / deasserting reset lines in hwmods
processor that require manual reset control.
- Add one functions to get the current reset state.
- If an hwmod contains only one line, an automatic assertion / de-assertion
is done.
- de-assert the hardreset line only during enable from disable transition
- assert the hardreset line only during shutdown
Note: The hwmods with hardreset line and HWMOD_INIT_NO_RESET flag must be
kept in INITIALIZED state.
They can be properly enabled only if the hardreset line is de-asserted
before.
For information here is the list of IPs with HW reset control
on an OMAP4430 device:
RM_DSP_RSTCTRL
1,1,'RST2','RW','1','DSP - MMU, cache and slave interface reset control'
0,0,'RST1','RW','1','DSP - DSP reset control'
RM_IVA_RSTCTRL
2,2,'RST3','RW','1','IVA logic and SL2 reset control'
1,1,'RST2','RW','1','IVA Sequencer2 reset control'
0,0,'RST1','RW','1','IVA sequencer1 reset control'
RM_IPU_RSTCTRL
2,2,'RST3','RW','1','IPU MMU and CACHE interface reset control.'
1,1,'RST2','RW','1','IPU Cortex M3 CPU2 reset control.'
0,0,'RST1','RW','1','IPU Cortex M3 CPU1 reset control.'
PRM_RSTCTRL
1,1,'RST_GLOBAL_COLD_SW','RW','0','Global COLD software reset control.'
0,0,'RST_GLOBAL_WARM_SW','RW','0','Global WARM software reset control.'
RM_CPU0_CPU0_RSTCTRL
RM_CPU1_CPU1_RSTCTRL
0,0,'RST','RW','0','Cortex A9 CPU01 warm local reset control'
Signed-off-by: Benoit Cousson b-cous...@ti.com
[p...@pwsan.com: made the hardreset functions static; moved the register
twiddling into prm*.c functions in previous patches; changed the
function names to conform with hwmod practice]
Signed-off-by: Paul Walmsley p...@pwsan.com
Cc: Kevin Hilman khil...@deeprootsystems.com
Cc: Rajendra Nayak rna...@ti.com
---
arch/arm/mach-omap2/omap_hwmod.c | 168 +-
arch/arm/plat-omap/include/plat/omap_hwmod.h | 17 +++
2 files changed, 177 insertions(+), 8 deletions(-)
diff --git a/arch/arm/mach-omap2/omap_hwmod.c b/arch/arm/mach-omap2/omap_hwmod.c
index 3084409..f4a569c 100644
--- a/arch/arm/mach-omap2/omap_hwmod.c
+++ b/arch/arm/mach-omap2/omap_hwmod.c
@@ -50,11 +50,13 @@
#include plat/powerdomain.h
#include plat/clock.h
#include plat/omap_hwmod.h
+#include plat/prcm.h
#include cm.h
+#include prm.h
-/* Maximum microseconds to wait for OMAP module to reset */
-#define MAX_MODULE_RESET_WAIT 1
+/* Maximum microseconds to wait for OMAP module to softreset */
+#define MAX_MODULE_SOFTRESET_WAIT 1
/* Name of the OMAP hwmod for the MPU */
#define MPU_INITIATOR_NAME mpu
@@ -834,6 +836,130 @@ static int _wait_target_ready(struct omap_hwmod *oh)
}
/**
+ * _lookup_hardreset - return the register bit shift for this hwmod/reset line
+ * @oh: struct omap_hwmod *
+ * @name: name of the reset line in the context of this hwmod
+ *
+ * Return the bit position of the reset line that match the
+ * input name. Return -ENOENT if not found.
+ */
+static u8 _lookup_hardreset(struct omap_hwmod *oh, const char *name)
+{
+ int i;
+
+ for (i = 0; i oh-rst_lines_cnt; i++) {
+ const char *rst_line = oh-rst_lines[i].name;
+ if (!strcmp(rst_line, name)) {
+ u8 shift = oh-rst_lines[i].rst_shift;
+ pr_debug(omap_hwmod: %s: _lookup_hardreset: %s: %d\n,
+oh-name, rst_line, shift);
+
+ return shift;
+ }
+ }
+
+ return -ENOENT;
+}
+
+/**
+ * _assert_hardreset - assert the HW reset line of submodules
+ * contained in the hwmod module.
+ * @oh: struct omap_hwmod *
+ * @name: name of the reset line to lookup and assert
+ *
+ * Some IP like dsp, ipu or iva contain processor that require
+ * an HW reset line to be assert / deassert in order to enable fully
+ * the IP.
+ */
+static int _assert_hardreset(struct omap_hwmod *oh, const char *name)
+{
+ u8 shift;
+
+ if (!oh)
+ return -EINVAL;
+
+ shift = _lookup_hardreset(oh, name);
+ if (IS_ERR_VALUE(shift))
+ return shift;
+
+ if (cpu_is_omap24xx() || cpu_is_omap34xx())
+ return omap2_prm_assert_hardreset(oh-prcm.omap2.module_offs,
+ shift);
+ else if (cpu_is_omap44xx())
+ return omap4_prm_assert_hardreset(oh-prcm.omap4.rstctrl_reg,
+
[PATCH 07/11] OMAP4: PRM: add module hard reset support
From: Benoît Cousson b-cous...@ti.com
Most processor modules (e.g., DSP, IVA, IPU) on OMAPs can be reset
under the control of the PRM. This patch adds an API for this purpose
for OMAP4 devices:
int omap4_prm_is_hardreset_asserted(void __iomem *rstctrl_reg, u8 shift);
int omap4_prm_assert_hardreset(void __iomem *rstctrl_reg, u8 shift);
int omap4_prm_deassert_hardreset(void __iomem *rstctrl_reg, u8 shift);
This API is intended to be used only by the hwmod code - a subsequent
patch will add that support to hwmod.
This patch is a collaboration between Benoît Cousson b-cous...@ti.com
and Paul Walmsley p...@pwsan.com.
Signed-off-by: Paul Walmsley p...@pwsan.com
Signed-off-by: Benoît Cousson b-cous...@ti.com
---
arch/arm/mach-omap2/Makefile |2 -
arch/arm/mach-omap2/prm.h | 13 -
arch/arm/mach-omap2/prm44xx.c | 116 +
3 files changed, 129 insertions(+), 2 deletions(-)
create mode 100644 arch/arm/mach-omap2/prm44xx.c
diff --git a/arch/arm/mach-omap2/Makefile b/arch/arm/mach-omap2/Makefile
index 88d3a1e..c0da784 100644
--- a/arch/arm/mach-omap2/Makefile
+++ b/arch/arm/mach-omap2/Makefile
@@ -15,7 +15,7 @@ clock-common = clock.o
clock_common_data.o \
obj-$(CONFIG_ARCH_OMAP2) += $(omap-2-3-common) $(prcm-common) $(hwmod-common)
obj-$(CONFIG_ARCH_OMAP3) += $(omap-2-3-common) $(prcm-common) $(hwmod-common)
-obj-$(CONFIG_ARCH_OMAP4) += $(prcm-common) $(hwmod-common)
+obj-$(CONFIG_ARCH_OMAP4) += $(prcm-common) prm44xx.o $(hwmod-common)
obj-$(CONFIG_OMAP_MCBSP) += mcbsp.o
diff --git a/arch/arm/mach-omap2/prm.h b/arch/arm/mach-omap2/prm.h
index 588873b..bc7e6e6 100644
--- a/arch/arm/mach-omap2/prm.h
+++ b/arch/arm/mach-omap2/prm.h
@@ -5,7 +5,7 @@
* OMAP2/3 Power/Reset Management (PRM) register definitions
*
* Copyright (C) 2007-2009 Texas Instruments, Inc.
- * Copyright (C) 2009 Nokia Corporation
+ * Copyright (C) 2010 Nokia Corporation
*
* Written by Paul Walmsley
*
@@ -246,6 +246,10 @@ static inline u32 prm_clear_mod_reg_bits(u32 bits, s16
module, s16 idx)
return prm_rmw_mod_reg_bits(bits, 0x0, module, idx);
}
+int omap4_prm_is_hardreset_asserted(void __iomem *rstctrl_reg, u8 shift);
+int omap4_prm_assert_hardreset(void __iomem *rstctrl_reg, u8 shift);
+int omap4_prm_deassert_hardreset(void __iomem *rstctrl_reg, u8 shift);
+
#endif
/*
@@ -398,4 +402,11 @@ static inline u32 prm_clear_mod_reg_bits(u32 bits, s16
module, s16 idx)
#define OMAP_POWERSTATE_MASK (0x3 0)
+/*
+ * MAX_MODULE_HARDRESET_WAIT: Maximum microseconds to wait for an OMAP
+ * submodule to exit hardreset
+ */
+#define MAX_MODULE_HARDRESET_WAIT 1
+
+
#endif
diff --git a/arch/arm/mach-omap2/prm44xx.c b/arch/arm/mach-omap2/prm44xx.c
new file mode 100644
index 000..a1ff918
--- /dev/null
+++ b/arch/arm/mach-omap2/prm44xx.c
@@ -0,0 +1,116 @@
+/*
+ * OMAP4 PRM module functions
+ *
+ * Copyright (C) 2010 Texas Instruments, Inc.
+ * Copyright (C) 2010 Nokia Corporation
+ * Benoît Cousson
+ * Paul Walmsley
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+
+#include linux/kernel.h
+#include linux/delay.h
+#include linux/errno.h
+#include linux/err.h
+
+#include plat/common.h
+#include plat/cpu.h
+#include plat/prcm.h
+
+#include prm.h
+#include prm-regbits-44xx.h
+
+/*
+ * Address offset (in bytes) between the reset control and the reset
+ * status registers: 4 bytes on OMAP4
+ */
+#define OMAP4_RST_CTRL_ST_OFFSET 4
+
+/**
+ * omap4_prm_is_hardreset_asserted - read the HW reset line state of
+ * submodules contained in the hwmod module
+ * @rstctrl_reg: RM_RSTCTRL register address for this module
+ * @shift: register bit shift corresponding to the reset line to check
+ *
+ * Returns 1 if the (sub)module hardreset line is currently asserted,
+ * 0 if the (sub)module hardreset line is not currently asserted, or
+ * -EINVAL upon parameter error.
+ */
+int omap4_prm_is_hardreset_asserted(void __iomem *rstctrl_reg, u8 shift)
+{
+ if (!cpu_is_omap44xx() || !rstctrl_reg)
+ return -EINVAL;
+
+ return omap4_prm_read_bits_shift(rstctrl_reg, (1 shift));
+}
+
+/**
+ * omap4_prm_assert_hardreset - assert the HW reset line of a submodule
+ * @rstctrl_reg: RM_RSTCTRL register address for this module
+ * @shift: register bit shift corresponding to the reset line to assert
+ *
+ * Some IPs like dsp, ipu or iva contain processors that require an HW
+ * reset line to be asserted / deasserted in order to fully enable the
+ * IP. These modules may have multiple hard-reset lines that reset
+ * different 'submodules' inside the IP block. This function will
+ * place the submodule into reset. Returns 0 upon success or -EINVAL
+ * upon an argument error.
+ */
+int omap4_prm_assert_hardreset(void __iomem *rstctrl_reg, u8
[PATCH 11/11] OMAP: hwmod: add an hardreset API for use by other core code
Expose an hardreset API from hwmod in order to assert / deassert all the
individual reset lines that belong to an hwmod. This API is needed by
some of the more complicated processor drivers, e.g., DSP/Bridge,
Syslink, etc.
Signed-off-by: Paul Walmsley p...@pwsan.com
Cc: Benoît Cousson b-cous...@ti.com
---
arch/arm/mach-omap2/omap_hwmod.c | 78 ++
arch/arm/plat-omap/include/plat/omap_hwmod.h |4 +
2 files changed, 82 insertions(+), 0 deletions(-)
diff --git a/arch/arm/mach-omap2/omap_hwmod.c b/arch/arm/mach-omap2/omap_hwmod.c
index 3e90984..8c27923 100644
--- a/arch/arm/mach-omap2/omap_hwmod.c
+++ b/arch/arm/mach-omap2/omap_hwmod.c
@@ -1829,6 +1829,84 @@ int omap_hwmod_disable_wakeup(struct omap_hwmod *oh)
}
/**
+ * omap_hwmod_assert_hardreset - assert the HW reset line of submodules
+ * contained in the hwmod module.
+ * @oh: struct omap_hwmod *
+ * @name: name of the reset line to lookup and assert
+ *
+ * Some IP like dsp, ipu or iva contain processor that require
+ * an HW reset line to be assert / deassert in order to enable fully
+ * the IP. Returns -EINVAL if @oh is null or if the operation is not
+ * yet supported on this OMAP; otherwise, passes along the return value
+ * from _assert_hardreset().
+ */
+int omap_hwmod_assert_hardreset(struct omap_hwmod *oh, const char *name)
+{
+ int ret;
+
+ if (!oh)
+ return -EINVAL;
+
+ mutex_lock(oh-_mutex);
+ ret = _assert_hardreset(oh, name);
+ mutex_unlock(oh-_mutex);
+
+ return ret;
+}
+
+/**
+ * omap_hwmod_deassert_hardreset - deassert the HW reset line of submodules
+ * contained in the hwmod module.
+ * @oh: struct omap_hwmod *
+ * @name: name of the reset line to look up and deassert
+ *
+ * Some IP like dsp, ipu or iva contain processor that require
+ * an HW reset line to be assert / deassert in order to enable fully
+ * the IP. Returns -EINVAL if @oh is null or if the operation is not
+ * yet supported on this OMAP; otherwise, passes along the return value
+ * from _deassert_hardreset().
+ */
+int omap_hwmod_deassert_hardreset(struct omap_hwmod *oh, const char *name)
+{
+ int ret;
+
+ if (!oh)
+ return -EINVAL;
+
+ mutex_lock(oh-_mutex);
+ ret = _deassert_hardreset(oh, name);
+ mutex_unlock(oh-_mutex);
+
+ return ret;
+}
+
+/**
+ * omap_hwmod_read_hardreset - read the HW reset line state of submodules
+ * contained in the hwmod module
+ * @oh: struct omap_hwmod *
+ * @name: name of the reset line to look up and read
+ *
+ * Return the current state of the hwmod @oh's reset line named @name:
+ * returns -EINVAL upon parameter error or if this operation
+ * is unsupported on the current OMAP; otherwise, passes along the return
+ * value from _read_hardreset().
+ */
+int omap_hwmod_read_hardreset(struct omap_hwmod *oh, const char *name)
+{
+ int ret;
+
+ if (!oh)
+ return -EINVAL;
+
+ mutex_lock(oh-_mutex);
+ ret = _read_hardreset(oh, name);
+ mutex_unlock(oh-_mutex);
+
+ return ret;
+}
+
+
+/**
* omap_hwmod_for_each_by_class - call @fn for each hwmod of class @classname
* @classname: struct omap_hwmod_class name to search for
* @fn: callback function pointer to call for each hwmod in class @classname
diff --git a/arch/arm/plat-omap/include/plat/omap_hwmod.h
b/arch/arm/plat-omap/include/plat/omap_hwmod.h
index 590bfae..7fde44d 100644
--- a/arch/arm/plat-omap/include/plat/omap_hwmod.h
+++ b/arch/arm/plat-omap/include/plat/omap_hwmod.h
@@ -512,6 +512,10 @@ int omap_hwmod_idle(struct omap_hwmod *oh);
int _omap_hwmod_idle(struct omap_hwmod *oh);
int omap_hwmod_shutdown(struct omap_hwmod *oh);
+int omap_hwmod_assert_hardreset(struct omap_hwmod *oh, const char *name);
+int omap_hwmod_deassert_hardreset(struct omap_hwmod *oh, const char *name);
+int omap_hwmod_read_hardreset(struct omap_hwmod *oh, const char *name);
+
int omap_hwmod_enable_clocks(struct omap_hwmod *oh);
int omap_hwmod_disable_clocks(struct omap_hwmod *oh);
--
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[PATCH 06/11] OMAP4: prcm: Add temporarily helper functions for rmw and read inside the PRM
From: Benoit Cousson b-cous...@ti.com
Since OMAP4 is using an absolute address, the current PRM accessors
are not useable.
OMAP4 adaptation for these API are currently ongoing, so define temp
version until the proper ones are defined.
Signed-off-by: Benoit Cousson b-cous...@ti.com
Signed-off-by: Paul Walmsley p...@pwsan.com
Cc: Kevin Hilman khil...@deeprootsystems.com
---
arch/arm/mach-omap2/prcm.c | 24
arch/arm/plat-omap/include/plat/prcm.h |2 ++
2 files changed, 26 insertions(+), 0 deletions(-)
diff --git a/arch/arm/mach-omap2/prcm.c b/arch/arm/mach-omap2/prcm.c
index 96f4616..d4388d3 100644
--- a/arch/arm/mach-omap2/prcm.c
+++ b/arch/arm/mach-omap2/prcm.c
@@ -216,6 +216,30 @@ u32 prm_read_mod_bits_shift(s16 domain, s16 idx, u32 mask)
return v;
}
+/* Read a PRM register, AND it, and shift the result down to bit 0 */
+u32 omap4_prm_read_bits_shift(void __iomem *reg, u32 mask)
+{
+ u32 v;
+
+ v = __raw_readl(reg);
+ v = mask;
+ v = __ffs(mask);
+
+ return v;
+}
+
+/* Read-modify-write a register in a PRM module. Caller must lock */
+u32 omap4_prm_rmw_reg_bits(u32 mask, u32 bits, void __iomem *reg)
+{
+ u32 v;
+
+ v = __raw_readl(reg);
+ v = ~mask;
+ v |= bits;
+ __raw_writel(v, reg);
+
+ return v;
+}
/* Read a register in a CM module */
u32 cm_read_mod_reg(s16 module, u16 idx)
{
diff --git a/arch/arm/plat-omap/include/plat/prcm.h
b/arch/arm/plat-omap/include/plat/prcm.h
index 9fbd914..ab77442 100644
--- a/arch/arm/plat-omap/include/plat/prcm.h
+++ b/arch/arm/plat-omap/include/plat/prcm.h
@@ -38,6 +38,8 @@ u32 prm_read_mod_reg(s16 module, u16 idx);
void prm_write_mod_reg(u32 val, s16 module, u16 idx);
u32 prm_rmw_mod_reg_bits(u32 mask, u32 bits, s16 module, s16 idx);
u32 prm_read_mod_bits_shift(s16 domain, s16 idx, u32 mask);
+u32 omap4_prm_read_bits_shift(void __iomem *reg, u32 mask);
+u32 omap4_prm_rmw_reg_bits(u32 mask, u32 bits, void __iomem *reg);
u32 cm_read_mod_reg(s16 module, u16 idx);
void cm_write_mod_reg(u32 val, s16 module, u16 idx);
u32 cm_rmw_mod_reg_bits(u32 mask, u32 bits, s16 module, s16 idx);
--
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[PATCH 10/11] OMAP: hwmod: Force a softreset during _setup
From: Benoit Cousson b-cous...@ti.com
Force the softreset of every IPs during the _setup phase.
IPs that cannot support softreset or that should not
be reset must set the HWMOD_INIT_NO_RESET flag in the
hwmod struct.
Signed-off-by: Benoit Cousson b-cous...@ti.com
Signed-off-by: Paul Walmsley p...@pwsan.com
Cc: Kevin Hilman khil...@deeprootsystems.com
---
arch/arm/mach-omap2/omap_hwmod.c | 18 +-
1 files changed, 9 insertions(+), 9 deletions(-)
diff --git a/arch/arm/mach-omap2/omap_hwmod.c b/arch/arm/mach-omap2/omap_hwmod.c
index f4a569c..3e90984 100644
--- a/arch/arm/mach-omap2/omap_hwmod.c
+++ b/arch/arm/mach-omap2/omap_hwmod.c
@@ -980,8 +980,8 @@ static int _reset(struct omap_hwmod *oh)
/* clocks must be on for this operation */
if (oh-_state != _HWMOD_STATE_ENABLED) {
- WARN(1, omap_hwmod: %s: reset can only be entered from
-enabled state\n, oh-name);
+ pr_warning(omap_hwmod: %s: reset can only be entered from
+ enabled state\n, oh-name);
return -EINVAL;
}
@@ -998,8 +998,8 @@ static int _reset(struct omap_hwmod *oh)
MAX_MODULE_SOFTRESET_WAIT, c);
if (c == MAX_MODULE_SOFTRESET_WAIT)
- WARN(1, omap_hwmod: %s: softreset failed (waited %d usec)\n,
-oh-name, MAX_MODULE_SOFTRESET_WAIT);
+ pr_warning(omap_hwmod: %s: softreset failed (waited %d
usec)\n,
+ oh-name, MAX_MODULE_SOFTRESET_WAIT);
else
pr_debug(omap_hwmod: %s: softreset in %d usec\n, oh-name, c);
@@ -1198,12 +1198,12 @@ static int _setup(struct omap_hwmod *oh, void *data)
}
if (!(oh-flags HWMOD_INIT_NO_RESET)) {
+ _reset(oh);
+
/*
-* XXX Do the OCP_SYSCONFIG bits need to be
-* reprogrammed after a reset? If not, then this can
-* be removed. If they do, then probably the
-* _omap_hwmod_enable() function should be split to avoid the
-* rewrite of the OCP_SYSCONFIG register.
+* OCP_SYSCONFIG bits need to be reprogrammed after a softreset.
+* The _omap_hwmod_enable() function should be split to
+* avoid the rewrite of the OCP_SYSCONFIG register.
*/
if (oh-class-sysc) {
_update_sysc_cache(oh);
--
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[PATCH 05/11] [PATCH] OMAP: hwmod: separate list locking and hwmod hardware locking
From: Kevin Hilman khil...@ti.com
Currently omap_hwmod_mutex is being used to protect both the list
access/modification and concurrent access to hwmod functions. This
patch separates these two types of locking.
First, omap_hwmod_mutex is used only to protect access and
modification of omap_hwmod_list. Also cleaned up some comments
referring to this mutex that are no longer needed.
Then, for protecting concurrent access to hwmod functions, use a
per-hwmod mutex. This protects concurrent access to a single hwmod,
but would allow concurrent access to different hwmods.
Signed-off-by: Kevin Hilman khil...@deeprootsystems.com
[p...@pwsan.com: added structure documentation; changed mutex variable
name]
Signed-off-by: Paul Walmsley p...@pwsan.com
---
arch/arm/mach-omap2/omap_hwmod.c | 62 +-
arch/arm/plat-omap/include/plat/omap_hwmod.h |3 +
2 files changed, 33 insertions(+), 32 deletions(-)
diff --git a/arch/arm/mach-omap2/omap_hwmod.c b/arch/arm/mach-omap2/omap_hwmod.c
index 100115f..3084409 100644
--- a/arch/arm/mach-omap2/omap_hwmod.c
+++ b/arch/arm/mach-omap2/omap_hwmod.c
@@ -767,10 +767,10 @@ static struct omap_hwmod *_lookup(const char *name)
* @data: not used; pass NULL
*
* Called by omap_hwmod_late_init() (after omap2_clk_init()).
- * Resolves all clock names embedded in the hwmod. Must be called
- * with omap_hwmod_mutex held. Returns -EINVAL if the omap_hwmod
- * has not yet been registered or if the clocks have already been
- * initialized, 0 on success, or a non-zero error on failure.
+ * Resolves all clock names embedded in the hwmod. Returns -EINVAL if
+ * the omap_hwmod has not yet been registered or if the clocks have
+ * already been initialized, 0 on success, or a non-zero error on
+ * failure.
*/
static int _init_clocks(struct omap_hwmod *oh, void *data)
{
@@ -838,10 +838,9 @@ static int _wait_target_ready(struct omap_hwmod *oh)
* @oh: struct omap_hwmod *
*
* Resets an omap_hwmod @oh via the OCP_SYSCONFIG bit. hwmod must be
- * enabled for this to work. Must be called with omap_hwmod_mutex
- * held. Returns -EINVAL if the hwmod cannot be reset this way or if
- * the hwmod is in the wrong state, -ETIMEDOUT if the module did not
- * reset in time, or 0 upon success.
+ * enabled for this to work. Returns -EINVAL if the hwmod cannot be
+ * reset this way or if the hwmod is in the wrong state, -ETIMEDOUT if
+ * the module did not reset in time, or 0 upon success.
*/
static int _reset(struct omap_hwmod *oh)
{
@@ -891,9 +890,8 @@ static int _reset(struct omap_hwmod *oh)
* @oh: struct omap_hwmod *
*
* Enables an omap_hwmod @oh such that the MPU can access the hwmod's
- * register target. Must be called with omap_hwmod_mutex held.
- * Returns -EINVAL if the hwmod is in the wrong state or passes along
- * the return value of _wait_target_ready().
+ * register target. Returns -EINVAL if the hwmod is in the wrong
+ * state or passes along the return value of _wait_target_ready().
*/
int _omap_hwmod_enable(struct omap_hwmod *oh)
{
@@ -1004,11 +1002,10 @@ static int _shutdown(struct omap_hwmod *oh)
* @skip_setup_idle_p: do not idle hwmods at the end of the fn if 1
*
* Writes the CLOCKACTIVITY bits @clockact to the hwmod @oh
- * OCP_SYSCONFIG register. Must be called with omap_hwmod_mutex held.
- * @skip_setup_idle is intended to be used on a system that will not
- * call omap_hwmod_enable() to enable devices (e.g., a system without
- * PM runtime). Returns -EINVAL if the hwmod is in the wrong state or
- * returns 0.
+ * OCP_SYSCONFIG register. @skip_setup_idle is intended to be used on
+ * a system that will not call omap_hwmod_enable() to enable devices
+ * (e.g., a system without PM runtime). Returns -EINVAL if the hwmod
+ * is in the wrong state or returns 0.
*/
static int _setup(struct omap_hwmod *oh, void *data)
{
@@ -1038,6 +1035,7 @@ static int _setup(struct omap_hwmod *oh, void *data)
}
}
+ mutex_init(oh-_mutex);
oh-_state = _HWMOD_STATE_INITIALIZED;
r = _omap_hwmod_enable(oh);
@@ -1323,9 +1321,9 @@ int omap_hwmod_enable(struct omap_hwmod *oh)
if (!oh)
return -EINVAL;
- mutex_lock(omap_hwmod_mutex);
+ mutex_lock(oh-_mutex);
r = _omap_hwmod_enable(oh);
- mutex_unlock(omap_hwmod_mutex);
+ mutex_unlock(oh-_mutex);
return r;
}
@@ -1343,9 +1341,9 @@ int omap_hwmod_idle(struct omap_hwmod *oh)
if (!oh)
return -EINVAL;
- mutex_lock(omap_hwmod_mutex);
+ mutex_lock(oh-_mutex);
_omap_hwmod_idle(oh);
- mutex_unlock(omap_hwmod_mutex);
+ mutex_unlock(oh-_mutex);
return 0;
}
@@ -1363,9 +1361,9 @@ int omap_hwmod_shutdown(struct omap_hwmod *oh)
if (!oh)
return -EINVAL;
- mutex_lock(omap_hwmod_mutex);
+ mutex_lock(oh-_mutex);
_shutdown(oh);
- mutex_unlock(omap_hwmod_mutex);
+
[PATCH 01/11] OMAP: hwmod: Rename dma_ch to dma_req
From: Benoit Cousson b-cous...@ti.com
The dma request line attribute was named dma channel, which leads
to confusion with the real dma channel definition.
Signed-off-by: Benoit Cousson b-cous...@ti.com
Signed-off-by: Paul Walmsley p...@pwsan.com
Cc: Kevin Hilman khil...@deeprootsystems.com
---
arch/arm/mach-omap2/omap_hwmod.c | 10 +-
arch/arm/plat-omap/include/plat/omap_hwmod.h | 12 ++--
2 files changed, 11 insertions(+), 11 deletions(-)
diff --git a/arch/arm/mach-omap2/omap_hwmod.c b/arch/arm/mach-omap2/omap_hwmod.c
index cb911d7..8bf19a7 100644
--- a/arch/arm/mach-omap2/omap_hwmod.c
+++ b/arch/arm/mach-omap2/omap_hwmod.c
@@ -1468,7 +1468,7 @@ int omap_hwmod_count_resources(struct omap_hwmod *oh)
{
int ret, i;
- ret = oh-mpu_irqs_cnt + oh-sdma_chs_cnt;
+ ret = oh-mpu_irqs_cnt + oh-sdma_reqs_cnt;
for (i = 0; i oh-slaves_cnt; i++)
ret += oh-slaves[i]-addr_cnt;
@@ -1501,10 +1501,10 @@ int omap_hwmod_fill_resources(struct omap_hwmod *oh,
struct resource *res)
r++;
}
- for (i = 0; i oh-sdma_chs_cnt; i++) {
- (res + r)-name = (oh-sdma_chs + i)-name;
- (res + r)-start = (oh-sdma_chs + i)-dma_ch;
- (res + r)-end = (oh-sdma_chs + i)-dma_ch;
+ for (i = 0; i oh-sdma_reqs_cnt; i++) {
+ (res + r)-name = (oh-sdma_reqs + i)-name;
+ (res + r)-start = (oh-sdma_reqs + i)-dma_req;
+ (res + r)-end = (oh-sdma_reqs + i)-dma_req;
(res + r)-flags = IORESOURCE_DMA;
r++;
}
diff --git a/arch/arm/plat-omap/include/plat/omap_hwmod.h
b/arch/arm/plat-omap/include/plat/omap_hwmod.h
index a4e508d..5506d80 100644
--- a/arch/arm/plat-omap/include/plat/omap_hwmod.h
+++ b/arch/arm/plat-omap/include/plat/omap_hwmod.h
@@ -96,7 +96,7 @@ struct omap_hwmod_irq_info {
/**
* struct omap_hwmod_dma_info - DMA channels used by the hwmod
* @name: name of the DMA channel (module local name)
- * @dma_ch: DMA channel ID
+ * @dma_req: DMA request ID
*
* @name should be something short, e.g., tx or rx. It is for use
* by platform_get_resource_byname(). It is defined locally to the
@@ -104,7 +104,7 @@ struct omap_hwmod_irq_info {
*/
struct omap_hwmod_dma_info {
const char *name;
- u16 dma_ch;
+ u16 dma_req;
};
/**
@@ -410,7 +410,7 @@ struct omap_hwmod_class {
* @class: struct omap_hwmod_class * to the class of this hwmod
* @od: struct omap_device currently associated with this hwmod (internal use)
* @mpu_irqs: ptr to an array of MPU IRQs (see also mpu_irqs_cnt)
- * @sdma_chs: ptr to an array of SDMA channel IDs (see also sdma_chs_cnt)
+ * @sdma_reqs: ptr to an array of System DMA request IDs (see sdma_reqs_cnt)
* @prcm: PRCM data pertaining to this hwmod
* @main_clk: main clock: OMAP clock name
* @_clk: pointer to the main struct clk (filled in at runtime)
@@ -424,7 +424,7 @@ struct omap_hwmod_class {
* @msuspendmux_reg_id: CONTROL_MSUSPENDMUX register ID (1-6)
* @msuspendmux_shift: CONTROL_MSUSPENDMUX register bit shift
* @mpu_irqs_cnt: number of @mpu_irqs
- * @sdma_chs_cnt: number of @sdma_chs
+ * @sdma_reqs_cnt: number of @sdma_reqs
* @opt_clks_cnt: number of @opt_clks
* @master_cnt: number of @master entries
* @slaves_cnt: number of @slave entries
@@ -448,7 +448,7 @@ struct omap_hwmod {
struct omap_hwmod_class *class;
struct omap_device *od;
struct omap_hwmod_irq_info *mpu_irqs;
- struct omap_hwmod_dma_info *sdma_chs;
+ struct omap_hwmod_dma_info *sdma_reqs;
union {
struct omap_hwmod_omap2_prcm omap2;
struct omap_hwmod_omap4_prcm omap4;
@@ -468,7 +468,7 @@ struct omap_hwmod {
u8 msuspendmux_shift;
u8 response_lat;
u8 mpu_irqs_cnt;
- u8 sdma_chs_cnt;
+ u8 sdma_reqs_cnt;
u8 opt_clks_cnt;
u8 masters_cnt;
u8 slaves_cnt;
--
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[PATCH 03/11] OMAP: hwmod: Fix omap_hwmod_reset wrong state test
From: Liam Girdwood l...@slimlogic.co.uk
The reset function wrongly used the state flag as a bit mask and was trying
to re-enable after a reset.
hwmod is still enabled for the PRCM point of view after a softreset
so there is no need to re-enable.
Remove the state check from omap_hwmod_reset since the _reset
function is checking that as well and in addition can generate
a warning
Signed-off-by: Liam Girdwood l...@slimlogic.co.uk
[b-cous...@ti.com: remove the wrong test, remove the re-enable]
Signed-off-by: Benoit Cousson b-cous...@ti.com
Signed-off-by: Paul Walmsley p...@pwsan.com
Cc: Kevin Hilman khil...@deeprootsystems.com
Cc: Rajendra Nayak rna...@ti.com
---
arch/arm/mach-omap2/omap_hwmod.c |6 ++
1 files changed, 2 insertions(+), 4 deletions(-)
diff --git a/arch/arm/mach-omap2/omap_hwmod.c b/arch/arm/mach-omap2/omap_hwmod.c
index 5bb25e3..100115f 100644
--- a/arch/arm/mach-omap2/omap_hwmod.c
+++ b/arch/arm/mach-omap2/omap_hwmod.c
@@ -1434,19 +1434,17 @@ void omap_hwmod_ocp_barrier(struct omap_hwmod *oh)
*
* Under some conditions, a driver may wish to reset the entire device.
* Called from omap_device code. Returns -EINVAL on error or passes along
- * the return value from _reset()/_enable().
+ * the return value from _reset().
*/
int omap_hwmod_reset(struct omap_hwmod *oh)
{
int r;
- if (!oh || !(oh-_state _HWMOD_STATE_ENABLED))
+ if (!oh)
return -EINVAL;
mutex_lock(omap_hwmod_mutex);
r = _reset(oh);
- if (!r)
- r = _omap_hwmod_enable(oh);
mutex_unlock(omap_hwmod_mutex);
return r;
--
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[PATCH 02/11] OMAP: hwmod: Do not disable clocks if hwmod already in idle
From: Benoit Cousson b-cous...@ti.com
The disable function was disabling clocks and dependencies
from both enable and idle state. Since idle function is already
disabling both, an enable - idle - disable sequence will
try to disable twice the clocks and thus generate a
Trying disable clock XXX with 0 usecount warning.
Signed-off-by: Benoit Cousson b-cous...@ti.com
Signed-off-by: Paul Walmsley p...@pwsan.com
Cc: Kevin Hilman khil...@deeprootsystems.com
---
arch/arm/mach-omap2/omap_hwmod.c | 10 +++---
1 files changed, 7 insertions(+), 3 deletions(-)
diff --git a/arch/arm/mach-omap2/omap_hwmod.c b/arch/arm/mach-omap2/omap_hwmod.c
index 8bf19a7..5bb25e3 100644
--- a/arch/arm/mach-omap2/omap_hwmod.c
+++ b/arch/arm/mach-omap2/omap_hwmod.c
@@ -982,9 +982,13 @@ static int _shutdown(struct omap_hwmod *oh)
if (oh-class-sysc)
_sysc_shutdown(oh);
- _del_initiator_dep(oh, mpu_oh);
- /* XXX what about the other system initiators here? DMA, tesla, d2d */
- _disable_clocks(oh);
+
+ /* clocks and deps are already disabled in idle */
+ if (oh-_state == _HWMOD_STATE_ENABLED) {
+ _del_initiator_dep(oh, mpu_oh);
+ /* XXX what about the other system initiators here? dma, dsp */
+ _disable_clocks(oh);
+ }
/* XXX Should this code also force-disable the optional clocks? */
/* XXX mux any associated balls to safe mode */
--
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[PATCH] OMAP: hwmod: Fix softreset status check for some new OMAP4 IPs
In OMAP3 a specific SYSSTATUS register was used to get the softreset status.
Starting in OMAP4, some IPs does not have SYSSTATUS register and instead
use the SYSC softreset bit to provide the status.
Other cases might exist:
- Some IPs like McBSP does have a softreset control but no reset status.
- Some IPs that represent subsystem, like the DSS, can contains
a reset status without softreset control. The status is the aggregation
of all the sub modules reset status.
- Add a new flag (SYSC_HAS_RESET_STATUS) to identify the new programming model
and replace the previous SYSS_MISSING, that was used to flag IP with
softreset control but without the SYSSTATUS register, with a specific
SYSS_HAS_RESET_STATUS flag.
- MCSPI and MMC contains both programming models, so the legacy one
will be prevented by removing the syss offset field that become useless.
Signed-off-by: Benoit Cousson b-cous...@ti.com
Cc: Paul Walmsley p...@pwsan.com
Cc: Kevin Hilman khil...@deeprootsystems.com
Cc: Rajendra Nayak rna...@ti.com
---
arch/arm/mach-omap2/omap_hwmod.c | 22 +-
arch/arm/plat-omap/include/plat/omap_hwmod.h |3 ++-
2 files changed, 19 insertions(+), 6 deletions(-)
diff --git a/arch/arm/mach-omap2/omap_hwmod.c b/arch/arm/mach-omap2/omap_hwmod.c
index 4309107..4819a49 100644
--- a/arch/arm/mach-omap2/omap_hwmod.c
+++ b/arch/arm/mach-omap2/omap_hwmod.c
@@ -997,6 +997,12 @@ static int _read_hardreset(struct omap_hwmod *oh, const
char *name)
* enabled for this to work. Returns -EINVAL if the hwmod cannot be
* reset this way or if the hwmod is in the wrong state, -ETIMEDOUT if
* the module did not reset in time, or 0 upon success.
+ *
+ * In OMAP3 a specific SYSSTATUS register is used to get the reset status.
+ * Starting in OMAP4, some IPs does not have SYSSTATUS register and instead
+ * use the SYSCONFIG softreset bit to provide the status.
+ *
+ * Note that some IP like McBSP does have a reset control but no reset status.
*/
static int _reset(struct omap_hwmod *oh)
{
@@ -1005,8 +1011,7 @@ static int _reset(struct omap_hwmod *oh)
int ret = 0;
if (!oh-class-sysc ||
- !(oh-class-sysc-sysc_flags SYSC_HAS_SOFTRESET) ||
- (oh-class-sysc-sysc_flags SYSS_MISSING))
+ !(oh-class-sysc-sysc_flags SYSC_HAS_SOFTRESET))
return -EINVAL;
/* clocks must be on for this operation */
@@ -1028,9 +1033,16 @@ static int _reset(struct omap_hwmod *oh)
goto dis_opt_clks;
_write_sysconfig(v, oh);
- omap_test_timeout((omap_hwmod_readl(oh, oh-class-sysc-syss_offs)
- SYSS_RESETDONE_MASK),
- MAX_MODULE_SOFTRESET_WAIT, c);
+ if (oh-class-sysc-sysc_flags SYSS_HAS_RESET_STATUS)
+ omap_test_timeout((omap_hwmod_readl(oh,
+ oh-class-sysc-syss_offs)
+ SYSS_RESETDONE_MASK),
+ MAX_MODULE_SOFTRESET_WAIT, c);
+ else if (oh-class-sysc-sysc_flags SYSC_HAS_RESET_STATUS)
+ omap_test_timeout(!(omap_hwmod_readl(oh,
+oh-class-sysc-sysc_offs)
+ SYSC_TYPE2_SOFTRESET_MASK),
+ MAX_MODULE_SOFTRESET_WAIT, c);
if (c == MAX_MODULE_SOFTRESET_WAIT)
pr_warning(omap_hwmod: %s: softreset failed (waited %d
usec)\n,
diff --git a/arch/arm/plat-omap/include/plat/omap_hwmod.h
b/arch/arm/plat-omap/include/plat/omap_hwmod.h
index 878f919..ee53758 100644
--- a/arch/arm/plat-omap/include/plat/omap_hwmod.h
+++ b/arch/arm/plat-omap/include/plat/omap_hwmod.h
@@ -251,8 +251,9 @@ struct omap_hwmod_ocp_if {
#define SYSC_HAS_CLOCKACTIVITY (1 4)
#define SYSC_HAS_SIDLEMODE (1 5)
#define SYSC_HAS_MIDLEMODE (1 6)
-#define SYSS_MISSING (1 7)
+#define SYSS_HAS_RESET_STATUS (1 7)
#define SYSC_NO_CACHE (1 8) /* XXX SW flag, belongs elsewhere */
+#define SYSC_HAS_RESET_STATUS (1 9)
/* omap_hwmod_sysconfig.clockact flags */
#define CLOCKACT_TEST_BOTH 0x0
--
1.6.0.4
--
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[PATCH] OMAP: hwmod: Fix softreset for modules with optional clocks
Some modules (like GPIO, DSS...) require optionals clock to be enabled
in order to complete the sofreset properly.
Add a HWMOD_CONTROL_OPT_CLKS_IN_RESET flag to force all optional clocks
to be enabled before reset. Disabled them once the reset is done.
TODO:
For the moment it is very hard to understand from the HW spec, which
optional clock is needed and which one is not. So the current approach
will enable all the optional clocks.
Paul proposed a much finer approach that will allow to tag only the needed
clock in the optional clock table. This might be doable as soon as we have
a clear understanding of these dependencies.
Reported-by: Partha Basak p-bas...@ti.com
Signed-off-by: Benoit Cousson b-cous...@ti.com
Cc: Paul Walmsley p...@pwsan.com
Cc: Kevin Hilman khil...@deeprootsystems.com
---
arch/arm/mach-omap2/omap_hwmod.c | 51 +++---
arch/arm/plat-omap/include/plat/omap_hwmod.h |5 +++
2 files changed, 51 insertions(+), 5 deletions(-)
diff --git a/arch/arm/mach-omap2/omap_hwmod.c b/arch/arm/mach-omap2/omap_hwmod.c
index 8c27923..4309107 100644
--- a/arch/arm/mach-omap2/omap_hwmod.c
+++ b/arch/arm/mach-omap2/omap_hwmod.c
@@ -546,6 +546,36 @@ static int _disable_clocks(struct omap_hwmod *oh)
return 0;
}
+static void _enable_optional_clocks(struct omap_hwmod *oh)
+{
+ struct omap_hwmod_opt_clk *oc;
+ int i;
+
+ pr_debug(omap_hwmod: %s: enabling optional clocks\n, oh-name);
+
+ for (i = oh-opt_clks_cnt, oc = oh-opt_clks; i 0; i--, oc++)
+ if (oc-_clk) {
+ pr_warning(omap_hwmod: enable %s:%s\n, oc-role,
+ oc-_clk-name);
+ clk_enable(oc-_clk);
+ }
+}
+
+static void _disable_optional_clocks(struct omap_hwmod *oh)
+{
+ struct omap_hwmod_opt_clk *oc;
+ int i;
+
+ pr_debug(omap_hwmod: %s: disabling optional clocks\n, oh-name);
+
+ for (i = oh-opt_clks_cnt, oc = oh-opt_clks; i 0; i--, oc++)
+ if (oc-_clk) {
+ pr_warning(omap_hwmod: disable %s:%s\n, oc-role,
+ oc-_clk-name);
+ clk_disable(oc-_clk);
+ }
+}
+
/**
* _find_mpu_port_index - find hwmod OCP slave port ID intended for MPU use
* @oh: struct omap_hwmod *
@@ -970,8 +1000,9 @@ static int _read_hardreset(struct omap_hwmod *oh, const
char *name)
*/
static int _reset(struct omap_hwmod *oh)
{
- u32 r, v;
+ u32 v;
int c = 0;
+ int ret = 0;
if (!oh-class-sysc ||
!(oh-class-sysc-sysc_flags SYSC_HAS_SOFTRESET) ||
@@ -985,12 +1016,16 @@ static int _reset(struct omap_hwmod *oh)
return -EINVAL;
}
+ /* For some modules, all optionnal clocks need to be enabled as well */
+ if (oh-flags HWMOD_CONTROL_OPT_CLKS_IN_RESET)
+ _enable_optional_clocks(oh);
+
pr_debug(omap_hwmod: %s: resetting\n, oh-name);
v = oh-_sysc_cache;
- r = _set_softreset(oh, v);
- if (r)
- return r;
+ ret = _set_softreset(oh, v);
+ if (ret)
+ goto dis_opt_clks;
_write_sysconfig(v, oh);
omap_test_timeout((omap_hwmod_readl(oh, oh-class-sysc-syss_offs)
@@ -1008,7 +1043,13 @@ static int _reset(struct omap_hwmod *oh)
* _wait_target_ready() or _reset()
*/
- return (c == MAX_MODULE_SOFTRESET_WAIT) ? -ETIMEDOUT : 0;
+ ret = (c == MAX_MODULE_SOFTRESET_WAIT) ? -ETIMEDOUT : 0;
+
+dis_opt_clks:
+ if (oh-flags HWMOD_CONTROL_OPT_CLKS_IN_RESET)
+ _disable_optional_clocks(oh);
+
+ return ret;
}
/**
diff --git a/arch/arm/plat-omap/include/plat/omap_hwmod.h
b/arch/arm/plat-omap/include/plat/omap_hwmod.h
index 7fde44d..878f919 100644
--- a/arch/arm/plat-omap/include/plat/omap_hwmod.h
+++ b/arch/arm/plat-omap/include/plat/omap_hwmod.h
@@ -368,6 +368,10 @@ struct omap_hwmod_omap4_prcm {
* HWMOD_SET_DEFAULT_CLOCKACT: program CLOCKACTIVITY bits at startup
* HWMOD_NO_IDLEST : this module does not have idle status - this is the case
* only for few initiator modules on OMAP2 3.
+ * HWMOD_CONTROL_OPT_CLKS_IN_RESET: Enable all optional clocks during reset.
+ * This is needed for devices like DSS that require optional clocks enabled
+ * in order to complete the reset. Optional clocks will be disabled
+ * again after the reset.
*/
#define HWMOD_SWSUP_SIDLE (1 0)
#define HWMOD_SWSUP_MSTANDBY (1 1)
@@ -376,6 +380,7 @@ struct omap_hwmod_omap4_prcm {
#define HWMOD_NO_OCP_AUTOIDLE (1 4)
#define HWMOD_SET_DEFAULT_CLOCKACT (1 5)
#define HWMOD_NO_IDLEST(1 6)
+#define HWMOD_CONTROL_OPT_CLKS_IN_RESET(1 7)
/*
* omap_hwmod._int_flags definitions
--
1.6.0.4
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[PATCH] OMAP: hwmod: softreset fixes with opt clocks
Hi Paul, Here are some fixes for the softreset issues that were highlighted on some IPs like GPIO or DSS. For the moment they are still based on your previous series: git://git.pwsan.com/linux-2.6 hwmod_hardreset_dev If you are OK with these, I'll rebase that on top of your latest submission to l-o / linux-arm-kernel. Thanks, Benoit Benoit Cousson (2): OMAP: hwmod: Fix softreset for modules with optional clocks OMAP: hwmod: Fix softreset status check for some new OMAP4 IPs arch/arm/mach-omap2/omap_hwmod.c | 73 ++ arch/arm/plat-omap/include/plat/omap_hwmod.h |8 +++- 2 files changed, 70 insertions(+), 11 deletions(-) -- To unsubscribe from this list: send the line unsubscribe linux-omap in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
Re: [PATCH 03/10] OMAP3: PM: move device-specific special cases from PM core into CPUidle
Paul Walmsley p...@pwsan.com writes:
Hi Kevin,
On Wed, 15 Sep 2010, Kevin Hilman wrote:
In an effort to simplify the core idle path, move any device-specific
special case handling from the core PM idle path into the CPUidle
pre-idle checking path.
This keeps the core, interrupts-disabled idle path streamlined and
independent of any device-specific handling, and also allows CPUidle
to do the checking only for certain C-states as needed. This patch
has the device checks in place for all states with the CHECK_BM flag,
namely all states = C2.
This patch was inspired by a similar patch written by Tero Kristo as
part of a larger series to add INACTIVE state support.
As with the original patch, I don't quite understand the improvement
here. In particular, this part:
diff --git a/arch/arm/mach-omap2/cpuidle34xx.c
b/arch/arm/mach-omap2/cpuidle34xx.c
index 3d3d035..0923b82 100644
--- a/arch/arm/mach-omap2/cpuidle34xx.c
+++ b/arch/arm/mach-omap2/cpuidle34xx.c
@@ -233,14 +234,54 @@ static int omap3_enter_idle_bm(struct cpuidle_device
*dev,
struct cpuidle_state *state)
{
struct cpuidle_state *new_state = next_valid_state(dev, state);
+u32 core_next_state, per_next_state = 0, per_saved_state = 0;
+u32 cam_state;
+struct omap3_processor_cx *cx;
+int ret;
if ((state-flags CPUIDLE_FLAG_CHECK_BM) omap3_idle_bm_check()) {
BUG_ON(!dev-safe_state);
new_state = dev-safe_state;
+goto select_state;
+}
+
+cx = cpuidle_get_statedata(state);
+core_next_state = cx-core_state;
+
+/*
+ * Prevent idle completely if CAM is active.
+ * CAM does not have wakeup capability in OMAP3.
+ */
+cam_state = pwrdm_read_pwrst(cam_pd);
+if (cam_state == PWRDM_POWER_ON) {
+new_state = dev-safe_state;
+goto select_state;
}
+/*
+ * Prevent PER off if CORE is not in retention or off as this
+ * would disable PER wakeups completely.
+ */
+per_next_state = per_saved_state = pwrdm_read_next_pwrst(per_pd);
+if ((per_next_state == PWRDM_POWER_OFF)
+(core_next_state PWRDM_POWER_RET)) {
+per_next_state = PWRDM_POWER_RET;
+pwrdm_set_next_pwrst(per_pd, per_next_state);
+}
+
+/* Are we changing PER target state? */
+if (per_next_state != per_saved_state)
+pwrdm_set_next_pwrst(per_pd, per_next_state);
In this case, the PER / CORE constraints don't have anything to do with
the MPU or CPUIdle, so they don't seem to belong in the CPUIdle code. The
extra comments are certainly nice -- they make it more clear as to what is
going on here -- but maybe those can just be added to pm34xx.c ?
CPUidle currently manages MPU and CORE powerdomains, so the CORE
constraints seem to make perfect sense here (at least to me.)
The question is probably more about the PER constraints.
The basic goal of this is to streamline the core idle (omap_sram_idle())
to be the minimum streamline idle, and to move all the constraint
checking and activity checking to higher layers (like CPUidle.)
Specifically, I'm working towards moving the device-specific idle
constraints out of the core idle path (omap_sram_idle()) and move them
into higher layers where we're checking for activity etc.
This is just a baby step towards moving the device-idle out of CPUidle
completely to a place where it can be managed by the driver themeselves
using runtime PM or by using constraints instead of these hard-coded
hacks.
Kevin
+
+select_state:
dev-last_state = new_state;
-return omap3_enter_idle(dev, new_state);
+ret = omap3_enter_idle(dev, new_state);
+
+/* Restore original PER state if it was modified */
+if (per_next_state != per_saved_state)
+pwrdm_set_next_pwrst(per_pd, per_saved_state);
+
+return ret;
}
DEFINE_PER_CPU(struct cpuidle_device, omap3_idle_dev);
@@ -328,7 +369,8 @@ void omap_init_power_states(void)
cpuidle_params_table[OMAP3_STATE_C2].threshold;
omap3_power_states[OMAP3_STATE_C2].mpu_state = PWRDM_POWER_ON;
omap3_power_states[OMAP3_STATE_C2].core_state = PWRDM_POWER_ON;
-omap3_power_states[OMAP3_STATE_C2].flags = CPUIDLE_FLAG_TIME_VALID;
+omap3_power_states[OMAP3_STATE_C2].flags = CPUIDLE_FLAG_TIME_VALID |
+CPUIDLE_FLAG_CHECK_BM;
/* C3 . MPU CSWR + Core inactive */
omap3_power_states[OMAP3_STATE_C3].valid =
@@ -426,6 +468,8 @@ int __init omap3_idle_init(void)
mpu_pd = pwrdm_lookup(mpu_pwrdm);
core_pd = pwrdm_lookup(core_pwrdm);
+per_pd = pwrdm_lookup(per_pwrdm);
+cam_pd = pwrdm_lookup(cam_pwrdm);
omap_init_power_states();
cpuidle_register_driver(omap3_idle_driver);
diff --git a/arch/arm/mach-omap2/pm34xx.c b/arch/arm/mach-omap2/pm34xx.c
index 429268e..bb2ba1e 100644
---
Re: [PATCH] OMAP: hwmod: softreset fixes with opt clocks
On 9/21/2010 6:57 PM, Cousson, Benoit wrote: Hi Paul, Here are some fixes for the softreset issues that were highlighted on some IPs like GPIO or DSS. For the moment they are still based on your previous series: git://git.pwsan.com/linux-2.6 hwmod_hardreset_dev If you are OK with these, I'll rebase that on top of your latest submission to l-o / linux-arm-kernel. Thanks, Benoit Benoit Cousson (2): OMAP: hwmod: Fix softreset for modules with optional clocks OMAP: hwmod: Fix softreset status check for some new OMAP4 IPs arch/arm/mach-omap2/omap_hwmod.c | 73 ++ arch/arm/plat-omap/include/plat/omap_hwmod.h |8 +++- 2 files changed, 70 insertions(+), 11 deletions(-) Oops, I forgot... The patches are available here: git://gitorious.org/omap-pm/linux.git pm-wip/hwmods-reset-fixes Regards, Benoit -- To unsubscribe from this list: send the line unsubscribe linux-omap in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
Re: [PATCH] OMAP: hwmod: softreset fixes with opt clocks
Hi Benoît, On Tue, 21 Sep 2010, Benoit Cousson wrote: Here are some fixes for the softreset issues that were highlighted on some IPs like GPIO or DSS. For the moment they are still based on your previous series: git://git.pwsan.com/linux-2.6 hwmod_hardreset_dev If you are OK with these, I'll rebase that on top of your latest submission to l-o / linux-arm-kernel. Just took a quick look at them; they both look fine to me. I do have one minor comment on the optional clock patch; I will post it as a reply to that message. That hwmod_hardreset_dev branch is almost identical to the hwmod_2.6.37 branch. Maybe I should just add your patches to the hwmod_2.6.37 branch, along with Rajendra's ENAWAKEUP patch, and post those three to lakml, if you are okay with that? - Paul
Re: [PATCH] OMAP: hwmod: Fix softreset for modules with optional clocks
Hi Benoit,
one minor comment here -
On Tue, 21 Sep 2010, Benoit Cousson wrote:
Some modules (like GPIO, DSS...) require optionals clock to be enabled
in order to complete the sofreset properly.
Add a HWMOD_CONTROL_OPT_CLKS_IN_RESET flag to force all optional clocks
to be enabled before reset. Disabled them once the reset is done.
TODO:
For the moment it is very hard to understand from the HW spec, which
optional clock is needed and which one is not. So the current approach
will enable all the optional clocks.
Paul proposed a much finer approach that will allow to tag only the needed
clock in the optional clock table. This might be doable as soon as we have
a clear understanding of these dependencies.
Reported-by: Partha Basak p-bas...@ti.com
Signed-off-by: Benoit Cousson b-cous...@ti.com
Cc: Paul Walmsley p...@pwsan.com
Cc: Kevin Hilman khil...@deeprootsystems.com
---
arch/arm/mach-omap2/omap_hwmod.c | 51
+++---
arch/arm/plat-omap/include/plat/omap_hwmod.h |5 +++
2 files changed, 51 insertions(+), 5 deletions(-)
diff --git a/arch/arm/mach-omap2/omap_hwmod.c
b/arch/arm/mach-omap2/omap_hwmod.c
index 8c27923..4309107 100644
--- a/arch/arm/mach-omap2/omap_hwmod.c
+++ b/arch/arm/mach-omap2/omap_hwmod.c
@@ -546,6 +546,36 @@ static int _disable_clocks(struct omap_hwmod *oh)
return 0;
}
+static void _enable_optional_clocks(struct omap_hwmod *oh)
+{
+ struct omap_hwmod_opt_clk *oc;
+ int i;
+
+ pr_debug(omap_hwmod: %s: enabling optional clocks\n, oh-name);
+
+ for (i = oh-opt_clks_cnt, oc = oh-opt_clks; i 0; i--, oc++)
+ if (oc-_clk) {
+ pr_warning(omap_hwmod: enable %s:%s\n, oc-role,
+oc-_clk-name);
What do you think about maybe converting this to a pr_debug() (and the
same in the disable code below)? If you are happy with that, I can make
the change here when I pull the patch in.
+ clk_enable(oc-_clk);
+ }
+}
+
+static void _disable_optional_clocks(struct omap_hwmod *oh)
+{
+ struct omap_hwmod_opt_clk *oc;
+ int i;
+
+ pr_debug(omap_hwmod: %s: disabling optional clocks\n, oh-name);
+
+ for (i = oh-opt_clks_cnt, oc = oh-opt_clks; i 0; i--, oc++)
+ if (oc-_clk) {
+ pr_warning(omap_hwmod: disable %s:%s\n, oc-role,
+oc-_clk-name);
+ clk_disable(oc-_clk);
+ }
+}
+
/**
* _find_mpu_port_index - find hwmod OCP slave port ID intended for MPU use
* @oh: struct omap_hwmod *
@@ -970,8 +1000,9 @@ static int _read_hardreset(struct omap_hwmod *oh, const
char *name)
*/
static int _reset(struct omap_hwmod *oh)
{
- u32 r, v;
+ u32 v;
int c = 0;
+ int ret = 0;
if (!oh-class-sysc ||
!(oh-class-sysc-sysc_flags SYSC_HAS_SOFTRESET) ||
@@ -985,12 +1016,16 @@ static int _reset(struct omap_hwmod *oh)
return -EINVAL;
}
+ /* For some modules, all optionnal clocks need to be enabled as well */
+ if (oh-flags HWMOD_CONTROL_OPT_CLKS_IN_RESET)
+ _enable_optional_clocks(oh);
+
pr_debug(omap_hwmod: %s: resetting\n, oh-name);
v = oh-_sysc_cache;
- r = _set_softreset(oh, v);
- if (r)
- return r;
+ ret = _set_softreset(oh, v);
+ if (ret)
+ goto dis_opt_clks;
_write_sysconfig(v, oh);
omap_test_timeout((omap_hwmod_readl(oh, oh-class-sysc-syss_offs)
@@ -1008,7 +1043,13 @@ static int _reset(struct omap_hwmod *oh)
* _wait_target_ready() or _reset()
*/
- return (c == MAX_MODULE_SOFTRESET_WAIT) ? -ETIMEDOUT : 0;
+ ret = (c == MAX_MODULE_SOFTRESET_WAIT) ? -ETIMEDOUT : 0;
+
+dis_opt_clks:
+ if (oh-flags HWMOD_CONTROL_OPT_CLKS_IN_RESET)
+ _disable_optional_clocks(oh);
+
+ return ret;
}
/**
diff --git a/arch/arm/plat-omap/include/plat/omap_hwmod.h
b/arch/arm/plat-omap/include/plat/omap_hwmod.h
index 7fde44d..878f919 100644
--- a/arch/arm/plat-omap/include/plat/omap_hwmod.h
+++ b/arch/arm/plat-omap/include/plat/omap_hwmod.h
@@ -368,6 +368,10 @@ struct omap_hwmod_omap4_prcm {
* HWMOD_SET_DEFAULT_CLOCKACT: program CLOCKACTIVITY bits at startup
* HWMOD_NO_IDLEST : this module does not have idle status - this is the case
* only for few initiator modules on OMAP2 3.
+ * HWMOD_CONTROL_OPT_CLKS_IN_RESET: Enable all optional clocks during reset.
+ * This is needed for devices like DSS that require optional clocks
enabled
+ * in order to complete the reset. Optional clocks will be disabled
+ * again after the reset.
*/
#define HWMOD_SWSUP_SIDLE(1 0)
#define HWMOD_SWSUP_MSTANDBY (1 1)
@@ -376,6 +380,7 @@ struct omap_hwmod_omap4_prcm {
#define HWMOD_NO_OCP_AUTOIDLE
Re: [PATCH] OMAP: hwmod: Fix softreset for modules with optional clocks
On 9/21/2010 7:07 PM, Paul Walmsley wrote:
Hi Benoit,
one minor comment here -
On Tue, 21 Sep 2010, Benoit Cousson wrote:
Some modules (like GPIO, DSS...) require optionals clock to be enabled
in order to complete the sofreset properly.
Add a HWMOD_CONTROL_OPT_CLKS_IN_RESET flag to force all optional clocks
to be enabled before reset. Disabled them once the reset is done.
TODO:
For the moment it is very hard to understand from the HW spec, which
optional clock is needed and which one is not. So the current approach
will enable all the optional clocks.
Paul proposed a much finer approach that will allow to tag only the needed
clock in the optional clock table. This might be doable as soon as we have
a clear understanding of these dependencies.
Reported-by: Partha Basakp-bas...@ti.com
Signed-off-by: Benoit Coussonb-cous...@ti.com
Cc: Paul Walmsleyp...@pwsan.com
Cc: Kevin Hilmankhil...@deeprootsystems.com
---
arch/arm/mach-omap2/omap_hwmod.c | 51 +++---
arch/arm/plat-omap/include/plat/omap_hwmod.h |5 +++
2 files changed, 51 insertions(+), 5 deletions(-)
diff --git a/arch/arm/mach-omap2/omap_hwmod.c b/arch/arm/mach-omap2/omap_hwmod.c
index 8c27923..4309107 100644
--- a/arch/arm/mach-omap2/omap_hwmod.c
+++ b/arch/arm/mach-omap2/omap_hwmod.c
@@ -546,6 +546,36 @@ static int _disable_clocks(struct omap_hwmod *oh)
return 0;
}
+static void _enable_optional_clocks(struct omap_hwmod *oh)
+{
+ struct omap_hwmod_opt_clk *oc;
+ int i;
+
+ pr_debug(omap_hwmod: %s: enabling optional clocks\n, oh-name);
+
+ for (i = oh-opt_clks_cnt, oc = oh-opt_clks; i 0; i--, oc++)
+ if (oc-_clk) {
+ pr_warning(omap_hwmod: enable %s:%s\n, oc-role,
+ oc-_clk-name);
What do you think about maybe converting this to a pr_debug() (and the
same in the disable code below)? If you are happy with that, I can make
the change here when I pull the patch in.
Oops... yes, sure, that was the intent... I've just cleaned the other
ones, but missed these two.
Thanks for catching that.
Regards,
Benoit
+ clk_enable(oc-_clk);
+ }
+}
+
+static void _disable_optional_clocks(struct omap_hwmod *oh)
+{
+ struct omap_hwmod_opt_clk *oc;
+ int i;
+
+ pr_debug(omap_hwmod: %s: disabling optional clocks\n, oh-name);
+
+ for (i = oh-opt_clks_cnt, oc = oh-opt_clks; i 0; i--, oc++)
+ if (oc-_clk) {
+ pr_warning(omap_hwmod: disable %s:%s\n, oc-role,
+ oc-_clk-name);
+ clk_disable(oc-_clk);
+ }
+}
+
/**
* _find_mpu_port_index - find hwmod OCP slave port ID intended for MPU use
* @oh: struct omap_hwmod *
@@ -970,8 +1000,9 @@ static int _read_hardreset(struct omap_hwmod *oh, const
char *name)
*/
static int _reset(struct omap_hwmod *oh)
{
- u32 r, v;
+ u32 v;
int c = 0;
+ int ret = 0;
if (!oh-class-sysc ||
!(oh-class-sysc-sysc_flags SYSC_HAS_SOFTRESET) ||
@@ -985,12 +1016,16 @@ static int _reset(struct omap_hwmod *oh)
return -EINVAL;
}
+ /* For some modules, all optionnal clocks need to be enabled as well */
+ if (oh-flags HWMOD_CONTROL_OPT_CLKS_IN_RESET)
+ _enable_optional_clocks(oh);
+
pr_debug(omap_hwmod: %s: resetting\n, oh-name);
v = oh-_sysc_cache;
- r = _set_softreset(oh,v);
- if (r)
- return r;
+ ret = _set_softreset(oh,v);
+ if (ret)
+ goto dis_opt_clks;
_write_sysconfig(v, oh);
omap_test_timeout((omap_hwmod_readl(oh, oh-class-sysc-syss_offs)
@@ -1008,7 +1043,13 @@ static int _reset(struct omap_hwmod *oh)
* _wait_target_ready() or _reset()
*/
- return (c == MAX_MODULE_SOFTRESET_WAIT) ? -ETIMEDOUT : 0;
+ ret = (c == MAX_MODULE_SOFTRESET_WAIT) ? -ETIMEDOUT : 0;
+
+dis_opt_clks:
+ if (oh-flags HWMOD_CONTROL_OPT_CLKS_IN_RESET)
+ _disable_optional_clocks(oh);
+
+ return ret;
}
/**
diff --git a/arch/arm/plat-omap/include/plat/omap_hwmod.h
b/arch/arm/plat-omap/include/plat/omap_hwmod.h
index 7fde44d..878f919 100644
--- a/arch/arm/plat-omap/include/plat/omap_hwmod.h
+++ b/arch/arm/plat-omap/include/plat/omap_hwmod.h
@@ -368,6 +368,10 @@ struct omap_hwmod_omap4_prcm {
* HWMOD_SET_DEFAULT_CLOCKACT: program CLOCKACTIVITY bits at startup
* HWMOD_NO_IDLEST : this module does not have idle status - this is the case
* only for few initiator modules on OMAP2 3.
+ * HWMOD_CONTROL_OPT_CLKS_IN_RESET: Enable all optional clocks during reset.
+ * This is needed for devices like DSS that require optional clocks enabled
+ * in order to complete the reset. Optional clocks will be disabled
+ * again after the reset.
*/
#define HWMOD_SWSUP_SIDLE (1 0)
Re: [PATCH] OMAP: hwmod: softreset fixes with opt clocks
On 9/21/2010 7:05 PM, Paul Walmsley wrote: Hi Benoît, On Tue, 21 Sep 2010, Benoit Cousson wrote: Here are some fixes for the softreset issues that were highlighted on some IPs like GPIO or DSS. For the moment they are still based on your previous series: git://git.pwsan.com/linux-2.6 hwmod_hardreset_dev If you are OK with these, I'll rebase that on top of your latest submission to l-o / linux-arm-kernel. Just took a quick look at them; they both look fine to me. I do have one minor comment on the optional clock patch; I will post it as a reply to that message. That hwmod_hardreset_dev branch is almost identical to the hwmod_2.6.37 branch. Maybe I should just add your patches to the hwmod_2.6.37 branch, along with Rajendra's ENAWAKEUP patch, and post those three to lakml, if you are okay with that? OK, I'm fine with that. I think I should as well re-send the one from Partha: OMAP: hwmod: Handle opt clocks node using clk_add_alias. That one is fine for me, but I didn't see much comment on it. The GPIO series has a dependency on it as well. Thanks, Benoit -- To unsubscribe from this list: send the line unsubscribe linux-omap in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
[PATCH] OMAP: hwmod: Handle opt clocks node using clk_add_alias
From: Basak, Partha p-bas...@ti.com
For every optional clock present per hwmod per omap-device, this function
adds an entry in the clocks list of the form dev-id=dev_name, con-id=role,
if an entry is already present in the list of the form dev-id=NULL,
con-id=role.
The function is called from within the framework inside omap_device_build_ss(),
after omap_device_register.
This allows drivers to get a pointer to its optional clocks based on its role
by calling clk_get(dev*, role).
Link to discussions related to this patch:
http://www.spinics.net/lists/linux-omap/msg34809.html
Signed-off-by: Charulatha V ch...@ti.com
Signed-off-by: Basak, Partha p-bas...@ti.com
Signed-off-by: Benoit Cousson b-cous...@ti.com
Signed-off-by: Rajendra Nayak rna...@ti.com
Cc: Paul Walmsley p...@pwsan.com
Cc: Kevin Hilman khil...@deeprootsystems.com
---
arch/arm/plat-omap/omap_device.c | 39 +-
1 files changed, 38 insertions(+), 1 deletions(-)
diff --git a/arch/arm/plat-omap/omap_device.c b/arch/arm/plat-omap/omap_device.c
index d2b1609..d876cec 100644
--- a/arch/arm/plat-omap/omap_device.c
+++ b/arch/arm/plat-omap/omap_device.c
@@ -82,6 +82,7 @@
#include linux/slab.h
#include linux/err.h
#include linux/io.h
+#include linux/clk.h
#include plat/omap_device.h
#include plat/omap_hwmod.h
@@ -243,6 +244,40 @@ static inline struct omap_device *_find_by_pdev(struct
platform_device *pdev)
return container_of(pdev, struct omap_device, pdev);
}
+/**
+ * _add_optional_clock_alias - Add clock alias for hwmod optional clocks
+ * @od: struct omap_device *od
+ *
+ * For every optional clock present per hwmod per omap_device, this function
+ * adds an entry in the clocks list of the form dev-id=dev_name, con-id=role
+ * if an entry is already present in it with the form dev-id=NULL,
con-id=role
+ *
+ * The function is called from inside omap_device_build_ss(), after
+ * omap_device_register.
+ *
+ * This allows drivers to get a pointer to its optional clocks based on its
role
+ * by calling clk_get(dev*, role).
+ */
+static void _add_optional_clock_alias(struct omap_device *od,
+ struct omap_hwmod *oh)
+{
+ int i;
+ struct omap_hwmod_opt_clk *oc;
+
+ for (i = oh-opt_clks_cnt, oc = oh-opt_clks; i 0; i--, oc++) {
+ int ret;
+
+ if (!oc-_clk || !IS_ERR(clk_get(od-pdev.dev, oc-role)))
+ return;
+
+ ret = clk_add_alias(oc-role, dev_name(od-pdev.dev),
+ (char *)oc-clk, NULL);
+ if (ret)
+ pr_err(omap_device: clk_add_alias for %s failed\n,
+ oc-role);
+ }
+}
+
/* Public functions for use by core code */
@@ -421,8 +456,10 @@ struct omap_device *omap_device_build_ss(const char
*pdev_name, int pdev_id,
else
ret = omap_device_register(od);
- for (i = 0; i oh_cnt; i++)
+ for (i = 0; i oh_cnt; i++) {
hwmods[i]-od = od;
+ _add_optional_clock_alias(od, hwmods[i]);
+ }
if (ret)
goto odbs_exit4;
--
1.6.0.4
--
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Re: [PATCH v6 00/13] OMAP: GPIO: Implement GPIO in hwmod way
Varadarajan, Charulatha ch...@ti.com writes:
Varadarajan, Charulatha ch...@ti.com writes:
This patch series makes OMAP2PLUS specific GPIO implemented in hwmod
FW way. This is done by implementing GPIO module in platform device
model.
This patch series is generated on origin/pm-wip/pm-core which
has Kevin's pm-next series, the runtime PM core patch series,
and a collection of hwmod fixes that Paul/Benoit have lined up
for 2.6.37.
Tested on OMAP2430, OMAP44430, OMAP3430 SDP and zoom3 boards.
Also verified that this patch series does not break the OMAP1 build.
This patch series is created on top of the following patches:
1. OMAP: HWMOD: Handle opt clocks using clk_add_alias
[https://patchwork.kernel.org/patch/124531/]
2. OMAP2+: GPIO: move late PM out of interrupts-disabled idle path
[https://patchwork.kernel.org/patch/176172/]
3. OMAP: CPUIDLE: Enable IRQs during device activity check and idle
management
by Kevin
This series is tested on OMAP4430 ES2 using the below series
http://www.spinics.net/lists/linux-omap/msg36023.html
Hi Charu,
I haven't been fully through the series, but here's some quick feedback
based on what I tried today.
Basically, I got stuck because the first board I tried it on was the
35xx-based OMAP3EVM platform, which uses a GPIO-based interrupt for the
network. My setup uses DHCP + nfsroot, so the GPIO IRQ must be working
during boot.
The first thing I noticed, is that GPIO interrupts are not firing during
boot, so neither the DHCP or the nfsroot works during boot. I haven't
been able to fully debug this, but the 3430SDP should have the same
issue for its smc91x if you set it up for DHCP + nfsroot. This is
working fine on my pm-wip/idle-reorg branch which has the prerequisites
you mentioned, but didn't work when I applied the clk_alias patch plus
this series.
I tested this GPIO series in pm-wip/idle-reorg branch with clock
add alias patch and I did not see any issues. I tested with DHCP + nfsroot
on SDP3430. Please provide me some more info on this.
Hmm, I don't have many more details yet. All I can see is that the GPIO
bank that has the smc91x interrupt (GPIO6) is loosing interrupts, and
thus preventing DHCP and nfsroot from working.
Can you test using omap3_defconfig plus
# CONFIG_CPU_FREQ is not set
CONFIG_CPU_IDLE=y
Thanks,
Kevin
The other change when debugging I made was to make the
'workaround_enable' hack bank specific. Now that the bank idles can be
called independetly, this would get cleared as soon as one of the banks
clears it. It should be a per-bank flag[1]
Agreed. Even I was wondering why this was not bank specific in the
original code. Will do this in the next series after we get the above
issue fixed.
ok
Another thing I noticed was that ENWAKEUP is no longer set in the
SYSCONFIG register for each bank, as it was before. To avoid this kind
of functional change, I did[2]
What about this one? I see Rajendra just posted a fix that should take
care of this in a different manner.
Kevin
I'll get back to digging a bit tomorrow, but hopefully you can debug
this further before I get to it.
Kevin
[1]
diff --git a/arch/arm/plat-omap/gpio.c b/arch/arm/plat-omap/gpio.c
index 2f5c1eb..3b60418 100644
--- a/arch/arm/plat-omap/gpio.c
+++ b/arch/arm/plat-omap/gpio.c
@@ -170,6 +170,7 @@ struct gpio_bank {
struct omap_gpio_regs gpio_context;
struct powerdomain *pwrdm;
bool dbck_flag;
+int workaround_enabled;
};
static void omap_gpio_save_context(struct device *dev);
@@ -1830,8 +1831,6 @@ static int omap_gpio_resume(struct device *dev)
return 0;
}
-static int workaround_enabled;
-
static int gpio_bank_runtime_suspend(struct device *dev)
{
struct platform_device *pdev = to_platform_device(dev);
@@ -1887,7 +1886,7 @@ static int gpio_bank_runtime_suspend(struct device
*dev)
__raw_writel(l2, bank-base + OMAP4_GPIO_RISINGDETECT);
}
-workaround_enabled = 1;
+bank-workaround_enabled = 1;
return 0;
}
@@ -1900,7 +1899,7 @@ static int gpio_bank_runtime_resume(struct device
*dev)
if (bank-dbck_enable_mask)
clk_enable(bank-dbck);
-if ((!workaround_enabled) || (!(bank-enabled_non_wakeup_gpios)))
+if ((!bank-workaround_enabled) || (!(bank-
enabled_non_wakeup_gpios)))
return 0;
if (bank-method == METHOD_GPIO_24XX) {
@@ -2110,11 +2109,11 @@ void omap2_gpio_prepare_for_idle(void)
{
int i;
-workaround_enabled = 0;
-
for (i = 0; i gpio_bank_count; i++) {
struct gpio_bank *bank = gpio_bank[i];
+bank-workaround_enabled = 0;
+
/* If the gpio bank is not used, do nothing */
if ((!bank-pwrdm) || !(bank-mod_usage))
continue;
[2]
diff --git a/arch/arm/mach-omap2/gpio.c b/arch/arm/mach-omap2/gpio.c
index e759311..ae7487f 100644
---
Re: [PATCH] OMAP: hwmod: Enable module wakeup if in smartidle
Hi Rajendra, On Tue, 21 Sep 2010, Rajendra Nayak wrote: If a module's OCP slave port is programmed to be in smartidle, its also necessary that they have module level wakeup enabled. Update _sysc_enable in hwmod framework to do this. Thanks, queued for 2.6.37 with a slightly modified changelog. One brief comment: Signed-off-by: Rajendra Nayak rna...@ti.com Signed-off-by: Partha Basak p-bas...@ti.com Signed-off-by: Benot Cousson b-cous...@ti.com Looks like something in your mail path is mangling 8-bit characters... fixed in the queued version. - Paul From: Rajendra Nayak rna...@ti.com Date: Tue, 21 Sep 2010 19:58:30 +0530 Subject: [PATCH] OMAP: hwmod: Enable module wakeup if in smartidle MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit If a module's OCP slave port is programmed to be in smartidle, its also necessary that they have module level wakeup enabled. Update _sysc_enable in hwmod framework to do this. The thread [PATCH 7/8] : Hwmod api changes archived here: http://www.mail-archive.com/linux-omap@vger.kernel.org/msg34212.html has additional technical information on the rationale of this patch. Signed-off-by: Rajendra Nayak rna...@ti.com Signed-off-by: Partha Basak p-bas...@ti.com Signed-off-by: Benoît Cousson b-cous...@ti.com [p...@pwsan.com: revised patch description] Signed-off-by: Paul Walmsley p...@pwsan.com Cc: Kevin Hilman khil...@deeprootsystems.com --- arch/arm/mach-omap2/omap_hwmod.c |6 -- 1 files changed, 4 insertions(+), 2 deletions(-) diff --git a/arch/arm/mach-omap2/omap_hwmod.c b/arch/arm/mach-omap2/omap_hwmod.c index 8c27923..d3431bf 100644 --- a/arch/arm/mach-omap2/omap_hwmod.c +++ b/arch/arm/mach-omap2/omap_hwmod.c @@ -661,8 +661,6 @@ static void _sysc_enable(struct omap_hwmod *oh) _set_module_autoidle(oh, idlemode, v); } - /* XXX OCP ENAWAKEUP bit? */ - /* * XXX The clock framework should handle this, by * calling into this code. But this must wait until the @@ -673,6 +671,10 @@ static void _sysc_enable(struct omap_hwmod *oh) _set_clockactivity(oh, oh-class-sysc-clockact, v); _write_sysconfig(v, oh); + + /* If slave is in SMARTIDLE, also enable wakeup */ + if ((sf SYSC_HAS_SIDLEMODE) !(oh-flags HWMOD_SWSUP_SIDLE)) + _enable_wakeup(oh); } /** -- 1.7.1
Re: [PATCH 00/11] OMAP: Serial: Add omap-serial driver with platform support
Govindraj govindraj...@gmail.com writes: SNIP Also the patch series updates various low level platform specific serial data to support omap-uarts with hwmod framework and adds support for uart4 on OMAP3630. This series is missing a couple things to work more broadly on all boards, specifically 3630-based boards. First, due to the current UART idle code base, you need to enable all OMAP UARTs 36xx. Enabling less than all OMAP UARTs will break the current idle code. As we discussed, the next phase we will move the idle management from this serial.c hackery into the omap-serial driver iteself. Until then, you need to call omap_serial_init() on Zoom2/Zoom3. Patch below[1] Also, you previously had a patch that updated omap_uart_idle_init() to handle 36xx and specifically UART4. Without that, struct omap_uart_state is not setup correctly for UART4, and thus cannot be properly idled on 3630. ok fine, I will I incorporate initialize all uarts patch for zoom boards. Are you referring to this patch? https://patchwork.kernel.org/patch/108066/ Is this still needed if we have initialized all uarts? This patch might not needed if we have initialized all uarts right? Right. We don't need the above patchwork patch if all UARTs are initialized. The other patch I was referring to was the one that added UART4 support to omap_uart_idle_init() (added the wk_en, wk_st, padconf etc.) I had a pending request for you to drop the muxmode from that patch, but the rest of it was still needed. Also, it's been a while since I tested this on OMAP2. Please re-test on OMAP2 with the whole series. Also, please report here the other platforms this was tested on. The final needs to be tested on OMAP2, 3 and 4 before merge. Yes Sure, Just FYI this patch series was also tested on omap2,3,4. OK, be sure to test Zoom3, because my testing on Zoom3 led to a crash as soon as idle was enabled due to the missing init of all UARTs. This patch series applied on top of pm-core branch commit 4c1f85cdc189d41ee53c1bc3957a908c91cffc00 Merge: ca1684b 96c4e27 Author: Kevin Hilman khil...@deeprootsystems.com Date: Thu Sep 16 15:29:06 2010 -0700 with below changes: 1) if (uart-timeout) uart-timeout = (30 * HZ); 2) #define DEFAULT_TIMEOUT 5 [temporary change for timeout] Doing this masks the problem. If you do 1 without 2, you'll see that UART4 can never go idle. Please test without this change and use the sysfs files to enable the timeouts: echo 5 /sys/devices/platform/omap/omap-hsuart.0/sleep_timeout echo 5 /sys/devices/platform/omap/omap-hsuart.1/sleep_timeout echo 5 /sys/devices/platform/omap/omap-hsuart.2/sleep_timeout echo 5 /sys/devices/platform/omap/omap-hsuart.3/sleep_timeout I see ret count getting incremented on ZOOM3 even without UART4 support to omap_uart_idle_init() patch. I dont see any crash. It has to do more than not crash for this to be acceptable. All UARTs need to have the same capabilities. Currently, UART4 has no padconf, wk_en, or wk_st fields set. This means 1) it's sysfs entry doesn't get a 'sleep_timeout' file so it cannot be made changed and 2) wakeups on UART4 cannot work. As I said before, you had all this stuff in a previous series. I only requested you drop the 'muxmode' stuff from that patch, but everything else (padconf, wk_en, wk_st) was fine. Please add this back to the series. Kevin -- To unsubscribe from this list: send the line unsubscribe linux-omap in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
Re: [PATCH] OMAP: hwmod: Enable module wakeup if in smartidle
Paul Walmsley p...@pwsan.com writes: Hi Rajendra, On Tue, 21 Sep 2010, Rajendra Nayak wrote: If a module's OCP slave port is programmed to be in smartidle, its also necessary that they have module level wakeup enabled. Update _sysc_enable in hwmod framework to do this. Thanks, queued for 2.6.37 with a slightly modified changelog. One brief comment: Signed-off-by: Rajendra Nayak rna...@ti.com Signed-off-by: Partha Basak p-bas...@ti.com Signed-off-by: Benot Cousson b-cous...@ti.com Looks like something in your mail path is mangling 8-bit characters... fixed in the queued version. - Paul From: Rajendra Nayak rna...@ti.com Date: Tue, 21 Sep 2010 19:58:30 +0530 Subject: [PATCH] OMAP: hwmod: Enable module wakeup if in smartidle MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit If a module's OCP slave port is programmed to be in smartidle, its also necessary that they have module level wakeup enabled. Update _sysc_enable in hwmod framework to do this. The thread [PATCH 7/8] : Hwmod api changes archived here: http://www.mail-archive.com/linux-omap@vger.kernel.org/msg34212.html has additional technical information on the rationale of this patch. Signed-off-by: Rajendra Nayak rna...@ti.com Signed-off-by: Partha Basak p-bas...@ti.com Signed-off-by: Benoît Cousson b-cous...@ti.com [p...@pwsan.com: revised patch description] Signed-off-by: Paul Walmsley p...@pwsan.com Cc: Kevin Hilman khil...@deeprootsystems.com FWIW Acked-by: Kevin Hilman khil...@deeprootsystems.com as I'm using this for testing the various hwmod conversions. Kevin -- To unsubscribe from this list: send the line unsubscribe linux-omap in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
Re: [PATCH] OMAP: hwmod: Enable module wakeup if in smartidle
On Tue, 21 Sep 2010, Kevin Hilman wrote: FWIW Acked-by: Kevin Hilman khil...@deeprootsystems.com as I'm using this for testing the various hwmod conversions. Thanks Kevin, added that in. I know you've been testing some of the other patches here too, so please let me know if you would like Tested-by:'s or Acked-by:'s there. - Paul -- To unsubscribe from this list: send the line unsubscribe linux-omap in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
Re: [PATCH] usb: omap: ohci: Missing driver unregister in module exit
On Fri, Sep 17, 2010 at 09:43:16AM +0300, Felipe Balbi wrote: On Thu, Sep 16, 2010 at 06:39:20AM -0500, Munegowda, Keshava wrote: -Original Message- From: Munegowda, Keshava Sent: Tuesday, September 14, 2010 4:40 AM To: linux-...@vger.kernel.org; linux-omap@vger.kernel.org Cc: Gadiyar, Anand; Kamat, Nishant; Munegowda, Keshava Subject: [PATCH] usb: omap: ohci: Missing driver unregister in module exit The un-registration of OHCI driver was not done in the ohci_hcd_mod_exit function. This was affecting rmmod command not to work for OMAP3 platforms. The platform driver un-registration for OMAP3 platforms is perfomed while removing the OHCI module from kernel. Signed-off-by: Keshava Munegowda keshava_mgo...@ti.com --- drivers/usb/host/ohci-hcd.c |3 +++ 1 file changed, 3 insertions(+) Index: linux-2.6/drivers/usb/host/ohci-hcd.c === --- linux-2.6.orig/drivers/usb/host/ohci-hcd.c +++ linux-2.6/drivers/usb/host/ohci-hcd.c @@ -1270,6 +1270,9 @@ static void __exit ohci_hcd_mod_exit(voi #ifdef PLATFORM_DRIVER platform_driver_unregister(PLATFORM_DRIVER); #endif +#ifdef OMAP3_PLATFORM_DRIVER + platform_driver_unregister(OMAP3_PLATFORM_DRIVER); +#endif #ifdef PS3_SYSTEM_BUS_DRIVER ps3_ohci_driver_unregister(PS3_SYSTEM_BUS_DRIVER); #endif Hi Greg, Do you any comments on this patch? my missing S-O-B, maybe. Here it goes: Signed-of-by: Felipe Balbi ba...@ti.com Yup, all good now. thanks, greg k-h -- To unsubscribe from this list: send the line unsubscribe linux-omap in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
Re: [PATCH] OMAP: hwmod: Handle opt clocks node using clk_add_alias
Hi Partha, Benoît,
On Tue, 21 Sep 2010, Benoit Cousson wrote:
From: Basak, Partha p-bas...@ti.com
For every optional clock present per hwmod per omap-device, this function
adds an entry in the clocks list of the form dev-id=dev_name, con-id=role,
if an entry is already present in the list of the form dev-id=NULL,
con-id=role.
The function is called from within the framework inside
omap_device_build_ss(),
after omap_device_register.
This allows drivers to get a pointer to its optional clocks based on its role
by calling clk_get(dev*, role).
Link to discussions related to this patch:
http://www.spinics.net/lists/linux-omap/msg34809.html
I've queued a modified version of this patch for 2.6.37 with a few
changes. The modified version is below. Could you please test
it at your earliest opportunity and also comment as to your opinion on the
changes?
The major changes are:
- Remove the secondary index in the for() and convert to an array index in
the loop body (I once was bit by a difficult-to-find bug with pointer
arithmetic with a secondary index, so am a little gun-shy of such code;
plus I think the array index is easier to read)
- Walk the omap_hwmod_opt_clks in order, rather than in reverse
- Remove the clk_get() test, since clk_add_alias() does it for us if the
'dev' parameter is supplied
- Supply a 'dev' parameter for clk_add_alias() (see the above)
- Continue iterating the loop even if one of the opt clks was not
resolved during init, rather than bailing out immediately
- Paul
From: Basak, Partha p-bas...@ti.com
Date: Tue, 21 Sep 2010 19:23:04 +0200
Subject: [PATCH] OMAP: hwmod: Handle opt clocks node using clk_add_alias
For every optional clock present per hwmod per omap-device, this function
adds an entry in the clocks list of the form dev-id=dev_name, con-id=role,
if an entry is already present in the list of the form dev-id=NULL,
con-id=role.
The function is called from within the framework inside omap_device_build_ss(),
after omap_device_register.
This allows drivers to get a pointer to its optional clocks based on its role
by calling clk_get(dev*, role).
Link to discussions related to this patch:
http://www.spinics.net/lists/linux-omap/msg34809.html
Signed-off-by: Charulatha V ch...@ti.com
Signed-off-by: Basak, Partha p-bas...@ti.com
Signed-off-by: Benoit Cousson b-cous...@ti.com
Signed-off-by: Rajendra Nayak rna...@ti.com
[p...@pwsan.com: simplified loop iterator; removed the superfluous clk_get(),
using the clk_get() in clk_add_alias() instead]
Signed-off-by: Paul Walmsley p...@pwsan.com
Acked-by: Kevin Hilman khil...@deeprootsystems.com
---
arch/arm/plat-omap/omap_device.c | 43 +-
1 files changed, 42 insertions(+), 1 deletions(-)
diff --git a/arch/arm/plat-omap/omap_device.c b/arch/arm/plat-omap/omap_device.c
index d2b1609..ceba58a 100644
--- a/arch/arm/plat-omap/omap_device.c
+++ b/arch/arm/plat-omap/omap_device.c
@@ -82,6 +82,7 @@
#include linux/slab.h
#include linux/err.h
#include linux/io.h
+#include linux/clk.h
#include plat/omap_device.h
#include plat/omap_hwmod.h
@@ -243,6 +244,44 @@ static inline struct omap_device *_find_by_pdev(struct
platform_device *pdev)
return container_of(pdev, struct omap_device, pdev);
}
+/**
+ * _add_optional_clock_alias - Add clock alias for hwmod optional clocks
+ * @od: struct omap_device *od
+ *
+ * For every optional clock present per hwmod per omap_device, this function
+ * adds an entry in the clocks list of the form dev-id=dev_name, con-id=role
+ * if an entry is already present in it with the form dev-id=NULL,
con-id=role
+ *
+ * The function is called from inside omap_device_build_ss(), after
+ * omap_device_register.
+ *
+ * This allows drivers to get a pointer to its optional clocks based on its
role
+ * by calling clk_get(dev*, role).
+ *
+ * No return value.
+ */
+static void _add_optional_clock_alias(struct omap_device *od,
+ struct omap_hwmod *oh)
+{
+ int i;
+
+ for (i = 0; i oh-opt_clks_cnt; i++) {
+ struct omap_hwmod_opt_clk *oc;
+ int r;
+
+ oc = oh-opt_clks[i];
+
+ if (!oc-_clk)
+ continue;
+
+ r = clk_add_alias(oc-role, dev_name(od-pdev.dev),
+ (char *)oc-clk, od-pdev.dev);
+ if (r)
+ pr_err(omap_device: %s: clk_add_alias for %s failed\n,
+ dev_name(od-pdev.dev), oc-role);
+ }
+}
+
/* Public functions for use by core code */
@@ -421,8 +460,10 @@ struct omap_device *omap_device_build_ss(const char
*pdev_name, int pdev_id,
else
ret = omap_device_register(od);
- for (i = 0; i oh_cnt; i++)
+ for (i = 0; i oh_cnt; i++) {
hwmods[i]-od = od;
+ _add_optional_clock_alias(od, hwmods[i]);
+ }
if (ret)
[PATCH] OMAP4: clock: Fix missing optional clocks
Hi Paul, The previous OMAP4 clock data did not contain the nodes to allow the modules to enable the proper bit in the CLKCTRL register. This patch is based on kevin/pm-wip/hwmods-omap4 rebased on top of your hwmod_hardreset_dev branch + my reset-fixes series + Partha's patch... ...and that's all. This is also available here: git://gitorious.org/omap-pm/linux.git pm-wip/hwmods-clocks The pm-wip/hwmods-omap4-full will be then rebased on this branch. Please note that the diff is pretty bad for the clock table. It looks like everything has changed. I don't know if there is a way to have a better diff with git. Thanks, Benoit Benoit Cousson (1): OMAP4: clock: Add optional clock nodes arch/arm/mach-omap2/clock44xx_data.c | 893 -- 1 files changed, 625 insertions(+), 268 deletions(-) -- To unsubscribe from this list: send the line unsubscribe linux-omap in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
Re: [PATCH] OMAP: hwmod: Enable module wakeup if in smartidle
On Tue, 21 Sep 2010, Kevin Hilman wrote: Paul Walmsley p...@pwsan.com writes: On Tue, 21 Sep 2010, Kevin Hilman wrote: FWIW Acked-by: Kevin Hilman khil...@deeprootsystems.com as I'm using this for testing the various hwmod conversions. Thanks Kevin, added that in. I know you've been testing some of the other patches here too, so please let me know if you would like Tested-by:'s or Acked-by:'s there. I guess you can put a Tested-by for me on everything in your hwmod_2.6.37 branch as I've been staging and testing those for a bit now. OK, sounds good. How about the updated hardreset code - have you given that a try? Also, one other thing I noticed in that branch: the locking patch from me: OMAP: hwmod: separate list locking and hwmod hardware locking has a stray '[PATCH]' in the shortlog which should probably be removed as well. Thanks, fixed. - Paul -- To unsubscribe from this list: send the line unsubscribe linux-omap in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
[PATCH 1/4] omap4: pandaboard: remove unused hsmmc definition
remove the second hsmmc definition as it is only used on the
expansion header of the PandaBoard and can be mux for other
functions.
Signed-off-by: David Anders x0132...@ti.com
Signed-off-by: Anand Gadiyar gadi...@ti.com
---
arch/arm/mach-omap2/board-omap4panda.c |6 +-
1 files changed, 1 insertions(+), 5 deletions(-)
diff --git a/arch/arm/mach-omap2/board-omap4panda.c
b/arch/arm/mach-omap2/board-omap4panda.c
index 96f5bbb..093d13b 100644
--- a/arch/arm/mach-omap2/board-omap4panda.c
+++ b/arch/arm/mach-omap2/board-omap4panda.c
@@ -67,10 +67,6 @@ static struct regulator_consumer_supply
omap4_panda_vmmc_supply[] = {
.supply = vmmc,
.dev_name = mmci-omap-hs.0,
},
- {
- .supply = vmmc,
- .dev_name = mmci-omap-hs.1,
- },
};
static int omap4_twl6030_hsmmc_late_init(struct device *dev)
@@ -156,7 +152,7 @@ static struct regulator_init_data omap4_panda_vmmc = {
| REGULATOR_CHANGE_MODE
| REGULATOR_CHANGE_STATUS,
},
- .num_consumer_supplies = 2,
+ .num_consumer_supplies = 1,
.consumer_supplies = omap4_panda_vmmc_supply,
};
--
1.7.0.4
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[PATCH 2/4] omap4: pandaboard: Fix the init if CONFIG_MMC_OMAP_HS is not set
Avoid possible crash if CONFIG_MMC_OMAP_HS is not set.
Signed-off-by: David Anders x0132...@ti.com
Signed-off-by: Anand Gadiyar gadi...@ti.com
---
arch/arm/mach-omap2/board-omap4panda.c |9 -
1 files changed, 8 insertions(+), 1 deletions(-)
diff --git a/arch/arm/mach-omap2/board-omap4panda.c
b/arch/arm/mach-omap2/board-omap4panda.c
index 093d13b..697c0bd 100644
--- a/arch/arm/mach-omap2/board-omap4panda.c
+++ b/arch/arm/mach-omap2/board-omap4panda.c
@@ -85,7 +85,14 @@ static int omap4_twl6030_hsmmc_late_init(struct device *dev)
static __init void omap4_twl6030_hsmmc_set_late_init(struct device *dev)
{
- struct omap_mmc_platform_data *pdata = dev-platform_data;
+ struct omap_mmc_platform_data *pdata;
+
+ /* dev can be null if CONFIG_MMC_OMAP_HS is not set */
+ if (!dev) {
+ pr_err(Failed omap4_twl6030_hsmmc_set_late_init\n);
+ return;
+ }
+ pdata = dev-platform_data;
pdata-init = omap4_twl6030_hsmmc_late_init;
}
--
1.7.0.4
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[PATCH 3/4] omap4: pandaboard: Adding card detect support for MMC1
Adding card detect callback function and card detect configuration
function for MMC1 Controller.
Signed-off-by: David Anders x0132...@ti.com
Signed-off-by: Anand Gadiyar gadi...@ti.com
---
patch depends on https://patchwork.kernel.org/patch/189952/
arch/arm/mach-omap2/board-omap4panda.c |7 ++-
1 files changed, 6 insertions(+), 1 deletions(-)
diff --git a/arch/arm/mach-omap2/board-omap4panda.c
b/arch/arm/mach-omap2/board-omap4panda.c
index 697c0bd..94e819c 100644
--- a/arch/arm/mach-omap2/board-omap4panda.c
+++ b/arch/arm/mach-omap2/board-omap4panda.c
@@ -77,9 +77,14 @@ static int omap4_twl6030_hsmmc_late_init(struct device *dev)
struct omap_mmc_platform_data *pdata = dev-platform_data;
/* Setting MMC1 Card detect Irq */
- if (pdev-id == 0)
+ if (pdev-id == 0) {
+ ret = twl6030_mmc_card_detect_config();
+ if (ret)
+ pr_err(Failed configuring MMC1 card detect\n);
pdata-slots[0].card_detect_irq = TWL6030_IRQ_BASE +
MMCDETECT_INTR_OFFSET;
+ pdata-slots[0].card_detect = twl6030_mmc_card_detect;
+ }
return ret;
}
--
1.7.0.4
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[PATCH 4/4] omap4: pandaboard: enable the ehci port on pandaboard
The OMAP4 PandaBoard has EHCI port1 hooked up to an external
SMSC3320 transciever. GPIO 1 is used to power on the transceiver
and GPIO 62 for reset on the transceiver.
Signed-off-by: David Anders x0132...@ti.com
Signed-off-by: Anand Gadiyar gadi...@ti.com
---
arch/arm/mach-omap2/board-omap4panda.c | 54
1 files changed, 54 insertions(+), 0 deletions(-)
diff --git a/arch/arm/mach-omap2/board-omap4panda.c
b/arch/arm/mach-omap2/board-omap4panda.c
index 94e819c..6163a59 100644
--- a/arch/arm/mach-omap2/board-omap4panda.c
+++ b/arch/arm/mach-omap2/board-omap4panda.c
@@ -39,6 +39,8 @@
#include plat/mmc.h
#include hsmmc.h
+#define GPIO_HUB_POWER 1
+#define GPIO_HUB_NRESET62
static void __init omap4_panda_init_irq(void)
{
@@ -280,6 +282,57 @@ static int __init omap4_panda_i2c_init(void)
omap_register_i2c_bus(4, 400, NULL, 0);
return 0;
}
+
+static const struct ehci_hcd_omap_platform_data ehci_pdata __initconst = {
+ .port_mode[0] = EHCI_HCD_OMAP_MODE_PHY,
+ .port_mode[1] = EHCI_HCD_OMAP_MODE_UNKNOWN,
+ .port_mode[2] = EHCI_HCD_OMAP_MODE_UNKNOWN,
+ .phy_reset = false,
+ .reset_gpio_port[0] = -EINVAL,
+ .reset_gpio_port[1] = -EINVAL,
+ .reset_gpio_port[2] = -EINVAL
+};
+
+static void __init omap4_ehci_init(void)
+{
+ int ret;
+
+
+ /* disable the power to the usb hub prior to init */
+ ret = gpio_request(GPIO_HUB_POWER, hub_power);
+ if (ret) {
+ pr_err(Cannot request GPIO %d\n, GPIO_HUB_POWER);
+ goto error1;
+ }
+ gpio_export(GPIO_HUB_POWER, 0);
+ gpio_direction_output(GPIO_HUB_POWER, 0);
+ gpio_set_value(GPIO_HUB_POWER, 0);
+
+ /* reset phy+hub */
+ ret = gpio_request(GPIO_HUB_NRESET, hub_nreset);
+ if (ret) {
+ pr_err(Cannot request GPIO %d\n, GPIO_HUB_NRESET);
+ goto error2;
+ }
+ gpio_export(GPIO_HUB_NRESET, 0);
+ gpio_direction_output(GPIO_HUB_NRESET, 0);
+ gpio_set_value(GPIO_HUB_NRESET, 0);
+ gpio_set_value(GPIO_HUB_NRESET, 1);
+
+ usb_ehci_init(ehci_pdata);
+
+ /* enable power to hub */
+ gpio_set_value(GPIO_HUB_POWER, 1);
+ return;
+
+error2:
+ gpio_free(GPIO_HUB_POWER);
+error1:
+ pr_err(Unable to initialize EHCI power/reset\n);
+ return;
+
+}
+
static void __init omap4_panda_init(void)
{
omap4_panda_i2c_init();
@@ -287,6 +340,7 @@ static void __init omap4_panda_init(void)
omap4_twl6030_hsmmc_init(mmc);
/* OMAP4 Panda uses internal transceiver so register nop transceiver */
usb_nop_xceiv_register();
+ omap4_ehci_init();
/* FIXME: allow multi-omap to boot until musb is updated for omap4 */
if (!cpu_is_omap44xx())
usb_musb_init(musb_board_data);
--
1.7.0.4
--
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[PATCH 0/4] omap4: pandaboard: machine cleanups
PandaBoard machine file related cleanups. David Anders (4): omap4: pandaboard: remove unused hsmmc definition omap4: pandaboard: Fix the init if CONFIG_MMC_OMAP_HS is not set omap4: pandaboard: Adding card detect support for MMC1 omap4: pandaboard: enable the ehci port on pandaboard arch/arm/mach-omap2/board-omap4panda.c | 76 +--- 1 files changed, 69 insertions(+), 7 deletions(-) -- To unsubscribe from this list: send the line unsubscribe linux-omap in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
Re: [PATCH v7 4/6] OMAP4: hwmod data: Add watchdog timer
Hi Charu,
On 9/21/2010 3:37 PM, Varadarajan, Charulatha wrote:
From: Benoit Coussonb-cous...@ti.com
Add watchdog timer hwmod data for OMAP4 chip
Signed-off-by: Benoit Coussonb-cous...@ti.com
Signed-off-by: Charulatha Vch...@ti.com
---
arch/arm/mach-omap2/omap_hwmod_44xx_data.c | 135
1 files changed, 135 insertions(+), 0 deletions(-)
diff --git a/arch/arm/mach-omap2/omap_hwmod_44xx_data.c
b/arch/arm/mach-omap2/omap_hwmod_44xx_data.c
index e20b0ee..8660fea 100644
--- a/arch/arm/mach-omap2/omap_hwmod_44xx_data.c
+++ b/arch/arm/mach-omap2/omap_hwmod_44xx_data.c
@@ -452,6 +452,136 @@ static struct omap_hwmod omap44xx_mpu_hwmod = {
.omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430),
};
+/*
+ * 'wd_timer' class
+ * 32-bit watchdog upward counter that generates a pulse on the reset pin on
+ * overflow condition
+ */
+
+static struct omap_hwmod_class_sysconfig omap44xx_wd_timer_sysc = {
+ .rev_offs = 0x,
+ .sysc_offs = 0x0010,
+ .syss_offs = 0x0014,
+ .sysc_flags = (SYSC_HAS_SIDLEMODE | SYSC_HAS_EMUFREE |
+ SYSC_HAS_SOFTRESET),
+ .idlemodes = (SIDLE_FORCE | SIDLE_NO | SIDLE_SMART),
+ .sysc_fields=omap_hwmod_sysc_type1,
+};
+
+static struct omap_hwmod_class omap44xx_wd_timer_hwmod_class = {
+ .name = wd_timer,
+ .sysc =omap44xx_wd_timer_sysc,
+};
+
+/* wd_timer2 */
+static struct omap_hwmod omap44xx_wd_timer2_hwmod;
+static struct omap_hwmod_irq_info omap44xx_wd_timer2_irqs[] = {
+ { .irq = 80 + OMAP44XX_IRQ_GIC_START },
+};
+
+static struct omap_hwmod_addr_space omap44xx_wd_timer2_addrs[] = {
+ {
+ .pa_start = 0x4a314000,
+ .pa_end = 0x4a31407f,
+ .flags = ADDR_TYPE_RT
+ },
+};
+
+/* l4_wkup - wd_timer2 */
+static struct omap_hwmod_ocp_if omap44xx_l4_wkup__wd_timer2 = {
+ .master =omap44xx_l4_wkup_hwmod,
+ .slave =omap44xx_wd_timer2_hwmod,
+ .clk= l4_wkup_clk_mux_ck,
+ .addr = omap44xx_wd_timer2_addrs,
+ .addr_cnt = ARRAY_SIZE(omap44xx_wd_timer2_addrs),
+ .user = OCP_USER_MPU | OCP_USER_SDMA,
+};
+
+/* wd_timer2 slave ports */
+static struct omap_hwmod_ocp_if *omap44xx_wd_timer2_slaves[] = {
+ omap44xx_l4_wkup__wd_timer2,
+};
+
+static struct omap_hwmod omap44xx_wd_timer2_hwmod = {
+ .name = wd_timer2,
+ .class =omap44xx_wd_timer_hwmod_class,
+ .mpu_irqs = omap44xx_wd_timer2_irqs,
+ .mpu_irqs_cnt = ARRAY_SIZE(omap44xx_wd_timer2_irqs),
+ .main_clk = wd_timer2_fck,
+ .prcm = {
+ .omap4 = {
+ .clkctrl_reg = OMAP4430_CM_WKUP_WDT2_CLKCTRL,
+ },
+ },
+ .slaves = omap44xx_wd_timer2_slaves,
+ .slaves_cnt = ARRAY_SIZE(omap44xx_wd_timer2_slaves),
+ .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430),
+};
+
+/* wd_timer3 */
+static struct omap_hwmod omap44xx_wd_timer3_hwmod;
+static struct omap_hwmod_irq_info omap44xx_wd_timer3_irqs[] = {
+ { .irq = 36 + OMAP44XX_IRQ_GIC_START },
+};
+
+static struct omap_hwmod_addr_space omap44xx_wd_timer3_addrs[] = {
+ {
+ .pa_start = 0x4013,
+ .pa_end = 0x4013007f,
+ .flags = ADDR_TYPE_RT
+ },
+};
+
+/* l4_abe - wd_timer3 */
+static struct omap_hwmod_ocp_if omap44xx_l4_abe__wd_timer3 = {
+ .master =omap44xx_l4_abe_hwmod,
+ .slave =omap44xx_wd_timer3_hwmod,
+ .clk= ocp_abe_iclk,
+ .addr = omap44xx_wd_timer3_addrs,
+ .addr_cnt = ARRAY_SIZE(omap44xx_wd_timer3_addrs),
+ .user = OCP_USER_MPU,
+};
+
+/* l4_abe - wd_timer3 (dma) */
+static struct omap_hwmod_addr_space omap44xx_wd_timer3_dma_addrs[] = {
+ {
+ .pa_start = 0x4903,
+ .pa_end = 0x4903007f,
+ .flags = ADDR_TYPE_RT
+ },
+};
+
+static struct omap_hwmod_ocp_if omap44xx_l4_abe__wd_timer3_dma = {
+ .master =omap44xx_l4_abe_hwmod,
+ .slave =omap44xx_wd_timer3_hwmod,
+ .clk= ocp_abe_iclk,
+ .addr = omap44xx_wd_timer3_dma_addrs,
+ .addr_cnt = ARRAY_SIZE(omap44xx_wd_timer3_dma_addrs),
+ .user = OCP_USER_SDMA,
+};
+
+/* wd_timer3 slave ports */
+static struct omap_hwmod_ocp_if *omap44xx_wd_timer3_slaves[] = {
+ omap44xx_l4_abe__wd_timer3,
+ omap44xx_l4_abe__wd_timer3_dma,
+};
+
+static struct omap_hwmod omap44xx_wd_timer3_hwmod = {
+ .name = wd_timer3,
+ .class =omap44xx_wd_timer_hwmod_class,
+ .mpu_irqs = omap44xx_wd_timer3_irqs,
+ .mpu_irqs_cnt = ARRAY_SIZE(omap44xx_wd_timer3_irqs),
+ .main_clk = wd_timer3_fck,
+ .prcm = {
+
Re: [PATCH] OMAP: hwmod: Enable module wakeup if in smartidle
Paul Walmsley p...@pwsan.com writes: On Tue, 21 Sep 2010, Kevin Hilman wrote: Paul Walmsley p...@pwsan.com writes: On Tue, 21 Sep 2010, Kevin Hilman wrote: FWIW Acked-by: Kevin Hilman khil...@deeprootsystems.com as I'm using this for testing the various hwmod conversions. Thanks Kevin, added that in. I know you've been testing some of the other patches here too, so please let me know if you would like Tested-by:'s or Acked-by:'s there. I guess you can put a Tested-by for me on everything in your hwmod_2.6.37 branch as I've been staging and testing those for a bit now. OK, sounds good. How about the updated hardreset code - have you given that a try? I just rebased onto your hwmod_2.6.37 branch, so testing it today. Kevin -- To unsubscribe from this list: send the line unsubscribe linux-omap in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
Re: [PATCH v6 07/13] OMAP3: hwmod data: Add GPIO
Varadarajan, Charulatha ch...@ti.com writes:
Add GPIO hwmod data for OMAP3 chip
Signed-off-by: Charulatha V ch...@ti.com
Signed-off-by: Rajendra Nayak rna...@ti.com
---
arch/arm/mach-omap2/omap_hwmod_3xxx_data.c | 364
1 files changed, 364 insertions(+), 0 deletions(-)
diff --git a/arch/arm/mach-omap2/omap_hwmod_3xxx_data.c
b/arch/arm/mach-omap2/omap_hwmod_3xxx_data.c
index 5d8eb58..43ed2ab 100644
--- a/arch/arm/mach-omap2/omap_hwmod_3xxx_data.c
+++ b/arch/arm/mach-omap2/omap_hwmod_3xxx_data.c
@@ -17,6 +17,7 @@
#include mach/irqs.h
#include plat/cpu.h
#include plat/dma.h
+#include plat/gpio.h
#include omap_hwmod_common_data.h
@@ -36,6 +37,12 @@ static struct omap_hwmod omap3xxx_iva_hwmod;
static struct omap_hwmod omap3xxx_l3_main_hwmod;
static struct omap_hwmod omap3xxx_l4_core_hwmod;
static struct omap_hwmod omap3xxx_l4_per_hwmod;
+static struct omap_hwmod omap3xxx_gpio1_hwmod;
+static struct omap_hwmod omap3xxx_gpio2_hwmod;
+static struct omap_hwmod omap3xxx_gpio3_hwmod;
+static struct omap_hwmod omap3xxx_gpio4_hwmod;
+static struct omap_hwmod omap3xxx_gpio5_hwmod;
+static struct omap_hwmod omap3xxx_gpio6_hwmod;
/* L3 - L4_CORE interface */
static struct omap_hwmod_ocp_if omap3xxx_l3_main__l4_core = {
@@ -197,6 +204,357 @@ static struct omap_hwmod omap3xxx_iva_hwmod = {
.omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP3430)
};
+/* l4_wkup - gpio1 */
+static struct omap_hwmod_addr_space omap3xxx_gpio1_addrs[] = {
+ {
+ .pa_start = 0x4831,
+ .pa_end = 0x483101ff,
+ .flags = ADDR_TYPE_RT
+ },
+};
+
+static struct omap_hwmod_ocp_if omap3xxx_l4_wkup__gpio1 = {
+ .master = omap3xxx_l4_wkup_hwmod,
+ .slave = omap3xxx_gpio1_hwmod,
+ .clk= gpio1_ick,
+ .addr = omap3xxx_gpio1_addrs,
+ .addr_cnt = ARRAY_SIZE(omap3xxx_gpio1_addrs),
+ .user = OCP_USER_MPU | OCP_USER_SDMA,
+};
+
+/* l4_per - gpio2 */
+static struct omap_hwmod_addr_space omap3xxx_gpio2_addrs[] = {
+ {
+ .pa_start = 0x4905,
+ .pa_end = 0x490501ff,
+ .flags = ADDR_TYPE_RT
+ },
+};
+
+static struct omap_hwmod_ocp_if omap3xxx_l4_per__gpio2 = {
+ .master = omap3xxx_l4_per_hwmod,
+ .slave = omap3xxx_gpio2_hwmod,
+ .clk= gpio2_ick,
+ .addr = omap3xxx_gpio2_addrs,
+ .addr_cnt = ARRAY_SIZE(omap3xxx_gpio2_addrs),
+ .user = OCP_USER_MPU | OCP_USER_SDMA,
+};
+
+/* l4_per - gpio3 */
+static struct omap_hwmod_addr_space omap3xxx_gpio3_addrs[] = {
+ {
+ .pa_start = 0x49052000,
+ .pa_end = 0x490521ff,
+ .flags = ADDR_TYPE_RT
+ },
+};
+
+static struct omap_hwmod_ocp_if omap3xxx_l4_per__gpio3 = {
+ .master = omap3xxx_l4_per_hwmod,
+ .slave = omap3xxx_gpio3_hwmod,
+ .clk= gpio3_ick,
+ .addr = omap3xxx_gpio3_addrs,
+ .addr_cnt = ARRAY_SIZE(omap3xxx_gpio3_addrs),
+ .user = OCP_USER_MPU | OCP_USER_SDMA,
+};
+
+/* l4_per - gpio4 */
+static struct omap_hwmod_addr_space omap3xxx_gpio4_addrs[] = {
+ {
+ .pa_start = 0x49054000,
+ .pa_end = 0x490541ff,
+ .flags = ADDR_TYPE_RT
+ },
+};
+
+static struct omap_hwmod_ocp_if omap3xxx_l4_per__gpio4 = {
+ .master = omap3xxx_l4_per_hwmod,
+ .slave = omap3xxx_gpio4_hwmod,
+ .clk= gpio4_ick,
+ .addr = omap3xxx_gpio4_addrs,
+ .addr_cnt = ARRAY_SIZE(omap3xxx_gpio4_addrs),
+ .user = OCP_USER_MPU | OCP_USER_SDMA,
+};
+
+/* l4_per - gpio5 */
+static struct omap_hwmod_addr_space omap3xxx_gpio5_addrs[] = {
+ {
+ .pa_start = 0x49056000,
+ .pa_end = 0x490561ff,
+ .flags = ADDR_TYPE_RT
+ },
+};
+
+static struct omap_hwmod_ocp_if omap3xxx_l4_per__gpio5 = {
+ .master = omap3xxx_l4_per_hwmod,
+ .slave = omap3xxx_gpio5_hwmod,
+ .clk= gpio5_ick,
+ .addr = omap3xxx_gpio5_addrs,
+ .addr_cnt = ARRAY_SIZE(omap3xxx_gpio5_addrs),
+ .user = OCP_USER_MPU | OCP_USER_SDMA,
+};
+
+/* l4_per - gpio6 */
+static struct omap_hwmod_addr_space omap3xxx_gpio6_addrs[] = {
+ {
+ .pa_start = 0x49058000,
+ .pa_end = 0x490581ff,
+ .flags = ADDR_TYPE_RT
+ },
+};
+
+static struct omap_hwmod_ocp_if omap3xxx_l4_per__gpio6 = {
+ .master = omap3xxx_l4_per_hwmod,
+ .slave = omap3xxx_gpio6_hwmod,
+ .clk= gpio6_ick,
+ .addr = omap3xxx_gpio6_addrs,
Re: [PATCH v6 00/13] OMAP: GPIO: Implement GPIO in hwmod way
Kevin Hilman khil...@deeprootsystems.com writes: Varadarajan, Charulatha ch...@ti.com writes: Varadarajan, Charulatha ch...@ti.com writes: This patch series makes OMAP2PLUS specific GPIO implemented in hwmod FW way. This is done by implementing GPIO module in platform device model. This patch series is generated on origin/pm-wip/pm-core which has Kevin's pm-next series, the runtime PM core patch series, and a collection of hwmod fixes that Paul/Benoit have lined up for 2.6.37. Tested on OMAP2430, OMAP44430, OMAP3430 SDP and zoom3 boards. Also verified that this patch series does not break the OMAP1 build. This patch series is created on top of the following patches: 1. OMAP: HWMOD: Handle opt clocks using clk_add_alias [https://patchwork.kernel.org/patch/124531/] 2. OMAP2+: GPIO: move late PM out of interrupts-disabled idle path [https://patchwork.kernel.org/patch/176172/] 3. OMAP: CPUIDLE: Enable IRQs during device activity check and idle management by Kevin This series is tested on OMAP4430 ES2 using the below series http://www.spinics.net/lists/linux-omap/msg36023.html Hi Charu, I haven't been fully through the series, but here's some quick feedback based on what I tried today. Basically, I got stuck because the first board I tried it on was the 35xx-based OMAP3EVM platform, which uses a GPIO-based interrupt for the network. My setup uses DHCP + nfsroot, so the GPIO IRQ must be working during boot. The first thing I noticed, is that GPIO interrupts are not firing during boot, so neither the DHCP or the nfsroot works during boot. I haven't been able to fully debug this, but the 3430SDP should have the same issue for its smc91x if you set it up for DHCP + nfsroot. This is working fine on my pm-wip/idle-reorg branch which has the prerequisites you mentioned, but didn't work when I applied the clk_alias patch plus this series. I tested this GPIO series in pm-wip/idle-reorg branch with clock add alias patch and I did not see any issues. I tested with DHCP + nfsroot on SDP3430. Please provide me some more info on this. Hmm, I don't have many more details yet. All I can see is that the GPIO bank that has the smc91x interrupt (GPIO6) is loosing interrupts, and thus preventing DHCP and nfsroot from working. Can you test using omap3_defconfig plus # CONFIG_CPU_FREQ is not set CONFIG_CPU_IDLE=y Some more details. I tried on two different 35xx platforms and it works on one (es3.1) and not on the other (es2.1): [0.00] Machine: Gumstix Overo [0.00] OMAP3430/3530 ES3.1 (l2cache iva sgx neon isp ) but not on omap3evm: [0.00] Machine: OMAP3 EVM [0.00] OMAP3430/3530 ES2.1 (l2cache iva sgx neon isp ) Is there any chance you could get your hands on an es2.1 EVM and try there? Please contact Sanjeev Premi in TII and I think he should be able to find one for you to use temporarily. Thanks, Kevin -- To unsubscribe from this list: send the line unsubscribe linux-omap in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
