Re: [PATCH] ARM: Fix relocation if image end past uncompressed kernel end
* Nicolas Pitre nicolas.pi...@linaro.org [110421 16:18]: On Thu, 21 Apr 2011, Tony Lindgren wrote: Otherwise we end up overwriting ourselves. This fixes booting on n900 after commit 6d7d0ae51574943bf571d269da3243257a2d15db (ARM: 6750/1: improvements to compressed/head.S). Signed-off-by: Tony Lindgren t...@atomide.com I don't understand why this is needed. The copy loop is explicitly copying from the end going backward exactly to cope with this possibility. Hmmm... Yeah that's what I'm wondering too.. This is probably not the right fix.. I'm also wondering that it should be possible to make uImage also not work by setting loadaddr just before the uncompressed kernel end. You would assume that only the running code would not survive relocation if some of it gets overwritten. But that should be only the beginning, no idea why the need to relocate all the way after the whole image? If stack was overlapping the zImage, I could see it corrupt the zImage but there not much happening between relocating and restarting of the bootloader. Tony -- To unsubscribe from this list: send the line unsubscribe linux-omap in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
Re: [v2 0/7] OMAP: GPIO: Use PM runtime framework
* Kevin Hilman khil...@ti.com [110421 18:12]: Tony Lindgren t...@atomide.com writes: Saw that, looks good :) Need to post it also to lakml BTW. Yeah, I only posted to l-o so far because it's not done. I only removed a few of the #ifdef sections, there are still several more to do. Oh I see. Anyways looks good to me. I can give it a try next week too on few boards. Regards, Tony -- To unsubscribe from this list: send the line unsubscribe linux-omap in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
Re: [PATCH] ARM: Fix relocation if image end past uncompressed kernel end
* Nicolas Pitre nicolas.pi...@linaro.org [110421 20:20]: On Thu, 21 Apr 2011, Nicolas Pitre wrote: On Thu, 21 Apr 2011, Nicolas Pitre wrote: On Thu, 21 Apr 2011, Tony Lindgren wrote: Otherwise we end up overwriting ourselves. This fixes booting on n900 after commit 6d7d0ae51574943bf571d269da3243257a2d15db (ARM: 6750/1: improvements to compressed/head.S). Signed-off-by: Tony Lindgren t...@atomide.com I don't understand why this is needed. The copy loop is explicitly copying from the end going backward exactly to cope with this possibility. I think your patch is 1) unneeded (see the copy loop code and the comment before it), and 2) simply hiding the real bug. Yes so it seems, but it also seems that there is still something else wrong.. I just need to modify the code in compressed/misc.c slightly for the lzma decompressor to start or stop working randomly. It seems that this code might be sensitive to slight displacement in memory caused by modifications to totally unrelated code. I'm still trying to track this down. I found the bugger. The problem was a bad stack alignment. .. as this patch won't solve the n900 booting problem with zImage. With LZMA I'm still also getting LZMA data is corrupt. Regards, Tony -- To unsubscribe from this list: send the line unsubscribe linux-omap in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
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[RFC PATCH 14/18] OMAP: GPIO: Remove CONFIG_ARCH_OMAP16XX/OMAP2+ defines
Suspend/resume/wakeup capabilities are supported only in
OMAP16xx and OMAP2PLUS SoCs. Handle this by using a flag
suspend_resume_support in pdata.
This requires calling omap_gpio_sysinit() as part of probe
instead of having this function as an arch_initcall
Signed-off-by: Charulatha V ch...@ti.com
---
arch/arm/mach-omap1/gpio16xx.c |5 ++
arch/arm/mach-omap2/gpio.c |1 +
arch/arm/plat-omap/gpio.c | 96 ++--
arch/arm/plat-omap/include/plat/gpio.h |1 +
4 files changed, 48 insertions(+), 55 deletions(-)
diff --git a/arch/arm/mach-omap1/gpio16xx.c b/arch/arm/mach-omap1/gpio16xx.c
index 6a99b01..cbac063 100644
--- a/arch/arm/mach-omap1/gpio16xx.c
+++ b/arch/arm/mach-omap1/gpio16xx.c
@@ -76,6 +76,7 @@ static struct __initdata omap_gpio_platform_data
omap16xx_mpu_gpio_config = {
.bank_type = METHOD_MPUIO,
.bank_width = OMAP1610_GPIO_WIDTH,
.bank_stride= 1,
+ .suspend_resume_support = true,
};
static struct __initdata platform_device omap16xx_mpu_gpio = {
@@ -105,6 +106,7 @@ static struct __initdata omap_gpio_platform_data
omap16xx_gpio1_config = {
.virtual_irq_start = IH_GPIO_BASE,
.bank_type = METHOD_GPIO_1610,
.bank_width = OMAP1610_GPIO_WIDTH,
+ .suspend_resume_support = true,
};
static struct __initdata platform_device omap16xx_gpio1 = {
@@ -134,6 +136,7 @@ static struct __initdata omap_gpio_platform_data
omap16xx_gpio2_config = {
.virtual_irq_start = IH_GPIO_BASE + 16,
.bank_type = METHOD_GPIO_1610,
.bank_width = OMAP1610_GPIO_WIDTH,
+ .suspend_resume_support = true,
};
static struct __initdata platform_device omap16xx_gpio2 = {
@@ -163,6 +166,7 @@ static struct __initdata omap_gpio_platform_data
omap16xx_gpio3_config = {
.virtual_irq_start = IH_GPIO_BASE + 32,
.bank_type = METHOD_GPIO_1610,
.bank_width = OMAP1610_GPIO_WIDTH,
+ .suspend_resume_support = true,
};
static struct __initdata platform_device omap16xx_gpio3 = {
@@ -192,6 +196,7 @@ static struct __initdata omap_gpio_platform_data
omap16xx_gpio4_config = {
.virtual_irq_start = IH_GPIO_BASE + 48,
.bank_type = METHOD_GPIO_1610,
.bank_width = OMAP1610_GPIO_WIDTH,
+ .suspend_resume_support = true,
};
static struct __initdata platform_device omap16xx_gpio4 = {
diff --git a/arch/arm/mach-omap2/gpio.c b/arch/arm/mach-omap2/gpio.c
index a7bb005..73b5705 100644
--- a/arch/arm/mach-omap2/gpio.c
+++ b/arch/arm/mach-omap2/gpio.c
@@ -467,6 +467,7 @@ static int omap2_gpio_dev_init(struct omap_hwmod *oh, void
*unused)
pdata-dbck_flag = dev_attr-dbck_flag;
pdata-virtual_irq_start = IH_GPIO_BASE + 32 * (id - 1);
pdata-gpio_fn = gpio_fn;
+ pdata-suspend_resume_support = true;
switch (oh-class-rev) {
case 0:
diff --git a/arch/arm/plat-omap/gpio.c b/arch/arm/plat-omap/gpio.c
index fd710cd..0f48364 100644
--- a/arch/arm/plat-omap/gpio.c
+++ b/arch/arm/plat-omap/gpio.c
@@ -158,11 +158,13 @@ struct gpio_bank {
struct device *dev;
bool dbck_flag;
int stride;
+ bool suspend_resume_support;
};
static struct omap_gpio_func gpio_fn;
static int bank_width;
+static int omap_gpio_sysinit(void);
static int check_gpio(int gpio)
{
if (unlikely(gpio_fn.gpio_valid(gpio) 0)) {
@@ -829,8 +831,6 @@ static struct irq_chip gpio_irq_chip = {
/*-*/
-#ifdef CONFIG_ARCH_OMAP1
-
/* MPUIO uses the always-on 32k clock */
static void mpuio_ack_irq(struct irq_data *d)
@@ -860,20 +860,8 @@ static struct irq_chip mpuio_irq_chip = {
.irq_mask = mpuio_mask_irq,
.irq_unmask = mpuio_unmask_irq,
.irq_set_type = gpio_irq_type,
-#ifdef CONFIG_ARCH_OMAP16XX
- /* REVISIT: assuming only 16xx supports MPUIO wake events */
- .irq_set_wake = gpio_wake_enable,
-#endif
};
-
-#define bank_is_mpuio(bank)((bank)-method == METHOD_MPUIO)
-
-
-#ifdef CONFIG_ARCH_OMAP16XX
-
-#include linux/platform_device.h
-
static int omap_mpuio_suspend_noirq(struct device *dev)
{
struct platform_device *pdev = to_platform_device(dev);
@@ -944,19 +932,6 @@ static inline void mpuio_init(struct gpio_bank *bank)
mpuio_init_done = 1;
}
-#else
-static inline void mpuio_init(struct gpio_bank *bank) {}
-#endif /* 16xx */
-
-#else
-
-extern struct irq_chip mpuio_irq_chip;
-
-#define bank_is_mpuio(bank)0
-static inline void mpuio_init(struct gpio_bank *bank) {}
-
-#endif
-
/*-*/
/* REVISIT these are stupid implementations! replace by ones that
@@ -1104,7 +1079,7 @@ static void omap_gpio_mod_init(struct gpio_bank *bank,
[RFC PATCH 10/18] OMAP: GPIO: cleanup set wakeup/suspend/resume funcs
Avoid the usage of cpu_is* checks and CONFIG_ARCH_OMAP* checks
from _set_gpio_wakeup and gpio suspend/resume functions.
Signed-off-by: Charulatha V ch...@ti.com
---
arch/arm/plat-omap/gpio.c | 109 ++---
1 files changed, 33 insertions(+), 76 deletions(-)
diff --git a/arch/arm/plat-omap/gpio.c b/arch/arm/plat-omap/gpio.c
index 5fe6dbf..df2414d 100644
--- a/arch/arm/plat-omap/gpio.c
+++ b/arch/arm/plat-omap/gpio.c
@@ -30,6 +30,7 @@
#include mach/gpio.h
#include asm/mach/irq.h
+#define OMAP_GPIO_WAKE_SET_CLR_ALL 0x
#defineMPUIO_GPIO_IRQENA_MASK 0x
/*
* OMAP1510 GPIO registers
@@ -140,10 +141,8 @@ struct gpio_bank {
u16 irq;
u16 virtual_irq_start;
int method;
-#if defined(CONFIG_ARCH_OMAP16XX) || defined(CONFIG_ARCH_OMAP2PLUS)
u32 suspend_wakeup;
u32 saved_wakeup;
-#endif
u32 non_wakeup_gpios;
u32 enabled_non_wakeup_gpios;
@@ -630,18 +629,6 @@ static int _set_gpio_wakeup(struct gpio_bank *bank, int
gpio, int enable)
unsigned long uninitialized_var(flags);
switch (bank-method) {
-#ifdef CONFIG_ARCH_OMAP16XX
- case METHOD_MPUIO:
- case METHOD_GPIO_1610:
- spin_lock_irqsave(bank-lock, flags);
- if (enable)
- bank-suspend_wakeup |= (1 gpio);
- else
- bank-suspend_wakeup = ~(1 gpio);
- spin_unlock_irqrestore(bank-lock, flags);
- return 0;
-#endif
-#ifdef CONFIG_ARCH_OMAP2PLUS
case METHOD_GPIO_24XX:
case METHOD_GPIO_44XX:
if (bank-non_wakeup_gpios (1 gpio)) {
@@ -650,6 +637,8 @@ static int _set_gpio_wakeup(struct gpio_bank *bank, int
gpio, int enable)
(bank - gpio_bank) * 32 + gpio);
return -EINVAL;
}
+ case METHOD_MPUIO:
+ case METHOD_GPIO_1610:
spin_lock_irqsave(bank-lock, flags);
if (enable)
bank-suspend_wakeup |= (1 gpio);
@@ -657,7 +646,6 @@ static int _set_gpio_wakeup(struct gpio_bank *bank, int
gpio, int enable)
bank-suspend_wakeup = ~(1 gpio);
spin_unlock_irqrestore(bank-lock, flags);
return 0;
-#endif
default:
printk(KERN_ERR Can't enable GPIO wakeup for method %i\n,
bank-method);
@@ -1347,51 +1335,35 @@ static int __devinit omap_gpio_probe(struct
platform_device *pdev)
return 0;
}
-#if defined(CONFIG_ARCH_OMAP16XX) || defined(CONFIG_ARCH_OMAP2PLUS)
static int omap_gpio_suspend(struct sys_device *dev, pm_message_t mesg)
{
int i;
- if (!cpu_class_is_omap2() !cpu_is_omap16xx())
- return 0;
-
for (i = 0; i gpio_bank_count; i++) {
struct gpio_bank *bank = gpio_bank[i];
- void __iomem *wake_status;
- void __iomem *wake_clear;
- void __iomem *wake_set;
+ u32 wake_status;
+ u32 wake_clear;
+ u32 wake_set;
unsigned long flags;
- switch (bank-method) {
-#ifdef CONFIG_ARCH_OMAP16XX
- case METHOD_GPIO_1610:
- wake_status = bank-base + OMAP1610_GPIO_WAKEUPENABLE;
- wake_clear = bank-base + OMAP1610_GPIO_CLEAR_WAKEUPENA;
- wake_set = bank-base + OMAP1610_GPIO_SET_WAKEUPENA;
+ if ((bank-method = METHOD_GPIO_1510) ||
+ (bank-method == METHOD_GPIO_7XX)) {
break;
-#endif
-#if defined(CONFIG_ARCH_OMAP2) || defined(CONFIG_ARCH_OMAP3)
- case METHOD_GPIO_24XX:
- wake_status = bank-base + OMAP24XX_GPIO_WAKE_EN;
- wake_clear = bank-base + OMAP24XX_GPIO_CLEARWKUENA;
- wake_set = bank-base + OMAP24XX_GPIO_SETWKUENA;
- break;
-#endif
-#ifdef CONFIG_ARCH_OMAP4
- case METHOD_GPIO_44XX:
- wake_status = bank-base + OMAP4_GPIO_IRQWAKEN0;
- wake_clear = bank-base + OMAP4_GPIO_IRQWAKEN0;
- wake_set = bank-base + OMAP4_GPIO_IRQWAKEN0;
- break;
-#endif
- default:
- continue;
+ } else if (bank-method == METHOD_GPIO_44XX) {
+ wake_status = IRQWAKEN0;
+ wake_clear = IRQWAKEN0;
+ wake_set = IRQWAKEN0;
+ } else {
+ wake_status = WAKE_EN;
+ wake_clear = CLEARWKUENA;
+ wake_set = SETWKUENA;
}
spin_lock_irqsave(bank-lock, flags);
- bank-saved_wakeup = __raw_readl(wake_status);
- __raw_writel(0x,
[RFC PATCH 03/18] OMAP: GPIO: Move gpio_get_index() to mach-omap
gpio_get_index() uses cpu_is* checks. Move this function from
plat-omap/gpio.c to SoC specific GPIO files in mach-omap*/ and
use pdata to pass the function pointer.
Signed-off-by: Charulatha V ch...@ti.com
---
arch/arm/mach-omap1/gpio15xx.c | 14 ++
arch/arm/mach-omap1/gpio16xx.c | 18 +-
arch/arm/mach-omap1/gpio7xx.c | 18 +-
arch/arm/mach-omap2/gpio.c | 12 +
arch/arm/plat-omap/gpio.c | 42 +---
arch/arm/plat-omap/include/plat/gpio.h |5
6 files changed, 82 insertions(+), 27 deletions(-)
diff --git a/arch/arm/mach-omap1/gpio15xx.c b/arch/arm/mach-omap1/gpio15xx.c
index 04c4b04..eb2727a 100644
--- a/arch/arm/mach-omap1/gpio15xx.c
+++ b/arch/arm/mach-omap1/gpio15xx.c
@@ -21,6 +21,8 @@
#define OMAP1_MPUIO_VBASE OMAP1_MPUIO_BASE
#define OMAP1510_GPIO_BASE 0xFFFCE000
+#define OMAP1510_GPIO_INDEX_MASK 0x0f
+
/* gpio1 */
static struct __initdata resource omap15xx_mpu_gpio_resources[] = {
{
@@ -80,6 +82,15 @@ static struct __initdata platform_device omap15xx_gpio = {
.resource = omap15xx_gpio_resources,
};
+static int get_gpio_index(int gpio)
+{
+ return gpio OMAP1510_GPIO_INDEX_MASK;
+}
+
+static struct omap_gpio_func gpio_fn = {
+ .get_index = get_gpio_index,
+};
+
/*
* omap15xx_gpio_init needs to be done before
* machine_init functions access gpio APIs.
@@ -90,7 +101,10 @@ static int __init omap15xx_gpio_init(void)
if (!cpu_is_omap15xx())
return -EINVAL;
+ omap15xx_gpio_config.gpio_fn = gpio_fn;
platform_device_register(omap15xx_mpu_gpio);
+
+ omap15xx_mpu_gpio_config.gpio_fn = gpio_fn;
platform_device_register(omap15xx_gpio);
gpio_bank_count = 2;
diff --git a/arch/arm/mach-omap1/gpio16xx.c b/arch/arm/mach-omap1/gpio16xx.c
index 5dd0d4c..9d8aabc 100644
--- a/arch/arm/mach-omap1/gpio16xx.c
+++ b/arch/arm/mach-omap1/gpio16xx.c
@@ -24,6 +24,8 @@
#define OMAP1610_GPIO4_BASE0xfffbbc00
#define OMAP1_MPUIO_VBASE OMAP1_MPUIO_BASE
+#define OMAP1610_GPIO_INDEX_MASK 0x0f
+
/* mpu gpio */
static struct __initdata resource omap16xx_mpu_gpio_resources[] = {
{
@@ -178,6 +180,15 @@ static struct __initdata platform_device *
omap16xx_gpio_dev[] = {
omap16xx_gpio4,
};
+static int get_gpio_index(int gpio)
+{
+ return gpio OMAP1610_GPIO_INDEX_MASK;
+}
+
+static struct omap_gpio_func gpio_fn = {
+ .get_index = get_gpio_index,
+};
+
/*
* omap16xx_gpio_init needs to be done before
* machine_init functions access gpio APIs.
@@ -190,8 +201,13 @@ static int __init omap16xx_gpio_init(void)
if (!cpu_is_omap16xx())
return -EINVAL;
- for (i = 0; i ARRAY_SIZE(omap16xx_gpio_dev); i++)
+ for (i = 0; i ARRAY_SIZE(omap16xx_gpio_dev); i++) {
+ struct omap_gpio_platform_data *pdata;
+
+ pdata = omap16xx_gpio_dev[i]-dev.platform_data;
+ pdata-gpio_fn = gpio_fn;
platform_device_register(omap16xx_gpio_dev[i]);
+ }
gpio_bank_count = ARRAY_SIZE(omap16xx_gpio_dev);
diff --git a/arch/arm/mach-omap1/gpio7xx.c b/arch/arm/mach-omap1/gpio7xx.c
index 1204c8b..74456a9 100644
--- a/arch/arm/mach-omap1/gpio7xx.c
+++ b/arch/arm/mach-omap1/gpio7xx.c
@@ -26,6 +26,8 @@
#define OMAP7XX_GPIO6_BASE 0xfffbe800
#define OMAP1_MPUIO_VBASE OMAP1_MPUIO_BASE
+#define OMAP7XX_GPIO_INDEX_MASK0x1f
+
/* mpu gpio */
static struct __initdata resource omap7xx_mpu_gpio_resources[] = {
{
@@ -240,6 +242,15 @@ static struct __initdata platform_device *
omap7xx_gpio_dev[] = {
omap7xx_gpio6,
};
+static int get_gpio_index(int gpio)
+{
+ return gpio OMAP7XX_GPIO_INDEX_MASK;
+}
+
+static struct omap_gpio_func gpio_fn = {
+ .get_index = get_gpio_index,
+};
+
/*
* omap7xx_gpio_init needs to be done before
* machine_init functions access gpio APIs.
@@ -252,8 +263,13 @@ static int __init omap7xx_gpio_init(void)
if (!cpu_is_omap7xx())
return -EINVAL;
- for (i = 0; i ARRAY_SIZE(omap7xx_gpio_dev); i++)
+ for (i = 0; i ARRAY_SIZE(omap7xx_gpio_dev); i++) {
+ struct omap_gpio_platform_data *pdata;
+
+ pdata = omap7xx_gpio_dev[i]-dev.platform_data;
+ pdata-gpio_fn = gpio_fn;
platform_device_register(omap7xx_gpio_dev[i]);
+ }
gpio_bank_count = ARRAY_SIZE(omap7xx_gpio_dev);
diff --git a/arch/arm/mach-omap2/gpio.c b/arch/arm/mach-omap2/gpio.c
index 9529842..498ab92 100644
--- a/arch/arm/mach-omap2/gpio.c
+++ b/arch/arm/mach-omap2/gpio.c
@@ -24,6 +24,8 @@
#include plat/omap_hwmod.h
#include plat/omap_device.h
+#define OMAP2_GPIO_INDEX_MASK 0x1f
+
static struct omap_device_pm_latency omap_gpio_latency[] = {
[0] = {
[RFC PATCH 16/18] OMAP: GPIO: move omap_gpio_mod_init to mach-omap
Move omap_gpio_mod_init() from plat-omap/ to mach-omap*/
as this function handles architecture specific GPIO module
initialization.
Provide non_wakeup_gpios information through pdata.
With this change all the cpu_is* checks #ifdef CONFIG_ARCH_OMAP*
will be removed from OMAP GPIO driver.
Also remove all the unsused register offset macros.
Signed-off-by: Charulatha V ch...@ti.com
---
arch/arm/mach-omap1/gpio15xx.c |7 ++
arch/arm/mach-omap1/gpio16xx.c | 24 +
arch/arm/mach-omap1/gpio7xx.c |7 ++
arch/arm/mach-omap2/gpio.c | 31 +-
arch/arm/plat-omap/gpio.c | 172 ++--
arch/arm/plat-omap/include/plat/gpio.h |2 +
6 files changed, 74 insertions(+), 169 deletions(-)
diff --git a/arch/arm/mach-omap1/gpio15xx.c b/arch/arm/mach-omap1/gpio15xx.c
index 3763db3..f8303e6 100644
--- a/arch/arm/mach-omap1/gpio15xx.c
+++ b/arch/arm/mach-omap1/gpio15xx.c
@@ -163,6 +163,12 @@ static void gpio_enable_irq(void __iomem *base, int
gpio_mask, int enable)
gpio_write(l, base, IRQENABLE1);
}
+static void gpio_init(void __iomem *base, u32 id)
+{
+ gpio_write(0x, base, INT_CTRL);
+ gpio_write(0, base, IRQSTATUS_REG0);
+}
+
static struct omap_gpio_func gpio_fn = {
.get_index = get_gpio_index,
.gpio_valid = gpio_valid,
@@ -171,6 +177,7 @@ static struct omap_gpio_func gpio_fn = {
.gpio_set_trigger = gpio_set_trigger,
.gpio_is_irqena = gpio_is_irqena,
.gpio_enable_irq = gpio_enable_irq,
+ .gpio_init = gpio_init,
};
/*
diff --git a/arch/arm/mach-omap1/gpio16xx.c b/arch/arm/mach-omap1/gpio16xx.c
index cbac063..37820ba 100644
--- a/arch/arm/mach-omap1/gpio16xx.c
+++ b/arch/arm/mach-omap1/gpio16xx.c
@@ -291,6 +291,29 @@ static void gpio_enable_irq(void __iomem *base, int
gpio_mask, int enable)
gpio_write(gpio_mask, base, CLEARIRQENA1);
}
+/*
+ * GPIO SYSCONFIG needs to be set expicitly in
+ * the driver code only for OMAP16xx. For OMAP2plus
+ * this is taken care by PM runtime framework.
+ * Hence no specific field is required to defined in
+ * omap_gpio_reg_offsets.
+ */
+#define OMAP1610_GPIO_SYSCONFIG0x0010
+
+static void gpio_init(void __iomem *base, u32 id)
+{
+ gpio_write(0, base, IRQENABLE1);
+ gpio_write(0x, base, IRQSTATUS_REG0);
+ __raw_writew(0x0014, base + OMAP1610_GPIO_SYSCONFIG);
+
+ /*
+* Enable system clock for GPIO module.
+* The CAM_CLK_CTRL *is* really the right place.
+*/
+ omap_writel(omap_readl(ULPD_CAM_CLK_CTRL) | 0x04,
+ ULPD_CAM_CLK_CTRL);
+}
+
static struct omap_gpio_func gpio_fn = {
.get_index = get_gpio_index,
.gpio_valid = gpio_valid,
@@ -299,6 +322,7 @@ static struct omap_gpio_func gpio_fn = {
.gpio_set_trigger = gpio_set_trigger,
.gpio_is_irqena = gpio_is_irqena,
.gpio_enable_irq = gpio_enable_irq,
+ .gpio_init = gpio_init,
};
/*
diff --git a/arch/arm/mach-omap1/gpio7xx.c b/arch/arm/mach-omap1/gpio7xx.c
index cd6bad7..792156c 100644
--- a/arch/arm/mach-omap1/gpio7xx.c
+++ b/arch/arm/mach-omap1/gpio7xx.c
@@ -325,6 +325,12 @@ static void gpio_enable_irq(void __iomem *base, int
gpio_mask, int enable)
gpio_write(l, base, IRQENABLE1);
}
+static void gpio_init(void __iomem *base, u32 id)
+{
+ gpio_write(0x, base, INT_CTRL);
+ gpio_write(0, base, IRQSTATUS_REG0);
+}
+
static struct omap_gpio_func gpio_fn = {
.get_index = get_gpio_index,
.gpio_valid = gpio_valid,
@@ -333,6 +339,7 @@ static struct omap_gpio_func gpio_fn = {
.gpio_set_trigger = gpio_set_trigger,
.gpio_is_irqena = gpio_is_irqena,
.gpio_enable_irq = gpio_enable_irq,
+ .gpio_init = gpio_init,
};
/*
diff --git a/arch/arm/mach-omap2/gpio.c b/arch/arm/mach-omap2/gpio.c
index 73b5705..f5615a7 100644
--- a/arch/arm/mach-omap2/gpio.c
+++ b/arch/arm/mach-omap2/gpio.c
@@ -421,6 +421,22 @@ static void gpio_restore_ctx(void __iomem *base, u32 id)
}
}
+static void gpio_init(void __iomem *base, u32 id)
+{
+ if (cpu_is_omap44xx()) {
+ gpio_write(0x, base, IRQSTATUSCLR0);
+ gpio_write(0x, base, DEBOUNCE_EN);
+ /* Initialize interface clk ungated, module enabled */
+ gpio_write(0, base, CTRL);
+ } else if (cpu_is_omap34xx()) {
+ gpio_write(0x, base, IRQENABLE1);
+ gpio_write(0x, base, IRQSTATUS_REG0);
+ gpio_write(0x, base, DEBOUNCE_EN);
+ /* Initialize interface clk ungated, module enabled */
+ gpio_write(0, base, CTRL);
+ }
+}
+
static struct omap_gpio_func gpio_fn = {
.get_index = get_gpio_index,
.gpio_valid = gpio_valid,
@@ -434,6 +450,7 @@ static struct omap_gpio_func gpio_fn = {
.gpio_resume_after_idle
[RFC PATCH 06/18] OMAP: GPIO: cleanup set trigger func
Cleanup GPIO set trigger and toggle edge triggering
functions by removing the cpu_is checks and the CONFIG_ARCH_*
checks .
Some part of the code access the gpio_bank structure which
is specific to the OMAP GPIO driver. Therefore such part of the
code are handled by means of gpio-method.
Signed-off-by: Charulatha V ch...@ti.com
---
arch/arm/mach-omap1/gpio15xx.c | 17 ++
arch/arm/mach-omap1/gpio16xx.c | 37 +
arch/arm/mach-omap1/gpio7xx.c | 19 +++
arch/arm/mach-omap2/gpio.c | 31
arch/arm/plat-omap/gpio.c | 264
arch/arm/plat-omap/include/plat/gpio.h |1 +
6 files changed, 201 insertions(+), 168 deletions(-)
diff --git a/arch/arm/mach-omap1/gpio15xx.c b/arch/arm/mach-omap1/gpio15xx.c
index 26c6c25..3c64e69 100644
--- a/arch/arm/mach-omap1/gpio15xx.c
+++ b/arch/arm/mach-omap1/gpio15xx.c
@@ -17,6 +17,7 @@
*/
#include linux/gpio.h
+#include linux/irq.h
#define OMAP1_MPUIO_VBASE OMAP1_MPUIO_BASE
#define OMAP1510_GPIO_BASE 0xFFFCE000
@@ -128,11 +129,27 @@ static int gpio_valid(int gpio)
return -EINVAL;
}
+static int gpio_set_trigger(void __iomem *base, int gpio, int trigger)
+{
+ u32 l = gpio_read(base, INT_CTRL);
+
+ if (trigger IRQ_TYPE_EDGE_RISING)
+ l |= 1 gpio;
+ else if (trigger IRQ_TYPE_EDGE_FALLING)
+ l = ~(1 gpio);
+ else
+ return -EINVAL;
+
+ gpio_write(l, base, INT_CTRL);
+ return 0;
+}
+
static struct omap_gpio_func gpio_fn = {
.get_index = get_gpio_index,
.gpio_valid = gpio_valid,
.gpio_read = gpio_read,
.gpio_write = gpio_write,
+ .gpio_set_trigger = gpio_set_trigger,
};
/*
diff --git a/arch/arm/mach-omap1/gpio16xx.c b/arch/arm/mach-omap1/gpio16xx.c
index 473c889..6b4afa2 100644
--- a/arch/arm/mach-omap1/gpio16xx.c
+++ b/arch/arm/mach-omap1/gpio16xx.c
@@ -17,6 +17,7 @@
*/
#include linux/gpio.h
+#include linux/irq.h
#define OMAP1610_GPIO1_BASE0xfffbe400
#define OMAP1610_GPIO2_BASE0xfffbec00
@@ -30,6 +31,12 @@
#define OMAP1610_NON_MPUIO_GPIO_VALID ((OMAP1610_GPIO_BANK_CNT - 1) *\
OMAP1610_GPIO_WIDTH)
+#defineOMAP1610_GPIO_USE_EDGE_CTRL2_REG0x08
+#defineOMAP1610_GPIO_SET_FALLING_EDGE 0x01
+#defineOMAP1610_GPIO_SET_RISING_EDGE 0x02
+#defineOMAP1610_GPIO_BOTH_EDGE_SET 0x03
+#defineOMAP1610_GPIO_EDGE_MASK 0x07
+
static u16 reg_map[] = {
[REV] = 0x00,
[SYS_CFG] = 0x10,
@@ -236,11 +243,41 @@ static int gpio_valid(int gpio)
return -EINVAL;
}
+static int gpio_set_trigger(void __iomem *base, int gpio, int trigger)
+{
+ u32 offset;
+ u32 l = 0;
+
+ if (gpio OMAP1610_GPIO_USE_EDGE_CTRL2_REG)
+ offset = EDGE_CTRL2;
+ else
+ offset = EDGE_CTRL1;
+
+ l = gpio_read(base, offset);
+ gpio = OMAP1610_GPIO_EDGE_MASK;
+ l = ~(OMAP1610_GPIO_BOTH_EDGE_SET (gpio 1));
+
+ if (trigger IRQ_TYPE_EDGE_RISING)
+ l |= OMAP1610_GPIO_SET_RISING_EDGE (gpio 1);
+ if (trigger IRQ_TYPE_EDGE_FALLING)
+ l |= OMAP1610_GPIO_SET_FALLING_EDGE (gpio 1);
+
+ if (trigger)
+ /* Enable wake-up during idle for dynamic tick */
+ gpio_write(1 gpio, base, SETWKUENA);
+ else
+ gpio_write(1 gpio, base, CLEARWKUENA);
+
+ gpio_write(l, base, offset);
+ return 0;
+}
+
static struct omap_gpio_func gpio_fn = {
.get_index = get_gpio_index,
.gpio_valid = gpio_valid,
.gpio_read = gpio_read,
.gpio_write = gpio_write,
+ .gpio_set_trigger = gpio_set_trigger,
};
/*
diff --git a/arch/arm/mach-omap1/gpio7xx.c b/arch/arm/mach-omap1/gpio7xx.c
index a6c2397..599067d 100644
--- a/arch/arm/mach-omap1/gpio7xx.c
+++ b/arch/arm/mach-omap1/gpio7xx.c
@@ -17,6 +17,7 @@
*/
#include linux/gpio.h
+#include linux/irq.h
#define OMAP7XX_GPIO1_BASE 0xfffbc000
#define OMAP7XX_GPIO2_BASE 0xfffbc800
@@ -289,11 +290,29 @@ static int gpio_valid(int gpio)
return -EINVAL;
}
+static int gpio_set_trigger(void __iomem *base, int gpio, int trigger)
+{
+ u32 l = 0;
+
+ l = gpio_read(base, INT_CTRL);
+
+ if (trigger IRQ_TYPE_EDGE_RISING)
+ l |= 1 gpio;
+ else if (trigger IRQ_TYPE_EDGE_FALLING)
+ l = ~(1 gpio);
+ else
+ return -EINVAL;
+
+ gpio_write(l, base, INT_CTRL);
+ return 0;
+}
+
static struct omap_gpio_func gpio_fn = {
.get_index = get_gpio_index,
.gpio_valid = gpio_valid,
.gpio_read = gpio_read,
.gpio_write = gpio_write,
+ .gpio_set_trigger = gpio_set_trigger,
};
/*
diff --git
[RFC PATCH 11/18] OMAP: GPIO: Remove dependency on gpio_bank_count
gpio_bank_count is the count of number of GPIO devices
in a SoC. Remove this dependency from the driver. Also remove
the dependency on array of pointers to gpio_bank struct of
all GPIO devices.
The cpu_is*() checks used in omap2_gpio_prepare_for_idle() and
omap2_gpio_resume_after_idle() would be removed in one of the
patches in this series
Signed-off-by: Charulatha V ch...@ti.com
---
arch/arm/mach-omap1/gpio15xx.c |1 -
arch/arm/mach-omap1/gpio16xx.c |2 -
arch/arm/mach-omap1/gpio7xx.c |2 -
arch/arm/mach-omap2/gpio.c |1 +
arch/arm/plat-omap/gpio.c | 165
arch/arm/plat-omap/include/plat/gpio.h |3 -
6 files changed, 83 insertions(+), 91 deletions(-)
diff --git a/arch/arm/mach-omap1/gpio15xx.c b/arch/arm/mach-omap1/gpio15xx.c
index 7a7a123..3763db3 100644
--- a/arch/arm/mach-omap1/gpio15xx.c
+++ b/arch/arm/mach-omap1/gpio15xx.c
@@ -189,7 +189,6 @@ static int __init omap15xx_gpio_init(void)
omap15xx_mpu_gpio_config.gpio_fn = gpio_fn;
platform_device_register(omap15xx_gpio);
- gpio_bank_count = 2;
return 0;
}
postcore_initcall(omap15xx_gpio_init);
diff --git a/arch/arm/mach-omap1/gpio16xx.c b/arch/arm/mach-omap1/gpio16xx.c
index f05e0c7..6a99b01 100644
--- a/arch/arm/mach-omap1/gpio16xx.c
+++ b/arch/arm/mach-omap1/gpio16xx.c
@@ -316,8 +316,6 @@ static int __init omap16xx_gpio_init(void)
platform_device_register(omap16xx_gpio_dev[i]);
}
- gpio_bank_count = ARRAY_SIZE(omap16xx_gpio_dev);
-
return 0;
}
postcore_initcall(omap16xx_gpio_init);
diff --git a/arch/arm/mach-omap1/gpio7xx.c b/arch/arm/mach-omap1/gpio7xx.c
index 1103efc..cd6bad7 100644
--- a/arch/arm/mach-omap1/gpio7xx.c
+++ b/arch/arm/mach-omap1/gpio7xx.c
@@ -355,8 +355,6 @@ static int __init omap7xx_gpio_init(void)
platform_device_register(omap7xx_gpio_dev[i]);
}
- gpio_bank_count = ARRAY_SIZE(omap7xx_gpio_dev);
-
return 0;
}
postcore_initcall(omap7xx_gpio_init);
diff --git a/arch/arm/mach-omap2/gpio.c b/arch/arm/mach-omap2/gpio.c
index 25fe8a4..a46f4a5 100644
--- a/arch/arm/mach-omap2/gpio.c
+++ b/arch/arm/mach-omap2/gpio.c
@@ -28,6 +28,7 @@
#define OMAP2_GPIO_INDEX_MASK 0x1f
#define OMAP2_GPIO_IRQENA_MASK 0x
+int gpio_bank_count;
int bank_width;
static u16 *reg_map;
static u16 omap2_gpio_reg_offsets[] = {
diff --git a/arch/arm/plat-omap/gpio.c b/arch/arm/plat-omap/gpio.c
index df2414d..f2cd2dd 100644
--- a/arch/arm/plat-omap/gpio.c
+++ b/arch/arm/plat-omap/gpio.c
@@ -14,6 +14,7 @@
* published by the Free Software Foundation.
*/
+#include linux/kernel.h
#include linux/init.h
#include linux/module.h
#include linux/interrupt.h
@@ -135,7 +136,10 @@
#define OMAP4_GPIO_CLEARDATAOUT0x0190
#define OMAP4_GPIO_SETDATAOUT 0x0194
+static LIST_HEAD(omap_gpio_list);
+
struct gpio_bank {
+ struct list_head node;
unsigned long pbase;
void __iomem *base;
u16 irq;
@@ -145,7 +149,7 @@ struct gpio_bank {
u32 saved_wakeup;
u32 non_wakeup_gpios;
u32 enabled_non_wakeup_gpios;
-
+ u16 id;
u32 saved_datain;
u32 saved_fallingdetect;
u32 saved_risingdetect;
@@ -178,18 +182,10 @@ struct omap3_gpio_regs {
static struct omap3_gpio_regs gpio_context[OMAP34XX_NR_GPIOS];
#endif
-/*
- * TODO: Cleanup gpio_bank usage as it is having information
- * related to all instances of the device
- */
-static struct gpio_bank *gpio_bank;
static struct omap_gpio_func gpio_fn;
static int bank_width;
-/* TODO: Analyze removing gpio_bank_count usage from driver code */
-int gpio_bank_count;
-
static int check_gpio(int gpio)
{
if (unlikely(gpio_fn.gpio_valid(gpio) 0)) {
@@ -634,7 +630,7 @@ static int _set_gpio_wakeup(struct gpio_bank *bank, int
gpio, int enable)
if (bank-non_wakeup_gpios (1 gpio)) {
printk(KERN_ERR Unable to modify wakeup on
non-wakeup GPIO%d\n,
- (bank - gpio_bank) * 32 + gpio);
+ bank-id * 32 + gpio);
return -EINVAL;
}
case METHOD_MPUIO:
@@ -991,17 +987,23 @@ static struct platform_device omap_mpuio_device = {
/* could list the /proc/iomem resources */
};
-static inline void mpuio_init(void)
+static inline void mpuio_init(struct gpio_bank *bank)
{
- struct gpio_bank *bank = gpio_bank[0];
+ static int mpuio_init_done;
+
+ if (mpuio_init_done || (bank-method != METHOD_MPUIO))
+ return;
+
platform_set_drvdata(omap_mpuio_device, bank);
- if (platform_driver_register(omap_mpuio_driver) == 0)
- (void) platform_device_register(omap_mpuio_device);
+ if (!platform_driver_register(omap_mpuio_driver))
+
[RFC PATCH 17/18] OMAP: GPIO: use dev_err* instead of printk
Use dev_info()/dev_err() instead of printk in OMAP GPIO driver
Signed-off-by: Charulatha V ch...@ti.com
---
arch/arm/plat-omap/gpio.c |6 +++---
1 files changed, 3 insertions(+), 3 deletions(-)
diff --git a/arch/arm/plat-omap/gpio.c b/arch/arm/plat-omap/gpio.c
index 9c3e865..7ae9f6f 100644
--- a/arch/arm/plat-omap/gpio.c
+++ b/arch/arm/plat-omap/gpio.c
@@ -66,7 +66,7 @@ static int omap_gpio_sysinit(void);
static int check_gpio(int gpio)
{
if (unlikely(gpio_fn.gpio_valid(gpio) 0)) {
- printk(KERN_ERR omap-gpio: invalid GPIO %d\n, gpio);
+ pr_err(omap-gpio: invalid GPIO %d\n, gpio);
dump_stack();
return -1;
}
@@ -470,7 +470,7 @@ static int _set_gpio_wakeup(struct gpio_bank *bank, int
gpio, int enable)
case METHOD_GPIO_24XX:
case METHOD_GPIO_44XX:
if (bank-non_wakeup_gpios (1 gpio)) {
- printk(KERN_ERR Unable to modify wakeup on
+ dev_err(bank-dev, Unable to modify wakeup on
non-wakeup GPIO%d\n,
bank-id * 32 + gpio);
return -EINVAL;
@@ -485,7 +485,7 @@ static int _set_gpio_wakeup(struct gpio_bank *bank, int
gpio, int enable)
spin_unlock_irqrestore(bank-lock, flags);
return 0;
default:
- printk(KERN_ERR Can't enable GPIO wakeup for method %i\n,
+ dev_err(bank-dev, Can't enable GPIO wakeup for method %i\n,
bank-method);
return -EINVAL;
}
--
1.7.1
--
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[RFC PATCH 02/18] OMAP: GPIO: remove get_gpio_bank()
use chip info to get the pointer to the struct gpio_bank for a
given GPIO bank and remove get_gpio_bank().
Signed-off-by: Charulatha V ch...@ti.com
---
arch/arm/plat-omap/gpio.c | 29 ++---
1 files changed, 2 insertions(+), 27 deletions(-)
diff --git a/arch/arm/plat-omap/gpio.c b/arch/arm/plat-omap/gpio.c
index 9164bd4..498e1df 100644
--- a/arch/arm/plat-omap/gpio.c
+++ b/arch/arm/plat-omap/gpio.c
@@ -189,31 +189,6 @@ static int bank_width;
/* TODO: Analyze removing gpio_bank_count usage from driver code */
int gpio_bank_count;
-static inline struct gpio_bank *get_gpio_bank(int gpio)
-{
- if (cpu_is_omap15xx()) {
- if (OMAP_GPIO_IS_MPUIO(gpio))
- return gpio_bank[0];
- return gpio_bank[1];
- }
- if (cpu_is_omap16xx()) {
- if (OMAP_GPIO_IS_MPUIO(gpio))
- return gpio_bank[0];
- return gpio_bank[1 + (gpio 4)];
- }
- if (cpu_is_omap7xx()) {
- if (OMAP_GPIO_IS_MPUIO(gpio))
- return gpio_bank[0];
- return gpio_bank[1 + (gpio 5)];
- }
- if (cpu_is_omap24xx())
- return gpio_bank[gpio 5];
- if (cpu_is_omap34xx() || cpu_is_omap44xx())
- return gpio_bank[gpio 5];
- BUG();
- return NULL;
-}
-
static inline int get_gpio_index(int gpio)
{
if (cpu_is_omap7xx())
@@ -1393,7 +1368,7 @@ static struct platform_device omap_mpuio_device = {
static inline void mpuio_init(void)
{
- struct gpio_bank *bank = get_gpio_bank(OMAP_MPUIO(0));
+ struct gpio_bank *bank = gpio_bank[0];
platform_set_drvdata(omap_mpuio_device, bank);
if (platform_driver_register(omap_mpuio_driver) == 0)
@@ -1469,7 +1444,7 @@ static int gpio_get(struct gpio_chip *chip, unsigned
offset)
u32 mask;
gpio = chip-base + offset;
- bank = get_gpio_bank(gpio);
+ bank = container_of(chip, struct gpio_bank, chip);
reg = bank-base;
mask = 1 get_gpio_index(gpio);
--
1.7.1
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[RFC PATCH 18/18] OMAP: GPIO: Remove usage of bank method
Remove usage of bank-method to identify CPU specific OMAP GPIO bank.
Instead identify specific features using flags and accordingly manage.
bank-type MPUIO is common for all OMAP1 SoCs. Use bank-stride to
identify the MPUIO type bank
Signed-off-by: Charulatha V ch...@ti.com
---
arch/arm/mach-omap1/gpio15xx.c |2 -
arch/arm/mach-omap1/gpio16xx.c | 24 ++--
arch/arm/mach-omap1/gpio7xx.c |7 -
arch/arm/mach-omap2/gpio.c | 11 ++-
arch/arm/plat-omap/gpio.c | 228 +--
arch/arm/plat-omap/include/plat/gpio.h | 46 ++-
6 files changed, 155 insertions(+), 163 deletions(-)
diff --git a/arch/arm/mach-omap1/gpio15xx.c b/arch/arm/mach-omap1/gpio15xx.c
index f8303e6..aa08ebf 100644
--- a/arch/arm/mach-omap1/gpio15xx.c
+++ b/arch/arm/mach-omap1/gpio15xx.c
@@ -54,7 +54,6 @@ static struct __initdata resource
omap15xx_mpu_gpio_resources[] = {
static struct __initdata omap_gpio_platform_data omap15xx_mpu_gpio_config = {
.virtual_irq_start = IH_MPUIO_BASE,
- .bank_type = METHOD_MPUIO,
.bank_width = OMAP1510_GPIO_WIDTH,
.bank_stride= 1,
};
@@ -84,7 +83,6 @@ static struct __initdata resource omap15xx_gpio_resources[] =
{
static struct __initdata omap_gpio_platform_data omap15xx_gpio_config = {
.virtual_irq_start = IH_GPIO_BASE,
- .bank_type = METHOD_GPIO_1510,
.bank_width = OMAP1510_GPIO_WIDTH,
};
diff --git a/arch/arm/mach-omap1/gpio16xx.c b/arch/arm/mach-omap1/gpio16xx.c
index 37820ba..5f116f6 100644
--- a/arch/arm/mach-omap1/gpio16xx.c
+++ b/arch/arm/mach-omap1/gpio16xx.c
@@ -38,6 +38,13 @@
#defineOMAP1610_GPIO_BOTH_EDGE_SET 0x03
#defineOMAP1610_GPIO_EDGE_MASK 0x07
+#define OMAP16XX_SPECIFIC_SUPPORT\
+ .bank_width = 16,\
+ .suspend_resume_support = true,\
+ .features = BIT(OMAP_GPIO_REV_SHOW_FLAG) |\
+ BIT(OMAP_GPIO_DATAOUT_SET_CLR_REGS_FLAG) |\
+ BIT(OMAP_GPIO_DUAL_EDGE_TRIG_FLAG)\
+
static u16 reg_map[] = {
[REV] = 0x00,
[SYS_CFG] = 0x10,
@@ -73,7 +80,6 @@ static struct __initdata resource
omap16xx_mpu_gpio_resources[] = {
static struct __initdata omap_gpio_platform_data omap16xx_mpu_gpio_config = {
.virtual_irq_start = IH_MPUIO_BASE,
- .bank_type = METHOD_MPUIO,
.bank_width = OMAP1610_GPIO_WIDTH,
.bank_stride= 1,
.suspend_resume_support = true,
@@ -104,9 +110,7 @@ static struct __initdata resource
omap16xx_gpio1_resources[] = {
static struct __initdata omap_gpio_platform_data omap16xx_gpio1_config = {
.virtual_irq_start = IH_GPIO_BASE,
- .bank_type = METHOD_GPIO_1610,
- .bank_width = OMAP1610_GPIO_WIDTH,
- .suspend_resume_support = true,
+ OMAP16XX_SPECIFIC_SUPPORT,
};
static struct __initdata platform_device omap16xx_gpio1 = {
@@ -134,9 +138,7 @@ static struct __initdata resource
omap16xx_gpio2_resources[] = {
static struct __initdata omap_gpio_platform_data omap16xx_gpio2_config = {
.virtual_irq_start = IH_GPIO_BASE + 16,
- .bank_type = METHOD_GPIO_1610,
- .bank_width = OMAP1610_GPIO_WIDTH,
- .suspend_resume_support = true,
+ OMAP16XX_SPECIFIC_SUPPORT,
};
static struct __initdata platform_device omap16xx_gpio2 = {
@@ -164,9 +166,7 @@ static struct __initdata resource
omap16xx_gpio3_resources[] = {
static struct __initdata omap_gpio_platform_data omap16xx_gpio3_config = {
.virtual_irq_start = IH_GPIO_BASE + 32,
- .bank_type = METHOD_GPIO_1610,
- .bank_width = OMAP1610_GPIO_WIDTH,
- .suspend_resume_support = true,
+ OMAP16XX_SPECIFIC_SUPPORT,
};
static struct __initdata platform_device omap16xx_gpio3 = {
@@ -194,9 +194,7 @@ static struct __initdata resource
omap16xx_gpio4_resources[] = {
static struct __initdata omap_gpio_platform_data omap16xx_gpio4_config = {
.virtual_irq_start = IH_GPIO_BASE + 48,
- .bank_type = METHOD_GPIO_1610,
- .bank_width = OMAP1610_GPIO_WIDTH,
- .suspend_resume_support = true,
+ OMAP16XX_SPECIFIC_SUPPORT,
};
static struct __initdata platform_device omap16xx_gpio4 = {
diff --git a/arch/arm/mach-omap1/gpio7xx.c b/arch/arm/mach-omap1/gpio7xx.c
index 792156c..28d5917 100644
--- a/arch/arm/mach-omap1/gpio7xx.c
+++ b/arch/arm/mach-omap1/gpio7xx.c
@@ -60,7 +60,6 @@ static struct __initdata resource
omap7xx_mpu_gpio_resources[] = {
static struct __initdata omap_gpio_platform_data omap7xx_mpu_gpio_config = {
.virtual_irq_start = IH_MPUIO_BASE,
- .bank_type = METHOD_MPUIO,
.bank_width =
[RFC PATCH 15/18] OMAP: GPIO: cleanup gpio_show_rev
Remove cpu_is* checks from omap_gpio_show_rev.
Also display GPIO IP version only once as it is not
required to print the IP version of all the banks as
they are the same.
Signed-off-by: Charulatha V ch...@ti.com
---
arch/arm/plat-omap/gpio.c | 17 ++---
1 files changed, 10 insertions(+), 7 deletions(-)
diff --git a/arch/arm/plat-omap/gpio.c b/arch/arm/plat-omap/gpio.c
index 0f48364..637db76 100644
--- a/arch/arm/plat-omap/gpio.c
+++ b/arch/arm/plat-omap/gpio.c
@@ -1032,12 +1032,10 @@ static void __init omap_gpio_show_rev(struct gpio_bank
*bank)
{
u32 rev;
- if (cpu_is_omap16xx() !(bank-method != METHOD_MPUIO))
- rev = __raw_readw(bank-base + OMAP1610_GPIO_REVISION);
- else if (cpu_is_omap24xx() || cpu_is_omap34xx())
- rev = __raw_readl(bank-base + OMAP24XX_GPIO_REVISION);
- else if (cpu_is_omap44xx())
- rev = __raw_readl(bank-base + OMAP4_GPIO_REVISION);
+ if ((bank-method == METHOD_GPIO_24XX) ||
+ (bank-method == METHOD_GPIO_44XX) ||
+ (bank-method == METHOD_GPIO_1610))
+ rev = gpio_fn.gpio_read(bank-base, REV);
else
return;
@@ -1170,6 +1168,7 @@ static void __init omap_gpio_chip_init(struct gpio_bank
*bank)
static int __devinit omap_gpio_probe(struct platform_device *pdev)
{
static int gpio_init_done;
+ static int show_rev;
struct omap_gpio_platform_data *pdata;
struct resource *res;
struct gpio_bank *bank;
@@ -1238,7 +1237,6 @@ static int __devinit omap_gpio_probe(struct
platform_device *pdev)
omap_gpio_mod_init(bank, pdev-id);
omap_gpio_chip_init(bank);
- omap_gpio_show_rev(bank);
list_add_tail(bank-node, omap_gpio_list);
@@ -1259,6 +1257,11 @@ static int __devinit omap_gpio_probe(struct
platform_device *pdev)
gpio_init_done = 1;
}
+ if ((bank-method != METHOD_MPUIO) (!show_rev)) {
+ omap_gpio_show_rev(bank);
+ show_rev = 1;
+ }
+
return 0;
}
--
1.7.1
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[RFC PATCH 12/18] OMAP: GPIO: cleanup set_debounce, idle/resume_after_idle
gpio_set_debounce(), gpio_prepare_for_idle() and gpio_resume_after_idle()
are specific to OMAP2PLUS CPUs. These functions rely on dbck_enable_mask
which is part of GPIO bank structure.
The above mentioned functions are moved to mach-omap2/gpio.c and the
required information is passed from the OMAP GPIO driver.
Signed-off-by: Charulatha V ch...@ti.com
---
arch/arm/mach-omap2/gpio.c | 201 -
arch/arm/plat-omap/gpio.c | 223 +++-
arch/arm/plat-omap/include/plat/gpio.h |6 +
3 files changed, 222 insertions(+), 208 deletions(-)
diff --git a/arch/arm/mach-omap2/gpio.c b/arch/arm/mach-omap2/gpio.c
index a46f4a5..a0edaeb 100644
--- a/arch/arm/mach-omap2/gpio.c
+++ b/arch/arm/mach-omap2/gpio.c
@@ -21,13 +21,31 @@
#include linux/err.h
#include linux/slab.h
#include linux/interrupt.h
+#include linux/clk.h
#include plat/omap_hwmod.h
#include plat/omap_device.h
#define OMAP2_GPIO_INDEX_MASK 0x1f
#define OMAP2_GPIO_IRQENA_MASK 0x
+#define OMAP2_GPIO_DEBOUNCE_MIN_CHK32
+#define OMAP2_GPIO_DEBOUNCE_MAX_CHK7936
+#define OMAP2_GPIO_DEBOUNCE_MIN_VAL0x01
+#define OMAP2_GPIO_DEBOUNCE_MAX_VAL0xff
+#define OMAP2_GPIO_DEBOUNCE_VAL_DIV0x1f
+struct gpio_state {
+ struct list_head node;
+ u32 saved_datain;
+ u32 saved_fallingdetect;
+ u32 saved_risingdetect;
+ u32 dbck_enable_mask;
+ struct clk *dbck;
+ u16 id;
+};
+
+static int workaround_enabled;
+static LIST_HEAD(omap_gpio_ctx_list);
int gpio_bank_count;
int bank_width;
static u16 *reg_map;
@@ -172,6 +190,161 @@ static void gpio_enable_irq(void __iomem *base, int
gpio_mask, int enable)
}
}
+static void gpio_debounce_set(void __iomem *base, unsigned gpio,
+ unsigned debounce, u16 id)
+{
+ u32 val;
+ u32 l = 0;
+ struct gpio_state *gpio_dev_state;
+
+ if (debounce OMAP2_GPIO_DEBOUNCE_MIN_CHK)
+ debounce = OMAP2_GPIO_DEBOUNCE_MIN_VAL;
+ else if (debounce OMAP2_GPIO_DEBOUNCE_MAX_CHK)
+ debounce = OMAP2_GPIO_DEBOUNCE_MAX_VAL;
+ else
+ debounce = (debounce / OMAP2_GPIO_DEBOUNCE_VAL_DIV) - 1;
+
+ gpio_write(debounce, base, DEBOUNCE_VAL);
+
+ val = gpio_read(base, DEBOUNCE_EN);
+ l = 1 get_gpio_index(gpio);
+
+ list_for_each_entry(gpio_dev_state, omap_gpio_ctx_list, node) {
+ if (gpio_dev_state-id == id) {
+ if (debounce) {
+ val |= l;
+ clk_enable(gpio_dev_state-dbck);
+ } else {
+ val = ~l;
+ clk_disable(gpio_dev_state-dbck);
+ }
+ gpio_dev_state-dbck_enable_mask = val;
+ gpio_write(val, base, DEBOUNCE_EN);
+ }
+ }
+}
+
+static void gpio_prepare_for_idle(u32 enabled_non_wakeup_gpios, u16 id,
+ void __iomem *base, int off_mode)
+{
+ int c = 0;
+ struct gpio_state *gpio_dev_state;
+
+ list_for_each_entry(gpio_dev_state, omap_gpio_ctx_list, node) {
+ u32 l1 = 0, l2 = 0;
+ int j;
+
+ if (!gpio_dev_state-id == id)
+ continue;
+
+ if ((cpu_is_omap34xx()) (id == 0))
+ continue;
+
+ for (j = 0; j hweight_long(gpio_dev_state-dbck_enable_mask);
+ j++)
+ clk_disable(gpio_dev_state-dbck);
+
+ if (!off_mode)
+ continue;
+
+ /*
+* If going to OFF, remove triggering for all
+* non-wakeup GPIOs. Otherwise spurious IRQs will be
+* generated. See OMAP2420 Errata item 1.101.
+*/
+ if (!enabled_non_wakeup_gpios)
+ continue;
+
+ gpio_dev_state-saved_datain = gpio_read(base, DATAIN);
+ l1 = gpio_read(base, FALLINGDETECT);
+ l2 = gpio_read(base, RISINGDETECT);
+
+ gpio_dev_state-saved_fallingdetect = l1;
+ gpio_dev_state-saved_risingdetect = l2;
+ l1 = ~enabled_non_wakeup_gpios;
+ l2 = ~enabled_non_wakeup_gpios;
+
+ gpio_write(l1, base, FALLINGDETECT);
+ gpio_write(l2, base, RISINGDETECT);
+
+ c++;
+ }
+ if (!c) {
+ workaround_enabled = 0;
+ return;
+ }
+ workaround_enabled = 1;
+}
+
+static void gpio_resume_after_idle(u32 enabled_non_wakeup_gpios, u16 id,
+ void __iomem *base)
+{
+ struct gpio_state *gpio_dev_state;
+
+ list_for_each_entry(gpio_dev_state, omap_gpio_ctx_list, node) {
+ u32 l = 0, gen, gen0, gen1;
+ int j;
+
+ if
[RFC PATCH 13/18] OMAP: GPIO: cleanup save/restore context
Move GPIO save/restore context to SoC specific file.
Signed-off-by: Charulatha V ch...@ti.com
---
arch/arm/mach-omap2/gpio.c | 78 +++
arch/arm/plat-omap/gpio.c | 91 ---
arch/arm/plat-omap/include/plat/gpio.h |2 +
3 files changed, 92 insertions(+), 79 deletions(-)
diff --git a/arch/arm/mach-omap2/gpio.c b/arch/arm/mach-omap2/gpio.c
index a0edaeb..a7bb005 100644
--- a/arch/arm/mach-omap2/gpio.c
+++ b/arch/arm/mach-omap2/gpio.c
@@ -34,6 +34,19 @@
#define OMAP2_GPIO_DEBOUNCE_MAX_VAL0xff
#define OMAP2_GPIO_DEBOUNCE_VAL_DIV0x1f
+struct omap_gpio_regs {
+ u32 irqenable1;
+ u32 irqenable2;
+ u32 wake_en;
+ u32 ctrl;
+ u32 oe;
+ u32 leveldetect0;
+ u32 leveldetect1;
+ u32 risingdetect;
+ u32 fallingdetect;
+ u32 dataout;
+};
+
struct gpio_state {
struct list_head node;
u32 saved_datain;
@@ -42,6 +55,7 @@ struct gpio_state {
u32 dbck_enable_mask;
struct clk *dbck;
u16 id;
+ struct omap_gpio_regs gpio_ctx;
};
static int workaround_enabled;
@@ -345,6 +359,68 @@ static void gpio_resume_after_idle(u32
enabled_non_wakeup_gpios, u16 id,
}
}
+static void gpio_save_ctx(void __iomem *base, u32 id)
+{
+ struct gpio_state *gpio_dev_state;
+
+ if (!cpu_is_omap34xx())
+ return;
+
+ list_for_each_entry(gpio_dev_state, omap_gpio_ctx_list, node) {
+ /* saving banks from 2-6 only since GPIO1 is in WKUP */
+ if ((gpio_dev_state-id == 0) || (gpio_dev_state-id != id))
+ continue;
+
+ gpio_dev_state-gpio_ctx.irqenable1 = gpio_read(base,
+ IRQENABLE1);
+ gpio_dev_state-gpio_ctx.irqenable2 = gpio_read(base,
+ IRQENABLE2);
+ gpio_dev_state-gpio_ctx.wake_en = gpio_read(base, WAKE_EN);
+ gpio_dev_state-gpio_ctx.ctrl = gpio_read(base, CTRL);
+ gpio_dev_state-gpio_ctx.oe = gpio_read(base, OE);
+ gpio_dev_state-gpio_ctx.leveldetect0 = gpio_read(base,
+ LEVELDETECT0);
+ gpio_dev_state-gpio_ctx.leveldetect1 = gpio_read(base,
+ LEVELDETECT1);
+ gpio_dev_state-gpio_ctx.risingdetect = gpio_read(base,
+ RISINGDETECT);
+ gpio_dev_state-gpio_ctx.fallingdetect = gpio_read(base,
+ FALLINGDETECT);
+ gpio_dev_state-gpio_ctx.dataout = gpio_read(base, DATAOUT);
+ }
+}
+
+static void gpio_restore_ctx(void __iomem *base, u32 id)
+{
+ struct gpio_state *gpio_dev_state;
+
+ if (!cpu_is_omap34xx())
+ return;
+
+ list_for_each_entry(gpio_dev_state, omap_gpio_ctx_list, node) {
+ /* restore the required registers of bank 2-6 */
+ if ((gpio_dev_state-id == 0) || (gpio_dev_state-id != id))
+ continue;
+
+ gpio_write(gpio_dev_state-gpio_ctx.irqenable1, base,
+ IRQENABLE1);
+ gpio_write(gpio_dev_state-gpio_ctx.irqenable2, base,
+ IRQENABLE2);
+ gpio_write(gpio_dev_state-gpio_ctx.wake_en, base, WAKE_EN);
+ gpio_write(gpio_dev_state-gpio_ctx.ctrl, base, CTRL);
+ gpio_write(gpio_dev_state-gpio_ctx.oe, base, OE);
+ gpio_write(gpio_dev_state-gpio_ctx.leveldetect0, base,
+ LEVELDETECT0);
+ gpio_write(gpio_dev_state-gpio_ctx.leveldetect1, base,
+ LEVELDETECT1);
+ gpio_write(gpio_dev_state-gpio_ctx.risingdetect, base,
+ RISINGDETECT);
+ gpio_write(gpio_dev_state-gpio_ctx.fallingdetect, base,
+ FALLINGDETECT);
+ gpio_write(gpio_dev_state-gpio_ctx.dataout, base, DATAOUT);
+ }
+}
+
static struct omap_gpio_func gpio_fn = {
.get_index = get_gpio_index,
.gpio_valid = gpio_valid,
@@ -356,6 +432,8 @@ static struct omap_gpio_func gpio_fn = {
.gpio_debounce_set = gpio_debounce_set,
.gpio_idle = gpio_prepare_for_idle,
.gpio_resume_after_idle = gpio_resume_after_idle,
+ .gpio_save_ctx = gpio_save_ctx,
+ .gpio_restore_ctx = gpio_restore_ctx,
};
static int omap2_gpio_dev_init(struct omap_hwmod *oh, void *unused)
diff --git a/arch/arm/plat-omap/gpio.c b/arch/arm/plat-omap/gpio.c
index 55115df..fd710cd 100644
--- a/arch/arm/plat-omap/gpio.c
+++ b/arch/arm/plat-omap/gpio.c
@@ -160,25 +160,7 @@ struct gpio_bank {
int
[RFC PATCH 08/18] OMAP: GPIO: req/free: Remove reg offset macros usage
Remove the usage of register offset macros from
gpio_request/free() APIs.
Instead use the enum omap_gpio_reg_offsets and SoC specific
gpio_read/write functions to access the GPIO registers.
Signed-off-by: Charulatha V ch...@ti.com
---
arch/arm/plat-omap/gpio.c | 65 +---
1 files changed, 19 insertions(+), 46 deletions(-)
diff --git a/arch/arm/plat-omap/gpio.c b/arch/arm/plat-omap/gpio.c
index 115916d..28f58c6 100644
--- a/arch/arm/plat-omap/gpio.c
+++ b/arch/arm/plat-omap/gpio.c
@@ -700,28 +700,17 @@ static int omap_gpio_request(struct gpio_chip *chip,
unsigned offset)
*/
_set_gpio_triggering(bank, offset, IRQ_TYPE_NONE);
-#ifdef CONFIG_ARCH_OMAP15XX
if (bank-method == METHOD_GPIO_1510) {
- void __iomem *reg;
-
/* Claim the pin for MPU */
- reg = bank-base + OMAP1510_GPIO_PIN_CONTROL;
- __raw_writel(__raw_readl(reg) | (1 offset), reg);
+ u32 ctrl = gpio_fn.gpio_read(bank-base, CTRL);
+ gpio_fn.gpio_write(ctrl | (1 offset), bank-base, CTRL);
}
-#endif
- if (!cpu_class_is_omap1()) {
+
+ if (bank-method = METHOD_GPIO_24XX) {
if (!bank-mod_usage) {
- void __iomem *reg = bank-base;
- u32 ctrl;
-
- if (cpu_is_omap24xx() || cpu_is_omap34xx())
- reg += OMAP24XX_GPIO_CTRL;
- else if (cpu_is_omap44xx())
- reg += OMAP4_GPIO_CTRL;
- ctrl = __raw_readl(reg);
+ u32 ctrl = gpio_fn.gpio_read(bank-base, CTRL);
/* Module is enabled, clocks are not gated */
- ctrl = 0xFFFE;
- __raw_writel(ctrl, reg);
+ gpio_fn.gpio_write(ctrl ~0x1, bank-base, CTRL);
}
bank-mod_usage |= 1 offset;
}
@@ -736,43 +725,27 @@ static void omap_gpio_free(struct gpio_chip *chip,
unsigned offset)
unsigned long flags;
spin_lock_irqsave(bank-lock, flags);
-#ifdef CONFIG_ARCH_OMAP16XX
- if (bank-method == METHOD_GPIO_1610) {
- /* Disable wake-up during idle for dynamic tick */
- void __iomem *reg = bank-base + OMAP1610_GPIO_CLEAR_WAKEUPENA;
- __raw_writel(1 offset, reg);
- }
-#endif
-#if defined(CONFIG_ARCH_OMAP2) || defined(CONFIG_ARCH_OMAP3)
- if (bank-method == METHOD_GPIO_24XX) {
+
+ if ((bank-method == METHOD_GPIO_1610) ||
+ (bank-method == METHOD_GPIO_24XX)) {
/* Disable wake-up during idle for dynamic tick */
- void __iomem *reg = bank-base + OMAP24XX_GPIO_CLEARWKUENA;
- __raw_writel(1 offset, reg);
- }
-#endif
-#ifdef CONFIG_ARCH_OMAP4
- if (bank-method == METHOD_GPIO_44XX) {
+ gpio_fn.gpio_write(1 offset, bank-base, CLEARWKUENA);
+ } else if (bank-method == METHOD_GPIO_44XX) {
/* Disable wake-up during idle for dynamic tick */
- void __iomem *reg = bank-base + OMAP4_GPIO_IRQWAKEN0;
- __raw_writel(1 offset, reg);
+ gpio_fn.gpio_write(1 offset, bank-base, IRQWAKEN0);
}
-#endif
- if (!cpu_class_is_omap1()) {
+
+
+ if (bank-method = METHOD_GPIO_24XX) {
bank-mod_usage = ~(1 offset);
+
if (!bank-mod_usage) {
- void __iomem *reg = bank-base;
- u32 ctrl;
-
- if (cpu_is_omap24xx() || cpu_is_omap34xx())
- reg += OMAP24XX_GPIO_CTRL;
- else if (cpu_is_omap44xx())
- reg += OMAP4_GPIO_CTRL;
- ctrl = __raw_readl(reg);
+ u32 ctrl = gpio_fn.gpio_read(bank-base, CTRL);
/* Module is disabled, clocks are gated */
- ctrl |= 1;
- __raw_writel(ctrl, reg);
+ gpio_fn.gpio_write(ctrl | 1, bank-base, CTRL);
}
}
+
_reset_gpio(bank, bank-chip.base + offset);
spin_unlock_irqrestore(bank-lock, flags);
}
--
1.7.1
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[RFC PATCH 09/18] OMAP: GPIO: cleanup gpio_irq_handler
Remove CONFIG_ARCH_OMAP* checks from gpio_irq_handler.
Also correct the multi-line comment style in the
gpio_irq_handler.
Signed-off-by: Charulatha V ch...@ti.com
---
arch/arm/plat-omap/gpio.c | 70 +---
1 files changed, 27 insertions(+), 43 deletions(-)
diff --git a/arch/arm/plat-omap/gpio.c b/arch/arm/plat-omap/gpio.c
index 28f58c6..5fe6dbf 100644
--- a/arch/arm/plat-omap/gpio.c
+++ b/arch/arm/plat-omap/gpio.c
@@ -761,7 +761,7 @@ static void omap_gpio_free(struct gpio_chip *chip, unsigned
offset)
*/
static void gpio_irq_handler(unsigned int irq, struct irq_desc *desc)
{
- void __iomem *isr_reg = NULL;
+ u32 isr_val;
u32 isr;
unsigned int gpio_irq, gpio_index;
struct gpio_bank *bank;
@@ -771,58 +771,41 @@ static void gpio_irq_handler(unsigned int irq, struct
irq_desc *desc)
desc-irq_data.chip-irq_ack(desc-irq_data);
bank = irq_get_handler_data(irq);
-#ifdef CONFIG_ARCH_OMAP1
- if (bank-method == METHOD_MPUIO)
- isr_reg = bank-base +
- OMAP_MPUIO_GPIO_INT / bank-stride;
-#endif
-#ifdef CONFIG_ARCH_OMAP15XX
- if (bank-method == METHOD_GPIO_1510)
- isr_reg = bank-base + OMAP1510_GPIO_INT_STATUS;
-#endif
-#if defined(CONFIG_ARCH_OMAP16XX)
- if (bank-method == METHOD_GPIO_1610)
- isr_reg = bank-base + OMAP1610_GPIO_IRQSTATUS1;
-#endif
-#if defined(CONFIG_ARCH_OMAP730) || defined(CONFIG_ARCH_OMAP850)
- if (bank-method == METHOD_GPIO_7XX)
- isr_reg = bank-base + OMAP7XX_GPIO_INT_STATUS;
-#endif
-#if defined(CONFIG_ARCH_OMAP2) || defined(CONFIG_ARCH_OMAP3)
- if (bank-method == METHOD_GPIO_24XX)
- isr_reg = bank-base + OMAP24XX_GPIO_IRQSTATUS1;
-#endif
-#if defined(CONFIG_ARCH_OMAP4)
- if (bank-method == METHOD_GPIO_44XX)
- isr_reg = bank-base + OMAP4_GPIO_IRQSTATUS0;
-#endif
-
- if (WARN_ON(!isr_reg))
- goto exit;
while(1) {
u32 isr_saved, level_mask = 0;
u32 enabled;
+ if (bank-method == METHOD_MPUIO)
+ isr_val = gpio_mpuio_read(bank-base,
+ OMAP_MPUIO_GPIO_INT / bank-stride);
+ else
+ isr_val = gpio_fn.gpio_read(bank-base, IRQSTATUS_REG0);
+
enabled = _get_gpio_irqbank_mask(bank);
- isr_saved = isr = __raw_readl(isr_reg) enabled;
+ isr = isr_val enabled;
+ isr_saved = isr;
- if (cpu_is_omap15xx() (bank-method == METHOD_MPUIO))
+ /* Common for all MPUIO banks */
+ if (bank-method == METHOD_MPUIO)
isr = 0x;
- if (cpu_class_is_omap2()) {
+ if (bank-method = METHOD_GPIO_24XX)
level_mask = bank-level_mask enabled;
- }
- /* clear edge sensitive interrupts before handler(s) are
- called so that we don't miss any interrupt occurred while
- executing them */
+ /*
+* clear edge sensitive interrupts before handler(s) are
+* called so that we don't miss any interrupt occurred
+* while executing them
+*/
_enable_gpio_irqbank(bank, isr_saved ~level_mask, 0);
_clear_gpio_irqbank(bank, isr_saved ~level_mask);
_enable_gpio_irqbank(bank, isr_saved ~level_mask, 1);
- /* if there is only edge sensitive GPIO pin interrupts
- configured, we could unmask GPIO bank interrupt immediately */
+ /*
+* if there is only edge sensitive GPIO pin interrupts
+* configured, we could unmask GPIO bank interrupt immediately
+*/
if (!level_mask !unmasked) {
unmasked = 1;
desc-irq_data.chip-irq_unmask(desc-irq_data);
@@ -853,11 +836,12 @@ static void gpio_irq_handler(unsigned int irq, struct
irq_desc *desc)
generic_handle_irq(gpio_irq);
}
}
- /* if bank has any level sensitive GPIO pin interrupt
- configured, we must unmask the bank interrupt only after
- handler(s) are executed in order to avoid spurious bank
- interrupt */
-exit:
+ /*
+* if bank has any level sensitive GPIO pin interrupt
+* configured, we must unmask the bank interrupt only after
+* handler(s) are executed in order to avoid spurious bank
+* interrupt
+*/
if (!unmasked)
desc-irq_data.chip-irq_unmask(desc-irq_data);
}
--
1.7.1
--
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[RFC PATCH 00/18] OMAP: GPIO: cleanup GPIO driver
Modifies the OMAP GPIO driver to avoid usage of cpu_is* checks for different OMAP architectures. This is done by moving some architecture specific code to mach-omap* and call them from plat-omap* using function pointers. Also remove the register offset macros from OMAP GPIO driver and handle the same in mach-omap*. Avoid usage of gpio_bank_count and gpio_bank pointer array by means of maintaining a list. Removes the bank-method flag from the GPIO driver. All OMAP1 SoCs has one MPUIO type GPIO bank. OMAP2+ does not have any MPUIO type GPIO bank. Since MPUIO type GPIO bank is the same for all OMAP1 CPUs, they are handled in plat-omap/ itself as there is no common gpio.c file for all cpu types in mach-omap1. They are identified by using bank-stride flag as it is '0' for other than MPUIO type banks. Patch series is based on mainline rc4 following commit: 91e8549bde9e5cc88c5a2e8c8114389279e240b5 Merge branch 'for-linus' of git://git.kernel.dk/linux-2.6-block Compile tested for: - omap1_defconfig - omap2plus_defconfig Boot test (success on the following boards): - OMAP1710-H3 - OMAP2420-H4 - OMAP3430-SDP - OMAP3430-Zoom2 - OMAP3630-Zoom3 - OMAP4430-SDP - OMAP4430-Blaze GPIO module functionality testing (success on the following boards): - OMAP2420-H4 - OMAP3430-SDP - OMAP3430-Zoom2 - OMAP3630-Zoom3 - OMAP4430-SDP - OMAP4430-Blaze PM Testing (success as given below): OMAP3430-SDP: retention, off_mode, system_wide suspend, gpio wakeup OMAP3630-Zoom3: retention, system_wide suspend using the following: echo 5 /sys/devices/platform/omap/omap_uart.0/sleep_timeout echo 5 /sys/devices/platform/omap/omap_uart.1/sleep_timeout echo 5 /sys/devices/platform/omap/omap_uart.2/sleep_timeout echo 5 /sys/devices/platform/omap/omap_uart.3/sleep_timeout echo '5' /debug/pm_debug/wakeup_timer_seconds echo 1 /debug/pm_debug/sleep_while_idle echo 1 /debug/pm_debug/enable_off_mode Charulatha V (18): OMAP1: GPIO: Fix mpuio_init() call OMAP: GPIO: remove get_gpio_bank() OMAP: GPIO: Move gpio_get_index() to mach-omap OMAP: GPIO: Move gpio_valid() to SoC specific files OMAP: GPIO: cleanup datain,dataout,set dir funcs OMAP: GPIO: cleanup set trigger func OMAP: GPIO: cleanup set/get IRQ, clr irqstatus funcs OMAP: GPIO: req/free: Remove reg offset macros usage OMAP: GPIO: cleanup gpio_irq_handler OMAP: GPIO: cleanup set wakeup/suspend/resume funcs OMAP: GPIO: Remove dependency on gpio_bank_count OMAP: GPIO: cleanup set_debounce, idle/resume_after_idle OMAP: GPIO: cleanup save/restore context OMAP: GPIO: Remove CONFIG_ARCH_OMAP16XX/OMAP2+ defines OMAP: GPIO: cleanup gpio_show_rev OMAP: GPIO: move omap_gpio_mod_init to mach-omap OMAP: GPIO: use dev_err* instead of printk OMAP: GPIO: Remove usage of bank method arch/arm/mach-omap1/gpio15xx.c | 110 ++- arch/arm/mach-omap1/gpio16xx.c | 174 +++- arch/arm/mach-omap1/gpio7xx.c | 132 ++- arch/arm/mach-omap2/gpio.c | 476 +- arch/arm/plat-omap/gpio.c | 1770 arch/arm/plat-omap/include/plat/gpio.h | 108 ++- 6 files changed, 1380 insertions(+), 1390 deletions(-) -- To unsubscribe from this list: send the line unsubscribe linux-omap in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
[RFC PATCH 04/18] OMAP: GPIO: Move gpio_valid() to SoC specific files
gpio_valid() implementation is different for different SoCs.
Hence handle them in SoC specific gpio files.
Signed-off-by: Charulatha V ch...@ti.com
---
arch/arm/mach-omap1/gpio15xx.c | 26 -
arch/arm/mach-omap1/gpio16xx.c | 32 ++
arch/arm/mach-omap1/gpio7xx.c | 38 ++--
arch/arm/mach-omap2/gpio.c | 14 +++-
arch/arm/plat-omap/gpio.c | 27 +-
arch/arm/plat-omap/include/plat/gpio.h |1 +
6 files changed, 98 insertions(+), 40 deletions(-)
diff --git a/arch/arm/mach-omap1/gpio15xx.c b/arch/arm/mach-omap1/gpio15xx.c
index eb2727a..9d7a3fa 100644
--- a/arch/arm/mach-omap1/gpio15xx.c
+++ b/arch/arm/mach-omap1/gpio15xx.c
@@ -22,6 +22,10 @@
#define OMAP1510_GPIO_BASE 0xFFFCE000
#define OMAP1510_GPIO_INDEX_MASK 0x0f
+#define OMAP1510_GPIO_WIDTH16
+#define OMAP1510_GPIO_BANK_CNT 2
+#define OMAP1510_NON_MPUIO_GPIO_VALID ((OMAP1510_GPIO_BANK_CNT - 1) *\
+ OMAP1510_GPIO_WIDTH)
/* gpio1 */
static struct __initdata resource omap15xx_mpu_gpio_resources[] = {
@@ -39,7 +43,7 @@ static struct __initdata resource
omap15xx_mpu_gpio_resources[] = {
static struct __initdata omap_gpio_platform_data omap15xx_mpu_gpio_config = {
.virtual_irq_start = IH_MPUIO_BASE,
.bank_type = METHOD_MPUIO,
- .bank_width = 16,
+ .bank_width = OMAP1510_GPIO_WIDTH,
.bank_stride= 1,
};
@@ -69,7 +73,7 @@ static struct __initdata resource omap15xx_gpio_resources[] =
{
static struct __initdata omap_gpio_platform_data omap15xx_gpio_config = {
.virtual_irq_start = IH_GPIO_BASE,
.bank_type = METHOD_GPIO_1510,
- .bank_width = 16,
+ .bank_width = OMAP1510_GPIO_WIDTH,
};
static struct __initdata platform_device omap15xx_gpio = {
@@ -87,8 +91,26 @@ static int get_gpio_index(int gpio)
return gpio OMAP1510_GPIO_INDEX_MASK;
}
+static int gpio_valid(int gpio)
+{
+ if (gpio 0)
+ return -EINVAL;
+
+ if (OMAP_GPIO_IS_MPUIO(gpio)) {
+ if (gpio = OMAP_MAX_GPIO_LINES + OMAP1510_GPIO_WIDTH)
+ return -EINVAL;
+ return 0;
+ }
+
+ if (gpio OMAP1510_NON_MPUIO_GPIO_VALID)
+ return 0;
+
+ return -EINVAL;
+}
+
static struct omap_gpio_func gpio_fn = {
.get_index = get_gpio_index,
+ .gpio_valid = gpio_valid,
};
/*
diff --git a/arch/arm/mach-omap1/gpio16xx.c b/arch/arm/mach-omap1/gpio16xx.c
index 9d8aabc..e6bb080 100644
--- a/arch/arm/mach-omap1/gpio16xx.c
+++ b/arch/arm/mach-omap1/gpio16xx.c
@@ -25,6 +25,10 @@
#define OMAP1_MPUIO_VBASE OMAP1_MPUIO_BASE
#define OMAP1610_GPIO_INDEX_MASK 0x0f
+#define OMAP1610_GPIO_WIDTH16
+#define OMAP1610_GPIO_BANK_CNT 5
+#define OMAP1610_NON_MPUIO_GPIO_VALID ((OMAP1610_GPIO_BANK_CNT - 1) *\
+ OMAP1610_GPIO_WIDTH)
/* mpu gpio */
static struct __initdata resource omap16xx_mpu_gpio_resources[] = {
@@ -42,7 +46,7 @@ static struct __initdata resource
omap16xx_mpu_gpio_resources[] = {
static struct __initdata omap_gpio_platform_data omap16xx_mpu_gpio_config = {
.virtual_irq_start = IH_MPUIO_BASE,
.bank_type = METHOD_MPUIO,
- .bank_width = 16,
+ .bank_width = OMAP1610_GPIO_WIDTH,
.bank_stride= 1,
};
@@ -72,7 +76,7 @@ static struct __initdata resource omap16xx_gpio1_resources[]
= {
static struct __initdata omap_gpio_platform_data omap16xx_gpio1_config = {
.virtual_irq_start = IH_GPIO_BASE,
.bank_type = METHOD_GPIO_1610,
- .bank_width = 16,
+ .bank_width = OMAP1610_GPIO_WIDTH,
};
static struct __initdata platform_device omap16xx_gpio1 = {
@@ -101,7 +105,7 @@ static struct __initdata resource
omap16xx_gpio2_resources[] = {
static struct __initdata omap_gpio_platform_data omap16xx_gpio2_config = {
.virtual_irq_start = IH_GPIO_BASE + 16,
.bank_type = METHOD_GPIO_1610,
- .bank_width = 16,
+ .bank_width = OMAP1610_GPIO_WIDTH,
};
static struct __initdata platform_device omap16xx_gpio2 = {
@@ -130,7 +134,7 @@ static struct __initdata resource
omap16xx_gpio3_resources[] = {
static struct __initdata omap_gpio_platform_data omap16xx_gpio3_config = {
.virtual_irq_start = IH_GPIO_BASE + 32,
.bank_type = METHOD_GPIO_1610,
- .bank_width = 16,
+ .bank_width = OMAP1610_GPIO_WIDTH,
};
static struct __initdata platform_device omap16xx_gpio3 = {
@@ -159,7 +163,7 @@ static struct __initdata resource
Re: [PATCH 1/2] arm: omap: fix bug with multiple smsc911x devices
Hi Igor,
On Thu, Apr 21, 2011 at 5:50 PM, Igor Grinberg grinb...@compulab.co.il wrote:
kobject (c06a4250): tried to init an initialized object, something is
seriously wrong.
introduced by commit 66293989:
(omap: convert boards that use SMSC911x to use gpmc-smsc911x)
fixed by allocating struct platform_device dynamically.
Signed-off-by: Igor Grinberg grinb...@compulab.co.il
---
This has been boot tested with nfs root on cm-t35,
and build tested on all other affected boards.
 arch/arm/mach-omap2/board-cm-t35.c        |   2 ++
 arch/arm/mach-omap2/board-igep0020.c       |   1 +
 arch/arm/mach-omap2/board-ldp.c         |   1 +
 arch/arm/mach-omap2/board-omap3evm.c       |   1 +
 arch/arm/mach-omap2/board-omap3logic.c      |   1 +
 arch/arm/mach-omap2/board-omap3stalker.c     |   1 +
 arch/arm/mach-omap2/board-overo.c        |   2 ++
 arch/arm/mach-omap2/board-zoom-debugboard.c   |   1 +
 arch/arm/mach-omap2/gpmc-smsc911x.c       |  16 +---
 arch/arm/plat-omap/include/plat/gpmc-smsc911x.h |   1 +
 10 files changed, 16 insertions(+), 11 deletions(-)
diff --git a/arch/arm/mach-omap2/board-cm-t35.c
b/arch/arm/mach-omap2/board-cm-t35.c
index b5772c1..7c70f56 100644
--- a/arch/arm/mach-omap2/board-cm-t35.c
+++ b/arch/arm/mach-omap2/board-cm-t35.c
@@ -69,6 +69,7 @@
 #include plat/gpmc-smsc911x.h
 static struct omap_smsc911x_platform_data cm_t35_smsc911x_cfg = {
+    .id       = 0,
    .cs       = CM_T35_SMSC911X_CS,
    .gpio_irq    = CM_T35_SMSC911X_GPIO,
    .gpio_reset   = -EINVAL,
@@ -76,6 +77,7 @@ static struct omap_smsc911x_platform_data
cm_t35_smsc911x_cfg = {
 };
 static struct omap_smsc911x_platform_data sb_t35_smsc911x_cfg = {
+    .id       = 1,
    .cs       = SB_T35_SMSC911X_CS,
    .gpio_irq    = SB_T35_SMSC911X_GPIO,
    .gpio_reset   = -EINVAL,
diff --git a/arch/arm/mach-omap2/board-igep0020.c
b/arch/arm/mach-omap2/board-igep0020.c
index 5b9bde7..2bf12fb 100644
--- a/arch/arm/mach-omap2/board-igep0020.c
+++ b/arch/arm/mach-omap2/board-igep0020.c
@@ -195,6 +195,7 @@ static void __init igep2_flash_init(void) {}
 #include plat/gpmc-smsc911x.h
 static struct omap_smsc911x_platform_data smsc911x_cfg = {
+    .id       = -1,
    .cs       = IGEP2_SMSC911X_CS,
    .gpio_irq    = IGEP2_SMSC911X_GPIO,
    .gpio_reset   = -EINVAL,
diff --git a/arch/arm/mach-omap2/board-ldp.c b/arch/arm/mach-omap2/board-ldp.c
index ea9f049..94cfd82 100644
--- a/arch/arm/mach-omap2/board-ldp.c
+++ b/arch/arm/mach-omap2/board-ldp.c
@@ -218,6 +218,7 @@ static struct spi_board_info ldp_spi_board_info[]
__initdata = {
 };
 static struct omap_smsc911x_platform_data smsc911x_cfg = {
+    .id       = -1,
I believe you can keep the id field uninitialized, i.e. 0. This
applies to other boards with single smsc device as well.
    .cs       = LDP_SMSC911X_CS,
    .gpio_irq    = LDP_SMSC911X_GPIO,
    .gpio_reset   = -EINVAL,
diff --git a/arch/arm/mach-omap2/board-omap3evm.c
b/arch/arm/mach-omap2/board-omap3evm.c
index 3fc85c6..fc5c1d8 100644
--- a/arch/arm/mach-omap2/board-omap3evm.c
+++ b/arch/arm/mach-omap2/board-omap3evm.c
@@ -104,6 +104,7 @@ static void __init omap3_evm_get_revision(void)
 #include plat/gpmc-smsc911x.h
 static struct omap_smsc911x_platform_data smsc911x_cfg = {
+    .id       = -1,
    .cs       = OMAP3EVM_SMSC911X_CS,
    .gpio_irq    = OMAP3EVM_ETHR_GPIO_IRQ,
    .gpio_reset   = -EINVAL,
diff --git a/arch/arm/mach-omap2/board-omap3logic.c
b/arch/arm/mach-omap2/board-omap3logic.c
index a49e6cf..06248e7 100644
--- a/arch/arm/mach-omap2/board-omap3logic.c
+++ b/arch/arm/mach-omap2/board-omap3logic.c
@@ -144,6 +144,7 @@ static void __init board_mmc_init(void)
 }
 static struct omap_smsc911x_platform_data __initdata board_smsc911x_data = {
+    .id       = -1,
    .cs       = OMAP3LOGIC_SMSC911X_CS,
    .gpio_irq    = -EINVAL,
    .gpio_reset   = -EINVAL,
diff --git a/arch/arm/mach-omap2/board-omap3stalker.c
b/arch/arm/mach-omap2/board-omap3stalker.c
index 848016c..ae4eaf5 100644
--- a/arch/arm/mach-omap2/board-omap3stalker.c
+++ b/arch/arm/mach-omap2/board-omap3stalker.c
@@ -64,6 +64,7 @@
 #define OMAP3STALKER_SMC911X_CS     5
 static struct omap_smsc911x_platform_data smsc911x_cfg = {
+    .id       = -1,
    .cs       = OMAP3STALKER_SMC911X_CS,
    .gpio_irq    = OMAP3STALKER_ETHR_GPIO_IRQ,
    .gpio_reset   = -EINVAL,
diff --git a/arch/arm/mach-omap2/board-overo.c
b/arch/arm/mach-omap2/board-overo.c
index 4016166..165e1fa 100644
--- a/arch/arm/mach-omap2/board-overo.c
+++ b/arch/arm/mach-omap2/board-overo.c
@@ -149,6 +149,7 @@ static inline void __init overo_ads7846_init(void) {
return; }
 #include
Re: [PATCH] ARM: Fix relocation if image end past uncompressed kernel end
On Thu, 21 Apr 2011, Tony Lindgren wrote: * Nicolas Pitre nicolas.pi...@linaro.org [110421 20:20]: I found the bugger. The problem was a bad stack alignment. .. as this patch won't solve the n900 booting problem with zImage. With LZMA I'm still also getting LZMA data is corrupt. Hmmm.. Is it possible you have bad RAM? In compressed/head.S, locate this code: #ifdef CONFIG_AUTO_ZRELADDR @ determine final kernel image address mov r4, pc and r4, r4, #0xf800 add r4, r4, #TEXT_OFFSET #else ldr r4, =zreladdr #endif Right after that, simply override r4 with a physical address towards the end of the RAM, say 8MB before end of RAM (unless your decompressed kernel is larger than that). That won't make a booting system, but at least you will be able to test the decompressor when loaded at various locations in memory without involving the relocation loop. Nicolas -- To unsubscribe from this list: send the line unsubscribe linux-omap in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
Re: [RFC PATCH 03/18] OMAP: GPIO: Move gpio_get_index() to mach-omap
Charulatha V ch...@ti.com writes:
gpio_get_index() uses cpu_is* checks. Move this function from
plat-omap/gpio.c to SoC specific GPIO files in mach-omap*/ and
use pdata to pass the function pointer.
Signed-off-by: Charulatha V ch...@ti.com
This one isn't really needed. The index should be calculated by using
the bank width.
Below is a patch doing the same thing but using bitops and avoiding the
need for pdata function pointers.
Kevin
From 070938fc5f3d001a6c669bca4eac8114aafbe0b2 Mon Sep 17 00:00:00 2001
From: Kevin Hilman khil...@ti.com
Date: Fri, 22 Apr 2011 07:59:07 -0700
Subject: [PATCH] OMAP: GPIO: replace get_gpio_index() by using bank width
The get_gpio_index() function, littered with cpu_is_* checks can be easily
replaced by using bitops based on the GPIO bank width. Do so.
Signed-off-by: Kevin Hilman khil...@ti.com
---
arch/arm/plat-omap/gpio.c | 42 +-
1 files changed, 17 insertions(+), 25 deletions(-)
diff --git a/arch/arm/plat-omap/gpio.c b/arch/arm/plat-omap/gpio.c
index 57530c0..3211477 100644
--- a/arch/arm/plat-omap/gpio.c
+++ b/arch/arm/plat-omap/gpio.c
@@ -102,6 +102,9 @@ static struct gpio_bank *gpio_bank;
/* TODO: Analyze removing gpio_bank_count usage from driver code */
int gpio_bank_count;
+#define GPIO_INDEX(bank, gpio) (gpio % (bank-width - 1))
+#define GPIO_BIT(bank, gpio) (1 GPIO_INDEX(bank, gpio))
+
static inline struct gpio_bank *get_gpio_bank(int gpio)
{
if (cpu_is_omap15xx()) {
@@ -127,17 +130,6 @@ static inline struct gpio_bank *get_gpio_bank(int gpio)
return NULL;
}
-static inline int get_gpio_index(int gpio)
-{
- if (cpu_is_omap7xx())
- return gpio 0x1f;
- if (cpu_is_omap24xx())
- return gpio 0x1f;
- if (cpu_is_omap34xx() || cpu_is_omap44xx())
- return gpio 0x1f;
- return gpio 0x0f;
-}
-
static inline int gpio_valid(int gpio)
{
if (gpio 0)
@@ -219,7 +211,7 @@ static int _get_gpio_datain(struct gpio_bank *bank, int
gpio)
return -EINVAL;
return (__raw_readl(bank-base + bank-datain_reg)
-(1 get_gpio_index(gpio))) != 0;
+GPIO_BIT(bank, gpio)) != 0;
}
static int _get_gpio_dataout(struct gpio_bank *bank, int gpio)
@@ -231,7 +223,7 @@ static int _get_gpio_dataout(struct gpio_bank *bank, int
gpio)
reg = bank-base + bank-dataout_reg;
- return (__raw_readl(reg) (1 get_gpio_index(gpio))) != 0;
+ return (__raw_readl(reg) GPIO_BIT(bank, gpio)) != 0;
}
#define MOD_REG_BIT(reg, bit_mask, set)\
@@ -268,7 +260,7 @@ static void _set_gpio_debounce(struct gpio_bank *bank,
unsigned gpio,
else
debounce = (debounce / 0x1f) - 1;
- l = 1 get_gpio_index(gpio);
+ l = GPIO_BIT(bank, gpio);
if (bank-method == METHOD_GPIO_44XX)
reg += OMAP4_GPIO_DEBOUNCINGTIME;
@@ -520,7 +512,7 @@ static int gpio_irq_type(struct irq_data *d, unsigned type)
bank = irq_data_get_irq_chip_data(d);
spin_lock_irqsave(bank-lock, flags);
- retval = _set_gpio_triggering(bank, get_gpio_index(gpio), type);
+ retval = _set_gpio_triggering(bank, GPIO_INDEX(bank, gpio), type);
spin_unlock_irqrestore(bank-lock, flags);
if (type (IRQ_TYPE_LEVEL_LOW | IRQ_TYPE_LEVEL_HIGH))
@@ -550,7 +542,7 @@ static void _clear_gpio_irqbank(struct gpio_bank *bank, int
gpio_mask)
static inline void _clear_gpio_irqstatus(struct gpio_bank *bank, int gpio)
{
- _clear_gpio_irqbank(bank, 1 get_gpio_index(gpio));
+ _clear_gpio_irqbank(bank, GPIO_BIT(bank, gpio));
}
static u32 _get_gpio_irqbank_mask(struct gpio_bank *bank)
@@ -610,7 +602,7 @@ static void _disable_gpio_irqbank(struct gpio_bank *bank,
int gpio_mask)
static inline void _set_gpio_irqenable(struct gpio_bank *bank, int gpio, int
enable)
{
- _enable_gpio_irqbank(bank, 1 get_gpio_index(gpio));
+ _enable_gpio_irqbank(bank, GPIO_BIT(bank, gpio));
}
/*
@@ -663,10 +655,10 @@ static int _set_gpio_wakeup(struct gpio_bank *bank, int
gpio, int enable)
static void _reset_gpio(struct gpio_bank *bank, int gpio)
{
- _set_gpio_direction(bank, get_gpio_index(gpio), 1);
+ _set_gpio_direction(bank, GPIO_INDEX(bank, gpio), 1);
_set_gpio_irqenable(bank, gpio, 0);
_clear_gpio_irqstatus(bank, gpio);
- _set_gpio_triggering(bank, get_gpio_index(gpio), IRQ_TYPE_NONE);
+ _set_gpio_triggering(bank, GPIO_INDEX(bank, gpio), IRQ_TYPE_NONE);
}
/* Use disable_irq_wake() and enable_irq_wake() functions from drivers */
@@ -679,7 +671,7 @@ static int gpio_wake_enable(struct irq_data *d, unsigned
int enable)
if (check_gpio(gpio) 0)
return -ENODEV;
bank = irq_data_get_irq_chip_data(d);
- retval = _set_gpio_wakeup(bank, get_gpio_index(gpio), enable);
+ retval = _set_gpio_wakeup(bank, GPIO_INDEX(bank, gpio),
Re: [RFC PATCH 04/18] OMAP: GPIO: Move gpio_valid() to SoC specific files
Charulatha V ch...@ti.com writes:
gpio_valid() implementation is different for different SoCs.
Hence handle them in SoC specific gpio files.
Signed-off-by: Charulatha V ch...@ti.com
This one is only moving the mess into SoC-specific code.
Looking closer at the gpio_valid() (and check_gpio()) calls, they are
actually pointless. These functions are only called in a few places,
and where they are called, the GPIO has already been converted from an
IRQ or masked, so these functions will never fail.
Kevin
---
arch/arm/mach-omap1/gpio15xx.c | 26 -
arch/arm/mach-omap1/gpio16xx.c | 32 ++
arch/arm/mach-omap1/gpio7xx.c | 38
++--
arch/arm/mach-omap2/gpio.c | 14 +++-
arch/arm/plat-omap/gpio.c | 27 +-
arch/arm/plat-omap/include/plat/gpio.h |1 +
6 files changed, 98 insertions(+), 40 deletions(-)
diff --git a/arch/arm/mach-omap1/gpio15xx.c b/arch/arm/mach-omap1/gpio15xx.c
index eb2727a..9d7a3fa 100644
--- a/arch/arm/mach-omap1/gpio15xx.c
+++ b/arch/arm/mach-omap1/gpio15xx.c
@@ -22,6 +22,10 @@
#define OMAP1510_GPIO_BASE 0xFFFCE000
#define OMAP1510_GPIO_INDEX_MASK 0x0f
+#define OMAP1510_GPIO_WIDTH 16
+#define OMAP1510_GPIO_BANK_CNT 2
+#define OMAP1510_NON_MPUIO_GPIO_VALID((OMAP1510_GPIO_BANK_CNT - 1) *\
+ OMAP1510_GPIO_WIDTH)
/* gpio1 */
static struct __initdata resource omap15xx_mpu_gpio_resources[] = {
@@ -39,7 +43,7 @@ static struct __initdata resource
omap15xx_mpu_gpio_resources[] = {
static struct __initdata omap_gpio_platform_data omap15xx_mpu_gpio_config = {
.virtual_irq_start = IH_MPUIO_BASE,
.bank_type = METHOD_MPUIO,
- .bank_width = 16,
+ .bank_width = OMAP1510_GPIO_WIDTH,
.bank_stride= 1,
};
@@ -69,7 +73,7 @@ static struct __initdata resource omap15xx_gpio_resources[]
= {
static struct __initdata omap_gpio_platform_data omap15xx_gpio_config = {
.virtual_irq_start = IH_GPIO_BASE,
.bank_type = METHOD_GPIO_1510,
- .bank_width = 16,
+ .bank_width = OMAP1510_GPIO_WIDTH,
};
static struct __initdata platform_device omap15xx_gpio = {
@@ -87,8 +91,26 @@ static int get_gpio_index(int gpio)
return gpio OMAP1510_GPIO_INDEX_MASK;
}
+static int gpio_valid(int gpio)
+{
+ if (gpio 0)
+ return -EINVAL;
+
+ if (OMAP_GPIO_IS_MPUIO(gpio)) {
+ if (gpio = OMAP_MAX_GPIO_LINES + OMAP1510_GPIO_WIDTH)
+ return -EINVAL;
+ return 0;
+ }
+
+ if (gpio OMAP1510_NON_MPUIO_GPIO_VALID)
+ return 0;
+
+ return -EINVAL;
+}
+
static struct omap_gpio_func gpio_fn = {
.get_index = get_gpio_index,
+ .gpio_valid = gpio_valid,
};
/*
diff --git a/arch/arm/mach-omap1/gpio16xx.c b/arch/arm/mach-omap1/gpio16xx.c
index 9d8aabc..e6bb080 100644
--- a/arch/arm/mach-omap1/gpio16xx.c
+++ b/arch/arm/mach-omap1/gpio16xx.c
@@ -25,6 +25,10 @@
#define OMAP1_MPUIO_VBASEOMAP1_MPUIO_BASE
#define OMAP1610_GPIO_INDEX_MASK 0x0f
+#define OMAP1610_GPIO_WIDTH 16
+#define OMAP1610_GPIO_BANK_CNT 5
+#define OMAP1610_NON_MPUIO_GPIO_VALID((OMAP1610_GPIO_BANK_CNT - 1) *\
+ OMAP1610_GPIO_WIDTH)
/* mpu gpio */
static struct __initdata resource omap16xx_mpu_gpio_resources[] = {
@@ -42,7 +46,7 @@ static struct __initdata resource
omap16xx_mpu_gpio_resources[] = {
static struct __initdata omap_gpio_platform_data omap16xx_mpu_gpio_config = {
.virtual_irq_start = IH_MPUIO_BASE,
.bank_type = METHOD_MPUIO,
- .bank_width = 16,
+ .bank_width = OMAP1610_GPIO_WIDTH,
.bank_stride= 1,
};
@@ -72,7 +76,7 @@ static struct __initdata resource
omap16xx_gpio1_resources[] = {
static struct __initdata omap_gpio_platform_data omap16xx_gpio1_config = {
.virtual_irq_start = IH_GPIO_BASE,
.bank_type = METHOD_GPIO_1610,
- .bank_width = 16,
+ .bank_width = OMAP1610_GPIO_WIDTH,
};
static struct __initdata platform_device omap16xx_gpio1 = {
@@ -101,7 +105,7 @@ static struct __initdata resource
omap16xx_gpio2_resources[] = {
static struct __initdata omap_gpio_platform_data omap16xx_gpio2_config = {
.virtual_irq_start = IH_GPIO_BASE + 16,
.bank_type = METHOD_GPIO_1610,
- .bank_width = 16,
+ .bank_width = OMAP1610_GPIO_WIDTH,
};
static struct __initdata platform_device omap16xx_gpio2 = {
@@ -130,7 +134,7 @@ static struct __initdata resource
Re: [RFC PATCH 05/18] OMAP: GPIO: cleanup datain,dataout,set dir funcs
Charulatha V ch...@ti.com writes: * Define gpio register offsets in SoC specific GPIO files and use these register offsets while doing register read/write * Remove the usage of CONFIG_ARCH_* checks and cpu_is* checks from the below functions _set_gpio_direction _set_gpio_dataout _get_gpio_dataout _get_gpio_datain * MPUIO is a common gpio bank-method for OMAP15xx, OMAP16xx and OMAP7xx SoCs. Each of these SoCs has one bank with MPUIO type. Hence handle MPUIO type GPIO banks in GPIO driver. Note: After the complete driver is cleaned up, the register offset macros defined in OMAP GPIO driver would be removed Signed-off-by: Charulatha V ch...@ti.com IMO, this isn't quite the direction we want to go for this cleanup. Register offsets should indeed be in SoC specific files, but rather than the driver calling pdata function pointers for the functions, the register offsets should instead be passed into the driver so the driver can have common functions. Also, MPUIO doesn't need to be treated as a special case. From the GPIO driver perspective, it's just another GPIO bank. On some SoCs, it happens to have a different width and stride, but the drive should handle that. I've also started on a GPIO cleanup (currently posted to linux-omap only) and I've taken a different approach. After I finish reviewing your series, I'll have some more ideas on how we might combine our efforts here. Kevin -- To unsubscribe from this list: send the line unsubscribe linux-omap in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
Re: [RFC PATCH 11/18] OMAP: GPIO: Remove dependency on gpio_bank_count
Charulatha V ch...@ti.com writes:
gpio_bank_count is the count of number of GPIO devices
in a SoC. Remove this dependency from the driver. Also remove
the dependency on array of pointers to gpio_bank struct of
all GPIO devices.
The cpu_is*() checks used in omap2_gpio_prepare_for_idle() and
omap2_gpio_resume_after_idle() would be removed in one of the
patches in this series
Signed-off-by: Charulatha V ch...@ti.com
---
arch/arm/mach-omap1/gpio15xx.c |1 -
arch/arm/mach-omap1/gpio16xx.c |2 -
arch/arm/mach-omap1/gpio7xx.c |2 -
arch/arm/mach-omap2/gpio.c |1 +
arch/arm/plat-omap/gpio.c | 165
arch/arm/plat-omap/include/plat/gpio.h |3 -
6 files changed, 83 insertions(+), 91 deletions(-)
diff --git a/arch/arm/mach-omap1/gpio15xx.c b/arch/arm/mach-omap1/gpio15xx.c
index 7a7a123..3763db3 100644
--- a/arch/arm/mach-omap1/gpio15xx.c
+++ b/arch/arm/mach-omap1/gpio15xx.c
@@ -189,7 +189,6 @@ static int __init omap15xx_gpio_init(void)
omap15xx_mpu_gpio_config.gpio_fn = gpio_fn;
platform_device_register(omap15xx_gpio);
- gpio_bank_count = 2;
return 0;
}
postcore_initcall(omap15xx_gpio_init);
diff --git a/arch/arm/mach-omap1/gpio16xx.c b/arch/arm/mach-omap1/gpio16xx.c
index f05e0c7..6a99b01 100644
--- a/arch/arm/mach-omap1/gpio16xx.c
+++ b/arch/arm/mach-omap1/gpio16xx.c
@@ -316,8 +316,6 @@ static int __init omap16xx_gpio_init(void)
platform_device_register(omap16xx_gpio_dev[i]);
}
- gpio_bank_count = ARRAY_SIZE(omap16xx_gpio_dev);
-
return 0;
}
postcore_initcall(omap16xx_gpio_init);
diff --git a/arch/arm/mach-omap1/gpio7xx.c b/arch/arm/mach-omap1/gpio7xx.c
index 1103efc..cd6bad7 100644
--- a/arch/arm/mach-omap1/gpio7xx.c
+++ b/arch/arm/mach-omap1/gpio7xx.c
@@ -355,8 +355,6 @@ static int __init omap7xx_gpio_init(void)
platform_device_register(omap7xx_gpio_dev[i]);
}
- gpio_bank_count = ARRAY_SIZE(omap7xx_gpio_dev);
-
return 0;
}
postcore_initcall(omap7xx_gpio_init);
diff --git a/arch/arm/mach-omap2/gpio.c b/arch/arm/mach-omap2/gpio.c
index 25fe8a4..a46f4a5 100644
--- a/arch/arm/mach-omap2/gpio.c
+++ b/arch/arm/mach-omap2/gpio.c
@@ -28,6 +28,7 @@
#define OMAP2_GPIO_INDEX_MASK0x1f
#define OMAP2_GPIO_IRQENA_MASK 0x
+int gpio_bank_count;
Why is this needed here?
int bank_width;
static u16 *reg_map;
static u16 omap2_gpio_reg_offsets[] = {
[...]
void omap2_gpio_prepare_for_idle(int off_mode)
{
- int i, c = 0;
- int min = 0;
-
- if (cpu_is_omap34xx())
- min = 1;
+ int c = 0;
+ struct gpio_bank *bank;
- for (i = min; i gpio_bank_count; i++) {
- struct gpio_bank *bank = gpio_bank[i];
+ list_for_each_entry(bank, omap_gpio_list, node) {
Note that on 34xx, this isn't an equivalent functional change, since
the for loop starts a 1 and the list traversal covers all banks.
I think your powerdomain 'can lose context' patch is needed before this
one.
Kevin
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Re: [RFC PATCH 00/18] OMAP: GPIO: cleanup GPIO driver
Hi Charu, Charulatha V ch...@ti.com writes: Modifies the OMAP GPIO driver to avoid usage of cpu_is* checks for different OMAP architectures. This is done by moving some architecture specific code to mach-omap* and call them from plat-omap* using function pointers. Also remove the register offset macros from OMAP GPIO driver and handle the same in mach-omap*. Thanks for working on this cleanup, this driver really needs a cleanup. You've hit on all the main areas for cleanup, but unfortunately, it's not really going in the direction I was hoping. Rather than moving code into the SoC specific parts, I was hoping to generalize the driver such that SoC-specific code would just pass in register offsets/options into the common driver. Your current approach isn't really reducing code, it's just moving it around. I had started on a similar cleanup as well, and will post that series shortly to demonstrate the direction I think the cleanups should be going. I've tackled most of the same functions/areas that you have (except the IRQ triggering stuff), but have a rather different approach. I'll get to the IRQ triggering stuff next (after going on vacation for a week), but feel free to build on top of my series if you like. The direction I'd like to go is towards having a generalized driver that can not only work across all OMAP SoCs, but also hopefully towards something that can be shared with other SoCs as well. Of course, the first step is cleaning up the OMAP driver, but the next step will be looking for other areas of consolidation. Towards that end, I'm also working towards converting the GPIO IRQs in this driver to use the new generic IRQ chip infrastructure posted by Thomas Gleixner. In my series, you'll see that I started that for the MPUIO IRQs, but the GPIO IRQs will come next. Kevin -- To unsubscribe from this list: send the line unsubscribe linux-omap in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
[PATCH 00/15] OMAP: GPIO: clean up: pass register offsets via pdata
Begin cleanup and consolidation of OMAP GPIO driver by starting the removal of SoC specifics (ifdefs, cpu_is-* checks, etc.) The primary method for this is by passing register offsets for common functionality via platform_data, so the driver can be generic. This series currently handles the GPIO direction, data in/out, IRQ status and IRQ enable/disable functions, but does not yet handle the IRQ triggering and suspend/resume handling. That will be coming next. I'll not be working on this for the next week, so anyone who wants to build on this is more than welcome. This work in progress is available in my wip/gpio-cleanup branch. This series applies on top of v2.6.39-rc4 plus the generic irq_chip series from Thomas Gleixner since in addition to the cleanups, I started moving the GPIO IRQ handling over to use generic irq_chip (last patch in series.) Yes, there is much about OMAP GPIOs that is common to GPIO handling on other SoCs. However, before we can consolidate with other SoCs, the first step is to consolidate to a single, clean driver for all OMAPs. After that, we can start looking at consolidation with other SoCs. Charulatha V (1): OMAP: GPIO: remove get_gpio_bank() Kevin Hilman (14): OMAP: GPIO: _clear_gpio_irqbank: fix flushing of posted write OMAP: GPIO: remove MPUIO handling from _clear_gpio_irqbank() OMAP: GPIO: move bank width into struct gpio_bank OMAP: GPIO: _get_gpio_irqbank_mask: replace hard-coded mask with bank-width OMAP: GPIO: replace get_gpio_index() by using bank width OMAP: GPIO: move register offset defines into gpio.h OMAP: GPIO: consolidate direction, input, output, remove #ifdefs OMAP: GPIO: consolidate IRQ status handling, remove #ifdefs OMAP: GPIO: conslidate enable/disable of GPIO IRQs, remove ifdefs OMAP: GPIO: convert MPUIO IRQ over to generic irq_chip OMAP: GPIO: remove useless gpio_valid() check_gpio() checks OMAP: GPIO: cleanup _set_gpio_wakeup(), remove ifdefs OMAP: GPIO: debounce remove SoC specific registers, use pdata OMAP: GPIO: cleanup show revision, remove cpu_is checks, display only once arch/arm/mach-omap1/gpio15xx.c | 22 + arch/arm/mach-omap1/gpio16xx.c | 28 ++ arch/arm/mach-omap1/gpio7xx.c | 27 + arch/arm/mach-omap2/gpio.c | 32 ++ arch/arm/plat-omap/gpio.c | 825 ++-- arch/arm/plat-omap/include/plat/gpio.h | 123 + 6 files changed, 384 insertions(+), 673 deletions(-) -- 1.7.4 -- To unsubscribe from this list: send the line unsubscribe linux-omap in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
[PATCH 01/15] OMAP: GPIO: _clear_gpio_irqbank: fix flushing of posted write
In commit 78a1a6d3411de1a8b0dc1cb92754b5f12f251912 (ARM: OMAP4: Update
the GPIO support) braces were mistakenly added to included the
register read-back inside the cpu_is_* checking.
Remove the braces, ensuring that a register read-back is done, even
when the IRQSTATUS2 register is not written.
Note that the register read-back might be IRQSTATUS1 or IRQSTATUS2
depending on the CPU, but a read-back of any register in that region
will cause a flush of the posted writes.
Signed-off-by: Kevin Hilman khil...@ti.com
---
arch/arm/plat-omap/gpio.c |3 +--
1 files changed, 1 insertions(+), 2 deletions(-)
diff --git a/arch/arm/plat-omap/gpio.c b/arch/arm/plat-omap/gpio.c
index d2adcdd..fe6971a 100644
--- a/arch/arm/plat-omap/gpio.c
+++ b/arch/arm/plat-omap/gpio.c
@@ -813,12 +813,11 @@ static void _clear_gpio_irqbank(struct gpio_bank *bank,
int gpio_mask)
else if (cpu_is_omap44xx())
reg = bank-base + OMAP4_GPIO_IRQSTATUS1;
- if (cpu_is_omap24xx() || cpu_is_omap34xx() || cpu_is_omap44xx()) {
+ if (cpu_is_omap24xx() || cpu_is_omap34xx() || cpu_is_omap44xx())
__raw_writel(gpio_mask, reg);
/* Flush posted write for the irq status to avoid spurious interrupts */
__raw_readl(reg);
- }
}
static inline void _clear_gpio_irqstatus(struct gpio_bank *bank, int gpio)
--
1.7.4
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[PATCH 02/15] OMAP: GPIO: remove MPUIO handling from _clear_gpio_irqbank()
Remove the OMAP1 #ifdef and MPUIO special case for _clear_gpio_irqbank()
The MPUIOs do not need a register access to ack/clear the IRQ status,
since reading the IRQ status clears it. In addition, the MPUIO
irq_chip has an empty ack method, so _clear_gpio_irqbank() is never
used for MPUIOs.
Signed-off-by: Kevin Hilman khil...@ti.com
---
arch/arm/plat-omap/gpio.c |6 --
1 files changed, 0 insertions(+), 6 deletions(-)
diff --git a/arch/arm/plat-omap/gpio.c b/arch/arm/plat-omap/gpio.c
index fe6971a..8b5ca6e 100644
--- a/arch/arm/plat-omap/gpio.c
+++ b/arch/arm/plat-omap/gpio.c
@@ -770,12 +770,6 @@ static void _clear_gpio_irqbank(struct gpio_bank *bank,
int gpio_mask)
void __iomem *reg = bank-base;
switch (bank-method) {
-#ifdef CONFIG_ARCH_OMAP1
- case METHOD_MPUIO:
- /* MPUIO irqstatus is reset by reading the status register,
-* so do nothing here */
- return;
-#endif
#ifdef CONFIG_ARCH_OMAP15XX
case METHOD_GPIO_1510:
reg += OMAP1510_GPIO_INT_STATUS;
--
1.7.4
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[PATCH 05/15] OMAP: GPIO: replace get_gpio_index() by using bank width
The get_gpio_index() function, littered with cpu_is_* checks can be easily
replaced by using bitops based on the GPIO bank width. Do so.
Signed-off-by: Kevin Hilman khil...@ti.com
---
arch/arm/plat-omap/gpio.c | 42 +-
1 files changed, 17 insertions(+), 25 deletions(-)
diff --git a/arch/arm/plat-omap/gpio.c b/arch/arm/plat-omap/gpio.c
index 6e51a20..98f1304 100644
--- a/arch/arm/plat-omap/gpio.c
+++ b/arch/arm/plat-omap/gpio.c
@@ -188,6 +188,9 @@ static struct gpio_bank *gpio_bank;
/* TODO: Analyze removing gpio_bank_count usage from driver code */
int gpio_bank_count;
+#define GPIO_INDEX(bank, gpio) (gpio % bank-width)
+#define GPIO_BIT(bank, gpio) (1 GPIO_INDEX(bank, gpio))
+
static inline struct gpio_bank *get_gpio_bank(int gpio)
{
if (cpu_is_omap15xx()) {
@@ -213,17 +216,6 @@ static inline struct gpio_bank *get_gpio_bank(int gpio)
return NULL;
}
-static inline int get_gpio_index(int gpio)
-{
- if (cpu_is_omap7xx())
- return gpio 0x1f;
- if (cpu_is_omap24xx())
- return gpio 0x1f;
- if (cpu_is_omap34xx() || cpu_is_omap44xx())
- return gpio 0x1f;
- return gpio 0x0f;
-}
-
static inline int gpio_valid(int gpio)
{
if (gpio 0)
@@ -418,7 +410,7 @@ static int _get_gpio_datain(struct gpio_bank *bank, int
gpio)
return -EINVAL;
}
return (__raw_readl(reg)
-(1 get_gpio_index(gpio))) != 0;
+(GPIO_BIT(bank, gpio))) != 0;
}
static int _get_gpio_dataout(struct gpio_bank *bank, int gpio)
@@ -464,7 +456,7 @@ static int _get_gpio_dataout(struct gpio_bank *bank, int
gpio)
return -EINVAL;
}
- return (__raw_readl(reg) (1 get_gpio_index(gpio))) != 0;
+ return (__raw_readl(reg) GPIO_BIT(bank, gpio)) != 0;
}
#define MOD_REG_BIT(reg, bit_mask, set)\
@@ -501,7 +493,7 @@ static void _set_gpio_debounce(struct gpio_bank *bank,
unsigned gpio,
else
debounce = (debounce / 0x1f) - 1;
- l = 1 get_gpio_index(gpio);
+ l = GPIO_BIT(bank, gpio);
if (bank-method == METHOD_GPIO_44XX)
reg += OMAP4_GPIO_DEBOUNCINGTIME;
@@ -753,7 +745,7 @@ static int gpio_irq_type(struct irq_data *d, unsigned type)
bank = irq_data_get_irq_chip_data(d);
spin_lock_irqsave(bank-lock, flags);
- retval = _set_gpio_triggering(bank, get_gpio_index(gpio), type);
+ retval = _set_gpio_triggering(bank, GPIO_INDEX(bank, gpio), type);
spin_unlock_irqrestore(bank-lock, flags);
if (type (IRQ_TYPE_LEVEL_LOW | IRQ_TYPE_LEVEL_HIGH))
@@ -815,7 +807,7 @@ static void _clear_gpio_irqbank(struct gpio_bank *bank, int
gpio_mask)
static inline void _clear_gpio_irqstatus(struct gpio_bank *bank, int gpio)
{
- _clear_gpio_irqbank(bank, 1 get_gpio_index(gpio));
+ _clear_gpio_irqbank(bank, GPIO_BIT(bank, gpio));
}
static u32 _get_gpio_irqbank_mask(struct gpio_bank *bank)
@@ -943,7 +935,7 @@ static void _enable_gpio_irqbank(struct gpio_bank *bank,
int gpio_mask, int enab
static inline void _set_gpio_irqenable(struct gpio_bank *bank, int gpio, int
enable)
{
- _enable_gpio_irqbank(bank, 1 get_gpio_index(gpio), enable);
+ _enable_gpio_irqbank(bank, GPIO_BIT(bank, gpio), enable);
}
/*
@@ -996,10 +988,10 @@ static int _set_gpio_wakeup(struct gpio_bank *bank, int
gpio, int enable)
static void _reset_gpio(struct gpio_bank *bank, int gpio)
{
- _set_gpio_direction(bank, get_gpio_index(gpio), 1);
+ _set_gpio_direction(bank, GPIO_INDEX(bank, gpio), 1);
_set_gpio_irqenable(bank, gpio, 0);
_clear_gpio_irqstatus(bank, gpio);
- _set_gpio_triggering(bank, get_gpio_index(gpio), IRQ_TYPE_NONE);
+ _set_gpio_triggering(bank, GPIO_INDEX(bank, gpio), IRQ_TYPE_NONE);
}
/* Use disable_irq_wake() and enable_irq_wake() functions from drivers */
@@ -1012,7 +1004,7 @@ static int gpio_wake_enable(struct irq_data *d, unsigned
int enable)
if (check_gpio(gpio) 0)
return -ENODEV;
bank = irq_data_get_irq_chip_data(d);
- retval = _set_gpio_wakeup(bank, get_gpio_index(gpio), enable);
+ retval = _set_gpio_wakeup(bank, GPIO_INDEX(bank, gpio), enable);
return retval;
}
@@ -1191,7 +1183,7 @@ static void gpio_irq_handler(unsigned int irq, struct
irq_desc *desc)
gpio_irq = bank-virtual_irq_start;
for (; isr != 0; isr = 1, gpio_irq++) {
- gpio_index = get_gpio_index(irq_to_gpio(gpio_irq));
+ gpio_index = GPIO_INDEX(bank, irq_to_gpio(gpio_irq));
if (!(isr 1))
continue;
@@ -1242,18 +1234,18 @@ static void gpio_mask_irq(struct irq_data *d)
struct gpio_bank *bank = irq_data_get_irq_chip_data(d);
_set_gpio_irqenable(bank, gpio, 0);
-
[PATCH 06/15] OMAP: GPIO: remove get_gpio_bank()
From: Charulatha V ch...@ti.com
use chip info to get the pointer to the struct gpio_bank for a
given GPIO bank and remove get_gpio_bank().
Signed-off-by: Charulatha V ch...@ti.com
---
arch/arm/plat-omap/gpio.c | 29 ++---
1 files changed, 2 insertions(+), 27 deletions(-)
diff --git a/arch/arm/plat-omap/gpio.c b/arch/arm/plat-omap/gpio.c
index 98f1304..bc5f968 100644
--- a/arch/arm/plat-omap/gpio.c
+++ b/arch/arm/plat-omap/gpio.c
@@ -191,31 +191,6 @@ int gpio_bank_count;
#define GPIO_INDEX(bank, gpio) (gpio % bank-width)
#define GPIO_BIT(bank, gpio) (1 GPIO_INDEX(bank, gpio))
-static inline struct gpio_bank *get_gpio_bank(int gpio)
-{
- if (cpu_is_omap15xx()) {
- if (OMAP_GPIO_IS_MPUIO(gpio))
- return gpio_bank[0];
- return gpio_bank[1];
- }
- if (cpu_is_omap16xx()) {
- if (OMAP_GPIO_IS_MPUIO(gpio))
- return gpio_bank[0];
- return gpio_bank[1 + (gpio 4)];
- }
- if (cpu_is_omap7xx()) {
- if (OMAP_GPIO_IS_MPUIO(gpio))
- return gpio_bank[0];
- return gpio_bank[1 + (gpio 5)];
- }
- if (cpu_is_omap24xx())
- return gpio_bank[gpio 5];
- if (cpu_is_omap34xx() || cpu_is_omap44xx())
- return gpio_bank[gpio 5];
- BUG();
- return NULL;
-}
-
static inline int gpio_valid(int gpio)
{
if (gpio 0)
@@ -1371,7 +1346,7 @@ static struct platform_device omap_mpuio_device = {
static inline void mpuio_init(void)
{
- struct gpio_bank *bank = get_gpio_bank(OMAP_MPUIO(0));
+ struct gpio_bank *bank = gpio_bank[0];
platform_set_drvdata(omap_mpuio_device, bank);
if (platform_driver_register(omap_mpuio_driver) == 0)
@@ -1447,7 +1422,7 @@ static int gpio_get(struct gpio_chip *chip, unsigned
offset)
u32 mask;
gpio = chip-base + offset;
- bank = get_gpio_bank(gpio);
+ bank = container_of(chip, struct gpio_bank, chip);
reg = bank-base;
mask = GPIO_BIT(bank, gpio);
--
1.7.4
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[PATCH 03/15] OMAP: GPIO: move bank width into struct gpio_bank
Rather than having a file-global bank_width variable, move it into
struct gpio_bank so it can be bank-specific. Note the bank width
is already passed per-bank via platform_data, so current code would
be incorrect if any banks had different width.
Signed-off-by: Kevin Hilman khil...@ti.com
---
arch/arm/plat-omap/gpio.c | 13 ++---
1 files changed, 6 insertions(+), 7 deletions(-)
diff --git a/arch/arm/plat-omap/gpio.c b/arch/arm/plat-omap/gpio.c
index 8b5ca6e..443fb9a 100644
--- a/arch/arm/plat-omap/gpio.c
+++ b/arch/arm/plat-omap/gpio.c
@@ -159,6 +159,7 @@ struct gpio_bank {
struct device *dev;
bool dbck_flag;
int stride;
+ u32 width;
};
#ifdef CONFIG_ARCH_OMAP3
@@ -184,8 +185,6 @@ static struct omap3_gpio_regs
gpio_context[OMAP34XX_NR_GPIOS];
*/
static struct gpio_bank *gpio_bank;
-static int bank_width;
-
/* TODO: Analyze removing gpio_bank_count usage from driver code */
int gpio_bank_count;
@@ -983,7 +982,7 @@ static int _set_gpio_wakeup(struct gpio_bank *bank, int
gpio, int enable)
if (bank-non_wakeup_gpios (1 gpio)) {
printk(KERN_ERR Unable to modify wakeup on
non-wakeup GPIO%d\n,
- (bank - gpio_bank) * 32 + gpio);
+ (bank - gpio_bank) * bank-width + gpio);
return -EINVAL;
}
spin_lock_irqsave(bank-lock, flags);
@@ -1650,14 +1649,14 @@ static void __init omap_gpio_chip_init(struct gpio_bank
*bank)
} else {
bank-chip.label = gpio;
bank-chip.base = gpio;
- gpio += bank_width;
+ gpio += bank-width;
}
- bank-chip.ngpio = bank_width;
+ bank-chip.ngpio = bank-width;
gpiochip_add(bank-chip);
for (j = bank-virtual_irq_start;
-j bank-virtual_irq_start + bank_width; j++) {
+j bank-virtual_irq_start + bank-width; j++) {
irq_set_lockdep_class(j, gpio_lock_class);
irq_set_chip_data(j, bank);
if (bank_is_mpuio(bank))
@@ -1707,7 +1706,7 @@ static int __devinit omap_gpio_probe(struct
platform_device *pdev)
bank-dev = pdev-dev;
bank-dbck_flag = pdata-dbck_flag;
bank-stride = pdata-bank_stride;
- bank_width = pdata-bank_width;
+ bank-width = pdata-bank_width;
spin_lock_init(bank-lock);
--
1.7.4
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[PATCH 04/15] OMAP: GPIO: _get_gpio_irqbank_mask: replace hard-coded mask with bank-width
Replace hard-coded mask values with bank-width which is already coming
from platform_data.
Signed-off-by: Kevin Hilman khil...@ti.com
---
arch/arm/plat-omap/gpio.c |8 +---
1 files changed, 1 insertions(+), 7 deletions(-)
diff --git a/arch/arm/plat-omap/gpio.c b/arch/arm/plat-omap/gpio.c
index 443fb9a..6e51a20 100644
--- a/arch/arm/plat-omap/gpio.c
+++ b/arch/arm/plat-omap/gpio.c
@@ -823,46 +823,40 @@ static u32 _get_gpio_irqbank_mask(struct gpio_bank *bank)
void __iomem *reg = bank-base;
int inv = 0;
u32 l;
- u32 mask;
+ u32 mask = (1 bank-width) - 1;
switch (bank-method) {
#ifdef CONFIG_ARCH_OMAP1
case METHOD_MPUIO:
reg += OMAP_MPUIO_GPIO_MASKIT / bank-stride;
- mask = 0x;
inv = 1;
break;
#endif
#ifdef CONFIG_ARCH_OMAP15XX
case METHOD_GPIO_1510:
reg += OMAP1510_GPIO_INT_MASK;
- mask = 0x;
inv = 1;
break;
#endif
#ifdef CONFIG_ARCH_OMAP16XX
case METHOD_GPIO_1610:
reg += OMAP1610_GPIO_IRQENABLE1;
- mask = 0x;
break;
#endif
#if defined(CONFIG_ARCH_OMAP730) || defined(CONFIG_ARCH_OMAP850)
case METHOD_GPIO_7XX:
reg += OMAP7XX_GPIO_INT_MASK;
- mask = 0x;
inv = 1;
break;
#endif
#if defined(CONFIG_ARCH_OMAP2) || defined(CONFIG_ARCH_OMAP3)
case METHOD_GPIO_24XX:
reg += OMAP24XX_GPIO_IRQENABLE1;
- mask = 0x;
break;
#endif
#if defined(CONFIG_ARCH_OMAP4)
case METHOD_GPIO_44XX:
reg += OMAP4_GPIO_IRQSTATUSSET0;
- mask = 0x;
break;
#endif
default:
--
1.7.4
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[PATCH 09/15] OMAP: GPIO: consolidate IRQ status handling, remove #ifdefs
Cleanup IRQ status handling by by passing IRQ status register offsets
via platform data.
Cleans up clearing of GPIO IRQ status and GPIO ISR handler.
Signed-off-by: Kevin Hilman khil...@ti.com
---
arch/arm/mach-omap1/gpio15xx.c |2 +
arch/arm/mach-omap1/gpio16xx.c |2 +
arch/arm/mach-omap1/gpio7xx.c |2 +
arch/arm/mach-omap2/gpio.c |4 ++
arch/arm/plat-omap/gpio.c | 66 ++-
arch/arm/plat-omap/include/plat/gpio.h |2 +
6 files changed, 17 insertions(+), 61 deletions(-)
diff --git a/arch/arm/mach-omap1/gpio15xx.c b/arch/arm/mach-omap1/gpio15xx.c
index a622d56..487a087 100644
--- a/arch/arm/mach-omap1/gpio15xx.c
+++ b/arch/arm/mach-omap1/gpio15xx.c
@@ -38,6 +38,7 @@ static struct omap_gpio_reg_offs omap15xx_mpuio_regs = {
.direction = OMAP_MPUIO_IO_CNTL,
.datain = OMAP_MPUIO_INPUT_LATCH,
.dataout= OMAP_MPUIO_OUTPUT,
+ .irqstatus = OMAP_MPUIO_GPIO_INT,
};
static struct __initdata omap_gpio_platform_data omap15xx_mpu_gpio_config = {
@@ -75,6 +76,7 @@ static struct omap_gpio_reg_offs omap15xx_gpio_regs = {
.direction = OMAP1510_GPIO_DIR_CONTROL,
.datain = OMAP1510_GPIO_DATA_INPUT,
.dataout= OMAP1510_GPIO_DATA_OUTPUT,
+ .irqstatus = OMAP1510_GPIO_INT_STATUS,
};
static struct __initdata omap_gpio_platform_data omap15xx_gpio_config = {
diff --git a/arch/arm/mach-omap1/gpio16xx.c b/arch/arm/mach-omap1/gpio16xx.c
index 4ff6ff3..3e52b7f 100644
--- a/arch/arm/mach-omap1/gpio16xx.c
+++ b/arch/arm/mach-omap1/gpio16xx.c
@@ -41,6 +41,7 @@ static struct omap_gpio_reg_offs omap16xx_mpuio_regs = {
.direction = OMAP_MPUIO_IO_CNTL,
.datain = OMAP_MPUIO_INPUT_LATCH,
.dataout= OMAP_MPUIO_OUTPUT,
+ .irqstatus = OMAP_MPUIO_GPIO_INT,
};
static struct __initdata omap_gpio_platform_data omap16xx_mpu_gpio_config = {
@@ -80,6 +81,7 @@ static struct omap_gpio_reg_offs omap16xx_gpio_regs = {
.clr_dataout= OMAP1610_GPIO_CLEAR_DATAOUT,
.datain = OMAP1610_GPIO_DATAIN,
.dataout= OMAP1610_GPIO_DATAOUT,
+ .irqstatus = OMAP1610_GPIO_IRQSTATUS1,
};
static struct __initdata omap_gpio_platform_data omap16xx_gpio1_config = {
diff --git a/arch/arm/mach-omap1/gpio7xx.c b/arch/arm/mach-omap1/gpio7xx.c
index efe4dcc..35e8b31 100644
--- a/arch/arm/mach-omap1/gpio7xx.c
+++ b/arch/arm/mach-omap1/gpio7xx.c
@@ -43,6 +43,7 @@ static struct omap_gpio_reg_offs omap7xx_mpuio_regs = {
.direction = OMAP_MPUIO_IO_CNTL / 2,
.datain = OMAP_MPUIO_INPUT_LATCH / 2,
.dataout= OMAP_MPUIO_OUTPUT / 2,
+ .irqstatus = OMAP_MPUIO_GPIO_INT / 2,
};
static struct __initdata omap_gpio_platform_data omap7xx_mpu_gpio_config = {
@@ -80,6 +81,7 @@ static struct omap_gpio_reg_offs omap7xx_gpio_regs = {
.direction = OMAP7XX_GPIO_DIR_CONTROL,
.datain = OMAP7XX_GPIO_DATA_INPUT,
.dataout= OMAP7XX_GPIO_DATA_OUTPUT,
+ .irqstatus = OMAP7XX_GPIO_INT_STATUS,
};
static struct __initdata omap_gpio_platform_data omap7xx_gpio1_config = {
diff --git a/arch/arm/mach-omap2/gpio.c b/arch/arm/mach-omap2/gpio.c
index 357e069..7c5e67d 100644
--- a/arch/arm/mach-omap2/gpio.c
+++ b/arch/arm/mach-omap2/gpio.c
@@ -76,6 +76,8 @@ static int omap2_gpio_dev_init(struct omap_hwmod *oh, void
*unused)
pdata-regs-dataout = OMAP24XX_GPIO_DATAOUT;
pdata-regs-set_dataout = OMAP24XX_GPIO_SETDATAOUT;
pdata-regs-clr_dataout = OMAP24XX_GPIO_CLEARDATAOUT;
+ pdata-regs-irqstatus = OMAP24XX_GPIO_IRQSTATUS1;
+ pdata-regs-irqstatus2 = OMAP24XX_GPIO_IRQSTATUS2;
break;
case 2:
pdata-bank_type = METHOD_GPIO_44XX;
@@ -84,6 +86,8 @@ static int omap2_gpio_dev_init(struct omap_hwmod *oh, void
*unused)
pdata-regs-dataout = OMAP4_GPIO_DATAOUT;
pdata-regs-set_dataout = OMAP4_GPIO_SETDATAOUT;
pdata-regs-clr_dataout = OMAP4_GPIO_CLEARDATAOUT;
+ pdata-regs-irqstatus = OMAP4_GPIO_IRQSTATUS0;
+ pdata-regs-irqstatus2 = OMAP4_GPIO_IRQSTATUS1;
break;
default:
WARN(1, Invalid gpio bank_type\n);
diff --git a/arch/arm/plat-omap/gpio.c b/arch/arm/plat-omap/gpio.c
index cb7f366..4f875cf 100644
--- a/arch/arm/plat-omap/gpio.c
+++ b/arch/arm/plat-omap/gpio.c
@@ -491,46 +491,14 @@ static void _clear_gpio_irqbank(struct gpio_bank *bank,
int gpio_mask)
{
void __iomem *reg = bank-base;
- switch (bank-method) {
-#ifdef CONFIG_ARCH_OMAP15XX
- case METHOD_GPIO_1510:
- reg += OMAP1510_GPIO_INT_STATUS;
- break;
-#endif
-#ifdef CONFIG_ARCH_OMAP16XX
- case METHOD_GPIO_1610:
- reg += OMAP1610_GPIO_IRQSTATUS1;
-
[PATCH 07/15] OMAP: GPIO: move register offset defines into gpio.h
Register offset defines are moved to plat/gpio.h so they can be used
by SoC-specific device init code to fill out platform_data register offsets.
Signed-off-by: Kevin Hilman khil...@ti.com
---
arch/arm/plat-omap/gpio.c | 103
arch/arm/plat-omap/include/plat/gpio.h | 103
2 files changed, 103 insertions(+), 103 deletions(-)
diff --git a/arch/arm/plat-omap/gpio.c b/arch/arm/plat-omap/gpio.c
index bc5f968..01e9b8b 100644
--- a/arch/arm/plat-omap/gpio.c
+++ b/arch/arm/plat-omap/gpio.c
@@ -30,109 +30,6 @@
#include mach/gpio.h
#include asm/mach/irq.h
-/*
- * OMAP1510 GPIO registers
- */
-#define OMAP1510_GPIO_DATA_INPUT 0x00
-#define OMAP1510_GPIO_DATA_OUTPUT 0x04
-#define OMAP1510_GPIO_DIR_CONTROL 0x08
-#define OMAP1510_GPIO_INT_CONTROL 0x0c
-#define OMAP1510_GPIO_INT_MASK 0x10
-#define OMAP1510_GPIO_INT_STATUS 0x14
-#define OMAP1510_GPIO_PIN_CONTROL 0x18
-
-#define OMAP1510_IH_GPIO_BASE 64
-
-/*
- * OMAP1610 specific GPIO registers
- */
-#define OMAP1610_GPIO_REVISION 0x
-#define OMAP1610_GPIO_SYSCONFIG0x0010
-#define OMAP1610_GPIO_SYSSTATUS0x0014
-#define OMAP1610_GPIO_IRQSTATUS1 0x0018
-#define OMAP1610_GPIO_IRQENABLE1 0x001c
-#define OMAP1610_GPIO_WAKEUPENABLE 0x0028
-#define OMAP1610_GPIO_DATAIN 0x002c
-#define OMAP1610_GPIO_DATAOUT 0x0030
-#define OMAP1610_GPIO_DIRECTION0x0034
-#define OMAP1610_GPIO_EDGE_CTRL1 0x0038
-#define OMAP1610_GPIO_EDGE_CTRL2 0x003c
-#define OMAP1610_GPIO_CLEAR_IRQENABLE1 0x009c
-#define OMAP1610_GPIO_CLEAR_WAKEUPENA 0x00a8
-#define OMAP1610_GPIO_CLEAR_DATAOUT0x00b0
-#define OMAP1610_GPIO_SET_IRQENABLE1 0x00dc
-#define OMAP1610_GPIO_SET_WAKEUPENA0x00e8
-#define OMAP1610_GPIO_SET_DATAOUT 0x00f0
-
-/*
- * OMAP7XX specific GPIO registers
- */
-#define OMAP7XX_GPIO_DATA_INPUT0x00
-#define OMAP7XX_GPIO_DATA_OUTPUT 0x04
-#define OMAP7XX_GPIO_DIR_CONTROL 0x08
-#define OMAP7XX_GPIO_INT_CONTROL 0x0c
-#define OMAP7XX_GPIO_INT_MASK 0x10
-#define OMAP7XX_GPIO_INT_STATUS0x14
-
-/*
- * omap2+ specific GPIO registers
- */
-#define OMAP24XX_GPIO_REVISION 0x
-#define OMAP24XX_GPIO_IRQSTATUS1 0x0018
-#define OMAP24XX_GPIO_IRQSTATUS2 0x0028
-#define OMAP24XX_GPIO_IRQENABLE2 0x002c
-#define OMAP24XX_GPIO_IRQENABLE1 0x001c
-#define OMAP24XX_GPIO_WAKE_EN 0x0020
-#define OMAP24XX_GPIO_CTRL 0x0030
-#define OMAP24XX_GPIO_OE 0x0034
-#define OMAP24XX_GPIO_DATAIN 0x0038
-#define OMAP24XX_GPIO_DATAOUT 0x003c
-#define OMAP24XX_GPIO_LEVELDETECT0 0x0040
-#define OMAP24XX_GPIO_LEVELDETECT1 0x0044
-#define OMAP24XX_GPIO_RISINGDETECT 0x0048
-#define OMAP24XX_GPIO_FALLINGDETECT0x004c
-#define OMAP24XX_GPIO_DEBOUNCE_EN 0x0050
-#define OMAP24XX_GPIO_DEBOUNCE_VAL 0x0054
-#define OMAP24XX_GPIO_CLEARIRQENABLE1 0x0060
-#define OMAP24XX_GPIO_SETIRQENABLE10x0064
-#define OMAP24XX_GPIO_CLEARWKUENA 0x0080
-#define OMAP24XX_GPIO_SETWKUENA0x0084
-#define OMAP24XX_GPIO_CLEARDATAOUT 0x0090
-#define OMAP24XX_GPIO_SETDATAOUT 0x0094
-
-#define OMAP4_GPIO_REVISION0x
-#define OMAP4_GPIO_EOI 0x0020
-#define OMAP4_GPIO_IRQSTATUSRAW0 0x0024
-#define OMAP4_GPIO_IRQSTATUSRAW1 0x0028
-#define OMAP4_GPIO_IRQSTATUS0 0x002c
-#define OMAP4_GPIO_IRQSTATUS1 0x0030
-#define OMAP4_GPIO_IRQSTATUSSET0 0x0034
-#define OMAP4_GPIO_IRQSTATUSSET1 0x0038
-#define OMAP4_GPIO_IRQSTATUSCLR0 0x003c
-#define OMAP4_GPIO_IRQSTATUSCLR1 0x0040
-#define OMAP4_GPIO_IRQWAKEN0 0x0044
-#define OMAP4_GPIO_IRQWAKEN1 0x0048
-#define OMAP4_GPIO_IRQENABLE1 0x011c
-#define OMAP4_GPIO_WAKE_EN 0x0120
-#define OMAP4_GPIO_IRQSTATUS2 0x0128
-#define OMAP4_GPIO_IRQENABLE2 0x012c
-#define OMAP4_GPIO_CTRL0x0130
-#define OMAP4_GPIO_OE 0x0134
-#define OMAP4_GPIO_DATAIN 0x0138
-#define OMAP4_GPIO_DATAOUT 0x013c
-#define OMAP4_GPIO_LEVELDETECT00x0140
-#define OMAP4_GPIO_LEVELDETECT10x0144
-#define OMAP4_GPIO_RISINGDETECT0x0148
-#define OMAP4_GPIO_FALLINGDETECT 0x014c
-#define OMAP4_GPIO_DEBOUNCENABLE 0x0150
-#define OMAP4_GPIO_DEBOUNCINGTIME 0x0154
-#define OMAP4_GPIO_CLEARIRQENABLE1 0x0160
-#define OMAP4_GPIO_SETIRQENABLE1 0x0164
-#define OMAP4_GPIO_CLEARWKUENA 0x0180
-#define OMAP4_GPIO_SETWKUENA 0x0184
-#define OMAP4_GPIO_CLEARDATAOUT0x0190
-#define OMAP4_GPIO_SETDATAOUT 0x0194
-
struct gpio_bank {
unsigned long pbase;
void __iomem *base;
diff --git
[PATCH 10/15] OMAP: GPIO: conslidate enable/disable of GPIO IRQs, remove ifdefs
Cleanup GPIO IRQ enable/disable handling by removing SoC-specific
Also split enable/disable IRQ into separate functions for better
readability and also facilitate potentially moving to generic irq_chip
in the future.
Signed-off-by: Kevin Hilman khil...@ti.com
---
arch/arm/mach-omap1/gpio15xx.c |4 +
arch/arm/mach-omap1/gpio16xx.c |5 +
arch/arm/mach-omap1/gpio7xx.c |4 +
arch/arm/mach-omap2/gpio.c |6 ++
arch/arm/plat-omap/gpio.c | 129
arch/arm/plat-omap/include/plat/gpio.h |5 +
6 files changed, 54 insertions(+), 99 deletions(-)
diff --git a/arch/arm/mach-omap1/gpio15xx.c b/arch/arm/mach-omap1/gpio15xx.c
index 487a087..9175624 100644
--- a/arch/arm/mach-omap1/gpio15xx.c
+++ b/arch/arm/mach-omap1/gpio15xx.c
@@ -39,6 +39,8 @@ static struct omap_gpio_reg_offs omap15xx_mpuio_regs = {
.datain = OMAP_MPUIO_INPUT_LATCH,
.dataout= OMAP_MPUIO_OUTPUT,
.irqstatus = OMAP_MPUIO_GPIO_INT,
+ .irqenable = OMAP_MPUIO_GPIO_MASKIT,
+ .irqenable_inv = true,
};
static struct __initdata omap_gpio_platform_data omap15xx_mpu_gpio_config = {
@@ -77,6 +79,8 @@ static struct omap_gpio_reg_offs omap15xx_gpio_regs = {
.datain = OMAP1510_GPIO_DATA_INPUT,
.dataout= OMAP1510_GPIO_DATA_OUTPUT,
.irqstatus = OMAP1510_GPIO_INT_STATUS,
+ .irqenable = OMAP1510_GPIO_INT_MASK,
+ .irqenable_inv = true,
};
static struct __initdata omap_gpio_platform_data omap15xx_gpio_config = {
diff --git a/arch/arm/mach-omap1/gpio16xx.c b/arch/arm/mach-omap1/gpio16xx.c
index 3e52b7f..a6d4a71 100644
--- a/arch/arm/mach-omap1/gpio16xx.c
+++ b/arch/arm/mach-omap1/gpio16xx.c
@@ -42,6 +42,8 @@ static struct omap_gpio_reg_offs omap16xx_mpuio_regs = {
.datain = OMAP_MPUIO_INPUT_LATCH,
.dataout= OMAP_MPUIO_OUTPUT,
.irqstatus = OMAP_MPUIO_GPIO_INT,
+ .irqenable = OMAP_MPUIO_GPIO_MASKIT,
+ .irqenable_inv = true,
};
static struct __initdata omap_gpio_platform_data omap16xx_mpu_gpio_config = {
@@ -82,6 +84,9 @@ static struct omap_gpio_reg_offs omap16xx_gpio_regs = {
.datain = OMAP1610_GPIO_DATAIN,
.dataout= OMAP1610_GPIO_DATAOUT,
.irqstatus = OMAP1610_GPIO_IRQSTATUS1,
+ .irqenable = OMAP1610_GPIO_IRQENABLE1,
+ .set_irqenable = OMAP1610_GPIO_SET_IRQENABLE1,
+ .clr_irqenable = OMAP1610_GPIO_CLEAR_IRQENABLE1,
};
static struct __initdata omap_gpio_platform_data omap16xx_gpio1_config = {
diff --git a/arch/arm/mach-omap1/gpio7xx.c b/arch/arm/mach-omap1/gpio7xx.c
index 35e8b31..880f3cb 100644
--- a/arch/arm/mach-omap1/gpio7xx.c
+++ b/arch/arm/mach-omap1/gpio7xx.c
@@ -44,6 +44,8 @@ static struct omap_gpio_reg_offs omap7xx_mpuio_regs = {
.datain = OMAP_MPUIO_INPUT_LATCH / 2,
.dataout= OMAP_MPUIO_OUTPUT / 2,
.irqstatus = OMAP_MPUIO_GPIO_INT / 2,
+ .irqenable = OMAP_MPUIO_GPIO_MASKIT / 2,
+ .irqenable_inv = true,
};
static struct __initdata omap_gpio_platform_data omap7xx_mpu_gpio_config = {
@@ -82,6 +84,8 @@ static struct omap_gpio_reg_offs omap7xx_gpio_regs = {
.datain = OMAP7XX_GPIO_DATA_INPUT,
.dataout= OMAP7XX_GPIO_DATA_OUTPUT,
.irqstatus = OMAP7XX_GPIO_INT_STATUS,
+ .irqenable = OMAP7XX_GPIO_INT_MASK,
+ .irqenable = true,
};
static struct __initdata omap_gpio_platform_data omap7xx_gpio1_config = {
diff --git a/arch/arm/mach-omap2/gpio.c b/arch/arm/mach-omap2/gpio.c
index 7c5e67d..cc26677 100644
--- a/arch/arm/mach-omap2/gpio.c
+++ b/arch/arm/mach-omap2/gpio.c
@@ -78,6 +78,9 @@ static int omap2_gpio_dev_init(struct omap_hwmod *oh, void
*unused)
pdata-regs-clr_dataout = OMAP24XX_GPIO_CLEARDATAOUT;
pdata-regs-irqstatus = OMAP24XX_GPIO_IRQSTATUS1;
pdata-regs-irqstatus2 = OMAP24XX_GPIO_IRQSTATUS2;
+ pdata-regs-irqenable = OMAP24XX_GPIO_IRQENABLE1;
+ pdata-regs-set_irqenable = OMAP24XX_GPIO_SETIRQENABLE1;
+ pdata-regs-clr_irqenable = OMAP24XX_GPIO_CLEARIRQENABLE1;
break;
case 2:
pdata-bank_type = METHOD_GPIO_44XX;
@@ -88,6 +91,9 @@ static int omap2_gpio_dev_init(struct omap_hwmod *oh, void
*unused)
pdata-regs-clr_dataout = OMAP4_GPIO_CLEARDATAOUT;
pdata-regs-irqstatus = OMAP4_GPIO_IRQSTATUS0;
pdata-regs-irqstatus2 = OMAP4_GPIO_IRQSTATUS1;
+ pdata-regs-irqenable = OMAP4_GPIO_IRQSTATUSSET0;
+ pdata-regs-set_irqenable = OMAP4_GPIO_IRQSTATUSSET0;
+ pdata-regs-clr_irqenable = OMAP4_GPIO_IRQSTATUSCLR0;
break;
default:
WARN(1, Invalid gpio bank_type\n);
diff --git a/arch/arm/plat-omap/gpio.c b/arch/arm/plat-omap/gpio.c
[PATCH 11/15] OMAP: GPIO: convert MPUIO IRQ over to generic irq_chip
Signed-off-by: Kevin Hilman khil...@ti.com
---
arch/arm/plat-omap/gpio.c | 74 ++--
1 files changed, 30 insertions(+), 44 deletions(-)
diff --git a/arch/arm/plat-omap/gpio.c b/arch/arm/plat-omap/gpio.c
index 17833c8..1b674fd 100644
--- a/arch/arm/plat-omap/gpio.c
+++ b/arch/arm/plat-omap/gpio.c
@@ -877,45 +877,8 @@ static struct irq_chip gpio_irq_chip = {
#ifdef CONFIG_ARCH_OMAP1
-/* MPUIO uses the always-on 32k clock */
-
-static void mpuio_ack_irq(struct irq_data *d)
-{
- /* The ISR is reset automatically, so do nothing here. */
-}
-
-static void mpuio_mask_irq(struct irq_data *d)
-{
- unsigned int gpio = OMAP_MPUIO(d-irq - IH_MPUIO_BASE);
- struct gpio_bank *bank = irq_data_get_irq_chip_data(d);
-
- _set_gpio_irqenable(bank, gpio, 0);
-}
-
-static void mpuio_unmask_irq(struct irq_data *d)
-{
- unsigned int gpio = OMAP_MPUIO(d-irq - IH_MPUIO_BASE);
- struct gpio_bank *bank = irq_data_get_irq_chip_data(d);
-
- _set_gpio_irqenable(bank, gpio, 1);
-}
-
-static struct irq_chip mpuio_irq_chip = {
- .name = MPUIO,
- .irq_ack= mpuio_ack_irq,
- .irq_mask = mpuio_mask_irq,
- .irq_unmask = mpuio_unmask_irq,
- .irq_set_type = gpio_irq_type,
-#ifdef CONFIG_ARCH_OMAP16XX
- /* REVISIT: assuming only 16xx supports MPUIO wake events */
- .irq_set_wake = gpio_wake_enable,
-#endif
-};
-
-
#define bank_is_mpuio(bank)((bank)-method == METHOD_MPUIO)
-
#ifdef CONFIG_ARCH_OMAP16XX
#include linux/platform_device.h
@@ -990,8 +953,6 @@ static inline void mpuio_init(void) {}
#else
-extern struct irq_chip mpuio_irq_chip;
-
#define bank_is_mpuio(bank)0
static inline void mpuio_init(void) {}
@@ -1191,6 +1152,30 @@ static void omap_gpio_mod_init(struct gpio_bank *bank,
int id)
}
}
+static __init void
+omap_mpuio_alloc_gc(struct gpio_bank *bank, unsigned int irq_start,
+ unsigned int num)
+{
+ struct irq_chip_generic *gc;
+ struct irq_chip_type *ct;
+
+ gc = irq_alloc_generic_chip(MPUIO, 1, irq_start, bank-base,
+ handle_simple_irq);
+ ct = gc-chip_types;
+
+ /* NOTE: No ack required, reading IRQ status clears it. */
+ ct-chip.irq_mask = irq_gc_mask_set_bit;
+ ct-chip.irq_unmask = irq_gc_mask_clr_bit;
+ ct-chip.irq_set_type = gpio_irq_type;
+ /* REVISIT: assuming only 16xx supports MPUIO wake events */
+ if (cpu_is_omap16xx())
+ ct-chip.irq_set_wake = gpio_wake_enable,
+
+ ct-regs.mask = OMAP_MPUIO_GPIO_INT / bank-stride;
+ irq_setup_generic_chip(gc, IRQ_MSK(num),
+ IRQ_NOREQUEST | IRQ_NOPROBE, 0);
+}
+
static void __init omap_gpio_chip_init(struct gpio_bank *bank)
{
int j;
@@ -1228,12 +1213,13 @@ static void __init omap_gpio_chip_init(struct gpio_bank
*bank)
j bank-virtual_irq_start + bank-width; j++) {
irq_set_lockdep_class(j, gpio_lock_class);
irq_set_chip_data(j, bank);
- if (bank_is_mpuio(bank))
- irq_set_chip(j, mpuio_irq_chip);
- else
+ if (bank_is_mpuio(bank)) {
+ omap_mpuio_alloc_gc(bank-base, j, bank-width);
+ } else {
irq_set_chip(j, gpio_irq_chip);
- irq_set_handler(j, handle_simple_irq);
- set_irq_flags(j, IRQF_VALID);
+ irq_set_handler(j, handle_simple_irq);
+ set_irq_flags(j, IRQF_VALID);
+ }
}
irq_set_chained_handler(bank-irq, gpio_irq_handler);
irq_set_handler_data(bank-irq, bank);
--
1.7.4
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[PATCH 12/15] OMAP: GPIO: remove useless gpio_valid() check_gpio() checks
These functions are useless. They are only called in a few places,
and where they are called, the GPIO has already been converted from an
IRQ or masked, so these functions will never fail.
Signed-off-by: Kevin Hilman khil...@ti.com
---
arch/arm/plat-omap/gpio.c | 45 -
1 files changed, 0 insertions(+), 45 deletions(-)
diff --git a/arch/arm/plat-omap/gpio.c b/arch/arm/plat-omap/gpio.c
index 1b674fd..a025b7a 100644
--- a/arch/arm/plat-omap/gpio.c
+++ b/arch/arm/plat-omap/gpio.c
@@ -92,40 +92,6 @@ int gpio_bank_count;
#define GPIO_INDEX(bank, gpio) (gpio % bank-width)
#define GPIO_BIT(bank, gpio) (1 GPIO_INDEX(bank, gpio))
-static inline int gpio_valid(int gpio)
-{
- if (gpio 0)
- return -1;
- if (cpu_class_is_omap1() OMAP_GPIO_IS_MPUIO(gpio)) {
- if (gpio = OMAP_MAX_GPIO_LINES + 16)
- return -1;
- return 0;
- }
- if (cpu_is_omap15xx() gpio 16)
- return 0;
- if ((cpu_is_omap16xx()) gpio 64)
- return 0;
- if (cpu_is_omap7xx() gpio 192)
- return 0;
- if (cpu_is_omap2420() gpio 128)
- return 0;
- if (cpu_is_omap2430() gpio 160)
- return 0;
- if ((cpu_is_omap34xx() || cpu_is_omap44xx()) gpio 192)
- return 0;
- return -1;
-}
-
-static int check_gpio(int gpio)
-{
- if (unlikely(gpio_valid(gpio) 0)) {
- printk(KERN_ERR omap-gpio: invalid GPIO %d\n, gpio);
- dump_stack();
- return -1;
- }
- return 0;
-}
-
static void _set_gpio_direction(struct gpio_bank *bank, int gpio, int is_input)
{
void __iomem *reg = bank-base;
@@ -174,9 +140,6 @@ static int _get_gpio_datain(struct gpio_bank *bank, int
gpio)
{
void __iomem *reg = bank-base + bank-regs-datain;
- if (check_gpio(gpio) 0)
- return -EINVAL;
-
return (__raw_readl(reg) GPIO_BIT(bank, gpio)) != 0;
}
@@ -184,9 +147,6 @@ static int _get_gpio_dataout(struct gpio_bank *bank, int
gpio)
{
void __iomem *reg = bank-base + bank-regs-dataout;
- if (check_gpio(gpio) 0)
- return -EINVAL;
-
return (__raw_readl(reg) GPIO_BIT(bank, gpio)) != 0;
}
@@ -463,9 +423,6 @@ static int gpio_irq_type(struct irq_data *d, unsigned type)
else
gpio = d-irq - IH_GPIO_BASE;
- if (check_gpio(gpio) 0)
- return -EINVAL;
-
if (type ~IRQ_TYPE_SENSE_MASK)
return -EINVAL;
@@ -631,8 +588,6 @@ static int gpio_wake_enable(struct irq_data *d, unsigned
int enable)
struct gpio_bank *bank;
int retval;
- if (check_gpio(gpio) 0)
- return -ENODEV;
bank = irq_data_get_irq_chip_data(d);
retval = _set_gpio_wakeup(bank, GPIO_INDEX(bank, gpio), enable);
--
1.7.4
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[PATCH 14/15] OMAP: GPIO: debounce remove SoC specific registers, use pdata
Use register offsets passed in from pdata for accessing debounce registers.
Signed-off-by: Kevin Hilman khil...@ti.com
---
arch/arm/mach-omap2/gpio.c |4
arch/arm/plat-omap/gpio.c | 15 +++
arch/arm/plat-omap/include/plat/gpio.h |2 ++
3 files changed, 9 insertions(+), 12 deletions(-)
diff --git a/arch/arm/mach-omap2/gpio.c b/arch/arm/mach-omap2/gpio.c
index cc26677..316d930 100644
--- a/arch/arm/mach-omap2/gpio.c
+++ b/arch/arm/mach-omap2/gpio.c
@@ -81,6 +81,8 @@ static int omap2_gpio_dev_init(struct omap_hwmod *oh, void
*unused)
pdata-regs-irqenable = OMAP24XX_GPIO_IRQENABLE1;
pdata-regs-set_irqenable = OMAP24XX_GPIO_SETIRQENABLE1;
pdata-regs-clr_irqenable = OMAP24XX_GPIO_CLEARIRQENABLE1;
+ pdata-regs-debounce = OMAP24XX_GPIO_DEBOUNCE_VAL;
+ pdata-regs-debounce_en = OMAP24XX_GPIO_DEBOUNCE_EN;
break;
case 2:
pdata-bank_type = METHOD_GPIO_44XX;
@@ -94,6 +96,8 @@ static int omap2_gpio_dev_init(struct omap_hwmod *oh, void
*unused)
pdata-regs-irqenable = OMAP4_GPIO_IRQSTATUSSET0;
pdata-regs-set_irqenable = OMAP4_GPIO_IRQSTATUSSET0;
pdata-regs-clr_irqenable = OMAP4_GPIO_IRQSTATUSCLR0;
+ pdata-regs-debounce = OMAP4_GPIO_DEBOUNCINGTIME;
+ pdata-regs-debounce_en = OMAP4_GPIO_DEBOUNCENABLE;
break;
default:
WARN(1, Invalid gpio bank_type\n);
diff --git a/arch/arm/plat-omap/gpio.c b/arch/arm/plat-omap/gpio.c
index 82afed8..17f29cc 100644
--- a/arch/arm/plat-omap/gpio.c
+++ b/arch/arm/plat-omap/gpio.c
@@ -170,7 +170,7 @@ do {\
static void _set_gpio_debounce(struct gpio_bank *bank, unsigned gpio,
unsigned debounce)
{
- void __iomem*reg = bank-base;
+ void __iomem*reg;
u32 val;
u32 l;
@@ -186,19 +186,10 @@ static void _set_gpio_debounce(struct gpio_bank *bank,
unsigned gpio,
l = GPIO_BIT(bank, gpio);
- if (bank-method == METHOD_GPIO_44XX)
- reg += OMAP4_GPIO_DEBOUNCINGTIME;
- else
- reg += OMAP24XX_GPIO_DEBOUNCE_VAL;
-
+ reg = bank-base + bank-regs-debounce;
__raw_writel(debounce, reg);
- reg = bank-base;
- if (bank-method == METHOD_GPIO_44XX)
- reg += OMAP4_GPIO_DEBOUNCENABLE;
- else
- reg += OMAP24XX_GPIO_DEBOUNCE_EN;
-
+ reg = bank-base + bank-regs-debounce_en;
val = __raw_readl(reg);
if (debounce) {
diff --git a/arch/arm/plat-omap/include/plat/gpio.h
b/arch/arm/plat-omap/include/plat/gpio.h
index c7e3a56..7a3f067 100644
--- a/arch/arm/plat-omap/include/plat/gpio.h
+++ b/arch/arm/plat-omap/include/plat/gpio.h
@@ -185,6 +185,8 @@ struct omap_gpio_reg_offs {
u16 irqenable;
u16 set_irqenable;
u16 clr_irqenable;
+ u16 debounce;
+ u16 debounce_en;
bool irqenable_inv;
};
--
1.7.4
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[PATCH 08/15] OMAP: GPIO: consolidate direction, input, output, remove #ifdefs
Add register offset fields to GPIO platform_data for registers.
This patch adds registers that control direction, input and output
data. Using these register offsets in the common driver allows
removal of #ifdefs and greatly improves readability.
Also create dedicated data out functions: one for banks with dedicated
set/clear registers, and another for banks with a single mask
register.
Signed-off-by: Kevin Hilman khil...@ti.com
---
arch/arm/mach-omap1/gpio15xx.c | 14 ++
arch/arm/mach-omap1/gpio16xx.c | 19 +++
arch/arm/mach-omap1/gpio7xx.c | 19 +++
arch/arm/mach-omap2/gpio.c | 16 ++
arch/arm/plat-omap/gpio.c | 243 ++--
arch/arm/plat-omap/include/plat/gpio.h | 10 ++
6 files changed, 121 insertions(+), 200 deletions(-)
diff --git a/arch/arm/mach-omap1/gpio15xx.c b/arch/arm/mach-omap1/gpio15xx.c
index 04c4b04..a622d56 100644
--- a/arch/arm/mach-omap1/gpio15xx.c
+++ b/arch/arm/mach-omap1/gpio15xx.c
@@ -34,11 +34,18 @@ static struct __initdata resource
omap15xx_mpu_gpio_resources[] = {
},
};
+static struct omap_gpio_reg_offs omap15xx_mpuio_regs = {
+ .direction = OMAP_MPUIO_IO_CNTL,
+ .datain = OMAP_MPUIO_INPUT_LATCH,
+ .dataout= OMAP_MPUIO_OUTPUT,
+};
+
static struct __initdata omap_gpio_platform_data omap15xx_mpu_gpio_config = {
.virtual_irq_start = IH_MPUIO_BASE,
.bank_type = METHOD_MPUIO,
.bank_width = 16,
.bank_stride= 1,
+ .regs = omap15xx_mpuio_regs,
};
static struct __initdata platform_device omap15xx_mpu_gpio = {
@@ -64,10 +71,17 @@ static struct __initdata resource omap15xx_gpio_resources[]
= {
},
};
+static struct omap_gpio_reg_offs omap15xx_gpio_regs = {
+ .direction = OMAP1510_GPIO_DIR_CONTROL,
+ .datain = OMAP1510_GPIO_DATA_INPUT,
+ .dataout= OMAP1510_GPIO_DATA_OUTPUT,
+};
+
static struct __initdata omap_gpio_platform_data omap15xx_gpio_config = {
.virtual_irq_start = IH_GPIO_BASE,
.bank_type = METHOD_GPIO_1510,
.bank_width = 16,
+ .regs = omap15xx_gpio_regs,
};
static struct __initdata platform_device omap15xx_gpio = {
diff --git a/arch/arm/mach-omap1/gpio16xx.c b/arch/arm/mach-omap1/gpio16xx.c
index 5dd0d4c..4ff6ff3 100644
--- a/arch/arm/mach-omap1/gpio16xx.c
+++ b/arch/arm/mach-omap1/gpio16xx.c
@@ -37,11 +37,18 @@ static struct __initdata resource
omap16xx_mpu_gpio_resources[] = {
},
};
+static struct omap_gpio_reg_offs omap16xx_mpuio_regs = {
+ .direction = OMAP_MPUIO_IO_CNTL,
+ .datain = OMAP_MPUIO_INPUT_LATCH,
+ .dataout= OMAP_MPUIO_OUTPUT,
+};
+
static struct __initdata omap_gpio_platform_data omap16xx_mpu_gpio_config = {
.virtual_irq_start = IH_MPUIO_BASE,
.bank_type = METHOD_MPUIO,
.bank_width = 16,
.bank_stride= 1,
+ .regs = omap16xx_mpuio_regs,
};
static struct __initdata platform_device omap16xx_mpu_gpio = {
@@ -67,10 +74,19 @@ static struct __initdata resource
omap16xx_gpio1_resources[] = {
},
};
+static struct omap_gpio_reg_offs omap16xx_gpio_regs = {
+ .direction = OMAP1610_GPIO_DIRECTION,
+ .set_dataout= OMAP1610_GPIO_SET_DATAOUT,
+ .clr_dataout= OMAP1610_GPIO_CLEAR_DATAOUT,
+ .datain = OMAP1610_GPIO_DATAIN,
+ .dataout= OMAP1610_GPIO_DATAOUT,
+};
+
static struct __initdata omap_gpio_platform_data omap16xx_gpio1_config = {
.virtual_irq_start = IH_GPIO_BASE,
.bank_type = METHOD_GPIO_1610,
.bank_width = 16,
+ .regs = omap16xx_gpio_regs,
};
static struct __initdata platform_device omap16xx_gpio1 = {
@@ -100,6 +116,7 @@ static struct __initdata omap_gpio_platform_data
omap16xx_gpio2_config = {
.virtual_irq_start = IH_GPIO_BASE + 16,
.bank_type = METHOD_GPIO_1610,
.bank_width = 16,
+ .regs = omap16xx_gpio_regs,
};
static struct __initdata platform_device omap16xx_gpio2 = {
@@ -129,6 +146,7 @@ static struct __initdata omap_gpio_platform_data
omap16xx_gpio3_config = {
.virtual_irq_start = IH_GPIO_BASE + 32,
.bank_type = METHOD_GPIO_1610,
.bank_width = 16,
+ .regs = omap16xx_gpio_regs,
};
static struct __initdata platform_device omap16xx_gpio3 = {
@@ -158,6 +176,7 @@ static struct __initdata omap_gpio_platform_data
omap16xx_gpio4_config = {
.virtual_irq_start = IH_GPIO_BASE + 48,
.bank_type = METHOD_GPIO_1610,
.bank_width = 16,
+ .regs = omap16xx_gpio_regs,
};
[PATCH 13/15] OMAP: GPIO: cleanup _set_gpio_wakeup(), remove ifdefs
Make _set_gpio_wakeup() generic by removing ifdefs. Code for the
various SoCs/bank-methods was already the same, except for the
non-wakeup GPIO checking. But that flag is set on a per-SoC basis, so
can be used for all SoCs.
While here, use pr_err() and remove GPIO bank calculation assumption
based on subtracting bank pointers.
Signed-off-by: Kevin Hilman khil...@ti.com
---
arch/arm/plat-omap/gpio.c | 49 +---
1 files changed, 15 insertions(+), 34 deletions(-)
diff --git a/arch/arm/plat-omap/gpio.c b/arch/arm/plat-omap/gpio.c
index a025b7a..82afed8 100644
--- a/arch/arm/plat-omap/gpio.c
+++ b/arch/arm/plat-omap/gpio.c
@@ -535,42 +535,23 @@ static inline void _set_gpio_irqenable(struct gpio_bank
*bank, int gpio, int ena
*/
static int _set_gpio_wakeup(struct gpio_bank *bank, int gpio, int enable)
{
- unsigned long uninitialized_var(flags);
+ u32 gpio_bit = GPIO_BIT(bank, gpio);
+ unsigned long flags;
- switch (bank-method) {
-#ifdef CONFIG_ARCH_OMAP16XX
- case METHOD_MPUIO:
- case METHOD_GPIO_1610:
- spin_lock_irqsave(bank-lock, flags);
- if (enable)
- bank-suspend_wakeup |= (1 gpio);
- else
- bank-suspend_wakeup = ~(1 gpio);
- spin_unlock_irqrestore(bank-lock, flags);
- return 0;
-#endif
-#ifdef CONFIG_ARCH_OMAP2PLUS
- case METHOD_GPIO_24XX:
- case METHOD_GPIO_44XX:
- if (bank-non_wakeup_gpios (1 gpio)) {
- printk(KERN_ERR Unable to modify wakeup on
- non-wakeup GPIO%d\n,
- (bank - gpio_bank) * bank-width + gpio);
- return -EINVAL;
- }
- spin_lock_irqsave(bank-lock, flags);
- if (enable)
- bank-suspend_wakeup |= (1 gpio);
- else
- bank-suspend_wakeup = ~(1 gpio);
- spin_unlock_irqrestore(bank-lock, flags);
- return 0;
-#endif
- default:
- printk(KERN_ERR Can't enable GPIO wakeup for method %i\n,
- bank-method);
+ if (bank-non_wakeup_gpios gpio_bit) {
+ pr_err(Unable to modify wakeup on non-wakeup GPIO%d\n, gpio);
return -EINVAL;
}
+
+ spin_lock_irqsave(bank-lock, flags);
+ if (enable)
+ bank-suspend_wakeup |= gpio_bit;
+ else
+ bank-suspend_wakeup = ~gpio_bit;
+
+ spin_unlock_irqrestore(bank-lock, flags);
+
+ return 0;
}
static void _reset_gpio(struct gpio_bank *bank, int gpio)
@@ -589,7 +570,7 @@ static int gpio_wake_enable(struct irq_data *d, unsigned
int enable)
int retval;
bank = irq_data_get_irq_chip_data(d);
- retval = _set_gpio_wakeup(bank, GPIO_INDEX(bank, gpio), enable);
+ retval = _set_gpio_wakeup(bank, gpio, enable);
return retval;
}
--
1.7.4
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[PATCH 15/15] OMAP: GPIO: cleanup show revision, remove cpu_is checks, display only once
Remove cpu_is_* checks from gpio_show_revision() by passing in the
revision address offset from platform data. SoCs with no revision
register (15xx, 7xx, and all MPUIOs) use -1 to signify no register.
While here, all GPIO banks are assumed to be the same revision, so fix
show_revision() to only show the revision for the first bank it finds.
This removes duplicate GPIO revision prints during boot.
Signed-off-by: Kevin Hilman khil...@ti.com
---
arch/arm/mach-omap1/gpio15xx.c |2 ++
arch/arm/mach-omap1/gpio16xx.c |2 ++
arch/arm/mach-omap1/gpio7xx.c |2 ++
arch/arm/mach-omap2/gpio.c |2 ++
arch/arm/plat-omap/gpio.c | 14 ++
arch/arm/plat-omap/include/plat/gpio.h |1 +
6 files changed, 15 insertions(+), 8 deletions(-)
diff --git a/arch/arm/mach-omap1/gpio15xx.c b/arch/arm/mach-omap1/gpio15xx.c
index 9175624..6f77c36 100644
--- a/arch/arm/mach-omap1/gpio15xx.c
+++ b/arch/arm/mach-omap1/gpio15xx.c
@@ -35,6 +35,7 @@ static struct __initdata resource
omap15xx_mpu_gpio_resources[] = {
};
static struct omap_gpio_reg_offs omap15xx_mpuio_regs = {
+ .revision = -1,
.direction = OMAP_MPUIO_IO_CNTL,
.datain = OMAP_MPUIO_INPUT_LATCH,
.dataout= OMAP_MPUIO_OUTPUT,
@@ -75,6 +76,7 @@ static struct __initdata resource omap15xx_gpio_resources[] =
{
};
static struct omap_gpio_reg_offs omap15xx_gpio_regs = {
+ .revision = -1,
.direction = OMAP1510_GPIO_DIR_CONTROL,
.datain = OMAP1510_GPIO_DATA_INPUT,
.dataout= OMAP1510_GPIO_DATA_OUTPUT,
diff --git a/arch/arm/mach-omap1/gpio16xx.c b/arch/arm/mach-omap1/gpio16xx.c
index a6d4a71..6cbfc70 100644
--- a/arch/arm/mach-omap1/gpio16xx.c
+++ b/arch/arm/mach-omap1/gpio16xx.c
@@ -38,6 +38,7 @@ static struct __initdata resource
omap16xx_mpu_gpio_resources[] = {
};
static struct omap_gpio_reg_offs omap16xx_mpuio_regs = {
+ .revision = -1,
.direction = OMAP_MPUIO_IO_CNTL,
.datain = OMAP_MPUIO_INPUT_LATCH,
.dataout= OMAP_MPUIO_OUTPUT,
@@ -78,6 +79,7 @@ static struct __initdata resource omap16xx_gpio1_resources[]
= {
};
static struct omap_gpio_reg_offs omap16xx_gpio_regs = {
+ .revision = OMAP1610_GPIO_REVISION,
.direction = OMAP1610_GPIO_DIRECTION,
.set_dataout= OMAP1610_GPIO_SET_DATAOUT,
.clr_dataout= OMAP1610_GPIO_CLEAR_DATAOUT,
diff --git a/arch/arm/mach-omap1/gpio7xx.c b/arch/arm/mach-omap1/gpio7xx.c
index 880f3cb..293a22e 100644
--- a/arch/arm/mach-omap1/gpio7xx.c
+++ b/arch/arm/mach-omap1/gpio7xx.c
@@ -40,6 +40,7 @@ static struct __initdata resource
omap7xx_mpu_gpio_resources[] = {
};
static struct omap_gpio_reg_offs omap7xx_mpuio_regs = {
+ .revision = -1,
.direction = OMAP_MPUIO_IO_CNTL / 2,
.datain = OMAP_MPUIO_INPUT_LATCH / 2,
.dataout= OMAP_MPUIO_OUTPUT / 2,
@@ -80,6 +81,7 @@ static struct __initdata resource omap7xx_gpio1_resources[] =
{
};
static struct omap_gpio_reg_offs omap7xx_gpio_regs = {
+ .revision = -1,
.direction = OMAP7XX_GPIO_DIR_CONTROL,
.datain = OMAP7XX_GPIO_DATA_INPUT,
.dataout= OMAP7XX_GPIO_DATA_OUTPUT,
diff --git a/arch/arm/mach-omap2/gpio.c b/arch/arm/mach-omap2/gpio.c
index 316d930..9a46d77 100644
--- a/arch/arm/mach-omap2/gpio.c
+++ b/arch/arm/mach-omap2/gpio.c
@@ -71,6 +71,7 @@ static int omap2_gpio_dev_init(struct omap_hwmod *oh, void
*unused)
case 0:
case 1:
pdata-bank_type = METHOD_GPIO_24XX;
+ pdata-regs-revision = OMAP24XX_GPIO_REVISION;
pdata-regs-direction = OMAP24XX_GPIO_OE;
pdata-regs-datain = OMAP24XX_GPIO_DATAIN;
pdata-regs-dataout = OMAP24XX_GPIO_DATAOUT;
@@ -86,6 +87,7 @@ static int omap2_gpio_dev_init(struct omap_hwmod *oh, void
*unused)
break;
case 2:
pdata-bank_type = METHOD_GPIO_44XX;
+ pdata-regs-revision = OMAP4_GPIO_REVISION;
pdata-regs-direction = OMAP4_GPIO_OE;
pdata-regs-datain = OMAP4_GPIO_DATAIN;
pdata-regs-dataout = OMAP4_GPIO_DATAOUT;
diff --git a/arch/arm/plat-omap/gpio.c b/arch/arm/plat-omap/gpio.c
index 17f29cc..f88616e 100644
--- a/arch/arm/plat-omap/gpio.c
+++ b/arch/arm/plat-omap/gpio.c
@@ -985,19 +985,17 @@ static int gpio_2irq(struct gpio_chip *chip, unsigned
offset)
static void __init omap_gpio_show_rev(struct gpio_bank *bank)
{
+ static bool called;
u32 rev;
- if (cpu_is_omap16xx() !(bank-method != METHOD_MPUIO))
- rev = __raw_readw(bank-base + OMAP1610_GPIO_REVISION);
- else if (cpu_is_omap24xx() || cpu_is_omap34xx())
- rev = __raw_readl(bank-base + OMAP24XX_GPIO_REVISION);
- else if (cpu_is_omap44xx())
-
Re: [linux-pm] [RFC PATCH V3 4/4] cpuidle: Single/Global registration of idle states
Hi Trinabh, Trinabh Gupta trin...@linux.vnet.ibm.com writes: [...] I just wanted to get comments on the design and understand how it affects various architectures in question. It looks to me as if the design should be okay and infact better for architectures like ARM since they do not have different idle states for different cpus and thus do not require per-cpu registration. Global registration would work and be simpler; please correct me if I am wrong. Yes, I agree that the new design is better, I especially like that it's more clear (and expected) that final state decision making is to be done directly in the driver without the back-and-forth in the current setup. Thanks, Kevin -- To unsubscribe from this list: send the line unsubscribe linux-omap in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
