Re: [PATCH 2/2] OMAPDSS: HDMI: Disable DDC internal pull up
On Tue, 2011-12-13 at 11:26 +0530, mythr...@ti.com wrote:
From: Mythri P K mythr...@ti.com
Disables the internal pull resistor for SDA and SCL which are enabled by
default, as there are expernal pull up's in 4460 and 4430 ES2.3
Typo above with external.
SDP, Blaze and Panda Boards, It is done to avoid the EDID read failure.
Signed-off-by: Ricardo Salveti de Araujo ricardo.salv...@linaro.org
Signed-off-by: Mythri P K mythr...@ti.com
---
arch/arm/mach-omap2/board-4430sdp.c| 13 -
arch/arm/mach-omap2/board-omap4panda.c | 14 +-
arch/arm/mach-omap2/display.c | 17 ++---
include/video/omapdss.h|4 +++-
4 files changed, 42 insertions(+), 6 deletions(-)
diff --git a/arch/arm/mach-omap2/board-4430sdp.c
b/arch/arm/mach-omap2/board-4430sdp.c
index c3bd640..1b7c5e5 100644
--- a/arch/arm/mach-omap2/board-4430sdp.c
+++ b/arch/arm/mach-omap2/board-4430sdp.c
@@ -826,7 +826,18 @@ static void omap_4430sdp_display_init(void)
sdp4430_lcd_init();
sdp4430_picodlp_init();
omap_display_init(sdp4430_dss_data);
- omap_hdmi_init();
+ /*
+ * CONTROL_I2C_1: HDMI_DDC_SDA_PULLUPRESX (bit 28) and
+ * HDMI_DDC_SCL_PULLUPRESX (bit 24) are set to disable
+ * internal pull up resistor - This is a change needed in
+ * OMAP4460SDP/Blaze and OMAP4430 ES2.3 SDP/Blaze Boards as the
+ * external pull up are present. This is needed to avoid
+ * EDID read failure.
+ */
The comment above about the control bits is not needed here. Those are
internal details. And the EDID read failure is only needed in the
commit message. What you should have here in the comment is something
like:
OMAP4460SDP/Blaze and OMAP4430 ES2.3 SDP/Blaze boards and later have
external pull up on the HDMI I2C lines.
+ if (cpu_is_omap446x() || (omap_rev() OMAP4430_REV_ES2_2))
Parenthesis around omap_rev are extra.
+ omap_hdmi_init(OMAP_HDMI_EXTERNAL_PULLUP);
Should the define name be a bit more specific? The pull-up is about the
I2C SDA and SCL lines, right?
And while I would presume that normally the SDA and SCL both either have
external or internal pull-up, I don't see it as impossible that somebody
would need different configuration for the lines. So optimally we'd have
separate bits for those two. However, to keep the API simpler I think
it's fine to have only one bit for now.
+ else
+ omap_hdmi_init(0);
}
#ifdef CONFIG_OMAP_MUX
diff --git a/arch/arm/mach-omap2/board-omap4panda.c
b/arch/arm/mach-omap2/board-omap4panda.c
index d95df2e..212e06c 100644
--- a/arch/arm/mach-omap2/board-omap4panda.c
+++ b/arch/arm/mach-omap2/board-omap4panda.c
@@ -541,7 +541,19 @@ void omap4_panda_display_init(void)
pr_err(error initializing panda DVI\n);
omap_display_init(omap4_panda_dss_data);
- omap_hdmi_init();
+
+ /*
+ * CONTROL_I2C_1: HDMI_DDC_SDA_PULLUPRESX (bit 28) and
+ * HDMI_DDC_SCL_PULLUPRESX (bit 24) are set to disable
+ * internal pull up resistor - This is a change needed in
+ * OMAP4460 Panda and OMAP4430 ES2.3 Panda Boards as the
+ * external pull up are present. This is needed to avoid
+ * EDID read failure.
+ */
+ if (cpu_is_omap446x() || (omap_rev() OMAP4430_REV_ES2_2))
+ omap_hdmi_init(OMAP_HDMI_EXTERNAL_PULLUP);
+ else
+ omap_hdmi_init(0);
}
static void __init omap4_panda_init(void)
diff --git a/arch/arm/mach-omap2/display.c b/arch/arm/mach-omap2/display.c
index 8436088..a75e179 100644
--- a/arch/arm/mach-omap2/display.c
+++ b/arch/arm/mach-omap2/display.c
@@ -97,8 +97,11 @@ static const struct omap_dss_hwmod_data
omap4_dss_hwmod_data[] __initdata = {
{ dss_hdmi, omapdss_hdmi, -1 },
};
-static void omap4_hdmi_mux_pads()
+static void omap4_hdmi_mux_pads(int flags)
{
+ u32 reg;
+ u16 control_i2c_1;
+
/* PAD0_HDMI_HPD_PAD1_HDMI_CEC */
omap_mux_init_signal(hdmi_hpd,
OMAP_PIN_INPUT_PULLUP);
@@ -109,6 +112,14 @@ static void omap4_hdmi_mux_pads()
OMAP_PIN_INPUT_PULLUP);
omap_mux_init_signal(hdmi_ddc_sda,
OMAP_PIN_INPUT_PULLUP);
+
+ if (flags OMAP_HDMI_EXTERNAL_PULLUP) {
+ control_i2c_1 = OMAP4_CTRL_MODULE_PAD_CORE_CONTROL_I2C_1;
+ reg = omap4_ctrl_pad_readl(control_i2c_1);
+ reg |= (OMAP4_HDMI_DDC_SDA_PULLUPRESX_MASK |
+ OMAP4_HDMI_DDC_SCL_PULLUPRESX_MASK);
Indentation missing.
+ omap4_ctrl_pad_writel(reg, control_i2c_1);
+ }
}
static int omap4_dsi_mux_pads(int dsi_id, unsigned lanes)
@@ -144,10 +155,10 @@ static int omap4_dsi_mux_pads(int dsi_id, unsigned
lanes)
return 0;
}
-int omap_hdmi_init(void)
+int omap_hdmi_init(int flags)
{
if (cpu_is_omap44xx())
- omap4_hdmi_mux_pads();
+
Re: [PATCH 2/4] ARM: OMAP2/3: intc: Add DT support for TI interrupt controller
Hi Benoit,
diff --git a/arch/arm/mach-omap2/common.h b/arch/arm/mach-omap2/common.h
index 012bac7..bcfccc2 100644
--- a/arch/arm/mach-omap2/common.h
+++ b/arch/arm/mach-omap2/common.h
@@ -156,6 +156,16 @@ void omap3_intc_resume_idle(void);
void omap2_intc_handle_irq(struct pt_regs *regs);
void omap3_intc_handle_irq(struct pt_regs *regs);
+struct device_node;
+#ifdef CONFIG_OF
+int __init intc_of_init(struct device_node *node, struct device_node *parent);
+#else
+int __init intc_of_init(struct device_node *node, struct device_node *parent)
+{
+ return 0;
+}
This seems to break !CONFIG_OF builds as common.h is included in
multiple c files causing 'multiple definition' errors.
regards,
Rajendra
+#endif
+
/*
* wfi used in low power code. Directly opcode is used instead
* of instruction to avoid mulit-omap build break
diff --git a/arch/arm/mach-omap2/irq.c b/arch/arm/mach-omap2/irq.c
index 42b1d65..cafc663 100644
--- a/arch/arm/mach-omap2/irq.c
+++ b/arch/arm/mach-omap2/irq.c
@@ -17,6 +17,9 @@
#includemach/hardware.h
#includeasm/exception.h
#includeasm/mach/irq.h
+#includelinux/of.h
+#includelinux/of_address.h
+#includelinux/irqdomain.h
/* selected INTC register offsets */
@@ -166,7 +169,7 @@ static void __init omap_init_irq(u32 base, int nr_irqs)
/* Static mapping, never released */
bank-base_reg = ioremap(base, SZ_4K);
if (!bank-base_reg) {
- printk(KERN_ERR Could not ioremap irq bank%i\n, i);
+ pr_err(Could not ioremap irq bank%i\n, i);
continue;
}
@@ -179,8 +182,8 @@ static void __init omap_init_irq(u32 base, int nr_irqs)
nr_banks++;
}
- printk(KERN_INFO Total of %ld interrupts on %d active controller%s\n,
- nr_of_irqs, nr_banks, nr_banks 1 ? s : );
+ pr_info(Total of %ld interrupts on %d active controller%s\n,
+ nr_of_irqs, nr_banks, nr_banks 1 ? s : );
}
void __init omap2_init_irq(void)
@@ -236,6 +239,32 @@ asmlinkage void __exception_irq_entry
omap2_intc_handle_irq(struct pt_regs *regs
omap_intc_handle_irq(base_addr, regs);
}
+#ifdef CONFIG_OF
+int __init intc_of_init(struct device_node *node, struct device_node *parent)
+{
+ struct resource res;
+ u32 nr_irqs;
+
+ if (WARN_ON(!node))
+ return -ENODEV;
+
+ if (of_address_to_resource(node, 0,res)) {
+ WARN(1, unable to get intc registers\n);
+ return -EINVAL;
+ }
+
+ if (of_property_read_u32(node, ti,intc-size,nr_irqs)) {
+ WARN(1, unable to get intc-size\n);
+ return -EINVAL;
+ }
+
+ omap_init_irq(res.start, nr_irqs);
+ irq_domain_add_simple(node, 0);
+
+ return 0;
+}
+#endif
+
#ifdef CONFIG_ARCH_OMAP3
static struct omap3_intc_regs intc_context[ARRAY_SIZE(irq_banks)];
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Re: [PATCH 63/65] OMAPDSS: APPLY: add checking of ovls/mgrs settings
Hi, On Thursday 08 December 2011 01:59 PM, Tomi Valkeinen wrote: On Wed, 2011-12-07 at 18:35 +0530, Archit Taneja wrote: Hi, On Tuesday 22 November 2011 02:52 PM, Tomi Valkeinen wrote: Add checks for overlay and manager settings. The checks are a bit complex, as we need to observe the bigger picture instead of overlays and managers independently. Things like the used display and the zorder of other overlays affect the validity of the settings. Minor comment: dss_ovl_check, dss_mgr_check and dss_mgr_check_zorder don't really qualify as functions which do actual applying of configurations, they could be moved from apply.c to manager.c and overlay.c. I had the check functions in apply.c because they used apply.c's internal datastructures. However, looking the functions now, only dss_mgr_check_zorder() used the internal datas, and the function doesn't even use those variables for anything =). Also, the function dss_mgr_check() takes 'struct omap_overlay_manager_info *info' as a parameter but doesn't use it. We might want to remove that too. Archit So you're right, they can be moved to manager.c and overlay.c, thanks. Tomi -- To unsubscribe from this list: send the line unsubscribe linux-omap in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
[PATCH v2 0/3] Device tree support for TWL regulators
This series adds DT support for TWL regulator driver and passes regulator data for two OMAP4 boards (OMAP4 panda and OMAP4 sdp) from device tree. Patches are based on for-next of the regulator tree[1] with omap i2c/twl DT adaptation patches[2] from Benoit pulled in and are available here: git://gitorious.org/omap-pm/linux.git for-dt/regulator-twl regards, Rajendra [1] git://git.kernel.org/pub/scm/linux/kernel/git/broonie/regulator.git for-next [2] git://gitorious.org/omap-pm/linux.git for_3.3/3_omap_dt_i2c_twl Rajendra Nayak (3): regulator: twl: adapt twl-regulator driver to dt ARM: omap4-sdp: Pass regulator data from dt omap4: panda: Pass regulator data from dt .../bindings/regulator/twl-regulator.txt | 57 + arch/arm/boot/dts/omap4-panda.dts | 24 arch/arm/boot/dts/omap4-sdp.dts| 36 ++ drivers/regulator/twl-regulator.c | 128 +--- 4 files changed, 199 insertions(+), 46 deletions(-) create mode 100644 Documentation/devicetree/bindings/regulator/twl-regulator.txt -- To unsubscribe from this list: send the line unsubscribe linux-omap in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
[PATCH v2 2/3] ARM: omap4-sdp: Pass regulator data from dt
Pass the adjustable voltage regulator information for
omap4sdp board from device tree.
Signed-off-by: Rajendra Nayak rna...@ti.com
---
arch/arm/boot/dts/omap4-sdp.dts | 36
1 files changed, 36 insertions(+), 0 deletions(-)
diff --git a/arch/arm/boot/dts/omap4-sdp.dts b/arch/arm/boot/dts/omap4-sdp.dts
index 0ab14cb..daf8b69 100644
--- a/arch/arm/boot/dts/omap4-sdp.dts
+++ b/arch/arm/boot/dts/omap4-sdp.dts
@@ -40,6 +40,42 @@
compatible = ti,twl4030-rtc;
interrupts = 11;
};
+
+ vaux1: regulator@0 {
+ compatible = ti,twl6030-vaux1,ti,twl6030;
+ regulator-min-microvolt = 100;
+ regulator-max-microvolt = 300;
+ };
+
+ vaux2: regulator@1 {
+ compatible = ti,twl6030-vaux2,ti,twl6030;
+ regulator-min-microvolt = 120;
+ regulator-max-microvolt = 280;
+ };
+
+ vaux3: regulator@2 {
+ compatible = ti,twl6030-vaux3,ti,twl6030;
+ regulator-min-microvolt = 100;
+ regulator-max-microvolt = 300;
+ };
+
+ vmmc: regulator@3 {
+ compatible = ti,twl6030-vmmc,ti,twl6030;
+ regulator-min-microvolt = 120;
+ regulator-max-microvolt = 300;
+ };
+
+ vpp: regulator@4 {
+ compatible = ti,twl6030-vpp,ti,twl6030;
+ regulator-min-microvolt = 180;
+ regulator-max-microvolt = 250;
+ };
+
+ vusim: regulator@5 {
+ compatible = ti,twl6030-vusim,ti,twl6030;
+ regulator-min-microvolt = 120;
+ regulator-max-microvolt = 290;
+ };
};
};
--
1.7.1
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[PATCH v2 3/3] omap4: panda: Pass regulator data from dt
Pass the adjustable voltage regulator information for
omap4panda board from device tree.
Signed-off-by: Rajendra Nayak rna...@ti.com
---
arch/arm/boot/dts/omap4-panda.dts | 24
1 files changed, 24 insertions(+), 0 deletions(-)
diff --git a/arch/arm/boot/dts/omap4-panda.dts
b/arch/arm/boot/dts/omap4-panda.dts
index b66bcd6..f6cc48a 100644
--- a/arch/arm/boot/dts/omap4-panda.dts
+++ b/arch/arm/boot/dts/omap4-panda.dts
@@ -40,6 +40,30 @@
compatible = ti,twl4030-rtc;
interrupts = 11;
};
+
+ vaux2: regulator@0 {
+ compatible = ti,twl6030-vaux2,ti,twl6030;
+ regulator-min-microvolt = 120;
+ regulator-max-microvolt = 280;
+ };
+
+ vaux3: regulator@1 {
+ compatible = ti,twl6030-vaux3,ti,twl6030;
+ regulator-min-microvolt = 100;
+ regulator-max-microvolt = 300;
+ };
+
+ vmmc: regulator@2 {
+ compatible = ti,twl6030-vmmc,ti,twl6030;
+ regulator-min-microvolt = 120;
+ regulator-max-microvolt = 300;
+ };
+
+ vpp: regulator@3 {
+ compatible = ti,twl6030-vpp,ti,twl6030;
+ regulator-min-microvolt = 180;
+ regulator-max-microvolt = 250;
+ };
};
};
--
1.7.1
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[PATCH v2 1/3] regulator: twl: adapt twl-regulator driver to dt
Modify the twl regulator driver to extract the regulator_init_data from
device tree when passed, instead of getting it through platform_data
structures (on non-DT builds)
Also add documentation for TWL regulator specific bindings.
Signed-off-by: Rajendra Nayak rna...@ti.com
---
.../bindings/regulator/twl-regulator.txt | 57 +
drivers/regulator/twl-regulator.c | 128 +---
2 files changed, 139 insertions(+), 46 deletions(-)
create mode 100644
Documentation/devicetree/bindings/regulator/twl-regulator.txt
diff --git a/Documentation/devicetree/bindings/regulator/twl-regulator.txt
b/Documentation/devicetree/bindings/regulator/twl-regulator.txt
new file mode 100644
index 000..bdd96d5
--- /dev/null
+++ b/Documentation/devicetree/bindings/regulator/twl-regulator.txt
@@ -0,0 +1,57 @@
+TWL family of regulators
+
+Required properties:
+- compatible:
+ - ti,twl4030 for twl4030 regulators
+ - ti,twl6025 for twl6025 regulators
+ - ti,twl6030 for twl6030 regulators
+
+Additionally compatible can be used to specify the
+exact regulator/ldo instance like
+For twl6030 regulators/LDO's
+- compatible:
+ - ti,twl6030-vaux1 for VAUX1 LDO
+ - ti,twl6030-vaux2 for VAUX2 LDO
+ - ti,twl6030-vaux3 for VAUX3 LDO
+ - ti,twl6030-vmmc for VMMC LDO
+ - ti,twl6030-vpp for VPP LDO
+ - ti,twl6030-vusim for VUSIM LDO
+For twl6025 regulators/LDO's
+- compatible:
+ - ti,twl6025-ldo1 for LDO1 LDO
+ - ti,twl6025-ldo2 for LDO2 LDO
+ - ti,twl6025-ldo3 for LDO3 LDO
+ - ti,twl6025-ldo4 for LDO4 LDO
+ - ti,twl6025-ldo5 for LDO5 LDO
+ - ti,twl6025-ldo6 for LDO6 LDO
+ - ti,twl6025-ldo7 for LDO7 LDO
+ - ti,twl6025-ldoln for LDOLN LDO
+ - ti,twl6025-ldousb for LDOUSB LDO
+For twl4030 regulators/LDO's
+- compatible:
+ - ti,twl4030-vaux1 for VAUX1 LDO
+ - ti,twl4030-vaux2 for VAUX2 LDO
+ - ti,twl5030-vaux2 for VAUX2 LDO
+ - ti,twl4030-vaux3 for VAUX3 LDO
+ - ti,twl4030-vaux4 for VAUX4 LDO
+ - ti,twl4030-vmmc1 for VMMC1 LDO
+ - ti,twl4030-vmmc2 for VMMC2 LDO
+ - ti,twl4030-vpll1 for VPLL1 LDO
+ - ti,twl4030-vpll2 for VPLL2 LDO
+ - ti,twl4030-vsim for VSIM LDO
+ - ti,twl4030-vdac for VDAC LDO
+ - ti,twl4030-vintana2 for VINTANA2 LDO
+ - ti,twl4030-vio for VIO LDO
+ - ti,twl4030-vdd1 for VDD1 LDO
+ - ti,twl4030-vdd2 for VDD2 LDO
+
+Optional properties:
+- Any optional property defined in bindings/regulator/regulator.txt
+
+Example:
+
+ xyz: regulator@0 {
+ compatible = ti,twl6030-vaux1,ti,twl6030;
+ regulator-min-microvolt = 100;
+ regulator-max-microvolt = 300;
+ };
diff --git a/drivers/regulator/twl-regulator.c
b/drivers/regulator/twl-regulator.c
index 181a2cf..e1a4134 100644
--- a/drivers/regulator/twl-regulator.c
+++ b/drivers/regulator/twl-regulator.c
@@ -14,8 +14,10 @@
#include linux/err.h
#include linux/delay.h
#include linux/platform_device.h
+#include linux/of.h
#include linux/regulator/driver.h
#include linux/regulator/machine.h
+#include linux/regulator/of_regulator.h
#include linux/i2c/twl.h
@@ -58,6 +60,7 @@ struct twlreg_info {
/* chip specific features */
unsigned long features;
+ const char *compatible;
};
@@ -866,13 +869,14 @@ static struct regulator_ops twlsmps_ops = {
TWL_FIXED_LDO(label, offset, mVolts, 0x0, turnon_delay, \
0x0, TWL6030, twl6030fixed_ops)
-#define TWL4030_ADJUSTABLE_LDO(label, offset, num, turnon_delay, remap_conf) {
\
+#define TWL4030_ADJUSTABLE_LDO(label, offset, num, turnon_delay, remap_conf,
comp) { \
.base = offset, \
.id = num, \
.table_len = ARRAY_SIZE(label##_VSEL_table), \
.table = label##_VSEL_table, \
.delay = turnon_delay, \
.remap = remap_conf, \
+ .compatible = comp, \
.desc = { \
.name = #label, \
.id = TWL4030_REG_##label, \
@@ -883,12 +887,13 @@ static struct regulator_ops twlsmps_ops = {
}, \
}
-#define TWL4030_ADJUSTABLE_SMPS(label, offset, num, turnon_delay, remap_conf) \
+#define TWL4030_ADJUSTABLE_SMPS(label, offset, num, turnon_delay, remap_conf,
comp) \
{ \
.base = offset, \
.id = num, \
.delay = turnon_delay, \
.remap = remap_conf, \
+ .compatible = comp, \
.desc = { \
.name = #label, \
.id = TWL4030_REG_##label, \
@@ -898,10 +903,11 @@ static struct regulator_ops twlsmps_ops = {
}, \
}
-#define TWL6030_ADJUSTABLE_LDO(label, offset, min_mVolts, max_mVolts) { \
+#define TWL6030_ADJUSTABLE_LDO(label, offset, min_mVolts, max_mVolts, comp) { \
.base = offset, \
.min_mV = min_mVolts, \
.max_mV = max_mVolts, \
+ .compatible = comp, \
.desc = { \
.name = #label, \
.id = TWL6030_REG_##label, \
@@ -912,10 +918,11 @@ static struct regulator_ops
[PATCHv8 3/5] OMAP: I2C: Reset support
Under some error conditions the i2c driver may do a reset.
Adding a reset field and support in the device-specific code to aid
error-recovery.
Signed-off-by: Shubhrajyoti D shubhrajy...@ti.com
---
arch/arm/plat-omap/i2c.c |2 ++
include/linux/i2c-omap.h |1 +
2 files changed, 3 insertions(+), 0 deletions(-)
diff --git a/arch/arm/plat-omap/i2c.c b/arch/arm/plat-omap/i2c.c
index db071bc..6cddde2 100644
--- a/arch/arm/plat-omap/i2c.c
+++ b/arch/arm/plat-omap/i2c.c
@@ -179,6 +179,8 @@ static inline int omap2_i2c_add_bus(int bus_id)
*/
if (cpu_is_omap34xx())
pdata-set_mpu_wkup_lat = omap_pm_set_max_mpu_wakeup_lat_compat;
+
+ pdata-device_reset = omap_device_reset;
pdev = omap_device_build(name, bus_id, oh, pdata,
sizeof(struct omap_i2c_bus_platform_data),
NULL, 0, 0);
diff --git a/include/linux/i2c-omap.h b/include/linux/i2c-omap.h
index 92a0dc7..fd38249 100644
--- a/include/linux/i2c-omap.h
+++ b/include/linux/i2c-omap.h
@@ -35,6 +35,7 @@ struct omap_i2c_bus_platform_data {
u32 rev;
u32 flags;
void(*set_mpu_wkup_lat)(struct device *dev, long set);
+ int (*device_reset) (struct device *dev);
};
#endif
--
1.7.1
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[PATCHv8 2/5] OMAP: hwmod/device : add omap_device_reset to reset all the hwmods in the device
Add a function omap_device_reset() to reset all the hwmods in the hwmod
device.
This is intended to be used by device drivers to reset all the hwmods in the
device. This is needed to support some ips like i2c which may have to do
reset
in error paths or in errata.
Signed-off-by: Shubhrajyoti D shubhrajy...@ti.com
---
arch/arm/plat-omap/include/plat/omap_device.h |1 +
arch/arm/plat-omap/omap_device.c | 22 ++
2 files changed, 23 insertions(+), 0 deletions(-)
diff --git a/arch/arm/plat-omap/include/plat/omap_device.h
b/arch/arm/plat-omap/include/plat/omap_device.h
index 51423d2..663ef55 100644
--- a/arch/arm/plat-omap/include/plat/omap_device.h
+++ b/arch/arm/plat-omap/include/plat/omap_device.h
@@ -116,6 +116,7 @@ int omap_device_enable_hwmods(struct omap_device *od);
int omap_device_disable_clocks(struct omap_device *od);
int omap_device_enable_clocks(struct omap_device *od);
+int omap_device_reset(struct device *dev);
/*
* Entries should be kept in latency order ascending
diff --git a/arch/arm/plat-omap/omap_device.c b/arch/arm/plat-omap/omap_device.c
index e8d9869..e80e8c4 100644
--- a/arch/arm/plat-omap/omap_device.c
+++ b/arch/arm/plat-omap/omap_device.c
@@ -1129,6 +1129,28 @@ int omap_device_enable_clocks(struct omap_device *od)
/* XXX pass along return value here? */
return 0;
}
+/**
+ * omap_device_reset - reset the module.
+ * @dev: struct device*
+ *
+ * Reset all the hwmods associated with the device
+ */
+
+int omap_device_reset(struct device *dev)
+{
+ int r = 0;
+ int i;
+ struct platform_device *pdev = to_platform_device(dev);
+ struct omap_device *odev = to_omap_device(pdev);
+ struct omap_hwmod *oh;
+
+ for (i = 0; i odev-hwmods_cnt; i++) {
+ oh = odev-hwmods[i];
+ r |= omap_hwmod_reset(oh);
+ }
+ return r;
+}
+
struct device omap_device_parent = {
.init_name = omap,
--
1.7.1
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[PATCHv8 0/5] I2C driver updates
The series attempts to do the following - The reset should not be done in the driver have support for the same. - Remove the sysc register access in the driver. Incorporated review comments: - Fix the indentation of the code. - Restore in the error path is not needed as we are doing a init. - Combine the patch 1 and 2 as i2c-omap.h isn't a generic header - Making the changelogs more descriptive. - Add a default clockactivity field. - Renaming omap2_i2c_reset() to omap_device_reset() and move it to omap_device.c - iterate over all of the hwmods in the omap_device and call omap_hwmod_reset() on each. This is rebased on Kevin's tree for_3.2/fixes/i2c branch. Acknowledge Balaji ,Santosh ,Kevin , Paul and Jon for the review comments. Shubhrajyoti D (5): OMAP3+: HWMOD: Add the default clockactivity for I2C OMAP: hwmod/device : add omap_device_reset to reset all the hwmods in the device OMAP: I2C: Reset support OMAP: I2C: Remove the reset in the init path OMAP: I2C: Remove the SYSC register definition arch/arm/mach-omap2/omap_hwmod_3xxx_data.c|7 +- arch/arm/mach-omap2/omap_hwmod_44xx_data.c|9 ++- arch/arm/plat-omap/i2c.c |2 + arch/arm/plat-omap/include/plat/omap_device.h |1 + arch/arm/plat-omap/omap_device.c | 22 ++ drivers/i2c/busses/i2c-omap.c | 88 +++-- include/linux/i2c-omap.h |1 + 7 files changed, 58 insertions(+), 72 deletions(-) -- To unsubscribe from this list: send the line unsubscribe linux-omap in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
[PATCHv8 1/5] OMAP3+: HWMOD: Add the default clockactivity for I2C
For I2C clockactivity field is added for OMAP3 and OMAP4 that defines how the
interface (OCP) and functional (system) clocks behave when the I2C module is
idle.
The configuration of the clock activity bit field (per TRM) is as follows:
0x0: Both clocks can be cut off
0x1: Only OCP clock must be kept active; system clock
can be cut off
0x3: Both clocks must be kept active
0x2: Only system clock must be kept active; OCP clock
can be cut off
The patch makes 0x2(CLOCKACT_TEST_ICLK) the default for OMAP3 and OMAP4.
Signed-off-by: Shubhrajyoti D shubhrajy...@ti.com
Signed-off-by: Jon Hunter jon-hun...@ti.com
---
arch/arm/mach-omap2/omap_hwmod_3xxx_data.c |7 ---
arch/arm/mach-omap2/omap_hwmod_44xx_data.c |9 +
2 files changed, 9 insertions(+), 7 deletions(-)
diff --git a/arch/arm/mach-omap2/omap_hwmod_3xxx_data.c
b/arch/arm/mach-omap2/omap_hwmod_3xxx_data.c
index 7f8915a..1b59118 100644
--- a/arch/arm/mach-omap2/omap_hwmod_3xxx_data.c
+++ b/arch/arm/mach-omap2/omap_hwmod_3xxx_data.c
@@ -1162,6 +1162,7 @@ static struct omap_hwmod_class_sysconfig i2c_sysc = {
SYSC_HAS_ENAWAKEUP | SYSC_HAS_SOFTRESET |
SYSC_HAS_AUTOIDLE | SYSS_HAS_RESET_STATUS),
.idlemodes = (SIDLE_FORCE | SIDLE_NO | SIDLE_SMART),
+ .clockact = CLOCKACT_TEST_ICLK,
.sysc_fields= omap_hwmod_sysc_type1,
};
@@ -1636,7 +1637,7 @@ static struct omap_hwmod_ocp_if *omap3xxx_i2c1_slaves[] =
{
static struct omap_hwmod omap3xxx_i2c1_hwmod = {
.name = i2c1,
- .flags = HWMOD_16BIT_REG,
+ .flags = HWMOD_16BIT_REG | HWMOD_SET_DEFAULT_CLOCKACT,
.mpu_irqs = omap2_i2c1_mpu_irqs,
.sdma_reqs = omap2_i2c1_sdma_reqs,
.main_clk = i2c1_fck,
@@ -1670,7 +1671,7 @@ static struct omap_hwmod_ocp_if *omap3xxx_i2c2_slaves[] =
{
static struct omap_hwmod omap3xxx_i2c2_hwmod = {
.name = i2c2,
- .flags = HWMOD_16BIT_REG,
+ .flags = HWMOD_16BIT_REG | HWMOD_SET_DEFAULT_CLOCKACT,
.mpu_irqs = omap2_i2c2_mpu_irqs,
.sdma_reqs = omap2_i2c2_sdma_reqs,
.main_clk = i2c2_fck,
@@ -1715,7 +1716,7 @@ static struct omap_hwmod_ocp_if *omap3xxx_i2c3_slaves[] =
{
static struct omap_hwmod omap3xxx_i2c3_hwmod = {
.name = i2c3,
- .flags = HWMOD_16BIT_REG,
+ .flags = HWMOD_16BIT_REG | HWMOD_SET_DEFAULT_CLOCKACT,
.mpu_irqs = i2c3_mpu_irqs,
.sdma_reqs = i2c3_sdma_reqs,
.main_clk = i2c3_fck,
diff --git a/arch/arm/mach-omap2/omap_hwmod_44xx_data.c
b/arch/arm/mach-omap2/omap_hwmod_44xx_data.c
index daaf165..c0d8a2e 100644
--- a/arch/arm/mach-omap2/omap_hwmod_44xx_data.c
+++ b/arch/arm/mach-omap2/omap_hwmod_44xx_data.c
@@ -2246,6 +2246,7 @@ static struct omap_hwmod_class_sysconfig
omap44xx_i2c_sysc = {
SYSC_HAS_SOFTRESET | SYSS_HAS_RESET_STATUS),
.idlemodes = (SIDLE_FORCE | SIDLE_NO | SIDLE_SMART |
SIDLE_SMART_WKUP),
+ .clockact = CLOCKACT_TEST_ICLK,
.sysc_fields= omap_hwmod_sysc_type1,
};
@@ -2300,7 +2301,7 @@ static struct omap_hwmod omap44xx_i2c1_hwmod = {
.name = i2c1,
.class = omap44xx_i2c_hwmod_class,
.clkdm_name = l4_per_clkdm,
- .flags = HWMOD_16BIT_REG,
+ .flags = HWMOD_16BIT_REG | HWMOD_SET_DEFAULT_CLOCKACT,
.mpu_irqs = omap44xx_i2c1_irqs,
.sdma_reqs = omap44xx_i2c1_sdma_reqs,
.main_clk = i2c1_fck,
@@ -2356,7 +2357,7 @@ static struct omap_hwmod omap44xx_i2c2_hwmod = {
.name = i2c2,
.class = omap44xx_i2c_hwmod_class,
.clkdm_name = l4_per_clkdm,
- .flags = HWMOD_16BIT_REG,
+ .flags = HWMOD_16BIT_REG | HWMOD_SET_DEFAULT_CLOCKACT,
.mpu_irqs = omap44xx_i2c2_irqs,
.sdma_reqs = omap44xx_i2c2_sdma_reqs,
.main_clk = i2c2_fck,
@@ -2412,7 +2413,7 @@ static struct omap_hwmod omap44xx_i2c3_hwmod = {
.name = i2c3,
.class = omap44xx_i2c_hwmod_class,
.clkdm_name = l4_per_clkdm,
- .flags = HWMOD_16BIT_REG,
+ .flags = HWMOD_16BIT_REG | HWMOD_SET_DEFAULT_CLOCKACT,
.mpu_irqs = omap44xx_i2c3_irqs,
.sdma_reqs = omap44xx_i2c3_sdma_reqs,
.main_clk = i2c3_fck,
@@ -2468,7 +2469,7 @@ static struct omap_hwmod omap44xx_i2c4_hwmod = {
.name = i2c4,
.class = omap44xx_i2c_hwmod_class,
.clkdm_name = l4_per_clkdm,
- .flags = HWMOD_16BIT_REG,
+ .flags = HWMOD_16BIT_REG | HWMOD_SET_DEFAULT_CLOCKACT,
.mpu_irqs = omap44xx_i2c4_irqs,
.sdma_reqs = omap44xx_i2c4_sdma_reqs,
.main_clk
[PATCHv8 4/5] OMAP: I2C: Remove the reset in the init path
- The reset in the driver at init is not needed anymore as the
hwmod framework takes care of reseting it.
- Reset is removed from omap_i2c_init, which was called
not only during probe, but also after time out and error handling.
device_reset were added in those places to effect the reset.
- Earlier the hwmod SYSC settings were over-written in the driver.
Removing the same and letting the hwmod take care of the settings.
- Clean up the SYSS_RESETDONE_MASK macro as it is no longer needed.
- Clean up the SYSCONFIG SYSC bit definition macros.
- Fix the typos in wakeup.
Signed-off-by: Shubhrajyoti D shubhrajy...@ti.com
---
drivers/i2c/busses/i2c-omap.c | 83 +++-
1 files changed, 23 insertions(+), 60 deletions(-)
diff --git a/drivers/i2c/busses/i2c-omap.c b/drivers/i2c/busses/i2c-omap.c
index 257c1a5..70136a2 100644
--- a/drivers/i2c/busses/i2c-omap.c
+++ b/drivers/i2c/busses/i2c-omap.c
@@ -155,19 +155,6 @@ enum {
#define OMAP_I2C_SYSTEST_SDA_O (1 0)/* SDA line drive out */
#endif
-/* OCP_SYSSTATUS bit definitions */
-#define SYSS_RESETDONE_MASK(1 0)
-
-/* OCP_SYSCONFIG bit definitions */
-#define SYSC_CLOCKACTIVITY_MASK(0x3 8)
-#define SYSC_SIDLEMODE_MASK(0x3 3)
-#define SYSC_ENAWAKEUP_MASK(1 2)
-#define SYSC_SOFTRESET_MASK(1 1)
-#define SYSC_AUTOIDLE_MASK (1 0)
-
-#define SYSC_IDLEMODE_SMART0x2
-#define SYSC_CLOCKACTIVITY_FCLK0x2
-
/* Errata definitions */
#define I2C_OMAP_ERRATA_I207 (1 0)
#define I2C_OMAP3_1P153(1 1)
@@ -182,6 +169,7 @@ struct omap_i2c_dev {
u32 latency;/* maximum mpu wkup latency */
void(*set_mpu_wkup_lat)(struct device *dev,
long latency);
+ int (*device_reset)(struct device *dev);
u32 speed; /* Speed of bus in Khz */
u16 cmd_err;
u8 *buf;
@@ -312,65 +300,37 @@ static void omap_i2c_idle(struct omap_i2c_dev *dev)
}
}
+static inline void omap_i2c_reset(struct omap_i2c_dev *dev)
+{
+ if (!dev-device_reset)
+ return;
+
+ if (dev-device_reset(dev-dev) 0)
+ dev_err(dev-dev, reset failed\n);
+}
+
static int omap_i2c_init(struct omap_i2c_dev *dev)
{
u16 psc = 0, scll = 0, sclh = 0, buf = 0;
u16 fsscll = 0, fssclh = 0, hsscll = 0, hssclh = 0;
unsigned long fclk_rate = 1200;
- unsigned long timeout;
unsigned long internal_clk = 0;
struct clk *fclk;
struct omap_i2c_bus_platform_data *pdata;
pdata = dev-dev-platform_data;
- if (dev-rev = OMAP_I2C_OMAP1_REV_2) {
- /* Disable I2C controller before soft reset */
- omap_i2c_write_reg(dev, OMAP_I2C_CON_REG,
- omap_i2c_read_reg(dev, OMAP_I2C_CON_REG)
- ~(OMAP_I2C_CON_EN));
-
- omap_i2c_write_reg(dev, OMAP_I2C_SYSC_REG, SYSC_SOFTRESET_MASK);
- /* For some reason we need to set the EN bit before the
-* reset done bit gets set. */
- timeout = jiffies + OMAP_I2C_TIMEOUT;
- omap_i2c_write_reg(dev, OMAP_I2C_CON_REG, OMAP_I2C_CON_EN);
- while (!(omap_i2c_read_reg(dev, OMAP_I2C_SYSS_REG)
-SYSS_RESETDONE_MASK)) {
- if (time_after(jiffies, timeout)) {
- dev_warn(dev-dev, timeout waiting
- for controller reset\n);
- return -ETIMEDOUT;
- }
- msleep(1);
- }
-
- /* SYSC register is cleared by the reset; rewrite it */
- if (dev-rev == OMAP_I2C_REV_ON_2430) {
-
- omap_i2c_write_reg(dev, OMAP_I2C_SYSC_REG,
- SYSC_AUTOIDLE_MASK);
-
- } else if (dev-rev = OMAP_I2C_REV_ON_3430) {
- dev-syscstate = SYSC_AUTOIDLE_MASK;
- dev-syscstate |= SYSC_ENAWAKEUP_MASK;
- dev-syscstate |= (SYSC_IDLEMODE_SMART
- __ffs(SYSC_SIDLEMODE_MASK));
- dev-syscstate |= (SYSC_CLOCKACTIVITY_FCLK
- __ffs(SYSC_CLOCKACTIVITY_MASK));
-
- omap_i2c_write_reg(dev, OMAP_I2C_SYSC_REG,
- dev-syscstate);
- /*
-* Enabling all wakup sources to stop I2C freezing on
-* WFI instruction.
-* REVISIT: Some wkup sources might not be needed.
-
[PATCHv8 5/5] OMAP: I2C: Remove the SYSC register definition
The SYSC register should not accessed in the driver removing the
define from the driver.
Also clean up the syscstate from the omap_i2c_dev struct.
Acked-by: Santosh Shilimkar santosh.shilim...@ti.com
Signed-off-by: Shubhrajyoti D shubhrajy...@ti.com
---
drivers/i2c/busses/i2c-omap.c |5 -
1 files changed, 0 insertions(+), 5 deletions(-)
diff --git a/drivers/i2c/busses/i2c-omap.c b/drivers/i2c/busses/i2c-omap.c
index 70136a2..9dcd99b 100644
--- a/drivers/i2c/busses/i2c-omap.c
+++ b/drivers/i2c/busses/i2c-omap.c
@@ -63,7 +63,6 @@ enum {
OMAP_I2C_BUF_REG,
OMAP_I2C_CNT_REG,
OMAP_I2C_DATA_REG,
- OMAP_I2C_SYSC_REG,
OMAP_I2C_CON_REG,
OMAP_I2C_OA_REG,
OMAP_I2C_SA_REG,
@@ -187,7 +186,6 @@ struct omap_i2c_dev {
u16 scllstate;
u16 sclhstate;
u16 bufstate;
- u16 syscstate;
u16 westate;
u16 errata;
};
@@ -202,7 +200,6 @@ static const u8 reg_map_ip_v1[] = {
[OMAP_I2C_BUF_REG] = 0x05,
[OMAP_I2C_CNT_REG] = 0x06,
[OMAP_I2C_DATA_REG] = 0x07,
- [OMAP_I2C_SYSC_REG] = 0x08,
[OMAP_I2C_CON_REG] = 0x09,
[OMAP_I2C_OA_REG] = 0x0a,
[OMAP_I2C_SA_REG] = 0x0b,
@@ -223,7 +220,6 @@ static const u8 reg_map_ip_v2[] = {
[OMAP_I2C_BUF_REG] = 0x94,
[OMAP_I2C_CNT_REG] = 0x98,
[OMAP_I2C_DATA_REG] = 0x9c,
- [OMAP_I2C_SYSC_REG] = 0x10,
[OMAP_I2C_CON_REG] = 0xa4,
[OMAP_I2C_OA_REG] = 0xa8,
[OMAP_I2C_SA_REG] = 0xac,
@@ -264,7 +260,6 @@ static void omap_i2c_unidle(struct omap_i2c_dev *dev)
omap_i2c_write_reg(dev, OMAP_I2C_SCLL_REG, dev-scllstate);
omap_i2c_write_reg(dev, OMAP_I2C_SCLH_REG, dev-sclhstate);
omap_i2c_write_reg(dev, OMAP_I2C_BUF_REG, dev-bufstate);
- omap_i2c_write_reg(dev, OMAP_I2C_SYSC_REG, dev-syscstate);
omap_i2c_write_reg(dev, OMAP_I2C_WE_REG, dev-westate);
omap_i2c_write_reg(dev, OMAP_I2C_CON_REG, OMAP_I2C_CON_EN);
}
--
1.7.1
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Re: [PATCH 63/65] OMAPDSS: APPLY: add checking of ovls/mgrs settings
On Tue, 2011-12-13 at 15:32 +0530, Archit Taneja wrote: Hi, On Thursday 08 December 2011 01:59 PM, Tomi Valkeinen wrote: On Wed, 2011-12-07 at 18:35 +0530, Archit Taneja wrote: Hi, On Tuesday 22 November 2011 02:52 PM, Tomi Valkeinen wrote: Add checks for overlay and manager settings. The checks are a bit complex, as we need to observe the bigger picture instead of overlays and managers independently. Things like the used display and the zorder of other overlays affect the validity of the settings. Minor comment: dss_ovl_check, dss_mgr_check and dss_mgr_check_zorder don't really qualify as functions which do actual applying of configurations, they could be moved from apply.c to manager.c and overlay.c. I had the check functions in apply.c because they used apply.c's internal datastructures. However, looking the functions now, only dss_mgr_check_zorder() used the internal datas, and the function doesn't even use those variables for anything =). Also, the function dss_mgr_check() takes 'struct omap_overlay_manager_info *info' as a parameter but doesn't use it. We might want to remove that too. Right. And the dss_ovl/mgr_simple_check() functions could also be moved outside apply.c. Tomi signature.asc Description: This is a digitally signed message part
Re: [PATCH 0/3] OMAPDSS: Miscellaneous Fixes
On Mon, 2011-12-12 at 11:47 +0530, Archit Taneja wrote: These are some minor fixes for DSS2. Based on Tomi's master branch in: git://gitorious.org/linux-omap-dss2/linux.git Archit Taneja (3): OMAPDSS: DSI: Fix HSDIV related PLL info in dsi_dump_clocks() OMAPDSS: Panel NEC: Set omap_dss_device states correctly OMAPDSS: Displays: Make PICODLP driver depend on DPI drivers/video/omap2/displays/Kconfig |2 +- .../omap2/displays/panel-nec-nl8048hl11-01b.c | 61 +--- drivers/video/omap2/dss/dsi.c | 14 +++-- 3 files changed, 61 insertions(+), 16 deletions(-) I think these are fine. Applying to DSS tree. Thanks! Tomi signature.asc Description: This is a digitally signed message part
Re: [PATCH v8 00/20] OMAP2+: UART: Runtime adaptation + cleanup
Hi Tony/kevin, On Fri, Nov 11, 2011 at 3:27 PM, Govindraj.R govindraj.r...@ti.com wrote: Converting uart driver to adapt to pm runtime API's. Code re-org + cleanup. Moving some functionality from serial.c to omap-serial.c Changes involves: 1.) Cleaning up certain uart calls from sram_idle func. 2.) Removed all types of uart clock handling code from serial.c 3.) Using hwmod_mux API enable wakeup capability for uart pad during hwmod_idle state i.e., when uart clocks are disabled we can enable io-pad wakeup capability for uart if mux_data is available for given uart. Also during during resume from idle call to uart we need to enable clocks back conditionally and this can be done only when io-pad wakeup event bit is set for uart_rx pad. So we need a hwmod API which can probe the uart pad and let us know whether a uart wakeup happened. So omap_hmwod_pad_wakeup_status API is added to meet this requirement. 3.) Adapted omap-serial driver to use runtime API's. 4.) Modify serial_init calls to accept uart parameters from board file. Like dma_usage, rx_timeout, dma_rx_pollrate, auto_suspend_timeout etc. 5.) Use the omap_prm driver with irq_chaining to wake up uart after clocks are cut. Patch series is based on 3.2-rc1. Patch series depends on *Tero's v9 Irq_chaining patches*. Dependent irq_chaining patches are as below. 89ac62b omap3+: add omap prm driver initialization 170431f OMAP3: pm: do not enable PRCM MPU interrupts manually 9aba1b0 omap3: pm: use prcm chain handler 435481f OMAP2+: mux: add support for PAD wakeup interrupts 5b2d361 mfd: omap-prm: added suspend prepare and complete callbacks aa55c41 mfd: omap-prm: added chain interrupt handler d1db904 mfd: omap-prm: add driver skeleton 31d056c TEMP: OMAP4xxx: hwmod data: add PRM hwmod 19ec3bc TEMP: OMAP3xxx: hwmod data: add PRM hwmod 9a89688 OMAP2+: hwmod: Add API to check IO PAD wakeup status 78e8b65 OMAP2+: hwmod: Add API to enable IO ring wakeup. Same combination is hosted at: git://gitorious.org/runtime_3-0/runtime_3-0.git 3.2-rc1_uart_runtime Ensure CONFIG_OMAP_PRM is set while testing irq_chaining with uart. And for pm_qos usage ensure CONFIG_CPU_IDLE is selected other wise console might be sluggish. I have re-based this patch series against LO master commit id: deee6d5359969a0ce4e2760cfd7b9f379bd5698a Same is available here [1] I have tested this patch series along with: 1.) Tero's V11 irq chaining series http://www.spinics.net/lists/linux-omap/msg61445.html (This patch series is used for uart wakeup handling using prcm_irq chaining) 2.) Rajendra's hwmod change http://www.spinics.net/lists/arm-kernel/msg148632.html (This patch handles init_no_idle flag setting without this patch there will be boot warning however all pm features will work after boot up.) 3.) Vishwa's io daisy chain changes. http://permalink.gmane.org/gmane.linux.ports.arm.omap/65500 (tested with and without this patch series pm features works). Same combination of patches based on above commit id used for testing is available here [2]. -- Thanks, Govindraj.R [1]: git://gitorious.org/runtime_3-0/runtime_3-0.git for_3_3/lo_rc4_uartruntime [2]: git://gitorious.org/runtime_3-0/runtime_3-0.git for_3_3/tmp_rc4_uart_pm_intg Changes from v7: --- http://www.mail-archive.com/linux-omap@vger.kernel.org/msg57804.html http://www.mail-archive.com/linux-omap@vger.kernel.org/msg58209.html http://www.spinics.net/lists/linux-omap/msg59978.html http://www.spinics.net/lists/linux-serial/msg04772.html Testing updates: OMAP2420/2430SDP: Boot tested. OMAP3430SDP: retention, off_mode, system_wide suspend is tested. (earlyprintk no_console_suspend checked) OMAP3630 - Zoom3: pm-retention checked with quart/omap-uart3 [Also tested with uart3 as console uart and pm-ret checked] BeagleBoard XM Rev C(3630): retention, off_mode, system_wide suspend is tested. Deepak K (1): OMAP2+: UART: Allow UART parameters to be configured from board file. Govindraj.R (18): OMAP2+: UART: cleanup + remove uart pm specific API OMAP2+: UART: cleanup 8250 console driver support OMAP2+: UART: Cleanup part of clock gating mechanism for uart OMAP2+: UART: Add default mux for all uarts. OMAP2+: UART: Remove mapbase/membase fields from pdata. OMAP2+: UART: Add runtime pm support for omap-serial driver OMAP2+: UART: Remove context_save and move context restore to driver OMAP2+: UART: Ensure all reg values configured are available from port structure OMAP2+: UART: Remove uart reset function. OMAP2+: UART: Get context loss count to context restore OMAP2+: UART: Move errata handling from serial.c to omap-serial OMAP2+: UART: Add wakeup mechanism for omap-uarts OMAP2+: UART: Remove old and unused clocks handling funcs OMAP2+: UART: remove temporary variable used to count uart instance OMAP2+: UART: Use custom
Trying to boot Panda with DT
Hi,
I'm trying to boot Pandaboard ES with DT, but failing. I've debugged the
problem enough to see that the bootloader properly loads the DT blob,
and passes it to the kernel, but the kernel sees only garbage at that
address, and the devtree-magic check fails in setup_machine_fdt(). I
presume something overwrites it.
I'm using Pandaboard ES (so omap 4460), Benoit's
for_3.3/1_omap_dt_i2c_twl_test branch, u-boot from Linaro
(git://git.linaro.org/boot/u-boot-linaro-stable.git master). My u-boot
boot-script is below.
Should the setup work? What setup do you have? Any ideas what could be
wrong?
Tomi
u-boot boot script:
---
set netmask 255.255.255.0
set ipaddr 192.168.1.15
set serverip 192.168.1.1
set kaddr 0x8200
set dtbaddr 0x8500
set bootcmd 'tftpboot ${kaddr} uImage; tftpboot ${dtbaddr} omap4-panda.dtb; fdt
addr ${dtbaddr}; fdt resize; bootm ${kaddr} - ${dtbaddr}'
set bootargs 'console=ttyO2,115200n8 root=/dev/nfs
nfsroot=192.168.1.1:/tftpboot/rootfs,tcp,nolock,rsize=1024,wsize=1024
ip=192.168.1.15:eth0: vram=36M rootdelay=1 no_console_suspend debug
earlyprintk console loglevel=8'
usb start
boot
boot log (with added debug prints)
--
## Booting kernel from Legacy Image at 8200 ...
Image Name: Linux-3.2.0-rc1-00014-g4d66c8f-d
Image Type: ARM Linux Kernel Image (uncompressed)
Data Size:3664960 Bytes = 3.5 MiB
Load Address: 80008000
Entry Point: 80008000
Verifying Checksum ... OK
## Flattened Device Tree blob at 8500
Booting using the fdt blob at 0x8500
Loading Kernel Image ... OK
OK
reserving fdt memory region: addr=9d00 size=300
reserving fdt memory region: addr=8500 size=1000
Loading Device Tree to bfef3000, end bfef6fff ... OK
Starting kernel ...
Uncompressing Linux... done, booting the kernel.
DT phys bfef3000, virt ffef3000
illegal DT magic
Warning: Neither atags nor dtb found
signature.asc
Description: This is a digitally signed message part
Re: Interrupt issue in twl4030_keypad
On Mon, Dec 12, 2011 at 10:55 PM, Felipe Contreras felipe.contre...@gmail.com wrote: On Mon, Dec 12, 2011 at 9:12 PM, Felipe Balbi ba...@ti.com wrote: On Mon, Dec 12, 2011 at 08:30:49PM +0200, Felipe Contreras wrote: The short version is this: either we revert this patch[1], or we apply this patch series[2], as well as its essential fixes[3]. The long version is this. There's a synchronization issue with the current keypad driver and twl core; the irq is marked as handled even though the thread that is supposed to handle it hasn't run yet, and since it's clear-on-read, and it hasn't been read, it's detected again, so they keypad driver receives two interrupt callbacks instead of one, and in the second one reads nothing from the i2c register, so a key release is assumed. This makes key-presses as simple as shift+a impossible. In other words, it's totally unreliable. This might not be isolated to the keypard driver, but other nested interrupts from twl core that started using request_threaded_irq prematurely (before it was supported by the twl core). But at least I haven't tried those. This patch was applied on 2.6.33, which means all versions before 3.2 are affected, including 3.1. What do you think about fixing this on stable kernels? I believe Samuel has already applied those to the MFD tree. Yeap, I think Linus' tree is going to be fine (3.2), but I'm trying to find out what to do with previous kernels: as in, what should be done for stable trees. I only see this in his -next branch, so 3.2 is still affected. -- Gražvydas -- To unsubscribe from this list: send the line unsubscribe linux-omap in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
Re: Trying to boot Panda with DT
On Tuesday 13 December 2011 06:33 PM, Tomi Valkeinen wrote:
Hi,
I'm trying to boot Pandaboard ES with DT, but failing. I've debugged the
problem enough to see that the bootloader properly loads the DT blob,
and passes it to the kernel, but the kernel sees only garbage at that
address, and the devtree-magic check fails in setup_machine_fdt(). I
presume something overwrites it.
I'm using Pandaboard ES (so omap 4460), Benoit's
for_3.3/1_omap_dt_i2c_twl_test branch, u-boot from Linaro
(git://git.linaro.org/boot/u-boot-linaro-stable.git master). My u-boot
I used the u-boot from here and it worked fine for me, not sure if its
any different.
git://git.secretlab.ca/git/u-boot devicetree/linaro-stable
boot-script is below.
Should the setup work? What setup do you have? Any ideas what could be
wrong?
Tomi
u-boot boot script:
---
set netmask 255.255.255.0
set ipaddr 192.168.1.15
set serverip 192.168.1.1
set kaddr 0x8200
set dtbaddr 0x8500
set bootcmd 'tftpboot ${kaddr} uImage; tftpboot ${dtbaddr} omap4-panda.dtb; fdt
addr ${dtbaddr}; fdt resize; bootm ${kaddr} - ${dtbaddr}'
set bootargs 'console=ttyO2,115200n8 root=/dev/nfs
nfsroot=192.168.1.1:/tftpboot/rootfs,tcp,nolock,rsize=1024,wsize=1024
ip=192.168.1.15:eth0: vram=36M rootdelay=1 no_console_suspend debug
earlyprintk console loglevel=8'
usb start
boot
boot log (with added debug prints)
--
## Booting kernel from Legacy Image at 8200 ...
Image Name: Linux-3.2.0-rc1-00014-g4d66c8f-d
Image Type: ARM Linux Kernel Image (uncompressed)
Data Size:3664960 Bytes = 3.5 MiB
Load Address: 80008000
Entry Point: 80008000
Verifying Checksum ... OK
## Flattened Device Tree blob at 8500
Booting using the fdt blob at 0x8500
Loading Kernel Image ... OK
OK
reserving fdt memory region: addr=9d00 size=300
reserving fdt memory region: addr=8500 size=1000
Loading Device Tree to bfef3000, end bfef6fff ... OK
Starting kernel ...
Uncompressing Linux... done, booting the kernel.
DT phys bfef3000, virt ffef3000
illegal DT magic
Warning: Neither atags nor dtb found
--
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Re: Trying to boot Panda with DT
Hi Tomi,
On 12/13/2011 2:03 PM, Tomi Valkeinen wrote:
Hi,
I'm trying to boot Pandaboard ES with DT, but failing. I've debugged the
problem enough to see that the bootloader properly loads the DT blob,
and passes it to the kernel, but the kernel sees only garbage at that
address, and the devtree-magic check fails in setup_machine_fdt(). I
presume something overwrites it.
I'm using Pandaboard ES (so omap 4460), Benoit's
for_3.3/1_omap_dt_i2c_twl_test branch, u-boot from Linaro
(git://git.linaro.org/boot/u-boot-linaro-stable.git master). My u-boot
boot-script is below.
I've just sent a patch to add the default DT config for OMAP. It will
add these config into the OMAP2plus Kconfig.
+ select USE_OF
+ select ARM_APPENDED_DTB
+ select ARM_ATAG_DTB_COMPAT
+ select PROC_DEVICETREE
In theory ARM_APPENDED_DTB and ARM_ATAG_DTB_COMPAT should not be needed
in your case but only for legacy u-boot.
It should not messed up the DT in case of DT aware uboot, but it worst
checking if this is the case.
Should the setup work? What setup do you have? Any ideas what could be
wrong?
I'm still using a legacy u-boot with the appended option and it works
fine with the previous config.
Rajendra should use the setting you are trying to use.
Regards,
Benoit
Tomi
u-boot boot script:
---
set netmask 255.255.255.0
set ipaddr 192.168.1.15
set serverip 192.168.1.1
set kaddr 0x8200
set dtbaddr 0x8500
set bootcmd 'tftpboot ${kaddr} uImage; tftpboot ${dtbaddr} omap4-panda.dtb; fdt
addr ${dtbaddr}; fdt resize; bootm ${kaddr} - ${dtbaddr}'
set bootargs 'console=ttyO2,115200n8 root=/dev/nfs
nfsroot=192.168.1.1:/tftpboot/rootfs,tcp,nolock,rsize=1024,wsize=1024
ip=192.168.1.15:eth0: vram=36M rootdelay=1 no_console_suspend debug
earlyprintk console loglevel=8'
usb start
boot
boot log (with added debug prints)
--
## Booting kernel from Legacy Image at 8200 ...
Image Name: Linux-3.2.0-rc1-00014-g4d66c8f-d
Image Type: ARM Linux Kernel Image (uncompressed)
Data Size:3664960 Bytes = 3.5 MiB
Load Address: 80008000
Entry Point: 80008000
Verifying Checksum ... OK
## Flattened Device Tree blob at 8500
Booting using the fdt blob at 0x8500
Loading Kernel Image ... OK
OK
reserving fdt memory region: addr=9d00 size=300
reserving fdt memory region: addr=8500 size=1000
Loading Device Tree to bfef3000, end bfef6fff ... OK
Starting kernel ...
Uncompressing Linux... done, booting the kernel.
DT phys bfef3000, virt ffef3000
illegal DT magic
Warning: Neither atags nor dtb found
--
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Re: Trying to boot Panda with DT
On Tue, 2011-12-13 at 18:49 +0530, Rajendra Nayak wrote: On Tuesday 13 December 2011 06:33 PM, Tomi Valkeinen wrote: Hi, I'm trying to boot Pandaboard ES with DT, but failing. I've debugged the problem enough to see that the bootloader properly loads the DT blob, and passes it to the kernel, but the kernel sees only garbage at that address, and the devtree-magic check fails in setup_machine_fdt(). I presume something overwrites it. I'm using Pandaboard ES (so omap 4460), Benoit's for_3.3/1_omap_dt_i2c_twl_test branch, u-boot from Linaro (git://git.linaro.org/boot/u-boot-linaro-stable.git master). My u-boot I used the u-boot from here and it worked fine for me, not sure if its any different. git://git.secretlab.ca/git/u-boot devicetree/linaro-stable That tree looks quite different than the linaro's one. But appending the DT blob to the uImage seems to work fine for me, so I'll take that to use. Tomi signature.asc Description: This is a digitally signed message part
Re: Trying to boot Panda with DT
On Tuesday 13 December 2011 06:50 PM, Cousson, Benoit wrote: I've just sent a patch to add the default DT config for OMAP. It will add these config into the OMAP2plus Kconfig. +select USE_OF +select ARM_APPENDED_DTB +select ARM_ATAG_DTB_COMPAT +select PROC_DEVICETREE In theory ARM_APPENDED_DTB and ARM_ATAG_DTB_COMPAT should not be needed in your case but only for legacy u-boot. It should not messed up the DT in case of DT aware uboot, but it worst checking if this is the case. I don't think thats a problem as I have those options enabled and am able to boot with the DT aware uboot. -- To unsubscribe from this list: send the line unsubscribe linux-omap in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
Re: [PATCH 1/3] ARM: OMAP2+: kconfig: Enable devicetree by default for OMAP2+ systems
Hi, On Tue, 2011-12-06 at 17:49 +0100, Benoit Cousson wrote: devicetree will become the mandatory boot method for OMAP2+. In order to avoid cluttering the OMAP code with #ifdef CONFIG_OF, select USE_OF by default for every OMAP2+ systems. Select as well the APPENDED_DTB and ATAG_DTB_COMPAT to allow legacy boot loader to keep working properly. APPENDED_DTB sounds a bit dangerous to be enabled by default according to the config help text. Tomi signature.asc Description: This is a digitally signed message part
Re: Trying to boot Panda with DT
On 12/13/2011 2:25 PM, Rajendra Nayak wrote: On Tuesday 13 December 2011 06:50 PM, Cousson, Benoit wrote: I've just sent a patch to add the default DT config for OMAP. It will add these config into the OMAP2plus Kconfig. + select USE_OF + select ARM_APPENDED_DTB + select ARM_ATAG_DTB_COMPAT + select PROC_DEVICETREE In theory ARM_APPENDED_DTB and ARM_ATAG_DTB_COMPAT should not be needed in your case but only for legacy u-boot. It should not messed up the DT in case of DT aware uboot, but it worst checking if this is the case. I don't think thats a problem as I have those options enabled and am able to boot with the DT aware uboot. OK cool, I was not sure but that's much better... Let's assume that this is due to a broken u-boot then :-) Thanks, Benoit -- To unsubscribe from this list: send the line unsubscribe linux-omap in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
[PATCH 0/3] OMAPDSS: HDMI: HDMI Hot-plug detect support.
From: Mythri P K mythr...@ti.com HDMI even if enabled by default should be powered on only when the cable is connected. This is supported by the Hot-plug feature. Now when HDMI is enabled the following steps are followed: -Display enable for HDMI is based on Hot-plug-detect(HPD). -It registers to the GPIO irq handler and checks if cable is connected, -If yes then it turns on HDMI -If an HPD interrupt is received the corresponding IRQ handler is called where it checks if it is a connect / disconnect based on which appropriate action is taken. Mythri P K (3): OMAPDSS: HDMI: HPD support in boardfile OMAPDSS: HDMI: HPD support added to HDMI driver OMAPDSS: HDMI: Add option to enable HDMI in HPD mode arch/arm/mach-omap2/board-4430sdp.c| 35 arch/arm/mach-omap2/board-omap4panda.c | 35 - arch/arm/mach-omap2/display.c | 20 ++-- drivers/video/omap2/dss/dss.h |2 + drivers/video/omap2/dss/hdmi.c | 92 ++- drivers/video/omap2/dss/hdmi_panel.c | 54 ++- include/video/omapdss.h| 10 +++- 7 files changed, 176 insertions(+), 72 deletions(-) -- 1.7.5.4 -- To unsubscribe from this list: send the line unsubscribe linux-omap in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
[PATCH 1/3] OMAPDSS: HDMI: HPD support in boardfile
From: Mythri P K mythr...@ti.com
Add support for HPD GPIO configuration in board file.
Also remove the enabling of GPIO's required for HDMI from
hdmi driver file to display.c based on the GPIO #'s sent from
board file.
Signed-off-by: Mythri P K mythr...@ti.com
---
arch/arm/mach-omap2/board-4430sdp.c| 35 ++-
arch/arm/mach-omap2/board-omap4panda.c | 35 +--
arch/arm/mach-omap2/display.c | 20 ++---
drivers/video/omap2/dss/hdmi.c | 16 +-
include/video/omapdss.h|6 -
5 files changed, 43 insertions(+), 69 deletions(-)
diff --git a/arch/arm/mach-omap2/board-4430sdp.c
b/arch/arm/mach-omap2/board-4430sdp.c
index 1b7c5e5..ba32b81 100644
--- a/arch/arm/mach-omap2/board-4430sdp.c
+++ b/arch/arm/mach-omap2/board-4430sdp.c
@@ -52,8 +52,9 @@
#define ETH_KS8851_QUART 138
#define OMAP4_SFH7741_SENSOR_OUTPUT_GPIO 184
#define OMAP4_SFH7741_ENABLE_GPIO 188
-#define HDMI_GPIO_HPD 60 /* Hot plug pin for HDMI */
+#define HDMI_GPIO_CT_CP_HPD 60 /* Hot plug pin for HDMI */
#define HDMI_GPIO_LS_OE 41 /* Level shifter for HDMI */
+#define HDMI_GPIO_HPD 63
#define DISPLAY_SEL_GPIO 59 /* LCD2/PicoDLP switch */
#define DLP_POWER_ON_GPIO 40
@@ -596,27 +597,11 @@ static void __init omap_sfh7741prox_init(void)
}
static struct gpio sdp4430_hdmi_gpios[] = {
- { HDMI_GPIO_HPD,GPIOF_OUT_INIT_HIGH,hdmi_gpio_hpd },
- { HDMI_GPIO_LS_OE, GPIOF_OUT_INIT_HIGH,hdmi_gpio_ls_oe },
+ {HDMI_GPIO_CT_CP_HPD, GPIOF_OUT_INIT_HIGH,hdmi_gpio_ct_cp_hpd },
+ {HDMI_GPIO_LS_OE, GPIOF_OUT_INIT_HIGH,hdmi_gpio_ls_oe },
+ {HDMI_GPIO_HPD, GPIOF_DIR_IN,hdmi_gpio_hpd },
};
-static int sdp4430_panel_enable_hdmi(struct omap_dss_device *dssdev)
-{
- int status;
-
- status = gpio_request_array(sdp4430_hdmi_gpios,
- ARRAY_SIZE(sdp4430_hdmi_gpios));
- if (status)
- pr_err(%s: Cannot request HDMI GPIOs\n, __func__);
-
- return status;
-}
-
-static void sdp4430_panel_disable_hdmi(struct omap_dss_device *dssdev)
-{
- gpio_free(HDMI_GPIO_LS_OE);
- gpio_free(HDMI_GPIO_HPD);
-}
static struct nokia_dsi_panel_data dsi1_panel = {
.name = taal,
@@ -735,9 +720,8 @@ static struct omap_dss_device sdp4430_hdmi_device = {
.name = hdmi,
.driver_name = hdmi_panel,
.type = OMAP_DISPLAY_TYPE_HDMI,
- .platform_enable = sdp4430_panel_enable_hdmi,
- .platform_disable = sdp4430_panel_disable_hdmi,
.channel = OMAP_DSS_CHANNEL_DIGIT,
+ .hpd_gpio = 63,
};
static struct picodlp_panel_data sdp4430_picodlp_pdata = {
@@ -835,9 +819,12 @@ static void omap_4430sdp_display_init(void)
* EDID read failure.
*/
if (cpu_is_omap446x() || (omap_rev() OMAP4430_REV_ES2_2))
- omap_hdmi_init(OMAP_HDMI_EXTERNAL_PULLUP);
+ omap_hdmi_init(OMAP_HDMI_EXTERNAL_PULLUP, HDMI_GPIO_HPD,
+ sdp4430_hdmi_gpios,
+ ARRAY_SIZE(sdp4430_hdmi_gpios));
else
- omap_hdmi_init(0);
+ omap_hdmi_init(0, HDMI_GPIO_HPD, sdp4430_hdmi_gpios,
+ ARRAY_SIZE(sdp4430_hdmi_gpios));
}
#ifdef CONFIG_OMAP_MUX
diff --git a/arch/arm/mach-omap2/board-omap4panda.c
b/arch/arm/mach-omap2/board-omap4panda.c
index 212e06c..e13d116 100644
--- a/arch/arm/mach-omap2/board-omap4panda.c
+++ b/arch/arm/mach-omap2/board-omap4panda.c
@@ -51,8 +51,9 @@
#define GPIO_HUB_NRESET62
#define GPIO_WIFI_PMENA43
#define GPIO_WIFI_IRQ 53
-#define HDMI_GPIO_HPD 60 /* Hot plug pin for HDMI */
+#define HDMI_GPIO_CT_CP_HPD 60 /* Hot plug pin for HDMI */
#define HDMI_GPIO_LS_OE 41 /* Level shifter for HDMI */
+#define HDMI_GPIO_HPD 63
/* wl127x BT, FM, GPS connectivity chip */
static int wl1271_gpios[] = {46, -1, -1};
@@ -479,35 +480,17 @@ int __init omap4_panda_dvi_init(void)
}
static struct gpio panda_hdmi_gpios[] = {
- { HDMI_GPIO_HPD,GPIOF_OUT_INIT_HIGH, hdmi_gpio_hpd },
- { HDMI_GPIO_LS_OE, GPIOF_OUT_INIT_HIGH, hdmi_gpio_ls_oe },
+ {HDMI_GPIO_CT_CP_HPD, GPIOF_OUT_INIT_HIGH,hdmi_gpio_ct_cp_hpd },
+ {HDMI_GPIO_LS_OE, GPIOF_OUT_INIT_HIGH,hdmi_gpio_ls_oe },
+ {HDMI_GPIO_HPD, GPIOF_DIR_IN,hdmi_gpio_hpd },
};
-static int omap4_panda_panel_enable_hdmi(struct omap_dss_device *dssdev)
-{
- int status;
-
- status = gpio_request_array(panda_hdmi_gpios,
- ARRAY_SIZE(panda_hdmi_gpios));
- if (status)
- pr_err(Cannot request HDMI GPIOs\n);
-
- return status;
-}
-
-static void omap4_panda_panel_disable_hdmi(struct omap_dss_device *dssdev)
-{
- gpio_free(HDMI_GPIO_LS_OE);
-
[PATCH 3/3] OMAPDSS: HDMI: Add option to enable HDMI in HPD mode
From: Mythri P K mythr...@ti.com
Add option in the panel to enable HDMI in HPD mode to enable the interrupt to
detect cable connect/disconnect, HDMI will be powered on only when the cable is
connected and powered down when cable is disconnected.
Signed-off-by: Mythri P K mythr...@ti.com
---
drivers/video/omap2/dss/hdmi_panel.c | 54 --
include/video/omapdss.h |1 +
2 files changed, 52 insertions(+), 3 deletions(-)
diff --git a/drivers/video/omap2/dss/hdmi_panel.c
b/drivers/video/omap2/dss/hdmi_panel.c
index 533d5dc..0b8a8ac 100644
--- a/drivers/video/omap2/dss/hdmi_panel.c
+++ b/drivers/video/omap2/dss/hdmi_panel.c
@@ -61,7 +61,7 @@ static int hdmi_panel_enable(struct omap_dss_device *dssdev)
mutex_lock(hdmi.hdmi_lock);
- if (dssdev-state != OMAP_DSS_DISPLAY_DISABLED) {
+ if (dssdev-state == OMAP_DSS_DISPLAY_ACTIVE) {
r = -EINVAL;
goto err;
}
@@ -222,11 +222,57 @@ err:
return r;
}
+static void hdmi_hpd_disable(struct omap_dss_device *dssdev)
+{
+ mutex_lock(hdmi.hdmi_lock);
+
+ if (dssdev-state == OMAP_DSS_DISPLAY_ACTIVE ||
+ dssdev-state == OMAP_DSS_DISPLAY_HOTPLUG)
+ omapdss_hdmi_hpd_disable(dssdev);
+
+ dssdev-state = OMAP_DSS_DISPLAY_DISABLED;
+
+ mutex_unlock(hdmi.hdmi_lock);
+}
+
+static int hdmi_hpd_enable(struct omap_dss_device *dssdev)
+{
+ int r = 0;
+ DSSDBG(ENTER hdmi_hpd_enable\n);
+
+ mutex_lock(hdmi.hdmi_lock);
+
+ if (dssdev-state != OMAP_DSS_DISPLAY_DISABLED) {
+ r = -EINVAL;
+ goto err;
+ }
+
+ r = omapdss_hdmi_hpd_enable(dssdev);
+
+ if (r 0) {
+ DSSERR(failed to power on\n);
+ goto err;
+ } else if (r == 1) {
+ r = omapdss_hdmi_display_enable(dssdev);
+ if (r) {
+ DSSERR(failed to power on\n);
+ goto err;
+ }
+ dssdev-state = OMAP_DSS_DISPLAY_ACTIVE;
+ } else {
+ dssdev-state = OMAP_DSS_DISPLAY_HOTPLUG;
+ }
+
+err: mutex_unlock(hdmi.hdmi_lock);
+
+ return r;
+}
+
static struct omap_dss_driver hdmi_driver = {
.probe = hdmi_panel_probe,
.remove = hdmi_panel_remove,
- .enable = hdmi_panel_enable,
- .disable= hdmi_panel_disable,
+ .enable = hdmi_hpd_enable,
+ .disable= hdmi_hpd_disable,
.suspend= hdmi_panel_suspend,
.resume = hdmi_panel_resume,
.get_timings= hdmi_get_timings,
@@ -234,6 +280,8 @@ static struct omap_dss_driver hdmi_driver = {
.check_timings = hdmi_check_timings,
.read_edid = hdmi_read_edid,
.detect = hdmi_detect,
+ .default_enable = hdmi_panel_enable,
+ .default_disable = hdmi_panel_disable,
.driver = {
.name = hdmi_panel,
.owner = THIS_MODULE,
diff --git a/include/video/omapdss.h b/include/video/omapdss.h
index 82e2c3e..5623a34 100644
--- a/include/video/omapdss.h
+++ b/include/video/omapdss.h
@@ -159,6 +159,7 @@ enum omap_dss_display_state {
OMAP_DSS_DISPLAY_DISABLED = 0,
OMAP_DSS_DISPLAY_ACTIVE,
OMAP_DSS_DISPLAY_SUSPENDED,
+ OMAP_DSS_DISPLAY_HOTPLUG,
};
/* XXX perhaps this should be removed */
--
1.7.5.4
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[PATCH 2/3] OMAPDSS: HDMI: HPD support added to HDMI driver
From: Mythri P K mythr...@ti.com
GPIO based handling of connect/disconnect of the HDMI cable
(Hot-plug detect)is added to the HDMI driver.
Signed-off-by: Mythri P K mythr...@ti.com
---
drivers/video/omap2/dss/dss.h |2 +
drivers/video/omap2/dss/hdmi.c | 76
include/video/omapdss.h|3 ++
3 files changed, 81 insertions(+), 0 deletions(-)
diff --git a/drivers/video/omap2/dss/dss.h b/drivers/video/omap2/dss/dss.h
index 6308fc5..c1279a3 100644
--- a/drivers/video/omap2/dss/dss.h
+++ b/drivers/video/omap2/dss/dss.h
@@ -498,6 +498,8 @@ int omapdss_hdmi_display_check_timing(struct
omap_dss_device *dssdev,
struct omap_video_timings *timings);
int omapdss_hdmi_read_edid(u8 *buf, int len);
bool omapdss_hdmi_detect(void);
+int omapdss_hdmi_hpd_enable(struct omap_dss_device *dssdev);
+void omapdss_hdmi_hpd_disable(struct omap_dss_device *dssdev);
int hdmi_panel_init(void);
void hdmi_panel_exit(void);
diff --git a/drivers/video/omap2/dss/hdmi.c b/drivers/video/omap2/dss/hdmi.c
index 36a7541..1fe8e84 100644
--- a/drivers/video/omap2/dss/hdmi.c
+++ b/drivers/video/omap2/dss/hdmi.c
@@ -67,9 +67,12 @@ static struct {
struct mutex lock;
struct omap_display_platform_data *pdata;
struct platform_device *pdev;
+ struct omap_dss_device *dssdev;
+
struct hdmi_ip_data ip_data;
int code;
int mode;
+ int hpd;
struct clk *sys_clk;
} hdmi;
@@ -454,6 +457,32 @@ void hdmi_dump_regs(struct seq_file *s)
mutex_unlock(hdmi.lock);
}
+static int hdmi_get_current_hpd(void)
+{
+ return gpio_get_value(hdmi.dssdev-hpd_gpio);
+}
+
+static irqreturn_t hpd_enable_handler(int irq, void *ptr)
+{
+ DSSDBG(hpd enable %d\n, hdmi.hpd);
+
+ if (hdmi.hpd)
+ hdmi.dssdev-driver-default_enable(hdmi.dssdev);
+ else
+ hdmi.dssdev-driver-default_disable(hdmi.dssdev);
+
+ return IRQ_HANDLED;
+}
+
+static irqreturn_t hpd_irq_handler(int irq, void *ptr)
+{
+ hdmi.hpd = hdmi_get_current_hpd();
+
+ DSSDBG(hpd %d\n, hdmi.hpd);
+
+ return IRQ_WAKE_THREAD;
+}
+
int omapdss_hdmi_read_edid(u8 *buf, int len)
{
int r;
@@ -488,6 +517,41 @@ bool omapdss_hdmi_detect(void)
return r == 1;
}
+void omapdss_hdmi_hpd_disable(struct omap_dss_device *dssdev)
+{
+ DSSDBG(Enter hdmi_hpd_disable\n);
+
+ if (hdmi.dssdev)
+ free_irq(gpio_to_irq(hdmi.dssdev-hpd_gpio), hpd_irq_handler);
+
+ mutex_unlock(hdmi.lock);
+}
+
+int omapdss_hdmi_hpd_enable(struct omap_dss_device *dssdev)
+{
+ int r = 0;
+
+ DSSDBG(ENTER hdmi_hpd_enable\n);
+
+ mutex_lock(hdmi.lock);
+
+ r = request_threaded_irq(gpio_to_irq(hdmi.dssdev-hpd_gpio),
+ hpd_irq_handler, hpd_enable_handler,
+ IRQF_DISABLED | IRQF_TRIGGER_RISING |
+ IRQF_TRIGGER_FALLING, hpd, NULL);
+ if (r 0) {
+ pr_err(hdmi: request_irq %d failed\n,
+ gpio_to_irq(hdmi.dssdev-hpd_gpio));
+ return -EINVAL;
+ }
+
+ r = hdmi_get_current_hpd();
+
+ mutex_unlock(hdmi.lock);
+
+ return r;
+}
+
int omapdss_hdmi_display_enable(struct omap_dss_device *dssdev)
{
int r = 0;
@@ -733,12 +797,24 @@ static int omapdss_hdmihw_probe(struct platform_device
*pdev)
{
struct resource *hdmi_mem;
int r;
+ struct omap_dss_board_info *board_data;
hdmi.pdata = pdev-dev.platform_data;
hdmi.pdev = pdev;
mutex_init(hdmi.lock);
+ /* save reference to HDMI device */
+ board_data = hdmi.pdata-board_data;
+ for (r = 0; r board_data-num_devices; r++) {
+ if (board_data-devices[r]-type == OMAP_DISPLAY_TYPE_HDMI)
+ hdmi.dssdev = board_data-devices[r];
+ }
+ if (!hdmi.dssdev) {
+ DSSERR(can't get HDMI device\n);
+ return -EINVAL;
+ }
+
hdmi_mem = platform_get_resource(hdmi.pdev, IORESOURCE_MEM, 0);
if (!hdmi_mem) {
DSSERR(can't get IORESOURCE_MEM HDMI\n);
diff --git a/include/video/omapdss.h b/include/video/omapdss.h
index ffd5d42..82e2c3e 100644
--- a/include/video/omapdss.h
+++ b/include/video/omapdss.h
@@ -630,6 +630,9 @@ struct omap_dss_driver {
int (*read_edid)(struct omap_dss_device *dssdev, u8 *buf, int len);
bool (*detect)(struct omap_dss_device *dssdev);
+
+ int (*default_enable)(struct omap_dss_device *dssdev);
+ void (*default_disable)(struct omap_dss_device *dssdev);
};
int omap_dss_register_driver(struct omap_dss_driver *);
--
1.7.5.4
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Re: [PATCH 1/3] ARM: OMAP2+: kconfig: Enable devicetree by default for OMAP2+ systems
On 12/13/2011 2:27 PM, Tomi Valkeinen wrote: Hi, On Tue, 2011-12-06 at 17:49 +0100, Benoit Cousson wrote: devicetree will become the mandatory boot method for OMAP2+. In order to avoid cluttering the OMAP code with #ifdef CONFIG_OF, select USE_OF by default for every OMAP2+ systems. Select as well the APPENDED_DTB and ATAG_DTB_COMPAT to allow legacy boot loader to keep working properly. APPENDED_DTB sounds a bit dangerous to be enabled by default according to the config help text. The help is indeed really scary :-) Tony, Do we want to keep it by default? Or should we fix the kconfig help? Regards Benoit -- To unsubscribe from this list: send the line unsubscribe linux-omap in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
Re: [PATCH 0/4] fixes for twl4030-irq in mainline
Hi, On Mon, Dec 12, 2011 at 7:38 PM, Samuel Ortiz sa...@linux.intel.com wrote: On Sun, Nov 27, 2011 at 07:17:41AM +1100, NeilBrown wrote: The recent tidying up of twl4030-irq seems to have left it broken. At least it doesn't work for me on my gta04 (www.gta04.org). The first interrupt from the device freezes the whole system (by being constantly delivered) The following 4 patches make it work for me and addresses some other less critical issues like a typo in a comment :-) Thanks, I applied all 4 of them. Did you apply them for 3.2 or 3.3? Without the first patch any system that has a twl4030 chip will immediately hang on the first interrupt, and many functions of twl4030 will just not work without the second one. -- Felipe Contreras -- To unsubscribe from this list: send the line unsubscribe linux-omap in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
Re: [PATCH v8 00/20] OMAP2+: UART: Runtime adaptation + cleanup
Hi Kevin, On Wednesday 07 December 2011 05:51 AM, Kevin Hilman wrote: Govindraj.Rgovindraj.r...@ti.com writes: Converting uart driver to adapt to pm runtime API's. Code re-org + cleanup. Moving some functionality from serial.c to omap-serial.c Alan, can you confirm your Ack's are still valid on the drivers/tty parts of this series? It has gone through quite a few changes since your original ack. Greg, are you ok with this series merging via the OMAP tree since it is changing arch/arm/mach-omap2/* code as well as the driver, and should go together. If so, with your ack (on the drivers/tty/* parts), I'll handle this series through the OMAP tree. I had a series to add DT support for omap-serial, which I did on top of the runtime series from Govindraj. Its already acked by Rob Herring for the DT parts. Would you be able to pick those up as well if its fine with Greg? regards, Rajendra Thanks, Kevin -- To unsubscribe from this list: send the line unsubscribe linux-omap in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
RE: [PATCHv2 0/7]ARM: OMAP3PLUS PM: Add IO DaisyChain support via hwmod mux
Kevin, -Original Message- From: Vishwanath Sripathy [mailto:vishwanath...@ti.com] Sent: Friday, December 02, 2011 10:29 PM To: Kevin Hilman Cc: linux-omap@vger.kernel.org; linux-arm-ker...@lists.infradead.org Subject: RE: [PATCHv2 0/7]ARM: OMAP3PLUS PM: Add IO DaisyChain support via hwmod mux Kevin, -Original Message- From: Vishwanath Sripathy [mailto:vishwanath...@ti.com] Sent: Wednesday, November 30, 2011 2:58 PM To: Kevin Hilman Cc: linux-omap@vger.kernel.org; linux-arm- ker...@lists.infradead.org Subject: RE: [PATCHv2 0/7]ARM: OMAP3PLUS PM: Add IO DaisyChain support via hwmod mux --- Can you refresh this against Tony's 'fixes' branch and re- test. I tested this on OMAP3430/n900 and noticed that it no longer hit off mode from idle. IOW, If I enable UART timeouts and then enable off mode, I don't actually ever hit off during idle. However, if I do a suspend/resume I see it hits off mode, then subsequent attempts to hit off during idle work. Can you investigate this? OK. Let me check that. I rebased these patches against latest Tony's fixes branch and tested it on OMAP3430 SDP. I see that Core enters off mode in idle path after setting UART timeout w/o having to suspend the system. OK, sounds good. Do you have a branch that I can test as well? Sure. It's available at git://gitorious.org/omap-pm/linux.git for_3.3/io_daisy_chain Did you get any chance to test it at your side? Should I post the rebased patches? I have rebased these patch series against LO master commit id: deee6d5359969a0ce4e2760cfd7b9f379bd5698a and same is available here [1]. I have tested these patch series along with Tero's Chain Handler + Govind's UART Runtime series which is available at [2]. Regards Vishwa [1]: git://gitorious.org/omap-pm/linux.git for_3.3/io_daisy_chain_rebased [2]: git://gitorious.org/runtime_3-0/runtime_3-0.git for_3_3/tmp_rc4_uart_pm_intg Regards Vishwa Regards Vishwa Kevin -- To unsubscribe from this list: send the line unsubscribe linux-omap in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
Re: [PATCH v8 00/20] OMAP2+: UART: Runtime adaptation + cleanup
Rajendra Nayak rna...@ti.com writes: Hi Kevin, On Wednesday 07 December 2011 05:51 AM, Kevin Hilman wrote: Govindraj.Rgovindraj.r...@ti.com writes: Converting uart driver to adapt to pm runtime API's. Code re-org + cleanup. Moving some functionality from serial.c to omap-serial.c Alan, can you confirm your Ack's are still valid on the drivers/tty parts of this series? It has gone through quite a few changes since your original ack. Greg, are you ok with this series merging via the OMAP tree since it is changing arch/arm/mach-omap2/* code as well as the driver, and should go together. If so, with your ack (on the drivers/tty/* parts), I'll handle this series through the OMAP tree. I had a series to add DT support for omap-serial, which I did on top of the runtime series from Govindraj. Its already acked by Rob Herring for the DT parts. Would you be able to pick those up as well if its fine with Greg? Yes, those should go on top of Govindraj's series. I'm OK with taking them, but I'd like to see them rebased on Govidraj's latest and see several Tested-by reports from various people since it is pretty late in the merge cycle. Kevin -- To unsubscribe from this list: send the line unsubscribe linux-omap in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
Re: [PATCH] ARM: OMAP3LOGIC: Adding DSS support
* Alex al...@meprolight.com [111212 06:49]:
This patch adds DSS2 support to the LogicPD OMAP 35x Torpedo boardfile. LCD
and
TV-out are supported.
Signed-off-by: Alex Gershgorin al...@meprolight.com
This one should be OK to go via Tomi's DSS tree:
Acked-by: Tony Lindgren t...@atomide.com
---
arch/arm/mach-omap2/board-omap3logic.c | 106
1 files changed, 106 insertions(+), 0 deletions(-)
diff --git a/arch/arm/mach-omap2/board-omap3logic.c
b/arch/arm/mach-omap2/board-omap3logic.c
index 7c0f193..e030c71 100644
--- a/arch/arm/mach-omap2/board-omap3logic.c
+++ b/arch/arm/mach-omap2/board-omap3logic.c
@@ -7,6 +7,9 @@
* Copyright (C) 2010 Logic Product Development, Inc.
* Peter Barada peter.bar...@logicpd.com
*
+ * Copyright (C) 2011 Meprolight, Ltd.
+ * Alex Gershgorin al...@meprolight.com
+ *
* Modified from Beagle, EVM, and RX51
*
* This program is free software; you can redistribute it and/or modify
@@ -44,6 +47,10 @@
#include plat/gpmc-smsc911x.h
#include plat/gpmc.h
#include plat/sdrc.h
+#include plat/vram.h
+
+#include video/omapdss.h
+#include video/omap-panel-generic-dpi.h
#define OMAP3LOGIC_SMSC911X_CS 1
@@ -95,6 +102,13 @@ static struct twl4030_platform_data omap3logic_twldata = {
static int __init omap3logic_i2c_init(void)
{
+ omap3_pmic_get_config(omap3logic_twldata, TWL_COMMON_PDATA_USB,
+ TWL_COMMON_REGULATOR_VDAC | TWL_COMMON_REGULATOR_VPLL2);
+
+ omap3logic_twldata.vdac-constraints.apply_uV = true;
+ omap3logic_twldata.vpll2-constraints.apply_uV = true;
+ omap3logic_twldata.vpll2-constraints.name = VDSI;
+
omap3_pmic_init(twl4030, omap3logic_twldata);
return 0;
}
@@ -182,6 +196,97 @@ static inline void __init board_smsc911x_init(void)
gpmc_smsc911x_init(board_smsc911x_data);
}
+#if defined(CONFIG_FB_OMAP2) || defined(CONFIG_FB_OMAP2_MODULE)
+
+#define OMAP3_TORPEDO_LCD_BACKLIGHT_GPIO 154
+#define OMAP3_TORPEDO_LCD_ENABLE_GPIO155
+#define OMAP3_TORPEDO_LCD_PWM_GPIO 56
+
+static struct gpio omap3logic_dss_gpios[] __initdata = {
+ {OMAP3_TORPEDO_LCD_BACKLIGHT_GPIO, GPIOF_OUT_INIT_LOW, lcd_bl_pwr},
+ {OMAP3_TORPEDO_LCD_PWM_GPIO, GPIOF_OUT_INIT_LOW, lcd bl enable},
+ {OMAP3_TORPEDO_LCD_ENABLE_GPIO, GPIOF_OUT_INIT_LOW, lcd enable},
+};
+
+static int omap3logic_enable_lcd(struct omap_dss_device *dssdev)
+{
+ gpio_set_value_cansleep(OMAP3_TORPEDO_LCD_ENABLE_GPIO, 1);
+ gpio_set_value_cansleep(OMAP3_TORPEDO_LCD_BACKLIGHT_GPIO, 1);
+
+ return 0;
+}
+
+static void omap3logic_disable_lcd(struct omap_dss_device *dssdev)
+{
+ gpio_set_value_cansleep(OMAP3_TORPEDO_LCD_ENABLE_GPIO, 0);
+ gpio_set_value_cansleep(OMAP3_TORPEDO_LCD_BACKLIGHT_GPIO, 0);
+}
+
+static struct panel_generic_dpi_data lcd_panel = {
+ .name = sharp_lq,
+ .platform_enable= omap3logic_enable_lcd,
+ .platform_disable = omap3logic_disable_lcd,
+};
+
+static struct omap_dss_device omap3logic_lcd_device = {
+ .name = lcd,
+ .driver_name= generic_dpi_panel,
+ .type = OMAP_DISPLAY_TYPE_DPI,
+ .data = lcd_panel,
+ .phy.dpi.data_lines = 16,
+};
+
+static struct omap_dss_device omap3logic_tv_device = {
+ .name = tv,
+ .driver_name= venc,
+ .type = OMAP_DISPLAY_TYPE_VENC,
+ .phy.venc.type = OMAP_DSS_VENC_TYPE_SVIDEO,
+};
+
+static struct omap_dss_device *omap3logic_dss_devices[] = {
+ omap3logic_lcd_device,
+ omap3logic_tv_device,
+};
+
+static struct omap_dss_board_info omap3logic_dss_data = {
+ .num_devices= ARRAY_SIZE(omap3logic_dss_devices),
+ .devices= omap3logic_dss_devices,
+ .default_device = omap3logic_lcd_device,
+};
+
+static void __init omap3logic_display_init(void)
+{
+ int r;
+
+ r = gpio_request_array(omap3logic_dss_gpios,
+ARRAY_SIZE(omap3logic_dss_gpios));
+ if (r) {
+ printk(KERN_ERR failed to get lcd_panel_* gpios\n);
+ return;
+ }
+
+ gpio_export(OMAP3_TORPEDO_LCD_BACKLIGHT_GPIO, 0);
+ gpio_export(OMAP3_TORPEDO_LCD_ENABLE_GPIO, 0);
+ gpio_export(OMAP3_TORPEDO_LCD_PWM_GPIO, 0);
+
+ gpio_set_value(OMAP3_TORPEDO_LCD_BACKLIGHT_GPIO, 0);
+ gpio_set_value(OMAP3_TORPEDO_LCD_ENABLE_GPIO, 0);
+ gpio_set_value(OMAP3_TORPEDO_LCD_PWM_GPIO, 0);
+
+ msleep(50);
+ gpio_set_value(OMAP3_TORPEDO_LCD_PWM_GPIO, 1);
+
+ r = omap_display_init(omap3logic_dss_data);
+ if (r) {
+ pr_err(OMAP3LOGIC: failed to register DSS device\n);
+ gpio_free_array(omap3logic_dss_gpios,
+
Re: [PATCH v8 00/20] OMAP2+: UART: Runtime adaptation + cleanup
Govindraj govindraj...@gmail.com writes: [...] I have re-based this patch series against LO master commit id: deee6d5359969a0ce4e2760cfd7b9f379bd5698a Same is available here [1] I have tested this patch series along with: 1.) Tero's V11 irq chaining series http://www.spinics.net/lists/linux-omap/msg61445.html (This patch series is used for uart wakeup handling using prcm_irq chaining) 2.) Rajendra's hwmod change http://www.spinics.net/lists/arm-kernel/msg148632.html (This patch handles init_no_idle flag setting without this patch there will be boot warning however all pm features will work after boot up.) 3.) Vishwa's io daisy chain changes. http://permalink.gmane.org/gmane.linux.ports.arm.omap/65500 (tested with and without this patch series pm features works). Same combination of patches based on above commit id used for testing is available here [2]. Please have a closer look at your branch. The second commit[1] commits the .rej file from a failed patch apply, so obviously doesn't do what was intended. Kevin [1] From ae5d13382a5784f35f5bfe05413fbec4632e58f0 Mon Sep 17 00:00:00 2001 From: Govindraj.R govindraj.r...@ti.com Date: Tue, 13 Sep 2011 13:32:32 +0530 Subject: [PATCH] OMAP2+: UART: cleanup 8250 console driver support We had been using traditional 8250 driver as uart console driver prior to omap-serial driver. Since we have omap-serial driver in mainline kernel for some time now it has been used as default uart console driver on omap2+ platforms. Remove 8250 support for omap-uarts. Serial_in and serial_out override for 8250 serial driver is also removed. Empty fifo read fix is already taken care with omap-serial driver with data ready bit check from LSR reg before reading RX fifo. Also waiting for THRE(transmit hold reg empty) is done with wait_for_xmitr in omap-serial driver. Serial_in/out overrides are not neceesary for omap-serial driver and things that are taken with omap-serial driver are removed here. Remove headers that were necessary to support 8250 support and remove all config bindings done to keep 8250 backward compatibility while adding omap-serial driver. Remove omap_uart_reset needed for 8250 autoconf. Signed-off-by: Govindraj.R govindraj.r...@ti.com --- arch/arm/mach-omap2/serial.c.rej | 26 ++ 1 files changed, 26 insertions(+), 0 deletions(-) create mode 100644 arch/arm/mach-omap2/serial.c.rej diff --git a/arch/arm/mach-omap2/serial.c.rej b/arch/arm/mach-omap2/serial.c.rej new file mode 100644 index 000..2325897 --- /dev/null +++ b/arch/arm/mach-omap2/serial.c.rej @@ -0,0 +1,26 @@ +--- arch/arm/mach-omap2/serial.c arch/arm/mach-omap2/serial.c +@@ -19,23 +19,17 @@ + */ + #include linux/kernel.h + #include linux/init.h +-#include linux/serial_reg.h + #include linux/clk.h + #include linux/io.h + #include linux/delay.h + #include linux/platform_device.h + #include linux/slab.h +-#include linux/serial_8250.h + #include linux/pm_runtime.h + #include linux/console.h + +-#ifdef CONFIG_SERIAL_OMAP + #include plat/omap-serial.h +-#endif +- + #include plat/common.h + #include plat/board.h +-#include plat/clock.h + #include plat/dma.h + #include plat/omap_hwmod.h + #include plat/omap_device.h -- 1.7.6 -- To unsubscribe from this list: send the line unsubscribe linux-omap in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
Re: [PATCHv2 0/7]ARM: OMAP3PLUS PM: Add IO DaisyChain support via hwmod mux
Vishwanath Sripathy vishwanath...@ti.com writes: Kevin, -Original Message- From: Vishwanath Sripathy [mailto:vishwanath...@ti.com] Sent: Friday, December 02, 2011 10:29 PM To: Kevin Hilman Cc: linux-omap@vger.kernel.org; linux-arm-ker...@lists.infradead.org Subject: RE: [PATCHv2 0/7]ARM: OMAP3PLUS PM: Add IO DaisyChain support via hwmod mux Kevin, -Original Message- From: Vishwanath Sripathy [mailto:vishwanath...@ti.com] Sent: Wednesday, November 30, 2011 2:58 PM To: Kevin Hilman Cc: linux-omap@vger.kernel.org; linux-arm- ker...@lists.infradead.org Subject: RE: [PATCHv2 0/7]ARM: OMAP3PLUS PM: Add IO DaisyChain support via hwmod mux --- Can you refresh this against Tony's 'fixes' branch and re- test. I tested this on OMAP3430/n900 and noticed that it no longer hit off mode from idle. IOW, If I enable UART timeouts and then enable off mode, I don't actually ever hit off during idle. However, if I do a suspend/resume I see it hits off mode, then subsequent attempts to hit off during idle work. Can you investigate this? OK. Let me check that. I rebased these patches against latest Tony's fixes branch and tested it on OMAP3430 SDP. I see that Core enters off mode in idle path after setting UART timeout w/o having to suspend the system. OK, sounds good. Do you have a branch that I can test as well? Sure. It's available at git://gitorious.org/omap-pm/linux.git for_3.3/io_daisy_chain Did you get any chance to test it at your side? Should I post the rebased patches? I have rebased these patch series against LO master commit id: deee6d5359969a0ce4e2760cfd7b9f379bd5698a and same is available here [1]. I have tested these patch series along with Tero's Chain Handler + Govind's UART Runtime series which is available at [2]. Thanks. Can you repost the latest version, with tested-bys as appropriate and describing how it was tested and on what platforms. This series has several dependencies/conflicts with Tero's series, so it would be helpful that the posted version is based on Tero's stuff. Since Tero's stuff is going through Paul, your series will as well (if Paul is OK with it.) Kevin -- To unsubscribe from this list: send the line unsubscribe linux-omap in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
[GIT PULL] I2C: OMAP fixes for v3.2-rc
Jean, Could you pull the following I2C fixes for the OMAP platform for v3.2? The first one belongs in stable (change log already Cc's sta...@vger.kernel.org) Since this is an embedded platform, I have asked Ben Dooks a few times but gotten no response, so am hoping you can queue these before it's too late for v3.2-rc. Thanks, Kevin The following changes since commit 5611cc4572e889b62a7b4c72a413536bf6a9c416: Linux 3.2-rc4 (2011-12-01 14:56:01 -0800) are available in the git repository at: git://git.kernel.org/pub/scm/linux/kernel/git/khilman/linux-omap-pm.git for_3.2/fixes/i2c Alexander Aring (1): I2C: OMAP: correct SYSC register offset for OMAP4 Shubhrajyoti D (1): I2C: OMAP: fix FIFO usage for OMAP4 drivers/i2c/busses/i2c-omap.c | 13 +++-- 1 files changed, 7 insertions(+), 6 deletions(-) -- To unsubscribe from this list: send the line unsubscribe linux-omap in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
Re: [PATCH] omap: rx51: initialize isp1704 properly
On Mon, Dec 12, 2011 at 11:44:45AM -0800, Tony Lindgren wrote: * Felipe Contreras felipe.contre...@gmail.com [111208 11:52]: On Thu, Dec 8, 2011 at 4:40 PM, Heikki Krogerus kro...@gmail.com wrote: On Wed, Dec 07, 2011 at 09:56:56PM +0200, Felipe Contreras wrote: From: Heikki Krogerus kro...@gmail.com I would prefer that you change this so this is from you, like it actually is. You can mention me in the commit message if you like. Well, you came with the fix, I just typed it down, but as you wish :) Without this USB networking doesn't work as the link is never detected. What this changes is, it leaves the transceiver powered by default instead of setting it into power off mode. So not only USB networking is affected by this. If isp1704_charger is not enabled with RX51, USB does not work at all. Please change the comment. I've updated the patch. Sorry what's the deal with this one? Is this the one to use or is there some other patch? I can confirm, that USB on RX51 does not work with 3.1 mainline kernel and applying this patch (There's a v2 with fixed Author under [0]) results in working USB support. [0] http://www.spinics.net/lists/linux-omap/msg61217.html -- Sebastian signature.asc Description: Digital signature
Re: [PATCH] omap: rx51: initialize isp1704 properly
On Mon, Dec 12, 2011 at 9:44 PM, Tony Lindgren t...@atomide.com wrote: * Felipe Contreras felipe.contre...@gmail.com [111208 11:52]: On Thu, Dec 8, 2011 at 4:40 PM, Heikki Krogerus kro...@gmail.com wrote: On Wed, Dec 07, 2011 at 09:56:56PM +0200, Felipe Contreras wrote: From: Heikki Krogerus kro...@gmail.com I would prefer that you change this so this is from you, like it actually is. You can mention me in the commit message if you like. Well, you came with the fix, I just typed it down, but as you wish :) Without this USB networking doesn't work as the link is never detected. What this changes is, it leaves the transceiver powered by default instead of setting it into power off mode. So not only USB networking is affected by this. If isp1704_charger is not enabled with RX51, USB does not work at all. Please change the comment. I've updated the patch. Sorry what's the deal with this one? Is this the one to use or is there some other patch? Yeap, there's v2 of this one: 1323375780-13190-1-git-send-email-felipe.contre...@nokia.com Cheers. -- Felipe Contreras -- To unsubscribe from this list: send the line unsubscribe linux-omap in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
Re: [PATCH 0/4] fixes for twl4030-irq in mainline
Hi Neil, On Tue, Dec 13, 2011 at 08:39:59AM +1100, NeilBrown wrote: The following 4 patches make it work for me and addresses some other less critical issues like a typo in a comment :-) Thanks, I applied all 4 of them. Thanks. I have a couple of other twl4030 patches, these ones related to battery charging. Hopefully I'll be ready to post them later this week. Would they go through you too? They most likely would, yes. Cheers, Samuel. -- Intel Open Source Technology Centre http://oss.intel.com/ -- To unsubscribe from this list: send the line unsubscribe linux-omap in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
[PATCH v9 02/31] gpio/omap: use flag to identify wakeup domain
From: Charulatha V ch...@ti.com
In omap3, save/restore context is implemented for GPIO banks 2-6 as GPIO bank1
is in wakeup domain. Instead of identifying bank's power domain by bank id,
use 'loses_context' flag which is filled by pwrdm_can_ever_lose_context()
during dev_init.
For getting the powerdomain pointer, omap_hwmod_get_pwrdm() is used.
omap_device_get_pwrdm() could not be used as the pwrdm information needs to be
filled in pdata, whereas omap_device_get_pwrdm() could be used only after
omap_device_build() call.
Signed-off-by: Charulatha V ch...@ti.com
Reviewed-by: Santosh Shilimkar santosh.shilim...@ti.com
---
arch/arm/mach-omap2/gpio.c |6 ++
arch/arm/plat-omap/include/plat/gpio.h |1 +
drivers/gpio/gpio-omap.c | 13 ++---
3 files changed, 13 insertions(+), 7 deletions(-)
diff --git a/arch/arm/mach-omap2/gpio.c b/arch/arm/mach-omap2/gpio.c
index 07ac648..076be34 100644
--- a/arch/arm/mach-omap2/gpio.c
+++ b/arch/arm/mach-omap2/gpio.c
@@ -24,6 +24,8 @@
#include plat/omap_hwmod.h
#include plat/omap_device.h
+#include powerdomain.h
+
static int omap2_gpio_dev_init(struct omap_hwmod *oh, void *unused)
{
struct platform_device *pdev;
@@ -31,6 +33,7 @@ static int omap2_gpio_dev_init(struct omap_hwmod *oh, void
*unused)
struct omap_gpio_dev_attr *dev_attr;
char *name = omap_gpio;
int id;
+ struct powerdomain *pwrdm;
/*
* extract the device id from name field available in the
@@ -99,6 +102,9 @@ static int omap2_gpio_dev_init(struct omap_hwmod *oh, void
*unused)
return -EINVAL;
}
+ pwrdm = omap_hwmod_get_pwrdm(oh);
+ pdata-loses_context = pwrdm_can_ever_lose_context(pwrdm);
+
pdev = omap_device_build(name, id - 1, oh, pdata,
sizeof(*pdata), NULL, 0, false);
kfree(pdata);
diff --git a/arch/arm/plat-omap/include/plat/gpio.h
b/arch/arm/plat-omap/include/plat/gpio.h
index acf1c77..6eb035c 100644
--- a/arch/arm/plat-omap/include/plat/gpio.h
+++ b/arch/arm/plat-omap/include/plat/gpio.h
@@ -198,6 +198,7 @@ struct omap_gpio_platform_data {
int bank_width; /* GPIO bank width */
int bank_stride;/* Only needed for omap1 MPUIO */
bool dbck_flag; /* dbck required or not - True for OMAP34 */
+ bool loses_context; /* whether the bank would ever lose context */
struct omap_gpio_reg_offs *regs;
};
diff --git a/drivers/gpio/gpio-omap.c b/drivers/gpio/gpio-omap.c
index 6ea7390..07efa15 100644
--- a/drivers/gpio/gpio-omap.c
+++ b/drivers/gpio/gpio-omap.c
@@ -56,6 +56,7 @@ struct gpio_bank {
u32 dbck_enable_mask;
struct device *dev;
bool dbck_flag;
+ bool loses_context;
int stride;
u32 width;
u16 id;
@@ -1181,7 +1182,7 @@ static int __devinit omap_gpio_probe(struct
platform_device *pdev)
bank-dbck_flag = pdata-dbck_flag;
bank-stride = pdata-bank_stride;
bank-width = pdata-bank_width;
-
+ bank-loses_context = pdata-loses_context;
bank-regs = pdata-regs;
if (bank-regs-set_dataout bank-regs-clr_dataout)
@@ -1337,8 +1338,7 @@ void omap2_gpio_prepare_for_idle(int off_mode)
u32 l1 = 0, l2 = 0;
int j;
- /* TODO: Do not use cpu_is_omap34xx */
- if ((cpu_is_omap34xx()) (bank-id == 0))
+ if (!bank-loses_context)
continue;
for (j = 0; j hweight_long(bank-dbck_enable_mask); j++)
@@ -1405,8 +1405,7 @@ void omap2_gpio_resume_after_idle(void)
u32 l = 0, gen, gen0, gen1;
int j;
- /* TODO: Do not use cpu_is_omap34xx */
- if ((cpu_is_omap34xx()) (bank-id == 0))
+ if (!bank-loses_context)
continue;
for (j = 0; j hweight_long(bank-dbck_enable_mask); j++)
@@ -1505,7 +1504,7 @@ void omap_gpio_save_context(void)
list_for_each_entry(bank, omap_gpio_list, node) {
i++;
- if (bank-id == 0)
+ if (!bank-loses_context)
continue;
gpio_context[i].irqenable1 =
@@ -1539,7 +1538,7 @@ void omap_gpio_restore_context(void)
list_for_each_entry(bank, omap_gpio_list, node) {
i++;
- if (bank-id == 0)
+ if (!bank-loses_context)
continue;
__raw_writel(gpio_context[i].irqenable1,
--
1.7.0.4
--
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[PATCH v9 03/31] gpio/omap: make gpio_context part of gpio_bank structure
From: Charulatha V ch...@ti.com
Currently gpio_context array used to save gpio bank's context, is used only for
OMAP3 architecture. Move gpio_context as part of gpio_bank structure so that it
can be specific to each gpio bank and can be used for any OMAP architecture
Signed-off-by: Charulatha V ch...@ti.com
Reviewed-by: Santosh Shilimkar santosh.shilim...@ti.com
---
drivers/gpio/gpio-omap.c | 76 -
1 files changed, 34 insertions(+), 42 deletions(-)
diff --git a/drivers/gpio/gpio-omap.c b/drivers/gpio/gpio-omap.c
index 07efa15..6788c8a 100644
--- a/drivers/gpio/gpio-omap.c
+++ b/drivers/gpio/gpio-omap.c
@@ -30,6 +30,19 @@
static LIST_HEAD(omap_gpio_list);
+struct gpio_regs {
+ u32 irqenable1;
+ u32 irqenable2;
+ u32 wake_en;
+ u32 ctrl;
+ u32 oe;
+ u32 leveldetect0;
+ u32 leveldetect1;
+ u32 risingdetect;
+ u32 fallingdetect;
+ u32 dataout;
+};
+
struct gpio_bank {
struct list_head node;
unsigned long pbase;
@@ -43,7 +56,7 @@ struct gpio_bank {
#endif
u32 non_wakeup_gpios;
u32 enabled_non_wakeup_gpios;
-
+ struct gpio_regs context;
u32 saved_datain;
u32 saved_fallingdetect;
u32 saved_risingdetect;
@@ -66,23 +79,6 @@ struct gpio_bank {
struct omap_gpio_reg_offs *regs;
};
-#ifdef CONFIG_ARCH_OMAP3
-struct omap3_gpio_regs {
- u32 irqenable1;
- u32 irqenable2;
- u32 wake_en;
- u32 ctrl;
- u32 oe;
- u32 leveldetect0;
- u32 leveldetect1;
- u32 risingdetect;
- u32 fallingdetect;
- u32 dataout;
-};
-
-static struct omap3_gpio_regs gpio_context[OMAP34XX_NR_GPIOS];
-#endif
-
#define GPIO_INDEX(bank, gpio) (gpio % bank-width)
#define GPIO_BIT(bank, gpio) (1 GPIO_INDEX(bank, gpio))
@@ -1499,33 +1495,31 @@ void omap2_gpio_resume_after_idle(void)
void omap_gpio_save_context(void)
{
struct gpio_bank *bank;
- int i = 0;
list_for_each_entry(bank, omap_gpio_list, node) {
- i++;
if (!bank-loses_context)
continue;
- gpio_context[i].irqenable1 =
+ bank-context.irqenable1 =
__raw_readl(bank-base + OMAP24XX_GPIO_IRQENABLE1);
- gpio_context[i].irqenable2 =
+ bank-context.irqenable2 =
__raw_readl(bank-base + OMAP24XX_GPIO_IRQENABLE2);
- gpio_context[i].wake_en =
+ bank-context.wake_en =
__raw_readl(bank-base + OMAP24XX_GPIO_WAKE_EN);
- gpio_context[i].ctrl =
+ bank-context.ctrl =
__raw_readl(bank-base + OMAP24XX_GPIO_CTRL);
- gpio_context[i].oe =
+ bank-context.oe =
__raw_readl(bank-base + OMAP24XX_GPIO_OE);
- gpio_context[i].leveldetect0 =
+ bank-context.leveldetect0 =
__raw_readl(bank-base + OMAP24XX_GPIO_LEVELDETECT0);
- gpio_context[i].leveldetect1 =
+ bank-context.leveldetect1 =
__raw_readl(bank-base + OMAP24XX_GPIO_LEVELDETECT1);
- gpio_context[i].risingdetect =
+ bank-context.risingdetect =
__raw_readl(bank-base + OMAP24XX_GPIO_RISINGDETECT);
- gpio_context[i].fallingdetect =
+ bank-context.fallingdetect =
__raw_readl(bank-base + OMAP24XX_GPIO_FALLINGDETECT);
- gpio_context[i].dataout =
+ bank-context.dataout =
__raw_readl(bank-base + OMAP24XX_GPIO_DATAOUT);
}
}
@@ -1533,33 +1527,31 @@ void omap_gpio_save_context(void)
void omap_gpio_restore_context(void)
{
struct gpio_bank *bank;
- int i = 0;
list_for_each_entry(bank, omap_gpio_list, node) {
- i++;
if (!bank-loses_context)
continue;
- __raw_writel(gpio_context[i].irqenable1,
+ __raw_writel(bank-context.irqenable1,
bank-base + OMAP24XX_GPIO_IRQENABLE1);
- __raw_writel(gpio_context[i].irqenable2,
+ __raw_writel(bank-context.irqenable2,
bank-base + OMAP24XX_GPIO_IRQENABLE2);
- __raw_writel(gpio_context[i].wake_en,
+ __raw_writel(bank-context.wake_en,
bank-base + OMAP24XX_GPIO_WAKE_EN);
- __raw_writel(gpio_context[i].ctrl,
+ __raw_writel(bank-context.ctrl,
bank-base + OMAP24XX_GPIO_CTRL);
- __raw_writel(gpio_context[i].oe,
+ __raw_writel(bank-context.oe,
bank-base + OMAP24XX_GPIO_OE);
- __raw_writel(gpio_context[i].leveldetect0,
+
[PATCH v9 09/31] gpio/omap: remove hardcoded offsets in context save/restore
It is not required to use hard-coded offsets any more in context save and
restore functions and instead use the generic offsets which have been correctly
initialized during device registration.
Signed-off-by: Tarun Kanti DebBarma tarun.ka...@ti.com
Signed-off-by: Charulatha V ch...@ti.com
Reviewed-by: Santosh Shilimkar santosh.shilim...@ti.com
Acked-by: Tony Lindgren t...@atomide.com
---
arch/arm/mach-omap2/gpio.c |2 +
arch/arm/plat-omap/include/plat/gpio.h |1 +
drivers/gpio/gpio-omap.c | 42 +++
3 files changed, 23 insertions(+), 22 deletions(-)
diff --git a/arch/arm/mach-omap2/gpio.c b/arch/arm/mach-omap2/gpio.c
index ae5043e..f4c45ca 100644
--- a/arch/arm/mach-omap2/gpio.c
+++ b/arch/arm/mach-omap2/gpio.c
@@ -84,6 +84,7 @@ static int omap2_gpio_dev_init(struct omap_hwmod *oh, void
*unused)
pdata-regs-irqstatus = OMAP24XX_GPIO_IRQSTATUS1;
pdata-regs-irqstatus2 = OMAP24XX_GPIO_IRQSTATUS2;
pdata-regs-irqenable = OMAP24XX_GPIO_IRQENABLE1;
+ pdata-regs-irqenable2 = OMAP24XX_GPIO_IRQENABLE2;
pdata-regs-set_irqenable = OMAP24XX_GPIO_SETIRQENABLE1;
pdata-regs-clr_irqenable = OMAP24XX_GPIO_CLEARIRQENABLE1;
pdata-regs-debounce = OMAP24XX_GPIO_DEBOUNCE_VAL;
@@ -106,6 +107,7 @@ static int omap2_gpio_dev_init(struct omap_hwmod *oh, void
*unused)
pdata-regs-irqstatus = OMAP4_GPIO_IRQSTATUS0;
pdata-regs-irqstatus2 = OMAP4_GPIO_IRQSTATUS1;
pdata-regs-irqenable = OMAP4_GPIO_IRQSTATUSSET0;
+ pdata-regs-irqenable2 = OMAP4_GPIO_IRQSTATUSSET1;
pdata-regs-set_irqenable = OMAP4_GPIO_IRQSTATUSSET0;
pdata-regs-clr_irqenable = OMAP4_GPIO_IRQSTATUSCLR0;
pdata-regs-debounce = OMAP4_GPIO_DEBOUNCINGTIME;
diff --git a/arch/arm/plat-omap/include/plat/gpio.h
b/arch/arm/plat-omap/include/plat/gpio.h
index 97f8c4e..93f533f 100644
--- a/arch/arm/plat-omap/include/plat/gpio.h
+++ b/arch/arm/plat-omap/include/plat/gpio.h
@@ -184,6 +184,7 @@ struct omap_gpio_reg_offs {
u16 irqstatus;
u16 irqstatus2;
u16 irqenable;
+ u16 irqenable2;
u16 set_irqenable;
u16 clr_irqenable;
u16 debounce;
diff --git a/drivers/gpio/gpio-omap.c b/drivers/gpio/gpio-omap.c
index 7b25115..9c0ff4b 100644
--- a/drivers/gpio/gpio-omap.c
+++ b/drivers/gpio/gpio-omap.c
@@ -1377,45 +1377,43 @@ void omap2_gpio_resume_after_idle(void)
static void omap_gpio_save_context(struct gpio_bank *bank)
{
bank-context.irqenable1 =
- __raw_readl(bank-base + OMAP24XX_GPIO_IRQENABLE1);
+ __raw_readl(bank-base + bank-regs-irqenable);
bank-context.irqenable2 =
- __raw_readl(bank-base + OMAP24XX_GPIO_IRQENABLE2);
+ __raw_readl(bank-base + bank-regs-irqenable2);
bank-context.wake_en =
- __raw_readl(bank-base + OMAP24XX_GPIO_WAKE_EN);
- bank-context.ctrl = __raw_readl(bank-base + OMAP24XX_GPIO_CTRL);
- bank-context.oe = __raw_readl(bank-base + OMAP24XX_GPIO_OE);
+ __raw_readl(bank-base + bank-regs-wkup_en);
+ bank-context.ctrl = __raw_readl(bank-base + bank-regs-ctrl);
+ bank-context.oe = __raw_readl(bank-base + bank-regs-direction);
bank-context.leveldetect0 =
- __raw_readl(bank-base + OMAP24XX_GPIO_LEVELDETECT0);
+ __raw_readl(bank-base + bank-regs-leveldetect0);
bank-context.leveldetect1 =
- __raw_readl(bank-base + OMAP24XX_GPIO_LEVELDETECT1);
+ __raw_readl(bank-base + bank-regs-leveldetect1);
bank-context.risingdetect =
- __raw_readl(bank-base + OMAP24XX_GPIO_RISINGDETECT);
+ __raw_readl(bank-base + bank-regs-risingdetect);
bank-context.fallingdetect =
- __raw_readl(bank-base + OMAP24XX_GPIO_FALLINGDETECT);
- bank-context.dataout =
- __raw_readl(bank-base + OMAP24XX_GPIO_DATAOUT);
+ __raw_readl(bank-base + bank-regs-fallingdetect);
+ bank-context.dataout = __raw_readl(bank-base + bank-regs-dataout);
}
static void omap_gpio_restore_context(struct gpio_bank *bank)
{
__raw_writel(bank-context.irqenable1,
- bank-base + OMAP24XX_GPIO_IRQENABLE1);
+ bank-base + bank-regs-irqenable);
__raw_writel(bank-context.irqenable2,
- bank-base + OMAP24XX_GPIO_IRQENABLE2);
+ bank-base + bank-regs-irqenable2);
__raw_writel(bank-context.wake_en,
- bank-base + OMAP24XX_GPIO_WAKE_EN);
- __raw_writel(bank-context.ctrl, bank-base + OMAP24XX_GPIO_CTRL);
- __raw_writel(bank-context.oe, bank-base + OMAP24XX_GPIO_OE);
+ bank-base +
[PATCH v9 22/31] gpio/omap: save and restore debounce registers
From: Nishanth Menon n...@ti.com
GPIO debounce registers need to be saved and restored for proper functioning
of driver.
Signed-off-by: Nishanth Menon n...@ti.com
tarun.ka...@ti.com: Debounce context save is moved to _set_gpio_debounce()
as part of dynamic context save to remove overhead.
Signed-off-by: Tarun Kanti DebBarma tarun.ka...@ti.com
Reviewed-by: Santosh Shilimkar santosh.shilim...@ti.com
---
drivers/gpio/gpio-omap.c | 12
1 files changed, 12 insertions(+), 0 deletions(-)
diff --git a/drivers/gpio/gpio-omap.c b/drivers/gpio/gpio-omap.c
index 8fba691..6f8a7d3 100644
--- a/drivers/gpio/gpio-omap.c
+++ b/drivers/gpio/gpio-omap.c
@@ -44,6 +44,8 @@ struct gpio_regs {
u32 risingdetect;
u32 fallingdetect;
u32 dataout;
+ u32 debounce;
+ u32 debounce_en;
};
struct gpio_bank {
@@ -231,6 +233,10 @@ static void _set_gpio_debounce(struct gpio_bank *bank,
unsigned gpio,
* that point. Therefore we have to enable dbck here.
*/
_gpio_dbck_enable(bank);
+ if (bank-dbck_enable_mask) {
+ bank-context.debounce = debounce;
+ bank-context.debounce_en = val;
+ }
}
static inline void set_gpio_trigger(struct gpio_bank *bank, int gpio,
@@ -1372,6 +1378,12 @@ static void omap_gpio_restore_context(struct gpio_bank
*bank)
__raw_writel(bank-context.fallingdetect,
bank-base + bank-regs-fallingdetect);
__raw_writel(bank-context.dataout, bank-base + bank-regs-dataout);
+ if (bank-dbck_enable_mask) {
+ __raw_writel(bank-context.debounce, bank-base +
+ bank-regs-debounce);
+ __raw_writel(bank-context.debounce_en,
+ bank-base + bank-regs-debounce_en);
+ }
}
#else
#define omap_gpio_suspend NULL
--
1.7.0.4
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[PATCH v9 12/31] gpio/omap: use pinctrl offset instead of macro
From: Charulatha V ch...@ti.com
Use regs-pinctrl field instead of using the macro OMAP1510_GPIO_PIN_CONTROL
Signed-off-by: Charulatha V ch...@ti.com
Reviewed-by: Santosh Shilimkar santosh.shilim...@ti.com
Acked-by: Tony Lindgren t...@atomide.com
---
arch/arm/mach-omap1/gpio15xx.c |1 +
arch/arm/plat-omap/include/plat/gpio.h |1 +
drivers/gpio/gpio-omap.c |8 +++-
3 files changed, 5 insertions(+), 5 deletions(-)
diff --git a/arch/arm/mach-omap1/gpio15xx.c b/arch/arm/mach-omap1/gpio15xx.c
index 2adfece..950e467 100644
--- a/arch/arm/mach-omap1/gpio15xx.c
+++ b/arch/arm/mach-omap1/gpio15xx.c
@@ -85,6 +85,7 @@ static struct omap_gpio_reg_offs omap15xx_gpio_regs = {
.irqenable = OMAP1510_GPIO_INT_MASK,
.irqenable_inv = true,
.irqctrl= OMAP1510_GPIO_INT_CONTROL,
+ .pinctrl= OMAP1510_GPIO_PIN_CONTROL,
};
static struct __initdata omap_gpio_platform_data omap15xx_gpio_config = {
diff --git a/arch/arm/plat-omap/include/plat/gpio.h
b/arch/arm/plat-omap/include/plat/gpio.h
index d291e4d..d4e6080 100644
--- a/arch/arm/plat-omap/include/plat/gpio.h
+++ b/arch/arm/plat-omap/include/plat/gpio.h
@@ -198,6 +198,7 @@ struct omap_gpio_reg_offs {
u16 irqctrl;
u16 edgectrl1;
u16 edgectrl2;
+ u16 pinctrl;
bool irqenable_inv;
};
diff --git a/drivers/gpio/gpio-omap.c b/drivers/gpio/gpio-omap.c
index b9d50cc..87c54a1 100644
--- a/drivers/gpio/gpio-omap.c
+++ b/drivers/gpio/gpio-omap.c
@@ -491,15 +491,13 @@ static int omap_gpio_request(struct gpio_chip *chip,
unsigned offset)
*/
_set_gpio_triggering(bank, offset, IRQ_TYPE_NONE);
-#ifdef CONFIG_ARCH_OMAP15XX
- if (bank-method == METHOD_GPIO_1510) {
- void __iomem *reg;
+ if (bank-regs-pinctrl) {
+ void __iomem *reg = bank-base + bank-regs-pinctrl;
/* Claim the pin for MPU */
- reg = bank-base + OMAP1510_GPIO_PIN_CONTROL;
__raw_writel(__raw_readl(reg) | (1 offset), reg);
}
-#endif
+
if (bank-regs-ctrl !bank-mod_usage) {
void __iomem *reg = bank-base + bank-regs-ctrl;
u32 ctrl;
--
1.7.0.4
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[PATCH v9 01/31] gpio/omap: remove dependency on gpio_bank_count
From: Charulatha V ch...@ti.com
The gpio_bank_count is the count of number of GPIO devices in a SoC. Remove this
dependency from the driver by using list. Also remove the dependency on array of
pointers to gpio_bank struct of all GPIO devices.
Signed-off-by: Charulatha V ch...@ti.com
Reviewed-by: Santosh Shilimkar santosh.shilim...@ti.com
Acked-by: Tony Lindgren t...@atomide.com
---
arch/arm/mach-omap1/gpio15xx.c |1 -
arch/arm/mach-omap1/gpio16xx.c |2 -
arch/arm/mach-omap1/gpio7xx.c |2 -
arch/arm/mach-omap2/gpio.c |1 -
arch/arm/plat-omap/include/plat/gpio.h |3 -
drivers/gpio/gpio-omap.c | 163
6 files changed, 80 insertions(+), 92 deletions(-)
diff --git a/arch/arm/mach-omap1/gpio15xx.c b/arch/arm/mach-omap1/gpio15xx.c
index 399da4c..f8c15ea 100644
--- a/arch/arm/mach-omap1/gpio15xx.c
+++ b/arch/arm/mach-omap1/gpio15xx.c
@@ -115,7 +115,6 @@ static int __init omap15xx_gpio_init(void)
platform_device_register(omap15xx_mpu_gpio);
platform_device_register(omap15xx_gpio);
- gpio_bank_count = 2;
return 0;
}
postcore_initcall(omap15xx_gpio_init);
diff --git a/arch/arm/mach-omap1/gpio16xx.c b/arch/arm/mach-omap1/gpio16xx.c
index 0f399bd..df4bb44 100644
--- a/arch/arm/mach-omap1/gpio16xx.c
+++ b/arch/arm/mach-omap1/gpio16xx.c
@@ -221,8 +221,6 @@ static int __init omap16xx_gpio_init(void)
for (i = 0; i ARRAY_SIZE(omap16xx_gpio_dev); i++)
platform_device_register(omap16xx_gpio_dev[i]);
- gpio_bank_count = ARRAY_SIZE(omap16xx_gpio_dev);
-
return 0;
}
postcore_initcall(omap16xx_gpio_init);
diff --git a/arch/arm/mach-omap1/gpio7xx.c b/arch/arm/mach-omap1/gpio7xx.c
index 5ab63ea..923eaa1 100644
--- a/arch/arm/mach-omap1/gpio7xx.c
+++ b/arch/arm/mach-omap1/gpio7xx.c
@@ -282,8 +282,6 @@ static int __init omap7xx_gpio_init(void)
for (i = 0; i ARRAY_SIZE(omap7xx_gpio_dev); i++)
platform_device_register(omap7xx_gpio_dev[i]);
- gpio_bank_count = ARRAY_SIZE(omap7xx_gpio_dev);
-
return 0;
}
postcore_initcall(omap7xx_gpio_init);
diff --git a/arch/arm/mach-omap2/gpio.c b/arch/arm/mach-omap2/gpio.c
index 8cbfbc2..07ac648 100644
--- a/arch/arm/mach-omap2/gpio.c
+++ b/arch/arm/mach-omap2/gpio.c
@@ -111,7 +111,6 @@ static int omap2_gpio_dev_init(struct omap_hwmod *oh, void
*unused)
omap_device_disable_idle_on_suspend(pdev);
- gpio_bank_count++;
return 0;
}
diff --git a/arch/arm/plat-omap/include/plat/gpio.h
b/arch/arm/plat-omap/include/plat/gpio.h
index 9e86ee0..acf1c77 100644
--- a/arch/arm/plat-omap/include/plat/gpio.h
+++ b/arch/arm/plat-omap/include/plat/gpio.h
@@ -202,9 +202,6 @@ struct omap_gpio_platform_data {
struct omap_gpio_reg_offs *regs;
};
-/* TODO: Analyze removing gpio_bank_count usage from driver code */
-extern int gpio_bank_count;
-
extern void omap2_gpio_prepare_for_idle(int off_mode);
extern void omap2_gpio_resume_after_idle(void);
extern void omap_set_gpio_debounce(int gpio, int enable);
diff --git a/drivers/gpio/gpio-omap.c b/drivers/gpio/gpio-omap.c
index 0b05629..6ea7390 100644
--- a/drivers/gpio/gpio-omap.c
+++ b/drivers/gpio/gpio-omap.c
@@ -28,7 +28,10 @@
#include asm/gpio.h
#include asm/mach/irq.h
+static LIST_HEAD(omap_gpio_list);
+
struct gpio_bank {
+ struct list_head node;
unsigned long pbase;
void __iomem *base;
u16 irq;
@@ -55,6 +58,7 @@ struct gpio_bank {
bool dbck_flag;
int stride;
u32 width;
+ u16 id;
void (*set_dataout)(struct gpio_bank *bank, int gpio, int enable);
@@ -78,15 +82,6 @@ struct omap3_gpio_regs {
static struct omap3_gpio_regs gpio_context[OMAP34XX_NR_GPIOS];
#endif
-/*
- * TODO: Cleanup gpio_bank usage as it is having information
- * related to all instances of the device
- */
-static struct gpio_bank *gpio_bank;
-
-/* TODO: Analyze removing gpio_bank_count usage from driver code */
-int gpio_bank_count;
-
#define GPIO_INDEX(bank, gpio) (gpio % bank-width)
#define GPIO_BIT(bank, gpio) (1 GPIO_INDEX(bank, gpio))
@@ -869,9 +864,8 @@ static struct platform_device omap_mpuio_device = {
/* could list the /proc/iomem resources */
};
-static inline void mpuio_init(void)
+static inline void mpuio_init(struct gpio_bank *bank)
{
- struct gpio_bank *bank = gpio_bank[0];
platform_set_drvdata(omap_mpuio_device, bank);
if (platform_driver_register(omap_mpuio_driver) == 0)
@@ -879,13 +873,13 @@ static inline void mpuio_init(void)
}
#else
-static inline void mpuio_init(void) {}
+static inline void mpuio_init(struct gpio_bank *bank) {}
#endif /* 16xx */
#else
#define bank_is_mpuio(bank)0
-static inline void mpuio_init(void) {}
+static inline void mpuio_init(struct gpio_bank *bank) {}
#endif
@@ -1007,20 +1001,8 @@ static void __init omap_gpio_show_rev(struct gpio_bank
*bank)
*/
static
[PATCH v9 25/31] gpio/omap: handle set_dataout reg capable IP on restore
From: Nishanth Menon n...@ti.com
GPIO IP revisions such as those used in OMAP4 have a set_dataout
while the previous revisions used a single dataout register.
Depending on what is available restore the dataout settings
to the right register.
Signed-off-by: Nishanth Menon n...@ti.com
Signed-off-by: Tarun Kanti DebBarma tarun.ka...@ti.com
Reviewed-by: Santosh Shilimkar santosh.shilim...@ti.com
---
drivers/gpio/gpio-omap.c |7 ++-
1 files changed, 6 insertions(+), 1 deletions(-)
diff --git a/drivers/gpio/gpio-omap.c b/drivers/gpio/gpio-omap.c
index bbc4fda..a967126 100644
--- a/drivers/gpio/gpio-omap.c
+++ b/drivers/gpio/gpio-omap.c
@@ -1372,7 +1372,12 @@ static void omap_gpio_restore_context(struct gpio_bank
*bank)
bank-base + bank-regs-risingdetect);
__raw_writel(bank-context.fallingdetect,
bank-base + bank-regs-fallingdetect);
- __raw_writel(bank-context.dataout, bank-base + bank-regs-dataout);
+ if (bank-regs-set_dataout bank-regs-clr_dataout)
+ __raw_writel(bank-context.dataout,
+ bank-base + bank-regs-set_dataout);
+ else
+ __raw_writel(bank-context.dataout,
+ bank-base + bank-regs-dataout);
__raw_writel(bank-context.oe, bank-base + bank-regs-direction);
if (bank-dbck_enable_mask) {
--
1.7.0.4
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[PATCH v9 00/31] gpio/omap: driver cleanup and fixes
This series is continuation of cleanup of OMAP GPIO driver and fixes. The cleanup include getting rid of cpu_is_* checks wherever possible, use of gpio_bank list instead of static array, use of unique platform specific value associated data member to OMAP platforms to avoid cpu_is_* checks. The series also include PM runtime support. Baseline: git://github.com/khilman/linux-omap-pm.git Branch: for_3.3/gpio-base Baseline: git://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux-2.6.git Branch: master Commit: b835c0f Power Tests a) OMAP3430SDP - Modify board-3430sdp.c file to have multiple GPIO modules active with debounce timeout enabled. - Enable CPU-Idle - Enable UART timeouts - Enable offmode - echo mem /sys/power/state - Verify retention and offmode count increment b) ZOOM3 - Enable CPU-Idle - Enable UART timeout - echo mem /sys/power/state - Wakeup system using serial keyboard - Verify retention count increment Functional Tests - Done on OMAP2430, OMAP3430SDP, ZOOM3, OMAP4430 Bootup Test - Done on OMAP1710 v9: - Summary of Comments/Issues fixed * GPIO wakeup does not work * Call debounce clock enable/disable functions from PM runtime callbacks. This will avoid calling the functions from multiple places. * Modify description of following patch to match latest changes. gpio/omap: save and restore debounce registers * Use (bank-regs-set_dataout bank-regs-clr_dataout) together instead of using only one of them. * Remove cpu_is_omap() checks from set_gpio_trigger(). * _gpio_dbck_enable() in runtime callback triggered from omap_gpio_request does not enable dbck because dbck_enable_mask is not set at this point. * Workaround associated with an errata got missed in v8. This has been included. - Added following new patches * gpio/omap: get rid of saved_fallingdetect, saved_risingdetect * gpio/omap: remove retrigger variable in gpio_irq_handler * gpio/omap: fix _set_gpio_irqenable implementation * gpio/omap: fix trigger type to unsigned * gpio/omap: remove saved_wakeup field from struct gpio_bank v8: - Remove PM_CONFIG macro around following assignment. pdata-get_context_loss_count = omap_pm_get_dev_context_loss_count; - Once pm_runtime is enabled there is no more need for calling the omap_device_disable_idle_on_suspend(od). - With pm_runtime, handling of clocks in Suspend is taken care of by powerdomain hooks. So remove usage of *_runtime_put/get* from suspend/resume hooks and Idle path. - Add handling of debounce clocks along the Suspend and Idle paths. - Remove [PATCH 04/24] gpio/omap: fix pwrdm_post_transition call sequence from this series. This will be merged as part of power cleanup series. - Remove [PATCH v7 20/26] gpio/omap: skip operations in runtime callbacks The bank-mod_usage check in this patch is not needed any more because they are now already being taken care in suspend/resume and Idle paths. - Remove [PATCH v7 26/26] gpio/omap: add dbclk aliases for all gpio modules This is already taken care in hwmod. - Remove redundant blank line in [PATCH v7 14/26] gpio/omap: remove unnecessary bit-masking for read access - if (cpu_is_omap15xx() (bank-method == METHOD_MPUIO)) - isr = 0x; if (bank-level_mask) level_mask = bank-level_mask enabled; v7: - Use pm_runtime_put() instead of pm_runtime_put_sync_suspend() - Keep *_runtime_get/put*() outside spinlock - Remove additional checking of conditions in _restore_context() From: if (bank-regs-set_dataout bank-regs-clear_dataout) ... To: if (bank-regs-set_dataout) ... - Use SET_RUNTIME_PM_OPS and SET_SYSTEM_SLEEP_PM_OPS macros - In [PATCH 19/25] gpio/omap: cleanup prepare_for_idle and resume_after_idle, protect the bank data elements and register access using spinlock in runtime_suspend/resume() callbacks. This is because these callbacks run with interrupts enabled. - Add dbclk aliases for all GPIO modules. Without this, GPIO modules were not getting the correct clock handle to enable/disable debounec clock. - Fix log comments on the following patches: [PATCH 19/25] gpio/omap: cleanup prepare_for_idle and resume_after_idle [PATCH 20/25] gpio/omap: skip operations in runtime callbacks [PATCH 24/25] gpio/omap: restore OE only after setting the output level v6: - Save and restore debounce registers for proper driver operation. - Restore interrupt enable after all configuration to avoid spurious interrupts. - Restore dataout register before oe register. - Restore dataout into dataout_set or dataout based upon the OMAP version. - Change register name from wkup_status to wkup_en. - Remove wrapper around omap_pm_get_dev_context_loss_count(). Use it directly. Also, changed the signature of get_context_loss_count in pdata and bank structure from int to u32. - Use 'context' instead of 'ctx' for clarity wherever it is used. - Merged two patches into one which
[PATCH v9 04/31] gpio/omap: handle save/restore context in GPIO driver
Modify omap_gpio_prepare_for_idle() omap_gpio_resume_after_idle() functions
to handle save context restore context respectively in the OMAP GPIO driver
itself instead of calling these functions from pm specific files.
For this, in gpio_prepare_for_idle(), call *_get_context_loss_count() and in
gpio_resume_after_idle() call it again. If the count is different, do restore
context. The workaround_enabled flag has been replaced with GPIO bank based
flag need_context_restore.
Signed-off-by: Charulatha V ch...@ti.com
Signed-off-by: Tarun Kanti DebBarma tarun.ka...@ti.com
Reviewed-by: Santosh Shilimkar santosh.shilim...@ti.com
Acked-by: Tony Lindgren t...@atomide.com
---
arch/arm/mach-omap2/gpio.c |3 +-
arch/arm/mach-omap2/pm34xx.c | 14 ---
arch/arm/plat-omap/include/plat/gpio.h |5 +-
drivers/gpio/gpio-omap.c | 137 +++-
4 files changed, 70 insertions(+), 89 deletions(-)
diff --git a/arch/arm/mach-omap2/gpio.c b/arch/arm/mach-omap2/gpio.c
index 076be34..f84db8f 100644
--- a/arch/arm/mach-omap2/gpio.c
+++ b/arch/arm/mach-omap2/gpio.c
@@ -23,6 +23,7 @@
#include plat/omap_hwmod.h
#include plat/omap_device.h
+#include plat/omap-pm.h
#include powerdomain.h
@@ -55,7 +56,7 @@ static int omap2_gpio_dev_init(struct omap_hwmod *oh, void
*unused)
pdata-bank_width = dev_attr-bank_width;
pdata-dbck_flag = dev_attr-dbck_flag;
pdata-virtual_irq_start = IH_GPIO_BASE + 32 * (id - 1);
-
+ pdata-get_context_loss_count = omap_pm_get_dev_context_loss_count;
pdata-regs = kzalloc(sizeof(struct omap_gpio_reg_offs), GFP_KERNEL);
if (!pdata) {
pr_err(gpio%d: Memory allocation failed\n, id);
diff --git a/arch/arm/mach-omap2/pm34xx.c b/arch/arm/mach-omap2/pm34xx.c
index 3025c39..df5f6e5 100644
--- a/arch/arm/mach-omap2/pm34xx.c
+++ b/arch/arm/mach-omap2/pm34xx.c
@@ -85,16 +85,6 @@ static struct powerdomain *mpu_pwrdm, *neon_pwrdm;
static struct powerdomain *core_pwrdm, *per_pwrdm;
static struct powerdomain *cam_pwrdm;
-static inline void omap3_per_save_context(void)
-{
- omap_gpio_save_context();
-}
-
-static inline void omap3_per_restore_context(void)
-{
- omap_gpio_restore_context();
-}
-
static void omap3_enable_io_chain(void)
{
int timeout = 0;
@@ -390,8 +380,6 @@ void omap_sram_idle(void)
omap_uart_prepare_idle(2);
omap_uart_prepare_idle(3);
omap2_gpio_prepare_for_idle(per_going_off);
- if (per_next_state == PWRDM_POWER_OFF)
- omap3_per_save_context();
}
/* CORE */
@@ -461,8 +449,6 @@ void omap_sram_idle(void)
if (per_next_state PWRDM_POWER_ON) {
per_prev_state = pwrdm_read_prev_pwrst(per_pwrdm);
omap2_gpio_resume_after_idle();
- if (per_prev_state == PWRDM_POWER_OFF)
- omap3_per_restore_context();
omap_uart_resume_idle(2);
omap_uart_resume_idle(3);
}
diff --git a/arch/arm/plat-omap/include/plat/gpio.h
b/arch/arm/plat-omap/include/plat/gpio.h
index 6eb035c..ed881c3 100644
--- a/arch/arm/plat-omap/include/plat/gpio.h
+++ b/arch/arm/plat-omap/include/plat/gpio.h
@@ -201,14 +201,15 @@ struct omap_gpio_platform_data {
bool loses_context; /* whether the bank would ever lose context */
struct omap_gpio_reg_offs *regs;
+
+ /* Return context loss count due to PM states changing */
+ u32 (*get_context_loss_count)(struct device *dev);
};
extern void omap2_gpio_prepare_for_idle(int off_mode);
extern void omap2_gpio_resume_after_idle(void);
extern void omap_set_gpio_debounce(int gpio, int enable);
extern void omap_set_gpio_debounce_time(int gpio, int enable);
-extern void omap_gpio_save_context(void);
-extern void omap_gpio_restore_context(void);
/*-*/
/* Wrappers for new style GPIO calls, using the new infrastructure
diff --git a/drivers/gpio/gpio-omap.c b/drivers/gpio/gpio-omap.c
index 6788c8a..40ee7b3 100644
--- a/drivers/gpio/gpio-omap.c
+++ b/drivers/gpio/gpio-omap.c
@@ -72,9 +72,12 @@ struct gpio_bank {
bool loses_context;
int stride;
u32 width;
+ u32 context_loss_count;
+ bool need_context_restore;
u16 id;
void (*set_dataout)(struct gpio_bank *bank, int gpio, int enable);
+ u32 (*get_context_loss_count)(struct device *dev);
struct omap_gpio_reg_offs *regs;
};
@@ -1179,6 +1182,7 @@ static int __devinit omap_gpio_probe(struct
platform_device *pdev)
bank-stride = pdata-bank_stride;
bank-width = pdata-bank_width;
bank-loses_context = pdata-loses_context;
+ bank-get_context_loss_count = pdata-get_context_loss_count;
bank-regs = pdata-regs;
if (bank-regs-set_dataout bank-regs-clr_dataout)
@@ -1323,11 +1327,11
[PATCH v9 06/31] gpio/omap: avoid cpu checks during module ena/disable
From: Charulatha V ch...@ti.com
Remove cpu-is checks while enabling/disabling OMAP GPIO module during a gpio
request/free.
Signed-off-by: Charulatha V ch...@ti.com
Reviewed-by: Santosh Shilimkar santosh.shilim...@ti.com
Acked-by: Tony Lindgren t...@atomide.com
---
arch/arm/mach-omap2/gpio.c |2 +
arch/arm/plat-omap/include/plat/gpio.h |1 +
drivers/gpio/gpio-omap.c | 53 ++--
3 files changed, 26 insertions(+), 30 deletions(-)
diff --git a/arch/arm/mach-omap2/gpio.c b/arch/arm/mach-omap2/gpio.c
index 1d60fff..bc9271a 100644
--- a/arch/arm/mach-omap2/gpio.c
+++ b/arch/arm/mach-omap2/gpio.c
@@ -88,6 +88,7 @@ static int omap2_gpio_dev_init(struct omap_hwmod *oh, void
*unused)
pdata-regs-clr_irqenable = OMAP24XX_GPIO_CLEARIRQENABLE1;
pdata-regs-debounce = OMAP24XX_GPIO_DEBOUNCE_VAL;
pdata-regs-debounce_en = OMAP24XX_GPIO_DEBOUNCE_EN;
+ pdata-regs-ctrl = OMAP24XX_GPIO_CTRL;
break;
case 2:
pdata-bank_type = METHOD_GPIO_44XX;
@@ -104,6 +105,7 @@ static int omap2_gpio_dev_init(struct omap_hwmod *oh, void
*unused)
pdata-regs-clr_irqenable = OMAP4_GPIO_IRQSTATUSCLR0;
pdata-regs-debounce = OMAP4_GPIO_DEBOUNCINGTIME;
pdata-regs-debounce_en = OMAP4_GPIO_DEBOUNCENABLE;
+ pdata-regs-ctrl = OMAP4_GPIO_CTRL;
break;
default:
WARN(1, Invalid gpio bank_type\n);
diff --git a/arch/arm/plat-omap/include/plat/gpio.h
b/arch/arm/plat-omap/include/plat/gpio.h
index 41459e2..649226e 100644
--- a/arch/arm/plat-omap/include/plat/gpio.h
+++ b/arch/arm/plat-omap/include/plat/gpio.h
@@ -188,6 +188,7 @@ struct omap_gpio_reg_offs {
u16 clr_irqenable;
u16 debounce;
u16 debounce_en;
+ u16 ctrl;
bool irqenable_inv;
};
diff --git a/drivers/gpio/gpio-omap.c b/drivers/gpio/gpio-omap.c
index a0bdd92..d46a805 100644
--- a/drivers/gpio/gpio-omap.c
+++ b/drivers/gpio/gpio-omap.c
@@ -84,6 +84,7 @@ struct gpio_bank {
#define GPIO_INDEX(bank, gpio) (gpio % bank-width)
#define GPIO_BIT(bank, gpio) (1 GPIO_INDEX(bank, gpio))
+#define GPIO_MOD_CTRL_BIT BIT(0)
static void _set_gpio_direction(struct gpio_bank *bank, int gpio, int is_input)
{
@@ -578,22 +579,18 @@ static int omap_gpio_request(struct gpio_chip *chip,
unsigned offset)
__raw_writel(__raw_readl(reg) | (1 offset), reg);
}
#endif
- if (!cpu_class_is_omap1()) {
- if (!bank-mod_usage) {
- void __iomem *reg = bank-base;
- u32 ctrl;
-
- if (cpu_is_omap24xx() || cpu_is_omap34xx())
- reg += OMAP24XX_GPIO_CTRL;
- else if (cpu_is_omap44xx())
- reg += OMAP4_GPIO_CTRL;
- ctrl = __raw_readl(reg);
- /* Module is enabled, clocks are not gated */
- ctrl = 0xFFFE;
- __raw_writel(ctrl, reg);
- }
- bank-mod_usage |= 1 offset;
+ if (bank-regs-ctrl !bank-mod_usage) {
+ void __iomem *reg = bank-base + bank-regs-ctrl;
+ u32 ctrl;
+
+ ctrl = __raw_readl(reg);
+ /* Module is enabled, clocks are not gated */
+ ctrl = ~GPIO_MOD_CTRL_BIT;
+ __raw_writel(ctrl, reg);
}
+
+ bank-mod_usage |= 1 offset;
+
spin_unlock_irqrestore(bank-lock, flags);
return 0;
@@ -626,22 +623,18 @@ static void omap_gpio_free(struct gpio_chip *chip,
unsigned offset)
__raw_writel(1 offset, reg);
}
#endif
- if (!cpu_class_is_omap1()) {
- bank-mod_usage = ~(1 offset);
- if (!bank-mod_usage) {
- void __iomem *reg = bank-base;
- u32 ctrl;
-
- if (cpu_is_omap24xx() || cpu_is_omap34xx())
- reg += OMAP24XX_GPIO_CTRL;
- else if (cpu_is_omap44xx())
- reg += OMAP4_GPIO_CTRL;
- ctrl = __raw_readl(reg);
- /* Module is disabled, clocks are gated */
- ctrl |= 1;
- __raw_writel(ctrl, reg);
- }
+ bank-mod_usage = ~(1 offset);
+
+ if (bank-regs-ctrl !bank-mod_usage) {
+ void __iomem *reg = bank-base + bank-regs-ctrl;
+ u32 ctrl;
+
+ ctrl = __raw_readl(reg);
+ /* Module is disabled, clocks are gated */
+ ctrl |= GPIO_MOD_CTRL_BIT;
+ __raw_writel(ctrl, reg);
}
+
_reset_gpio(bank, bank-chip.base + offset);
spin_unlock_irqrestore(bank-lock, flags);
}
--
1.7.0.4
--
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[PATCH v9 24/31] gpio/omap: restore OE only after setting the output level
From: Nishanth Menon n...@ti.com
Setup the dataout register before restoring OE. This is to make
sure that we have valid data in dataout register which would be
made available in output pins as soon as OE is enabled. Else,
there is risk of unknown data getting out into gpio pins.
Signed-off-by: Nishanth Menon n...@ti.com
Signed-off-by: Tarun Kanti DebBarma tarun.ka...@ti.com
Reviewed-by: Santosh Shilimkar santosh.shilim...@ti.com
---
drivers/gpio/gpio-omap.c |3 ++-
1 files changed, 2 insertions(+), 1 deletions(-)
diff --git a/drivers/gpio/gpio-omap.c b/drivers/gpio/gpio-omap.c
index 7f7636b..bbc4fda 100644
--- a/drivers/gpio/gpio-omap.c
+++ b/drivers/gpio/gpio-omap.c
@@ -1364,7 +1364,6 @@ static void omap_gpio_restore_context(struct gpio_bank
*bank)
__raw_writel(bank-context.wake_en,
bank-base + bank-regs-wkup_en);
__raw_writel(bank-context.ctrl, bank-base + bank-regs-ctrl);
- __raw_writel(bank-context.oe, bank-base + bank-regs-direction);
__raw_writel(bank-context.leveldetect0,
bank-base + bank-regs-leveldetect0);
__raw_writel(bank-context.leveldetect1,
@@ -1374,6 +1373,8 @@ static void omap_gpio_restore_context(struct gpio_bank
*bank)
__raw_writel(bank-context.fallingdetect,
bank-base + bank-regs-fallingdetect);
__raw_writel(bank-context.dataout, bank-base + bank-regs-dataout);
+ __raw_writel(bank-context.oe, bank-base + bank-regs-direction);
+
if (bank-dbck_enable_mask) {
__raw_writel(bank-context.debounce, bank-base +
bank-regs-debounce);
--
1.7.0.4
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[PATCH v9 21/31] gpio/omap: remove omap_gpio_save_context overhead
Context is now saved dynamically in respective functions whenever and
whichever registers are modified. This avoid overhead of saving all
registers context in the runtime suspend callback.
Signed-off-by: Tarun Kanti DebBarma tarun.ka...@ti.com
Reviewed-by: Santosh Shilimkar santosh.shilim...@ti.com
---
drivers/gpio/gpio-omap.c | 56 +++---
1 files changed, 28 insertions(+), 28 deletions(-)
diff --git a/drivers/gpio/gpio-omap.c b/drivers/gpio/gpio-omap.c
index 7f32391..8fba691 100644
--- a/drivers/gpio/gpio-omap.c
+++ b/drivers/gpio/gpio-omap.c
@@ -103,6 +103,7 @@ static void _set_gpio_direction(struct gpio_bank *bank, int
gpio, int is_input)
else
l = ~(1 gpio);
__raw_writel(l, reg);
+ bank-context.oe = l;
}
@@ -133,6 +134,7 @@ static void _set_gpio_dataout_mask(struct gpio_bank *bank,
int gpio, int enable)
else
l = ~gpio_bit;
__raw_writel(l, reg);
+ bank-context.dataout = l;
}
static int _get_gpio_datain(struct gpio_bank *bank, int gpio)
@@ -246,8 +248,20 @@ static inline void set_gpio_trigger(struct gpio_bank
*bank, int gpio,
_gpio_rmw(base, bank-regs-fallingdetect, gpio_bit,
trigger IRQ_TYPE_EDGE_FALLING);
- if (likely(!(bank-non_wakeup_gpios gpio_bit)))
+ bank-context.leveldetect0 =
+ __raw_readl(bank-base + bank-regs-leveldetect0);
+ bank-context.leveldetect1 =
+ __raw_readl(bank-base + bank-regs-leveldetect1);
+ bank-context.risingdetect =
+ __raw_readl(bank-base + bank-regs-risingdetect);
+ bank-context.fallingdetect =
+ __raw_readl(bank-base + bank-regs-fallingdetect);
+
+ if (likely(!(bank-non_wakeup_gpios gpio_bit))) {
_gpio_rmw(base, bank-regs-wkup_en, gpio_bit, trigger != 0);
+ bank-context.wake_en =
+ __raw_readl(bank-base + bank-regs-wkup_en);
+ }
/* This part needs to be executed always for OMAP{34xx, 44xx} */
if (!bank-regs-irqctrl) {
@@ -340,6 +354,8 @@ static int _set_gpio_triggering(struct gpio_bank *bank, int
gpio, int trigger)
/* Enable wake-up during idle for dynamic tick */
_gpio_rmw(base, bank-regs-wkup_en, 1 gpio, trigger);
+ bank-context.wake_en =
+ __raw_readl(bank-base + bank-regs-wkup_en);
__raw_writel(l, reg);
}
return 0;
@@ -432,6 +448,7 @@ static void _enable_gpio_irqbank(struct gpio_bank *bank,
int gpio_mask)
}
__raw_writel(l, reg);
+ bank-context.irqenable1 = l;
}
static void _disable_gpio_irqbank(struct gpio_bank *bank, int gpio_mask)
@@ -452,6 +469,7 @@ static void _disable_gpio_irqbank(struct gpio_bank *bank,
int gpio_mask)
}
__raw_writel(l, reg);
+ bank-context.irqenable1 = l;
}
static inline void _set_gpio_irqenable(struct gpio_bank *bank, int gpio, int
enable)
@@ -543,6 +561,7 @@ static int omap_gpio_request(struct gpio_chip *chip,
unsigned offset)
/* Module is enabled, clocks are not gated */
ctrl = ~GPIO_MOD_CTRL_BIT;
__raw_writel(ctrl, reg);
+ bank-context.ctrl = ctrl;
}
bank-mod_usage |= 1 offset;
@@ -560,9 +579,12 @@ static void omap_gpio_free(struct gpio_chip *chip,
unsigned offset)
spin_lock_irqsave(bank-lock, flags);
- if (bank-regs-wkup_en)
+ if (bank-regs-wkup_en) {
/* Disable wake-up during idle for dynamic tick */
_gpio_rmw(base, bank-regs-wkup_en, 1 offset, 0);
+ bank-context.wake_en =
+ __raw_readl(bank-base + bank-regs-wkup_en);
+ }
bank-mod_usage = ~(1 offset);
@@ -574,6 +596,7 @@ static void omap_gpio_free(struct gpio_chip *chip, unsigned
offset)
/* Module is disabled, clocks are gated */
ctrl |= GPIO_MOD_CTRL_BIT;
__raw_writel(ctrl, reg);
+ bank-context.ctrl = ctrl;
}
_reset_gpio(bank, bank-chip.base + offset);
@@ -1166,7 +1189,6 @@ static int omap_gpio_resume(struct device *dev)
}
-static void omap_gpio_save_context(struct gpio_bank *bank);
static void omap_gpio_restore_context(struct gpio_bank *bank);
static int omap_gpio_runtime_suspend(struct device *dev)
@@ -1182,7 +1204,7 @@ static int omap_gpio_runtime_suspend(struct device *dev)
spin_lock_irqsave(bank-lock, flags);
if (bank-power_mode != OFF_MODE) {
bank-power_mode = 0;
- goto save_gpio_context;
+ goto update_gpio_context_count;
}
/*
* If going to OFF, remove triggering for all
@@ -1190,7 +1212,7 @@ static int omap_gpio_runtime_suspend(struct device *dev)
* generated. See OMAP2420 Errata item 1.101.
[PATCH v9 10/31] gpio/omap: cleanup set_gpio_triggering function
Getting rid of ifdefs within the function by adding register offset intctrl
and associating OMAP_GPIO_INT_CONTROL in respective SoC specific files.
Also, use wkup_status register consistently instead of referring to wakeup
clear and wakeup set register offsets. Get rid of cpu_is_ checks in
set_gpio_trigger() using irqctrl.
Signed-off-by: Charulatha V ch...@ti.com
Signed-off-by: Tarun Kanti DebBarma tarun.ka...@ti.com
Reviewed-by: Santosh Shilimkar santosh.shilim...@ti.com
Acked-by: Tony Lindgren t...@atomide.com
---
arch/arm/mach-omap1/gpio15xx.c |2 +
arch/arm/mach-omap1/gpio16xx.c |3 +
arch/arm/mach-omap1/gpio7xx.c |2 +
arch/arm/plat-omap/include/plat/gpio.h |3 +
drivers/gpio/gpio-omap.c | 157 +---
5 files changed, 53 insertions(+), 114 deletions(-)
diff --git a/arch/arm/mach-omap1/gpio15xx.c b/arch/arm/mach-omap1/gpio15xx.c
index f8c15ea..2adfece 100644
--- a/arch/arm/mach-omap1/gpio15xx.c
+++ b/arch/arm/mach-omap1/gpio15xx.c
@@ -42,6 +42,7 @@ static struct omap_gpio_reg_offs omap15xx_mpuio_regs = {
.irqstatus = OMAP_MPUIO_GPIO_INT,
.irqenable = OMAP_MPUIO_GPIO_MASKIT,
.irqenable_inv = true,
+ .irqctrl= OMAP_MPUIO_GPIO_INT_EDGE,
};
static struct __initdata omap_gpio_platform_data omap15xx_mpu_gpio_config = {
@@ -83,6 +84,7 @@ static struct omap_gpio_reg_offs omap15xx_gpio_regs = {
.irqstatus = OMAP1510_GPIO_INT_STATUS,
.irqenable = OMAP1510_GPIO_INT_MASK,
.irqenable_inv = true,
+ .irqctrl= OMAP1510_GPIO_INT_CONTROL,
};
static struct __initdata omap_gpio_platform_data omap15xx_gpio_config = {
diff --git a/arch/arm/mach-omap1/gpio16xx.c b/arch/arm/mach-omap1/gpio16xx.c
index 1eb47e2..46bb57a 100644
--- a/arch/arm/mach-omap1/gpio16xx.c
+++ b/arch/arm/mach-omap1/gpio16xx.c
@@ -45,6 +45,7 @@ static struct omap_gpio_reg_offs omap16xx_mpuio_regs = {
.irqstatus = OMAP_MPUIO_GPIO_INT,
.irqenable = OMAP_MPUIO_GPIO_MASKIT,
.irqenable_inv = true,
+ .irqctrl= OMAP_MPUIO_GPIO_INT_EDGE,
};
static struct __initdata omap_gpio_platform_data omap16xx_mpu_gpio_config = {
@@ -90,6 +91,8 @@ static struct omap_gpio_reg_offs omap16xx_gpio_regs = {
.set_irqenable = OMAP1610_GPIO_SET_IRQENABLE1,
.clr_irqenable = OMAP1610_GPIO_CLEAR_IRQENABLE1,
.wkup_en= OMAP1610_GPIO_WAKEUPENABLE,
+ .edgectrl1 = OMAP1610_GPIO_EDGE_CTRL1,
+ .edgectrl2 = OMAP1610_GPIO_EDGE_CTRL2,
};
static struct __initdata omap_gpio_platform_data omap16xx_gpio1_config = {
diff --git a/arch/arm/mach-omap1/gpio7xx.c b/arch/arm/mach-omap1/gpio7xx.c
index 923eaa1..207a23c 100644
--- a/arch/arm/mach-omap1/gpio7xx.c
+++ b/arch/arm/mach-omap1/gpio7xx.c
@@ -47,6 +47,7 @@ static struct omap_gpio_reg_offs omap7xx_mpuio_regs = {
.irqstatus = OMAP_MPUIO_GPIO_INT / 2,
.irqenable = OMAP_MPUIO_GPIO_MASKIT / 2,
.irqenable_inv = true,
+ .irqctrl= OMAP_MPUIO_GPIO_INT_EDGE 1,
};
static struct __initdata omap_gpio_platform_data omap7xx_mpu_gpio_config = {
@@ -88,6 +89,7 @@ static struct omap_gpio_reg_offs omap7xx_gpio_regs = {
.irqstatus = OMAP7XX_GPIO_INT_STATUS,
.irqenable = OMAP7XX_GPIO_INT_MASK,
.irqenable_inv = true,
+ .irqctrl= OMAP7XX_GPIO_INT_CONTROL,
};
static struct __initdata omap_gpio_platform_data omap7xx_gpio1_config = {
diff --git a/arch/arm/plat-omap/include/plat/gpio.h
b/arch/arm/plat-omap/include/plat/gpio.h
index 93f533f..d291e4d 100644
--- a/arch/arm/plat-omap/include/plat/gpio.h
+++ b/arch/arm/plat-omap/include/plat/gpio.h
@@ -195,6 +195,9 @@ struct omap_gpio_reg_offs {
u16 leveldetect1;
u16 risingdetect;
u16 fallingdetect;
+ u16 irqctrl;
+ u16 edgectrl1;
+ u16 edgectrl2;
bool irqenable_inv;
};
diff --git a/drivers/gpio/gpio-omap.c b/drivers/gpio/gpio-omap.c
index 9c0ff4b..c5bb2e2 100644
--- a/drivers/gpio/gpio-omap.c
+++ b/drivers/gpio/gpio-omap.c
@@ -200,52 +200,32 @@ static void _set_gpio_debounce(struct gpio_bank *bank,
unsigned gpio,
__raw_writel(val, reg);
}
-#ifdef CONFIG_ARCH_OMAP2PLUS
-static inline void set_24xx_gpio_triggering(struct gpio_bank *bank, int gpio,
+static inline void set_gpio_trigger(struct gpio_bank *bank, int gpio,
int trigger)
{
void __iomem *base = bank-base;
u32 gpio_bit = 1 gpio;
- if (cpu_is_omap44xx()) {
- _gpio_rmw(base, OMAP4_GPIO_LEVELDETECT0, gpio_bit,
- trigger IRQ_TYPE_LEVEL_LOW);
- _gpio_rmw(base, OMAP4_GPIO_LEVELDETECT1, gpio_bit,
- trigger IRQ_TYPE_LEVEL_HIGH);
- _gpio_rmw(base, OMAP4_GPIO_RISINGDETECT, gpio_bit,
- trigger IRQ_TYPE_EDGE_RISING);
-
[PATCH v9 15/31] gpio/omap: fix bankwidth for OMAP7xx MPUIO
From: Charulatha V ch...@ti.com
In all OMAP1 SoCs, the MPUIO bank width is 16 bits. But, in OMAP7xx,
it is wrongly initialised to 32. Fix this.
Signed-off-by: Charulatha V ch...@ti.com
Reviewed-by: Santosh Shilimkar santosh.shilim...@ti.com
Acked-by: Tony Lindgren t...@atomide.com
---
arch/arm/mach-omap1/gpio7xx.c |2 +-
1 files changed, 1 insertions(+), 1 deletions(-)
diff --git a/arch/arm/mach-omap1/gpio7xx.c b/arch/arm/mach-omap1/gpio7xx.c
index 433491c..4771d6b 100644
--- a/arch/arm/mach-omap1/gpio7xx.c
+++ b/arch/arm/mach-omap1/gpio7xx.c
@@ -52,8 +52,8 @@ static struct omap_gpio_reg_offs omap7xx_mpuio_regs = {
static struct __initdata omap_gpio_platform_data omap7xx_mpu_gpio_config = {
.virtual_irq_start = IH_MPUIO_BASE,
- .bank_width = 32,
.is_mpuio = true,
+ .bank_width = 16,
.bank_stride= 2,
.regs = omap7xx_mpuio_regs,
};
--
1.7.0.4
--
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[PATCH v9 13/31] gpio/omap: remove unnecessary bit-masking for read access
Remove un-necessary bit masking. Since the register are 4 byte aligned and readl would work as is. The 'enabled' mask is already taking care to mask for bank width. Signed-off-by: Charulatha V ch...@ti.com Signed-off-by: Tarun Kanti DebBarma tarun.ka...@ti.com Reviewed-by: Santosh Shilimkar santosh.shilim...@ti.com --- drivers/gpio/gpio-omap.c |3 --- 1 files changed, 0 insertions(+), 3 deletions(-) diff --git a/drivers/gpio/gpio-omap.c b/drivers/gpio/gpio-omap.c index 87c54a1..f4ec9aa 100644 --- a/drivers/gpio/gpio-omap.c +++ b/drivers/gpio/gpio-omap.c @@ -577,9 +577,6 @@ static void gpio_irq_handler(unsigned int irq, struct irq_desc *desc) enabled = _get_gpio_irqbank_mask(bank); isr_saved = isr = __raw_readl(isr_reg) enabled; - if (cpu_is_omap15xx() (bank-method == METHOD_MPUIO)) - isr = 0x; - if (bank-level_mask) level_mask = bank-level_mask enabled; -- 1.7.0.4 -- To unsubscribe from this list: send the line unsubscribe linux-omap in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
[PATCH v9 16/31] gpio/omap: use pm-runtime framework
Call runtime pm APIs pm_runtime_get_sync() and pm_runtime_put()
for enabling/disabling clocks appropriately. Remove syscore_ops and
instead use SET_RUNTIME_PM_OPS macro.
There is no more need to call omap_device_disable_idle_on_suspend
since driver is PM runtime adapted now.
Signed-off-by: Charulatha V ch...@ti.com
Signed-off-by: Tarun Kanti DebBarma tarun.ka...@ti.com
Reviewed-by: Santosh Shilimkar santosh.shilim...@ti.com
---
arch/arm/mach-omap2/gpio.c |2 -
drivers/gpio/gpio-omap.c | 66 ---
2 files changed, 43 insertions(+), 25 deletions(-)
diff --git a/arch/arm/mach-omap2/gpio.c b/arch/arm/mach-omap2/gpio.c
index dfda6b3..1e0b750 100644
--- a/arch/arm/mach-omap2/gpio.c
+++ b/arch/arm/mach-omap2/gpio.c
@@ -136,8 +136,6 @@ static int omap2_gpio_dev_init(struct omap_hwmod *oh, void
*unused)
return PTR_ERR(pdev);
}
- omap_device_disable_idle_on_suspend(pdev);
-
return 0;
}
diff --git a/drivers/gpio/gpio-omap.c b/drivers/gpio/gpio-omap.c
index 0842495..e5dd3bb 100644
--- a/drivers/gpio/gpio-omap.c
+++ b/drivers/gpio/gpio-omap.c
@@ -21,6 +21,7 @@
#include linux/io.h
#include linux/slab.h
#include linux/pm_runtime.h
+#include linux/pm.h
#include mach/hardware.h
#include asm/irq.h
@@ -80,6 +81,8 @@ struct gpio_bank {
struct omap_gpio_reg_offs *regs;
};
+static void omap_gpio_mod_init(struct gpio_bank *bank);
+
#define GPIO_INDEX(bank, gpio) (gpio % bank-width)
#define GPIO_BIT(bank, gpio) (1 GPIO_INDEX(bank, gpio))
#define GPIO_MOD_CTRL_BIT BIT(0)
@@ -484,8 +487,14 @@ static int omap_gpio_request(struct gpio_chip *chip,
unsigned offset)
struct gpio_bank *bank = container_of(chip, struct gpio_bank, chip);
unsigned long flags;
- spin_lock_irqsave(bank-lock, flags);
+ /*
+* If this is the first gpio_request for the bank,
+* enable the bank module.
+*/
+ if (!bank-mod_usage)
+ pm_runtime_get_sync(bank-dev);
+ spin_lock_irqsave(bank-lock, flags);
/* Set trigger to none. You need to enable the desired trigger with
* request_irq() or set_irq_type().
*/
@@ -541,6 +550,13 @@ static void omap_gpio_free(struct gpio_chip *chip,
unsigned offset)
_reset_gpio(bank, bank-chip.base + offset);
spin_unlock_irqrestore(bank-lock, flags);
+
+ /*
+* If this is the last gpio to be freed in the bank,
+* disable the bank module.
+*/
+ if (!bank-mod_usage)
+ pm_runtime_put(bank-dev);
}
/*
@@ -566,6 +582,7 @@ static void gpio_irq_handler(unsigned int irq, struct
irq_desc *desc)
bank = irq_get_handler_data(irq);
isr_reg = bank-base + bank-regs-irqstatus;
+ pm_runtime_get_sync(bank-dev);
if (WARN_ON(!isr_reg))
goto exit;
@@ -626,6 +643,7 @@ static void gpio_irq_handler(unsigned int irq, struct
irq_desc *desc)
exit:
if (!unmasked)
chained_irq_exit(chip, desc);
+ pm_runtime_put(bank-dev);
}
static void gpio_irq_shutdown(struct irq_data *d)
@@ -1038,6 +1056,7 @@ static int __devinit omap_gpio_probe(struct
platform_device *pdev)
}
pm_runtime_enable(bank-dev);
+ pm_runtime_irq_safe(bank-dev);
pm_runtime_get_sync(bank-dev);
if (bank-is_mpuio)
@@ -1047,6 +1066,8 @@ static int __devinit omap_gpio_probe(struct
platform_device *pdev)
omap_gpio_chip_init(bank);
omap_gpio_show_rev(bank);
+ pm_runtime_put(bank-dev);
+
list_add_tail(bank-node, omap_gpio_list);
return ret;
@@ -1057,7 +1078,9 @@ err_exit:
return ret;
}
-static int omap_gpio_suspend(void)
+#ifdef CONFIG_ARCH_OMAP2PLUS
+
+static int omap_gpio_suspend(struct device *dev)
{
struct gpio_bank *bank;
@@ -1081,7 +1104,7 @@ static int omap_gpio_suspend(void)
return 0;
}
-static void omap_gpio_resume(void)
+static int omap_gpio_resume(struct device *dev)
{
struct gpio_bank *bank;
@@ -1090,21 +1113,17 @@ static void omap_gpio_resume(void)
unsigned long flags;
if (!bank-regs-wkup_en)
- return;
+ return 0;
spin_lock_irqsave(bank-lock, flags);
_gpio_rmw(base, bank-regs-wkup_en, 0x, 0);
_gpio_rmw(base, bank-regs-wkup_en, bank-saved_wakeup, 1);
spin_unlock_irqrestore(bank-lock, flags);
}
-}
-static struct syscore_ops omap_gpio_syscore_ops = {
- .suspend= omap_gpio_suspend,
- .resume = omap_gpio_resume,
-};
+ return 0;
+}
-#ifdef CONFIG_ARCH_OMAP2PLUS
static void omap_gpio_save_context(struct gpio_bank *bank);
static void omap_gpio_restore_context(struct gpio_bank *bank);
@@ -1148,11 +1167,15 @@ void omap2_gpio_prepare_for_idle(int off_mode)
bank-need_context_restore = true;
[PATCH v9 11/31] gpio/omap: cleanup omap_gpio_mod_init function
With register offsets now defined for respective OMAP versions we can get rid
of cpu_class_* checks. This function now has common initialization code for
all OMAP versions. Initialization specific to OMAP16xx has been moved within
omap16xx_gpio_init().
Signed-off-by: Tarun Kanti DebBarma tarun.ka...@ti.com
Signed-off-by: Charulatha V ch...@ti.com
Reviewed-by: Santosh Shilimkar santosh.shilim...@ti.com
Acked-by: Tony Lindgren t...@atomide.com
---
arch/arm/mach-omap1/gpio16xx.c | 35 +-
drivers/gpio/gpio-omap.c | 77
2 files changed, 57 insertions(+), 55 deletions(-)
diff --git a/arch/arm/mach-omap1/gpio16xx.c b/arch/arm/mach-omap1/gpio16xx.c
index 46bb57a..86ac415 100644
--- a/arch/arm/mach-omap1/gpio16xx.c
+++ b/arch/arm/mach-omap1/gpio16xx.c
@@ -24,6 +24,9 @@
#define OMAP1610_GPIO4_BASE0xfffbbc00
#define OMAP1_MPUIO_VBASE OMAP1_MPUIO_BASE
+/* smart idle, enable wakeup */
+#define SYSCONFIG_WORD 0x14
+
/* mpu gpio */
static struct __initdata resource omap16xx_mpu_gpio_resources[] = {
{
@@ -218,12 +221,42 @@ static struct __initdata platform_device *
omap16xx_gpio_dev[] = {
static int __init omap16xx_gpio_init(void)
{
int i;
+ void __iomem *base;
+ struct resource *res;
+ struct platform_device *pdev;
+ struct omap_gpio_platform_data *pdata;
if (!cpu_is_omap16xx())
return -EINVAL;
- for (i = 0; i ARRAY_SIZE(omap16xx_gpio_dev); i++)
+ for (i = 0; i ARRAY_SIZE(omap16xx_gpio_dev); i++) {
+ pdev = omap16xx_gpio_dev[i];
+ pdata = pdev-dev.platform_data;
+
+ res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
+ if (unlikely(!res)) {
+ dev_err(pdev-dev, Invalid mem resource.\n);
+ return -ENODEV;
+ }
+
+ base = ioremap(res-start, resource_size(res));
+ if (unlikely(!base)) {
+ dev_err(pdev-dev, ioremap failed.\n);
+ return -ENOMEM;
+ }
+
+ __raw_writel(SYSCONFIG_WORD, base + OMAP1610_GPIO_SYSCONFIG);
+ iounmap(base);
+
+ /*
+* Enable system clock for GPIO module.
+* The CAM_CLK_CTRL *is* really the right place.
+*/
+ omap_writel(omap_readl(ULPD_CAM_CLK_CTRL) | 0x04,
+ ULPD_CAM_CLK_CTRL);
+
platform_device_register(omap16xx_gpio_dev[i]);
+ }
return 0;
}
diff --git a/drivers/gpio/gpio-omap.c b/drivers/gpio/gpio-omap.c
index c5bb2e2..b9d50cc 100644
--- a/drivers/gpio/gpio-omap.c
+++ b/drivers/gpio/gpio-omap.c
@@ -611,7 +611,6 @@ static void gpio_irq_handler(unsigned int irq, struct
irq_desc *desc)
if (!(isr 1))
continue;
-#ifdef CONFIG_ARCH_OMAP1
/*
* Some chips can't respond to both rising and falling
* at the same time. If this irq was requested with
@@ -621,7 +620,6 @@ static void gpio_irq_handler(unsigned int irq, struct
irq_desc *desc)
*/
if (bank-toggle_mask (1 gpio_index))
_toggle_gpio_edge_triggering(bank, gpio_index);
-#endif
generic_handle_irq(gpio_irq);
}
@@ -899,62 +897,30 @@ static void __init omap_gpio_show_rev(struct gpio_bank
*bank)
*/
static struct lock_class_key gpio_lock_class;
-/* TODO: Cleanup cpu_is_* checks */
static void omap_gpio_mod_init(struct gpio_bank *bank)
{
- if (cpu_class_is_omap2()) {
- if (cpu_is_omap44xx()) {
- __raw_writel(0x, bank-base +
- OMAP4_GPIO_IRQSTATUSCLR0);
- __raw_writel(0x, bank-base +
-OMAP4_GPIO_DEBOUNCENABLE);
- /* Initialize interface clk ungated, module enabled */
- __raw_writel(0, bank-base + OMAP4_GPIO_CTRL);
- } else if (cpu_is_omap34xx()) {
- __raw_writel(0x, bank-base +
- OMAP24XX_GPIO_IRQENABLE1);
- __raw_writel(0x, bank-base +
- OMAP24XX_GPIO_IRQSTATUS1);
- __raw_writel(0x, bank-base +
- OMAP24XX_GPIO_DEBOUNCE_EN);
-
- /* Initialize interface clk ungated, module enabled */
- __raw_writel(0, bank-base + OMAP24XX_GPIO_CTRL);
- }
- } else if (cpu_class_is_omap1()) {
- if (bank_is_mpuio(bank)) {
- __raw_writew(0x,
[PATCH v9 07/31] gpio/omap: further cleanup using wkup_en register
Wakeup enable register offset initialized according to OMAP versions
during device registration. Use this to avoid version checks.
Starting with OMAP4, legacy registers should not be used in combination
with the updated regsiters. Use wkup_en register consistently for
all SoCs wherever applicable.
Signed-off-by: Tarun Kanti DebBarma tarun.ka...@ti.com
Signed-off-by: Charulatha V ch...@ti.com
Reviewed-by: Santosh Shilimkar santosh.shilim...@ti.com
Acked-by: Tony Lindgren t...@atomide.com
---
arch/arm/mach-omap1/gpio16xx.c |1 +
arch/arm/mach-omap2/gpio.c |2 +
arch/arm/plat-omap/include/plat/gpio.h |1 +
drivers/gpio/gpio-omap.c | 110 ++--
4 files changed, 25 insertions(+), 89 deletions(-)
diff --git a/arch/arm/mach-omap1/gpio16xx.c b/arch/arm/mach-omap1/gpio16xx.c
index df4bb44..1eb47e2 100644
--- a/arch/arm/mach-omap1/gpio16xx.c
+++ b/arch/arm/mach-omap1/gpio16xx.c
@@ -89,6 +89,7 @@ static struct omap_gpio_reg_offs omap16xx_gpio_regs = {
.irqenable = OMAP1610_GPIO_IRQENABLE1,
.set_irqenable = OMAP1610_GPIO_SET_IRQENABLE1,
.clr_irqenable = OMAP1610_GPIO_CLEAR_IRQENABLE1,
+ .wkup_en= OMAP1610_GPIO_WAKEUPENABLE,
};
static struct __initdata omap_gpio_platform_data omap16xx_gpio1_config = {
diff --git a/arch/arm/mach-omap2/gpio.c b/arch/arm/mach-omap2/gpio.c
index bc9271a..4877b52 100644
--- a/arch/arm/mach-omap2/gpio.c
+++ b/arch/arm/mach-omap2/gpio.c
@@ -89,6 +89,7 @@ static int omap2_gpio_dev_init(struct omap_hwmod *oh, void
*unused)
pdata-regs-debounce = OMAP24XX_GPIO_DEBOUNCE_VAL;
pdata-regs-debounce_en = OMAP24XX_GPIO_DEBOUNCE_EN;
pdata-regs-ctrl = OMAP24XX_GPIO_CTRL;
+ pdata-regs-wkup_en = OMAP24XX_GPIO_WAKE_EN;
break;
case 2:
pdata-bank_type = METHOD_GPIO_44XX;
@@ -106,6 +107,7 @@ static int omap2_gpio_dev_init(struct omap_hwmod *oh, void
*unused)
pdata-regs-debounce = OMAP4_GPIO_DEBOUNCINGTIME;
pdata-regs-debounce_en = OMAP4_GPIO_DEBOUNCENABLE;
pdata-regs-ctrl = OMAP4_GPIO_CTRL;
+ pdata-regs-wkup_en = OMAP4_GPIO_IRQWAKEN0;
break;
default:
WARN(1, Invalid gpio bank_type\n);
diff --git a/arch/arm/plat-omap/include/plat/gpio.h
b/arch/arm/plat-omap/include/plat/gpio.h
index 649226e..65fa473 100644
--- a/arch/arm/plat-omap/include/plat/gpio.h
+++ b/arch/arm/plat-omap/include/plat/gpio.h
@@ -189,6 +189,7 @@ struct omap_gpio_reg_offs {
u16 debounce;
u16 debounce_en;
u16 ctrl;
+ u16 wkup_en;
bool irqenable_inv;
};
diff --git a/drivers/gpio/gpio-omap.c b/drivers/gpio/gpio-omap.c
index d46a805..a472380 100644
--- a/drivers/gpio/gpio-omap.c
+++ b/drivers/gpio/gpio-omap.c
@@ -51,9 +51,7 @@ struct gpio_bank {
u16 virtual_irq_start;
int method;
u32 suspend_wakeup;
-#if defined(CONFIG_ARCH_OMAP16XX) || defined(CONFIG_ARCH_OMAP2PLUS)
u32 saved_wakeup;
-#endif
u32 non_wakeup_gpios;
u32 enabled_non_wakeup_gpios;
struct gpio_regs context;
@@ -599,30 +597,15 @@ static int omap_gpio_request(struct gpio_chip *chip,
unsigned offset)
static void omap_gpio_free(struct gpio_chip *chip, unsigned offset)
{
struct gpio_bank *bank = container_of(chip, struct gpio_bank, chip);
+ void __iomem *base = bank-base;
unsigned long flags;
spin_lock_irqsave(bank-lock, flags);
-#ifdef CONFIG_ARCH_OMAP16XX
- if (bank-method == METHOD_GPIO_1610) {
- /* Disable wake-up during idle for dynamic tick */
- void __iomem *reg = bank-base + OMAP1610_GPIO_CLEAR_WAKEUPENA;
- __raw_writel(1 offset, reg);
- }
-#endif
-#if defined(CONFIG_ARCH_OMAP2) || defined(CONFIG_ARCH_OMAP3)
- if (bank-method == METHOD_GPIO_24XX) {
- /* Disable wake-up during idle for dynamic tick */
- void __iomem *reg = bank-base + OMAP24XX_GPIO_CLEARWKUENA;
- __raw_writel(1 offset, reg);
- }
-#endif
-#ifdef CONFIG_ARCH_OMAP4
- if (bank-method == METHOD_GPIO_44XX) {
+
+ if (bank-regs-wkup_en)
/* Disable wake-up during idle for dynamic tick */
- void __iomem *reg = bank-base + OMAP4_GPIO_IRQWAKEN0;
- __raw_writel(1 offset, reg);
- }
-#endif
+ _gpio_rmw(base, bank-regs-wkup_en, 1 offset, 0);
+
bank-mod_usage = ~(1 offset);
if (bank-regs-ctrl !bank-mod_usage) {
@@ -1072,8 +1055,8 @@ omap_mpuio_alloc_gc(struct gpio_bank *bank, unsigned int
irq_start,
ct-chip.irq_mask = irq_gc_mask_set_bit;
ct-chip.irq_unmask = irq_gc_mask_clr_bit;
ct-chip.irq_set_type = gpio_irq_type;
- /* REVISIT: assuming only 16xx supports MPUIO wake events */
- if (cpu_is_omap16xx())
+
+ if (bank-regs-wkup_en)
[PATCH v9 17/31] gpio/omap: optimize suspend and resume functions
There is no need to operate on all the banks every time the function is called.
Just operate on the current bank passed by the framework.
Signed-off-by: Tarun Kanti DebBarma tarun.ka...@ti.com
Reviewed-by: Santosh Shilimkar santosh.shilim...@ti.com
---
drivers/gpio/gpio-omap.c | 54 -
1 files changed, 29 insertions(+), 25 deletions(-)
diff --git a/drivers/gpio/gpio-omap.c b/drivers/gpio/gpio-omap.c
index e5dd3bb..174aa06 100644
--- a/drivers/gpio/gpio-omap.c
+++ b/drivers/gpio/gpio-omap.c
@@ -1055,6 +1055,8 @@ static int __devinit omap_gpio_probe(struct
platform_device *pdev)
goto err_free;
}
+ platform_set_drvdata(pdev, bank);
+
pm_runtime_enable(bank-dev);
pm_runtime_irq_safe(bank-dev);
pm_runtime_get_sync(bank-dev);
@@ -1082,44 +1084,46 @@ err_exit:
static int omap_gpio_suspend(struct device *dev)
{
- struct gpio_bank *bank;
+ struct platform_device *pdev = to_platform_device(dev);
+ struct gpio_bank *bank = platform_get_drvdata(pdev);
+ void __iomem *base = bank-base;
+ void __iomem *wakeup_enable;
+ unsigned long flags;
- list_for_each_entry(bank, omap_gpio_list, node) {
- void __iomem *base = bank-base;
- void __iomem *wake_status;
- unsigned long flags;
+ if (!bank-mod_usage || !bank-loses_context)
+ return 0;
- if (!bank-regs-wkup_en)
- return 0;
+ if (!bank-regs-wkup_en || !bank-suspend_wakeup)
+ return 0;
- wake_status = bank-base + bank-regs-wkup_en;
+ wakeup_enable = bank-base + bank-regs-wkup_en;
- spin_lock_irqsave(bank-lock, flags);
- bank-saved_wakeup = __raw_readl(wake_status);
- _gpio_rmw(base, bank-regs-wkup_en, 0x, 0);
- _gpio_rmw(base, bank-regs-wkup_en, bank-suspend_wakeup, 1);
- spin_unlock_irqrestore(bank-lock, flags);
- }
+ spin_lock_irqsave(bank-lock, flags);
+ bank-saved_wakeup = __raw_readl(wakeup_enable);
+ _gpio_rmw(base, bank-regs-wkup_en, 0x, 0);
+ _gpio_rmw(base, bank-regs-wkup_en, bank-suspend_wakeup, 1);
+ spin_unlock_irqrestore(bank-lock, flags);
return 0;
}
static int omap_gpio_resume(struct device *dev)
{
- struct gpio_bank *bank;
+ struct platform_device *pdev = to_platform_device(dev);
+ struct gpio_bank *bank = platform_get_drvdata(pdev);
+ void __iomem *base = bank-base;
+ unsigned long flags;
- list_for_each_entry(bank, omap_gpio_list, node) {
- void __iomem *base = bank-base;
- unsigned long flags;
+ if (!bank-mod_usage || !bank-loses_context)
+ return 0;
- if (!bank-regs-wkup_en)
- return 0;
+ if (!bank-regs-wkup_en || !bank-saved_wakeup)
+ return 0;
- spin_lock_irqsave(bank-lock, flags);
- _gpio_rmw(base, bank-regs-wkup_en, 0x, 0);
- _gpio_rmw(base, bank-regs-wkup_en, bank-saved_wakeup, 1);
- spin_unlock_irqrestore(bank-lock, flags);
- }
+ spin_lock_irqsave(bank-lock, flags);
+ _gpio_rmw(base, bank-regs-wkup_en, 0x, 0);
+ _gpio_rmw(base, bank-regs-wkup_en, bank-saved_wakeup, 1);
+ spin_unlock_irqrestore(bank-lock, flags);
return 0;
}
--
1.7.0.4
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[PATCH v9 19/31] gpio/omap: fix debounce clock handling
The dbck_enable_mask indicates which all GPIOs within a bank have debounce
enabled and dbck is enabled/disabled based upon this. But there is no
mechanism to track the dbck state. In order to manage the dbck state we need
additional flag and logic so that turning off/on dbck is synchronized with
pm_runtime_put/get_sync calls.
Signed-off-by: Tarun Kanti DebBarma tarun.ka...@ti.com
---
drivers/gpio/gpio-omap.c | 29 +
1 files changed, 21 insertions(+), 8 deletions(-)
diff --git a/drivers/gpio/gpio-omap.c b/drivers/gpio/gpio-omap.c
index 175a364..3a3e09a 100644
--- a/drivers/gpio/gpio-omap.c
+++ b/drivers/gpio/gpio-omap.c
@@ -67,6 +67,7 @@ struct gpio_bank {
struct clk *dbck;
u32 mod_usage;
u32 dbck_enable_mask;
+ bool dbck_enabled;
struct device *dev;
bool is_mpuio;
bool dbck_flag;
@@ -160,6 +161,22 @@ static inline void _gpio_rmw(void __iomem *base, u32 reg,
u32 mask, bool set)
__raw_writel(l, base + reg);
}
+static inline void _gpio_dbck_enable(struct gpio_bank *bank)
+{
+ if (bank-dbck_enable_mask !bank-dbck_enabled) {
+ clk_enable(bank-dbck);
+ bank-dbck_enabled = true;
+ }
+}
+
+static inline void _gpio_dbck_disable(struct gpio_bank *bank)
+{
+ if (bank-dbck_enable_mask bank-dbck_enabled) {
+ clk_disable(bank-dbck);
+ bank-dbck_enabled = false;
+ }
+}
+
/**
* _set_gpio_debounce - low level gpio debounce time
* @bank: the gpio bank we're acting upon
@@ -1188,6 +1205,7 @@ save_gpio_context:
bank-get_context_loss_count(bank-dev);
omap_gpio_save_context(bank);
+ _gpio_dbck_disable(bank);
spin_unlock_irqrestore(bank-lock, flags);
return 0;
@@ -1205,6 +1223,7 @@ static int omap_gpio_runtime_resume(struct device *dev)
return 0;
spin_lock_irqsave(bank-lock, flags);
+ _gpio_dbck_enable(bank);
if (!bank-enabled_non_wakeup_gpios || !bank-need_context_restore) {
spin_unlock_irqrestore(bank-lock, flags);
return 0;
@@ -1284,15 +1303,12 @@ void omap2_gpio_prepare_for_idle(int power_mode)
struct gpio_bank *bank;
list_for_each_entry(bank, omap_gpio_list, node) {
- int j;
-
if (!bank-mod_usage)
continue;
bank-power_mode = power_mode;
- for (j = 0; j hweight_long(bank-dbck_enable_mask); j++)
- clk_disable(bank-dbck);
+ pm_runtime_put_sync_suspend(bank-dev);
}
}
@@ -1301,13 +1317,10 @@ void omap2_gpio_resume_after_idle(void)
struct gpio_bank *bank;
list_for_each_entry(bank, omap_gpio_list, node) {
- int j;
-
if (!bank-mod_usage)
continue;
- for (j = 0; j hweight_long(bank-dbck_enable_mask); j++)
- clk_enable(bank-dbck);
+ pm_runtime_get_sync(bank-dev);
}
}
--
1.7.0.4
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[PATCH v9 23/31] gpio/omap: enable irq at the end of all configuration in restore
From: Nishanth Menon n...@ti.com
Setup the interrupt enable registers only after we have configured the
required edge and required configurations, not before, to prevent
spurious events as part of restore routine.
Signed-off-by: Nishanth Menon n...@ti.com
Signed-off-by: Tarun Kanti DebBarma tarun.ka...@ti.com
Reviewed-by: Santosh Shilimkar santosh.shilim...@ti.com
---
drivers/gpio/gpio-omap.c |9 +
1 files changed, 5 insertions(+), 4 deletions(-)
diff --git a/drivers/gpio/gpio-omap.c b/drivers/gpio/gpio-omap.c
index 6f8a7d3..7f7636b 100644
--- a/drivers/gpio/gpio-omap.c
+++ b/drivers/gpio/gpio-omap.c
@@ -1361,10 +1361,6 @@ void omap2_gpio_resume_after_idle(void)
static void omap_gpio_restore_context(struct gpio_bank *bank)
{
- __raw_writel(bank-context.irqenable1,
- bank-base + bank-regs-irqenable);
- __raw_writel(bank-context.irqenable2,
- bank-base + bank-regs-irqenable2);
__raw_writel(bank-context.wake_en,
bank-base + bank-regs-wkup_en);
__raw_writel(bank-context.ctrl, bank-base + bank-regs-ctrl);
@@ -1384,6 +1380,11 @@ static void omap_gpio_restore_context(struct gpio_bank
*bank)
__raw_writel(bank-context.debounce_en,
bank-base + bank-regs-debounce_en);
}
+
+ __raw_writel(bank-context.irqenable1,
+ bank-base + bank-regs-irqenable);
+ __raw_writel(bank-context.irqenable2,
+ bank-base + bank-regs-irqenable2);
}
#else
#define omap_gpio_suspend NULL
--
1.7.0.4
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[PATCH v9 05/31] gpio/omap: make non-wakeup GPIO part of pdata
From: Charulatha V ch...@ti.com
Non-wakeup GPIOs are available only in OMAP2. Avoid cpu_is checks by making
non_wakeup_gpios as part of pdata.
Signed-off-by: Charulatha V ch...@ti.com
Reviewed-by: Santosh Shilimkar santosh.shilim...@ti.com
Acked-by: Tony Lindgren t...@atomide.com
---
arch/arm/mach-omap2/gpio.c |8
arch/arm/plat-omap/include/plat/gpio.h |1 +
drivers/gpio/gpio-omap.c |8 +---
3 files changed, 10 insertions(+), 7 deletions(-)
diff --git a/arch/arm/mach-omap2/gpio.c b/arch/arm/mach-omap2/gpio.c
index f84db8f..1d60fff 100644
--- a/arch/arm/mach-omap2/gpio.c
+++ b/arch/arm/mach-omap2/gpio.c
@@ -65,6 +65,14 @@ static int omap2_gpio_dev_init(struct omap_hwmod *oh, void
*unused)
switch (oh-class-rev) {
case 0:
+ if (id == 1)
+ /* non-wakeup GPIO pins for OMAP2 Bank1 */
+ pdata-non_wakeup_gpios = 0xe203ffc0;
+ else if (id == 2)
+ /* non-wakeup GPIO pins for OMAP2 Bank2 */
+ pdata-non_wakeup_gpios = 0x08700040;
+ /* fall through */
+
case 1:
pdata-bank_type = METHOD_GPIO_24XX;
pdata-regs-revision = OMAP24XX_GPIO_REVISION;
diff --git a/arch/arm/plat-omap/include/plat/gpio.h
b/arch/arm/plat-omap/include/plat/gpio.h
index ed881c3..41459e2 100644
--- a/arch/arm/plat-omap/include/plat/gpio.h
+++ b/arch/arm/plat-omap/include/plat/gpio.h
@@ -199,6 +199,7 @@ struct omap_gpio_platform_data {
int bank_stride;/* Only needed for omap1 MPUIO */
bool dbck_flag; /* dbck required or not - True for OMAP34 */
bool loses_context; /* whether the bank would ever lose context */
+ u32 non_wakeup_gpios;
struct omap_gpio_reg_offs *regs;
diff --git a/drivers/gpio/gpio-omap.c b/drivers/gpio/gpio-omap.c
index 40ee7b3..a0bdd92 100644
--- a/drivers/gpio/gpio-omap.c
+++ b/drivers/gpio/gpio-omap.c
@@ -1022,13 +1022,6 @@ static void omap_gpio_mod_init(struct gpio_bank *bank)
/* Initialize interface clk ungated, module enabled */
__raw_writel(0, bank-base + OMAP24XX_GPIO_CTRL);
- } else if (cpu_is_omap24xx()) {
- static const u32 non_wakeup_gpios[] = {
- 0xe203ffc0, 0x08700040
- };
- if (bank-id ARRAY_SIZE(non_wakeup_gpios))
- bank-non_wakeup_gpios =
- non_wakeup_gpios[bank-id];
}
} else if (cpu_class_is_omap1()) {
if (bank_is_mpuio(bank)) {
@@ -1181,6 +1174,7 @@ static int __devinit omap_gpio_probe(struct
platform_device *pdev)
bank-dbck_flag = pdata-dbck_flag;
bank-stride = pdata-bank_stride;
bank-width = pdata-bank_width;
+ bank-non_wakeup_gpios = pdata-non_wakeup_gpios;
bank-loses_context = pdata-loses_context;
bank-get_context_loss_count = pdata-get_context_loss_count;
bank-regs = pdata-regs;
--
1.7.0.4
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[PATCH v9 20/31] gpio/omap: fix incorrect access of debounce module
Enable debounce clock before writing/reading debounce registers.
Disable the clock at the end so that it is synchronized with the
pm_runtime_get/put_sync calls.
Enable debounce clock per module. This call is mandatory because
in omap_gpio_request() when *_runtime_get_sync() is called,
_gpio_dbck_enable() within runtime callbck fails to turn on dbck
because dbck_enable_mask used within _gpio_dbck_enable() is still
not initialized at that point. Therefore we have to enable dbck here.
Signed-off-by: Tarun Kanti DebBarma tarun.ka...@ti.com
---
drivers/gpio/gpio-omap.c | 18 +-
1 files changed, 13 insertions(+), 5 deletions(-)
diff --git a/drivers/gpio/gpio-omap.c b/drivers/gpio/gpio-omap.c
index 3a3e09a..7f32391 100644
--- a/drivers/gpio/gpio-omap.c
+++ b/drivers/gpio/gpio-omap.c
@@ -205,22 +205,30 @@ static void _set_gpio_debounce(struct gpio_bank *bank,
unsigned gpio,
l = GPIO_BIT(bank, gpio);
+ clk_enable(bank-dbck);
reg = bank-base + bank-regs-debounce;
__raw_writel(debounce, reg);
reg = bank-base + bank-regs-debounce_en;
val = __raw_readl(reg);
- if (debounce) {
+ if (debounce)
val |= l;
- clk_enable(bank-dbck);
- } else {
+ else
val = ~l;
- clk_disable(bank-dbck);
- }
bank-dbck_enable_mask = val;
__raw_writel(val, reg);
+ clk_disable(bank-dbck);
+ /*
+* Enable debounce clock per module.
+* This call is mandatory because in omap_gpio_request() when
+* *_runtime_get_sync() is called, _gpio_dbck_enable() within
+* runtime callbck fails to turn on dbck because dbck_enable_mask
+* used within _gpio_dbck_enable() is still not initialized at
+* that point. Therefore we have to enable dbck here.
+*/
+ _gpio_dbck_enable(bank);
}
static inline void set_gpio_trigger(struct gpio_bank *bank, int gpio,
--
1.7.0.4
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[PATCH v9 08/31] gpio/omap: use level/edge detect reg offsets
By adding level and edge detection register offsets and then initializing them
correctly according to OMAP versions during device registrations we can now
remove
lot of revision checks in these functions.
Signed-off-by: Tarun Kanti DebBarma tarun.ka...@ti.com
Signed-off-by: Charulatha V ch...@ti.com
Reviewed-by: Santosh Shilimkar santosh.shilim...@ti.com
Acked-by: Tony Lindgren t...@atomide.com
---
arch/arm/mach-omap2/gpio.c |8 ++
arch/arm/plat-omap/include/plat/gpio.h |4 +
drivers/gpio/gpio-omap.c | 114 +---
3 files changed, 44 insertions(+), 82 deletions(-)
diff --git a/arch/arm/mach-omap2/gpio.c b/arch/arm/mach-omap2/gpio.c
index 4877b52..ae5043e 100644
--- a/arch/arm/mach-omap2/gpio.c
+++ b/arch/arm/mach-omap2/gpio.c
@@ -90,6 +90,10 @@ static int omap2_gpio_dev_init(struct omap_hwmod *oh, void
*unused)
pdata-regs-debounce_en = OMAP24XX_GPIO_DEBOUNCE_EN;
pdata-regs-ctrl = OMAP24XX_GPIO_CTRL;
pdata-regs-wkup_en = OMAP24XX_GPIO_WAKE_EN;
+ pdata-regs-leveldetect0 = OMAP24XX_GPIO_LEVELDETECT0;
+ pdata-regs-leveldetect1 = OMAP24XX_GPIO_LEVELDETECT1;
+ pdata-regs-risingdetect = OMAP24XX_GPIO_RISINGDETECT;
+ pdata-regs-fallingdetect = OMAP24XX_GPIO_FALLINGDETECT;
break;
case 2:
pdata-bank_type = METHOD_GPIO_44XX;
@@ -108,6 +112,10 @@ static int omap2_gpio_dev_init(struct omap_hwmod *oh, void
*unused)
pdata-regs-debounce_en = OMAP4_GPIO_DEBOUNCENABLE;
pdata-regs-ctrl = OMAP4_GPIO_CTRL;
pdata-regs-wkup_en = OMAP4_GPIO_IRQWAKEN0;
+ pdata-regs-leveldetect0 = OMAP4_GPIO_LEVELDETECT0;
+ pdata-regs-leveldetect1 = OMAP4_GPIO_LEVELDETECT1;
+ pdata-regs-risingdetect = OMAP4_GPIO_RISINGDETECT;
+ pdata-regs-fallingdetect = OMAP4_GPIO_FALLINGDETECT;
break;
default:
WARN(1, Invalid gpio bank_type\n);
diff --git a/arch/arm/plat-omap/include/plat/gpio.h
b/arch/arm/plat-omap/include/plat/gpio.h
index 65fa473..97f8c4e 100644
--- a/arch/arm/plat-omap/include/plat/gpio.h
+++ b/arch/arm/plat-omap/include/plat/gpio.h
@@ -190,6 +190,10 @@ struct omap_gpio_reg_offs {
u16 debounce_en;
u16 ctrl;
u16 wkup_en;
+ u16 leveldetect0;
+ u16 leveldetect1;
+ u16 risingdetect;
+ u16 fallingdetect;
bool irqenable_inv;
};
diff --git a/drivers/gpio/gpio-omap.c b/drivers/gpio/gpio-omap.c
index a472380..7b25115 100644
--- a/drivers/gpio/gpio-omap.c
+++ b/drivers/gpio/gpio-omap.c
@@ -258,15 +258,9 @@ static inline void set_24xx_gpio_triggering(struct
gpio_bank *bank, int gpio,
bank-enabled_non_wakeup_gpios = ~gpio_bit;
}
- if (cpu_is_omap44xx()) {
- bank-level_mask =
- __raw_readl(bank-base + OMAP4_GPIO_LEVELDETECT0) |
- __raw_readl(bank-base + OMAP4_GPIO_LEVELDETECT1);
- } else {
- bank-level_mask =
- __raw_readl(bank-base + OMAP24XX_GPIO_LEVELDETECT0) |
- __raw_readl(bank-base + OMAP24XX_GPIO_LEVELDETECT1);
- }
+ bank-level_mask =
+ __raw_readl(bank-base + bank-regs-leveldetect0) |
+ __raw_readl(bank-base + bank-regs-leveldetect1);
}
#endif
@@ -406,12 +400,12 @@ static int gpio_irq_type(struct irq_data *d, unsigned
type)
if (type ~IRQ_TYPE_SENSE_MASK)
return -EINVAL;
- /* OMAP1 allows only only edge triggering */
- if (!cpu_class_is_omap2()
-(type (IRQ_TYPE_LEVEL_LOW|IRQ_TYPE_LEVEL_HIGH)))
+ bank = irq_data_get_irq_chip_data(d);
+
+ if (!bank-regs-leveldetect0
+ (type (IRQ_TYPE_LEVEL_LOW|IRQ_TYPE_LEVEL_HIGH)))
return -EINVAL;
- bank = irq_data_get_irq_chip_data(d);
spin_lock_irqsave(bank-lock, flags);
retval = _set_gpio_triggering(bank, GPIO_INDEX(bank, gpio), type);
spin_unlock_irqrestore(bank-lock, flags);
@@ -659,9 +653,8 @@ static void gpio_irq_handler(unsigned int irq, struct
irq_desc *desc)
if (cpu_is_omap15xx() (bank-method == METHOD_MPUIO))
isr = 0x;
- if (cpu_class_is_omap2()) {
+ if (bank-level_mask)
level_mask = bank-level_mask enabled;
- }
/* clear edge sensitive interrupts before handler(s) are
called so that we don't miss any interrupt occurred while
@@ -1272,40 +1265,18 @@ void omap2_gpio_prepare_for_idle(int off_mode)
if (!(bank-enabled_non_wakeup_gpios))
goto save_gpio_context;
- if (cpu_is_omap24xx() || cpu_is_omap34xx()) {
- bank-saved_datain =
[PATCH v9 18/31] gpio/omap: cleanup prepare_for_idle and resume_after_idle
Since *_prepare_for_idle() and *_resume_after_idle() are called
with interrupts disabled they should be kept as simple as possible.
So, moving most of the stuff to *_runtime_suspend/resume() callbacks.
To avoid invalid context restore happening in *_runtime_resume()
callback as a result of *_get_sync() call in *_gpio_probe(), update
bank-context_loss_count. This would make context restore condition
check false in the callback and skip restore until further
initialization take place.
Unlike most GPIO registers the OE has 0x as the default value.
To make sure invalid context is not restored, updating the OE context
with default value.
Signed-off-by: Tarun Kanti DebBarma tarun.ka...@ti.com
Signed-off-by: Charulatha V ch...@ti.com
Reviewed-by: Santosh Shilimkar santosh.shilim...@ti.com
---
drivers/gpio/gpio-omap.c | 249 +++---
1 files changed, 147 insertions(+), 102 deletions(-)
diff --git a/drivers/gpio/gpio-omap.c b/drivers/gpio/gpio-omap.c
index 174aa06..175a364 100644
--- a/drivers/gpio/gpio-omap.c
+++ b/drivers/gpio/gpio-omap.c
@@ -29,6 +29,8 @@
#include asm/gpio.h
#include asm/mach/irq.h
+#define OFF_MODE 1
+
static LIST_HEAD(omap_gpio_list);
struct gpio_regs {
@@ -74,6 +76,7 @@ struct gpio_bank {
u32 context_loss_count;
bool need_context_restore;
u16 id;
+ int power_mode;
void (*set_dataout)(struct gpio_bank *bank, int gpio, int enable);
u32 (*get_context_loss_count)(struct device *dev);
@@ -908,6 +911,8 @@ static void omap_gpio_mod_init(struct gpio_bank *bank)
if (bank-regs-debounce_en)
_gpio_rmw(base, bank-regs-debounce_en, 0, 1);
+ /* Save OE default value (0x) in the context */
+ bank-context.oe = __raw_readl(bank-base + bank-regs-direction);
/* Initialize interface clk ungated, module enabled */
if (bank-regs-ctrl)
_gpio_rmw(base, bank-regs-ctrl, 0, 1);
@@ -1059,6 +1064,13 @@ static int __devinit omap_gpio_probe(struct
platform_device *pdev)
pm_runtime_enable(bank-dev);
pm_runtime_irq_safe(bank-dev);
+ /*
+* Avoid context restore happening in runtime callback
+* because of pm_runtime_get_sync() by making context
+* context restore condition check false. This is to make
+* sure that we do not restore invalid context.
+*/
+ bank-context_loss_count = bank-get_context_loss_count(bank-dev);
pm_runtime_get_sync(bank-dev);
if (bank-is_mpuio)
@@ -1132,141 +1144,170 @@ static int omap_gpio_resume(struct device *dev)
static void omap_gpio_save_context(struct gpio_bank *bank);
static void omap_gpio_restore_context(struct gpio_bank *bank);
-void omap2_gpio_prepare_for_idle(int off_mode)
+static int omap_gpio_runtime_suspend(struct device *dev)
{
- struct gpio_bank *bank;
+ struct platform_device *pdev = to_platform_device(dev);
+ struct gpio_bank *bank = platform_get_drvdata(pdev);
+ u32 l1 = 0, l2 = 0;
+ unsigned long flags;
- list_for_each_entry(bank, omap_gpio_list, node) {
- u32 l1 = 0, l2 = 0;
- int j;
+ if (!bank-loses_context)
+ return 0;
- if (!bank-loses_context)
- continue;
+ spin_lock_irqsave(bank-lock, flags);
+ if (bank-power_mode != OFF_MODE) {
+ bank-power_mode = 0;
+ goto save_gpio_context;
+ }
+ /*
+* If going to OFF, remove triggering for all
+* non-wakeup GPIOs. Otherwise spurious IRQs will be
+* generated. See OMAP2420 Errata item 1.101.
+*/
+ if (!(bank-enabled_non_wakeup_gpios))
+ goto save_gpio_context;
- for (j = 0; j hweight_long(bank-dbck_enable_mask); j++)
- clk_disable(bank-dbck);
+ bank-saved_datain = __raw_readl(bank-base +
+ bank-regs-datain);
+ l1 = __raw_readl(bank-base + bank-regs-fallingdetect);
+ l2 = __raw_readl(bank-base + bank-regs-risingdetect);
- if (!off_mode)
- continue;
+ bank-saved_fallingdetect = l1;
+ bank-saved_risingdetect = l2;
+ l1 = ~bank-enabled_non_wakeup_gpios;
+ l2 = ~bank-enabled_non_wakeup_gpios;
- /* If going to OFF, remove triggering for all
-* non-wakeup GPIOs. Otherwise spurious IRQs will be
-* generated. See OMAP2420 Errata item 1.101. */
- if (!(bank-enabled_non_wakeup_gpios))
- goto save_gpio_context;
+ __raw_writel(l1, bank-base + bank-regs-fallingdetect);
+ __raw_writel(l2, bank-base + bank-regs-risingdetect);
- bank-saved_datain = __raw_readl(bank-base +
- bank-regs-datain);
- l1 =
[PATCH v9 14/31] gpio/omap: remove bank-method METHOD_* macros
From: Charulatha V ch...@ti.com
The only bank-type (method) used in the OMAP GPIO driver is MPUIO type as they
need to be handled separately. Identify the same using a flag and remove all
METHOD_* macros.
mpuio_init() function is defined under #ifdefs. It is required only in case
of MPUIO bank type and only when PM operations are supported by it.
This is applicable only in case of OMAP16xx SoC's MPUIO GPIO bank type.
For all the other cases it is a dummy function. Hence clean up the same
and remove all the OMAP SoC specific #ifdefs.
Signed-off-by: Charulatha V ch...@ti.com
Signed-off-by: Tarun Kanti DebBarma tarun.ka...@ti.com
Reviewed-by: Santosh Shilimkar santosh.shilim...@ti.com
Acked-by: Tony Lindgren t...@atomide.com
---
arch/arm/mach-omap1/gpio15xx.c |3 +-
arch/arm/mach-omap1/gpio16xx.c |6 +
arch/arm/mach-omap1/gpio7xx.c |8 +--
arch/arm/mach-omap2/gpio.c |2 -
arch/arm/plat-omap/include/plat/gpio.h |8 +--
drivers/gpio/gpio-omap.c | 38 +--
6 files changed, 10 insertions(+), 55 deletions(-)
diff --git a/arch/arm/mach-omap1/gpio15xx.c b/arch/arm/mach-omap1/gpio15xx.c
index 950e467..634903e 100644
--- a/arch/arm/mach-omap1/gpio15xx.c
+++ b/arch/arm/mach-omap1/gpio15xx.c
@@ -47,7 +47,7 @@ static struct omap_gpio_reg_offs omap15xx_mpuio_regs = {
static struct __initdata omap_gpio_platform_data omap15xx_mpu_gpio_config = {
.virtual_irq_start = IH_MPUIO_BASE,
- .bank_type = METHOD_MPUIO,
+ .is_mpuio = true,
.bank_width = 16,
.bank_stride= 1,
.regs = omap15xx_mpuio_regs,
@@ -90,7 +90,6 @@ static struct omap_gpio_reg_offs omap15xx_gpio_regs = {
static struct __initdata omap_gpio_platform_data omap15xx_gpio_config = {
.virtual_irq_start = IH_GPIO_BASE,
- .bank_type = METHOD_GPIO_1510,
.bank_width = 16,
.regs = omap15xx_gpio_regs,
};
diff --git a/arch/arm/mach-omap1/gpio16xx.c b/arch/arm/mach-omap1/gpio16xx.c
index 86ac415..1c5f90e 100644
--- a/arch/arm/mach-omap1/gpio16xx.c
+++ b/arch/arm/mach-omap1/gpio16xx.c
@@ -53,7 +53,7 @@ static struct omap_gpio_reg_offs omap16xx_mpuio_regs = {
static struct __initdata omap_gpio_platform_data omap16xx_mpu_gpio_config = {
.virtual_irq_start = IH_MPUIO_BASE,
- .bank_type = METHOD_MPUIO,
+ .is_mpuio = true,
.bank_width = 16,
.bank_stride= 1,
.regs = omap16xx_mpuio_regs,
@@ -100,7 +100,6 @@ static struct omap_gpio_reg_offs omap16xx_gpio_regs = {
static struct __initdata omap_gpio_platform_data omap16xx_gpio1_config = {
.virtual_irq_start = IH_GPIO_BASE,
- .bank_type = METHOD_GPIO_1610,
.bank_width = 16,
.regs = omap16xx_gpio_regs,
};
@@ -130,7 +129,6 @@ static struct __initdata resource
omap16xx_gpio2_resources[] = {
static struct __initdata omap_gpio_platform_data omap16xx_gpio2_config = {
.virtual_irq_start = IH_GPIO_BASE + 16,
- .bank_type = METHOD_GPIO_1610,
.bank_width = 16,
.regs = omap16xx_gpio_regs,
};
@@ -160,7 +158,6 @@ static struct __initdata resource
omap16xx_gpio3_resources[] = {
static struct __initdata omap_gpio_platform_data omap16xx_gpio3_config = {
.virtual_irq_start = IH_GPIO_BASE + 32,
- .bank_type = METHOD_GPIO_1610,
.bank_width = 16,
.regs = omap16xx_gpio_regs,
};
@@ -190,7 +187,6 @@ static struct __initdata resource
omap16xx_gpio4_resources[] = {
static struct __initdata omap_gpio_platform_data omap16xx_gpio4_config = {
.virtual_irq_start = IH_GPIO_BASE + 48,
- .bank_type = METHOD_GPIO_1610,
.bank_width = 16,
.regs = omap16xx_gpio_regs,
};
diff --git a/arch/arm/mach-omap1/gpio7xx.c b/arch/arm/mach-omap1/gpio7xx.c
index 207a23c..433491c 100644
--- a/arch/arm/mach-omap1/gpio7xx.c
+++ b/arch/arm/mach-omap1/gpio7xx.c
@@ -52,8 +52,8 @@ static struct omap_gpio_reg_offs omap7xx_mpuio_regs = {
static struct __initdata omap_gpio_platform_data omap7xx_mpu_gpio_config = {
.virtual_irq_start = IH_MPUIO_BASE,
- .bank_type = METHOD_MPUIO,
.bank_width = 32,
+ .is_mpuio = true,
.bank_stride= 2,
.regs = omap7xx_mpuio_regs,
};
@@ -94,7 +94,6 @@ static struct omap_gpio_reg_offs omap7xx_gpio_regs = {
static struct __initdata omap_gpio_platform_data omap7xx_gpio1_config = {
.virtual_irq_start = IH_GPIO_BASE,
- .bank_type = METHOD_GPIO_7XX,
Re: [PATCH 0/4] fixes for twl4030-irq in mainline
Hi Felipe, On Tue, Dec 13, 2011 at 04:12:02PM +0200, Felipe Contreras wrote: Hi, On Mon, Dec 12, 2011 at 7:38 PM, Samuel Ortiz sa...@linux.intel.com wrote: On Sun, Nov 27, 2011 at 07:17:41AM +1100, NeilBrown wrote: The recent tidying up of twl4030-irq seems to have left it broken. At least it doesn't work for me on my gta04 (www.gta04.org). The first interrupt from the device freezes the whole system (by being constantly delivered) The following 4 patches make it work for me and addresses some other less critical issues like a typo in a comment :-) Thanks, I applied all 4 of them. Did you apply them for 3.2 or 3.3? Without the first patch any system that has a twl4030 chip will immediately hang on the first interrupt, and many functions of twl4030 will just not work without the second one. Thanks for the heads up. I applied the first 2 patches to my for-linus branch. Cheers, Samuel. -- Intel Open Source Technology Centre http://oss.intel.com/ -- To unsubscribe from this list: send the line unsubscribe linux-omap in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
Re: [PATCHv11 1/8] ARM: OMAP2+: hwmod: Add API to enable IO ring wakeup.
Hi Tero On Mon, 12 Dec 2011, Tero Kristo wrote: From: R, Govindraj govindraj.r...@ti.com Add API to enable IO pad wakeup capability based on mux dynamic pad and wake_up enable flag available from hwmod_mux initialization. Use the wakeup_enable flag and enable wakeup capability for the given pads. Wakeup capability will be enabled/disabled during hwmod idle transition based on whether wakeup_flag is set or cleared. Map the enable/disable pad wakeup API's to hwmod_wakeup_enable/disable. Signed-off-by: Govindraj.R govindraj.r...@ti.com Since you're in the submitter chain for these patches, I'll need your Signed-off-by on this patch and the next one. Okay to add it? - Paul -- To unsubscribe from this list: send the line unsubscribe linux-omap in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
Re: [PATCHv11 1/8] ARM: OMAP2+: hwmod: Add API to enable IO ring wakeup.
Hi
On Mon, 12 Dec 2011, Tero Kristo wrote:
From: R, Govindraj govindraj.r...@ti.com
Add API to enable IO pad wakeup capability based on mux dynamic pad and
wake_up enable flag available from hwmod_mux initialization.
Use the wakeup_enable flag and enable wakeup capability
for the given pads. Wakeup capability will be enabled/disabled
during hwmod idle transition based on whether wakeup_flag is
set or cleared.
Map the enable/disable pad wakeup API's to hwmod_wakeup_enable/disable.
Signed-off-by: Govindraj.R govindraj.r...@ti.com
A few changes have been made to this patch:
- The documentation has been improved
- omap_hwmod_{enable,disable}_ioring_wakeup() have been removed, since
they are not called outside the omap_hwmod code and were missing
function prototypes in omap_hwmod.h
- The omap_hwmod_set_ioring_wakeup() function has been modified to
not return anything, and indentation depth has been reduced
I still don't think this patch is 100% correct. For example, if
omap_hwmod_enable_wakeup() or omap_hwmod_disable_wakeup() is called on an
idle hwmod, shouldn't the caller expect the SCM PADCONF registers to be
updated immediately? The current code merely changes the dynamic mux
data. If there is some rationale for not updating the hardware registers
at this point, I'd like to know what it is.
Modified patch is below; please let me know if you have any comments.
I may modify it again to synchronize the hardware with the in-memory
settings immediately.
- Paul
From: Govindraj R govindraj.r...@ti.com
Date: Tue, 13 Dec 2011 13:50:23 -0700
Subject: [PATCH] ARM: OMAP2+: hwmod: Add API to enable IO ring wakeup
Add API to enable IO pad wakeup capability based on mux dynamic pad and
wake_up enable flag available from hwmod_mux initialization.
Use the wakeup_enable flag and enable wakeup capability
for the given pads. Wakeup capability will be enabled/disabled
during hwmod idle transition based on whether wakeup_flag is
set or cleared.
Signed-off-by: Govindraj.R govindraj.r...@ti.com
XXX Tero's sign-off?
[p...@pwsan.com: rearranged code to limit indentation, cleaned up
documentation, removed unused non-static functions]
Signed-off-by: Paul Walmsley p...@pwsan.com
---
arch/arm/mach-omap2/omap_hwmod.c | 39 ++
1 files changed, 39 insertions(+), 0 deletions(-)
diff --git a/arch/arm/mach-omap2/omap_hwmod.c b/arch/arm/mach-omap2/omap_hwmod.c
index 207a2ff..ec19841 100644
--- a/arch/arm/mach-omap2/omap_hwmod.c
+++ b/arch/arm/mach-omap2/omap_hwmod.c
@@ -381,6 +381,43 @@ static int _set_module_autoidle(struct omap_hwmod *oh, u8
autoidle,
}
/**
+ * _set_ioring_wakeup - enable/disable IO pad wakeup flag for dynamic muxing
+ * @oh: struct omap_hwmod *
+ * @set_wake: bool value indicating to set (true) or clear (false) wakeup
enable
+ *
+ * Set or clear the I/O pad wakeup flag in the dynamic mux entries for
+ * the hwmod @oh. This function does not change anything in the
+ * hardware. Rather, the @oh-mux-pads_dynamic array is changed, and
+ * these settings are later written to the SCM PADCTRL registers when
+ * the hwmod is enabled or idled. No return value.
+ *
+ * XXX Shouldn't the dynamic pad changes affect hwmod shutdown as
+ * well?
+ * XXX Shouldn't this function update the hardware SCM PADCONF registers if
+ * anything has changed?
+ */
+static void _set_ioring_wakeup(struct omap_hwmod *oh, bool set_wake)
+{
+ struct omap_device_pad *pad;
+ int j;
+
+ if (!oh-mux || !oh-mux-enabled)
+ return;
+
+ for (j = 0; j oh-mux-nr_pads_dynamic; j++) {
+ pad = oh-mux-pads_dynamic[j];
+
+ if (!(pad-flags OMAP_DEVICE_PAD_WAKEUP))
+ continue;
+
+ if (set_wake)
+ pad-idle |= OMAP_WAKEUP_EN;
+ else
+ pad-idle = ~OMAP_WAKEUP_EN;
+ }
+}
+
+/**
* _enable_wakeup: set OCP_SYSCONFIG.ENAWAKEUP bit in the hardware
* @oh: struct omap_hwmod *
*
@@ -2416,6 +2453,7 @@ int omap_hwmod_enable_wakeup(struct omap_hwmod *oh)
v = oh-_sysc_cache;
_enable_wakeup(oh, v);
_write_sysconfig(v, oh);
+ _set_ioring_wakeup(oh, true);
spin_unlock_irqrestore(oh-_lock, flags);
return 0;
@@ -2446,6 +2484,7 @@ int omap_hwmod_disable_wakeup(struct omap_hwmod *oh)
v = oh-_sysc_cache;
_disable_wakeup(oh, v);
_write_sysconfig(v, oh);
+ _set_ioring_wakeup(oh, false);
spin_unlock_irqrestore(oh-_lock, flags);
return 0;
--
1.7.7.3
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Re: [PATCH 2/2] Revert ARM: RX-51: Enable isp1704 power on/off
On Mon, Dec 12, 2011 at 9:09 AM, Jarkko Nikula jarkko.nik...@bitmer.com wrote: Indeed yes. I checked that in 3.0 it still works but not in 3.1 so some non isp1704_charger change has broke it as there hasn't been changes on it. Actually it's broken in 3.0 as well, try this configuration: # CONFIG_USB_MUSB_HOST is not set # CONFIG_USB_MUSB_PERIPHERAL is not set CONFIG_USB_MUSB_OTG=y CONFIG_USB_GADGET_MUSB_HDRC=y CONFIG_USB_MUSB_HDRC_HCD=y CONFIG_USB_GADGET_SELECTED=y # CONFIG_USB_GADGET_FUSB300 is not set # CONFIG_USB_GADGET_OMAP is not set # CONFIG_USB_GADGET_R8A66597 is not set # CONFIG_USB_GADGET_PXA_U2O is not set # CONFIG_USB_GADGET_M66592 is not set # CONFIG_USB_GADGET_DUMMY_HCD is not set I will try to find where the issues started to happen, but it's a bit difficult because all this USB Kconfig stuff is completely messed up. *Sigh* -- Felipe Contreras -- To unsubscribe from this list: send the line unsubscribe linux-omap in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
Re: [PATCHv11 1/8] ARM: OMAP2+: hwmod: Add API to enable IO ring wakeup.
Hi Govindraj, Tero,
another question about this patch:
On Tue, 13 Dec 2011, Paul Walmsley wrote:
diff --git a/arch/arm/mach-omap2/omap_hwmod.c
b/arch/arm/mach-omap2/omap_hwmod.c
index 207a2ff..ec19841 100644
--- a/arch/arm/mach-omap2/omap_hwmod.c
+++ b/arch/arm/mach-omap2/omap_hwmod.c
@@ -381,6 +381,43 @@ static int _set_module_autoidle(struct omap_hwmod *oh,
u8 autoidle,
}
/**
+ * _set_ioring_wakeup - enable/disable IO pad wakeup flag for dynamic muxing
+ * @oh: struct omap_hwmod *
+ * @set_wake: bool value indicating to set (true) or clear (false) wakeup
enable
+ *
+ * Set or clear the I/O pad wakeup flag in the dynamic mux entries for
+ * the hwmod @oh. This function does not change anything in the
+ * hardware. Rather, the @oh-mux-pads_dynamic array is changed, and
+ * these settings are later written to the SCM PADCTRL registers when
+ * the hwmod is enabled or idled. No return value.
+ *
+ * XXX Shouldn't the dynamic pad changes affect hwmod shutdown as
+ * well?
+ * XXX Shouldn't this function update the hardware SCM PADCONF registers if
+ * anything has changed?
+ */
+static void _set_ioring_wakeup(struct omap_hwmod *oh, bool set_wake)
+{
+ struct omap_device_pad *pad;
+ int j;
+
+ if (!oh-mux || !oh-mux-enabled)
+ return;
+
+ for (j = 0; j oh-mux-nr_pads_dynamic; j++) {
+ pad = oh-mux-pads_dynamic[j];
+
+ if (!(pad-flags OMAP_DEVICE_PAD_WAKEUP))
+ continue;
+
+ if (set_wake)
+ pad-idle |= OMAP_WAKEUP_EN;
+ else
+ pad-idle = ~OMAP_WAKEUP_EN;
+ }
+}
It appears that this loop only affects dynamic mux entries. Should it
also affect static mux entries?
- Paul
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sys_clkout2
What's the best way to enable sys_clkout2 (DM3730, latest kernel)? I've managed to set it up properly and it runs in U-Boot, but the kernel is disabling it. It's a bit of a tangle trying to figure out not only what piece of code is undoing my work, but how to get the clock to keep running. I want the clkout_cntrl register set to 0x8a, so any guidance on how to make this happen would be greatly appreciated. Thanks -- Gary Thomas | Consulting for the MLB Associates |Embedded world -- To unsubscribe from this list: send the line unsubscribe linux-omap in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
Re: [PATCH] omap: rx51: initialize isp1704 properly
* Felipe Contreras felipe.contre...@gmail.com [111213 11:33]: On Mon, Dec 12, 2011 at 9:44 PM, Tony Lindgren t...@atomide.com wrote: * Felipe Contreras felipe.contre...@gmail.com [111208 11:52]: On Thu, Dec 8, 2011 at 4:40 PM, Heikki Krogerus kro...@gmail.com wrote: On Wed, Dec 07, 2011 at 09:56:56PM +0200, Felipe Contreras wrote: From: Heikki Krogerus kro...@gmail.com I would prefer that you change this so this is from you, like it actually is. You can mention me in the commit message if you like. Well, you came with the fix, I just typed it down, but as you wish :) Without this USB networking doesn't work as the link is never detected. What this changes is, it leaves the transceiver powered by default instead of setting it into power off mode. So not only USB networking is affected by this. If isp1704_charger is not enabled with RX51, USB does not work at all. Please change the comment. I've updated the patch. Sorry what's the deal with this one? Is this the one to use or is there some other patch? Yeap, there's v2 of this one: 1323375780-13190-1-git-send-email-felipe.contre...@nokia.com OK, thanks applying into fixes. Tony -- To unsubscribe from this list: send the line unsubscribe linux-omap in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
Re: sys_clkout2
On Tue, 13 Dec 2011, Gary Thomas wrote: What's the best way to enable sys_clkout2 (DM3730, latest kernel)? I've managed to set it up properly and it runs in U-Boot, but the kernel is disabling it. It's a bit of a tangle trying to figure out not only what piece of code is undoing my work, but how to get the clock to keep running. It's probably getting disabled by omap2_clk_disable_unused() in mach-omap2/clock.c, which runs at the end of kernel init. I want the clkout_cntrl register set to 0x8a, so any guidance on how to make this happen would be greatly appreciated. I presume you have some external device that relies on sys_clkout2 for its clock input? If the device has a Linux driver associated with it, the clean way to fix it would be to add a clkdev line for it into mach-omap2/clock3xxx_data.c. Something like CLK(devname, fck, sys_clkout2, CK_3XXX), where devname is the name of your device. Then add some code into that driver to enable and disable the clock as needed. Something like ... struct clk *c; c = clk_get(dev_name(dev), fck); WARN(IS_ERR(c), cannot clk_get() device functional clock); clk_enable(c); ... and then clk_disable() it later in your driver when you don't need it. If you don't have a driver, you can hack a quick one up that just deals with the clock, and add it to your board file. Or if you just want a dirty hack, you can probably get away with just adding the ENABLE_ON_INIT flag to the sys_clkout2 .flags field in mach-omap2/clock3xxx_data.c. - Paul -- To unsubscribe from this list: send the line unsubscribe linux-omap in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
Re: [PATCHv11 2/8] ARM: OMAP2+: hwmod: Add API to check IO PAD wakeup status
Hi
a question
On Mon, 12 Dec 2011, Tero Kristo wrote:
So the patch description says:
From: R, Govindraj govindraj.r...@ti.com
Add API to determine IO-PAD wakeup event status for a given
hwmod dynamic_mux pad.
But the code does:
+ for (i = 0; i hmux-nr_pads; i++) {
+ struct omap_device_pad *pad = hmux-pads[i];
which is going to check all of the pads, not just the dynamic ones.
So it seems to me that we need to decide whether this code should be
testing all the pads, or just the dynamically remuxed ones. The same
thing should be decided for the code in patch 1.
Naïvely it seems to me that we want to test all of the pads in both
patches 1 and 2, not just the dynamically remuxable ones. Comments?
- Paul
Re: sys_clkout2
Hi one error: On Tue, 13 Dec 2011, Paul Walmsley wrote: struct clk *c; c = clk_get(dev_name(dev), fck); This should just be c = clk_get(dev, fck); sorry about that... - Paul -- To unsubscribe from this list: send the line unsubscribe linux-omap in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
Re: [PATCHv11 2/8] ARM: OMAP2+: hwmod: Add API to check IO PAD wakeup status
* Paul Walmsley p...@pwsan.com [111213 13:44]:
Hi
a question
On Mon, 12 Dec 2011, Tero Kristo wrote:
So the patch description says:
From: R, Govindraj govindraj.r...@ti.com
Add API to determine IO-PAD wakeup event status for a given
hwmod dynamic_mux pad.
But the code does:
+ for (i = 0; i hmux-nr_pads; i++) {
+ struct omap_device_pad *pad = hmux-pads[i];
which is going to check all of the pads, not just the dynamic ones.
So it seems to me that we need to decide whether this code should be
testing all the pads, or just the dynamically remuxed ones. The same
thing should be decided for the code in patch 1.
Naïvely it seems to me that we want to test all of the pads in both
patches 1 and 2, not just the dynamically remuxable ones. Comments?
You're right, it should be only the dynamic ones.
Tony
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Re: [PATCHv11 2/8] ARM: OMAP2+: hwmod: Add API to check IO PAD wakeup status
On Tue, 13 Dec 2011, Tony Lindgren wrote:
* Paul Walmsley p...@pwsan.com [111213 13:44]:
On Mon, 12 Dec 2011, Tero Kristo wrote:
So the patch description says:
From: R, Govindraj govindraj.r...@ti.com
Add API to determine IO-PAD wakeup event status for a given
hwmod dynamic_mux pad.
But the code does:
+ for (i = 0; i hmux-nr_pads; i++) {
+ struct omap_device_pad *pad = hmux-pads[i];
which is going to check all of the pads, not just the dynamic ones.
So it seems to me that we need to decide whether this code should be
testing all the pads, or just the dynamically remuxed ones. The same
thing should be decided for the code in patch 1.
Naïvely it seems to me that we want to test all of the pads in both
patches 1 and 2, not just the dynamically remuxable ones. Comments?
You're right, it should be only the dynamic ones.
Hmm, looks to me like it should check all of them? Can't a pad be marked
with OMAP_DEVICE_PAD_WAKEUP, but not be marked with OMAP_DEVICE_PAD_REMUX?
In that case it would not end up on the dynamic list, right?
- Paul
Re: [PATCH 1/3] ARM: OMAP2+: kconfig: Enable devicetree by default for OMAP2+ systems
* Cousson, Benoit b-cous...@ti.com [111213 05:02]: On 12/13/2011 2:27 PM, Tomi Valkeinen wrote: Hi, On Tue, 2011-12-06 at 17:49 +0100, Benoit Cousson wrote: devicetree will become the mandatory boot method for OMAP2+. In order to avoid cluttering the OMAP code with #ifdef CONFIG_OF, select USE_OF by default for every OMAP2+ systems. Select as well the APPENDED_DTB and ATAG_DTB_COMPAT to allow legacy boot loader to keep working properly. APPENDED_DTB sounds a bit dangerous to be enabled by default according to the config help text. The help is indeed really scary :-) Heh, but it's also true. Tony, Do we want to keep it by default? Or should we fix the kconfig help? Let's just leave out those two from omap2plus_defconfig then. Regards, Tony -- To unsubscribe from this list: send the line unsubscribe linux-omap in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
Re: [GIT PULL] omap hsmmc platform code changes for v3.3 merge window
On Mon, Dec 12, 2011 at 2:32 PM, Tony Lindgren t...@atomide.com wrote: Hi Arnd Olof, Please pull omap hsmmc platform code changes from: git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap hsmmc Ideally arch/arm/mach-omap2/hsmmc.c file will completely disappear with device tree, but looks like we're still some more patches away from that. Meanwhile, these are needed for various board files. Thanks, pulled into next/drivers. -Olof -- To unsubscribe from this list: send the line unsubscribe linux-omap in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
Re: [GIT PULL] Two non-critical DMA fixes for v3.3 merge window
Hi, On Mon, Dec 12, 2011 at 2:46 PM, Tony Lindgren t...@atomide.com wrote: Hi Arnd Olof, Please pull two non-critical DMA fixes from: git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap fixes-non-critical These are workarounds for corner cases. There's no rush to get them in during the -rc cycle, these are fixes for features that never worked before. Thanks, pulled into next/fixes-non-critical (to avoid confusion with the plain fixes branch for 3.2-rc). -Olof -- To unsubscribe from this list: send the line unsubscribe linux-omap in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
Re: [PATCHv11 2/8] ARM: OMAP2+: hwmod: Add API to check IO PAD wakeup status
* Paul Walmsley p...@pwsan.com [111213 14:06]:
On Tue, 13 Dec 2011, Tony Lindgren wrote:
* Paul Walmsley p...@pwsan.com [111213 13:44]:
On Mon, 12 Dec 2011, Tero Kristo wrote:
So the patch description says:
From: R, Govindraj govindraj.r...@ti.com
Add API to determine IO-PAD wakeup event status for a given
hwmod dynamic_mux pad.
But the code does:
+ for (i = 0; i hmux-nr_pads; i++) {
+ struct omap_device_pad *pad = hmux-pads[i];
which is going to check all of the pads, not just the dynamic ones.
So it seems to me that we need to decide whether this code should be
testing all the pads, or just the dynamically remuxed ones. The same
thing should be decided for the code in patch 1.
Naïvely it seems to me that we want to test all of the pads in both
patches 1 and 2, not just the dynamically remuxable ones. Comments?
You're right, it should be only the dynamic ones.
Hmm, looks to me like it should check all of them? Can't a pad be marked
with OMAP_DEVICE_PAD_WAKEUP, but not be marked with OMAP_DEVICE_PAD_REMUX?
In that case it would not end up on the dynamic list, right?
Hmm yes that's even more true :) Maybe the right approach would be to
copy the OMAP_DEVICE_PAD_WAKEUP pins also to the dynamic list to
avoid going through all of them.
Tony
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Re: [PATCH 2/2] Revert ARM: RX-51: Enable isp1704 power on/off
On Tue, Dec 13, 2011 at 11:19:52PM +0200, Felipe Contreras wrote: On Mon, Dec 12, 2011 at 9:09 AM, Jarkko Nikula jarkko.nik...@bitmer.com wrote: Indeed yes. I checked that in 3.0 it still works but not in 3.1 so some non isp1704_charger change has broke it as there hasn't been changes on it. Actually it's broken in 3.0 as well, try this configuration: # CONFIG_USB_MUSB_HOST is not set # CONFIG_USB_MUSB_PERIPHERAL is not set CONFIG_USB_MUSB_OTG=y CONFIG_USB_GADGET_MUSB_HDRC=y CONFIG_USB_MUSB_HDRC_HCD=y CONFIG_USB_GADGET_SELECTED=y # CONFIG_USB_GADGET_FUSB300 is not set # CONFIG_USB_GADGET_OMAP is not set # CONFIG_USB_GADGET_R8A66597 is not set # CONFIG_USB_GADGET_PXA_U2O is not set # CONFIG_USB_GADGET_M66592 is not set # CONFIG_USB_GADGET_DUMMY_HCD is not set I will try to find where the issues started to happen, but it's a bit difficult because all this USB Kconfig stuff is completely messed up. *Sigh* patches are welcome -- balbi signature.asc Description: Digital signature
Re: [PATCH 2/2] Revert ARM: RX-51: Enable isp1704 power on/off
On Wed, Dec 14, 2011 at 12:53 AM, Felipe Balbi ba...@ti.com wrote: On Tue, Dec 13, 2011 at 11:19:52PM +0200, Felipe Contreras wrote: On Mon, Dec 12, 2011 at 9:09 AM, Jarkko Nikula jarkko.nik...@bitmer.com wrote: Indeed yes. I checked that in 3.0 it still works but not in 3.1 so some non isp1704_charger change has broke it as there hasn't been changes on it. Actually it's broken in 3.0 as well, try this configuration: # CONFIG_USB_MUSB_HOST is not set # CONFIG_USB_MUSB_PERIPHERAL is not set CONFIG_USB_MUSB_OTG=y CONFIG_USB_GADGET_MUSB_HDRC=y CONFIG_USB_MUSB_HDRC_HCD=y CONFIG_USB_GADGET_SELECTED=y # CONFIG_USB_GADGET_FUSB300 is not set # CONFIG_USB_GADGET_OMAP is not set # CONFIG_USB_GADGET_R8A66597 is not set # CONFIG_USB_GADGET_PXA_U2O is not set # CONFIG_USB_GADGET_M66592 is not set # CONFIG_USB_GADGET_DUMMY_HCD is not set I will try to find where the issues started to happen, but it's a bit difficult because all this USB Kconfig stuff is completely messed up. *Sigh* patches are welcome The were not last times: http://mid.gmane.org/1288656853-4625-1-git-send-email-felipe.contre...@gmail.com http://mid.gmane.org/1287482608-11320-1-git-send-email-felipe.contre...@gmail.com But I'll try again... Once I'm done with this endless bisect =/ Cheers. -- Felipe Contreras -- To unsubscribe from this list: send the line unsubscribe linux-omap in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
Re: sys_clkout2
On 2011-12-13 14:56, Paul Walmsley wrote: On Tue, 13 Dec 2011, Gary Thomas wrote: What's the best way to enable sys_clkout2 (DM3730, latest kernel)? I've managed to set it up properly and it runs in U-Boot, but the kernel is disabling it. It's a bit of a tangle trying to figure out not only what piece of code is undoing my work, but how to get the clock to keep running. It's probably getting disabled by omap2_clk_disable_unused() in mach-omap2/clock.c, which runs at the end of kernel init. I want the clkout_cntrl register set to 0x8a, so any guidance on how to make this happen would be greatly appreciated. I presume you have some external device that relies on sys_clkout2 for its clock input? Precisely. Do I need to do anything special to control how the clock is configured, e.g. div src settings? If the device has a Linux driver associated with it, the clean way to fix it would be to add a clkdev line for it into mach-omap2/clock3xxx_data.c. Something like CLK(devname,fck,sys_clkout2, CK_3XXX), where devname is the name of your device. Then add some code into that driver to enable and disable the clock as needed. Something like ... struct clk *c; c = clk_get(dev_name(dev), fck); WARN(IS_ERR(c), cannot clk_get() device functional clock); clk_enable(c); ... and then clk_disable() it later in your driver when you don't need it. If you don't have a driver, you can hack a quick one up that just deals with the clock, and add it to your board file. Or if you just want a dirty hack, you can probably get away with just adding the ENABLE_ON_INIT flag to the sys_clkout2 .flags field in mach-omap2/clock3xxx_data.c. Thanks, I'll give this a try when I have eyes on the hardware (Wednesday) -- Gary Thomas | Consulting for the MLB Associates |Embedded world -- To unsubscribe from this list: send the line unsubscribe linux-omap in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
Re: [PATCH v8 00/20] OMAP2+: UART: Runtime adaptation + cleanup
Govindraj govindraj...@gmail.com writes: [...] I have re-based this patch series against LO master commit id: deee6d5359969a0ce4e2760cfd7b9f379bd5698a Same is available here [1] I have tested this patch series along with: 1.) Tero's V11 irq chaining series http://www.spinics.net/lists/linux-omap/msg61445.html (This patch series is used for uart wakeup handling using prcm_irq chaining) 2.) Rajendra's hwmod change http://www.spinics.net/lists/arm-kernel/msg148632.html (This patch handles init_no_idle flag setting without this patch there will be boot warning however all pm features will work after boot up.) Actually, without Rajendra's patch all features do not work. I don't get UART console wakeups from idle (with runtime PM autosuspend enabled) on 3430/n900 or 3530/Overo without Rajendra's patch. Kevin -- To unsubscribe from this list: send the line unsubscribe linux-omap in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
Re: [PATCH 2/6] OMAP2+: omap_hwmod: manage the wake-up latency constraints
jean.pi...@newoldbits.com writes: From: Jean Pihet j-pi...@ti.com Hwmod is queried from the OMAP_PM layer to manage the power domains nit: changelog needs a refresh as this isn't called from OMAP PM layer. wake-up latency constraints. Hwmod retrieves the correct power domain and if it exists it calls the corresponding power domain function. Tested on OMAP3 Beagleboard and OMAP4 Pandaboard in RET/OFF using wake-up latency constraints on MPU, CORE and PER. Signed-off-by: Jean Pihet j-pi...@ti.com Kevin -- To unsubscribe from this list: send the line unsubscribe linux-omap in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
Re: [PATCH 4/6] OMAP3: cpuidle: next C-state decision depends on the PM QoS MPU and CORE constraints
jean.pi...@newoldbits.com writes: From: Jean Pihet j-pi...@ti.com The MPU latency figures for cpuidle include the MPU itself and also the peripherals needed for the MPU to execute instructions (e.g. main memory, caches, IRQ controller, MMU etc). On OMAP3 those peripherals belong to the MPU and CORE power domains and so the cpuidle C-states are a combination of MPU and CORE states. This patch implements the relation between the cpuidle and per- device PM QoS frameworks in the OMAP3 specific idle callbacks. The chosen C-state shall satisfy the following conditions: . the 'valid' field is enabled, . it satisfies the enable_off_mode flag, . the next state for MPU and CORE power domains is not lower than the next state calculated by the per-device PM QoS. Tested on OMAP3 Beagleboard in RET/OFF using wake-up latency constraints on MPU, CORE and PER. Signed-off-by: Jean Pihet j-pi...@ti.com nit: this patch mixes functional changes and non-functional changes (whitespace cleanups, alignments etc.) For ease of review, it's best to do non-functional cleanups as a separate patch. Kevin -- To unsubscribe from this list: send the line unsubscribe linux-omap in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
Re: [PATCH v5 0/6] PM QoS: implement the OMAP low level constraints management code
Hi Jean, jean.pi...@newoldbits.com writes: From: Jean Pihet j-pi...@ti.com . Implement the devices wake-up latency constraints using the global device PM QoS notification handler which applies the constraints to the underlying layer . Implement the low level code which controls the power domains next power states, through the hwmod and pwrdm layers . Add cpuidle and power domains wake-up latency figures for OMAP3, cf. comments in the code and [1] for the details on where the numbers are magically coming from . Implement the relation between the cpuidle and per-device PM QoS frameworks in the OMAP3 specific idle callbacks. The chosen C-state shall satisfy the following conditions: . the 'valid' field is enabled, . it satisfies the enable_off_mode flag, . the next state for MPU and CORE power domains is not lower than the state programmed by the per-device PM QoS. I had a couple minor comments on this version, but after that, feel free to add: Reviewed-by: Kevin Hilman khil...@ti.com after that, this series will go upstream through Paul. Kevin -- To unsubscribe from this list: send the line unsubscribe linux-omap in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
Re: [PATCH v2 02/10] i2c: OMAP: Add DT support for i2c controller
Benoit Cousson b-cous...@ti.com writes: Add initial DT support to retrieve the frequency using a DT attribute instead of the pdata pointer if of_node exist. Add documentation for omap i2c controller binding. Based on original patches from Manju and Grant. Signed-off-by: Benoit Cousson b-cous...@ti.com Cc: Ben Dooks ben-li...@fluff.org This seems indepenent from the rest of the series, and I can queue up for merge via the I2C tree. Benoit, please confirm that we shouldn't have any problems if this patch goes independently. Grant/Rob, with your ack on the bindings, I can queue this up for the I2C maintainers along with some other OMAP I2C changes for v3.3. Kevin -- To unsubscribe from this list: send the line unsubscribe linux-omap in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
[PATCH v3] arm: omap3evm: Add support for an MT9M032 based camera board.
Adds board support for an MT9M032 based camera to omap3evm.
Signed-off-by: Martin Hostettler mar...@neutronstar.dyndns.org
---
arch/arm/mach-omap2/Makefile|3 +-
arch/arm/mach-omap2/board-omap3evm-camera.c | 155 +++
arch/arm/mach-omap2/board-omap3evm.c|4 +
3 files changed, 161 insertions(+), 1 deletions(-)
create mode 100644 arch/arm/mach-omap2/board-omap3evm-camera.c
Changes in V3
* Added missing copyright and attribution.
* switched to gpio_request_array for gpio init.
* removed device_initcall and added call to omap3_evm_camera_init into
omap3_evm_init
Changes in V2:
* ported to current mainline
* Style fixes
* Fix error handling
diff --git a/arch/arm/mach-omap2/Makefile b/arch/arm/mach-omap2/Makefile
index b009f17..6045789 100644
--- a/arch/arm/mach-omap2/Makefile
+++ b/arch/arm/mach-omap2/Makefile
@@ -196,7 +196,8 @@ obj-$(CONFIG_MACH_OMAP3530_LV_SOM) +=
board-omap3logic.o
obj-$(CONFIG_MACH_OMAP3_TORPEDO)+= board-omap3logic.o
obj-$(CONFIG_MACH_ENCORE) += board-omap3encore.o
obj-$(CONFIG_MACH_OVERO) += board-overo.o
-obj-$(CONFIG_MACH_OMAP3EVM)+= board-omap3evm.o
+obj-$(CONFIG_MACH_OMAP3EVM)+= board-omap3evm.o \
+ board-omap3evm-camera.o
obj-$(CONFIG_MACH_OMAP3_PANDORA) += board-omap3pandora.o
obj-$(CONFIG_MACH_OMAP_3430SDP)+= board-3430sdp.o
obj-$(CONFIG_MACH_NOKIA_N8X0) += board-n8x0.o
diff --git a/arch/arm/mach-omap2/board-omap3evm-camera.c
b/arch/arm/mach-omap2/board-omap3evm-camera.c
new file mode 100644
index 000..bffd5b8
--- /dev/null
+++ b/arch/arm/mach-omap2/board-omap3evm-camera.c
@@ -0,0 +1,155 @@
+/*
+ * Copyright (C) 2011 Texas Instruments Inc
+ * Copyright (C) 2010-2011 Lund Engineering
+ * Contact: Gil Lund gwl...@lundeng.com
+ * Authors:
+ *Vaibhav Hiremath hvaib...@ti.com
+ *Martin Hostettler mar...@neutronstar.dyndns.org
+ *
+ * Board intregration for a MT9M032 camera connected to IMAGE_CONN and I2C Bus
2
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * version 2 as published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful, but
+ * WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
+ * General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA
+ * 02110-1301 USA
+ */
+
+#include linux/i2c.h
+#include linux/init.h
+#include linux/platform_device.h
+
+#include linux/gpio.h
+#include plat/mux.h
+#include mux.h
+
+#include ../../../drivers/media/video/omap3isp/isp.h
+#include media/mt9m032.h
+
+#include devices.h
+
+#define EVM_TWL_GPIO_BASE OMAP_MAX_GPIO_LINES
+#define GPIO98_VID_DEC_RES 98
+#define nCAM_VD_SEL157
+
+#define MT9M032_I2C_BUS_NUM2
+
+
+enum omap3evmdc_mux {
+ MUX_TVP5146,
+ MUX_CAMERA_SENSOR,
+ MUX_EXP_CAMERA_SENSOR,
+};
+
+/**
+ * omap3evm_set_mux - Sets mux to enable signal routing to
+ * different peripherals present on new EVM board
+ * @mux_id: enum, mux id to enable
+ *
+ * Returns 0 for success or a negative error code
+ */
+static int omap3evm_set_mux(enum omap3evmdc_mux mux_id)
+{
+ /* Set GPIO6 = 1 */
+ gpio_set_value_cansleep(EVM_TWL_GPIO_BASE + 6, 1);
+ gpio_set_value_cansleep(EVM_TWL_GPIO_BASE + 2, 0);
+
+ switch (mux_id) {
+ case MUX_TVP5146:
+ gpio_set_value_cansleep(EVM_TWL_GPIO_BASE + 2, 0);
+ gpio_set_value(nCAM_VD_SEL, 1);
+ break;
+
+ case MUX_CAMERA_SENSOR:
+ gpio_set_value_cansleep(EVM_TWL_GPIO_BASE + 2, 0);
+ gpio_set_value(nCAM_VD_SEL, 0);
+ break;
+
+ case MUX_EXP_CAMERA_SENSOR:
+ gpio_set_value_cansleep(EVM_TWL_GPIO_BASE + 2, 1);
+ break;
+
+ default:
+ pr_err(omap3evm-camera: Invalid mux id #%d\n, mux_id);
+ return -EINVAL;
+ }
+
+ return 0;
+}
+
+static struct mt9m032_platform_data mt9m032_platform_data = {
+ .ext_clock = 1350,
+ .pll_pre_div = 6,
+ .pll_mul = 120,
+ .pll_out_div = 5,
+ .invert_pixclock = 1,
+};
+
+static struct i2c_board_info camera_i2c_devices[] = {
+ {
+ I2C_BOARD_INFO(MT9M032_NAME, MT9M032_I2C_ADDR),
+ .platform_data = mt9m032_platform_data,
+ },
+};
+
+static struct isp_subdev_i2c_board_info camera_i2c_subdevs[] = {
+ {
+ .board_info = camera_i2c_devices[0],
+ .i2c_adapter_id = MT9M032_I2C_BUS_NUM,
+ },
+ {},
+};
+
+static
Re: sys_clkout2
On Tue, 13 Dec 2011, Gary Thomas wrote:
On 2011-12-13 14:56, Paul Walmsley wrote:
I presume you have some external device that relies on sys_clkout2 for
its clock input?
Precisely.
Okay, so the clean way to do this is to write a short driver for that
device, if there isn't one already, that takes care of configuring the
clock settings that you need.
Do I need to do anything special to control how the clock is configured,
e.g. div src settings?
You can change the divider immediately upstream from the sys_clkout2
output by calling clk_set_rate() on the sys_clkout2 struct clk that you
got back from clk_get() in the example that I sent.
You can change the source for sys_clkout2 by calling clk_set_parent() on
clkout2_src_ck. This is a separate clock, so you'd need to add a new
clkdev entry for this for your driver, and you'd need to clk_get() it and
also clk_get() the new parent source clock that you'd want to use. Looks
like these are your choices for parents:
static const struct clksel clkout2_src_clksel[] = {
{ .parent = core_ck, .rates = clkout2_src_core_rates },
{ .parent = sys_ck,.rates = clkout2_src_sys_rates },
{ .parent = cm_96m_fck,.rates = clkout2_src_96m_rates },
{ .parent = omap_54m_fck, .rates = clkout2_src_54m_rates },
{ .parent = NULL }
};
Or if you just want a dirty hack, you can probably get away with just
adding the ENABLE_ON_INIT flag to the sys_clkout2 .flags field in
mach-omap2/clock3xxx_data.c.
Thanks, I'll give this a try when I have eyes on the hardware (Wednesday)
N.B., the kernel clock framework init code won't change clock parents or
divisors, except when doing so is needed to disable or enable the clock.
So if you are programming those from U-boot, you probably won't need to
change the parent or divisors from kernel code.
- Paul
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Re: [PATCHv11 2/8] ARM: OMAP2+: hwmod: Add API to check IO PAD wakeup status
On Tue, 13 Dec 2011, Tony Lindgren wrote: Hmm yes that's even more true :) Maybe the right approach would be to copy the OMAP_DEVICE_PAD_WAKEUP pins also to the dynamic list to avoid going through all of them. Looking at this further, it seems that the best thing to do for now is to just add hwmod mux entries with OMAP_DEVICE_PAD_WAKEUP into the dynamic list. Otherwise massive changes will be needed to omap_hwmod_mux() and related functions, since those currently only iterate over the dynamic mux entries. Will post the mux patch to do this. - Paul -- To unsubscribe from this list: send the line unsubscribe linux-omap in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
Re: [PATCHv11 1/8] ARM: OMAP2+: hwmod: Add API to enable IO ring wakeup.
Hi
so I've updated this patch to change the SCM PADCTRL registers if the
hwmod is currently idle, and _set_idle_ioring_wakeup() is called.
Otherwise calling _set_idle_ioring_wakeup() would be useless under those
conditions, since the new I/O ring wakeup values wouldn't be written back
to the hardware until the hwmod had gone through an idle-enabled and
enabled-idle transition.
Please try to consider the function's appropriate behavior under which
these functions can be called...
Updated patch below. Will update internally once I get Tero's
Signed-off-by:.
- Paul
From: Govindraj R govindraj.r...@ti.com
Date: Tue, 13 Dec 2011 13:50:23 -0700
Subject: [PATCH] ARM: OMAP2+: hwmod: Add API to enable IO ring wakeup
Add API to enable IO pad wakeup capability based on mux pad and
wake_up enable flag available from hwmod_mux initialization.
Use the wakeup_enable flag and enable wakeup capability for the given
pads. Wakeup capability will be enabled/disabled during hwmod idle
transition based on whether wakeup_flag is set or cleared. If the
hwmod is currently idled, and any mux values were changed by
_set_idle_ioring_wakeup(), the SCM PADCTRL registers will be updated.
Signed-off-by: Govindraj.R govindraj.r...@ti.com
XXX Tero's sign-off?
[p...@pwsan.com: rearranged code to limit indentation; cleaned up
function documentation; removed unused non-static functions; modified
to search all hwmod pads, not just dynamic remuxing ones; modified to
update SCM regs if hwmod is currently idle and any pads have changed]
Signed-off-by: Paul Walmsley p...@pwsan.com
---
arch/arm/mach-omap2/omap_hwmod.c | 47 ++
1 files changed, 47 insertions(+), 0 deletions(-)
diff --git a/arch/arm/mach-omap2/omap_hwmod.c b/arch/arm/mach-omap2/omap_hwmod.c
index 207a2ff..21ffd8a 100644
--- a/arch/arm/mach-omap2/omap_hwmod.c
+++ b/arch/arm/mach-omap2/omap_hwmod.c
@@ -381,6 +381,51 @@ static int _set_module_autoidle(struct omap_hwmod *oh, u8
autoidle,
}
/**
+ * _set_idle_ioring_wakeup - enable/disable IO pad wakeup on hwmod idle for mux
+ * @oh: struct omap_hwmod *
+ * @set_wake: bool value indicating to set (true) or clear (false) wakeup
enable
+ *
+ * Set or clear the I/O pad wakeup flag in the mux entries for the
+ * hwmod @oh. This function changes the @oh-mux-pads_dynamic array
+ * in memory. If the hwmod is currently idled, and the new idle
+ * values don't match the previous ones, this function will also
+ * update the SCM PADCTRL registers. Otherwise, if the hwmod is not
+ * currently idled, this function won't touch the hardware: the new
+ * mux settings are written to the SCM PADCTRL registers when the
+ * hwmod is idled. No return value.
+ */
+static void _set_idle_ioring_wakeup(struct omap_hwmod *oh, bool set_wake)
+{
+ struct omap_device_pad *pad;
+ bool change = false;
+ u16 prev_idle;
+ int j;
+
+ if (!oh-mux || !oh-mux-enabled)
+ return;
+
+ for (j = 0; j oh-mux-nr_pads_dynamic; j++) {
+ pad = oh-mux-pads_dynamic[j];
+
+ if (!(pad-flags OMAP_DEVICE_PAD_WAKEUP))
+ continue;
+
+ prev_idle = pad-idle;
+
+ if (set_wake)
+ pad-idle |= OMAP_WAKEUP_EN;
+ else
+ pad-idle = ~OMAP_WAKEUP_EN;
+
+ if (prev_idle != pad-idle)
+ change = true;
+ }
+
+ if (change oh-_state == _HWMOD_STATE_IDLE)
+ omap_hwmod_mux(oh-mux, _HWMOD_STATE_IDLE);
+}
+
+/**
* _enable_wakeup: set OCP_SYSCONFIG.ENAWAKEUP bit in the hardware
* @oh: struct omap_hwmod *
*
@@ -2416,6 +2461,7 @@ int omap_hwmod_enable_wakeup(struct omap_hwmod *oh)
v = oh-_sysc_cache;
_enable_wakeup(oh, v);
_write_sysconfig(v, oh);
+ _set_idle_ioring_wakeup(oh, true);
spin_unlock_irqrestore(oh-_lock, flags);
return 0;
@@ -2446,6 +2492,7 @@ int omap_hwmod_disable_wakeup(struct omap_hwmod *oh)
v = oh-_sysc_cache;
_disable_wakeup(oh, v);
_write_sysconfig(v, oh);
+ _set_idle_ioring_wakeup(oh, false);
spin_unlock_irqrestore(oh-_lock, flags);
return 0;
--
1.7.7.3
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Re: [PATCHv11 2/8] ARM: OMAP2+: hwmod: Add API to check IO PAD wakeup status
Hi Tero
looking at this patch:
On Mon, 12 Dec 2011, Tero Kristo wrote:
From: R, Govindraj govindraj.r...@ti.com
Add API to determine IO-PAD wakeup event status for a given
hwmod dynamic_mux pad.
Signed-off-by: Govindraj.R govindraj.r...@ti.com
It seems that your last patch drops the following code that this patch
adds:
diff --git a/arch/arm/mach-omap2/omap_hwmod.c
b/arch/arm/mach-omap2/omap_hwmod.c
index 8d37d83..d7f4623 100644
--- a/arch/arm/mach-omap2/omap_hwmod.c
+++ b/arch/arm/mach-omap2/omap_hwmod.c
@@ -2721,3 +2721,10 @@ int omap_hwmod_no_setup_reset(struct omap_hwmod *oh)
return 0;
}
+
+int omap_hwmod_pad_get_wakeup_status(struct omap_hwmod *oh)
+{
+ if (oh oh-mux)
+ return omap_hwmod_mux_get_wake_status(oh-mux);
+ return -EINVAL;
+}
diff --git a/arch/arm/plat-omap/include/plat/omap_hwmod.h
b/arch/arm/plat-omap/include/plat/omap_hwmod.h
index 8b372ed..1b81dfb 100644
--- a/arch/arm/plat-omap/include/plat/omap_hwmod.h
+++ b/arch/arm/plat-omap/include/plat/omap_hwmod.h
@@ -604,6 +604,7 @@ int omap_hwmod_get_context_loss_count(struct omap_hwmod
*oh);
int omap_hwmod_no_setup_reset(struct omap_hwmod *oh);
+int omap_hwmod_pad_get_wakeup_status(struct omap_hwmod *oh);
/*
* Chip variant-specific hwmod init routines - XXX should be converted
* to use initcalls once the initial boot ordering is straightened out
It's best in these circumstances to modify this patch not to add the code
in the first place. Otherwise this creates needless churn which plenty of
people are quite sensitized to. So, dropping these from patch 2.
- Paul
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[PATCH v4 0/6] common clk framework
From: Mike Turquette mturque...@ti.com The common clk framework is an attempt to define a generic struct clk which most platforms can use to build a clk tree and perform a set of well-defined operations. The previous patchset, v3, can be found at, http://article.gmane.org/gmane.linux.kernel/1218622 New stuff in v4: * clk rate change notifiers * clk debug info via debugfs (instead of sysfs) * lots of bug fixes Stuff that is known to be missing in v4: * basic mux and divider clk types * fix for migrating clk_prepare_count/clk_enable_count in clk_set_parent * minor rework comments from v3 * Documentation/clk.txt needs love All of the mising items above will be rolled into v5 ASAP. I wanted to go ahead and push out the new notifier changes for review and gather comments on those since those were a big gap in the v3 patchset. Paul W. also had some good comments about the greater clk API, and the opportunity to fix some of that stuff while this patchset is still under discussion. I didn't address those here because they require more thought, and more comments from reviewers. Finally, OMAP4 support for the common struct clk will be posted immediately after this patch series to LAKML and LOML, along with some hack patches that show how to use the recursive clk_set_rate for propagating rate changes up the tree for CPUfreq and how to use the new clk rate change notifiers in a driver. Mike Turquette (6): clk: Kconfig: add entry for HAVE_CLK_PREPARE Documentation: common clk API clk: introduce the common clock framework clk: introduce rate change notifiers clk: basic gateable and fixed-rate clks clk: export the clk tree topology to debugfs Documentation/clk.txt | 312 +++ drivers/clk/Kconfig | 23 ++ drivers/clk/Makefile|4 +- drivers/clk/clk-basic.c | 208 ++ drivers/clk/clk.c | 992 +++ include/linux/clk.h | 230 +++- 6 files changed, 1765 insertions(+), 4 deletions(-) create mode 100644 Documentation/clk.txt create mode 100644 drivers/clk/clk-basic.c create mode 100644 drivers/clk/clk.c -- 1.7.5.4 -- To unsubscribe from this list: send the line unsubscribe linux-omap in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
[PATCH v4 1/6] clk: Kconfig: add entry for HAVE_CLK_PREPARE
The common clk framework provides clk_prepare and clk_unprepare implementations. Create an entry for HAVE_CLK_PREPARE so that GENERIC_CLK can select it. Signed-off-by: Mike Turquette mturque...@linaro.org Acked-by: Shawn Guo shawn@linaro.org --- drivers/clk/Kconfig |3 +++ 1 files changed, 3 insertions(+), 0 deletions(-) diff --git a/drivers/clk/Kconfig b/drivers/clk/Kconfig index 3530927..7a9899bd 100644 --- a/drivers/clk/Kconfig +++ b/drivers/clk/Kconfig @@ -5,3 +5,6 @@ config CLKDEV_LOOKUP config HAVE_MACH_CLKDEV bool + +config HAVE_CLK_PREPARE + bool -- 1.7.5.4 -- To unsubscribe from this list: send the line unsubscribe linux-omap in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
[PATCH v4 6/6] clk: export the clk tree topology to debugfs
Represents the clk tree as a directory hieraching in debugfs. Each clk
is a directory filled with the following read-only entries:
clk_rate
clk_flags
clk_prepare_count
clk_enable_count
clk_notifier_count
This commit borrows some code from Yong Shen's patch to export clkdev
clk's to debugfs:
http://git.pengutronix.de/?p=imx/linux-2.6.git;a=commit;h=30aa15230747b3b92da16d841b1cf369f07192e7
Signed-off-by: Mike Turquette mturque...@linaro.org
Cc: Yong Shen yong.s...@linaro.org
Cc: Sascha Hauer s.ha...@pengutronix.de
---
drivers/clk/Kconfig |9 +++
drivers/clk/clk.c | 176 ++-
include/linux/clk.h |3 +
3 files changed, 186 insertions(+), 2 deletions(-)
diff --git a/drivers/clk/Kconfig b/drivers/clk/Kconfig
index ba7eb8c..09cc198 100644
--- a/drivers/clk/Kconfig
+++ b/drivers/clk/Kconfig
@@ -19,3 +19,12 @@ config GENERIC_CLK_BASIC
help
Allow use of basic, single-function clock types. These
common definitions can be used across many platforms.
+
+config GENERIC_CLK_DEBUG
+ bool Clock tree representation in debugs
+ depends on GENERIC_CLK
+ help
+ Creates a directory hierchy in debugfs for visualizing the clk
+ tree structure as well. Each directory contains read-only
+ members that export information specific to that clk node:
+ clk_rate, clk_flags, clk_prepare_count clk_enable_count.
diff --git a/drivers/clk/clk.c b/drivers/clk/clk.c
index f86cb98..a6ddbb1 100644
--- a/drivers/clk/clk.c
+++ b/drivers/clk/clk.c
@@ -23,6 +23,166 @@ static DEFINE_MUTEX(prepare_lock);
static HLIST_HEAD(clk_root_list);
static LIST_HEAD(clk_notifier_list);
+/***debugfs support***/
+
+#ifdef CONFIG_GENERIC_CLK_DEBUG
+#include linux/debugfs.h
+
+static struct dentry *rootdir;
+static int inited = 0;
+
+/* caller must hold prepare_lock */
+static int clk_debug_create_one(struct clk *clk, struct dentry *pdentry)
+{
+ struct dentry *d;
+ int ret = -ENOMEM;
+
+ if (!clk || !pdentry) {
+ ret = -EINVAL;
+ goto out;
+ }
+
+ d = debugfs_create_dir(clk-name, pdentry);
+ if (!d)
+ goto out;
+
+ clk-dentry = d;
+
+ d = debugfs_create_u64(clk_rate, S_IRUGO, clk-dentry,
+ (u64 *)clk-rate);
+ if (!d)
+ goto err_out;
+
+ d = debugfs_create_x32(clk_flags, S_IRUGO, clk-dentry,
+ (u32 *)clk-flags);
+ if (!d)
+ goto err_out;
+
+ d = debugfs_create_u32(clk_prepare_count, S_IRUGO, clk-dentry,
+ (u32 *)clk-prepare_count);
+ if (!d)
+ goto err_out;
+
+ d = debugfs_create_u32(clk_enable_count, S_IRUGO, clk-dentry,
+ (u32 *)clk-enable_count);
+ if (!d)
+ goto err_out;
+
+ d = debugfs_create_u32(clk_notifier_count, S_IRUGO, clk-dentry,
+ (u32 *)clk-notifier_count);
+ if (!d)
+ goto err_out;
+
+ ret = 0;
+ goto out;
+
+err_out:
+ debugfs_remove(clk-dentry);
+out:
+ return ret;
+}
+
+/* caller must hold prepare_lock */
+static int clk_debug_create_subtree(struct clk *clk, struct dentry *pdentry)
+{
+ struct clk *child;
+ struct hlist_node *tmp;
+ int ret = -EINVAL;;
+
+ if (!clk || !pdentry)
+ goto out;
+
+ ret = clk_debug_create_one(clk, pdentry);
+
+ if (ret)
+ goto out;
+
+ hlist_for_each_entry(child, tmp, clk-children, child_node)
+ clk_debug_create_subtree(child, clk-dentry);
+
+ ret = 0;
+out:
+ return ret;
+}
+
+/**
+ * clk_debug_register - add a clk node to the debugfs clk tree
+ * @clk: the clk being added to the debugfs clk tree
+ *
+ * Dynamically adds a clk to the debugfs clk tree if debugfs has been
+ * initialized. Otherwise it bails out early since the debugfs clk tree
+ * will be created lazily by clk_debug_init as part of a late_initcall.
+ *
+ * Caller must hold prepare_lock. Only clk_init calls this function (so
+ * far) so this is taken care.
+ */
+static int clk_debug_register(struct clk *clk)
+{
+ struct clk *parent;
+ struct dentry *pdentry;
+ int ret = 0;
+
+ if (!inited)
+ goto out;
+
+ parent = clk-parent;
+
+ /*
+* Check to see if a clk is a root clk. Also check that it is
+* safe to add this clk to debugfs
+*/
+ if (!parent)
+ pdentry = rootdir;
+ else
+ if (parent-dentry)
+ pdentry = parent-dentry;
+ else
+ goto out;
+
+ ret = clk_debug_create_subtree(clk, pdentry);
+
+out:
+ return ret;
+}
+
+/**
+ * clk_debug_init - lazily create the debugfs clk tree visualization
+ *
+ * clks are often initialized very early during boot before memory can
+ * be
[PATCH v4 2/6] Documentation: common clk API
Provide documentation for the common clk structures and APIs. This code
can be found in drivers/clk/ and include/linux/clk.h.
Signed-off-by: Mike Turquette mturque...@linaro.org
Cc: Jeremy Kerr jeremy.k...@canonical.com
---
Documentation/clk.txt | 312 +
1 files changed, 312 insertions(+), 0 deletions(-)
create mode 100644 Documentation/clk.txt
diff --git a/Documentation/clk.txt b/Documentation/clk.txt
new file mode 100644
index 000..ff75539c
--- /dev/null
+++ b/Documentation/clk.txt
@@ -0,0 +1,312 @@
+ The Common Clk Framework
+ Mike Turquette mturque...@ti.com
+
+ Part 1 - common data structures and API
+
+The common clk framework is a combination of a common definition of
+struct clk which can be used across most platforms as well as a set of
+driver-facing APIs which operate on those clks. Platforms can enable it
+by selecting CONFIG_GENERIC_CLK.
+
+Below is the common struct clk definition from include/linux/clk.h. It
+is modified slightly for brevity:
+
+struct clk {
+ const char *name;
+ const struct clk_ops*ops;
+ struct clk *parent;
+ unsigned long rate;
+ unsigned long flags;
+ unsigned intenable_count;
+ unsigned intprepare_count;
+ struct hlist_head children;
+ struct hlist_node child_node;
+};
+
+The .name, .parent and .children members make up the core of the clk
+tree topology. The clk API itself defines several driver-facing
+functions which operate on struct clk. Below is an abbreviated
+description of some of those functions taken from the kerneldoc in
+include/linux/clk.h:
+
+clk_prepare - This prepares the clock source for use. Must not be
+called from within atomic context. Must be called before clk_enable.
+
+clk_unprepare - This undoes a previously prepared clock. The caller
+must balance the number of prepare and unprepare calls. Must not be
+called from within atomic context. Must be called after clk_disable.
+
+clk_enable - Inform the system when the clock source should be running.
+If the clock can not be enabled/disabled, this should return success.
+May be called from atomic contexts. Returns success (0) or negative
+errno. Must be called after clk_prepare.
+
+clk_disable - Inform the system that a clock source is no longer
+required by a driver and may be shut down. May be called from atomic
+contexts. Must be called before clk_unprepare.
+
+clk_get_rate - Obtain the current clock rate (in Hz) for a clock source.
+This is only valid once the clock source has been enabled. Returns zero
+if the clock rate is unknown. Does not touch the hardware, just the
+cached rate value.
+
+clk_round_rate - Adjust a rate to the exact rate a clock can provide.
+Returns rounded clock rate in Hz, or negative errno.
+
+clk_set_rate - Set the clock rate for a clock source. Returns success
+(0) or negative errno.
+
+clk_get_parent - Get the parent clock source for this clock. Returns
+struct clk corresponding to parent clock source, or valid IS_ERR()
+condition containing errno. Does not touch the hardware, just the
+cached parent value.
+
+clk_set_parent - Set the parent clock source for this clock. Returns
+success (0) or negative errno.
+
+For clk implementations which use the common definition of struct clk,
+the above functions use the struct clk_ops pointer in struct clk to
+perform the hardware-specific parts of those operations. The definition
+of struct clk_ops:
+
+ struct clk_ops {
+ int (*prepare)(struct clk *clk);
+ void(*unprepare)(struct clk *clk);
+ int (*enable)(struct clk *clk);
+ void(*disable)(struct clk *clk);
+ unsigned long (*recalc_rate)(struct clk *clk);
+ long(*round_rate)(struct clk *clk, unsigned long,
+ unsigned long *);
+ int (*set_rate)(struct clk *clk, unsigned long);
+ int (*set_parent)(struct clk *clk, struct clk *);
+ struct clk *(*get_parent)(struct clk *clk);
+ };
+
+ Part 2 - hardware clk implementations
+
+The strength of the common struct clk comes from its .ops pointer and
+the ability for platform and driver code to wrap the struct clk instance
+with hardware-specific data which the operations in the .ops pointer
+have knowledge of. To illustrate consider the simple gateable clk
+implementation in drivers/clk/clk-basic.c:
+
+struct clk_gate {
+ struct clk clk;
+ struct clk *fixed_parent;
+ void __iomem*reg;
+ u8 bit_idx;
+};
+
+struct clk_gate contains the clk as well as hardware-specific knowledge
+about which register and bit controls this clk's gating. The
+fixed-parent member is also there as a
[PATCH v4 3/6] clk: introduce the common clock framework
The common clk framework is an attempt to define a common struct clk
which can be used by most platforms, and an API that drivers can always
use safely for managing clks.
The net result is consolidation of many different struct clk definitions
and platform-specific clk framework implementations.
This patch introduces the common struct clk, struct clk_ops and
definitions for the long-standing clk API in include/clk/clk.h.
Platforms may define their own hardware-specific clk structure, so long
as it wraps an instance of the common struct clk which is passed to
clk_init at initialization time. From this point on all of the usual
clk APIs should be supported, so long as the platform supports them
through hardware-specific callbacks in struct clk_ops.
See Documentation/clk.txt for more details.
This patch is based on the work of Jeremy Kerr, which in turn was based
on the work of Ben Herrenschmidt. Big thanks to both of them for
kickstarting this effort.
Signed-off-by: Mike Turquette mturque...@linaro.org
Cc: Jeremy Kerr jeremy.k...@canonical.com
---
drivers/clk/Kconfig |4 +
drivers/clk/Makefile |1 +
drivers/clk/clk.c| 564 ++
include/linux/clk.h | 130 +++-
4 files changed, 695 insertions(+), 4 deletions(-)
create mode 100644 drivers/clk/clk.c
diff --git a/drivers/clk/Kconfig b/drivers/clk/Kconfig
index 7a9899bd..adc0586 100644
--- a/drivers/clk/Kconfig
+++ b/drivers/clk/Kconfig
@@ -8,3 +8,7 @@ config HAVE_MACH_CLKDEV
config HAVE_CLK_PREPARE
bool
+
+config GENERIC_CLK
+ bool
+ select HAVE_CLK_PREPARE
diff --git a/drivers/clk/Makefile b/drivers/clk/Makefile
index 07613fa..570d5b9 100644
--- a/drivers/clk/Makefile
+++ b/drivers/clk/Makefile
@@ -1,2 +1,3 @@
obj-$(CONFIG_CLKDEV_LOOKUP)+= clkdev.o
+obj-$(CONFIG_GENERIC_CLK) += clk.o
diff --git a/drivers/clk/clk.c b/drivers/clk/clk.c
new file mode 100644
index 000..8cadadd
--- /dev/null
+++ b/drivers/clk/clk.c
@@ -0,0 +1,564 @@
+/*
+ * Copyright (C) 2010-2011 Canonical Ltd jeremy.k...@canonical.com
+ * Copyright (C) 2011 Linaro Ltd mturque...@linaro.org
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ *
+ * Standard functionality for the common clock API. See Documentation/clk.txt
+ */
+
+#include linux/clk.h
+#include linux/module.h
+#include linux/mutex.h
+#include linux/spinlock.h
+#include linux/err.h
+#include linux/list.h
+
+static DEFINE_SPINLOCK(enable_lock);
+static DEFINE_MUTEX(prepare_lock);
+
+static HLIST_HEAD(clk_root_list);
+
+/***clk API***/
+
+void __clk_unprepare(struct clk *clk)
+{
+ if (!clk)
+ return;
+
+ if (WARN_ON(clk-prepare_count == 0))
+ return;
+
+ if (--clk-prepare_count 0)
+ return;
+
+ WARN_ON(clk-enable_count 0);
+
+ if (clk-ops-unprepare)
+ clk-ops-unprepare(clk);
+
+ __clk_unprepare(clk-parent);
+}
+
+/**
+ * clk_unprepare - perform the slow part of a clk gate
+ * @clk: the clk being gated
+ *
+ * clk_unprepare may sleep, which differentiates it from clk_disable. In a
+ * simple case, clk_unprepare can be used instead of clk_disable to gate a clk
+ * if the operation may sleep. One example is a clk which is accessed over
+ * I2c. In the complex case a clk gate operation may require a fast and a slow
+ * part. It is this reason that clk_unprepare and clk_disable are not mutually
+ * exclusive. In fact clk_disable must be called before clk_unprepare.
+ */
+void clk_unprepare(struct clk *clk)
+{
+ mutex_lock(prepare_lock);
+ __clk_unprepare(clk);
+ mutex_unlock(prepare_lock);
+}
+EXPORT_SYMBOL_GPL(clk_unprepare);
+
+int __clk_prepare(struct clk *clk)
+{
+ int ret = 0;
+
+ if (!clk)
+ return 0;
+
+ if (clk-prepare_count == 0) {
+ ret = __clk_prepare(clk-parent);
+ if (ret)
+ return ret;
+
+ if (clk-ops-prepare) {
+ ret = clk-ops-prepare(clk);
+ if (ret) {
+ __clk_unprepare(clk-parent);
+ return ret;
+ }
+ }
+ }
+
+ clk-prepare_count++;
+
+ return 0;
+}
+
+/**
+ * clk_prepare - perform the slow part of a clk ungate
+ * @clk: the clk being ungated
+ *
+ * clk_prepare may sleep, which differentiates it from clk_enable. In a simple
+ * case, clk_prepare can be used instead of clk_enable to ungate a clk if the
+ * operation may sleep. One example is a clk which is accessed over I2c. In
+ * the complex case a clk ungate operation may require a fast and a slow part.
+ * It is this reason that clk_prepare and clk_enable are not mutually
+ * exclusive. In fact clk_prepare must be called before
