Re: [PATCH] usb: dwc3: core: continue probe even if usb3 phy is not available
Hi, On Fri, Jun 28, 2013 at 10:06:01PM +0200, Michael Grzeschik wrote: right, but in DT you will define both instances and each instance will have a seaparate snps,maximum_speed attribute :-) I'm now considering if we should make maximum_speed a generic attribute, Kishon ? Alex ? Alan ? anyone else needs such thing ? We have a force-full-speed attibute for chipidea on the way. This maximum_speed looks like a more generic alternative. Michael, what say you? The maximum_speed attribute sounds more reasonable. I will change my patch to it. thanks, perhaps we can add a generic helper in udc-core or usb-common ? As this function is not only udc specific, this should go into usb-common. But right, we should go with a helper here. I will write one in addition to my full-speed patch as first user of it. alright, thanks :-) Michael, if you need any help with patching in maximum_speed attribute, let me know as I have some time to work on that part. Feel free to begin with anything. I am currently short on time. Do you need some pointers? not, really v1 will come on monday. -- balbi signature.asc Description: Digital signature
Re: OMAP baseline test results for v3.10-rc6
On Fri, 28 Jun 2013, Paul Walmsley wrote: On Thu, 27 Jun 2013, Lokesh Vutla wrote: Here is the catch.. Your dtb is generated in arch/arm/boot/dts/ folder(before V3.8 dtb was generated in arch/arm/boot). Ugh... that's probably it :-( Indeed, this was at least one major problem. With this fixed, and with CONFIG_MACH_OMAP_GENERIC=y in the v3.10-rc Kconfigs, the BeagleBone white boots here now with v3.10-rc7. Will test the previous releases going back to v3.8 and will update the web-linked READMEs as appropriate. Thanks for the help and the fixes. Vaibhav and Rajendra, thanks also for looking into it. - Paul -- To unsubscribe from this list: send the line unsubscribe linux-omap in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
Re: [PATCH 1/3] drivers: mtd: spinand: Add generic spinand frameowrk and micron driver.
+ Artem
On Wednesday 26 June 2013 01:11 PM, Sourav Poddar wrote:
From: Mona Anonuevomanonu...@micron.com
This patch adds support for a generic spinand framework(spinand_mtd.c).
This frameowrk can be used for other spi based flash devices also. The idea
is to have a common model under drivers/mtd, as also present for other no spi
devices(there is a generic framework and device part simply attaches itself to
it.)
The generic frework will be used later by me for a SPI based spansion S25FL256
device.
The patch also contains a micron driver attaching itself to generic framework.
Signed-off-by: Mona Anonuevomanonu...@micron.com
Signed-off-by: Tuan Nguyentqngu...@micron.com
Signed-off-by: Sourav Poddarsourav.pod...@ti.com
[I picked this as a standalone patch, can split it into generic and device part
based on community feedback.]
drivers/mtd/Kconfig |2 +
drivers/mtd/Makefile |2 +
drivers/mtd/spinand/Kconfig | 24 ++
drivers/mtd/spinand/Makefile | 10 +
drivers/mtd/spinand/spinand_lld.c | 776 +
drivers/mtd/spinand/spinand_mtd.c | 690 +
include/linux/mtd/spinand.h | 155
7 files changed, 1659 insertions(+), 0 deletions(-)
create mode 100644 drivers/mtd/spinand/Kconfig
create mode 100644 drivers/mtd/spinand/Makefile
create mode 100644 drivers/mtd/spinand/spinand_lld.c
create mode 100644 drivers/mtd/spinand/spinand_mtd.c
create mode 100644 include/linux/mtd/spinand.h
diff --git a/drivers/mtd/Kconfig b/drivers/mtd/Kconfig
index 5fab4e6..c9e6c60 100644
--- a/drivers/mtd/Kconfig
+++ b/drivers/mtd/Kconfig
@@ -318,6 +318,8 @@ source drivers/mtd/nand/Kconfig
source drivers/mtd/onenand/Kconfig
+source drivers/mtd/spinand/Kconfig
+
source drivers/mtd/lpddr/Kconfig
source drivers/mtd/ubi/Kconfig
diff --git a/drivers/mtd/Makefile b/drivers/mtd/Makefile
index 4cfb31e..cce68db 100644
--- a/drivers/mtd/Makefile
+++ b/drivers/mtd/Makefile
@@ -32,4 +32,6 @@ inftl-objs:= inftlcore.o inftlmount.o
obj-y += chips/ lpddr/ maps/ devices/ nand/ onenand/ tests/
+obj-y += spinand/
+
obj-$(CONFIG_MTD_UBI) += ubi/
diff --git a/drivers/mtd/spinand/Kconfig b/drivers/mtd/spinand/Kconfig
new file mode 100644
index 000..38c739f
--- /dev/null
+++ b/drivers/mtd/spinand/Kconfig
@@ -0,0 +1,24 @@
+#
+# linux/drivers/mtd/spinand/Kconfig
+#
+
+menuconfig MTD_SPINAND
+ tristate SPINAND Device Support
+ depends on MTD
+ help
+This enables support for accessing Micron SPI NAND flash
+devices.
+
+if MTD_SPINAND
+
+config MTD_SPINAND_ONDIEECC
+ bool Use SPINAND internal ECC
+ help
+Internel ECC
+
+config MTD_SPINAND_SWECC
+ bool Use software ECC
+ depends on MTD_NAND
+ help
+software ECC
+endif
diff --git a/drivers/mtd/spinand/Makefile b/drivers/mtd/spinand/Makefile
new file mode 100644
index 000..355e726
--- /dev/null
+++ b/drivers/mtd/spinand/Makefile
@@ -0,0 +1,10 @@
+#
+# Makefile for the SPI NAND MTD
+#
+
+# Core functionality.
+obj-$(CONFIG_MTD_SPINAND) += spinand.o
+
+spinand-objs := spinand_mtd.o spinand_lld.o
+
+
diff --git a/drivers/mtd/spinand/spinand_lld.c
b/drivers/mtd/spinand/spinand_lld.c
new file mode 100644
index 000..9f53737
--- /dev/null
+++ b/drivers/mtd/spinand/spinand_lld.c
@@ -0,0 +1,776 @@
+/*
+spinand_lld.c
+
+Copyright (c) 2009-2010 Micron Technology, Inc.
+
+This program is free software; you can redistribute it and/or
+modify it under the terms of the GNU General Public License
+as published by the Free Software Foundation; either version 2
+of the License, or (at your option) any later version.
+
+This program is distributed in the hope that it will be useful,
+but WITHOUT ANY WARRANTY; without even the implied warranty of
+MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+GNU General Public License for more details.
+
+*/
+
+#includelinux/init.h
+#includelinux/module.h
+#includelinux/device.h
+#includelinux/interrupt.h
+#includelinux/mutex.h
+#includelinux/math64.h
+
+#includelinux/mtd/mtd.h
+#includelinux/mtd/partitions.h
+#includelinux/mtd/spinand.h
+
+#includelinux/spi/spi.h
+#includelinux/spi/flash.h
+
+#define mu_spi_nand_driver_version Beagle-MTD_01.00_Linux2.6.33_20100507
+#define SPI_NAND_MICRON_DRIVER_KEY 0x1233567
+
+//
+
+/**
+ OOB area specification layout: Total 32 available free bytes.
+*/
+static struct nand_ecclayout spinand_oob_64 = {
+ .eccbytes = 24,
+ .eccpos = {
+ 1, 2, 3, 4, 5, 6,
+ 17, 18, 19, 20, 21, 22,
+ 33, 34, 35, 36, 37, 38,
+ 49, 50, 51, 52, 53, 54, },
+ .oobavail = 32,
+ .oobfree = {
+ {.offset = 8,
+.length = 8},
+ {.offset = 24,
+
Re: [PATCH 0/3] spi/mtd generic framework,ti qspi controller and spansion driver
+ Artem On Wednesday 26 June 2013 01:11 PM, Sourav Poddar wrote: This patch series add support for the generic spi based flash framework(spinand_mtd), which can be used used by any spi based flash device to attach itself to mtd framework. The first patch of this series includes both the generic framework and the the micron device(spinand_lld) making use of the framework. I picked the first patch as a standalone patch. Can split the generic and the lld part based on community suggestions. The second patch is the ti qspi controller driver. The third patch is the spansion s25fl256s driver, making use of the the generic spinand_mtd frameowrk. Test info: Tested the generic framework(spinand_mtd.c) along with patch(23) on my dra7xx board for write/erase/read using nand utils. Compile tested(spinand_lld.c). Mona Anonuevo (1): drivers: mtd: spinand: Add generic spinand frameowrk and micron driver. Sourav Poddar (2): drivers: spi: Add qspi flash controller drivers: mtd: spinand: Add qspi spansion flash controller drivers/mtd/Kconfig |2 + drivers/mtd/Makefile|2 + drivers/mtd/spinand/Kconfig | 31 ++ drivers/mtd/spinand/Makefile| 10 + drivers/mtd/spinand/spinand_lld.c | 776 +++ drivers/mtd/spinand/spinand_mtd.c | 690 +++ drivers/mtd/spinand/ti-qspi-flash.c | 373 + drivers/spi/Kconfig |6 + drivers/spi/Makefile|1 + drivers/spi/ti-qspi.c | 352 include/linux/mtd/spinand.h | 155 +++ 11 files changed, 2398 insertions(+), 0 deletions(-) create mode 100644 drivers/mtd/spinand/Kconfig create mode 100644 drivers/mtd/spinand/Makefile create mode 100644 drivers/mtd/spinand/spinand_lld.c create mode 100644 drivers/mtd/spinand/spinand_mtd.c create mode 100644 drivers/mtd/spinand/ti-qspi-flash.c create mode 100644 drivers/spi/ti-qspi.c create mode 100644 include/linux/mtd/spinand.h -- To unsubscribe from this list: send the line unsubscribe linux-omap in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
Re: [PATCH 3/3] drivers: mtd: spinand: Add qspi spansion flash controller
+ Artem
On Wednesday 26 June 2013 01:11 PM, Sourav Poddar wrote:
The patch adds support for spansion s25fl256s spi flash controller.
Currently, the patch supports only SPI based transaction.
As, the qspi to which flash is attached supports memory mapped interface,
support will be added in future for memory mapped transactions also.
This driver gets attached to the generic spinand mtd framework proposed in the
first patch of the series.
Signed-off-by: Sourav Poddarsourav.pod...@ti.com
---
drivers/mtd/spinand/Kconfig |7 +
drivers/mtd/spinand/Makefile|2 +-
drivers/mtd/spinand/ti-qspi-flash.c | 373 +++
3 files changed, 381 insertions(+), 1 deletions(-)
create mode 100644 drivers/mtd/spinand/ti-qspi-flash.c
diff --git a/drivers/mtd/spinand/Kconfig b/drivers/mtd/spinand/Kconfig
index 38c739f..1342de3 100644
--- a/drivers/mtd/spinand/Kconfig
+++ b/drivers/mtd/spinand/Kconfig
@@ -16,6 +16,13 @@ config MTD_SPINAND_ONDIEECC
help
Internel ECC
+config MTD_S25FL256S
+ tristate Support spansion memory mapped SPI Flash chips
+ depends on SPI_MASTER
+ help
+ This enables access to spansion QSPI flash chips, which used
+ memory mapped interface used for program and data storage.
+
config MTD_SPINAND_SWECC
bool Use software ECC
depends on MTD_NAND
diff --git a/drivers/mtd/spinand/Makefile b/drivers/mtd/spinand/Makefile
index 355e726..8ad0dd5 100644
--- a/drivers/mtd/spinand/Makefile
+++ b/drivers/mtd/spinand/Makefile
@@ -5,6 +5,6 @@
# Core functionality.
obj-$(CONFIG_MTD_SPINAND) += spinand.o
-spinand-objs := spinand_mtd.o spinand_lld.o
+spinand-objs := spinand_mtd.o spinand_lld.o ti-qspi-flash.o
diff --git a/drivers/mtd/spinand/ti-qspi-flash.c
b/drivers/mtd/spinand/ti-qspi-flash.c
new file mode 100644
index 000..dfa6235
--- /dev/null
+++ b/drivers/mtd/spinand/ti-qspi-flash.c
@@ -0,0 +1,373 @@
+/*
+ * MTD SPI driver for spansion s25fl256s (and similar) serial flash chips
+ *
+ * Author: Sourav Poddar, sourav.pod...@ti.com
+ *
+ * Copyright (c) 2013, Texas Instruments.
+ *
+ * This code is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ *
+*/
+
+#includelinux/init.h
+#includelinux/err.h
+#includelinux/errno.h
+#includelinux/module.h
+#includelinux/device.h
+#includelinux/interrupt.h
+#includelinux/mutex.h
+#includelinux/math64.h
+#includelinux/slab.h
+#includelinux/sched.h
+#includelinux/mod_devicetable.h
+
+#includelinux/mtd/mtd.h
+#includelinux/mtd/partitions.h
+#includelinux/of_platform.h
+
+#includelinux/spi/spi.h
+#includelinux/mtd/spinand.h
+
+#defineCMD_OPCODE_RDSR 0x05/* Read status register */
+#define CMD_OPCODE_FAST_READ 0x0b/* Fast Read */
+#defineMAX_READY_WAIT_JIFFIES (40 * HZ) /* M25P16 specs 40s max chip
erase */
+
+#defineSR_WIP 1 /* Write in progress */
+#defineSR_WEL 2 /* Write enable latch */
+
+static u16 addr_width;
+bool fast_read;
+
+static struct nand_ecclayout spinand_oob_0 = {
+ .eccbytes = 0,
+ .eccpos = {},
+ .oobavail = 0,
+ .oobfree = {
+ {.offset = 0,
+ .length = 0}, }
+};
+
+/*
+ * Read the status register, returning its value in the location
+ * Return the status register value.
+ * Returns negative if error occurred.
+*/
+static int read_sr(struct spi_device *spi_nand)
+{
+ ssize_t retval;
+ u8 val;
+ u8 code = CMD_OPCODE_RDSR;
+
+ retval = spi_write_then_read(spi_nand,code, 1,val, 1);
+
+ if (retval 0) {
+ dev_info(spi_nand-dev, error %d reading SR\n,
+ (int) retval);
+ return retval;
+ }
+
+ return val;
+}
+
+/*
+ * Set write enable latch with Write Enable command.
+ * Returns negative if error occurred.
+*/
+static inline int write_enable(struct spi_device *spi_nand)
+{
+ u8 code = CMD_WR_ENABLE;
+
+ return spi_write_then_read(spi_nand,code, 1, NULL, 0);
+}
+
+/*
+ * Send write disble instruction to the chip.
+*/
+static inline int write_disable(struct spi_device *spi_nand)
+{
+ u8 code = CMD_WR_DISABLE;
+
+ return spi_write_then_read(spi_nand,code, 1, NULL, 0);
+}
+
+/*
+ * Service routine to read status register until ready, or timeout occurs.
+ * Returns non-zero if error.
+*/
+static int wait_till_ready(struct spi_device *spi_nand)
+{
+ unsigned long deadline;
+ int sr;
+
+ deadline = jiffies + MAX_READY_WAIT_JIFFIES;
+
+ do {
+ sr = read_sr(spi_nand);
+ if (sr 0)
+ return -1;
+ else if (!(sr SR_WIP))
+ break;
+
+ cond_resched();
+ } while (!time_after_eq(jiffies, deadline));
+
+ if ((sr
Re: [PATCH 2/3] drivers: spi: Add qspi flash controller
+ Artem
On Wednesday 26 June 2013 01:11 PM, Sourav Poddar wrote:
The patch add basic support for the quad spi controller.
QSPI is a kind of spi module that allows single,
dual and quad read access to external spi devices. The module
has a memory mapped interface which provide direct interface
for accessing data form external spi devices.
The patch will configure controller clocks, device control
register and for defining low level transfer apis which
will be used by the spi framework to transfer data to
the slave spi device(flash in this case).
Signed-off-by: Sourav Poddarsourav.pod...@ti.com
---
drivers/spi/Kconfig |6 +
drivers/spi/Makefile |1 +
drivers/spi/ti-qspi.c | 352 +
3 files changed, 359 insertions(+), 0 deletions(-)
create mode 100644 drivers/spi/ti-qspi.c
diff --git a/drivers/spi/Kconfig b/drivers/spi/Kconfig
index 92a9345..29a363b 100644
--- a/drivers/spi/Kconfig
+++ b/drivers/spi/Kconfig
@@ -285,6 +285,12 @@ config SPI_OMAP24XX
SPI master controller for OMAP24XX and later Multichannel SPI
(McSPI) modules.
+config QSPI_DRA7xxx
+ tristate DRA7xxx QSPI controller support
+ depends on ARCH_OMAP2PLUS
+ help
+ QSPI master controller for DRA7xxx used for flash devices.
+
config SPI_OMAP_100K
tristate OMAP SPI 100K
depends on ARCH_OMAP850 || ARCH_OMAP730
diff --git a/drivers/spi/Makefile b/drivers/spi/Makefile
index 33f9c09..ea14eff 100644
--- a/drivers/spi/Makefile
+++ b/drivers/spi/Makefile
@@ -46,6 +46,7 @@ obj-$(CONFIG_SPI_OCTEON) += spi-octeon.o
obj-$(CONFIG_SPI_OMAP_UWIRE) += spi-omap-uwire.o
obj-$(CONFIG_SPI_OMAP_100K) += spi-omap-100k.o
obj-$(CONFIG_SPI_OMAP24XX)+= spi-omap2-mcspi.o
+obj-$(CONFIG_QSPI_DRA7xxx) += ti-qspi.o
obj-$(CONFIG_SPI_ORION) += spi-orion.o
obj-$(CONFIG_SPI_PL022) += spi-pl022.o
obj-$(CONFIG_SPI_PPC4xx) += spi-ppc4xx.o
diff --git a/drivers/spi/ti-qspi.c b/drivers/spi/ti-qspi.c
new file mode 100644
index 000..b33646a
--- /dev/null
+++ b/drivers/spi/ti-qspi.c
@@ -0,0 +1,352 @@
+/*
+ * TI QSPI driver
+ *
+ * Copyright (C) 2013, Texas Instruments, Incorporated
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR /PURPOSE. See the
+ * GNU General Public License for more details.
+ */
+
+#includelinux/kernel.h
+#includelinux/init.h
+#includelinux/interrupt.h
+#includelinux/module.h
+#includelinux/device.h
+#includelinux/delay.h
+#includelinux/dma-mapping.h
+#includelinux/dmaengine.h
+#includelinux/omap-dma.h
+#includelinux/platform_device.h
+#includelinux/err.h
+#includelinux/clk.h
+#includelinux/io.h
+#includelinux/slab.h
+#includelinux/pm_runtime.h
+#includelinux/of.h
+#includelinux/of_device.h
+#includelinux/pinctrl/consumer.h
+
+#includelinux/spi/spi.h
+
+struct dra7xxx_qspi {
+ struct spi_master *master;
+ void __iomem*base;
+ int device_type;
+ struct device *dev;
+ u32 spi_max_frequency;
+ u32 cmd;
+ u32 dc;
+};
+
+#define QSPI_PID (0x0)
+#define QSPI_SYSCONFIG (0x10)
+#define QSPI_INTR_STATUS_RAW_SET (0x20)
+#define QSPI_INTR_STATUS_ENABLED_CLEAR (0x24)
+#define QSPI_INTR_ENABLE_SET_REG (0x28)
+#define QSPI_INTR_ENABLE_CLEAR_REG (0x2c)
+#define QSPI_SPI_CLOCK_CNTRL_REG (0x40)
+#define QSPI_SPI_DC_REG(0x44)
+#define QSPI_SPI_CMD_REG (0x48)
+#define QSPI_SPI_STATUS_REG(0x4c)
+#define QSPI_SPI_DATA_REG (0x50)
+#define QSPI_SPI_SETUP0_REG(0x54)
+#define QSPI_SPI_SWITCH_REG(0x64)
+#define QSPI_SPI_SETUP1_REG(0x58)
+#define QSPI_SPI_SETUP2_REG(0x5c)
+#define QSPI_SPI_SETUP3_REG(0x60)
+#define QSPI_SPI_DATA_REG_1(0x68)
+#define QSPI_SPI_DATA_REG_2(0x6c)
+#define QSPI_SPI_DATA_REG_3(0x70)
+
+#define QSPI_TIMEOUT 200
+
+#define QSPI_FCLK 19200
+
+/* Clock Control */
+#define QSPI_CLK_EN(1 31)
+#define QSPI_CLK_DIV_MAX 0x
+
+/* Command */
+#define QSPI_EN_CS(n) (n 28)
+#define QSPI_WLEN(n) ((n-1) 19)
+#define QSPI_3_PIN (1 18)
+#define QSPI_RD_SNGL (1 16)
+#define QSPI_WR_SNGL (2 16)
+#define QSPI_RD_QUAD (7 16)
+#define QSPI_INVAL
