Re: [PATCH 2/4] drivers/mmc/host: don't use devm_pinctrl_get_select_default() in probe
On 2013-10-13, Wolfram Sang w...@the-dreams.de wrote: Since commit ab78029 (drivers/pinctrl: grab default handles from device core), we can rely on device core for setting the default pins. Compile tested only. Acked-by: Linus Walleij linus.wall...@linaro.org (personally at LCE13) Signed-off-by: Wolfram Sang w...@the-dreams.de --- drivers/mmc/host/mvsdio.c | 7 +-- drivers/mmc/host/omap_hsmmc.c | 7 --- drivers/mmc/host/sdhci-esdhc-imx.c | 8 3 files changed, 1 insertion(+), 21 deletions(-) diff --git a/drivers/mmc/host/mvsdio.c b/drivers/mmc/host/mvsdio.c index 06c5b0b..8c9f448 100644 --- a/drivers/mmc/host/mvsdio.c +++ b/drivers/mmc/host/mvsdio.c @@ -25,7 +25,6 @@ #include linux/of_irq.h #include linux/mmc/host.h #include linux/mmc/slot-gpio.h -#include linux/pinctrl/consumer.h #include asm/sizes.h #include asm/unaligned.h @@ -685,7 +684,7 @@ static int __init mvsd_probe(struct platform_device *pdev) const struct mbus_dram_target_info *dram; struct resource *r; int ret, irq; - struct pinctrl *pinctrl; + int gpio_card_detect, gpio_write_protect; This new line does not belong to this patch. r = platform_get_resource(pdev, IORESOURCE_MEM, 0); irq = platform_get_irq(pdev, 0); @@ -702,10 +701,6 @@ static int __init mvsd_probe(struct platform_device *pdev) host-mmc = mmc; host-dev = pdev-dev; - pinctrl = devm_pinctrl_get_select_default(pdev-dev); - if (IS_ERR(pinctrl)) - dev_warn(pdev-dev, no pins associated\n); - /* * Some non-DT platforms do not pass a clock, and the clock * frequency is passed through platform_data. On DT platforms, Best regards, -- Romain Izard -- To unsubscribe from this list: send the line unsubscribe linux-omap in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
Re: [PATCH] pinctrl: single: call pcs_soc-rearm() whenever IRQ mask is changed
On 10/11/2013 08:21 PM, Tony Lindgren wrote: * Roger Quadros rog...@ti.com [131011 09:21]: On OMAPs the IO ring must be rearmed each time the pad wakeup configuration is changed. So call pcs_soc-rearm() from pcs_irq_set(). Signed-off-by: Roger Quadros rog...@ti.com --- drivers/pinctrl/pinctrl-single.c |5 +++-- 1 files changed, 3 insertions(+), 2 deletions(-) diff --git a/drivers/pinctrl/pinctrl-single.c b/drivers/pinctrl/pinctrl-single.c index c2aada7..1800e47 100644 --- a/drivers/pinctrl/pinctrl-single.c +++ b/drivers/pinctrl/pinctrl-single.c @@ -1604,6 +1604,9 @@ static inline void pcs_irq_set(struct pcs_soc_data *pcs_soc, pcs-write(mask, pcswi-reg); raw_spin_unlock(pcs-lock); } + +if (pcs_soc-rearm) +pcs_soc-rearm(); } /** @@ -1626,8 +1629,6 @@ static void pcs_irq_unmask(struct irq_data *d) struct pcs_soc_data *pcs_soc = irq_data_get_irq_chip_data(d); pcs_irq_set(pcs_soc, d-irq, true); -if (pcs_soc-rearm) -pcs_soc-rearm(); } This seems to cause the wake-up interrupts to happen also during runtime for me, which makes the omap3 behave the same way as omap4 already does. However, the concern I have is that we only want the io chain wake-up happen during idle and not during runtime.. So counting on the io chain in your EHCI driver during runtime would require also additional tracking of idle wake up events vs runtime wake-up events somewhere once we have the automatic solution for runtime PM. That is to avoid spurious interrupts during runtime. Right. It is upto the driver to disable the irq when it is not interested in the wake up interrupts. In any case, since this is an interrupt controller now, we should just follow the Linux standard for interrupt controllers, so if you do a request_irq() on it, you really should get interrupts. I've updated the patch a litte below to also remove the now bogus comment, and to update the description. So considering all that, I suggest that Linus applies the updated fix below into the pinctrl tree after pulling in the the tag I posted for pinctrl-single-for-linus-for-v3.13-signed. Great. Thanks. cheers, -roger -- To unsubscribe from this list: send the line unsubscribe linux-omap in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
Re: [PATCH 1/1] ARM: dts: omap3: Adapt USB OTG to generic PHY framework
Hi Benoit, On 10/10/2013 06:34 PM, Felipe Balbi wrote: On Mon, Oct 07, 2013 at 04:28:13PM +0300, Roger Quadros wrote: The generic PHY framewrok expects different properties than the old USB PHY framework. Supply those properties. Fixes USB OTG port on GAT04 and N900 after the Generic PHY framework was merged in greg/usb-next. [1] [1] - https://lkml.org/lkml/2013/9/27/581 Signed-off-by: Roger Quadros rog...@ti.com Acked-by: Felipe Balbi ba...@ti.com Could you please pick this one for 3.13? Thanks. I don't see it in your 3.13 take 2 pull request. cheers, -roger -- To unsubscribe from this list: send the line unsubscribe linux-omap in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
Re: [PATCH 3/7] drivers: phy: usb3/pipe3: Adapt pipe3 driver to Generic PHY Framework
Hi Roger,
On Friday 11 October 2013 08:32 PM, Roger Quadros wrote:
On 09/16/2013 10:37 AM, Roger Quadros wrote:
On 09/16/2013 06:01 AM, Kishon Vijay Abraham I wrote:
On Thursday 12 September 2013 04:49 PM, Roger Quadros wrote:
Hi Kishon,
On 09/02/2013 06:43 PM, Kishon Vijay Abraham I wrote:
Adapted omap-usb3 PHY driver to Generic PHY Framework and moved
phy-omap-usb3
driver in drivers/usb/phy to drivers/phy and also renamed the file to
phy-omap-pipe3 since this same driver will be used for SATA PHY and
PCIE PHY.
I would suggest to split the renaming and PHY adaptation into 2 separate
patches.
Alright.
Signed-off-by: Kishon Vijay Abraham I kis...@ti.com
---
Documentation/devicetree/bindings/usb/usb-phy.txt |5 +-
drivers/phy/Kconfig| 10 +
drivers/phy/Makefile |1 +
.../phy/phy-omap-usb3.c = phy/phy-omap-pipe3.c} | 206
+++-
how about naming it to phy-ti-pipe3.c as it is used on OMAP as well as
non-OMAP e.g. DRA7.
hmm.. I thought it would be consistent with other PHY drivers
(phy-omap-usb2). Moreover DRA7 is OMAP based platform ;-) Maybe we should
reserve that for later?
OK. Up to you.
drivers/usb/phy/Kconfig| 11 --
drivers/usb/phy/Makefile |1 -
include/linux/phy/omap_pipe3.h | 52 +
7 files changed, 177 insertions(+), 109 deletions(-)
rename drivers/{usb/phy/phy-omap-usb3.c = phy/phy-omap-pipe3.c} (57%)
create mode 100644 include/linux/phy/omap_pipe3.h
diff --git a/Documentation/devicetree/bindings/usb/usb-phy.txt
b/Documentation/devicetree/bindings/usb/usb-phy.txt
index c0245c8..36bdb17 100644
--- a/Documentation/devicetree/bindings/usb/usb-phy.txt
+++ b/Documentation/devicetree/bindings/usb/usb-phy.txt
@@ -21,10 +21,11 @@ usb2phy@4a0ad080 {
#phy-cells = 0;
};
-OMAP USB3 PHY
+OMAP PIPE3 PHY
Required properties:
- - compatible: Should be ti,omap-usb3
+ - compatible: Should be ti,omap-usb3, ti,omap-pipe3, ti,omap-sata
+ or ti,omap-pcie
- reg : Address and length of the register set for the device.
- reg-names: The names of the register addresses corresponding to the
registers
filled in reg.
diff --git a/drivers/phy/Kconfig b/drivers/phy/Kconfig
index ac239ac..5c2e7a0 100644
--- a/drivers/phy/Kconfig
+++ b/drivers/phy/Kconfig
@@ -27,6 +27,16 @@ config OMAP_USB2
The USB OTG controller communicates with the comparator using this
driver.
+config OMAP_PIPE3
+tristate OMAP PIPE3 PHY Driver
+select GENERIC_PHY
+select OMAP_CONTROL_USB
how about
depends on OMAP_CONTROL_USB
From whatever I could make out from comments of Greg in my Generic PHY
Framework, it's better to do a select of dependent modules instead of
depends on.
You can use select, provided the item you are selecting doesn't depend on
anything else.
As OMAP_CONTROL_USB depends on ARCH_OMAP2PLUS, your configuration will fail
if a user enables
OMAP_PIPE3 on non OMAP configuration.
Further, in this case since it is OMAP related driver, there is no point in
showing/building it
if OMAP platform is not selected, so you at least need [depends on
ARCH_OMAP2PLUS] to fix
both issue I mentioned.
Also, if this is TI/OMAP it might as well depend on ARCH_OMAP.
+help
+ Enable this to support the PIPE3 PHY that is part of SOC. This
worth mentioning TI OMAP/DRA SoCs.
right.
+ driver takes care of all the PHY functionality apart from
comparator.
+ This driver interacts with the OMAP Control PHY Driver to power
+ on/off the PHY.
+
config TWL4030_USB
tristate TWL4030 USB Transceiver Driver
depends on TWL4030_CORE REGULATOR_TWL4030 USB_MUSB_OMAP2PLUS
diff --git a/drivers/phy/Makefile b/drivers/phy/Makefile
index 0dd8a98..48bf9f2 100644
--- a/drivers/phy/Makefile
+++ b/drivers/phy/Makefile
@@ -4,4 +4,5 @@
obj-$(CONFIG_GENERIC_PHY)+= phy-core.o
obj-$(CONFIG_OMAP_USB2)+= phy-omap-usb2.o
+obj-$(CONFIG_OMAP_PIPE3)+= phy-omap-pipe3.o
obj-$(CONFIG_TWL4030_USB)+= phy-twl4030-usb.o
diff --git a/drivers/usb/phy/phy-omap-usb3.c
b/drivers/phy/phy-omap-pipe3.c
similarity index 57%
rename from drivers/usb/phy/phy-omap-usb3.c
rename to drivers/phy/phy-omap-pipe3.c
index 4004f82..ee9a901 100644
--- a/drivers/usb/phy/phy-omap-usb3.c
+++ b/drivers/phy/phy-omap-pipe3.c
@@ -1,5 +1,5 @@
/*
- * omap-usb3 - USB PHY, talking to dwc3 controller in OMAP.
+ * omap-pipe3 - PHY driver for SATA, USB and PCIE in OMAP platforms
*
* Copyright (C) 2013 Texas Instruments Incorporated - http://www.ti.com
* This program is free software; you can redistribute it and/or modify
@@ -19,7 +19,8 @@
#include linux/module.h
#include linux/platform_device.h
#include linux/slab.h
-#include linux/usb/omap_usb.h
+#include
Re: [PATCH 2/7] usb: dwc3: adapt dwc3 core to use Generic PHY Framework
Hi Roger,
On Friday 11 October 2013 08:39 PM, Roger Quadros wrote:
Hi,
On 09/02/2013 06:43 PM, Kishon Vijay Abraham I wrote:
Adapted dwc3 core to use the Generic PHY Framework. So for init, exit,
power_on and power_off the following APIs are used phy_init(), phy_exit(),
phy_power_on() and phy_power_off().
However using the old USB phy library wont be removed till the PHYs of all
other SoC's using dwc3 core is adapted to the Generic PHY Framework.
Signed-off-by: Kishon Vijay Abraham I kis...@ti.com
---
Documentation/devicetree/bindings/usb/dwc3.txt |6 ++-
drivers/usb/dwc3/Kconfig |1 +
drivers/usb/dwc3/core.c| 49
drivers/usb/dwc3/core.h|7
4 files changed, 61 insertions(+), 2 deletions(-)
diff --git a/Documentation/devicetree/bindings/usb/dwc3.txt
b/Documentation/devicetree/bindings/usb/dwc3.txt
index e807635..471366d 100644
--- a/Documentation/devicetree/bindings/usb/dwc3.txt
+++ b/Documentation/devicetree/bindings/usb/dwc3.txt
@@ -6,11 +6,13 @@ Required properties:
- compatible: must be snps,dwc3
- reg : Address and length of the register set for the device
- interrupts: Interrupts used by the dwc3 controller.
+
+Optional properties:
- usb-phy : array of phandle for the PHY device. The first element
in the array is expected to be a handle to the USB2/HS PHY and
the second element is expected to be a handle to the USB3/SS PHY
-
-Optional properties:
+ - phys: from the *Generic PHY* bindings
+ - phy-names: from the *Generic PHY* bindings
- tx-fifo-resize: determines if the FIFO *has* to be reallocated.
This is usually a subnode to DWC3 glue to which it is connected.
diff --git a/drivers/usb/dwc3/Kconfig b/drivers/usb/dwc3/Kconfig
index cfc16dd..ad7ce83 100644
--- a/drivers/usb/dwc3/Kconfig
+++ b/drivers/usb/dwc3/Kconfig
@@ -3,6 +3,7 @@ config USB_DWC3
depends on (USB || USB_GADGET) GENERIC_HARDIRQS HAS_DMA
depends on EXTCON
select USB_PHY
+select GENERIC_PHY
select USB_XHCI_PLATFORM if USB_SUPPORT USB_XHCI_HCD
help
Say Y or M here if your system has a Dual Role SuperSpeed
diff --git a/drivers/usb/dwc3/core.c b/drivers/usb/dwc3/core.c
index 428c29e..485d365 100644
--- a/drivers/usb/dwc3/core.c
+++ b/drivers/usb/dwc3/core.c
@@ -82,6 +82,12 @@ static void dwc3_core_soft_reset(struct dwc3 *dwc)
usb_phy_init(dwc-usb2_phy);
usb_phy_init(dwc-usb3_phy);
How about adding
+ if (dwc-usb2_phy)
+ usb_phy_init(dwc-usb2_phy);
+ if (dwc-usb3_phy)
+ usb_phy_init(dwc-usb3_phy);
Thankfully that usb_phy_init will check if phy is NULL.
both usb phy and generic phy shouldn't be present together.
ok.
+
+if (dwc-usb2_generic_phy)
+phy_init(dwc-usb2_generic_phy);
+if (dwc-usb3_generic_phy)
+phy_init(dwc-usb3_generic_phy);
+
mdelay(100);
/* Clear USB3 PHY reset */
@@ -343,6 +349,11 @@ static void dwc3_core_exit(struct dwc3 *dwc)
{
usb_phy_shutdown(dwc-usb2_phy);
usb_phy_shutdown(dwc-usb3_phy);
here as well
+
+if (dwc-usb2_generic_phy)
+phy_power_off(dwc-usb2_generic_phy);
+if (dwc-usb3_generic_phy)
+phy_power_off(dwc-usb3_generic_phy);
}
#define DWC3_ALIGN_MASK (16 - 1)
@@ -427,6 +438,23 @@ static int dwc3_probe(struct platform_device *pdev)
dwc-usb3_phy = devm_usb_get_phy(dev, USB_PHY_TYPE_USB3);
}
+if (of_property_read_bool(node, phys) || pdata-has_phy) {
+dwc-usb2_generic_phy = devm_phy_get(dev, usb2-phy);
+if (IS_ERR(dwc-usb2_generic_phy)) {
+dev_err(dev, no usb2 phy configured yet);
+return PTR_ERR(dwc-usb2_generic_phy);
+}
+
+dwc-usb3_generic_phy = devm_phy_get(dev, usb3-phy);
+if (IS_ERR(dwc-usb3_generic_phy)) {
+dev_err(dev, no usb3 phy configured yet);
+return PTR_ERR(dwc-usb3_generic_phy);
+}
better to add
+ /* Don't use USB PHY if generic PHY was found */
+ dwc-usb2_phy = dwc-usb3_phy = NULL;
ok.
+} else {
not required as we've used kzalloc for dwc.
+dwc-usb2_generic_phy = NULL;
+dwc-usb3_generic_phy = NULL;
+}
+
/* default to superspeed if no maximum_speed passed */
if (dwc-maximum_speed == USB_SPEED_UNKNOWN)
dwc-maximum_speed = USB_SPEED_SUPER;
@@ -450,6 +478,11 @@ static int dwc3_probe(struct platform_device *pdev)
if (dwc-usb2_phy)
usb_phy_set_suspend(dwc-usb2_phy, 0);
if (dwc-usb3_phy)
usb_phy_set_suspend(dwc-usb3_phy, 0);
+if (dwc-usb2_generic_phy)
+phy_power_on(dwc-usb2_generic_phy);
+if (dwc-usb3_generic_phy)
+phy_power_on(dwc-usb3_generic_phy);
Re: [PATCH 3/7] drivers: phy: usb3/pipe3: Adapt pipe3 driver to Generic PHY Framework
Kishon,
On 10/14/2013 12:19 PM, Kishon Vijay Abraham I wrote:
Hi Roger,
On Friday 11 October 2013 08:32 PM, Roger Quadros wrote:
On 09/16/2013 10:37 AM, Roger Quadros wrote:
On 09/16/2013 06:01 AM, Kishon Vijay Abraham I wrote:
On Thursday 12 September 2013 04:49 PM, Roger Quadros wrote:
Hi Kishon,
On 09/02/2013 06:43 PM, Kishon Vijay Abraham I wrote:
#ifdef CONFIG_OF
-static const struct of_device_id omap_usb3_id_table[] = {
+static const struct of_device_id omap_pipe3_id_table[] = {
+{ .compatible = ti,omap-pipe3 },
why do you need omap-pipe3, isn't sata, pcie and usb3 sufficient?
I thought it would be better if everyone uses omap-pipe3 and added pcie,
sata if there are any specific settings (for pcie or sata) that should be
done.
We can always add specialized options later when needed. AFAIK just the
DPLL data is different among the different PHYs.
+{ .compatible = ti,omap-sata },
+{ .compatible = ti,omap-pcie },
{ .compatible = ti,omap-usb3 },
I think compatible strings should be improved to indicate that it is a PHY.
e.g. ti,omap-phy-sata or just ti,pipe3-phy-sata
Please remove ti,omap-pcie for now, you can add it later whenever you add
dpll settings for pcie.
Also, please change the newly added compatible strings to
ti,phy-pipe3-usb3 and ti,phy-pipe3-sata
No, I think we should have omap in the compatible since this PHY is specific
to
OMAP.
DRA7x and an am43x are not OMAP so I was suggesting not to use it for new PHY
types.
We still preserve just ti,omap-usb3 for backward compatibility.
cheers,
-roger
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Re: [PATCH 2/7] usb: dwc3: adapt dwc3 core to use Generic PHY Framework
+Vivek
On 10/14/2013 12:26 PM, Kishon Vijay Abraham I wrote:
Hi Roger,
On Friday 11 October 2013 08:39 PM, Roger Quadros wrote:
Hi,
On 09/02/2013 06:43 PM, Kishon Vijay Abraham I wrote:
Adapted dwc3 core to use the Generic PHY Framework. So for init, exit,
power_on and power_off the following APIs are used phy_init(), phy_exit(),
phy_power_on() and phy_power_off().
However using the old USB phy library wont be removed till the PHYs of all
other SoC's using dwc3 core is adapted to the Generic PHY Framework.
Signed-off-by: Kishon Vijay Abraham I kis...@ti.com
---
Documentation/devicetree/bindings/usb/dwc3.txt |6 ++-
drivers/usb/dwc3/Kconfig |1 +
drivers/usb/dwc3/core.c| 49
drivers/usb/dwc3/core.h|7
4 files changed, 61 insertions(+), 2 deletions(-)
diff --git a/Documentation/devicetree/bindings/usb/dwc3.txt
b/Documentation/devicetree/bindings/usb/dwc3.txt
index e807635..471366d 100644
--- a/Documentation/devicetree/bindings/usb/dwc3.txt
+++ b/Documentation/devicetree/bindings/usb/dwc3.txt
@@ -6,11 +6,13 @@ Required properties:
- compatible: must be snps,dwc3
- reg : Address and length of the register set for the device
- interrupts: Interrupts used by the dwc3 controller.
+
+Optional properties:
- usb-phy : array of phandle for the PHY device. The first element
in the array is expected to be a handle to the USB2/HS PHY and
the second element is expected to be a handle to the USB3/SS PHY
-
-Optional properties:
+ - phys: from the *Generic PHY* bindings
+ - phy-names: from the *Generic PHY* bindings
- tx-fifo-resize: determines if the FIFO *has* to be reallocated.
This is usually a subnode to DWC3 glue to which it is connected.
diff --git a/drivers/usb/dwc3/Kconfig b/drivers/usb/dwc3/Kconfig
index cfc16dd..ad7ce83 100644
--- a/drivers/usb/dwc3/Kconfig
+++ b/drivers/usb/dwc3/Kconfig
@@ -3,6 +3,7 @@ config USB_DWC3
depends on (USB || USB_GADGET) GENERIC_HARDIRQS HAS_DMA
depends on EXTCON
select USB_PHY
+ select GENERIC_PHY
select USB_XHCI_PLATFORM if USB_SUPPORT USB_XHCI_HCD
help
Say Y or M here if your system has a Dual Role SuperSpeed
diff --git a/drivers/usb/dwc3/core.c b/drivers/usb/dwc3/core.c
index 428c29e..485d365 100644
--- a/drivers/usb/dwc3/core.c
+++ b/drivers/usb/dwc3/core.c
@@ -82,6 +82,12 @@ static void dwc3_core_soft_reset(struct dwc3 *dwc)
usb_phy_init(dwc-usb2_phy);
usb_phy_init(dwc-usb3_phy);
How about adding
+if (dwc-usb2_phy)
+usb_phy_init(dwc-usb2_phy);
+if (dwc-usb3_phy)
+usb_phy_init(dwc-usb3_phy);
Thankfully that usb_phy_init will check if phy is NULL.
both usb phy and generic phy shouldn't be present together.
ok.
+
+ if (dwc-usb2_generic_phy)
+ phy_init(dwc-usb2_generic_phy);
+ if (dwc-usb3_generic_phy)
+ phy_init(dwc-usb3_generic_phy);
+
mdelay(100);
/* Clear USB3 PHY reset */
@@ -343,6 +349,11 @@ static void dwc3_core_exit(struct dwc3 *dwc)
{
usb_phy_shutdown(dwc-usb2_phy);
usb_phy_shutdown(dwc-usb3_phy);
here as well
+
+ if (dwc-usb2_generic_phy)
+ phy_power_off(dwc-usb2_generic_phy);
+ if (dwc-usb3_generic_phy)
+ phy_power_off(dwc-usb3_generic_phy);
}
#define DWC3_ALIGN_MASK(16 - 1)
@@ -427,6 +438,23 @@ static int dwc3_probe(struct platform_device *pdev)
dwc-usb3_phy = devm_usb_get_phy(dev, USB_PHY_TYPE_USB3);
}
+ if (of_property_read_bool(node, phys) || pdata-has_phy) {
+ dwc-usb2_generic_phy = devm_phy_get(dev, usb2-phy);
+ if (IS_ERR(dwc-usb2_generic_phy)) {
+ dev_err(dev, no usb2 phy configured yet);
+ return PTR_ERR(dwc-usb2_generic_phy);
+ }
+
+ dwc-usb3_generic_phy = devm_phy_get(dev, usb3-phy);
+ if (IS_ERR(dwc-usb3_generic_phy)) {
+ dev_err(dev, no usb3 phy configured yet);
+ return PTR_ERR(dwc-usb3_generic_phy);
+ }
better to add
+/* Don't use USB PHY if generic PHY was found */
+dwc-usb2_phy = dwc-usb3_phy = NULL;
ok.
+ } else {
not required as we've used kzalloc for dwc.
+ dwc-usb2_generic_phy = NULL;
+ dwc-usb3_generic_phy = NULL;
+ }
+
/* default to superspeed if no maximum_speed passed */
if (dwc-maximum_speed == USB_SPEED_UNKNOWN)
dwc-maximum_speed = USB_SPEED_SUPER;
@@ -450,6 +478,11 @@ static int dwc3_probe(struct platform_device *pdev)
if (dwc-usb2_phy)
usb_phy_set_suspend(dwc-usb2_phy, 0);
if (dwc-usb3_phy)
usb_phy_set_suspend(dwc-usb3_phy, 0);
+ if (dwc-usb2_generic_phy)
+ phy_power_on(dwc-usb2_generic_phy);
+ if (dwc-usb3_generic_phy)
+
[PATCH] ARM: OMAP2+: hwmod: Add USB hwmod data for AM437x.
Add hwmod for USBSS and the OCP2SCP for AM437x.
AM437x has got 2 instances of USBSS.
Signed-off-by: George Cherian george.cher...@ti.com
---
This was tested on AM437x EPOS EVM with Afzal's v6 of AM43x PRCM basic support
and Tero's DT clock Series
arch/arm/mach-omap2/omap_hwmod_43xx_data.c | 105 +
arch/arm/mach-omap2/prcm43xx.h | 4 ++
2 files changed, 109 insertions(+)
diff --git a/arch/arm/mach-omap2/omap_hwmod_43xx_data.c
b/arch/arm/mach-omap2/omap_hwmod_43xx_data.c
index 6500d43..a58024d 100644
--- a/arch/arm/mach-omap2/omap_hwmod_43xx_data.c
+++ b/arch/arm/mach-omap2/omap_hwmod_43xx_data.c
@@ -316,6 +316,79 @@ static struct omap_hwmod am43xx_gpio5_hwmod = {
.dev_attr = gpio_dev_attr,
};
+static struct omap_hwmod_class am43xx_ocp2scp_hwmod_class = {
+ .name = ocp2scp,
+};
+
+static struct omap_hwmod am43xx_ocp2scp0_hwmod = {
+ .name = ocp2scp0,
+ .class = am43xx_ocp2scp_hwmod_class,
+ .clkdm_name = l4ls_clkdm,
+ .main_clk = l4ls_gclk,
+ .prcm = {
+ .omap4 = {
+ .clkctrl_offs =
AM43XX_CM_PER_USBPHYOCP2SCP0_CLKCTRL_OFFSET,
+ .modulemode = MODULEMODE_SWCTRL,
+ },
+ },
+};
+
+static struct omap_hwmod am43xx_ocp2scp1_hwmod = {
+ .name = ocp2scp1,
+ .class = am43xx_ocp2scp_hwmod_class,
+ .clkdm_name = l4ls_clkdm,
+ .main_clk = l4ls_gclk,
+ .prcm = {
+ .omap4 = {
+ .clkctrl_offs =
AM43XX_CM_PER_USBPHYOCP2SCP1_CLKCTRL_OFFSET,
+ .modulemode = MODULEMODE_SWCTRL,
+ },
+ },
+};
+
+static struct omap_hwmod_class_sysconfig am43xx_usb_otg_ss_sysc = {
+ .rev_offs = 0x,
+ .sysc_offs = 0x0010,
+ .sysc_flags = (SYSC_HAS_DMADISABLE | SYSC_HAS_MIDLEMODE |
+ SYSC_HAS_SIDLEMODE),
+ .idlemodes = (SIDLE_FORCE | SIDLE_NO | SIDLE_SMART |
+ SIDLE_SMART_WKUP | MSTANDBY_FORCE |
+ MSTANDBY_NO | MSTANDBY_SMART |
+ MSTANDBY_SMART_WKUP),
+ .sysc_fields= omap_hwmod_sysc_type2,
+};
+
+static struct omap_hwmod_class am43xx_usb_otg_ss_hwmod_class = {
+ .name = usb_otg_ss,
+ .sysc = am43xx_usb_otg_ss_sysc,
+};
+
+static struct omap_hwmod am43xx_usb_otg_ss0_hwmod = {
+ .name = usb_otg_ss0,
+ .class = am43xx_usb_otg_ss_hwmod_class,
+ .clkdm_name = l3s_clkdm,
+ .main_clk = l3s_gclk,
+ .prcm = {
+ .omap4 = {
+ .clkctrl_offs =
AM43XX_CM_PER_USB_OTG_SS0_CLKCTRL_OFFSET,
+ .modulemode = MODULEMODE_SWCTRL,
+ },
+ },
+};
+
+static struct omap_hwmod am43xx_usb_otg_ss1_hwmod = {
+ .name = usb_otg_ss1,
+ .class = am43xx_usb_otg_ss_hwmod_class,
+ .clkdm_name = l3s_clkdm,
+ .main_clk = l3s_gclk,
+ .prcm = {
+ .omap4 = {
+ .clkctrl_offs =
AM43XX_CM_PER_USB_OTG_SS1_CLKCTRL_OFFSET,
+ .modulemode = MODULEMODE_SWCTRL,
+ },
+ },
+};
+
/* Interfaces */
static struct omap_hwmod_ocp_if am43xx_l3_main__l4_hs = {
.master = am33xx_l3_main_hwmod,
@@ -520,6 +593,34 @@ static struct omap_hwmod_ocp_if am43xx_l4_ls__gpio5 = {
.user = OCP_USER_MPU | OCP_USER_SDMA,
};
+static struct omap_hwmod_ocp_if am43xx_l4_ls__ocp2scp0 = {
+ .master = am33xx_l4_ls_hwmod,
+ .slave = am43xx_ocp2scp0_hwmod,
+ .clk= l4ls_gclk,
+ .user = OCP_USER_MPU,
+};
+
+static struct omap_hwmod_ocp_if am43xx_l4_ls__ocp2scp1 = {
+ .master = am33xx_l4_ls_hwmod,
+ .slave = am43xx_ocp2scp1_hwmod,
+ .clk= l4ls_gclk,
+ .user = OCP_USER_MPU,
+};
+
+static struct omap_hwmod_ocp_if am43xx_l3_s__usbotgss0 = {
+ .master = am33xx_l3_s_hwmod,
+ .slave = am43xx_usb_otg_ss0_hwmod,
+ .clk= l3s_gclk,
+ .user = OCP_USER_MPU | OCP_USER_SDMA,
+};
+
+static struct omap_hwmod_ocp_if am43xx_l3_s__usbotgss1 = {
+ .master = am33xx_l3_s_hwmod,
+ .slave = am43xx_usb_otg_ss1_hwmod,
+ .clk= l3s_gclk,
+ .user = OCP_USER_MPU | OCP_USER_SDMA,
+};
+
static struct omap_hwmod_ocp_if *am43xx_hwmod_ocp_ifs[] __initdata = {
am33xx_l4_wkup__synctimer,
am43xx_l4_ls__timer8,
@@ -608,6 +709,10 @@ static struct omap_hwmod_ocp_if *am43xx_hwmod_ocp_ifs[]
__initdata = {
am33xx_cpgmac0__mdio,
am33xx_l3_main__sha0,
am33xx_l3_main__aes0,
+ am43xx_l4_ls__ocp2scp0,
+ am43xx_l4_ls__ocp2scp1,
[PATCH] ARM: dts: am33xx, change usb ctrl module label
Control module is not usb specific. This patch changes the label to
usb_ctrl_mod.
Signed-off-by: Markus Pargmann m...@pengutronix.de
---
arch/arm/boot/dts/am33xx.dtsi | 6 +++---
1 file changed, 3 insertions(+), 3 deletions(-)
diff --git a/arch/arm/boot/dts/am33xx.dtsi b/arch/arm/boot/dts/am33xx.dtsi
index f9c5da9..14510ee 100644
--- a/arch/arm/boot/dts/am33xx.dtsi
+++ b/arch/arm/boot/dts/am33xx.dtsi
@@ -346,7 +346,7 @@
ti,hwmods = usb_otg_hs;
status = disabled;
- ctrl_mod: control@44e1 {
+ usb_ctrl_mod: control@44e1 {
compatible = ti,am335x-usb-ctrl-module;
reg = 0x44e10620 0x10
0x44e10648 0x4;
@@ -359,7 +359,7 @@
reg = 0x47401300 0x100;
reg-names = phy;
status = disabled;
- ti,ctrl_mod = ctrl_mod;
+ ti,ctrl_mod = usb_ctrl_mod;
};
usb0: usb@47401000 {
@@ -407,7 +407,7 @@
reg = 0x47401b00 0x100;
reg-names = phy;
status = disabled;
- ti,ctrl_mod = ctrl_mod;
+ ti,ctrl_mod = usb_ctrl_mod;
};
usb1: usb@47401800 {
--
1.8.4.rc3
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[PATCH] usb: phy: omap: Add omap-control Support for AM437x
This adds omap control module support for USBSS in AM437x SoC.
Update DT binding information to reflect these changes.
Signed-off-by: George Cherian george.cher...@ti.com
---
Documentation/devicetree/bindings/usb/omap-usb.txt | 2 ++
drivers/usb/phy/phy-omap-control.c | 17 +
include/linux/usb/omap_control_usb.h | 6 ++
3 files changed, 25 insertions(+)
diff --git a/Documentation/devicetree/bindings/usb/omap-usb.txt
b/Documentation/devicetree/bindings/usb/omap-usb.txt
index 090e5e2..c495135 100644
--- a/Documentation/devicetree/bindings/usb/omap-usb.txt
+++ b/Documentation/devicetree/bindings/usb/omap-usb.txt
@@ -87,6 +87,8 @@ Required properties:
e.g. USB3 PHY and SATA PHY on OMAP5.
ti,control-phy-dra7usb2 - if it has power down register like USB2 PHY on
DRA7 platform.
+ ti,control-phy-am437usb2 - if it has power down register like USB2 PHY on
+ AM437 platform.
- reg : Address and length of the register set for the device. It contains
the address of otghs_control for control-phy-otghs or power register
for other types.
diff --git a/drivers/usb/phy/phy-omap-control.c
b/drivers/usb/phy/phy-omap-control.c
index 09c5ace..c453b81 100644
--- a/drivers/usb/phy/phy-omap-control.c
+++ b/drivers/usb/phy/phy-omap-control.c
@@ -84,6 +84,18 @@ void omap_control_usb_phy_power(struct device *dev, int on)
else
val |= OMAP_CTRL_USB2_PHY_PD;
break;
+
+ case OMAP_CTRL_TYPE_AM437USB2:
+ if (on) {
+ val = ~(AM437X_CTRL_USB2_PHY_PD |
+ AM437X_CTRL_USB2_OTG_PD);
+ val |= (AM437X_CTRL_USB2_OTGVDET_EN |
+ AM437X_CTRL_USB2_OTGSESSEND_EN);
+ } else {
+ val |= (AM437X_CTRL_USB2_PHY_PD |
+AM437X_CTRL_USB2_OTG_PD);
+ }
+ break;
default:
dev_err(dev, %s: type %d not recognized\n,
__func__, control_usb-type);
@@ -197,6 +209,7 @@ static const enum omap_control_usb_type otghs_data =
OMAP_CTRL_TYPE_OTGHS;
static const enum omap_control_usb_type usb2_data = OMAP_CTRL_TYPE_USB2;
static const enum omap_control_usb_type pipe3_data = OMAP_CTRL_TYPE_PIPE3;
static const enum omap_control_usb_type dra7usb2_data =
OMAP_CTRL_TYPE_DRA7USB2;
+static const enum omap_control_usb_type am437usb2_data =
OMAP_CTRL_TYPE_AM437USB2;
static const struct of_device_id omap_control_usb_id_table[] = {
{
@@ -215,6 +228,10 @@ static const struct of_device_id
omap_control_usb_id_table[] = {
.compatible = ti,control-phy-dra7usb2,
.data = dra7usb2_data,
},
+ {
+ .compatible = ti,control-phy-am437usb2,
+ .data = am437usb2_data,
+ },
{},
};
MODULE_DEVICE_TABLE(of, omap_control_usb_id_table);
diff --git a/include/linux/usb/omap_control_usb.h
b/include/linux/usb/omap_control_usb.h
index 596b019..69ae383 100644
--- a/include/linux/usb/omap_control_usb.h
+++ b/include/linux/usb/omap_control_usb.h
@@ -24,6 +24,7 @@ enum omap_control_usb_type {
OMAP_CTRL_TYPE_USB2,/* USB2_PHY, power down in CONTROL_DEV_CONF */
OMAP_CTRL_TYPE_PIPE3, /* PIPE3 PHY, DPLL seperate Rx/Tx power */
OMAP_CTRL_TYPE_DRA7USB2, /* USB2 PHY, power and power_aux e.g. DRA7 */
+ OMAP_CTRL_TYPE_AM437USB2, /* USB2 PHY, power e.g. AM437x */
};
struct omap_control_usb {
@@ -64,6 +65,11 @@ enum omap_control_usb_mode {
#define OMAP_CTRL_USB2_PHY_PD BIT(28)
+#define AM437X_CTRL_USB2_PHY_PDBIT(0)
+#define AM437X_CTRL_USB2_OTG_PDBIT(1)
+#define AM437X_CTRL_USB2_OTGVDET_ENBIT(19)
+#define AM437X_CTRL_USB2_OTGSESSEND_EN BIT(20)
+
#if IS_ENABLED(CONFIG_OMAP_CONTROL_USB)
extern void omap_control_usb_phy_power(struct device *dev, int on);
extern void omap_control_usb_set_mode(struct device *dev,
--
1.8.1
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Re: [PATCH] usb: phy: omap: Add omap-control Support for AM437x
Hi George,
On 10/14/2013 03:51 PM, George Cherian wrote:
This adds omap control module support for USBSS in AM437x SoC.
Update DT binding information to reflect these changes.
Signed-off-by: George Cherian george.cher...@ti.com
---
Documentation/devicetree/bindings/usb/omap-usb.txt | 2 ++
drivers/usb/phy/phy-omap-control.c | 17 +
include/linux/usb/omap_control_usb.h | 6 ++
3 files changed, 25 insertions(+)
diff --git a/Documentation/devicetree/bindings/usb/omap-usb.txt
b/Documentation/devicetree/bindings/usb/omap-usb.txt
index 090e5e2..c495135 100644
--- a/Documentation/devicetree/bindings/usb/omap-usb.txt
+++ b/Documentation/devicetree/bindings/usb/omap-usb.txt
@@ -87,6 +87,8 @@ Required properties:
e.g. USB3 PHY and SATA PHY on OMAP5.
ti,control-phy-dra7usb2 - if it has power down register like USB2 PHY on
DRA7 platform.
+ ti,control-phy-am437usb2 - if it has power down register like USB2 PHY on
+ AM437 platform.
- reg : Address and length of the register set for the device. It contains
the address of otghs_control for control-phy-otghs or power register
for other types.
diff --git a/drivers/usb/phy/phy-omap-control.c
b/drivers/usb/phy/phy-omap-control.c
index 09c5ace..c453b81 100644
--- a/drivers/usb/phy/phy-omap-control.c
+++ b/drivers/usb/phy/phy-omap-control.c
@@ -84,6 +84,18 @@ void omap_control_usb_phy_power(struct device *dev, int on)
else
val |= OMAP_CTRL_USB2_PHY_PD;
break;
+
+ case OMAP_CTRL_TYPE_AM437USB2:
+ if (on) {
+ val = ~(AM437X_CTRL_USB2_PHY_PD |
+ AM437X_CTRL_USB2_OTG_PD);
+ val |= (AM437X_CTRL_USB2_OTGVDET_EN |
+ AM437X_CTRL_USB2_OTGSESSEND_EN);
The ON and OFF operations are not symmetric because of this. Shouldn't the
OTG specific stuff go in otg specific ops?
+ } else {
+ val |= (AM437X_CTRL_USB2_PHY_PD |
+ AM437X_CTRL_USB2_OTG_PD);
+ }
+ break;
default:
dev_err(dev, %s: type %d not recognized\n,
__func__, control_usb-type);
@@ -197,6 +209,7 @@ static const enum omap_control_usb_type otghs_data =
OMAP_CTRL_TYPE_OTGHS;
static const enum omap_control_usb_type usb2_data = OMAP_CTRL_TYPE_USB2;
static const enum omap_control_usb_type pipe3_data = OMAP_CTRL_TYPE_PIPE3;
static const enum omap_control_usb_type dra7usb2_data =
OMAP_CTRL_TYPE_DRA7USB2;
+static const enum omap_control_usb_type am437usb2_data =
OMAP_CTRL_TYPE_AM437USB2;
static const struct of_device_id omap_control_usb_id_table[] = {
{
@@ -215,6 +228,10 @@ static const struct of_device_id
omap_control_usb_id_table[] = {
.compatible = ti,control-phy-dra7usb2,
.data = dra7usb2_data,
},
+ {
+ .compatible = ti,control-phy-am437usb2,
+ .data = am437usb2_data,
+ },
{},
};
MODULE_DEVICE_TABLE(of, omap_control_usb_id_table);
diff --git a/include/linux/usb/omap_control_usb.h
b/include/linux/usb/omap_control_usb.h
index 596b019..69ae383 100644
--- a/include/linux/usb/omap_control_usb.h
+++ b/include/linux/usb/omap_control_usb.h
@@ -24,6 +24,7 @@ enum omap_control_usb_type {
OMAP_CTRL_TYPE_USB2,/* USB2_PHY, power down in CONTROL_DEV_CONF */
OMAP_CTRL_TYPE_PIPE3, /* PIPE3 PHY, DPLL seperate Rx/Tx power */
OMAP_CTRL_TYPE_DRA7USB2, /* USB2 PHY, power and power_aux e.g. DRA7 */
+ OMAP_CTRL_TYPE_AM437USB2, /* USB2 PHY, power e.g. AM437x */
};
struct omap_control_usb {
@@ -64,6 +65,11 @@ enum omap_control_usb_mode {
#define OMAP_CTRL_USB2_PHY_PDBIT(28)
+#define AM437X_CTRL_USB2_PHY_PD BIT(0)
+#define AM437X_CTRL_USB2_OTG_PD BIT(1)
+#define AM437X_CTRL_USB2_OTGVDET_EN BIT(19)
+#define AM437X_CTRL_USB2_OTGSESSEND_EN BIT(20)
+
#if IS_ENABLED(CONFIG_OMAP_CONTROL_USB)
extern void omap_control_usb_phy_power(struct device *dev, int on);
extern void omap_control_usb_set_mode(struct device *dev,
cheers,
-roger
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Re: [PATCHv7 00/36] ARM: OMAP: clock data conversion to DT
Hi Paul,
I've been looking at this stuff today, and this will cause pretty huge
changes to the set. This probably means a few weeks delay in
implementation at least.
Some comments on the technical perspectives below.
On 10/14/2013 02:45 AM, Paul Walmsley wrote:
Here you go:
1. Create DT nodes for the IP blocks that contain the clock control
registers, underneath the appropriate bus node. So for example OMAP4
would have:
/ocp {
prm@4a306000 {
compatible = xxx;
regs = 0x4a306000 ;
};
cm1@4a004000 {
compatible = xxx;
regs = 0x4a004000 ;
};
cm2@4a008000 {
compatible = xxx;
regs = 0x4a008000 ;
};
};
This is pure OS-independent hardware description (with the unfortunate
exception of the ocp part).
2. Create the clock data underneath the corresponding PRCM/CM/PRM device
nodes that their control registers exist in. So for example, dpll_per_ck
would belong to the cm1 device, since that's where its control registers
are located. Something like this:
cm1@4a004000 {
...
clocks {
dpll_per_ck@ {
clock data goes here
};
};
};
The DT data is intended to portray addressable devices from the
perspective of the CPUs that are booted with that data, organized by bus
structure. From this point of view, clocks that are controlled via a
particular IP block should have their data associated with that block.
3. Place clock register accesses in the low-level PRCM/CM/PRM device
driver. If other kernel code needs some resource that's provided by the
IP block, it should either come from common Linux framework routines (like
the clock code), or use functions exported from the low-level driver that
don't expose register addresses.
Otherwise, if MMIO accesses to that device are allowed from all over the
codebase, it creates an undebuggable mess:
A. It could result in IP blocks being partially programmed before they are
probed by their drivers. If their drivers (or the integration code) reset
the IP blocks, the non-driver code has no way of knowing that it needs to
reprogram the underlying IP block.
B. If any preparation is needed before the clock registers can be
accessed, like runtime PM calls or device_enable()-type calls, this should
be coordinated by the low-level IP block itself. We don't expect this to
be the case for PRCM/CM/PRM, but we do expect it to be the case for UART,
DSS, some audio clocks, etc.
C. The low-level IP block drivers may want to implement some caching layer
like regmap. If some register writes bypass the low-level driver, then
someone is likely to get a big unpleasant surprise.
D. It impairs the common debugging technique of adding code to the IP
block MMIO read/write functions to log register accesses.
4. Use relative register offsets from the top of the containing IP block's
base address, rather than absolute addresses.
cm1@4a004000 {
...
clocks {
dpll_per_ck@4140 {
clock data goes here
};
};
};
This makes it possible to reuse the same DT clock data in cases where the
same IP block is used, but at a different base address. This is probably
not a big issue with the system integration IP blocks, but quite possible
with the non-SoC-integration IP blocks. It also makes it obvious if
someone tries to sneak clocks into the IP block data that aren't
controlled by that IP block.
Relative addressing basically means I need to copy paste the code for
clk_divider + clk_mux from drivers/clk to drivers/clk/ti. Or
alternatively add a way to provide register read/write ops to the basic
clock.
5. Register the clocks from the low-level IP block drivers, rather than
from external code. That way there's no need to export low-level register
manipulation functions off to other kernel code. This registration can be
done when the PRCM/CM/PRM driver probes.
6. Move the OMAP clockdomain data underneath the DT node for the low-level
IP block that contains them:
cm1@4a004000 {
...
clocks {
...
};
clockdomains {
l3_init_clkdm: l3_init_clkdm@... {
...
};
};
};
I think clocks + clockdomains grouping nodes are unnecessary in this
case. Same can be accomplished with simply using the compatible string
for mapping to corresponding types. (This is probably valid for current
code also.)
For non-OMAP folks reading this thread, OMAP clockdomains have control
registers associated with them, located in the PRCM/CM/PRM IP block
address space, so that's where they belong.
7. drivers/clk/ti is probably the wrong place for most of the low-level
drivers for IP blocks like the PRM/PRCM/CM. Most of these IP blocks do
more than just control clocks: they also control other system entities
like reset lines, OMAP powerdomains,
[PATCH] arm: omap2+: hwmod: Add qspi data for am437x.
Add hwmod data for qspi for AM437x.
Signed-off-by: Sourav Poddar sourav.pod...@ti.com
---
This was tested on AM437x EPOS EVM with Afzal's v6 of AM43x PRCM
basic support and tero's DT clock series.
arch/arm/mach-omap2/omap_hwmod_43xx_data.c | 34
arch/arm/mach-omap2/prcm43xx.h |1 +
2 files changed, 35 insertions(+), 0 deletions(-)
diff --git a/arch/arm/mach-omap2/omap_hwmod_43xx_data.c
b/arch/arm/mach-omap2/omap_hwmod_43xx_data.c
index 6500d43..0a5f7a7 100644
--- a/arch/arm/mach-omap2/omap_hwmod_43xx_data.c
+++ b/arch/arm/mach-omap2/omap_hwmod_43xx_data.c
@@ -316,6 +316,32 @@ static struct omap_hwmod am43xx_gpio5_hwmod = {
.dev_attr = gpio_dev_attr,
};
+static struct omap_hwmod_class_sysconfig am43xx_qspi_sysc = {
+ .sysc_offs = 0x0010,
+ .sysc_flags = SYSC_HAS_SIDLEMODE,
+ .idlemodes = (SIDLE_FORCE | SIDLE_NO | SIDLE_SMART |
+ SIDLE_SMART_WKUP),
+ .sysc_fields= omap_hwmod_sysc_type2,
+};
+
+static struct omap_hwmod_class am43xx_qspi_hwmod_class = {
+ .name = qspi,
+ .sysc = am43xx_qspi_sysc,
+};
+
+static struct omap_hwmod am43xx_qspi_hwmod = {
+ .name = qspi,
+ .class = am43xx_qspi_hwmod_class,
+ .clkdm_name = l3s_clkdm,
+ .main_clk = l3s_gclk,
+ .prcm = {
+ .omap4 = {
+ .clkctrl_offs = AM43XX_CM_PER_QSPI_CLKCTRL_OFFSET,
+ .modulemode = MODULEMODE_SWCTRL,
+ },
+ },
+};
+
/* Interfaces */
static struct omap_hwmod_ocp_if am43xx_l3_main__l4_hs = {
.master = am33xx_l3_main_hwmod,
@@ -520,6 +546,13 @@ static struct omap_hwmod_ocp_if am43xx_l4_ls__gpio5 = {
.user = OCP_USER_MPU | OCP_USER_SDMA,
};
+static struct omap_hwmod_ocp_if am43xx_l3_s__qspi = {
+ .master = am33xx_l3_s_hwmod,
+ .slave = am43xx_qspi_hwmod,
+ .clk= l3s_gclk,
+ .user = OCP_USER_MPU | OCP_USER_SDMA,
+};
+
static struct omap_hwmod_ocp_if *am43xx_hwmod_ocp_ifs[] __initdata = {
am33xx_l4_wkup__synctimer,
am43xx_l4_ls__timer8,
@@ -559,6 +592,7 @@ static struct omap_hwmod_ocp_if *am43xx_hwmod_ocp_ifs[]
__initdata = {
am43xx_l4_wkup__i2c1,
am43xx_l4_wkup__gpio0,
am43xx_l4_wkup__wd_timer1,
+ am43xx_l3_s__qspi,
am33xx_l4_per__dcan0,
am33xx_l4_per__dcan1,
am33xx_l4_per__gpio1,
diff --git a/arch/arm/mach-omap2/prcm43xx.h b/arch/arm/mach-omap2/prcm43xx.h
index f0636ec..976191a 100644
--- a/arch/arm/mach-omap2/prcm43xx.h
+++ b/arch/arm/mach-omap2/prcm43xx.h
@@ -106,6 +106,7 @@
#define AM43XX_CM_WKUP_L4WKUP_CLKCTRL_OFFSET 0x0220
#define AM43XX_CM_RTC_RTC_CLKCTRL_OFFSET 0x0020
#define AM43XX_CM_PER_MMC2_CLKCTRL_OFFSET 0x0248
+#define AM43XX_CM_PER_QSPI_CLKCTRL_OFFSET 0x0258
#define AM43XX_CM_PER_GPMC_CLKCTRL_OFFSET 0x0220
#define AM43XX_CM_PER_MCASP0_CLKCTRL_OFFSET0x0238
#define AM43XX_CM_PER_MCASP1_CLKCTRL_OFFSET0x0240
--
1.7.1
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Re: [PATCHv7 00/36] ARM: OMAP: clock data conversion to DT
On Mon, 14 Oct 2013, Tero Kristo wrote:
On 10/14/2013 02:45 AM, Paul Walmsley wrote:
8. A few random comments about the individual clock binding data formats
themselves, based on a quick look:
A. It seems pretty odd and unnecessarily obscure to do something like
this:
dpll_usb_ck: dpll_usb_ck@... {
...
reg = 0x4a008180 0x4, 0x4a008184 0x4, 0x4a008188 0x4,
0x4a00818c 0x4;
...
};
It's at least self-documenting to do something like this:
dpll_usb_ck: dpll_usb_ck@... {
...
control-reg = ... ;
idlest-reg = ... ;
.. etc. ..
};
Some earlier version had something along these lines, but it was turned down.
I had also reg-names as documentation purposes along, but this was unnecessary
and was dropped also.
Which itself might not even be needed, depending on how the DPLL control
code is implemented. For example, if the relative offsets are always the
same for all OMAP4-family devices, maybe there's not even a need to
explicitly encode that into the DT data.
If I want to get rid of these, I need to add extra compatible strings for the
dpll types. There are several weird register offsets for omap3/am3 devices.
omap4/5/dra7/am4 behave more sanely.
B. Seems like you can remove the ti, prefix on the properties, since
they have no pretentions at genericity: they are specific to the
PRCM/CM/PRM IP block data, and registered by those drivers.
Can or should? It seems existing bindings use ti, prefix even on non-generic
bindings, meaning if I look at any other data in DT.
My comments in #8 are just regarding minor issues that don't seem
right. I don't have a significant objection to staying with the
existing property names here if you think that they are important.
C. Looks like the patches use the property autoidle-low to indicate that
the autoidle bit should be inverted. Low seems like the wrong
expression here - it invokes the actual voltage logic level of a hardware
signal, and we have no idea whether the hardware signal is using a low
voltage or a high voltage to express this condition. Would suggest
something like 'invert-autoidle-bit' instead.
D. Regarding ti,index-starts-at-one, it seems best to explicitly state
which index starts at one. The code mentions a mux index so please
consider renaming this something like mux-index-starts-at-one or
one-based-mux-index
The index is explicitly defined by the clock node where this is present. If it
is a mux-clock, then it is for mux-index. If for divider clock, it is index
for the divider.
- Paul
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Re: [PATCHv7 00/36] ARM: OMAP: clock data conversion to DT
On 10/14/2013 09:27 PM, Paul Walmsley wrote:
On Mon, 14 Oct 2013, Tero Kristo wrote:
On 10/14/2013 02:45 AM, Paul Walmsley wrote:
8. A few random comments about the individual clock binding data formats
themselves, based on a quick look:
A. It seems pretty odd and unnecessarily obscure to do something like
this:
dpll_usb_ck: dpll_usb_ck@... {
...
reg = 0x4a008180 0x4, 0x4a008184 0x4, 0x4a008188 0x4,
0x4a00818c 0x4;
...
};
It's at least self-documenting to do something like this:
dpll_usb_ck: dpll_usb_ck@... {
...
control-reg = ... ;
idlest-reg = ... ;
.. etc. ..
};
Some earlier version had something along these lines, but it was turned down.
I had also reg-names as documentation purposes along, but this was unnecessary
and was dropped also.
Which itself might not even be needed, depending on how the DPLL control
code is implemented. For example, if the relative offsets are always the
same for all OMAP4-family devices, maybe there's not even a need to
explicitly encode that into the DT data.
If I want to get rid of these, I need to add extra compatible strings for the
dpll types. There are several weird register offsets for omap3/am3 devices.
omap4/5/dra7/am4 behave more sanely.
B. Seems like you can remove the ti, prefix on the properties, since
they have no pretentions at genericity: they are specific to the
PRCM/CM/PRM IP block data, and registered by those drivers.
Can or should? It seems existing bindings use ti, prefix even on non-generic
bindings, meaning if I look at any other data in DT.
My comments in #8 are just regarding minor issues that don't seem
right. I don't have a significant objection to staying with the
existing property names here if you think that they are important.
Ok thanks, I'll be reworking most of the other items and will hopefully
have something ready soonish. Taking care of the register mappings is
rather nasty thing to do.
-Tero
C. Looks like the patches use the property autoidle-low to indicate that
the autoidle bit should be inverted. Low seems like the wrong
expression here - it invokes the actual voltage logic level of a hardware
signal, and we have no idea whether the hardware signal is using a low
voltage or a high voltage to express this condition. Would suggest
something like 'invert-autoidle-bit' instead.
D. Regarding ti,index-starts-at-one, it seems best to explicitly state
which index starts at one. The code mentions a mux index so please
consider renaming this something like mux-index-starts-at-one or
one-based-mux-index
The index is explicitly defined by the clock node where this is present. If it
is a mux-clock, then it is for mux-index. If for divider clock, it is index
for the divider.
- Paul
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Re: [PATCH] arm: omap2+: hwmod: Add qspi data for am437x.
Hi On Mon, 14 Oct 2013, Sourav Poddar wrote: Add hwmod data for qspi for AM437x. Signed-off-by: Sourav Poddar sourav.pod...@ti.com --- This was tested on AM437x EPOS EVM with Afzal's v6 of AM43x PRCM basic support and tero's DT clock series. Could you please rebase this on top of George Cherian's patch: [PATCH] ARM: OMAP2+: hwmod: Add USB hwmod data for AM437x. ? - Paul -- To unsubscribe from this list: send the line unsubscribe linux-omap in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
[PATCH 3/3] omapdss: Add OPA362 analog video amplifier driver.
This driver add handlign for opa362 chip which is
video amplifier with internal gain and filter. Enable/disable is
controlled via single gpio. This driver was tested on gta04 board.
Signed-off-by: Marek Belisko ma...@goldelico.com
Signed-off-by: H. Nikolaus Schaller h...@goldelico.com
---
drivers/video/omap2/displays-new/Kconfig | 6 +
drivers/video/omap2/displays-new/Makefile | 1 +
.../video/omap2/displays-new/amplifier-opa362.c| 294 +
include/video/omap-panel-data.h| 17 ++
4 files changed, 318 insertions(+)
create mode 100644 drivers/video/omap2/displays-new/amplifier-opa362.c
diff --git a/drivers/video/omap2/displays-new/Kconfig
b/drivers/video/omap2/displays-new/Kconfig
index 6c90885..5097640 100644
--- a/drivers/video/omap2/displays-new/Kconfig
+++ b/drivers/video/omap2/displays-new/Kconfig
@@ -1,6 +1,12 @@
menu OMAP Display Device Drivers (new device model)
depends on OMAP2_DSS
+config DISPLAY_AMPLIFIER_OPA362
+tristate Analog amplifier with output disable/high-Z
+ help
+ Driver to enable an external analog TV amplifier (e.g. OPA362)
+ through a GPIO.
+
config DISPLAY_ENCODER_TFP410
tristate TFP410 DPI to DVI Encoder
help
diff --git a/drivers/video/omap2/displays-new/Makefile
b/drivers/video/omap2/displays-new/Makefile
index 5aeb11b..2e8af8f 100644
--- a/drivers/video/omap2/displays-new/Makefile
+++ b/drivers/video/omap2/displays-new/Makefile
@@ -1,3 +1,4 @@
+obj-$(CONFIG_DISPLAY_AMPLIFIER_OPA362) += amplifier-opa362.o
obj-$(CONFIG_DISPLAY_ENCODER_TFP410) += encoder-tfp410.o
obj-$(CONFIG_DISPLAY_ENCODER_TPD12S015) += encoder-tpd12s015.o
obj-$(CONFIG_DISPLAY_CONNECTOR_DVI) += connector-dvi.o
diff --git a/drivers/video/omap2/displays-new/amplifier-opa362.c
b/drivers/video/omap2/displays-new/amplifier-opa362.c
new file mode 100644
index 000..677499c
--- /dev/null
+++ b/drivers/video/omap2/displays-new/amplifier-opa362.c
@@ -0,0 +1,294 @@
+/*
+ * OPA362 analog video amplifier with output/power control
+ *
+ * Copyright (C) 2013 Golden Delicious Computers
+ * Author: H. Nikolaus Schaller h...@goldelico.com
+ *
+ * based on encoder-tfp410
+ *
+ * Copyright (C) 2013 Texas Instruments
+ * Author: Tomi Valkeinen tomi.valkei...@ti.com
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of the GNU General Public License version 2 as published by
+ * the Free Software Foundation.
+ */
+
+#include linux/gpio.h
+#include linux/module.h
+#include linux/platform_device.h
+#include linux/slab.h
+
+#include video/omapdss.h
+#include video/omap-panel-data.h
+
+struct panel_drv_data {
+ struct omap_dss_device dssdev;
+ struct omap_dss_device *in;
+
+ int enable_gpio;
+ bool bypass;
+ bool acbias;
+
+ struct omap_video_timings timings;
+};
+
+#define to_panel_data(x) container_of(x, struct panel_drv_data, dssdev)
+
+static int opa362_connect(struct omap_dss_device *dssdev,
+ struct omap_dss_device *dst)
+{
+ struct panel_drv_data *ddata = to_panel_data(dssdev);
+ struct omap_dss_device *in = ddata-in;
+ int r;
+
+ if (omapdss_device_is_connected(dssdev))
+ return -EBUSY;
+
+ r = in-ops.atv-connect(in, dssdev);
+ if (r)
+ return r;
+
+ dst-src = dssdev;
+ dssdev-dst = dst;
+
+ return 0;
+}
+
+static void opa362_disconnect(struct omap_dss_device *dssdev,
+ struct omap_dss_device *dst)
+{
+ struct panel_drv_data *ddata = to_panel_data(dssdev);
+ struct omap_dss_device *in = ddata-in;
+
+ WARN_ON(!omapdss_device_is_connected(dssdev));
+ if (!omapdss_device_is_connected(dssdev))
+ return;
+
+ WARN_ON(dst != dssdev-dst);
+ if (dst != dssdev-dst)
+ return;
+
+ dst-src = NULL;
+ dssdev-dst = NULL;
+
+ in-ops.atv-disconnect(in, ddata-dssdev);
+}
+
+static int opa362_enable(struct omap_dss_device *dssdev)
+{
+ struct panel_drv_data *ddata = to_panel_data(dssdev);
+ struct omap_dss_device *in = ddata-in;
+ int r;
+
+ if (!omapdss_device_is_connected(dssdev))
+ return -ENODEV;
+
+ if (omapdss_device_is_enabled(dssdev))
+ return 0;
+
+ in-ops.atv-set_timings(in, ddata-timings);
+ in-ops.atv-invert_vid_out_polarity(in, true);
+ in-ops.atv-bypass_and_acbias(in, ddata-bypass, ddata-acbias);
+
+ r = in-ops.atv-enable(in);
+ if (r)
+ return r;
+
+ if (gpio_is_valid(ddata-enable_gpio))
+ gpio_set_value_cansleep(ddata-enable_gpio, 1);
+
+ dssdev-state = OMAP_DSS_DISPLAY_ACTIVE;
+
+ return 0;
+}
+
+static void opa362_disable(struct omap_dss_device *dssdev)
+{
+ struct panel_drv_data *ddata = to_panel_data(dssdev);
+ struct omap_dss_device *in = ddata-in;
+
+ if
[PATCH 2/3] video: venc: Add new callback and handling for bypass and acbias setup.
Add new callback to set bypass and acbias. During venc enble disable those
bit are updated in devconf1 register.
Signed-off-by: Marek Belisko ma...@goldelico.com
---
drivers/video/omap2/dss/venc.c | 21 +
include/video/omapdss.h| 2 ++
2 files changed, 23 insertions(+)
diff --git a/drivers/video/omap2/dss/venc.c b/drivers/video/omap2/dss/venc.c
index 5f88ac4..17bd45b 100644
--- a/drivers/video/omap2/dss/venc.c
+++ b/drivers/video/omap2/dss/venc.c
@@ -34,6 +34,7 @@
#include linux/platform_device.h
#include linux/regulator/consumer.h
#include linux/pm_runtime.h
+#include linux/omap-tvout.h
#include video/omapdss.h
@@ -303,6 +304,8 @@ static struct {
struct omap_video_timings timings;
enum omap_dss_venc_type type;
bool invert_polarity;
+ bool bypass;
+ bool acbias;
struct omap_dss_device output;
} venc;
@@ -455,6 +458,9 @@ static int venc_power_on(struct omap_dss_device *dssdev)
venc_write_reg(VENC_OUTPUT_CONTROL, l);
+ /* apply bypass and acbias */
+ update_bypass_acbias(venc.bypass, venc.acbias);
+
dss_mgr_set_timings(mgr, venc.timings);
r = regulator_enable(venc.vdda_dac_reg);
@@ -485,6 +491,9 @@ static void venc_power_off(struct omap_dss_device *dssdev)
venc_write_reg(VENC_OUTPUT_CONTROL, 0);
dss_set_dac_pwrdn_bgz(0);
+ /* clear bypass and acbias */
+ update_bypass_acbias(false, false);
+
dss_mgr_disable(mgr);
regulator_disable(venc.vdda_dac_reg);
@@ -629,6 +638,17 @@ static void venc_invert_vid_out_polarity(struct
omap_dss_device *dssdev,
mutex_unlock(venc.venc_lock);
}
+static void venc_bypass_and_acbias(struct omap_dss_device *dssdev,
+ bool bypass, bool acbias)
+{
+ mutex_lock(venc.venc_lock);
+
+ venc.bypass = bypass;
+ venc.acbias = acbias;
+
+ mutex_unlock(venc.venc_lock);
+}
+
static int venc_init_regulator(void)
{
struct regulator *vdda_dac;
@@ -777,6 +797,7 @@ static const struct omapdss_atv_ops venc_ops = {
.set_type = venc_set_type,
.invert_vid_out_polarity = venc_invert_vid_out_polarity,
+ .bypass_and_acbias = venc_bypass_and_acbias,
.set_wss = venc_set_wss,
.get_wss = venc_get_wss,
diff --git a/include/video/omapdss.h b/include/video/omapdss.h
index 3d7c51a..54a185f 100644
--- a/include/video/omapdss.h
+++ b/include/video/omapdss.h
@@ -607,6 +607,8 @@ struct omapdss_atv_ops {
enum omap_dss_venc_type type);
void (*invert_vid_out_polarity)(struct omap_dss_device *dssdev,
bool invert_polarity);
+ void (*bypass_and_acbias)(struct omap_dss_device *dssdev,
+ bool bypass, bool acbias);
int (*set_wss)(struct omap_dss_device *dssdev, u32 wss);
u32 (*get_wss)(struct omap_dss_device *dssdev);
--
1.8.1.2
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[PATCH 1/3] arm: omap2: Export devconf1 bypass and acbias.
devconf1 reg access is localized only in mach-omap2 and we need to export
updating of devconf1 from omapdss venc driver (bypass and acbias bits).
Add simple api call which update only necessary bits.
Signed-off-by: Marek Belisko ma...@goldelico.com
---
arch/arm/mach-omap2/Makefile | 2 ++
arch/arm/mach-omap2/control.h | 2 ++
arch/arm/mach-omap2/omap3-tvout.c | 36
include/linux/omap-tvout.h| 14 ++
4 files changed, 54 insertions(+)
create mode 100644 arch/arm/mach-omap2/omap3-tvout.c
create mode 100644 include/linux/omap-tvout.h
diff --git a/arch/arm/mach-omap2/Makefile b/arch/arm/mach-omap2/Makefile
index afb457c..15e0f28 100644
--- a/arch/arm/mach-omap2/Makefile
+++ b/arch/arm/mach-omap2/Makefile
@@ -306,3 +306,5 @@ emac-$(CONFIG_TI_DAVINCI_EMAC) := am35xx-emac.o
obj-y += $(emac-m) $(emac-y)
obj-y += common-board-devices.o twl-common.o
dss-common.o
+
+obj-$(CONFIG_ARCH_OMAP3) += omap3-tvout.o
diff --git a/arch/arm/mach-omap2/control.h b/arch/arm/mach-omap2/control.h
index f7d7c2e..65277f1 100644
--- a/arch/arm/mach-omap2/control.h
+++ b/arch/arm/mach-omap2/control.h
@@ -279,6 +279,8 @@
/* CONTROL_DEVCONF1 bits */
#define OMAP243X_MMC1_ACTIVE_OVERWRITE (1 31)
+#define OMAP2_TVOUTBYPASS (1 18)
+#define OMAP2_TVACEN (1 11)
#define OMAP2_MMCSDIO2ADPCLKISEL (1 6) /* MMC2 loop back clock */
#define OMAP2_MCBSP5_CLKS_MASK (1 4) /* 242x */
#define OMAP2_MCBSP4_CLKS_MASK (1 2) /* 242x */
diff --git a/arch/arm/mach-omap2/omap3-tvout.c
b/arch/arm/mach-omap2/omap3-tvout.c
new file mode 100644
index 000..eaed225
--- /dev/null
+++ b/arch/arm/mach-omap2/omap3-tvout.c
@@ -0,0 +1,36 @@
+/*
+ * linux/arch/arm/mach-omap2/omap3-tvout.c
+ *
+ * Copyright (C) 2013 Golden Delicious Computers
+ * Author: Marek Belisko ma...@goldelico.com
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+
+#include linux/kernel.h
+#include linux/omap-tvout.h
+
+#include soc.h
+#include control.h
+
+void update_bypass_acbias(bool bypass, bool acbias)
+{
+#ifdef CONFIG_ARCH_OMAP3
+ int val = omap_ctrl_readl(OMAP343X_CONTROL_DEVCONF1);
+
+ if (bypass)
+ val |= OMAP2_TVOUTBYPASS;
+ else
+ val = ~OMAP2_TVOUTBYPASS;
+
+ if (acbias)
+ val |= OMAP2_TVACEN;
+ else
+ val = ~OMAP2_TVACEN;
+
+ omap_ctrl_writel(val, OMAP343X_CONTROL_DEVCONF1);
+#endif
+}
+
diff --git a/include/linux/omap-tvout.h b/include/linux/omap-tvout.h
new file mode 100644
index 000..25f676d
--- /dev/null
+++ b/include/linux/omap-tvout.h
@@ -0,0 +1,14 @@
+/*
+ * OMAP TV-out support
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+#ifndef __LINUX_OMAP_TVOUT_H
+#define __LINUX_OMAP_TVOUT_H
+
+extern void update_bypass_acbias(bool bypass, bool acbias);
+
+#endif
+
--
1.8.1.2
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[PATCH 0/3] omapdss: venc: Add support for bypass and acbias.
This patches is adding bypass and acbias functionality to omapdss venc driver. In first patch we export updatin bypass and acbias in devconf1 register. Next patch add handling for updating in venc driver and last patch add driver for opa362 which is used on gta04 board and set bypass + acbias. Marek Belisko (3): arm: omap2: Export devconf1 bypass and acbias. video: venc: Add new callback and handling for bypass and acbias setup. omapdss: Add OPA362 analog video amplifier driver. arch/arm/mach-omap2/Makefile | 2 + arch/arm/mach-omap2/control.h | 2 + arch/arm/mach-omap2/omap3-tvout.c | 36 +++ drivers/video/omap2/displays-new/Kconfig | 6 + drivers/video/omap2/displays-new/Makefile | 1 + .../video/omap2/displays-new/amplifier-opa362.c| 294 + drivers/video/omap2/dss/venc.c | 21 ++ include/linux/omap-tvout.h | 14 + include/video/omap-panel-data.h| 17 ++ include/video/omapdss.h| 2 + 10 files changed, 395 insertions(+) create mode 100644 arch/arm/mach-omap2/omap3-tvout.c create mode 100644 drivers/video/omap2/displays-new/amplifier-opa362.c create mode 100644 include/linux/omap-tvout.h -- 1.8.1.2 -- To unsubscribe from this list: send the line unsubscribe linux-omap in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
Re: [GIT PULL 1/6] omap non-urgent fixes for v3.13 merge window
Tony Lindgren t...@atomide.com writes: The following changes since commit 15c03dd4859ab16f9212238f29dd315654aa94f6: Linux 3.12-rc3 (2013-09-29 15:02:38 -0700) are available in the git repository at: git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap tags/omap-for-v3.13/fixes-not-urgent-signed for you to fetch changes up to 8ff875e7f93e900e7a7e78f1c9c05a22b33c27cf: ARM: mach-omap1: Fix omap1510_fpga_init_irq() implicit declarations. (2013-10-08 11:04:22 -0700) Fixes for omaps that were not considered urgent for the -rc series. Just minor build fixes, removal of dead code, and a patch to use the die ID for increasing boot time entropy. Thanks, pulled into fixes-non-critical. Kevin -- To unsubscribe from this list: send the line unsubscribe linux-omap in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
Re: [GIT PULL 2/6] omap pdata and dt preparation changes for v3.13 merge window
Tony Lindgren t...@atomide.com writes: The following changes since commit d0e639c9e06d44e713170031fe05fb60ebe680af: Linux 3.12-rc4 (2013-10-06 14:00:20 -0700) are available in the git repository at: git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap tags/omap-for-v3.13/quirk-signed for you to fetch changes up to 8d71528343c69ce387bd5fdb4fd8dc2b9f69d97c: ARM: configs: omap2plus_defconfig: enable dwc3 and dependencies (2013-10-11 15:41:25 -0700) Changes needed to prepare for making omap3 device tree only: - Always build in board-generic, and add pdata quirks and auxdata support for it so we have all the pdata related quirks in the same place. - Merge of the drivers/pinctrl changes that are needed for PM to continue working on omap3 and also needed for other omaps eventually. The three pinctrl related patches have been acked by Linus Walleij and are pulled into both the pinctrl tree and this branch. - Few defconfig related changes for drivers needed. Thanks, pulled into next/dt. Kevin -- To unsubscribe from this list: send the line unsubscribe linux-omap in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
Re: [GIT PULL 4/6] omap device tree changes for v3.13 merge window
Tony Lindgren t...@atomide.com writes: The following changes since commit d0e639c9e06d44e713170031fe05fb60ebe680af: Linux 3.12-rc4 (2013-10-06 14:00:20 -0700) are available in the git repository at: git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap tags/omap-for-v3.13/dt-signed for you to fetch changes up to c49f4984fd45be36502e903e7a5a6a4faff42931: Merge tag 'for_3.13/dts_signed' of git://git.kernel.org/pub/scm/linux/kernel/git/bcousson/linux-omap-dt into omap-for-v3.13/dt (2013-10-11 15:40:07 -0700) omap device tree related changes via Benoit Cousson bcous...@baylibre.com: Add the minimal DTS support for DRA7xx based SoC core. Add the initial support for N900 and gta04 phones. Enable USB3 on OMAP5 evm board. Add support for cryto accelerators Add new IGEP AQUILA board Add AM33XX EDMA support Update HSUSB node to use the reset-gpios fmwk Thanks, pulled into next/dt. Kevin -- To unsubscribe from this list: send the line unsubscribe linux-omap in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
Re: [GIT PULL 3/6] omap hwmod changes for v3.13 merge window
Tony Lindgren t...@atomide.com writes: The following changes since commit d0e639c9e06d44e713170031fe05fb60ebe680af: Linux 3.12-rc4 (2013-10-06 14:00:20 -0700) are available in the git repository at: git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap tags/omap-for-v3.13/hwmod-signed for you to fetch changes up to 254f57a92987b6cde6004f58d6b847813dfb9e0e: ARM: OMAP5: hwmod: add missing ocp2scp hwmod data (2013-10-11 15:37:05 -0700) omap hwmod related changes via Paul Walmsley p...@pwsan.com: Some OMAP hwmod changes for 3.13. Significant changes here include: - support for moving some of the hwmod flags to DT data - support for the SSI, hardware spinlock, USB host/TLL, and RNG IP blocks for various OMAPs - a fix that again decouples hwmod data changes from unrelated DT data patchsets Basic test logs are available at: http://www.pwsan.com/omap/testlogs/prcm_fixes_v3.13/20131009094936/ Pulled into next/soc, Thanks, Kevin -- To unsubscribe from this list: send the line unsubscribe linux-omap in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
Re: [GIT PULL 6/6] omap soc changes for v3.13 merge window
Tony Lindgren t...@atomide.com writes: The following changes since commit d0e639c9e06d44e713170031fe05fb60ebe680af: Linux 3.12-rc4 (2013-10-06 14:00:20 -0700) are available in the git repository at: git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap tags/omap-for-v3.13/soc-take2 for you to fetch changes up to d5da94b88efebc375bfcbab6bb0e59a6e8a6571e: ARM: OMAP2+: Fix build error for realtime counter init if not enabled (2013-10-11 17:28:04 -0700) SoC related changes for omaps to support the realtime counter on newer omaps, and to fail early for omap5 es1.0 SoCs that don't have any support merged for them in the mainline tree. Pulled into next/soc, Thanks, Kevin -- To unsubscribe from this list: send the line unsubscribe linux-omap in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
Re: [GIT PULL 5/6] omap display and board pdata changes for v3.13 merge window
Tony Lindgren t...@atomide.com writes: The following changes since commit d0e639c9e06d44e713170031fe05fb60ebe680af: Linux 3.12-rc4 (2013-10-06 14:00:20 -0700) are available in the git repository at: git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap tags/omap-for-v3.13/board-signed for you to fetch changes up to 9e490f486ea9ce7644be913e03ee5ccdf1be20f7: Merge branch 'omap-for-v3.13/n900' into omap-for-v3.13/board (2013-10-11 16:14:23 -0700) Platform data changes for omaps for the display subsystem and n900 secure mode changes. Note that the n900 secure mode changes will still be needed for device tree based booting also. Thanks, pulled into next/boards. Kevin -- To unsubscribe from this list: send the line unsubscribe linux-omap in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
Re: [GIT PULL 3/6] omap hwmod changes for v3.13 merge window
On Mon, Oct 14, 2013 at 03:44:44PM -0700, Kevin Hilman wrote: Tony Lindgren t...@atomide.com writes: The following changes since commit d0e639c9e06d44e713170031fe05fb60ebe680af: Linux 3.12-rc4 (2013-10-06 14:00:20 -0700) are available in the git repository at: git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap tags/omap-for-v3.13/hwmod-signed for you to fetch changes up to 254f57a92987b6cde6004f58d6b847813dfb9e0e: ARM: OMAP5: hwmod: add missing ocp2scp hwmod data (2013-10-11 15:37:05 -0700) omap hwmod related changes via Paul Walmsley p...@pwsan.com: Some OMAP hwmod changes for 3.13. Significant changes here include: - support for moving some of the hwmod flags to DT data - support for the SSI, hardware spinlock, USB host/TLL, and RNG IP blocks for various OMAPs - a fix that again decouples hwmod data changes from unrelated DT data patchsets Basic test logs are available at: http://www.pwsan.com/omap/testlogs/prcm_fixes_v3.13/20131009094936/ Pulled into next/soc, Thanks, Kevin Hm, looks like my BBB hit this on v3.12-rc4-493-g1a9df23, which is pushed to to-build but not for-next yet. I'm guessing this might be what Kevin pinged me about on IRC today but I was out and unavailable most of the day. [0.169527] [ cut here ] [0.169585] WARNING: CPU: 0 PID: 1 at ../../arch/arm/mach-omap2/omap_hwmod.c:2438 _init+0x338/0x37c() [0.169602] omap_hwmod: spinlock: doesn't have mpu register target base [0.169616] Modules linked in: [0.169647] CPU: 0 PID: 1 Comm: swapper/0 Not tainted 3.12.0-rc4-00493-g1a9df23 #1 [0.169701] [c001ba40] (unwind_backtrace+0x0/0xec) from [c0017b80] (show_stack+0x10/0x14) [0.169735] [c0017b80] (show_stack+0x10/0x14) from [c051ad90] (dump_stack+0x7c/0x94) [0.169768] [c051ad90] (dump_stack+0x7c/0x94) from [c0045be0] (warn_slowpath_common+0x6c/0x90) [0.169796] [c0045be0] (warn_slowpath_common+0x6c/0x90) from [c0045c34] (warn_slowpath_fmt+0x30/0x40) [0.169825] [c0045c34] (warn_slowpath_fmt+0x30/0x40) from [c076e868] (_init+0x338/0x37c) [0.169855] [c076e868] (_init+0x338/0x37c) from [c076ed80] (__omap_hwmod_setup_all+0x40/0x8c) [0.169886] [c076ed80] (__omap_hwmod_setup_all+0x40/0x8c) from [c0008848] (do_one_initcall+0xe8/0x14c) [0.169924] [c0008848] (do_one_initcall+0xe8/0x14c) from [c0762b84] (kernel_init_freeable+0x104/0x1c4) [0.169963] [c0762b84] (kernel_init_freeable+0x104/0x1c4) from [c0514c90] (kernel_init+0x8/0x150) [0.170002] [c0514c90] (kernel_init+0x8/0x150) from [c0013bc8] (ret_from_fork+0x14/0x2c) [0.170221] ---[ end trace 1b75b31a2719ed1c ]--- -Olof -- To unsubscribe from this list: send the line unsubscribe linux-omap in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
Re: [GIT PULL 3/6] omap hwmod changes for v3.13 merge window
On Mon, Oct 14, 2013 at 9:25 PM, Kevin Hilman khil...@linaro.org wrote: On Oct 14, 2013 9:12 PM, Olof Johansson o...@lixom.net wrote: On Mon, Oct 14, 2013 at 03:44:44PM -0700, Kevin Hilman wrote: Tony Lindgren t...@atomide.com writes: The following changes since commit d0e639c9e06d44e713170031fe05fb60ebe680af: Linux 3.12-rc4 (2013-10-06 14:00:20 -0700) are available in the git repository at: git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap tags/omap-for-v3.13/hwmod-signed for you to fetch changes up to 254f57a92987b6cde6004f58d6b847813dfb9e0e: ARM: OMAP5: hwmod: add missing ocp2scp hwmod data (2013-10-11 15:37:05 -0700) omap hwmod related changes via Paul Walmsley p...@pwsan.com: Some OMAP hwmod changes for 3.13. Significant changes here include: - support for moving some of the hwmod flags to DT data - support for the SSI, hardware spinlock, USB host/TLL, and RNG IP blocks for various OMAPs - a fix that again decouples hwmod data changes from unrelated DT data patchsets Basic test logs are available at: http://www.pwsan.com/omap/testlogs/prcm_fixes_v3.13/20131009094936/ Pulled into next/soc, Thanks, Kevin Hm, looks like my BBB hit this on v3.12-rc4-493-g1a9df23, which is pushed to to-build but not for-next yet. I'm guessing this might be what Kevin pinged me about on IRC today but I was out and unavailable most of the day. Hmmm... mine seems to have booted fine on that build... http://lists.linaro.org/pipermail/kernel-build-reports/2013-October/000666.html Well, it's a WARN_ON() not a panic, so my script probably shouldn't have aborted the boot (and your script should have reported it :-). Check your local log to see if you have something in there? -Olof -- To unsubscribe from this list: send the line unsubscribe linux-omap in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
Re: [PATCH] arm: omap2+: hwmod: Add qspi data for am437x.
On Tuesday 15 October 2013 01:04 AM, Paul Walmsley wrote: Hi On Mon, 14 Oct 2013, Sourav Poddar wrote: Add hwmod data for qspi for AM437x. Signed-off-by: Sourav Poddarsourav.pod...@ti.com --- This was tested on AM437x EPOS EVM with Afzal's v6 of AM43x PRCM basic support and tero's DT clock series. Could you please rebase this on top of George Cherian's patch: [PATCH] ARM: OMAP2+: hwmod: Add USB hwmod data for AM437x. ? Yes, I will do and send you the updated patch. - Paul -- To unsubscribe from this list: send the line unsubscribe linux-omap in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
[PATCHv2] arm: omap2+: hwmod: Add qspi data for am437x.
Add hwmod data for qspi for AM437x.
Signed-off-by: Sourav Poddar sourav.pod...@ti.com
---
This was tested on AM437x EPOS EVM with Afzal's v6 of AM43x PRCM
basic support and tero's DT clock series.
v1-v2:
Rebase on George Cherian USB hwmod patches.
arch/arm/mach-omap2/omap_hwmod_43xx_data.c | 34
arch/arm/mach-omap2/prcm43xx.h |1 +
2 files changed, 35 insertions(+), 0 deletions(-)
diff --git a/arch/arm/mach-omap2/omap_hwmod_43xx_data.c
b/arch/arm/mach-omap2/omap_hwmod_43xx_data.c
index a58024d..9002fca 100644
--- a/arch/arm/mach-omap2/omap_hwmod_43xx_data.c
+++ b/arch/arm/mach-omap2/omap_hwmod_43xx_data.c
@@ -389,6 +389,32 @@ static struct omap_hwmod am43xx_usb_otg_ss1_hwmod = {
},
};
+static struct omap_hwmod_class_sysconfig am43xx_qspi_sysc = {
+ .sysc_offs = 0x0010,
+ .sysc_flags = SYSC_HAS_SIDLEMODE,
+ .idlemodes = (SIDLE_FORCE | SIDLE_NO | SIDLE_SMART |
+ SIDLE_SMART_WKUP),
+ .sysc_fields= omap_hwmod_sysc_type2,
+};
+
+static struct omap_hwmod_class am43xx_qspi_hwmod_class = {
+ .name = qspi,
+ .sysc = am43xx_qspi_sysc,
+};
+
+static struct omap_hwmod am43xx_qspi_hwmod = {
+ .name = qspi,
+ .class = am43xx_qspi_hwmod_class,
+ .clkdm_name = l3s_clkdm,
+ .main_clk = l3s_gclk,
+ .prcm = {
+ .omap4 = {
+ .clkctrl_offs = AM43XX_CM_PER_QSPI_CLKCTRL_OFFSET,
+ .modulemode = MODULEMODE_SWCTRL,
+ },
+ },
+};
+
/* Interfaces */
static struct omap_hwmod_ocp_if am43xx_l3_main__l4_hs = {
.master = am33xx_l3_main_hwmod,
@@ -621,6 +647,13 @@ static struct omap_hwmod_ocp_if am43xx_l3_s__usbotgss1 = {
.user = OCP_USER_MPU | OCP_USER_SDMA,
};
+static struct omap_hwmod_ocp_if am43xx_l3_s__qspi = {
+ .master = am33xx_l3_s_hwmod,
+ .slave = am43xx_qspi_hwmod,
+ .clk= l3s_gclk,
+ .user = OCP_USER_MPU | OCP_USER_SDMA,
+};
+
static struct omap_hwmod_ocp_if *am43xx_hwmod_ocp_ifs[] __initdata = {
am33xx_l4_wkup__synctimer,
am43xx_l4_ls__timer8,
@@ -660,6 +693,7 @@ static struct omap_hwmod_ocp_if *am43xx_hwmod_ocp_ifs[]
__initdata = {
am43xx_l4_wkup__i2c1,
am43xx_l4_wkup__gpio0,
am43xx_l4_wkup__wd_timer1,
+ am43xx_l3_s__qspi,
am33xx_l4_per__dcan0,
am33xx_l4_per__dcan1,
am33xx_l4_per__gpio1,
diff --git a/arch/arm/mach-omap2/prcm43xx.h b/arch/arm/mach-omap2/prcm43xx.h
index 0d66a6e..7785be9 100644
--- a/arch/arm/mach-omap2/prcm43xx.h
+++ b/arch/arm/mach-omap2/prcm43xx.h
@@ -106,6 +106,7 @@
#define AM43XX_CM_WKUP_L4WKUP_CLKCTRL_OFFSET 0x0220
#define AM43XX_CM_RTC_RTC_CLKCTRL_OFFSET 0x0020
#define AM43XX_CM_PER_MMC2_CLKCTRL_OFFSET 0x0248
+#define AM43XX_CM_PER_QSPI_CLKCTRL_OFFSET 0x0258
#define AM43XX_CM_PER_GPMC_CLKCTRL_OFFSET 0x0220
#define AM43XX_CM_PER_MCASP0_CLKCTRL_OFFSET0x0238
#define AM43XX_CM_PER_MCASP1_CLKCTRL_OFFSET0x0240
--
1.7.1
--
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Re: [PATCH 2/7] usb: dwc3: adapt dwc3 core to use Generic PHY Framework
Hi Roger,
On Monday 14 October 2013 03:51 PM, Roger Quadros wrote:
+Vivek
On 10/14/2013 12:26 PM, Kishon Vijay Abraham I wrote:
Hi Roger,
On Friday 11 October 2013 08:39 PM, Roger Quadros wrote:
Hi,
On 09/02/2013 06:43 PM, Kishon Vijay Abraham I wrote:
Adapted dwc3 core to use the Generic PHY Framework. So for init, exit,
power_on and power_off the following APIs are used phy_init(), phy_exit(),
phy_power_on() and phy_power_off().
However using the old USB phy library wont be removed till the PHYs of all
other SoC's using dwc3 core is adapted to the Generic PHY Framework.
Signed-off-by: Kishon Vijay Abraham I kis...@ti.com
---
Documentation/devicetree/bindings/usb/dwc3.txt |6 ++-
drivers/usb/dwc3/Kconfig |1 +
drivers/usb/dwc3/core.c| 49
drivers/usb/dwc3/core.h|7
4 files changed, 61 insertions(+), 2 deletions(-)
diff --git a/Documentation/devicetree/bindings/usb/dwc3.txt
b/Documentation/devicetree/bindings/usb/dwc3.txt
index e807635..471366d 100644
--- a/Documentation/devicetree/bindings/usb/dwc3.txt
+++ b/Documentation/devicetree/bindings/usb/dwc3.txt
@@ -6,11 +6,13 @@ Required properties:
- compatible: must be snps,dwc3
- reg : Address and length of the register set for the device
- interrupts: Interrupts used by the dwc3 controller.
+
+Optional properties:
- usb-phy : array of phandle for the PHY device. The first element
in the array is expected to be a handle to the USB2/HS PHY and
the second element is expected to be a handle to the USB3/SS PHY
-
-Optional properties:
+ - phys: from the *Generic PHY* bindings
+ - phy-names: from the *Generic PHY* bindings
- tx-fifo-resize: determines if the FIFO *has* to be reallocated.
This is usually a subnode to DWC3 glue to which it is connected.
diff --git a/drivers/usb/dwc3/Kconfig b/drivers/usb/dwc3/Kconfig
index cfc16dd..ad7ce83 100644
--- a/drivers/usb/dwc3/Kconfig
+++ b/drivers/usb/dwc3/Kconfig
@@ -3,6 +3,7 @@ config USB_DWC3
depends on (USB || USB_GADGET) GENERIC_HARDIRQS HAS_DMA
depends on EXTCON
select USB_PHY
+ select GENERIC_PHY
select USB_XHCI_PLATFORM if USB_SUPPORT USB_XHCI_HCD
help
Say Y or M here if your system has a Dual Role SuperSpeed
diff --git a/drivers/usb/dwc3/core.c b/drivers/usb/dwc3/core.c
index 428c29e..485d365 100644
--- a/drivers/usb/dwc3/core.c
+++ b/drivers/usb/dwc3/core.c
@@ -82,6 +82,12 @@ static void dwc3_core_soft_reset(struct dwc3 *dwc)
usb_phy_init(dwc-usb2_phy);
usb_phy_init(dwc-usb3_phy);
How about adding
+ if (dwc-usb2_phy)
+ usb_phy_init(dwc-usb2_phy);
+ if (dwc-usb3_phy)
+ usb_phy_init(dwc-usb3_phy);
Thankfully that usb_phy_init will check if phy is NULL.
both usb phy and generic phy shouldn't be present together.
ok.
+
+ if (dwc-usb2_generic_phy)
+ phy_init(dwc-usb2_generic_phy);
+ if (dwc-usb3_generic_phy)
+ phy_init(dwc-usb3_generic_phy);
+
mdelay(100);
/* Clear USB3 PHY reset */
@@ -343,6 +349,11 @@ static void dwc3_core_exit(struct dwc3 *dwc)
{
usb_phy_shutdown(dwc-usb2_phy);
usb_phy_shutdown(dwc-usb3_phy);
here as well
+
+ if (dwc-usb2_generic_phy)
+ phy_power_off(dwc-usb2_generic_phy);
+ if (dwc-usb3_generic_phy)
+ phy_power_off(dwc-usb3_generic_phy);
}
#define DWC3_ALIGN_MASK (16 - 1)
@@ -427,6 +438,23 @@ static int dwc3_probe(struct platform_device *pdev)
dwc-usb3_phy = devm_usb_get_phy(dev, USB_PHY_TYPE_USB3);
}
+ if (of_property_read_bool(node, phys) || pdata-has_phy) {
+ dwc-usb2_generic_phy = devm_phy_get(dev, usb2-phy);
+ if (IS_ERR(dwc-usb2_generic_phy)) {
+ dev_err(dev, no usb2 phy configured yet);
+ return PTR_ERR(dwc-usb2_generic_phy);
+ }
+
+ dwc-usb3_generic_phy = devm_phy_get(dev, usb3-phy);
+ if (IS_ERR(dwc-usb3_generic_phy)) {
+ dev_err(dev, no usb3 phy configured yet);
+ return PTR_ERR(dwc-usb3_generic_phy);
+ }
better to add
+ /* Don't use USB PHY if generic PHY was found */
+ dwc-usb2_phy = dwc-usb3_phy = NULL;
ok.
+ } else {
not required as we've used kzalloc for dwc.
+ dwc-usb2_generic_phy = NULL;
+ dwc-usb3_generic_phy = NULL;
+ }
+
/* default to superspeed if no maximum_speed passed */
if (dwc-maximum_speed == USB_SPEED_UNKNOWN)
dwc-maximum_speed = USB_SPEED_SUPER;
@@ -450,6 +478,11 @@ static int dwc3_probe(struct platform_device *pdev)
if (dwc-usb2_phy)
usb_phy_set_suspend(dwc-usb2_phy, 0);
if (dwc-usb3_phy)
usb_phy_set_suspend(dwc-usb3_phy, 0);
+ if (dwc-usb2_generic_phy)
+ phy_power_on(dwc-usb2_generic_phy);
+ if (dwc-usb3_generic_phy)
+
[PATCH v9 1/9] mtd: nand: omap: combine different flavours of 1-bit hamming ecc schemes
OMAP NAND driver currently supports multiple flavours of 1-bit Hamming
ecc-scheme, like:
- OMAP_ECC_HAMMING_CODE_DEFAULT
1-bit hamming ecc code using software library
- OMAP_ECC_HAMMING_CODE_HW
1-bit hamming ecc-code using GPMC h/w engine
- OMAP_ECC_HAMMING_CODE_HW_ROMCODE
1-bit hamming ecc-code using GPMC h/w engin with ecc-layout compatible
to ROM code.
This patch combines above multiple ecc-schemes into single implementation:
- OMAP_ECC_HAM1_CODE_HW
1-bit hamming ecc-code using GPMC h/w engine with ROM-code compatible
ecc-layout.
Signed-off-by: Pekon Gupta pe...@ti.com
Reviewed-by: Felipe Balbi ba...@ti.com
Acked-by: Tony Lindgren t...@atomide.com
---
Documentation/devicetree/bindings/mtd/gpmc-nand.txt | 8
arch/arm/mach-omap2/board-flash.c | 2 +-
arch/arm/mach-omap2/gpmc.c | 4 +---
drivers/mtd/nand/omap2.c| 9 +++--
include/linux/platform_data/mtd-nand-omap2.h| 6 +-
5 files changed, 10 insertions(+), 19 deletions(-)
diff --git a/Documentation/devicetree/bindings/mtd/gpmc-nand.txt
b/Documentation/devicetree/bindings/mtd/gpmc-nand.txt
index df338cb..25ee232 100644
--- a/Documentation/devicetree/bindings/mtd/gpmc-nand.txt
+++ b/Documentation/devicetree/bindings/mtd/gpmc-nand.txt
@@ -22,10 +22,10 @@ Optional properties:
width of 8 is assumed.
- ti,nand-ecc-opt:A string setting the ECC layout to use. One of:
-
- swSoftware method (default)
- hwHardware method
- hw-romcodegpmc hamming mode method romcode layout
+ swdeprecated use ham1 instead
+ hwdeprecated use ham1 instead
+ hw-romcodedeprecated use ham1 instead
+ ham1 1-bit Hamming ecc code
bch4 4-bit BCH ecc code
bch8 8-bit BCH ecc code
diff --git a/arch/arm/mach-omap2/board-flash.c
b/arch/arm/mach-omap2/board-flash.c
index fc20a61..ac82512 100644
--- a/arch/arm/mach-omap2/board-flash.c
+++ b/arch/arm/mach-omap2/board-flash.c
@@ -142,7 +142,7 @@ __init board_nand_init(struct mtd_partition *nand_parts, u8
nr_parts, u8 cs,
board_nand_data.nr_parts= nr_parts;
board_nand_data.devsize = nand_type;
- board_nand_data.ecc_opt = OMAP_ECC_HAMMING_CODE_DEFAULT;
+ board_nand_data.ecc_opt = OMAP_ECC_BCH8_CODE_HW;
gpmc_nand_init(board_nand_data, gpmc_t);
}
#endif /* CONFIG_MTD_NAND_OMAP2 || CONFIG_MTD_NAND_OMAP2_MODULE */
diff --git a/arch/arm/mach-omap2/gpmc.c b/arch/arm/mach-omap2/gpmc.c
index 579697a..c9fb353 100644
--- a/arch/arm/mach-omap2/gpmc.c
+++ b/arch/arm/mach-omap2/gpmc.c
@@ -1342,9 +1342,7 @@ static void __maybe_unused gpmc_read_timings_dt(struct
device_node *np,
#ifdef CONFIG_MTD_NAND
static const char * const nand_ecc_opts[] = {
- [OMAP_ECC_HAMMING_CODE_DEFAULT] = sw,
- [OMAP_ECC_HAMMING_CODE_HW] = hw,
- [OMAP_ECC_HAMMING_CODE_HW_ROMCODE] = hw-romcode,
+ [OMAP_ECC_HAM1_CODE_HW] = ham1,
[OMAP_ECC_BCH4_CODE_HW] = bch4,
[OMAP_ECC_BCH8_CODE_HW] = bch8,
};
diff --git a/drivers/mtd/nand/omap2.c b/drivers/mtd/nand/omap2.c
index 4ecf0e5..8d521aa 100644
--- a/drivers/mtd/nand/omap2.c
+++ b/drivers/mtd/nand/omap2.c
@@ -1993,10 +1993,7 @@ static int omap_nand_probe(struct platform_device *pdev)
}
/* select the ecc type */
- if (pdata-ecc_opt == OMAP_ECC_HAMMING_CODE_DEFAULT)
- info-nand.ecc.mode = NAND_ECC_SOFT;
- else if ((pdata-ecc_opt == OMAP_ECC_HAMMING_CODE_HW) ||
- (pdata-ecc_opt == OMAP_ECC_HAMMING_CODE_HW_ROMCODE)) {
+ if (pdata-ecc_opt == OMAP_ECC_HAM1_CODE_HW) {
info-nand.ecc.bytes= 3;
info-nand.ecc.size = 512;
info-nand.ecc.strength = 1;
@@ -2025,7 +2022,7 @@ static int omap_nand_probe(struct platform_device *pdev)
}
/* rom code layout */
- if (pdata-ecc_opt == OMAP_ECC_HAMMING_CODE_HW_ROMCODE) {
+ if (pdata-ecc_opt == OMAP_ECC_HAM1_CODE_HW) {
if (info-nand.options NAND_BUSWIDTH_16)
offset = 2;
@@ -2033,7 +2030,7 @@ static int omap_nand_probe(struct platform_device *pdev)
offset = 1;
info-nand.badblock_pattern = bb_descrip_flashbased;
}
- omap_oobinfo.eccbytes = 3 * (info-mtd.oobsize/16);
+ omap_oobinfo.eccbytes = 3 * (info-mtd.writesize / 512);
for (i = 0; i omap_oobinfo.eccbytes; i++)
omap_oobinfo.eccpos[i] = i+offset;
diff --git a/include/linux/platform_data/mtd-nand-omap2.h
b/include/linux/platform_data/mtd-nand-omap2.h
[PATCH v9 4/9] mtd: nand: omap: enable auto-detection of bus-width for omap-nand drivers
Autodetection of NAND device bus-width was added in generic NAND driver as
part of following commit
commit 64b37b2a63eb2f80b65c7185f0013f8ffc637ae3
Author: Matthieu CASTET matthieu.cas...@parrot.com
AuthorDate: 2012-11-06
mtd: nand: add NAND_BUSWIDTH_AUTO to autodetect bus width
This patch enables this feature for OMAP2 NAND driver
Signed-off-by: Pekon Gupta pe...@ti.com
---
drivers/mtd/nand/omap2.c | 29 -
1 file changed, 16 insertions(+), 13 deletions(-)
diff --git a/drivers/mtd/nand/omap2.c b/drivers/mtd/nand/omap2.c
index 5596368..57a3f51 100644
--- a/drivers/mtd/nand/omap2.c
+++ b/drivers/mtd/nand/omap2.c
@@ -1856,8 +1856,7 @@ static int omap_nand_probe(struct platform_device *pdev)
mtd-name = dev_name(pdev-dev);
mtd-owner = THIS_MODULE;
nand_chip = info-nand;
- nand_chip-options = pdata-devsize;
- nand_chip-options |= NAND_SKIP_BBTSCAN;
+ nand_chip-options |= NAND_SKIP_BBTSCAN | NAND_BUSWIDTH_AUTO;
#ifdef CONFIG_MTD_NAND_OMAP_BCH
info-of_node = pdata-of_node;
#endif
@@ -1904,6 +1903,21 @@ static int omap_nand_probe(struct platform_device *pdev)
nand_chip-chip_delay = 50;
}
+ /* scan for NAND device connected to chip controller */
+ if (nand_scan_ident(mtd, 1, NULL)) {
+ err = -ENXIO;
+ goto out_release_mem_region;
+ }
+ if ((nand_chip-options NAND_BUSWIDTH_16) !=
+ (pdata-devsize NAND_BUSWIDTH_16)) {
+ pr_err(%s: detected %s device but driver configured for %s\n,
+ DRIVER_NAME,
+ (nand_chip-options NAND_BUSWIDTH_16) ? x16 : x8,
+ (pdata-devsize NAND_BUSWIDTH_16) ? x16 : x8);
+ err = -EINVAL;
+ goto out_release_mem_region;
+ }
+
switch (pdata-xfer_type) {
case NAND_OMAP_PREFETCH_POLLED:
nand_chip-read_buf = omap_read_buf_pref;
@@ -2011,17 +2025,6 @@ static int omap_nand_probe(struct platform_device *pdev)
}
}
- /* DIP switches on some boards change between 8 and 16 bit
-* bus widths for flash. Try the other width if the first try fails.
-*/
- if (nand_scan_ident(mtd, 1, NULL)) {
- nand_chip-options ^= NAND_BUSWIDTH_16;
- if (nand_scan_ident(mtd, 1, NULL)) {
- err = -ENXIO;
- goto out_release_mem_region;
- }
- }
-
/* rom code layout */
if (pdata-ecc_opt == OMAP_ECC_HAM1_CODE_HW) {
--
1.8.1
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[PATCH v9 3/9] mtd: nand: omap: cleanup: replace local references with generic framework names
This patch updates following in omap_nand_probe() and omap_nand_remove()
- replaces info-nand with nand_chip (struct nand_chip *nand_chip)
- replaces info-mtd with mtd (struct mtd_info *mtd)
- white-space and formatting cleanup
Signed-off-by: Pekon Gupta pe...@ti.com
---
drivers/mtd/nand/omap2.c | 112 ---
1 file changed, 57 insertions(+), 55 deletions(-)
diff --git a/drivers/mtd/nand/omap2.c b/drivers/mtd/nand/omap2.c
index 8d521aa..5596368 100644
--- a/drivers/mtd/nand/omap2.c
+++ b/drivers/mtd/nand/omap2.c
@@ -1824,10 +1824,12 @@ static int omap_nand_probe(struct platform_device *pdev)
{
struct omap_nand_info *info;
struct omap_nand_platform_data *pdata;
+ struct mtd_info *mtd;
+ struct nand_chip*nand_chip;
int err;
int i, offset;
- dma_cap_mask_t mask;
- unsigned sig;
+ dma_cap_mask_t mask;
+ unsignedsig;
struct resource *res;
struct mtd_part_parser_data ppdata = {};
@@ -1846,17 +1848,16 @@ static int omap_nand_probe(struct platform_device *pdev)
spin_lock_init(info-controller.lock);
init_waitqueue_head(info-controller.wq);
- info-pdev = pdev;
-
+ info-pdev = pdev;
info-gpmc_cs = pdata-cs;
info-reg = pdata-reg;
-
- info-mtd.priv = info-nand;
- info-mtd.name = dev_name(pdev-dev);
- info-mtd.owner = THIS_MODULE;
-
- info-nand.options = pdata-devsize;
- info-nand.options |= NAND_SKIP_BBTSCAN;
+ mtd = info-mtd;
+ mtd-priv = info-nand;
+ mtd-name = dev_name(pdev-dev);
+ mtd-owner = THIS_MODULE;
+ nand_chip = info-nand;
+ nand_chip-options = pdata-devsize;
+ nand_chip-options |= NAND_SKIP_BBTSCAN;
#ifdef CONFIG_MTD_NAND_OMAP_BCH
info-of_node = pdata-of_node;
#endif
@@ -1877,16 +1878,16 @@ static int omap_nand_probe(struct platform_device *pdev)
goto out_free_info;
}
- info-nand.IO_ADDR_R = ioremap(info-phys_base, info-mem_size);
- if (!info-nand.IO_ADDR_R) {
+ nand_chip-IO_ADDR_R = ioremap(info-phys_base, info-mem_size);
+ if (!nand_chip-IO_ADDR_R) {
err = -ENOMEM;
goto out_release_mem_region;
}
- info-nand.controller = info-controller;
+ nand_chip-controller = info-controller;
- info-nand.IO_ADDR_W = info-nand.IO_ADDR_R;
- info-nand.cmd_ctrl = omap_hwcontrol;
+ nand_chip-IO_ADDR_W = nand_chip-IO_ADDR_R;
+ nand_chip-cmd_ctrl = omap_hwcontrol;
/*
* If RDY/BSY line is connected to OMAP then use the omap ready
@@ -1896,26 +1897,26 @@ static int omap_nand_probe(struct platform_device *pdev)
* device and read status register until you get a failure or success
*/
if (pdata-dev_ready) {
- info-nand.dev_ready = omap_dev_ready;
- info-nand.chip_delay = 0;
+ nand_chip-dev_ready = omap_dev_ready;
+ nand_chip-chip_delay = 0;
} else {
- info-nand.waitfunc = omap_wait;
- info-nand.chip_delay = 50;
+ nand_chip-waitfunc = omap_wait;
+ nand_chip-chip_delay = 50;
}
switch (pdata-xfer_type) {
case NAND_OMAP_PREFETCH_POLLED:
- info-nand.read_buf = omap_read_buf_pref;
- info-nand.write_buf = omap_write_buf_pref;
+ nand_chip-read_buf = omap_read_buf_pref;
+ nand_chip-write_buf = omap_write_buf_pref;
break;
case NAND_OMAP_POLLED:
- if (info-nand.options NAND_BUSWIDTH_16) {
- info-nand.read_buf = omap_read_buf16;
- info-nand.write_buf = omap_write_buf16;
+ if (nand_chip-options NAND_BUSWIDTH_16) {
+ nand_chip-read_buf = omap_read_buf16;
+ nand_chip-write_buf = omap_write_buf16;
} else {
- info-nand.read_buf = omap_read_buf8;
- info-nand.write_buf = omap_write_buf8;
+ nand_chip-read_buf = omap_read_buf8;
+ nand_chip-write_buf = omap_write_buf8;
}
break;
@@ -1944,8 +1945,8 @@ static int omap_nand_probe(struct platform_device *pdev)
err);
goto out_release_mem_region;
}
- info-nand.read_buf = omap_read_buf_dma_pref;
- info-nand.write_buf =
[PATCH v9 2/9] ARM: OMAP2+: cleaned-up DT support of various ECC schemes
OMAP NAND driver support multiple ECC scheme, which can used in different
flavours, depending on in-build Hardware engines present on SoC.
This patch updates following in DT bindings related to sectionion of ecc-schemes
- ti,elm-id: replaces elm_id (maintains backward compatibility)
- ti,nand-ecc-opts: selection of h/w or s/w implementation of an ecc-scheme
depends on ti,elm-id. (supported values ham1, bch4, and bch8)
- maintain backward compatibility to deprecated DT bindings (sw, hw, hw-romcode)
Below table shows different flavours of ecc-schemes supported by OMAP devices
+---+---+---+
| ECC scheme|ECC calculation|Error detection|
+---+---+---+
|OMAP_ECC_HAM1_CODE_HW |H/W (GPMC) |S/W|
+---+---+---+
|OMAP_ECC_BCH8_CODE_HW_DETECTION_SW |H/W (GPMC) |S/W|
|(requires CONFIG_MTD_NAND_ECC_BCH) | | |
+---+---+---+
|OMAP_ECC_BCH8_CODE_HW |H/W (GPMC) |H/W (ELM) |
|(requires CONFIG_MTD_NAND_OMAP_BCH | | |
| ti,elm-id in DT) | | |
+---+---+---+
To optimize footprint of omap2-nand driver, selection of some ECC schemes
also require enabling following Kconfigs, in addition to setting appropriate
DT bindings
- Kconfig:CONFIG_MTD_NAND_ECC_BCHerror detection done in software
- Kconfig:CONFIG_MTD_NAND_OMAP_BCH error detection done by h/w engine
Signed-off-by: Pekon Gupta pe...@ti.com
Reviewed-by: Felipe Balbi ba...@ti.com
Acked-by: Tony Lindgren t...@atomide.com
---
.../devicetree/bindings/mtd/gpmc-nand.txt | 8 +++-
arch/arm/mach-omap2/gpmc.c | 45 --
include/linux/platform_data/mtd-nand-omap2.h | 14 +--
3 files changed, 50 insertions(+), 17 deletions(-)
diff --git a/Documentation/devicetree/bindings/mtd/gpmc-nand.txt
b/Documentation/devicetree/bindings/mtd/gpmc-nand.txt
index 25ee232..5e1f31b 100644
--- a/Documentation/devicetree/bindings/mtd/gpmc-nand.txt
+++ b/Documentation/devicetree/bindings/mtd/gpmc-nand.txt
@@ -36,8 +36,12 @@ Optional properties:
prefetch-dma Prefetch enabled sDMA mode
prefetch-irq Prefetch enabled irq mode
- - elm_id: Specifies elm device node. This is required to support BCH
- error correction using ELM module.
+ - elm_id: deprecated use ti,elm-id instead
+ - ti,elm-id: Specifies phandle of the ELM devicetree node.
+ ELM is an on-chip hardware engine on TI SoC which is used for
+ locating ECC errors for BCHx algorithms. SoC devices which have
+ ELM hardware engines should specify this device node in .dtsi
+ Using ELM for ECC error correction frees some CPU cycles.
For inline partiton table parsing (optional):
diff --git a/arch/arm/mach-omap2/gpmc.c b/arch/arm/mach-omap2/gpmc.c
index c9fb353..9473c9f 100644
--- a/arch/arm/mach-omap2/gpmc.c
+++ b/arch/arm/mach-omap2/gpmc.c
@@ -1341,12 +1341,6 @@ static void __maybe_unused gpmc_read_timings_dt(struct
device_node *np,
#ifdef CONFIG_MTD_NAND
-static const char * const nand_ecc_opts[] = {
- [OMAP_ECC_HAM1_CODE_HW] = ham1,
- [OMAP_ECC_BCH4_CODE_HW] = bch4,
- [OMAP_ECC_BCH8_CODE_HW] = bch8,
-};
-
static const char * const nand_xfer_types[] = {
[NAND_OMAP_PREFETCH_POLLED] = prefetch-polled,
[NAND_OMAP_POLLED] = polled,
@@ -1376,12 +1370,39 @@ static int gpmc_probe_nand_child(struct platform_device
*pdev,
gpmc_nand_data-cs = val;
gpmc_nand_data-of_node = child;
- if (!of_property_read_string(child, ti,nand-ecc-opt, s))
- for (val = 0; val ARRAY_SIZE(nand_ecc_opts); val++)
- if (!strcasecmp(s, nand_ecc_opts[val])) {
- gpmc_nand_data-ecc_opt = val;
- break;
- }
+ /* Detect availability of ELM module */
+ gpmc_nand_data-elm_of_node = of_parse_phandle(child, ti,elm-id, 0);
+ if (gpmc_nand_data-elm_of_node == NULL)
+ gpmc_nand_data-elm_of_node =
+ of_parse_phandle(child, elm_id, 0);
+ if (gpmc_nand_data-elm_of_node == NULL)
+ pr_warn(%s: ti,elm-id property not found\n, __func__);
+
+ /* select NAND ecc-opt */
+ if (of_property_read_string(child, ti,nand-ecc-opt, s)) {
+ pr_err(%s: ti,nand-ecc-opt not found\n, __func__);
+ return -ENODEV;
[PATCH v9 0/9] mtd:nand:omap2: clean-up of supported ECC schemes
*changes v8 - v9* [PATCH 1/9] no update from [PATCH v8 1/6] [PATCH 2/9] only commit log updated from [PATCH v8 2/6] As per feedbacks from Brian Norris computersforpe...@gmail.com previous revision [PATCH v8 3/6] and [PATCH 4/6] are split into following sub-patches: - [PATCH 3/9] new replaces local reference with generic names (mtd, nand_chip) - [PATCH 4/9] new enables auto-detection of bus-width - [PATCH 5/9] new removes omap3_init_bch: populates ecc-scheme data - [PATCH 6/9] new removes omap3_init_bch_tail: populates ecc-layout - [PATCH 7/9] new replaces lib/bch.c with nand_bch.c wrapper [PATCH 8/9] no update same as [PATCH v8 5/6] [PATCH 9/9] removed devm_free_xx functions *Changes v7 - v8* [PATCH 1/6] no updates [PATCH 2/6] - updated DT parsing of ti,nand-ecc-opts so that its ham1 remains compatible to sw,hw,hw-romcode - updated DT parsing of ti,elm-id to retain compatibility to elm_id - using of_parse_phandle() to get ELM device pointer from DT [PATCH 3..6/6] commit log updates *Changes v6 - v7* [PATCH 1/6] NEW split from [PATCH v6 2/4] as per feedbacks from Brian Norris computersforpe...@gmail.com [PATCH 2/6] incorporated feedbacks from DT maintainers [PATCH 3/6] cleaned and incorporated feedbacks from Brian Norris computersforpe...@gmail.com [PATCH 4/6] rebasing changes and cleanup [PATCH 5/6] updated omap3430-sdp.dts [PATCH 6/6] NEW updated for devm_xx *Changes v5 - v6* [PATCH 1/4]: - updated DT binding for gpmc-nand based on 'Olof Johansson's feedbacks http://lists.infradead.org/pipermail/linux-mtd/2013-August/048394.html - detection of ELM device via ti,elm-id DT node, moved to gpmc.c driver [PATCH 2/4] - removed: support for following obselete ECC schemes OMAP_ECC_HAMMING_CODE_DEFAULT (S/W based 1-bit Hamming ECC) OMAP_ECC_HAMMING_CODE_HW_ROMCODE (H/W based 1-bit Hamming ECC scheme) - updated: using omap_oobinfo as chip-ecc.layout for all ecc-schemes - clean: error messages [PATCH 3/4] cleaned to include changes for OMAP_ECC_BCH8_CODE_HW only [PATCH 4/4] updated to include DT property changes *Changes v4 - v5* - Rebased to linux-next IMPORTANT: Need to revert commit fb1585b, [PATCH 2/4] part of previous version http://lists.infradead.org/pipermail/linux-mtd/2013-July/047441.html - Swapped PATCH-1 PATCH-2 to maintain bisectibility compilation dependency http://lists.infradead.org/pipermail/linux-mtd/2013-July/047461.html - PATCH-2: re-ordered call to is_elm_present() for later updates ELM driver - dropped changes in include/linux/platform_data/elm.h (not needed) - PATCH-3: re-ordered call to is_elm_present() for later updates ELM driver - Re-formated patch description (replaced tabs with white-spaces) *Changes v3 - v4* (Resent with CC: devicetree-disc...@lists.ozlabs.org) - [Patch 1/3] removed MTD_NAND_OMAP_BCH8 MTD_NAND_OMAP_BCH4 from nand/Kconfig ECC scheme selectable via nand DT (nand-ecc-opt). - [*] rebased for l2-mtd.git *Changes v2 - v3* (Resent with Author Name fixed) - PATCH-1: re-arranged code to remove redundancy, added NAND_BUSWIDTH_AUTO - PATCH-2: updated nand-ecc-opt DT mapping and Documentation - PATCH-3: code-cleaning + changes to match PATCH-1 - PATCH-4 DROPPED update DT attribute for ti,nand-ecc-opt - received feedback to keep DT mapping independent of linuxism - PATCH-4:NEW : ARM: dts: AM33xx: updated default ECC scheme in nand-ecc-opt - independent patch for AM335x-evm.dts update based on PATCH-2 *Changes v1 - v2* added [PATCH 3/4] and [PATCH 4/4] After this patch series, omap2-nand driver will supports following ECC schemes: +---+---+---+ | ECC scheme|ECC calculation|Error detection| +---+---+---+ |OMAP_ECC_HAM1_CODE_HW |H/W (GPMC) |S/W| +---+---+---+ |OMAP_ECC_BCH4_CODE_HW_DETECTION_SW |H/W (GPMC) |S/W (lib/bch.c)| | (needs CONFIG_MTD_NAND_ECC_BCH) | | | | | | | |OMAP_ECC_BCH4_CODE_HW |H/W (GPMC) |H/W (ELM) | | (needs CONFIG_MTD_NAND_OMAP_BCH | | | |ti,elm-id) | | | +---+---+---+ |OMAP_ECC_BCH8_CODE_HW_DETECTION_SW |H/W (GPMC) |S/W (lib/bch.c)| | (needs CONFIG_MTD_NAND_ECC_BCH) | | | | | | | |OMAP_ECC_BCH8_CODE_HW |H/W (GPMC) |H/W (ELM) | | (needs CONFIG_MTD_NAND_OMAP_BCH | | | |ti,elm-id)
[PATCH v2 2/2] ARM: dts: omap5: Add dr_mode for dwc3
From: George Cherian george.cher...@ti.com Added dr_mode property in dwc3 and set its default mode to device. Currently dwc3 driver doesn't have support for OTG mode. So explicitly setting to peripheral even dwc3 is a OTG controller since OMAP5 has already got an EHCI host. Signed-off-by: George Cherian george.cher...@ti.com Signed-off-by: Kishon Vijay Abraham I kis...@ti.com --- Changes from v1: Changed the commit log to explain why dr_mode was not set to OTG. arch/arm/boot/dts/omap5.dtsi |1 + 1 file changed, 1 insertion(+) diff --git a/arch/arm/boot/dts/omap5.dtsi b/arch/arm/boot/dts/omap5.dtsi index 6d0a1d5..ef598af 100644 --- a/arch/arm/boot/dts/omap5.dtsi +++ b/arch/arm/boot/dts/omap5.dtsi @@ -652,6 +652,7 @@ reg = 0x4a03 0x1; interrupts = GIC_SPI 92 IRQ_TYPE_LEVEL_HIGH; usb-phy = usb2_phy, usb3_phy; + dr_mode = peripheral; tx-fifo-resize; }; }; -- 1.7.10.4 -- To unsubscribe from this list: send the line unsubscribe linux-omap in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
[PATCH v9 8/9] ARM: dts: AM33xx: updated default ECC scheme in nand-ecc-opt
Updated DTS to replace deprecated binding with newer values
Refer: Documentation/devicetree/bindings/mtd/gpmc-nand.txt
Signed-off-by: Pekon Gupta pe...@ti.com
Reviewed-by: Felipe Balbi ba...@ti.com
---
arch/arm/boot/dts/am335x-evm.dts | 3 +--
arch/arm/boot/dts/omap3430-sdp.dts | 2 +-
2 files changed, 2 insertions(+), 3 deletions(-)
diff --git a/arch/arm/boot/dts/am335x-evm.dts b/arch/arm/boot/dts/am335x-evm.dts
index e8ec875..1aee6ac 100644
--- a/arch/arm/boot/dts/am335x-evm.dts
+++ b/arch/arm/boot/dts/am335x-evm.dts
@@ -269,7 +269,6 @@
reg = 0 0 0; /* CS0, offset 0 */
nand-bus-width = 8;
ti,nand-ecc-opt = bch8;
- gpmc,device-nand = true;
gpmc,device-width = 1;
gpmc,sync-clk-ps = 0;
gpmc,cs-on-ns = 0;
@@ -296,7 +295,7 @@
#address-cells = 1;
#size-cells = 1;
- elm_id = elm;
+ ti,elm-id = elm;
/* MTD partition table */
partition@0 {
diff --git a/arch/arm/boot/dts/omap3430-sdp.dts
b/arch/arm/boot/dts/omap3430-sdp.dts
index e2249bc..501f863 100644
--- a/arch/arm/boot/dts/omap3430-sdp.dts
+++ b/arch/arm/boot/dts/omap3430-sdp.dts
@@ -105,7 +105,7 @@
reg = 1 0 0x0800;
nand-bus-width = 8;
- ti,nand-ecc-opt = sw;
+ ti,nand-ecc-opt = ham1;
gpmc,cs-on-ns = 0;
gpmc,cs-rd-off-ns = 36;
gpmc,cs-wr-off-ns = 36;
--
1.8.1
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[PATCH v9 6/9] mtd: nand: omap: clean-up ecc layout for BCH ecc schemes
In current implementation omap3_init_bch_tail() is a common function to
define ecc layout for different BCHx ecc schemes.This patch:
(1) removes omap3_init_bch_tail() and defines ecc layout for individual
ecc-schemes along with populating their nand_chip-ecc data in
omap_nand_probe(). This improves the readability and scalability of
code for add new ecc schemes in future.
(2) removes 'struct nand_bbt_descr bb_descrip_flashbased' because default
nand_bbt_descr in nand_bbt.c matches the same (.len=1 for x8 devices).
(3) add the check to see if NAND device has enough OOB/Spare bytes to
store ECC signature of whole page, as defined by ecc-scheme.
Signed-off-by: Pekon Gupta pe...@ti.com
---
drivers/mtd/nand/omap2.c | 162 ++-
1 file changed, 63 insertions(+), 99 deletions(-)
diff --git a/drivers/mtd/nand/omap2.c b/drivers/mtd/nand/omap2.c
index 09ce85c..5f6e621 100644
--- a/drivers/mtd/nand/omap2.c
+++ b/drivers/mtd/nand/omap2.c
@@ -139,6 +139,7 @@
#define BCH_ECC_SIZE0 0x0 /* ecc_size0 = 0, no oob protection */
#define BCH_ECC_SIZE1 0x20/* ecc_size1 = 32 */
+#define BADBLOCK_MARKER_LENGTH 2
#define OMAP_ECC_BCH8_POLYNOMIAL 0x201b
#ifdef CONFIG_MTD_NAND_OMAP_BCH
@@ -149,17 +150,6 @@ static u_char bch4_vector[] = {0x00, 0x6b, 0x31, 0xdd,
0x41, 0xbc, 0x10};
/* oob info generated runtime depending on ecc algorithm and layout selected */
static struct nand_ecclayout omap_oobinfo;
-/* Define some generic bad / good block scan pattern which are used
- * while scanning a device for factory marked good / bad blocks
- */
-static uint8_t scan_ff_pattern[] = { 0xff };
-static struct nand_bbt_descr bb_descrip_flashbased = {
- .options = NAND_BBT_SCANALLPAGES,
- .offs = 0,
- .len = 1,
- .pattern = scan_ff_pattern,
-};
-
struct omap_nand_info {
struct nand_hw_control controller;
@@ -184,7 +174,6 @@ struct omap_nand_info {
struct gpmc_nand_regs reg;
/* fields specific for BCHx_HW ECC scheme */
struct bch_control *bch;
- struct nand_ecclayout ecclayout;
boolis_elm_used;
struct device *elm_dev;
struct device_node *of_node;
@@ -1686,65 +1675,8 @@ static void omap3_free_bch(struct mtd_info *mtd)
}
}
-/**
- * omap3_init_bch_tail - Build an oob layout for BCH ECC correction.
- * @mtd: MTD device structure
- */
-static int omap3_init_bch_tail(struct mtd_info *mtd)
-{
- int i, steps, offset;
- struct omap_nand_info *info = container_of(mtd, struct omap_nand_info,
- mtd);
- struct nand_ecclayout *layout = info-ecclayout;
-
- /* build oob layout */
- steps = mtd-writesize/info-nand.ecc.size;
- layout-eccbytes = steps*info-nand.ecc.bytes;
-
- /* do not bother creating special oob layouts for small page devices */
- if (mtd-oobsize 64) {
- pr_err(BCH ecc is not supported on small page devices\n);
- goto fail;
- }
-
- /* reserve 2 bytes for bad block marker */
- if (layout-eccbytes+2 mtd-oobsize) {
- pr_err(no oob layout available for oobsize %d eccbytes %u\n,
- mtd-oobsize, layout-eccbytes);
- goto fail;
- }
-
- /* ECC layout compatible with RBL for BCH8 */
- if (info-is_elm_used (info-nand.ecc.bytes == BCH8_SIZE))
- offset = 2;
- else
- offset = mtd-oobsize - layout-eccbytes;
-
- /* put ecc bytes at oob tail */
- for (i = 0; i layout-eccbytes; i++)
- layout-eccpos[i] = offset + i;
-
- if (info-is_elm_used (info-nand.ecc.bytes == BCH8_SIZE))
- layout-oobfree[0].offset = 2 + layout-eccbytes * steps;
- else
- layout-oobfree[0].offset = 2;
-
- layout-oobfree[0].length = mtd-oobsize-2-layout-eccbytes;
- info-nand.ecc.layout = layout;
-
- if (!(info-nand.options NAND_BUSWIDTH_16))
- info-nand.badblock_pattern = bb_descrip_flashbased;
- return 0;
-fail:
- omap3_free_bch(mtd);
- return -1;
-}
-
#else
-static int omap3_init_bch_tail(struct mtd_info *mtd)
-{
- return -1;
-}
+
static void omap3_free_bch(struct mtd_info *mtd)
{
}
@@ -1756,8 +1688,9 @@ static int omap_nand_probe(struct platform_device *pdev)
struct omap_nand_platform_data *pdata;
struct mtd_info *mtd;
struct nand_chip*nand_chip;
+ struct nand_ecclayout *ecclayout;
int err;
- int i, offset;
+ int i;
dma_cap_mask_t mask;
unsignedsig;
struct resource
[PATCH v9 5/9] mtd:nand:omap2: clean-up BCHx_HW and BCHx_SW ECC configurations in device_probe
current implementation in omap3_init_bch() has some redundant code like:
(1) omap3_init_bch() re-probes the DT-binding to detect presence of ELM h/w
engine on SoC. And based on that it selects implemetation of ecc-scheme.
However, this is already done as part of GPMC DT parsing.
(2) As omap3_init_bch() serves as common function for configuring all types of
BCHx ecc-schemes, so there are multiple levels of redudant if..then..else
checks while populating nand_chip-ecc.
This patch make following changes to OMAP NAND driver:
(1) removes omap3_init_bch(): each ecc-scheme is individually configured in
omap_nand_probe() there by removing redundant if..then..else checks.
(2) adds is_elm_present(): re-probing of ELM device via DT is not required as
it's done in GPMC driver probe. Thus is_elm_present() just initializes ELM
driver with NAND probe data, when ecc-scheme with h/w based error-detection
is used.
(3) separates out configuration of different flavours of BCH4 and BCH8
ecc-schemes as given in below table
(4) conditionally compiles callbacks implementations of ecc.hwctl(),
ecc.calculate(), ecc.correct() to avoid warning of un-used functions.
+---+---+---+
| ECC scheme|ECC calculation|Error detection|
+---+---+---+
|OMAP_ECC_HAM1_CODE_HW |H/W (GPMC) |S/W|
+---+---+---+
|OMAP_ECC_BCH4_CODE_HW_DETECTION_SW |H/W (GPMC) |S/W (lib/bch.c)|
| (needs CONFIG_MTD_NAND_ECC_BCH) | | |
| | | |
|OMAP_ECC_BCH4_CODE_HW |H/W (GPMC) |H/W (ELM) |
| (needs CONFIG_MTD_NAND_OMAP_BCH | | |
|ti,elm-id) | | |
+---+---+---+
|OMAP_ECC_BCH8_CODE_HW_DETECTION_SW |H/W (GPMC) |S/W (lib/bch.c)|
| (needs CONFIG_MTD_NAND_ECC_BCH) | | |
| | | |
|OMAP_ECC_BCH8_CODE_HW |H/W (GPMC) |H/W (ELM) |
| (needs CONFIG_MTD_NAND_OMAP_BCH | | |
|ti,elm-id) | | |
+---+---+---+
- 'CONFIG_MTD_NAND_ECC_BCH' is generic KConfig required to build lib/bch.c
which is required for ECC error detection done in software.
(mainly used for legacy platforms which do not have on-chip ELM engine)
- 'CONFIG_MTD_NAND_OMAP_BCH' is OMAP specific Kconfig to detemine presence
on ELM h/w engine on SoC.
Signed-off-by: Pekon Gupta pe...@ti.com
---
drivers/mtd/nand/omap2.c | 281 ++-
1 file changed, 158 insertions(+), 123 deletions(-)
diff --git a/drivers/mtd/nand/omap2.c b/drivers/mtd/nand/omap2.c
index 57a3f51..09ce85c 100644
--- a/drivers/mtd/nand/omap2.c
+++ b/drivers/mtd/nand/omap2.c
@@ -25,10 +25,8 @@
#include linux/of.h
#include linux/of_device.h
-#ifdef CONFIG_MTD_NAND_OMAP_BCH
#include linux/bch.h
#include linux/platform_data/elm.h
-#endif
#include linux/platform_data/mtd-nand-omap2.h
@@ -141,6 +139,8 @@
#define BCH_ECC_SIZE0 0x0 /* ecc_size0 = 0, no oob protection */
#define BCH_ECC_SIZE1 0x20/* ecc_size1 = 32 */
+#define OMAP_ECC_BCH8_POLYNOMIAL 0x201b
+
#ifdef CONFIG_MTD_NAND_OMAP_BCH
static u_char bch8_vector[] = {0xf3, 0xdb, 0x14, 0x16, 0x8b, 0xd2, 0xbe, 0xcc,
0xac, 0x6b, 0xff, 0x99, 0x7b};
@@ -182,14 +182,12 @@ struct omap_nand_info {
u_char *buf;
int buf_len;
struct gpmc_nand_regs reg;
-
-#ifdef CONFIG_MTD_NAND_OMAP_BCH
+ /* fields specific for BCHx_HW ECC scheme */
struct bch_control *bch;
struct nand_ecclayout ecclayout;
boolis_elm_used;
struct device *elm_dev;
struct device_node *of_node;
-#endif
};
/**
@@ -1058,8 +1056,7 @@ static int omap_dev_ready(struct mtd_info *mtd)
}
}
-#ifdef CONFIG_MTD_NAND_OMAP_BCH
-
+#if defined(CONFIG_MTD_NAND_ECC_BCH) || defined(CONFIG_MTD_NAND_OMAP_BCH)
/**
* omap3_enable_hwecc_bch - Program OMAP3 GPMC to perform BCH ECC correction
* @mtd: MTD device structure
@@ -1140,7 +1137,9 @@ static void omap3_enable_hwecc_bch(struct mtd_info *mtd,
int mode)
/* Clear ecc and enable bits */
writel(ECCCLEAR | ECC1, info-reg.gpmc_ecc_control);
}
+#endif
+#ifdef CONFIG_MTD_NAND_ECC_BCH
/**
* omap3_calculate_ecc_bch4 - Generate 7 bytes of ECC
[PATCH v9 9/9] mtd: nand: omap: updated devm_xx for all resource allocation and free calls
Managed Device Resource or devm_xx calls takes care of automatic freeing
of the resource in case of:
- failure during driver probe
- failure during resource allocation
- detaching or unloading of driver module (rmmod)
Reference: Documentation/driver-model/devres.txt
Though OMAP NAND driver handles freeing of resource allocation in most of
the cases, but using devm_xx provides more clean and effortless approach
to handle all such cases.
Signed-off-by: Pekon Gupta pe...@ti.com
---
drivers/mtd/nand/omap2.c | 44 ++--
1 file changed, 14 insertions(+), 30 deletions(-)
diff --git a/drivers/mtd/nand/omap2.c b/drivers/mtd/nand/omap2.c
index 769ff65..0ed0d6f 100644
--- a/drivers/mtd/nand/omap2.c
+++ b/drivers/mtd/nand/omap2.c
@@ -1642,7 +1642,8 @@ static int omap_nand_probe(struct platform_device *pdev)
return -ENODEV;
}
- info = kzalloc(sizeof(struct omap_nand_info), GFP_KERNEL);
+ info = devm_kzalloc(pdev-dev, sizeof(struct omap_nand_info),
+ GFP_KERNEL);
if (!info)
return -ENOMEM;
@@ -1667,19 +1668,20 @@ static int omap_nand_probe(struct platform_device *pdev)
if (res == NULL) {
err = -EINVAL;
dev_err(pdev-dev, error getting memory resource\n);
- goto out_free_info;
+ goto out_release_mem_region;
}
info-phys_base = res-start;
info-mem_size = resource_size(res);
- if (!request_mem_region(info-phys_base, info-mem_size,
- pdev-dev.driver-name)) {
+ if (!devm_request_mem_region(pdev-dev, info-phys_base,
+ info-mem_size, pdev-dev.driver-name)) {
err = -EBUSY;
- goto out_free_info;
+ goto out_release_mem_region;
}
- nand_chip-IO_ADDR_R = ioremap(info-phys_base, info-mem_size);
+ nand_chip-IO_ADDR_R = devm_ioremap(pdev-dev, info-phys_base,
+ info-mem_size);
if (!nand_chip-IO_ADDR_R) {
err = -ENOMEM;
goto out_release_mem_region;
@@ -1781,8 +1783,9 @@ static int omap_nand_probe(struct platform_device *pdev)
err = -ENODEV;
goto out_release_mem_region;
}
- err = request_irq(info-gpmc_irq_fifo, omap_nand_irq,
- IRQF_SHARED, gpmc-nand-fifo, info);
+ err = devm_request_irq(pdev-dev, info-gpmc_irq_fifo,
+ omap_nand_irq, IRQF_SHARED,
+ gpmc-nand-fifo, info);
if (err) {
dev_err(pdev-dev, requesting irq(%d) error:%d,
info-gpmc_irq_fifo, err);
@@ -1796,8 +1799,9 @@ static int omap_nand_probe(struct platform_device *pdev)
err = -ENODEV;
goto out_release_mem_region;
}
- err = request_irq(info-gpmc_irq_count, omap_nand_irq,
- IRQF_SHARED, gpmc-nand-count, info);
+ err = devm_request_irq(pdev-dev, info-gpmc_irq_count,
+ omap_nand_irq, IRQF_SHARED,
+ gpmc-nand-count, info);
if (err) {
dev_err(pdev-dev, requesting irq(%d) error:%d,
info-gpmc_irq_count, err);
@@ -2010,45 +2014,25 @@ static int omap_nand_probe(struct platform_device *pdev)
out_release_mem_region:
if (info-dma)
dma_release_channel(info-dma);
- if (info-gpmc_irq_count 0)
- free_irq(info-gpmc_irq_count, info);
- if (info-gpmc_irq_fifo 0)
- free_irq(info-gpmc_irq_fifo, info);
- release_mem_region(info-phys_base, info-mem_size);
-out_free_info:
if (info-nand.ecc.priv) {
nand_bch_free(info-nand.ecc.priv);
info-nand.ecc.priv = NULL;
}
- kfree(info);
-
return err;
}
static int omap_nand_remove(struct platform_device *pdev)
{
struct mtd_info *mtd = platform_get_drvdata(pdev);
- struct nand_chip *nand_chip = mtd-priv;
struct omap_nand_info *info = container_of(mtd, struct omap_nand_info,
mtd);
if (info-nand.ecc.priv) {
nand_bch_free(info-nand.ecc.priv);
info-nand.ecc.priv = NULL;
}
-
if (info-dma)
dma_release_channel(info-dma);
-
- if (info-gpmc_irq_count 0)
- free_irq(info-gpmc_irq_count, info);
- if (info-gpmc_irq_fifo 0)
- free_irq(info-gpmc_irq_fifo, info);
-
- /* Release NAND device, its internal structures and
[PATCH v9 7/9] mtd: nand: omap: use drivers/mtd/nand/nand_bch.c wrapper for BCH ECC instead of lib/bch.c
generic frame-work in mtd/nand/nand_bch.c is a wrapper above lib/bch.h which
encapsulates all control information specific to BCH ecc algorithm in software.
Thus this patch:
(1) replace omap specific implementations with equivalent wrapper in nand_bch.c
so that more generic code is re-used. like;
omap3_correct_data_bch() - nand_bch_correct_data()
omap3_free_bch() - nand_bch_free()
(2) replace direct calls to lib/bch.c with wrapper functions defined in
nand_bch.c
init_bch() - nand_bch_init()
(3) removes selection between BCH8 and BCH4 h/w ecc-schemes via KConfig.
This selection is now based on ti,nand-ecc-opt and ti,elm-id DT bindings.
Signed-off-by: Pekon Gupta pe...@ti.com
---
drivers/mtd/nand/Kconfig | 30 ++-
drivers/mtd/nand/omap2.c | 96 +++-
2 files changed, 26 insertions(+), 100 deletions(-)
diff --git a/drivers/mtd/nand/Kconfig b/drivers/mtd/nand/Kconfig
index d885298..5836039 100644
--- a/drivers/mtd/nand/Kconfig
+++ b/drivers/mtd/nand/Kconfig
@@ -96,35 +96,13 @@ config MTD_NAND_OMAP2
config MTD_NAND_OMAP_BCH
depends on MTD_NAND MTD_NAND_OMAP2 ARCH_OMAP3
- tristate Enable support for hardware BCH error correction
+ tristate Support hardware based BCH error correction
default n
select BCH
- select BCH_CONST_PARAMS
help
-Support for hardware BCH error correction.
-
-choice
- prompt BCH error correction capability
- depends on MTD_NAND_OMAP_BCH
-
-config MTD_NAND_OMAP_BCH8
- bool 8 bits / 512 bytes (recommended)
- help
-Support correcting up to 8 bitflips per 512-byte block.
-This will use 13 bytes of spare area per 512 bytes of page data.
-This is the recommended mode, as 4-bit mode does not work
-on some OMAP3 revisions, due to a hardware bug.
-
-config MTD_NAND_OMAP_BCH4
- bool 4 bits / 512 bytes
- help
-Support correcting up to 4 bitflips per 512-byte block.
-This will use 7 bytes of spare area per 512 bytes of page data.
-Note that this mode does not work on some OMAP3 revisions, due to a
-hardware bug. Please check your OMAP datasheet before selecting this
-mode.
-
-endchoice
+ Some devices have built-in ELM hardware engine, which can be used to
+ locate and correct errors when using BCH ECC scheme. This enables the
+ driver support for same.
if MTD_NAND_OMAP_BCH
config BCH_CONST_M
diff --git a/drivers/mtd/nand/omap2.c b/drivers/mtd/nand/omap2.c
index 5f6e621..769ff65 100644
--- a/drivers/mtd/nand/omap2.c
+++ b/drivers/mtd/nand/omap2.c
@@ -25,7 +25,7 @@
#include linux/of.h
#include linux/of_device.h
-#include linux/bch.h
+#include linux/mtd/nand_bch.h
#include linux/platform_data/elm.h
#include linux/platform_data/mtd-nand-omap2.h
@@ -140,7 +140,6 @@
#define BCH_ECC_SIZE1 0x20/* ecc_size1 = 32 */
#define BADBLOCK_MARKER_LENGTH 2
-#define OMAP_ECC_BCH8_POLYNOMIAL 0x201b
#ifdef CONFIG_MTD_NAND_OMAP_BCH
static u_char bch8_vector[] = {0xf3, 0xdb, 0x14, 0x16, 0x8b, 0xd2, 0xbe, 0xcc,
@@ -173,7 +172,6 @@ struct omap_nand_info {
int buf_len;
struct gpmc_nand_regs reg;
/* fields specific for BCHx_HW ECC scheme */
- struct bch_control *bch;
boolis_elm_used;
struct device *elm_dev;
struct device_node *of_node;
@@ -1507,43 +1505,7 @@ static int omap_elm_correct_data(struct mtd_info *mtd,
u_char *data,
return stat;
}
-#endif /* CONFIG_MTD_NAND_OMAP_BCH */
-#ifdef CONFIG_MTD_NAND_ECC_BCH
-/**
- * omap3_correct_data_bch - Decode received data and correct errors
- * @mtd: MTD device structure
- * @data: page data
- * @read_ecc: ecc read from nand flash
- * @calc_ecc: ecc read from HW ECC registers
- */
-static int omap3_correct_data_bch(struct mtd_info *mtd, u_char *data,
- u_char *read_ecc, u_char *calc_ecc)
-{
- int i, count;
- /* cannot correct more than 8 errors */
- unsigned int errloc[8];
- struct omap_nand_info *info = container_of(mtd, struct omap_nand_info,
- mtd);
-
- count = decode_bch(info-bch, NULL, 512, read_ecc, calc_ecc, NULL,
- errloc);
- if (count 0) {
- /* correct errors */
- for (i = 0; i count; i++) {
- /* correct data only, not ecc bytes */
- if (errloc[i] 8*512)
- data[errloc[i]/8] ^= 1 (errloc[i] 7);
- pr_debug(corrected bitflip %u\n, errloc[i]);
- }
- } else if (count 0) {
- pr_err(ecc unrecoverable error\n);
- }
- return count;
-}
-#endif /*
