Re: [PATCH 0/3] nand: Renaming, moving and fixing NAND and ELM drivers

2014-09-15 Thread Roger Quadros
On 09/12/2014 07:46 PM, Ezequiel Garcia wrote:
 On 12 September 2014 09:54, Roger Quadros rog...@ti.com wrote:
 Hi Ezequiel,

 On 09/11/2014 04:47 PM, Ezequiel Garcia wrote:
 Following the recent discussion with Roger, here's a few patches that
 (hopefully) fix all the issues.

 The first patches rename the OMAP NAND drivers, so they are now called
 omap2_nand and omap_elm.

 The last patch picks an idea from Yann E. Morin and fixes the build issue
 reported by Roger. Quoting Roger:

 
 I still get the following error if I set CONFIG_MTD_NAND_OMAP2 to y and
 CONFIG_MTD_NAND_OMAP_BCH to m.

 CONFIG_MTD_NAND_OMAP_BCH is used to select the ELM driver and it must be 
 limited to
 be built-in if CONFIG_MTD_NAND_OMAP2 is built-in.

 Maybe it should be a sub option of CONFIG_MTD_NAND_OMAP2.
 IMHO the elm.c file must be moved from mtd/devices to mtd/nand and renamed 
 to omap_elm.c

 drivers/built-in.o: In function `omap_nand_probe':
 /work/linux-2.6/drivers/mtd/nand/omap2.c:2010: undefined reference to 
 `elm_config'
 /work/linux-2.6/drivers/mtd/nand/omap2.c:1980: undefined reference to 
 `elm_config'
 /work/linux-2.6/drivers/mtd/nand/omap2.c:1927: undefined reference to 
 `elm_config'
 drivers/built-in.o: In function `omap_elm_correct_data':
 /work/linux-2.6/drivers/mtd/nand/omap2.c:1444: undefined reference to 
 `elm_decode_bch_error_page'
 make: *** [vmlinux] Error 1
 

 [1] https://lkml.org/lkml/2013/5/4/84

 Ezequiel Garcia (3):
   mtd: nand: Move ELM driver and rename as omap_elm
   mtd: nand: Rename OMAP NAND driver
   mtd: nand: Force omap_elm to be built as a module if omap2_nand is a
 module

 Thanks for the patches. I see a lot of errors reported by checkpatch.pl 
 which need fixing.

 
 You mean on these patches or across the file?
 
Just in these patches.

cheers,
-roger
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Re: [PATCH 3/3] mtd: nand: Force omap_elm to be built as a module if omap2_nand is a module

2014-09-15 Thread Roger Quadros
On 09/12/2014 07:56 PM, Ezequiel Garcia wrote:
 On 12 Sep 12:01 PM, Roger Quadros wrote:
 On 09/11/2014 04:47 PM, Ezequiel Garcia wrote:
 This commit adds a hidden option to build the omap_elm as a module, if
 omap2_nand is a module (and similarly in the built-in case).

 This fixes the following build error when omap2_nand is chosen built-in,
 and omap_elm is chosen as a module:

 drivers/built-in.o: In function `omap_nand_probe':
 /work/linux-2.6/drivers/mtd/nand/omap2.c:2010: undefined reference to 
 `elm_config'
 /work/linux-2.6/drivers/mtd/nand/omap2.c:1980: undefined reference to 
 `elm_config'
 /work/linux-2.6/drivers/mtd/nand/omap2.c:1927: undefined reference to 
 `elm_config'
 drivers/built-in.o: In function `omap_elm_correct_data':
 /work/linux-2.6/drivers/mtd/nand/omap2.c:1444: undefined reference to 
 `elm_decode_bch_error_page'

 Signed-off-by: Ezequiel Garcia ezequ...@vanguardiasur.com.ar
 ---
  drivers/mtd/nand/Kconfig  | 8 +++-
  drivers/mtd/nand/Makefile | 2 +-
  2 files changed, 8 insertions(+), 2 deletions(-)

 diff --git a/drivers/mtd/nand/Kconfig b/drivers/mtd/nand/Kconfig
 index f1cf503..12e8ee8 100644
 --- a/drivers/mtd/nand/Kconfig
 +++ b/drivers/mtd/nand/Kconfig
 @@ -96,7 +96,7 @@ config MTD_NAND_OMAP2
  
  config MTD_NAND_OMAP_BCH
 depends on MTD_NAND_OMAP2
 -   tristate Support hardware based BCH error correction
 +   bool Support hardware based BCH error correction
 default n
 select BCH
 help
 @@ -106,6 +106,12 @@ config MTD_NAND_OMAP_BCH
   legacy OMAP families like OMAP2xxx, OMAP3xxx do not have ELM engine
   so they should not enable this config symbol.
  
 +config MTD_NAND_OMAP_BCH_BUILD
 +   tristate
 +   depends on MTD_NAND_OMAP2
 +   default m if MTD_NAND_OMAP2=m  MTD_NAND_OMAP_BCH
 +   default y if MTD_NAND_OMAP2=y  MTD_NAND_OMAP_BCH
 +
  config MTD_NAND_IDS
 tristate
  
 diff --git a/drivers/mtd/nand/Makefile b/drivers/mtd/nand/Makefile
 index 4bcdeb0..3580188 100644
 --- a/drivers/mtd/nand/Makefile
 +++ b/drivers/mtd/nand/Makefile
 @@ -27,7 +27,7 @@ obj-$(CONFIG_MTD_NAND_NDFC)   += ndfc.o
  obj-$(CONFIG_MTD_NAND_ATMEL)   += atmel_nand.o
  obj-$(CONFIG_MTD_NAND_GPIO)+= gpio.o
  obj-$(CONFIG_MTD_NAND_OMAP2)   += omap2_nand.o
 -obj-$(CONFIG_MTD_NAND_OMAP_BCH)+= omap_elm.o
 +obj-$(CONFIG_MTD_NAND_OMAP_BCH_BUILD)  += omap_elm.o
  obj-$(CONFIG_MTD_NAND_CM_X270) += cmx270_nand.o
  obj-$(CONFIG_MTD_NAND_PXA3xx)  += pxa3xx_nand.o
  obj-$(CONFIG_MTD_NAND_TMIO)+= tmio_nand.o


 The overall logic seems to work but I still see the following issue.

 In menuconfig, the OMAP_BCH option is still visible as a boolean even though
 the ELM module finally gets built as a module.
 This can be confusing to the user and I'd avoid that behaviour.

 
 Yes, I know. But it's either this solution or no solution at all, I think.
 
 Let me give some further context about this patch, so we can have more
 information to decide.
 
 First of all (and IMO) the user doesn't have to know about the ELM being
 a module or not, because modprobe will load it (since omap2_nand depends
 on omap_elm's symbols).
 
 So, the new way seems a bit more intuitive for me. The user choses if he
 wants to have hardware BCH support, and such support gets built the right
 way.
 
 If we still consider this highly confusing, and we want to avoid it,
 then it seems we can only make omap_elm a boolean, which means it'll always
 be built-in. I crafted this patch in an effort to avoid making it boolean.
 
 Finally, the solution is taken from media/usb/stk1160. For good or for bad,
 we have a precedent in doing things this way.
 
 Ultimately, I don't care much as I don't think anyone will build it as a 
 module,
 except maybe for testing the driver under probe/remove cycles.
 
OK. I personally prefer boolean than the Kconfig magic as it makes my life a bit
easier and less confusing to the user i.e. wysiwyg ;).

Let's see what the MTD maintainers prefer.
Brian and David, any insights on this problem?

cheers,
-roger
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Re: [PATCH v4 5/7] ARM: EXYNOS: Add .write_sec outer cache callback for L2C-310

2014-09-15 Thread Russell King - ARM Linux
On Tue, Aug 26, 2014 at 04:17:58PM +0200, Tomasz Figa wrote:
 Exynos4 SoCs equipped with an L2C-310 cache controller and running under
 secure firmware require certain registers of aforementioned IP to be
 accessed only from secure mode. This means that SMC calls are required
 for certain register writes. To handle this, an implementation of
 .write_sec and .configure callbacks is provided by this patch.
 
 Signed-off-by: Tomasz Figa t.f...@samsung.com
 ---
  arch/arm/mach-exynos/firmware.c | 38 ++
  1 file changed, 38 insertions(+)
 
 diff --git a/arch/arm/mach-exynos/firmware.c b/arch/arm/mach-exynos/firmware.c
 index f5e626d..554b350 100644
 --- a/arch/arm/mach-exynos/firmware.c
 +++ b/arch/arm/mach-exynos/firmware.c
 @@ -17,6 +17,7 @@
  #include asm/cacheflush.h
  #include asm/cputype.h
  #include asm/firmware.h
 +#include asm/hardware/cache-l2x0.h
  #include asm/suspend.h
  
  #include mach/map.h
 @@ -120,6 +121,31 @@ static const struct firmware_ops exynos_firmware_ops = {
   .resume = exynos_resume,
  };
  
 +static void exynos_l2_write_sec(unsigned long val, unsigned reg)
 +{
 + switch (reg) {
 + case L2X0_CTRL:
 + if (val  L2X0_CTRL_EN)
 + exynos_smc(SMC_CMD_L2X0INVALL, 0, 0, 0);

If we're calling this with the cache already enabled, presumably you're
doing this to cover the case where we're disabling the cache.

1. Do you really want to *invalidate* the L2 cache, discarding its
   contents?
2. Don't you think that... if you needed something like this here, then
   it could be a defficiency in the common code?

If (2) doesn't apply, then should be a comment here why this is needed.

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Re: [PATCH v4 6/7] ARM: EXYNOS: Add support for non-secure L2X0 resume

2014-09-15 Thread Russell King - ARM Linux
On Tue, Aug 26, 2014 at 04:17:59PM +0200, Tomasz Figa wrote:
 On Exynos SoCs it is necessary to resume operation of L2C early in
 assembly code, because otherwise certain systems will crash. This patch
 adds necessary code to non-secure resume handler.
 
 Signed-off-by: Tomasz Figa t.f...@samsung.com
 ---
  arch/arm/mach-exynos/common.h   |  1 +
  arch/arm/mach-exynos/firmware.c |  4 +++-
  arch/arm/mach-exynos/sleep.S| 41 
 +
  3 files changed, 45 insertions(+), 1 deletion(-)
 
 diff --git a/arch/arm/mach-exynos/common.h b/arch/arm/mach-exynos/common.h
 index c218200..e88c0f9 100644
 --- a/arch/arm/mach-exynos/common.h
 +++ b/arch/arm/mach-exynos/common.h
 @@ -113,6 +113,7 @@ IS_SAMSUNG_CPU(exynos5800, EXYNOS5800_SOC_ID, 
 EXYNOS5_SOC_MASK)
  
  extern u32 cp15_save_diag;
  extern u32 cp15_save_power;
 +extern unsigned long l2x0_regs_phys;
  
  extern void __iomem *sysram_ns_base_addr;
  extern void __iomem *sysram_base_addr;
 diff --git a/arch/arm/mach-exynos/firmware.c b/arch/arm/mach-exynos/firmware.c
 index 554b350..71bcfbd 100644
 --- a/arch/arm/mach-exynos/firmware.c
 +++ b/arch/arm/mach-exynos/firmware.c
 @@ -102,7 +102,9 @@ static int exynos_suspend(void)
   writel(EXYNOS_SLEEP_MAGIC, sysram_ns_base_addr + EXYNOS_BOOT_FLAG);
   writel(virt_to_phys(exynos_cpu_resume_ns),
   sysram_ns_base_addr + EXYNOS_BOOT_ADDR);
 -
 +#ifdef CONFIG_CACHE_L2X0
 + l2x0_regs_phys = virt_to_phys(l2x0_saved_regs);
 +#endif

NAK.  Please look at how arch/arm/mm/l2c-l2x0-resume.S gets the address
of this structure in assembly code.  The name of this variable is crap
in any case.  It's not the registers, it's the saved registers.  So even
more reason to kill this abomination, which incidentally, I've already
killed off once before in the exynos code.

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Re: [PATCH] clk: ti: dra7-atl-clock: fix a memory leak

2014-09-15 Thread Peter Ujfalusi
On 09/12/2014 04:39 PM, Tero Kristo wrote:
 of_clk_add_provider makes an internal copy of the parent_names property
 while its called, thus it is no longer needed after this call and can
 be freed.

Thanks Tero, indeed this was overlooked in the original driver.

Acked-by: Peter Ujfalusi peter.ujfal...@ti.com


 Signed-off-by: Tero Kristo t-kri...@ti.com
 Cc: Mike Turquette mturque...@linaro.org
 Cc: Peter Ujfalusi peter.ujfal...@ti.com
 ---
  drivers/clk/ti/clk-dra7-atl.c |1 +
  1 file changed, 1 insertion(+)
 
 diff --git a/drivers/clk/ti/clk-dra7-atl.c b/drivers/clk/ti/clk-dra7-atl.c
 index 4a65b41..3f9308a 100644
 --- a/drivers/clk/ti/clk-dra7-atl.c
 +++ b/drivers/clk/ti/clk-dra7-atl.c
 @@ -199,6 +199,7 @@ static void __init of_dra7_atl_clock_setup(struct 
 device_node *node)
  
   if (!IS_ERR(clk)) {
   of_clk_add_provider(node, of_clk_src_simple_get, clk);
 + kfree(parent_names);
   return;
   }
  cleanup:
 


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Re: [PATCH 00/16 v9] omap 8250 based uart + DMA

2014-09-15 Thread Sebastian Andrzej Siewior
On 09/13/2014 12:43 AM, Tony Lindgren wrote:
 * Sebastian Andrzej Siewior bige...@linutronix.de [140910 12:30]:
 the diff of v8…v9 is small:
 - rebased on top's of Greg's tty-next branch
 - fixed #10 where we might have THRE interrupt enabled for longer than
   needed
 - re-did register setup in #10. Before this less file could freeze the
   am335x-evm.
 
 FYI, looks like merging in your uart_v9 branch for testing
 with my hwmod changes now fails to produce RX characters on omap3.
 
 The device wakes up just fine to the wake-up interrupt, and then
 serial8250_handle_irq() gets called, but I'm not seeing anything
 in the console getting printed out. It's like all the RX characters
 are getting lost instead of just the first one. The RX characters
 work fine when the system is running.
 
 So it seems there's been some kind of regression since v8?

I changed the restore function the fix the am335x-evm + less freeze.
And now we have this. So let me search…

 Regards,
 
 Tony
 

Sebastian
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[PATCH v3 0/4] omap-serial high-speed fixes/improvements

2014-09-15 Thread Frans Klaver
Hi,

Here's version 3 of my fixes for high speed usage of the omap serial driver.
Sebastian's 8250 based implementation doesn't seem to be quite there yet. As
long as that's the case, I'd like to go ahead with improving this series.

v2..v3
  - fix an undefined variable in prevent division by zero
  - use IRQ_ONESHOT for the threaded irq in use threaded interrupt handler

v1..v2
  - centralize baud_is_mode16's calculation
  - fix/unbreak an uninitialized variable in use threaded interrupt handler
  - read has-hw-flow-control property in of_get_uart_port_info

Frans Klaver (4):
  tty: omap-serial: pull out calculation from baud_is_mode16
  tty: omap-serial: prevent division by zero
  tty: omap-serial: use threaded interrupt handler
  tty: omap-serial: support setting of hardware flow control in dts

 .../devicetree/bindings/serial/omap_serial.txt |  1 +
 drivers/tty/serial/omap-serial.c   | 64 +-
 2 files changed, 50 insertions(+), 15 deletions(-)

-- 
2.1.0

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[PATCH 3/4] tty: omap-serial: use threaded interrupt handler

2014-09-15 Thread Frans Klaver
At 3.6Mbaud, with slightly over 2Mbit/s data coming in, we see 1600 uart
rx buffer overflows within 30 seconds. Threading the interrupt handling reduces
this to about 170 overflows in 10 minutes.

In practice this therefore reduces the need for hardware flow control,
meaning the sending side doesn't have to buffer as much either.

Signed-off-by: Frans Klaver frans.kla...@xsens.com
---
 drivers/tty/serial/omap-serial.c | 30 +++---
 1 file changed, 23 insertions(+), 7 deletions(-)

diff --git a/drivers/tty/serial/omap-serial.c b/drivers/tty/serial/omap-serial.c
index 7d3f557..398139a 100644
--- a/drivers/tty/serial/omap-serial.c
+++ b/drivers/tty/serial/omap-serial.c
@@ -575,6 +575,20 @@ static void serial_omap_rdi(struct uart_omap_port *up, 
unsigned int lsr)
 }
 
 /**
+ * serial_omap_fast_irq() - schedule interrupt handling
+ */
+static irqreturn_t serial_omap_fast_irq(int irq, void *dev_id)
+{
+   struct uart_omap_port *up = dev_id;
+   unsigned int iir = serial_in(up, UART_IIR);
+
+   if (iir  UART_IIR_NO_INT)
+   return IRQ_NONE;
+
+   return IRQ_WAKE_THREAD;
+}
+
+/**
  * serial_omap_irq() - This handles the interrupt from one port
  * @irq: uart port irq number
  * @dev_id: uart port info
@@ -584,7 +598,6 @@ static irqreturn_t serial_omap_irq(int irq, void *dev_id)
struct uart_omap_port *up = dev_id;
unsigned int iir, lsr;
unsigned int type;
-   irqreturn_t ret = IRQ_NONE;
int max_count = 256;
 
spin_lock(up-port.lock);
@@ -595,7 +608,6 @@ static irqreturn_t serial_omap_irq(int irq, void *dev_id)
if (iir  UART_IIR_NO_INT)
break;
 
-   ret = IRQ_HANDLED;
lsr = serial_in(up, UART_LSR);
 
/* extract IRQ type from IIR register */
@@ -634,7 +646,7 @@ static irqreturn_t serial_omap_irq(int irq, void *dev_id)
pm_runtime_put_autosuspend(up-dev);
up-port_activity = jiffies;
 
-   return ret;
+   return IRQ_HANDLED;
 }
 
 static unsigned int serial_omap_tx_empty(struct uart_port *port)
@@ -731,15 +743,19 @@ static int serial_omap_startup(struct uart_port *port)
/*
 * Allocate the IRQ
 */
-   retval = request_irq(up-port.irq, serial_omap_irq, up-port.irqflags,
-   up-name, up);
+   retval = request_threaded_irq(up-port.irq, serial_omap_fast_irq,
+   serial_omap_irq,
+   IRQF_ONESHOT | 
up-port.irqflags,
+   up-name, up);
if (retval)
return retval;
 
/* Optional wake-up IRQ */
if (up-wakeirq) {
-   retval = request_irq(up-wakeirq, serial_omap_irq,
-up-port.irqflags, up-name, up);
+   retval = request_threaded_irq(up-wakeirq, serial_omap_fast_irq,
+   serial_omap_irq,
+   IRQF_ONESHOT | 
up-port.irqflags,
+   up-name, up);
if (retval) {
free_irq(up-port.irq, up);
return retval;
-- 
2.1.0

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[PATCH 1/4] tty: omap-serial: pull out calculation from baud_is_mode16

2014-09-15 Thread Frans Klaver
To determine the correct divisor, we need to know the difference between
the desired baud rate and the actual baud rate. The calculation for this
difference is implemented twice within omap_serial_baud_is_mode16().
Pull out the calculation for easier maintenance.

Signed-off-by: Frans Klaver frans.kla...@xsens.com
---
 drivers/tty/serial/omap-serial.c | 26 ++
 1 file changed, 18 insertions(+), 8 deletions(-)

diff --git a/drivers/tty/serial/omap-serial.c b/drivers/tty/serial/omap-serial.c
index d017cec..ae935ce 100644
--- a/drivers/tty/serial/omap-serial.c
+++ b/drivers/tty/serial/omap-serial.c
@@ -239,6 +239,22 @@ static void serial_omap_enable_wakeup(struct 
uart_omap_port *up, bool enable)
 }
 
 /*
+ * Calculate the absolute difference between the desired and actual baud
+ * rate for the given mode.
+ */
+static inline int calculate_baud_abs_diff(struct uart_port *port,
+   unsigned int baud, unsigned int mode)
+{
+   unsigned int n = port-uartclk / (mode * baud);
+   int abs_diff = baud - (port-uartclk / (mode * n));
+
+   if (abs_diff  0)
+   abs_diff = -abs_diff;
+
+   return abs_diff;
+}
+
+/*
  * serial_omap_baud_is_mode16 - check if baud rate is MODE16X
  * @port: uart port info
  * @baud: baudrate for which mode needs to be determined
@@ -252,14 +268,8 @@ static void serial_omap_enable_wakeup(struct 
uart_omap_port *up, bool enable)
 static bool
 serial_omap_baud_is_mode16(struct uart_port *port, unsigned int baud)
 {
-   unsigned int n13 = port-uartclk / (13 * baud);
-   unsigned int n16 = port-uartclk / (16 * baud);
-   int baudAbsDiff13 = baud - (port-uartclk / (13 * n13));
-   int baudAbsDiff16 = baud - (port-uartclk / (16 * n16));
-   if (baudAbsDiff13  0)
-   baudAbsDiff13 = -baudAbsDiff13;
-   if (baudAbsDiff16  0)
-   baudAbsDiff16 = -baudAbsDiff16;
+   int baudAbsDiff13 = calculate_baud_abs_diff(port, baud, 13);
+   int baudAbsDiff16 = calculate_baud_abs_diff(port, baud, 16);
 
return (baudAbsDiff13 = baudAbsDiff16);
 }
-- 
2.1.0

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[PATCH 2/4] tty: omap-serial: prevent division by zero

2014-09-15 Thread Frans Klaver
If the chosen baud rate is large enough (e.g. 3.5 megabaud), the
calculated n values in calculate_baud_abs_diff may become 0. This causes
a division by zero when calculating the difference between calculated
and desired baud rates. To prevent this, cap n on 1.

Signed-off-by: Frans Klaver frans.kla...@xsens.com
---
 drivers/tty/serial/omap-serial.c | 6 +-
 1 file changed, 5 insertions(+), 1 deletion(-)

diff --git a/drivers/tty/serial/omap-serial.c b/drivers/tty/serial/omap-serial.c
index ae935ce..7d3f557 100644
--- a/drivers/tty/serial/omap-serial.c
+++ b/drivers/tty/serial/omap-serial.c
@@ -246,8 +246,12 @@ static inline int calculate_baud_abs_diff(struct uart_port 
*port,
unsigned int baud, unsigned int mode)
 {
unsigned int n = port-uartclk / (mode * baud);
-   int abs_diff = baud - (port-uartclk / (mode * n));
+   int abs_diff;
 
+   if (n == 0)
+   n = 1;
+
+   abs_diff = baud - (port-uartclk / (mode * n));
if (abs_diff  0)
abs_diff = -abs_diff;
 
-- 
2.1.0

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[PATCH 4/4] tty: omap-serial: support setting of hardware flow control in dts

2014-09-15 Thread Frans Klaver
This makes hardware flow control availability configurable from the
device tree.

Signed-off-by: Frans Klaver frans.kla...@xsens.com
---
 Documentation/devicetree/bindings/serial/omap_serial.txt | 1 +
 drivers/tty/serial/omap-serial.c | 4 
 2 files changed, 5 insertions(+)

diff --git a/Documentation/devicetree/bindings/serial/omap_serial.txt 
b/Documentation/devicetree/bindings/serial/omap_serial.txt
index 342eedd..1b629e9 100644
--- a/Documentation/devicetree/bindings/serial/omap_serial.txt
+++ b/Documentation/devicetree/bindings/serial/omap_serial.txt
@@ -8,3 +8,4 @@ Required properties:
 
 Optional properties:
 - clock-frequency : frequency of the clock input to the UART
+- has-hw-flow-control : the hardware has flow control capability
diff --git a/drivers/tty/serial/omap-serial.c b/drivers/tty/serial/omap-serial.c
index 398139a..bff6874 100644
--- a/drivers/tty/serial/omap-serial.c
+++ b/drivers/tty/serial/omap-serial.c
@@ -1597,6 +1597,10 @@ static struct omap_uart_port_info 
*of_get_uart_port_info(struct device *dev)
 
of_property_read_u32(dev-of_node, clock-frequency,
 omap_up_info-uartclk);
+
+   if (of_property_read_bool(dev-of_node, has-hw-flow-control))
+   omap_up_info-flags |= UPF_HARD_FLOW;
+
return omap_up_info;
 }
 
-- 
2.1.0

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Re: [PATCH 00/35] arm: omap: move intc to drivers/irqchip/

2014-09-15 Thread Tony Lindgren
* Jason Cooper ja...@lakedaemon.net [140913 22:19]:
 On Mon, Jul 28, 2014 at 04:15:48PM -0500, Felipe Balbi wrote:
 
 For patches 32-35, please fix the subject line to:
 
   irqchip: omap-intc: C...
 
 With that changed, patches 30-35 are:
 
 Acked-by: Jason Cooper ja...@lakedaemon.net

Great, thanks Jason for looking through them.

Felipe, can you please repost the missing patches with Jason's
changes and leaving out patch 30/35 to avoid board-*.c file
churn?

The branch to use for rebasing is omap-for-v3.18/intc-v2
that already contains the arch/arm/mach-omap2 related changes.

Regards,

Tony
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Re: [PATCH 3/4] tty: omap-serial: use threaded interrupt handler

2014-09-15 Thread Peter Hurley
On 09/15/2014 10:00 AM, Frans Klaver wrote:
 At 3.6Mbaud, with slightly over 2Mbit/s data coming in, we see 1600 uart
 rx buffer overflows within 30 seconds. Threading the interrupt handling 
 reduces
 this to about 170 overflows in 10 minutes.

Why is the threadirqs kernel boot option not sufficient?
Or conversely, shouldn't this be selectable?

Regards,
Peter Hurley

PS - To overflow the 64 byte RX FIFO at those data rates means interrupt
latency in excess of 250us?

 In practice this therefore reduces the need for hardware flow control,
 meaning the sending side doesn't have to buffer as much either.
 
 Signed-off-by: Frans Klaver frans.kla...@xsens.com
 ---
  drivers/tty/serial/omap-serial.c | 30 +++---
  1 file changed, 23 insertions(+), 7 deletions(-)
 
 diff --git a/drivers/tty/serial/omap-serial.c 
 b/drivers/tty/serial/omap-serial.c
 index 7d3f557..398139a 100644
 --- a/drivers/tty/serial/omap-serial.c
 +++ b/drivers/tty/serial/omap-serial.c
 @@ -575,6 +575,20 @@ static void serial_omap_rdi(struct uart_omap_port *up, 
 unsigned int lsr)
  }
  
  /**
 + * serial_omap_fast_irq() - schedule interrupt handling
 + */
 +static irqreturn_t serial_omap_fast_irq(int irq, void *dev_id)
 +{
 + struct uart_omap_port *up = dev_id;
 + unsigned int iir = serial_in(up, UART_IIR);
 +
 + if (iir  UART_IIR_NO_INT)
 + return IRQ_NONE;
 +
 + return IRQ_WAKE_THREAD;
 +}
 +
 +/**
   * serial_omap_irq() - This handles the interrupt from one port
   * @irq: uart port irq number
   * @dev_id: uart port info
 @@ -584,7 +598,6 @@ static irqreturn_t serial_omap_irq(int irq, void *dev_id)
   struct uart_omap_port *up = dev_id;
   unsigned int iir, lsr;
   unsigned int type;
 - irqreturn_t ret = IRQ_NONE;
   int max_count = 256;
  
   spin_lock(up-port.lock);
 @@ -595,7 +608,6 @@ static irqreturn_t serial_omap_irq(int irq, void *dev_id)
   if (iir  UART_IIR_NO_INT)
   break;
  
 - ret = IRQ_HANDLED;
   lsr = serial_in(up, UART_LSR);
  
   /* extract IRQ type from IIR register */
 @@ -634,7 +646,7 @@ static irqreturn_t serial_omap_irq(int irq, void *dev_id)
   pm_runtime_put_autosuspend(up-dev);
   up-port_activity = jiffies;
  
 - return ret;
 + return IRQ_HANDLED;
  }
  
  static unsigned int serial_omap_tx_empty(struct uart_port *port)
 @@ -731,15 +743,19 @@ static int serial_omap_startup(struct uart_port *port)
   /*
* Allocate the IRQ
*/
 - retval = request_irq(up-port.irq, serial_omap_irq, up-port.irqflags,
 - up-name, up);
 + retval = request_threaded_irq(up-port.irq, serial_omap_fast_irq,
 + serial_omap_irq,
 + IRQF_ONESHOT | 
 up-port.irqflags,
 + up-name, up);
   if (retval)
   return retval;
  
   /* Optional wake-up IRQ */
   if (up-wakeirq) {
 - retval = request_irq(up-wakeirq, serial_omap_irq,
 -  up-port.irqflags, up-name, up);
 + retval = request_threaded_irq(up-wakeirq, serial_omap_fast_irq,
 + serial_omap_irq,
 + IRQF_ONESHOT | 
 up-port.irqflags,
 + up-name, up);
   if (retval) {
   free_irq(up-port.irq, up);
   return retval;
 

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Re: [PATCH 09/16] tty: serial: 8250_dma: Add a TX trigger workaround for AM33xx

2014-09-15 Thread Sebastian Andrzej Siewior
On 09/12/2014 12:28 PM, Frans Klaver wrote:
 port config is 115200 8N1. I don't recall doing anything special. I
 boot, login, less file and get a lock.

So I booted my mini Debian 7.6 (basic system + openssh) on my beagle
bone black which is:

[0.00] AM335X ES2.0 (neon )

configured a console, login, invoked less file. The file was shown, I
hit on the space key so less shows me more of the file. No lock-up.
I tried booting via NFS and MMC. I tried various files with less.

My dot config is here
https://breakpoint.cc/config-am335x-bb.txt.xz

If there is nothing specific to the file you do less on I have no idea
what else it could if it is not the config.

Sebastian

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Re: [PATCH 09/16] tty: serial: 8250_dma: Add a TX trigger workaround for AM33xx

2014-09-15 Thread Sebastian Andrzej Siewior
On 09/11/2014 04:35 PM, Peter Hurley wrote:
 I do need to find out if omap hardware sets UART_MSR_DCTS when auto CTS
 is on. Would you mind running the debug patch below with HW flow control on?

I didn't forget about this. However I told minicom to use hardware flow
control (and I see the driver set the HW bit) but I haven't seen that
uart_handle_cts_change() has been invoked at all. I'm going to check
two other boards and report then.

 Regards,
 Peter Hurley

Sebastian
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Re: [PATCH 3/4] tty: omap-serial: use threaded interrupt handler

2014-09-15 Thread Peter Hurley
On 09/15/2014 11:39 AM, Peter Hurley wrote:
 On 09/15/2014 10:00 AM, Frans Klaver wrote:
 At 3.6Mbaud, with slightly over 2Mbit/s data coming in, we see 1600 uart
 rx buffer overflows within 30 seconds. Threading the interrupt handling 
 reduces
 this to about 170 overflows in 10 minutes.
 
 Why is the threadirqs kernel boot option not sufficient?
 Or conversely, shouldn't this be selectable?

Also, do you see the same performance differential when you implement this
in the 8250 driver (that is, on top of Sebastian's omap-8250 conversion)?


 Regards,
 Peter Hurley
 
 PS - To overflow the 64 byte RX FIFO at those data rates means interrupt
 latency in excess of 250us?
 
 In practice this therefore reduces the need for hardware flow control,
 meaning the sending side doesn't have to buffer as much either.

 Signed-off-by: Frans Klaver frans.kla...@xsens.com
 ---
  drivers/tty/serial/omap-serial.c | 30 +++---
  1 file changed, 23 insertions(+), 7 deletions(-)

 diff --git a/drivers/tty/serial/omap-serial.c 
 b/drivers/tty/serial/omap-serial.c
 index 7d3f557..398139a 100644
 --- a/drivers/tty/serial/omap-serial.c
 +++ b/drivers/tty/serial/omap-serial.c
 @@ -575,6 +575,20 @@ static void serial_omap_rdi(struct uart_omap_port *up, 
 unsigned int lsr)
  }
  
  /**
 + * serial_omap_fast_irq() - schedule interrupt handling
 + */
 +static irqreturn_t serial_omap_fast_irq(int irq, void *dev_id)
 +{
 +struct uart_omap_port *up = dev_id;
 +unsigned int iir = serial_in(up, UART_IIR);
 +
 +if (iir  UART_IIR_NO_INT)
 +return IRQ_NONE;
 +
 +return IRQ_WAKE_THREAD;
 +}
 +
 +/**
   * serial_omap_irq() - This handles the interrupt from one port
   * @irq: uart port irq number
   * @dev_id: uart port info
 @@ -584,7 +598,6 @@ static irqreturn_t serial_omap_irq(int irq, void *dev_id)
  struct uart_omap_port *up = dev_id;
  unsigned int iir, lsr;
  unsigned int type;
 -irqreturn_t ret = IRQ_NONE;
  int max_count = 256;
  
  spin_lock(up-port.lock);
 @@ -595,7 +608,6 @@ static irqreturn_t serial_omap_irq(int irq, void *dev_id)
  if (iir  UART_IIR_NO_INT)
  break;
  
 -ret = IRQ_HANDLED;
  lsr = serial_in(up, UART_LSR);
  
  /* extract IRQ type from IIR register */
 @@ -634,7 +646,7 @@ static irqreturn_t serial_omap_irq(int irq, void *dev_id)
  pm_runtime_put_autosuspend(up-dev);
  up-port_activity = jiffies;
  
 -return ret;
 +return IRQ_HANDLED;
  }
  
  static unsigned int serial_omap_tx_empty(struct uart_port *port)
 @@ -731,15 +743,19 @@ static int serial_omap_startup(struct uart_port *port)
  /*
   * Allocate the IRQ
   */
 -retval = request_irq(up-port.irq, serial_omap_irq, up-port.irqflags,
 -up-name, up);
 +retval = request_threaded_irq(up-port.irq, serial_omap_fast_irq,
 +serial_omap_irq,
 +IRQF_ONESHOT | 
 up-port.irqflags,
 +up-name, up);
  if (retval)
  return retval;
  
  /* Optional wake-up IRQ */
  if (up-wakeirq) {
 -retval = request_irq(up-wakeirq, serial_omap_irq,
 - up-port.irqflags, up-name, up);
 +retval = request_threaded_irq(up-wakeirq, serial_omap_fast_irq,
 +serial_omap_irq,
 +IRQF_ONESHOT | 
 up-port.irqflags,
 +up-name, up);
  if (retval) {
  free_irq(up-port.irq, up);
  return retval;



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[PATCH] Input: palmas-pwrbutton: Fix IRQ flags for using threaded handler alone.

2014-09-15 Thread Nishanth Menon
make C=2 CHECK=scripts/coccicheck MODE=report 
COCCI=scripts/coccinelle/misc/irqf_oneshot.cocci 
./drivers/input/misc/palmas-pwrbutton.o
Reports:
drivers/input/misc/palmas-pwrbutton.c:213:9-29: ERROR: Threaded IRQ with no 
primary handler requested without IRQF_ONESHOT

Palmas powerbutton just needs threaded IRQ handler since I2C
operations are involved and there is nothing in non-threaded primary
handler we could do.

So mark the request with ONESHOT as it should have been done in these
cases.

Cc: Julia Lawal julia.law...@lip6.fr
Cc: Dan Carpenter dan.carpen...@oracle.com
Fixes: adff5962fdd2 (Input: introduce palmas-pwrbutton)
Reported-by: kbuild test robot fengguang...@intel.com
Signed-off-by: Nishanth Menon n...@ti.com
---
 drivers/input/misc/palmas-pwrbutton.c |4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/drivers/input/misc/palmas-pwrbutton.c 
b/drivers/input/misc/palmas-pwrbutton.c
index 4ed6f78..c0c4636 100644
--- a/drivers/input/misc/palmas-pwrbutton.c
+++ b/drivers/input/misc/palmas-pwrbutton.c
@@ -211,8 +211,8 @@ static int palmas_pwron_probe(struct platform_device *pdev)
 
pwron-irq = platform_get_irq(pdev, 0);
error = request_threaded_irq(pwron-irq, NULL, pwron_irq,
-IRQF_TRIGGER_HIGH | IRQF_TRIGGER_LOW,
-dev_name(dev), pwron);
+IRQF_TRIGGER_HIGH | IRQF_TRIGGER_LOW |
+IRQF_ONESHOT, dev_name(dev), pwron);
if (error) {
dev_err(dev, Can't get IRQ for pwron: %d\n, error);
goto err_free_input;
-- 
1.7.9.5

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[PATCH] Input: palmas-pwrbutton: Fix typo in License

2014-09-15 Thread Nishanth Menon
Follow the license string convention indicated in include/linux/module.h
(don't capitalize v).

This fixes following randconfig warning:
FATAL: modpost: GPL-incompatible module palmas-pwrbutton.ko uses GPL-only 
symbol 'platform_driver_unregister'

Cc: Stephen Rothwell s...@canb.auug.org.au
Reported-by: Jim Davis jim.ep...@gmail.com
Signed-off-by: Nishanth Menon n...@ti.com
---
Reported thread http://marc.info/?l=linux-inputm=141080223209150w=2

 drivers/input/misc/palmas-pwrbutton.c |2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/input/misc/palmas-pwrbutton.c 
b/drivers/input/misc/palmas-pwrbutton.c
index 3f90211..4ed6f78 100644
--- a/drivers/input/misc/palmas-pwrbutton.c
+++ b/drivers/input/misc/palmas-pwrbutton.c
@@ -326,5 +326,5 @@ module_platform_driver(palmas_pwron_driver);
 
 MODULE_ALIAS(platform:palmas-pwrbutton);
 MODULE_DESCRIPTION(Palmas Power Button);
-MODULE_LICENSE(GPL V2);
+MODULE_LICENSE(GPL v2);
 MODULE_AUTHOR(Texas Instruments Inc.);
-- 
1.7.9.5

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Re: [PATCH] Input: palmas-pwrbutton: Fix typo in License

2014-09-15 Thread Nishanth Menon
On 09/15/2014 12:58 PM, Nishanth Menon wrote:
 Follow the license string convention indicated in include/linux/module.h
 (don't capitalize v).
 
 This fixes following randconfig warning:
 FATAL: modpost: GPL-incompatible module palmas-pwrbutton.ko uses GPL-only 
 symbol 'platform_driver_unregister'
 
Uggh.. forgot to add:

Fixes: adff5962fdd2 (Input: introduce palmas-pwrbutton)

 Cc: Stephen Rothwell s...@canb.auug.org.au
 Reported-by: Jim Davis jim.ep...@gmail.com
 Signed-off-by: Nishanth Menon n...@ti.com
 ---
 Reported thread http://marc.info/?l=linux-inputm=141080223209150w=2
 
  drivers/input/misc/palmas-pwrbutton.c |2 +-
  1 file changed, 1 insertion(+), 1 deletion(-)
 
 diff --git a/drivers/input/misc/palmas-pwrbutton.c 
 b/drivers/input/misc/palmas-pwrbutton.c
 index 3f90211..4ed6f78 100644
 --- a/drivers/input/misc/palmas-pwrbutton.c
 +++ b/drivers/input/misc/palmas-pwrbutton.c
 @@ -326,5 +326,5 @@ module_platform_driver(palmas_pwron_driver);
  
  MODULE_ALIAS(platform:palmas-pwrbutton);
  MODULE_DESCRIPTION(Palmas Power Button);
 -MODULE_LICENSE(GPL V2);
 +MODULE_LICENSE(GPL v2);
  MODULE_AUTHOR(Texas Instruments Inc.);
 

-- 
Regards,
Nishanth Menon
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H

2014-09-15 Thread Diana
Please Revert back, your assistance is needed.
---
The Exhibitor at innoTrans, Berlin 2014
Hall : 15.1 / Stand no : 109 
http://www.virtualmarket.innotrans.de/?Action=showCompanyid=346242
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Re: [PATCH 30/35] irqchip: add irq-omap-intc.h header

2014-09-15 Thread Felipe Balbi
Hi,

On Thu, Sep 11, 2014 at 02:08:01PM -0700, Tony Lindgren wrote:
 * Felipe Balbi ba...@ti.com [140728 14:19]:
  OMAP INTC irqchip driver will be moved under
  drivers/irqchip/ soon but we still have a dependency
  with mach-omap2 when it comes to idle functions.
  
  In order to make it easy to share those function
  prototypes with OMAP PM code, we introduce this new
  header.
  
  Signed-off-by: Felipe Balbi ba...@ti.com
  ---
   arch/arm/mach-omap2/board-3430sdp.c|  1 +
   arch/arm/mach-omap2/board-am3517crane.c|  1 +
   arch/arm/mach-omap2/board-am3517evm.c  |  1 +
   arch/arm/mach-omap2/board-cm-t35.c |  1 +
   arch/arm/mach-omap2/board-cm-t3517.c   |  1 +
   arch/arm/mach-omap2/board-devkit8000.c |  1 +
   arch/arm/mach-omap2/board-ldp.c|  1 +
   arch/arm/mach-omap2/board-omap3beagle.c|  1 +
   arch/arm/mach-omap2/board-omap3logic.c |  1 +
   arch/arm/mach-omap2/board-omap3pandora.c   |  1 +
   arch/arm/mach-omap2/board-omap3stalker.c   |  1 +
   arch/arm/mach-omap2/board-omap3touchbook.c |  1 +
   arch/arm/mach-omap2/board-overo.c  |  1 +
   arch/arm/mach-omap2/board-rx51.c   |  1 +
   arch/arm/mach-omap2/board-ti8168evm.c  |  1 +
   arch/arm/mach-omap2/common.h   |  9 -
   arch/arm/mach-omap2/cpuidle34xx.c  |  1 +
   arch/arm/mach-omap2/irq.c  |  1 +
   arch/arm/mach-omap2/pm24xx.c   |  1 +
   arch/arm/mach-omap2/pm34xx.c   |  1 +
   include/linux/irqchip/irq-omap-intc.h  | 32 
  ++
   21 files changed, 51 insertions(+), 9 deletions(-)
 
 I ended up setting up another branch without this patch
 at omap-for-v3.12/intc-v2. It now has dependency to the
 SoC changes from Nishant and the const cleanup fix from Uwe.
 
 This patch is not needed, let's leave this out, the functions

so, if we don't add that header, we will have to include soc.h and
common.h with full (relative) path from drivers/irqchip/irq-omap-intc.c.
IOW:

#include ../../arch/arm/mach-omap2/common.h

Neither soc.h nor common.h are part of the include path. I'd rather not
go down that route and just add this extra header. Even if you ask me to
move soc.h and common.h under asm/mach/{soc,common}.h we will already
have to modify every board file anyway.

-- 
balbi


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Re: [PATCH 2/2] remoteproc: add support to handle internal memories

2014-09-15 Thread Suman Anna
Hi Ohad,

 On Tue, Jul 29, 2014 at 10:33 PM, Suman Anna s-a...@ti.com wrote:
 We currently have two usecases. The primary usecase is the WkupM3
 processor on TI Sitara AM335x/AM437x SoCs used for suspend/resume
 management. This series is a dependency for the WkupM3 remoteproc driver
 that Dave posted [1]. More details are in section 8.1.4.6 of the AM335x
 TRM [2]. The program/data sections for this processor all _needs_ to be
 in the two internal memory RAMS (16K Unified RAM and 8K Data RAM), and
 there is no MMU for this processor. The current RSC_CARVEOUT and
 RSC_DEVMEM do not fit to describe this type of memory (we neither
 allocate memory through dma api nor do we need to map these into an MMU).
 
 Thanks for the details.
 
 Can we define a CMA block for these regions, and then just use
 carveout resource entries instead of the ioremap approach?

I am looking at refreshing these patches, and found that I missed
responding to this message.

These processors need to use their internal RAM for loading, which is
not for generic usage by the kernel, so defining a CMA block for this
memory doesn't make sense.

 This may require some changes in remoteproc which we'll need to think
 about, but it sounds like it may fit the problem better instead of
 forcing ioremap to provide a regular pointer (we're supposed to use
 ioremaped memory only with memory primitives such as readl/writel/..).

Will it suffice to replace the memcpy() with memcpy_toio()?

regards
Suman
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[PATCH 0/9] arm: omap: intc: remaining patches

2014-09-15 Thread Felipe Balbi
Hi Tony,

Here are the remaining INTC patches rebased on your omap-for-v3.18/intc-v2
branch.

Based on our IRC chat, I kept irq-omap-intc.h header, but included it
on common.h instead of modifying every board-file.

cheers

Felipe Balbi (9):
  irqchip: add irq-omap-intc.h header
  arm: omap: irq: move irq.c to drivers/irqchip/
  irqchip: omap-intc: minor improvement to omap_irq_pending()
  irqchip: omap-intc: comment style cleanup
  irqchip: omap-intc: remove unnecesary of_address_to_resource() call
  irqchip: omap-intc: enable IP protection
  irqchip: omap-intc: enable TURBO idle mode
  irqchip: omap-intc: correct maximum number or MIR registers
  irqchip: omap-intc: remove unnecessary comments

 arch/arm/mach-omap2/Kconfig|  1 +
 arch/arm/mach-omap2/Makefile   |  3 +-
 arch/arm/mach-omap2/common.h   | 10 +---
 drivers/irqchip/Kconfig|  5 ++
 drivers/irqchip/Makefile   |  1 +
 .../irq.c = drivers/irqchip/irq-omap-intc.c   | 64 +-
 include/linux/irqchip/irq-omap-intc.h  | 32 +++
 7 files changed, 78 insertions(+), 38 deletions(-)
 rename arch/arm/mach-omap2/irq.c = drivers/irqchip/irq-omap-intc.c (89%)
 create mode 100644 include/linux/irqchip/irq-omap-intc.h

-- 
2.0.1.563.g66f467c

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[PATCH 7/9] irqchip: omap-intc: enable TURBO idle mode

2014-09-15 Thread Felipe Balbi
When TURBO bit is set in the INTC_IDLE register,
the input synchronizer clock will be autogated
based on activity on the INTC.

Because this idle mode increases the interrupt
latency by 2 clock cycles, we're only enabling
it during suspend.

Acked-by: Jason Cooper ja...@lakedaemon.net
Signed-off-by: Felipe Balbi ba...@ti.com
---

Tony, let me know if you want TURBO to be set unconditionally. That's likely
going to shave off a few extra microwatts, although I don't have a good way to
measure it.

 drivers/irqchip/irq-omap-intc.c | 5 +
 1 file changed, 5 insertions(+)

diff --git a/drivers/irqchip/irq-omap-intc.c b/drivers/irqchip/irq-omap-intc.c
index 7681b13..dfa2d9d 100644
--- a/drivers/irqchip/irq-omap-intc.c
+++ b/drivers/irqchip/irq-omap-intc.c
@@ -51,6 +51,9 @@
 #define INTCPS_NR_ILR_REGS 128
 #define INTCPS_NR_MIR_REGS 3
 
+#define INTC_IDLE_FUNCIDLE (1  0)
+#define INTC_IDLE_TURBO(1  1)
+
 #define INTC_PROTECTION_ENABLE (1  0)
 
 /*
@@ -134,12 +137,14 @@ void omap3_intc_prepare_idle(void)
 * cf. errata ID i540 for 3430 (all revisions up to 3.1.x)
 */
intc_writel(INTC_SYSCONFIG, 0);
+   intc_writel(INTC_IDLE, INTC_IDLE_TURBO);
 }
 
 void omap3_intc_resume_idle(void)
 {
/* Re-enable autoidle */
intc_writel(INTC_SYSCONFIG, 1);
+   intc_writel(INTC_IDLE, 0);
 }
 
 /* XXX: FIQ and additional INTC support (only MPU at the moment) */
-- 
2.0.1.563.g66f467c

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[PATCH 2/9] arm: omap: irq: move irq.c to drivers/irqchip/

2014-09-15 Thread Felipe Balbi
Just move the code over as it has no dependencies
on arch/arm/ anymore.

Signed-off-by: Felipe Balbi ba...@ti.com
---
 arch/arm/mach-omap2/Kconfig  | 1 +
 arch/arm/mach-omap2/Makefile | 3 +--
 drivers/irqchip/Kconfig  | 5 +
 drivers/irqchip/Makefile | 1 +
 arch/arm/mach-omap2/irq.c = drivers/irqchip/irq-omap-intc.c | 9 +
 5 files changed, 13 insertions(+), 6 deletions(-)
 rename arch/arm/mach-omap2/irq.c = drivers/irqchip/irq-omap-intc.c (98%)

diff --git a/arch/arm/mach-omap2/Kconfig b/arch/arm/mach-omap2/Kconfig
index 11ccf0b..691d62a 100644
--- a/arch/arm/mach-omap2/Kconfig
+++ b/arch/arm/mach-omap2/Kconfig
@@ -86,6 +86,7 @@ config ARCH_OMAP2PLUS
select PINCTRL
select SOC_BUS
select TI_PRIV_EDMA
+   select OMAP_IRQCHIP
help
  Systems based on OMAP2, OMAP3, OMAP4 or OMAP5
 
diff --git a/arch/arm/mach-omap2/Makefile b/arch/arm/mach-omap2/Makefile
index 69bbcba..0b6095c 100644
--- a/arch/arm/mach-omap2/Makefile
+++ b/arch/arm/mach-omap2/Makefile
@@ -10,7 +10,6 @@ obj-y := id.o io.o control.o mux.o devices.o fb.o serial.o 
gpmc.o timer.o pm.o \
 common.o gpio.o dma.o wd_timer.o display.o i2c.o hdq1w.o omap_hwmod.o \
 omap_device.o sram.o drm.o
 
-omap-2-3-common= irq.o
 hwmod-common   = omap_hwmod.o omap_hwmod_reset.o \
  omap_hwmod_common_data.o
 clock-common   = clock.o clock_common_data.o \
@@ -20,7 +19,7 @@ secure-common = omap-smc.o 
omap-secure.o
 obj-$(CONFIG_ARCH_OMAP2) += $(omap-2-3-common) $(hwmod-common)
 obj-$(CONFIG_ARCH_OMAP3) += $(omap-2-3-common) $(hwmod-common) $(secure-common)
 obj-$(CONFIG_ARCH_OMAP4) += $(hwmod-common) $(secure-common)
-obj-$(CONFIG_SOC_AM33XX) += irq.o $(hwmod-common)
+obj-$(CONFIG_SOC_AM33XX) += $(hwmod-common)
 obj-$(CONFIG_SOC_OMAP5) += $(hwmod-common) $(secure-common)
 obj-$(CONFIG_SOC_AM43XX) += $(hwmod-common) $(secure-common)
 obj-$(CONFIG_SOC_DRA7XX) += $(hwmod-common) $(secure-common)
diff --git a/drivers/irqchip/Kconfig b/drivers/irqchip/Kconfig
index b8632bf..9d539de 100644
--- a/drivers/irqchip/Kconfig
+++ b/drivers/irqchip/Kconfig
@@ -75,6 +75,11 @@ config OR1K_PIC
bool
select IRQ_DOMAIN
 
+config OMAP_IRQCHIP
+   bool
+   select GENERIC_IRQ_CHIP
+   select IRQ_DOMAIN
+
 config ORION_IRQCHIP
bool
select IRQ_DOMAIN
diff --git a/drivers/irqchip/Makefile b/drivers/irqchip/Makefile
index 73052ba..d0a2613 100644
--- a/drivers/irqchip/Makefile
+++ b/drivers/irqchip/Makefile
@@ -13,6 +13,7 @@ obj-$(CONFIG_ARCH_MOXART) += irq-moxart.o
 obj-$(CONFIG_CLPS711X_IRQCHIP) += irq-clps711x.o
 obj-$(CONFIG_OR1K_PIC) += irq-or1k-pic.o
 obj-$(CONFIG_ORION_IRQCHIP)+= irq-orion.o
+obj-$(CONFIG_OMAP_IRQCHIP) += irq-omap-intc.o
 obj-$(CONFIG_ARCH_SUNXI)   += irq-sun4i.o
 obj-$(CONFIG_ARCH_SUNXI)   += irq-sunxi-nmi.o
 obj-$(CONFIG_ARCH_SPEAR3XX)+= spear-shirq.o
diff --git a/arch/arm/mach-omap2/irq.c b/drivers/irqchip/irq-omap-intc.c
similarity index 98%
rename from arch/arm/mach-omap2/irq.c
rename to drivers/irqchip/irq-omap-intc.c
index b2993e4..1478f1a 100644
--- a/arch/arm/mach-omap2/irq.c
+++ b/drivers/irqchip/irq-omap-intc.c
@@ -17,15 +17,16 @@
 #include linux/io.h
 
 #include asm/exception.h
-#include asm/mach/irq.h
 #include linux/irqdomain.h
 #include linux/of.h
 #include linux/of_address.h
 #include linux/of_irq.h
 
-#include soc.h
-#include common.h
-#include ../../drivers/irqchip/irqchip.h
+#include irqchip.h
+
+/* Define these here for now until we drop all board-files */
+#define OMAP24XX_IC_BASE   0x480fe000
+#define OMAP34XX_IC_BASE   0x4820
 
 /* selected INTC register offsets */
 
-- 
2.0.1.563.g66f467c

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[PATCH 9/9] irqchip: omap-intc: remove unnecessary comments

2014-09-15 Thread Felipe Balbi
no fuctional changes.

Acked-by: Jason Cooper ja...@lakedaemon.net
Signed-off-by: Felipe Balbi ba...@ti.com
---
 drivers/irqchip/irq-omap-intc.c | 9 -
 1 file changed, 9 deletions(-)

diff --git a/drivers/irqchip/irq-omap-intc.c b/drivers/irqchip/irq-omap-intc.c
index 976d4c1..f3814e7 100644
--- a/drivers/irqchip/irq-omap-intc.c
+++ b/drivers/irqchip/irq-omap-intc.c
@@ -56,14 +56,6 @@
 
 #define INTC_PROTECTION_ENABLE (1  0)
 
-/*
- * OMAP2 has a number of different interrupt controllers, each interrupt
- * controller is identified as its own bank. Register definitions are
- * fairly consistent for each bank, but not all registers are implemented
- * for each bank.. when in doubt, consult the TRM.
- */
-
-/* Structure to save interrupt controller context */
 struct omap_intc_regs {
u32 sysconfig;
u32 protection;
@@ -79,7 +71,6 @@ static void __iomem *omap_irq_base;
 static int omap_nr_pending = 3;
 static int omap_nr_irqs = 96;
 
-/* INTC bank register get/set */
 static void intc_writel(u32 reg, u32 val)
 {
writel_relaxed(val, omap_irq_base + reg);
-- 
2.0.1.563.g66f467c

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[PATCH 5/9] irqchip: omap-intc: remove unnecesary of_address_to_resource() call

2014-09-15 Thread Felipe Balbi
of_iomap(), which is called from omap_init_irq_of(),
already takes care of making sure we have a valid
resource to deal with. Because of that, we can
safely remove our explicit call to of_address_to_resource().

Acked-by: Jason Cooper ja...@lakedaemon.net
Signed-off-by: Felipe Balbi ba...@ti.com
---
 drivers/irqchip/irq-omap-intc.c | 6 --
 1 file changed, 6 deletions(-)

diff --git a/drivers/irqchip/irq-omap-intc.c b/drivers/irqchip/irq-omap-intc.c
index f4d562e..e97b535 100644
--- a/drivers/irqchip/irq-omap-intc.c
+++ b/drivers/irqchip/irq-omap-intc.c
@@ -362,7 +362,6 @@ void __init ti81xx_init_irq(void)
 static int __init intc_of_init(struct device_node *node,
 struct device_node *parent)
 {
-   struct resource res;
int ret;
 
omap_nr_pending = 3;
@@ -371,11 +370,6 @@ static int __init intc_of_init(struct device_node *node,
if (WARN_ON(!node))
return -ENODEV;
 
-   if (of_address_to_resource(node, 0, res)) {
-   WARN(1, unable to get intc registers\n);
-   return -EINVAL;
-   }
-
if (of_device_is_compatible(node, ti,am33xx-intc)) {
omap_nr_irqs = 128;
omap_nr_pending = 4;
-- 
2.0.1.563.g66f467c

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[PATCH 6/9] irqchip: omap-intc: enable IP protection

2014-09-15 Thread Felipe Balbi
When PROTECTION bit in enabled in PROTECTION
register, INTC's registers are only accessible
from privileged mode.

Acked-by: Jason Cooper ja...@lakedaemon.net
Signed-off-by: Felipe Balbi ba...@ti.com
---
 drivers/irqchip/irq-omap-intc.c | 22 --
 1 file changed, 20 insertions(+), 2 deletions(-)

diff --git a/drivers/irqchip/irq-omap-intc.c b/drivers/irqchip/irq-omap-intc.c
index e97b535..7681b13 100644
--- a/drivers/irqchip/irq-omap-intc.c
+++ b/drivers/irqchip/irq-omap-intc.c
@@ -51,6 +51,8 @@
 #define INTCPS_NR_ILR_REGS 128
 #define INTCPS_NR_MIR_REGS 3
 
+#define INTC_PROTECTION_ENABLE (1  0)
+
 /*
  * OMAP2 has a number of different interrupt controllers, each interrupt
  * controller is identified as its own bank. Register definitions are
@@ -290,12 +292,28 @@ static int __init omap_init_irq_legacy(u32 base)
return 0;
 }
 
+static void __init omap_irq_enable_protection(void)
+{
+   u32 reg;
+
+   reg = intc_readl(INTC_PROTECTION);
+   reg |= INTC_PROTECTION_ENABLE;
+   intc_writel(INTC_PROTECTION, reg);
+}
+
 static int __init omap_init_irq(u32 base, struct device_node *node)
 {
+   int ret;
+
if (node)
-   return omap_init_irq_of(node);
+   ret = omap_init_irq_of(node);
else
-   return omap_init_irq_legacy(base);
+   ret = omap_init_irq_legacy(base);
+
+   if (ret == 0)
+   omap_irq_enable_protection();
+
+   return ret;
 }
 
 static asmlinkage void __exception_irq_entry
-- 
2.0.1.563.g66f467c

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[PATCH 8/9] irqchip: omap-intc: correct maximum number or MIR registers

2014-09-15 Thread Felipe Balbi
maximum number of MIR register is 4, rather than 3.
Fix that.

Acked-by: Jason Cooper ja...@lakedaemon.net
Signed-off-by: Felipe Balbi ba...@ti.com
---
 drivers/irqchip/irq-omap-intc.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/irqchip/irq-omap-intc.c b/drivers/irqchip/irq-omap-intc.c
index dfa2d9d..976d4c1 100644
--- a/drivers/irqchip/irq-omap-intc.c
+++ b/drivers/irqchip/irq-omap-intc.c
@@ -49,7 +49,7 @@
 
 #define ACTIVEIRQ_MASK 0x7f/* omap2/3 active interrupt bits */
 #define INTCPS_NR_ILR_REGS 128
-#define INTCPS_NR_MIR_REGS 3
+#define INTCPS_NR_MIR_REGS 4
 
 #define INTC_IDLE_FUNCIDLE (1  0)
 #define INTC_IDLE_TURBO(1  1)
-- 
2.0.1.563.g66f467c

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[PATCH 1/9] irqchip: add irq-omap-intc.h header

2014-09-15 Thread Felipe Balbi
OMAP INTC irqchip driver will be moved under
drivers/irqchip/ soon but we still have a dependency
with mach-omap2 when it comes to idle functions.

In order to make it easy to share those function
prototypes with OMAP PM code, we introduce this new
header.

To avoid modifying several board-files and some of
the PM-related code, we just include the new header
from common.h which was already included by all
users of IRQ-related PM code.

Signed-off-by: Felipe Balbi ba...@ti.com
---
 arch/arm/mach-omap2/common.h  | 10 +-
 include/linux/irqchip/irq-omap-intc.h | 32 
 2 files changed, 33 insertions(+), 9 deletions(-)
 create mode 100644 include/linux/irqchip/irq-omap-intc.h

diff --git a/arch/arm/mach-omap2/common.h b/arch/arm/mach-omap2/common.h
index 1800093..377eea8 100644
--- a/arch/arm/mach-omap2/common.h
+++ b/arch/arm/mach-omap2/common.h
@@ -32,6 +32,7 @@
 #include linux/i2c/twl.h
 #include linux/i2c-omap.h
 #include linux/reboot.h
+#include linux/irqchip/irq-omap-intc.h
 
 #include asm/proc-fns.h
 
@@ -210,15 +211,6 @@ extern struct device *omap2_get_iva_device(void);
 extern struct device *omap2_get_l3_device(void);
 extern struct device *omap4_get_dsp_device(void);
 
-void omap2_init_irq(void);
-void omap3_init_irq(void);
-void ti81xx_init_irq(void);
-extern int omap_irq_pending(void);
-void omap_intc_save_context(void);
-void omap_intc_restore_context(void);
-void omap3_intc_suspend(void);
-void omap3_intc_prepare_idle(void);
-void omap3_intc_resume_idle(void);
 void omap_gic_of_init(void);
 
 #ifdef CONFIG_CACHE_L2X0
diff --git a/include/linux/irqchip/irq-omap-intc.h 
b/include/linux/irqchip/irq-omap-intc.h
new file mode 100644
index 000..e06b370
--- /dev/null
+++ b/include/linux/irqchip/irq-omap-intc.h
@@ -0,0 +1,32 @@
+/**
+ * irq-omap-intc.h - INTC Idle Functions
+ *
+ * Copyright (C) 2014 Texas Instruments Incorporated - http://www.ti.com
+ *
+ * Author: Felipe Balbi ba...@ti.com
+ *
+ * This program is free software: you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2  of
+ * the License as published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ */
+
+#ifndef __INCLUDE_LINUX_IRQCHIP_IRQ_OMAP_INTC_H
+#define __INCLUDE_LINUX_IRQCHIP_IRQ_OMAP_INTC_H
+
+void omap2_init_irq(void);
+void omap3_init_irq(void);
+void ti81xx_init_irq(void);
+
+int omap_irq_pending(void);
+void omap_intc_save_context(void);
+void omap_intc_restore_context(void);
+void omap3_intc_suspend(void);
+void omap3_intc_prepare_idle(void);
+void omap3_intc_resume_idle(void);
+
+#endif /* __INCLUDE_LINUX_IRQCHIP_IRQ_OMAP_INTC_H */
-- 
2.0.1.563.g66f467c

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[PATCH 3/9] irqchip: omap-intc: minor improvement to omap_irq_pending()

2014-09-15 Thread Felipe Balbi
We already hold the number of Pending registers
in omap_nr_pending. Let's use that instead.

Acked-by: Jason Cooper ja...@lakedaemon.net
Signed-off-by: Felipe Balbi ba...@ti.com
---
 drivers/irqchip/irq-omap-intc.c | 7 +++
 1 file changed, 3 insertions(+), 4 deletions(-)

diff --git a/drivers/irqchip/irq-omap-intc.c b/drivers/irqchip/irq-omap-intc.c
index 1478f1a..2933760 100644
--- a/drivers/irqchip/irq-omap-intc.c
+++ b/drivers/irqchip/irq-omap-intc.c
@@ -174,11 +174,10 @@ static void __init omap_irq_soft_reset(void)
 
 int omap_irq_pending(void)
 {
-   int irq;
+   int i;
 
-   for (irq = 0; irq  omap_nr_irqs; irq += 32)
-   if (intc_readl(INTC_PENDING_IRQ0 +
-   ((irq  5)  5)))
+   for (i = 0; i  omap_nr_pending; i++)
+   if (intc_readl(INTC_PENDING_IRQ0 + (0x20 * i)))
return 1;
return 0;
 }
-- 
2.0.1.563.g66f467c

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[PATCH 4/9] irqchip: omap-intc: comment style cleanup

2014-09-15 Thread Felipe Balbi
no functional changes, just making sure comment
follows Coding Style.

Acked-by: Jason Cooper ja...@lakedaemon.net
Signed-off-by: Felipe Balbi ba...@ti.com
---
 drivers/irqchip/irq-omap-intc.c | 6 --
 1 file changed, 4 insertions(+), 2 deletions(-)

diff --git a/drivers/irqchip/irq-omap-intc.c b/drivers/irqchip/irq-omap-intc.c
index 2933760..f4d562e 100644
--- a/drivers/irqchip/irq-omap-intc.c
+++ b/drivers/irqchip/irq-omap-intc.c
@@ -326,9 +326,11 @@ out:
}
} while (irqnr);
 
-   /* If an irq is masked or deasserted while active, we will
+   /*
+* If an irq is masked or deasserted while active, we will
 * keep ending up here with no irq handled. So remove it from
-* the INTC with an ack.*/
+* the INTC with an ack.
+*/
if (!handled_irq)
omap_ack_irq(NULL);
 }
-- 
2.0.1.563.g66f467c

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Re: [PATCH v4 5/7] ARM: EXYNOS: Add .write_sec outer cache callback for L2C-310

2014-09-15 Thread Tomasz Figa
 +static void exynos_l2_write_sec(unsigned long val, unsigned reg)
 +{
 +switch (reg) {
 +case L2X0_CTRL:
 +if (val  L2X0_CTRL_EN)
 +exynos_smc(SMC_CMD_L2X0INVALL, 0, 0, 0);
 
 If we're calling this with the cache already enabled, presumably you're
 doing this to cover the case where we're disabling the cache.

Can we ever call this with L2X0_CTRL_EN set in val, while the cache is
already enabled?

Anyway, calling of this firmware operation is necessary before enabling
the cache and this code is here to cover this requirement. Whether this
function simply invalidates the cache or does something else is unknown
to me, as all the information I got is that this needs to be done.

 
 1. Do you really want to *invalidate* the L2 cache, discarding its
contents?
 2. Don't you think that... if you needed something like this here, then
it could be a defficiency in the common code?
 
 If (2) doesn't apply, then should be a comment here why this is needed.
 

This is a quirk specific to Exynos firmware and I suspect it doesn't
even have anything to do with cache invalidation, but rather some
internal logic inside the firmware.

I agree, though, that a comment might be useful here.

Best regards,
Tomasz
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Re: [PATCH v4 6/7] ARM: EXYNOS: Add support for non-secure L2X0 resume

2014-09-15 Thread Tomasz Figa
On 15.09.2014 11:03, Russell King - ARM Linux wrote:
 diff --git a/arch/arm/mach-exynos/firmware.c 
 b/arch/arm/mach-exynos/firmware.c
 index 554b350..71bcfbd 100644
 --- a/arch/arm/mach-exynos/firmware.c
 +++ b/arch/arm/mach-exynos/firmware.c
 @@ -102,7 +102,9 @@ static int exynos_suspend(void)
  writel(EXYNOS_SLEEP_MAGIC, sysram_ns_base_addr + EXYNOS_BOOT_FLAG);
  writel(virt_to_phys(exynos_cpu_resume_ns),
  sysram_ns_base_addr + EXYNOS_BOOT_ADDR);
 -
 +#ifdef CONFIG_CACHE_L2X0
 +l2x0_regs_phys = virt_to_phys(l2x0_saved_regs);
 +#endif
 
 NAK.  Please look at how arch/arm/mm/l2c-l2x0-resume.S gets the address
 of this structure in assembly code.  The name of this variable is crap
 in any case.  It's not the registers, it's the saved registers.  So even
 more reason to kill this abomination, which incidentally, I've already
 killed off once before in the exynos code.
 

Right. The way l2c-l2x0-resume.S does this is much better. Somehow I
overlooked it when implementing this.

Best regards,
Tomasz
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Re: [PATCH] Input: palmas-pwrbutton: Fix typo in License

2014-09-15 Thread Dmitry Torokhov
On Mon, Sep 15, 2014 at 01:00:44PM -0500, Nishanth Menon wrote:
 On 09/15/2014 12:58 PM, Nishanth Menon wrote:
  Follow the license string convention indicated in include/linux/module.h
  (don't capitalize v).
  
  This fixes following randconfig warning:
  FATAL: modpost: GPL-incompatible module palmas-pwrbutton.ko uses GPL-only 
  symbol 'platform_driver_unregister'
  
 Uggh.. forgot to add:
 
 Fixes: adff5962fdd2 (Input: introduce palmas-pwrbutton)

Applied both, thank you.

 
  Cc: Stephen Rothwell s...@canb.auug.org.au
  Reported-by: Jim Davis jim.ep...@gmail.com
  Signed-off-by: Nishanth Menon n...@ti.com
  ---
  Reported thread http://marc.info/?l=linux-inputm=141080223209150w=2
  
   drivers/input/misc/palmas-pwrbutton.c |2 +-
   1 file changed, 1 insertion(+), 1 deletion(-)
  
  diff --git a/drivers/input/misc/palmas-pwrbutton.c 
  b/drivers/input/misc/palmas-pwrbutton.c
  index 3f90211..4ed6f78 100644
  --- a/drivers/input/misc/palmas-pwrbutton.c
  +++ b/drivers/input/misc/palmas-pwrbutton.c
  @@ -326,5 +326,5 @@ module_platform_driver(palmas_pwron_driver);
   
   MODULE_ALIAS(platform:palmas-pwrbutton);
   MODULE_DESCRIPTION(Palmas Power Button);
  -MODULE_LICENSE(GPL V2);
  +MODULE_LICENSE(GPL v2);
   MODULE_AUTHOR(Texas Instruments Inc.);
  
 
 -- 
 Regards,
 Nishanth Menon

-- 
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Re: [PATCH] PM / OPP: Remove ARCH_HAS_OPP completely

2014-09-15 Thread Simon Horman
On Fri, Sep 12, 2014 at 10:38:31AM +0200, Paul Bolle wrote:
 The Kconfig symbol ARCH_HAS_OPP became redundant in v3.16: commit
 049d595a4db3 (PM / OPP: Make OPP invisible to users in Kconfig)
 removed the only dependency that used it. Setting it had no effect
 anymore.
 
 So commit 78c5e0bb145d (PM / OPP: Remove ARCH_HAS_OPP) removed it. For
 some reason that commit did not remove all select statements for that
 symbol. These statements are useless. Remove them too.
 
 Signed-off-by: Paul Bolle pebo...@tiscali.nl
 ---
 Done on top of next-20140912. Tested with git grep only!

Hi Paul,

could you break the shmobile portion out into a separate patch
for me to take through my renesas tree?

I am concerned that taking those changes via a different
route will result in conflicts as arch/arm/mach-shmobile/Kconfig
is often updated.

  arch/arm/mach-omap2/Kconfig| 5 -
  arch/arm/mach-shmobile/Kconfig | 1 -
  drivers/devfreq/Kconfig| 1 -
  3 files changed, 7 deletions(-)
 
 diff --git a/arch/arm/mach-omap2/Kconfig b/arch/arm/mach-omap2/Kconfig
 index 5b103099626d..f138bd33a463 100644
 --- a/arch/arm/mach-omap2/Kconfig
 +++ b/arch/arm/mach-omap2/Kconfig
 @@ -22,7 +22,6 @@ config ARCH_OMAP4
   bool TI OMAP4
   depends on ARCH_MULTI_V7
   select ARCH_OMAP2PLUS
 - select ARCH_HAS_OPP
   select ARCH_NEEDS_CPU_IDLE_COUPLED if SMP
   select ARM_CPU_SUSPEND if PM
   select ARM_ERRATA_720789
 @@ -41,7 +40,6 @@ config SOC_OMAP5
   bool TI OMAP5
   depends on ARCH_MULTI_V7
   select ARCH_OMAP2PLUS
 - select ARCH_HAS_OPP
   select ARM_CPU_SUSPEND if PM
   select ARM_GIC
   select HAVE_ARM_SCU if SMP
 @@ -53,14 +51,12 @@ config SOC_AM33XX
   bool TI AM33XX
   depends on ARCH_MULTI_V7
   select ARCH_OMAP2PLUS
 - select ARCH_HAS_OPP
   select ARM_CPU_SUSPEND if PM
  
  config SOC_AM43XX
   bool TI AM43x
   depends on ARCH_MULTI_V7
   select ARCH_OMAP2PLUS
 - select ARCH_HAS_OPP
   select ARM_GIC
   select MACH_OMAP_GENERIC
   select MIGHT_HAVE_CACHE_L2X0
 @@ -69,7 +65,6 @@ config SOC_DRA7XX
   bool TI DRA7XX
   depends on ARCH_MULTI_V7
   select ARCH_OMAP2PLUS
 - select ARCH_HAS_OPP
   select ARM_CPU_SUSPEND if PM
   select ARM_GIC
   select HAVE_ARM_ARCH_TIMER
 diff --git a/arch/arm/mach-shmobile/Kconfig b/arch/arm/mach-shmobile/Kconfig
 index 21f457b56c01..f59019dd986e 100644
 --- a/arch/arm/mach-shmobile/Kconfig
 +++ b/arch/arm/mach-shmobile/Kconfig
 @@ -36,7 +36,6 @@ menuconfig ARCH_SHMOBILE_MULTI
   select NO_IOPORT_MAP
   select PINCTRL
   select ARCH_REQUIRE_GPIOLIB
 - select ARCH_HAS_OPP
  
  if ARCH_SHMOBILE_MULTI
  
 diff --git a/drivers/devfreq/Kconfig b/drivers/devfreq/Kconfig
 index 3dced0a9eae3..2227e9bf3884 100644
 --- a/drivers/devfreq/Kconfig
 +++ b/drivers/devfreq/Kconfig
 @@ -80,7 +80,6 @@ config ARM_EXYNOS4_BUS_DEVFREQ
  config ARM_EXYNOS5_BUS_DEVFREQ
   bool ARM Exynos5250 Bus DEVFREQ Driver
   depends on SOC_EXYNOS5250
 - select ARCH_HAS_OPP
   select DEVFREQ_GOV_SIMPLE_ONDEMAND
   select PM_OPP
   help
 -- 
 1.9.3
 
 
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Re: [PATCH] PM / OPP: Remove ARCH_HAS_OPP completely

2014-09-15 Thread Simon Horman
On Tue, Sep 16, 2014 at 09:09:17AM +0900, Simon Horman wrote:
 On Fri, Sep 12, 2014 at 10:38:31AM +0200, Paul Bolle wrote:
  The Kconfig symbol ARCH_HAS_OPP became redundant in v3.16: commit
  049d595a4db3 (PM / OPP: Make OPP invisible to users in Kconfig)
  removed the only dependency that used it. Setting it had no effect
  anymore.
  
  So commit 78c5e0bb145d (PM / OPP: Remove ARCH_HAS_OPP) removed it. For
  some reason that commit did not remove all select statements for that
  symbol. These statements are useless. Remove them too.
  
  Signed-off-by: Paul Bolle pebo...@tiscali.nl
  ---
  Done on top of next-20140912. Tested with git grep only!
 
 Hi Paul,
 
 could you break the shmobile portion out into a separate patch
 for me to take through my renesas tree?
 
 I am concerned that taking those changes via a different
 route will result in conflicts as arch/arm/mach-shmobile/Kconfig
 is often updated.

Of course the above comment is redundant if Rafael
has already taken this patch.

 
   arch/arm/mach-omap2/Kconfig| 5 -
   arch/arm/mach-shmobile/Kconfig | 1 -
   drivers/devfreq/Kconfig| 1 -
   3 files changed, 7 deletions(-)
  
  diff --git a/arch/arm/mach-omap2/Kconfig b/arch/arm/mach-omap2/Kconfig
  index 5b103099626d..f138bd33a463 100644
  --- a/arch/arm/mach-omap2/Kconfig
  +++ b/arch/arm/mach-omap2/Kconfig
  @@ -22,7 +22,6 @@ config ARCH_OMAP4
  bool TI OMAP4
  depends on ARCH_MULTI_V7
  select ARCH_OMAP2PLUS
  -   select ARCH_HAS_OPP
  select ARCH_NEEDS_CPU_IDLE_COUPLED if SMP
  select ARM_CPU_SUSPEND if PM
  select ARM_ERRATA_720789
  @@ -41,7 +40,6 @@ config SOC_OMAP5
  bool TI OMAP5
  depends on ARCH_MULTI_V7
  select ARCH_OMAP2PLUS
  -   select ARCH_HAS_OPP
  select ARM_CPU_SUSPEND if PM
  select ARM_GIC
  select HAVE_ARM_SCU if SMP
  @@ -53,14 +51,12 @@ config SOC_AM33XX
  bool TI AM33XX
  depends on ARCH_MULTI_V7
  select ARCH_OMAP2PLUS
  -   select ARCH_HAS_OPP
  select ARM_CPU_SUSPEND if PM
   
   config SOC_AM43XX
  bool TI AM43x
  depends on ARCH_MULTI_V7
  select ARCH_OMAP2PLUS
  -   select ARCH_HAS_OPP
  select ARM_GIC
  select MACH_OMAP_GENERIC
  select MIGHT_HAVE_CACHE_L2X0
  @@ -69,7 +65,6 @@ config SOC_DRA7XX
  bool TI DRA7XX
  depends on ARCH_MULTI_V7
  select ARCH_OMAP2PLUS
  -   select ARCH_HAS_OPP
  select ARM_CPU_SUSPEND if PM
  select ARM_GIC
  select HAVE_ARM_ARCH_TIMER
  diff --git a/arch/arm/mach-shmobile/Kconfig b/arch/arm/mach-shmobile/Kconfig
  index 21f457b56c01..f59019dd986e 100644
  --- a/arch/arm/mach-shmobile/Kconfig
  +++ b/arch/arm/mach-shmobile/Kconfig
  @@ -36,7 +36,6 @@ menuconfig ARCH_SHMOBILE_MULTI
  select NO_IOPORT_MAP
  select PINCTRL
  select ARCH_REQUIRE_GPIOLIB
  -   select ARCH_HAS_OPP
   
   if ARCH_SHMOBILE_MULTI
   
  diff --git a/drivers/devfreq/Kconfig b/drivers/devfreq/Kconfig
  index 3dced0a9eae3..2227e9bf3884 100644
  --- a/drivers/devfreq/Kconfig
  +++ b/drivers/devfreq/Kconfig
  @@ -80,7 +80,6 @@ config ARM_EXYNOS4_BUS_DEVFREQ
   config ARM_EXYNOS5_BUS_DEVFREQ
  bool ARM Exynos5250 Bus DEVFREQ Driver
  depends on SOC_EXYNOS5250
  -   select ARCH_HAS_OPP
  select DEVFREQ_GOV_SIMPLE_ONDEMAND
  select PM_OPP
  help
  -- 
  1.9.3
  
  
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[PATCH 03/12] ARM: dts: omap3-overo: Fix UART wake-up events

2014-09-15 Thread Tony Lindgren
Compared to legacy booting, we don't have wake-up events enabled
for device tree based booting. This means that if deeper idle
states are enabled, the device won't wake up to UART events and
seems like it has hung.

Let's fix that by adding the wake-up interrupt. Note that we
don't need to set the PIN_OFF_WAKEUPENABLE any longer, that's
handled by the wake-up interrupt when the serial driver does
request_irq on it.

Tested with the following on omap3-overo-summit that has the
ES2.1 omap:

#!/bin/bash

uarts=$(find /sys/class/tty/ttyO*/device/power/ -type d)
for uart in $uarts; do
echo 3000  $uart/autosuspend_delay_ms
done

uarts=$(find /sys/class/tty/ttyO*/power/ -type d)
for uart in $uarts; do
echo enabled  $uart/wakeup
echo auto  $uart/control
done

echo 1  /sys/kernel/debug/pm_debug/enable_off_mode

# grep -i uart /proc/interrupts
 90:   1085  INTC  74  OMAP UART2
338:  5   pinctrl 366  OMAP UART2

# grep ^core_pwrdm /sys/kernel/debug/pm_debug/count
core_pwrdm (ON),OFF:1654,RET:131,INA:39,ON:1825...

Signed-off-by: Tony Lindgren t...@atomide.com
---
 arch/arm/boot/dts/omap3-overo-common-peripherals.dtsi | 5 +++--
 1 file changed, 3 insertions(+), 2 deletions(-)

diff --git a/arch/arm/boot/dts/omap3-overo-common-peripherals.dtsi 
b/arch/arm/boot/dts/omap3-overo-common-peripherals.dtsi
index 5831bcc..520453d 100644
--- a/arch/arm/boot/dts/omap3-overo-common-peripherals.dtsi
+++ b/arch/arm/boot/dts/omap3-overo-common-peripherals.dtsi
@@ -36,8 +36,8 @@
 
uart3_pins: pinmux_uart3_pins {
pinctrl-single,pins = 
-   OMAP3_CORE1_IOPAD(0x219e, PIN_INPUT | 
PIN_OFF_WAKEUPENABLE | MUX_MODE0) /* uart3_rx_irrx.uart3_rx_irrx */
-   OMAP3_CORE1_IOPAD(0x21a0, PIN_OUTPUT | MUX_MODE0)   
/* uart3_tx_irtx.uart3_tx_irtx */
+   OMAP3_CORE1_IOPAD(0x219e, PIN_INPUT | MUX_MODE0)
/* uart3_rx_irrx.uart3_rx_irrx */
+   OMAP3_CORE1_IOPAD(0x21a0, PIN_OUTPUT | MUX_MODE0)   
/* uart3_tx_irtx.uart3_tx_irtx */
;
};
 };
@@ -88,6 +88,7 @@
 };
 
 uart3 {
+   interrupts-extended = intc 74 omap3_pmx_core OMAP3_UART3_RX;
pinctrl-names = default;
pinctrl-0 = uart3_pins;
 };
-- 
2.1.0

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[PATCH 02/12] ARM: OMAP3: Use force-idle for UARTs because of DMA errata

2014-09-15 Thread Tony Lindgren
In sprz318f.pdf Usage Note 2.7 says that UARTs cannot acknowledge
idle requests in smartidle mode when configured for DMA operations.
This prevents L4 from going idle. So let's use force-idle mode
instead and also force reconfiguring of the IO chain wake-up events.

Otherwise systems using Sebastian's 8250 patches with DMA will
never enter deeper idle states because of the errata above.

Cc: Paul Walmsley p...@pwsan.com
Cc: Sebastian Andrzej Siewior bige...@linutronix.de
Signed-off-by: Tony Lindgren t...@atomide.com
---
 arch/arm/mach-omap2/omap_hwmod_3xxx_data.c | 15 +++
 1 file changed, 11 insertions(+), 4 deletions(-)

diff --git a/arch/arm/mach-omap2/omap_hwmod_3xxx_data.c 
b/arch/arm/mach-omap2/omap_hwmod_3xxx_data.c
index 61cd49d..55f088c 100644
--- a/arch/arm/mach-omap2/omap_hwmod_3xxx_data.c
+++ b/arch/arm/mach-omap2/omap_hwmod_3xxx_data.c
@@ -490,7 +490,9 @@ static struct omap_hwmod omap3xxx_uart1_hwmod = {
.mpu_irqs   = omap2_uart1_mpu_irqs,
.sdma_reqs  = omap2_uart1_sdma_reqs,
.main_clk   = uart1_fck,
-   .flags  = DEBUG_TI81XXUART1_FLAGS | HWMOD_SWSUP_SIDLE_ACT,
+   .flags  = DEBUG_TI81XXUART1_FLAGS |
+   HWMOD_NO_OCP_AUTOIDLE | HWMOD_SWSUP_SIDLE |
+   HWMOD_FORCE_MSTANDBY | HWMOD_RECONFIG_IO_CHAIN,
.prcm   = {
.omap2 = {
.module_offs = CORE_MOD,
@@ -509,7 +511,9 @@ static struct omap_hwmod omap3xxx_uart2_hwmod = {
.mpu_irqs   = omap2_uart2_mpu_irqs,
.sdma_reqs  = omap2_uart2_sdma_reqs,
.main_clk   = uart2_fck,
-   .flags  = DEBUG_TI81XXUART2_FLAGS | HWMOD_SWSUP_SIDLE_ACT,
+   .flags  = DEBUG_TI81XXUART2_FLAGS |
+   HWMOD_NO_OCP_AUTOIDLE | HWMOD_SWSUP_SIDLE |
+   HWMOD_FORCE_MSTANDBY | HWMOD_RECONFIG_IO_CHAIN,
.prcm   = {
.omap2 = {
.module_offs = CORE_MOD,
@@ -529,7 +533,8 @@ static struct omap_hwmod omap3xxx_uart3_hwmod = {
.sdma_reqs  = omap2_uart3_sdma_reqs,
.main_clk   = uart3_fck,
.flags  = DEBUG_OMAP3UART3_FLAGS | DEBUG_TI81XXUART3_FLAGS |
-   HWMOD_SWSUP_SIDLE_ACT,
+   HWMOD_NO_OCP_AUTOIDLE | HWMOD_SWSUP_SIDLE |
+   HWMOD_FORCE_MSTANDBY | HWMOD_RECONFIG_IO_CHAIN,
.prcm   = {
.omap2 = {
.module_offs = OMAP3430_PER_MOD,
@@ -559,7 +564,9 @@ static struct omap_hwmod omap36xx_uart4_hwmod = {
.mpu_irqs   = uart4_mpu_irqs,
.sdma_reqs  = uart4_sdma_reqs,
.main_clk   = uart4_fck,
-   .flags  = DEBUG_OMAP3UART4_FLAGS | HWMOD_SWSUP_SIDLE_ACT,
+   .flags  = DEBUG_OMAP3UART4_FLAGS |
+   HWMOD_NO_OCP_AUTOIDLE | HWMOD_SWSUP_SIDLE |
+   HWMOD_FORCE_MSTANDBY | HWMOD_RECONFIG_IO_CHAIN,
.prcm   = {
.omap2 = {
.module_offs = OMAP3430_PER_MOD,
-- 
2.1.0

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[PATCH 09/12] ARM: omap2plus_defconfig: Add cpufreq to defconfig

2014-09-15 Thread Tony Lindgren
Note that we can now use the CONFIG_GENERIC_CPUFREQ_CPU0,
so let's only enable that.

Signed-off-by: Tony Lindgren t...@atomide.com
---
 arch/arm/configs/omap2plus_defconfig | 7 +++
 1 file changed, 7 insertions(+)

diff --git a/arch/arm/configs/omap2plus_defconfig 
b/arch/arm/configs/omap2plus_defconfig
index fc63855..9d232a5 100644
--- a/arch/arm/configs/omap2plus_defconfig
+++ b/arch/arm/configs/omap2plus_defconfig
@@ -43,6 +43,13 @@ CONFIG_ARM_APPENDED_DTB=y
 CONFIG_ARM_ATAG_DTB_COMPAT=y
 CONFIG_CMDLINE=root=/dev/mmcblk0p2 rootwait console=ttyO2,115200
 CONFIG_KEXEC=y
+CONFIG_CPU_FREQ=y
+CONFIG_CPU_FREQ_GOV_POWERSAVE=y
+CONFIG_CPU_FREQ_GOV_USERSPACE=y
+CONFIG_CPU_FREQ_GOV_ONDEMAND=y
+CONFIG_CPU_FREQ_GOV_CONSERVATIVE=y
+CONFIG_GENERIC_CPUFREQ_CPU0=y
+# CONFIG_ARM_OMAP2PLUS_CPUFREQ is not set
 CONFIG_CPU_IDLE=y
 CONFIG_BINFMT_MISC=y
 CONFIG_PM_DEBUG=y
-- 
2.1.0

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[PATCH 06/12] ARM: dts: Add support for Ethernet on some N900 macro boards

2014-09-15 Thread Tony Lindgren
As we have support for this in board-rx51-peripherals.c, let's
add it to the .dts files too.

Note that the reset GPIO will eventually go to the driver.
For now let's just pull it down and skip any further reset
in case the bootloader has configured the MAC address so
NFSroot works.

Also note that after 3430-sdp are using proper GPMC timings
we can remove the tests for smsc,lan91c94 in gpmc.c.

Signed-off-by: Tony Lindgren t...@atomide.com
---
 arch/arm/boot/dts/omap3-n900.dts   | 42 ++
 arch/arm/mach-omap2/pdata-quirks.c |  3 +++
 2 files changed, 45 insertions(+)

diff --git a/arch/arm/boot/dts/omap3-n900.dts b/arch/arm/boot/dts/omap3-n900.dts
index f0d8236..19a5857 100644
--- a/arch/arm/boot/dts/omap3-n900.dts
+++ b/arch/arm/boot/dts/omap3-n900.dts
@@ -134,6 +134,14 @@
;
};
 
+   ethernet_pins: pinmux_ethernet_pins {
+   pinctrl-single,pins = 
+   OMAP3_CORE1_IOPAD(0x20b4, PIN_INPUT_PULLDOWN | 
MUX_MODE4)   /* gpmc_ncs3.gpio_54 */
+   OMAP3_CORE1_IOPAD(0x20fc, PIN_OUTPUT | MUX_MODE4)   
/* dss_data16.gpio_86 */
+   OMAP3_CORE1_IOPAD(0x219c, PIN_OUTPUT | MUX_MODE4)   
/* uart3_rts_sd.gpio_164 */
+   ;
+   };
+
i2c1_pins: pinmux_i2c1_pins {
pinctrl-single,pins = 
0x18a (PIN_INPUT | MUX_MODE0)   /* i2c1_scl */
@@ -578,6 +586,8 @@
 
 gpmc {
ranges = 0 0 0x0400 0x1000; /* 256MB */
+   ranges = 0 0 0x0100 0x0100,   /* 16 MB for OneNAND */
+1 0 0x0200 0x0100;   /* 16 MB for smc91c96 */
 
/* gpio-irq for dma: 65 */
 
@@ -646,6 +656,38 @@
reg = 0x004c 0x0fb4;
};
};
+
+   ethernet@gpmc {
+   compatible = smsc,lan91c94;
+   interrupt-parent = gpio2;
+   interrupts = 22 IRQ_TYPE_LEVEL_HIGH;  /* gpio54 */
+   reg = 1 0x300 0xf;/* 16 byte IO range at offset 
0x300 */
+   bank-width = 2;
+   pinctrl-names = default;
+   pinctrl-0 = ethernet_pins;
+   gpmc,device-width = 2;
+   gpmc,sync-clk-ps = 0;
+   gpmc,cs-on-ns = 0;
+   gpmc,cs-rd-off-ns = 48;
+   gpmc,cs-wr-off-ns = 24;
+   gpmc,adv-on-ns = 0;
+   gpmc,adv-rd-off-ns = 0;
+   gpmc,adv-wr-off-ns = 0;
+   gpmc,we-on-ns = 12;
+   gpmc,we-off-ns = 18;
+   gpmc,oe-on-ns = 12;
+   gpmc,oe-off-ns = 48;
+   gpmc,page-burst-access-ns = 0;
+   gpmc,access-ns = 42;
+   gpmc,rd-cycle-ns = 180;
+   gpmc,wr-cycle-ns = 180;
+   gpmc,bus-turnaround-ns = 0;
+   gpmc,cycle2cycle-delay-ns = 0;
+   gpmc,wait-monitoring-ns = 0;
+   gpmc,clk-activation-ns = 0;
+   gpmc,wr-access-ns = 0;
+   gpmc,wr-data-mux-bus-ns = 12;
+   };
 };
 
 mcspi1 {
diff --git a/arch/arm/mach-omap2/pdata-quirks.c 
b/arch/arm/mach-omap2/pdata-quirks.c
index ead7736..540f3f8 100644
--- a/arch/arm/mach-omap2/pdata-quirks.c
+++ b/arch/arm/mach-omap2/pdata-quirks.c
@@ -252,6 +252,9 @@ static void __init nokia_n900_legacy_init(void)
platform_device_register(omap3_rom_rng_device);
 
}
+
+   /* Only on some development boards */
+   gpio_request_one(164, GPIOF_OUT_INIT_LOW, smc91x reset);
 }
 
 static void __init omap3_tao3530_legacy_init(void)
-- 
2.1.0

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[PATCH 08/12] ARM: omap2plus_defconfig: Shrink with savedefconfig

2014-09-15 Thread Tony Lindgren
This saves few lines and makes it easier to make patches
against omap2plus_defconfig.

Signed-off-by: Tony Lindgren t...@atomide.com
---
 arch/arm/configs/omap2plus_defconfig | 19 +++
 1 file changed, 3 insertions(+), 16 deletions(-)

diff --git a/arch/arm/configs/omap2plus_defconfig 
b/arch/arm/configs/omap2plus_defconfig
index f650f00..fc63855 100644
--- a/arch/arm/configs/omap2plus_defconfig
+++ b/arch/arm/configs/omap2plus_defconfig
@@ -32,7 +32,6 @@ CONFIG_SOC_OMAP5=y
 CONFIG_SOC_AM33XX=y
 CONFIG_SOC_AM43XX=y
 CONFIG_SOC_DRA7XX=y
-CONFIG_CACHE_L2X0=y
 CONFIG_ARM_THUMBEE=y
 CONFIG_ARM_ERRATA_411920=y
 CONFIG_SMP=y
@@ -44,7 +43,6 @@ CONFIG_ARM_APPENDED_DTB=y
 CONFIG_ARM_ATAG_DTB_COMPAT=y
 CONFIG_CMDLINE=root=/dev/mmcblk0p2 rootwait console=ttyO2,115200
 CONFIG_KEXEC=y
-CONFIG_FPE_NWFPE=y
 CONFIG_CPU_IDLE=y
 CONFIG_BINFMT_MISC=y
 CONFIG_PM_DEBUG=y
@@ -75,8 +73,6 @@ CONFIG_BT_HCIBCM203X=m
 CONFIG_BT_HCIBPA10X=m
 CONFIG_CFG80211=m
 CONFIG_MAC80211=m
-CONFIG_MAC80211_RC_PID=y
-CONFIG_MAC80211_RC_DEFAULT_PID=y
 CONFIG_UEVENT_HELPER_PATH=/sbin/hotplug
 CONFIG_DEVTMPFS=y
 CONFIG_DEVTMPFS_MOUNT=y
@@ -103,7 +99,6 @@ CONFIG_BMP085_I2C=m
 CONFIG_SENSORS_LIS3_I2C=m
 CONFIG_SCSI=y
 CONFIG_BLK_DEV_SD=y
-CONFIG_SCSI_MULTI_LUN=y
 CONFIG_SCSI_SCAN_ASYNC=y
 CONFIG_MD=y
 CONFIG_NETDEVICES=y
@@ -162,15 +157,12 @@ CONFIG_DEBUG_GPIO=y
 CONFIG_GPIO_SYSFS=y
 CONFIG_GPIO_TWL4030=y
 CONFIG_W1=y
-CONFIG_POWER_SUPPLY=y
 CONFIG_POWER_AVS=y
 CONFIG_SENSORS_LM75=m
 CONFIG_THERMAL=y
 CONFIG_THERMAL_GOV_FAIR_SHARE=y
 CONFIG_THERMAL_GOV_USER_SPACE=y
-CONFIG_CPU_THERMAL=y
 CONFIG_TI_SOC_THERMAL=y
-CONFIG_TI_THERMAL=y
 CONFIG_OMAP4_THERMAL=y
 CONFIG_OMAP5_THERMAL=y
 CONFIG_DRA752_THERMAL=y
@@ -183,8 +175,8 @@ CONFIG_MFD_TPS65217=y
 CONFIG_MFD_TPS65218=y
 CONFIG_MFD_TPS65910=y
 CONFIG_TWL6040_CORE=y
-CONFIG_REGULATOR_FIXED_VOLTAGE=y
 CONFIG_REGULATOR_PALMAS=y
+CONFIG_REGULATOR_PBIAS=y
 CONFIG_REGULATOR_TI_ABB=y
 CONFIG_REGULATOR_TPS65023=y
 CONFIG_REGULATOR_TPS6507X=y
@@ -192,7 +184,6 @@ CONFIG_REGULATOR_TPS65217=y
 CONFIG_REGULATOR_TPS65218=y
 CONFIG_REGULATOR_TPS65910=y
 CONFIG_REGULATOR_TWL4030=y
-CONFIG_REGULATOR_PBIAS=y
 CONFIG_FB=y
 CONFIG_FIRMWARE_EDID=y
 CONFIG_FB_MODE_HELPERS=y
@@ -221,8 +212,6 @@ CONFIG_SND_DEBUG=y
 CONFIG_SND_USB_AUDIO=m
 CONFIG_SND_SOC=m
 CONFIG_SND_OMAP_SOC=m
-CONFIG_SND_AM33XX_SOC_EVM=m
-CONFIG_SND_DAVINCI_SOC=m
 CONFIG_SND_OMAP_SOC_OMAP_TWL4030=m
 CONFIG_SND_OMAP_SOC_OMAP_ABE_TWL6040=m
 CONFIG_SND_OMAP_SOC_OMAP3_PANDORA=m
@@ -233,9 +222,6 @@ CONFIG_USB_WDM=y
 CONFIG_USB_STORAGE=y
 CONFIG_USB_DWC3=m
 CONFIG_USB_TEST=y
-CONFIG_NOP_USB_XCEIV=y
-CONFIG_OMAP_USB2=y
-CONFIG_TI_PIPE3=y
 CONFIG_AM335X_PHY_USB=y
 CONFIG_USB_GADGET=y
 CONFIG_USB_GADGET_DEBUG=y
@@ -243,7 +229,6 @@ CONFIG_USB_GADGET_DEBUG_FILES=y
 CONFIG_USB_GADGET_DEBUG_FS=y
 CONFIG_USB_ZERO=m
 CONFIG_MMC=y
-CONFIG_MMC_UNSAFE_RESUME=y
 CONFIG_SDIO_UART=y
 CONFIG_MMC_OMAP=y
 CONFIG_MMC_OMAP_HS=y
@@ -267,6 +252,8 @@ CONFIG_TI_EDMA=y
 CONFIG_DMA_OMAP=y
 CONFIG_EXTCON=y
 CONFIG_EXTCON_PALMAS=y
+CONFIG_OMAP_USB2=y
+CONFIG_TI_PIPE3=y
 CONFIG_EXT2_FS=y
 CONFIG_EXT3_FS=y
 # CONFIG_EXT3_FS_XATTR is not set
-- 
2.1.0

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[PATCH 05/12] ARM: dts: Do not set pulls for I2C lines

2014-09-15 Thread Tony Lindgren
There are external pulls on these lines and enabling the
internal pulls can cause issue. This is because the internal
pulls are parallel with the external pulls. So let's clear
the internal I2C pulls.

Signed-off-by: Tony Lindgren t...@atomide.com
---
 arch/arm/boot/dts/omap3-n900.dts | 12 ++--
 1 file changed, 6 insertions(+), 6 deletions(-)

diff --git a/arch/arm/boot/dts/omap3-n900.dts b/arch/arm/boot/dts/omap3-n900.dts
index 1fe45d1..f0d8236 100644
--- a/arch/arm/boot/dts/omap3-n900.dts
+++ b/arch/arm/boot/dts/omap3-n900.dts
@@ -136,22 +136,22 @@
 
i2c1_pins: pinmux_i2c1_pins {
pinctrl-single,pins = 
-   0x18a (PIN_INPUT_PULLUP | MUX_MODE0)/* i2c1_scl */
-   0x18c (PIN_INPUT_PULLUP | MUX_MODE0)/* i2c1_sda */
+   0x18a (PIN_INPUT | MUX_MODE0)   /* i2c1_scl */
+   0x18c (PIN_INPUT | MUX_MODE0)   /* i2c1_sda */
;
};
 
i2c2_pins: pinmux_i2c2_pins {
pinctrl-single,pins = 
-   0x18e (PIN_INPUT_PULLUP | MUX_MODE0)/* i2c2_scl */
-   0x190 (PIN_INPUT_PULLUP | MUX_MODE0)/* i2c2_sda */
+   0x18e (PIN_INPUT | MUX_MODE0)   /* i2c2_scl */
+   0x190 (PIN_INPUT | MUX_MODE0)   /* i2c2_sda */
;
};
 
i2c3_pins: pinmux_i2c3_pins {
pinctrl-single,pins = 
-   0x192 (PIN_INPUT_PULLUP | MUX_MODE0)/* i2c3_scl */
-   0x194 (PIN_INPUT_PULLUP | MUX_MODE0)/* i2c3_sda */
+   0x192 (PIN_INPUT | MUX_MODE0)   /* i2c3_scl */
+   0x194 (PIN_INPUT | MUX_MODE0)   /* i2c3_sda */
;
};
 
-- 
2.1.0

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[PATCH 04/12] ARM: dts: omap: Remove WAKEUPENABLE mux options for UARTs

2014-09-15 Thread Tony Lindgren
This is no longer needed as the device specific wake-up event
can now be specified with interrupts-extended property where
the second interrupt is the pinctrl-single register, such as
the UART3 RX pin.

Note that twl4030_omap3.dtsi needs to set WAKEUPENABLE for
off-idle to properly trigger the PMIC scripts. And GPIO pins
still need to set WAKEUPENABLE for wake-up events.

Signed-off-by: Tony Lindgren t...@atomide.com
---
 arch/arm/boot/dts/omap3-beagle-xm.dts | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/arch/arm/boot/dts/omap3-beagle-xm.dts 
b/arch/arm/boot/dts/omap3-beagle-xm.dts
index 1becefc..06a8aec 100644
--- a/arch/arm/boot/dts/omap3-beagle-xm.dts
+++ b/arch/arm/boot/dts/omap3-beagle-xm.dts
@@ -174,8 +174,8 @@
 
uart3_pins: pinmux_uart3_pins {
pinctrl-single,pins = 
-   0x16e (PIN_INPUT | PIN_OFF_WAKEUPENABLE | MUX_MODE0) /* 
uart3_rx_irrx.uart3_rx_irrx */
-   0x170 (PIN_OUTPUT | MUX_MODE0) /* 
uart3_tx_irtx.uart3_tx_irtx OUTPUT | MODE0 */
+   0x16e (PIN_INPUT | MUX_MODE0)   /* 
uart3_rx_irrx.uart3_rx_irrx */
+   0x170 (PIN_OUTPUT | MUX_MODE0)  /* 
uart3_tx_irtx.uart3_tx_irtx OUTPUT | MODE0 */
;
};
 
-- 
2.1.0

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[PATCH 01/12] ARM: OMAP2+: Add hwmod flag for HWMOD_RECONFIG_IO_CHAIN

2014-09-15 Thread Tony Lindgren
Commit cc824534d4fe (ARM: OMAP2+: hwmod: Rearm wake-up interrupts
for DT when MUSB is idled) fixed issues with hung UART wake-up
events by calling _reconfigure_io_chain() when MUSB is connected
or disconnected.

As pointed out by Paul Walmsley, we may need to also call
_reconfigure_io_chain() in other cases, so it should be a separate
flag. Let's add HWMOD_RECONFIG_IO_CHAIN as suggested by Paul.

Cc: Paul Walmsley p...@pwsan.com
Signed-off-by: Tony Lindgren t...@atomide.com
---
 arch/arm/mach-omap2/omap_hwmod.c   | 4 ++--
 arch/arm/mach-omap2/omap_hwmod.h   | 4 
 arch/arm/mach-omap2/omap_hwmod_3xxx_data.c | 4 ++--
 3 files changed, 8 insertions(+), 4 deletions(-)

diff --git a/arch/arm/mach-omap2/omap_hwmod.c b/arch/arm/mach-omap2/omap_hwmod.c
index 9e91a4e..bd9990e 100644
--- a/arch/arm/mach-omap2/omap_hwmod.c
+++ b/arch/arm/mach-omap2/omap_hwmod.c
@@ -2185,7 +2185,7 @@ static int _enable(struct omap_hwmod *oh)
 oh-mux-pads_dynamic))) {
omap_hwmod_mux(oh-mux, _HWMOD_STATE_ENABLED);
_reconfigure_io_chain();
-   } else if (oh-flags  HWMOD_FORCE_MSTANDBY) {
+   } else if (oh-flags  HWMOD_RECONFIG_IO_CHAIN) {
_reconfigure_io_chain();
}
 
@@ -2293,7 +2293,7 @@ static int _idle(struct omap_hwmod *oh)
if (oh-mux  oh-mux-pads_dynamic) {
omap_hwmod_mux(oh-mux, _HWMOD_STATE_IDLE);
_reconfigure_io_chain();
-   } else if (oh-flags  HWMOD_FORCE_MSTANDBY) {
+   } else if (oh-flags  HWMOD_RECONFIG_IO_CHAIN) {
_reconfigure_io_chain();
}
 
diff --git a/arch/arm/mach-omap2/omap_hwmod.h b/arch/arm/mach-omap2/omap_hwmod.h
index 0f97d63..512f809 100644
--- a/arch/arm/mach-omap2/omap_hwmod.h
+++ b/arch/arm/mach-omap2/omap_hwmod.h
@@ -514,6 +514,9 @@ struct omap_hwmod_omap4_prcm {
  * HWMOD_SWSUP_SIDLE_ACT: omap_hwmod code should manually bring the module
  * out of idle, but rely on smart-idle to the put it back in idle,
  * so the wakeups are still functional (Only known case for now is UART)
+ * HWMOD_RECONFIG_IO_CHAIN: omap_hwmod code needs to reconfigure wake-up 
+ * events by calling _reconfigure_io_chain() when a device is enabled
+ * or idled.
  */
 #define HWMOD_SWSUP_SIDLE  (1  0)
 #define HWMOD_SWSUP_MSTANDBY   (1  1)
@@ -528,6 +531,7 @@ struct omap_hwmod_omap4_prcm {
 #define HWMOD_BLOCK_WFI(1  10)
 #define HWMOD_FORCE_MSTANDBY   (1  11)
 #define HWMOD_SWSUP_SIDLE_ACT  (1  12)
+#define HWMOD_RECONFIG_IO_CHAIN(1  13)
 
 /*
  * omap_hwmod._int_flags definitions
diff --git a/arch/arm/mach-omap2/omap_hwmod_3xxx_data.c 
b/arch/arm/mach-omap2/omap_hwmod_3xxx_data.c
index e9516b4..61cd49d 100644
--- a/arch/arm/mach-omap2/omap_hwmod_3xxx_data.c
+++ b/arch/arm/mach-omap2/omap_hwmod_3xxx_data.c
@@ -1730,8 +1730,8 @@ static struct omap_hwmod omap3xxx_usbhsotg_hwmod = {
 * Note that musb has OTG_FORCESTDBY register that controls MSTANDBY
 * signal when MIDLEMODE is set to force-idle.
 */
-   .flags  = HWMOD_NO_OCP_AUTOIDLE | HWMOD_SWSUP_SIDLE
-   | HWMOD_FORCE_MSTANDBY,
+   .flags  = HWMOD_NO_OCP_AUTOIDLE | HWMOD_SWSUP_SIDLE |
+ HWMOD_FORCE_MSTANDBY | HWMOD_RECONFIG_IO_CHAIN,
 };
 
 /* usb_otg_hs */
-- 
2.1.0

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[PATCH 07/12] ARM: dts: Enable PMIC idle configuration for LDP

2014-09-15 Thread Tony Lindgren
With the IO chain reconfigure fixed, we can now enable the PMIC
scripts for LDP.

Note that at least on my es3.0 based LDP, the UART seems to be
flakey after wake-up events from off-idle and hangs but eventually
continues.

Signed-off-by: Tony Lindgren t...@atomide.com
---
 arch/arm/boot/dts/omap3-ldp.dts | 5 +
 1 file changed, 5 insertions(+)

diff --git a/arch/arm/boot/dts/omap3-ldp.dts b/arch/arm/boot/dts/omap3-ldp.dts
index af272c1..72dca0b 100644
--- a/arch/arm/boot/dts/omap3-ldp.dts
+++ b/arch/arm/boot/dts/omap3-ldp.dts
@@ -159,6 +159,11 @@
reg = 0x48;
interrupts = 7; /* SYS_NIRQ cascaded to intc */
interrupt-parent = intc;
+
+   twl_power: power {
+   compatible = ti,twl4030-power-idle;
+   ti,use_poweroff;
+   };
};
 };
 
-- 
2.1.0

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[PATCH 12/12] ARM: omap2plus_defconfig: Enable some display features

2014-09-15 Thread Tony Lindgren
Now that we have panel support for DT based booting,
let's make it usable and enable most things as modules.

Note that omap3 boards need also the ads7847 module for
the panel that we're now changing to a loadable module.
And n900 seems to require setting the brightness via
sysfs for acx565akm/brightness after modprobe of
panel_sony_acx565akm and omapfb.

Signed-off-by: Tony Lindgren t...@atomide.com
---
 arch/arm/configs/omap2plus_defconfig | 22 +-
 1 file changed, 21 insertions(+), 1 deletion(-)

diff --git a/arch/arm/configs/omap2plus_defconfig 
b/arch/arm/configs/omap2plus_defconfig
index 113f104..c029e5e 100644
--- a/arch/arm/configs/omap2plus_defconfig
+++ b/arch/arm/configs/omap2plus_defconfig
@@ -157,7 +157,9 @@ CONFIG_KEYBOARD_GPIO=y
 CONFIG_KEYBOARD_MATRIX=m
 CONFIG_KEYBOARD_TWL4030=y
 CONFIG_INPUT_TOUCHSCREEN=y
-CONFIG_TOUCHSCREEN_ADS7846=y
+CONFIG_TOUCHSCREEN_ADS7846=m
+CONFIG_TOUCHSCREEN_TSC2005=m
+CONFIG_TOUCHSCREEN_TSC2007=m
 CONFIG_INPUT_MISC=y
 CONFIG_INPUT_TWL4030_PWRBUTTON=y
 # CONFIG_LEGACY_PTYS is not set
@@ -220,6 +222,7 @@ CONFIG_FIRMWARE_EDID=y
 CONFIG_FB_MODE_HELPERS=y
 CONFIG_FB_TILEBLITTING=y
 CONFIG_OMAP2_DSS=m
+CONFIG_OMAP5_DSS_HDMI=y
 CONFIG_OMAP2_DSS_SDI=y
 CONFIG_OMAP2_DSS_DSI=y
 CONFIG_FB_OMAP2=m
@@ -227,11 +230,25 @@ CONFIG_DISPLAY_ENCODER_TFP410=m
 CONFIG_DISPLAY_ENCODER_TPD12S015=m
 CONFIG_DISPLAY_CONNECTOR_DVI=m
 CONFIG_DISPLAY_CONNECTOR_HDMI=m
+CONFIG_DISPLAY_CONNECTOR_ANALOG_TV=m
 CONFIG_DISPLAY_PANEL_DPI=m
+CONFIG_DISPLAY_PANEL_DSI_CM=m
+CONFIG_DISPLAY_PANEL_SONY_ACX565AKM=m
+CONFIG_DISPLAY_PANEL_LGPHILIPS_LB035Q02=m
+CONFIG_DISPLAY_PANEL_SHARP_LS037V7DW01=m
+CONFIG_DISPLAY_PANEL_TPO_TD028TTEC1=m
+CONFIG_DISPLAY_PANEL_TPO_TD043MTEA1=m
+CONFIG_DISPLAY_PANEL_NEC_NL8048HL11=m
 CONFIG_BACKLIGHT_LCD_SUPPORT=y
 CONFIG_LCD_CLASS_DEVICE=y
 CONFIG_LCD_PLATFORM=y
+CONFIG_BACKLIGHT_CLASS_DEVICE=y
+CONFIG_BACKLIGHT_GENERIC=m
+CONFIG_BACKLIGHT_PWM=m
+CONFIG_BACKLIGHT_PANDORA=m
+CONFIG_BACKLIGHT_GPIO=m
 CONFIG_FRAMEBUFFER_CONSOLE=y
+CONFIG_FRAMEBUFFER_CONSOLE_DETECT_PRIMARY=y
 CONFIG_FRAMEBUFFER_CONSOLE_ROTATION=y
 CONFIG_LOGO=y
 CONFIG_SOUND=m
@@ -283,6 +300,9 @@ CONFIG_TI_EDMA=y
 CONFIG_DMA_OMAP=y
 CONFIG_EXTCON=y
 CONFIG_EXTCON_PALMAS=y
+CONFIG_PWM=y
+CONFIG_PWM_TWL=y
+CONFIG_PWM_TWL_LED=y
 CONFIG_OMAP_USB2=y
 CONFIG_TI_PIPE3=y
 CONFIG_EXT2_FS=y
-- 
2.1.0

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[PATCH 11/12] ARM: omap2plus_defconfig: Enable battery and reset drivers

2014-09-15 Thread Tony Lindgren
Since many omaps run on battery, we should have the battery
drivers enabled. Let's also enable the reset driver.

Signed-off-by: Tony Lindgren t...@atomide.com
---
 arch/arm/configs/omap2plus_defconfig | 7 +++
 1 file changed, 7 insertions(+)

diff --git a/arch/arm/configs/omap2plus_defconfig 
b/arch/arm/configs/omap2plus_defconfig
index 8e6c363..113f104 100644
--- a/arch/arm/configs/omap2plus_defconfig
+++ b/arch/arm/configs/omap2plus_defconfig
@@ -181,6 +181,13 @@ CONFIG_DEBUG_GPIO=y
 CONFIG_GPIO_SYSFS=y
 CONFIG_GPIO_TWL4030=y
 CONFIG_W1=y
+CONFIG_BATTERY_BQ27x00=m
+CONFIG_CHARGER_ISP1704=m
+CONFIG_CHARGER_TWL4030=m
+CONFIG_CHARGER_BQ2415X=m
+CONFIG_CHARGER_BQ24190=m
+CONFIG_CHARGER_BQ24735=m
+CONFIG_POWER_RESET=y
 CONFIG_POWER_AVS=y
 CONFIG_SENSORS_LM75=m
 CONFIG_THERMAL=y
-- 
2.1.0

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[PATCH 10/12] ARM: omap2plus_defconfig: Add support for distros with systemd

2014-09-15 Thread Tony Lindgren
Some distros are now using systemd, so let's enable most of
what's recommended at:

http://cgit.freedesktop.org/systemd/systemd/tree/README

Signed-off-by: Tony Lindgren t...@atomide.com
---
 arch/arm/configs/omap2plus_defconfig | 24 ++--
 1 file changed, 22 insertions(+), 2 deletions(-)

diff --git a/arch/arm/configs/omap2plus_defconfig 
b/arch/arm/configs/omap2plus_defconfig
index 9d232a5..8e6c363 100644
--- a/arch/arm/configs/omap2plus_defconfig
+++ b/arch/arm/configs/omap2plus_defconfig
@@ -1,11 +1,28 @@
 CONFIG_SYSVIPC=y
 CONFIG_POSIX_MQUEUE=y
+CONFIG_FHANDLE=y
+CONFIG_AUDIT=y
 CONFIG_NO_HZ=y
 CONFIG_HIGH_RES_TIMERS=y
 CONFIG_BSD_PROCESS_ACCT=y
 CONFIG_IKCONFIG=y
 CONFIG_IKCONFIG_PROC=y
 CONFIG_LOG_BUF_SHIFT=16
+CONFIG_CGROUPS=y
+CONFIG_CGROUP_FREEZER=y
+CONFIG_CGROUP_DEVICE=y
+CONFIG_CPUSETS=y
+CONFIG_CGROUP_CPUACCT=y
+CONFIG_RESOURCE_COUNTERS=y
+CONFIG_MEMCG=y
+CONFIG_MEMCG_SWAP=y
+CONFIG_MEMCG_KMEM=y
+CONFIG_CGROUP_PERF=y
+CONFIG_CGROUP_SCHED=y
+CONFIG_CFS_BANDWIDTH=y
+CONFIG_RT_GROUP_SCHED=y
+CONFIG_BLK_CGROUP=y
+CONFIG_NAMESPACES=y
 CONFIG_BLK_DEV_INITRD=y
 CONFIG_EXPERT=y
 CONFIG_SLAB=y
@@ -37,6 +54,7 @@ CONFIG_ARM_ERRATA_411920=y
 CONFIG_SMP=y
 CONFIG_NR_CPUS=2
 CONFIG_CMA=y
+CONFIG_SECCOMP=y
 CONFIG_ZBOOT_ROM_TEXT=0x0
 CONFIG_ZBOOT_ROM_BSS=0x0
 CONFIG_ARM_APPENDED_DTB=y
@@ -66,7 +84,7 @@ CONFIG_IP_PNP_DHCP=y
 CONFIG_IP_PNP_BOOTP=y
 CONFIG_IP_PNP_RARP=y
 # CONFIG_INET_LRO is not set
-# CONFIG_IPV6 is not set
+CONFIG_IPV6=y
 CONFIG_NETFILTER=y
 CONFIG_CAN=m
 CONFIG_CAN_C_CAN=m
@@ -80,7 +98,6 @@ CONFIG_BT_HCIBCM203X=m
 CONFIG_BT_HCIBPA10X=m
 CONFIG_CFG80211=m
 CONFIG_MAC80211=m
-CONFIG_UEVENT_HELPER_PATH=/sbin/hotplug
 CONFIG_DEVTMPFS=y
 CONFIG_DEVTMPFS_MOUNT=y
 CONFIG_DMA_CMA=y
@@ -265,11 +282,14 @@ CONFIG_EXT2_FS=y
 CONFIG_EXT3_FS=y
 # CONFIG_EXT3_FS_XATTR is not set
 CONFIG_EXT4_FS=y
+CONFIG_FANOTIFY=y
 CONFIG_QUOTA=y
 CONFIG_QFMT_V2=y
+CONFIG_AUTOFS4_FS=y
 CONFIG_MSDOS_FS=y
 CONFIG_VFAT_FS=y
 CONFIG_TMPFS=y
+CONFIG_TMPFS_POSIX_ACL=y
 CONFIG_JFFS2_FS=y
 CONFIG_JFFS2_SUMMARY=y
 CONFIG_JFFS2_FS_XATTR=y
-- 
2.1.0

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Re: [PATCH 08/12] ARM: omap2plus_defconfig: Shrink with savedefconfig

2014-09-15 Thread Felipe Balbi
Hi,

On Mon, Sep 15, 2014 at 08:12:02PM -0700, Tony Lindgren wrote:
 This saves few lines and makes it easier to make patches
 against omap2plus_defconfig.
 
 Signed-off-by: Tony Lindgren t...@atomide.com

while at that, can you enable voluntary preemption ?

-- 
balbi


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