Re: [PATCH] ARM: dts: sbc-t3x: add DVI display data
Hi Dmitry,
On 10/15/14 12:09, Dmitry Lifshitz wrote:
Add DSS related pinmux and display data nodes required to support
DVI video out on SBC-T3530, SBC-T3730 and SBC-T3517.
Signed-off-by: Dmitry Lifshitz lifsh...@compulab.co.il
---
arch/arm/boot/dts/omap3-cm-t3517.dts | 22 +++
arch/arm/boot/dts/omap3-cm-t3530.dts | 22 +++
arch/arm/boot/dts/omap3-cm-t3730.dts | 24
arch/arm/boot/dts/omap3-cm-t3x.dtsi | 28 +++
arch/arm/boot/dts/omap3-sb-t35.dtsi | 49
+
arch/arm/boot/dts/omap3-sbc-t3517.dts | 14 +
arch/arm/boot/dts/omap3-sbc-t3530.dts | 14 +
arch/arm/boot/dts/omap3-sbc-t3730.dts | 14 +
8 files changed, 187 insertions(+), 0 deletions(-)
[...]
diff --git a/arch/arm/boot/dts/omap3-cm-t3730.dts
b/arch/arm/boot/dts/omap3-cm-t3730.dts
index b3f9a50..4b36d80 100644
--- a/arch/arm/boot/dts/omap3-cm-t3730.dts
+++ b/arch/arm/boot/dts/omap3-cm-t3730.dts
@@ -31,6 +31,19 @@
};
};
+omap3_pmx_wkup {
+ dss_dpi_pins_cm_t3730: pinmux_dss_dpi_pins_cm_t3730 {
+ pinctrl-single,pins =
+ 0x0a (PIN_OUTPUT | MUX_MODE3) /* sys_boot0.dss_data18
*/
+ 0x0c (PIN_OUTPUT | MUX_MODE3) /* sys_boot1.dss_data19
*/
+ 0x10 (PIN_OUTPUT | MUX_MODE3) /* sys_boot3.dss_data20
*/
+ 0x12 (PIN_OUTPUT | MUX_MODE3) /* sys_boot4.dss_data21
*/
+ 0x14 (PIN_OUTPUT | MUX_MODE3) /* sys_boot5.dss_data22
*/
+ 0x16 (PIN_OUTPUT | MUX_MODE3) /* sys_boot6.dss_data23
*/
Can't you use macros here as well?
+ ;
+ };
+};
+
[...]
diff --git a/arch/arm/boot/dts/omap3-cm-t3x.dtsi
b/arch/arm/boot/dts/omap3-cm-t3x.dtsi
index c671a22..6b6c2f4 100644
--- a/arch/arm/boot/dts/omap3-cm-t3x.dtsi
+++ b/arch/arm/boot/dts/omap3-cm-t3x.dtsi
@@ -76,6 +76,34 @@
OMAP3_CORE1_IOPAD(0x21e2, PIN_OUTPUT | MUX_MODE4)
/* sys_clkout2.gpio_186 */
;
};
+
+ dss_dpi_pins_common: pinmux_dss_dpi_pins_common {
+ pinctrl-single,pins =
+ OMAP3_CORE1_IOPAD(0x20d4, PIN_OUTPUT | MUX_MODE0)
/* dss_pclk.dss_pclk */
+ OMAP3_CORE1_IOPAD(0x20d6, PIN_OUTPUT | MUX_MODE0)
/* dss_hsync.dss_hsync */
+ OMAP3_CORE1_IOPAD(0x20d8, PIN_OUTPUT | MUX_MODE0)
/* dss_vsync.dss_vsync */
+ OMAP3_CORE1_IOPAD(0x20da, PIN_OUTPUT | MUX_MODE0)
/* dss_acbias.dss_acbias */
+
+ OMAP3_CORE1_IOPAD(0x20e8, PIN_OUTPUT | MUX_MODE0)
/* dss_data6.dss_data6 */
+ OMAP3_CORE1_IOPAD(0x20ea, PIN_OUTPUT | MUX_MODE0)
/* dss_data7.dss_data7 */
+ OMAP3_CORE1_IOPAD(0x20ec, PIN_OUTPUT | MUX_MODE0)
/* dss_data8.dss_data8 */
+ OMAP3_CORE1_IOPAD(0x20ee, PIN_OUTPUT | MUX_MODE0)
/* dss_data9.dss_data9 */
+ OMAP3_CORE1_IOPAD(0x20f0, PIN_OUTPUT | MUX_MODE0)
/* dss_data10.dss_data10 */
+ OMAP3_CORE1_IOPAD(0x20f2, PIN_OUTPUT | MUX_MODE0)
/* dss_data11.dss_data11 */
+ OMAP3_CORE1_IOPAD(0x20f4, PIN_OUTPUT | MUX_MODE0)
/* dss_data12.dss_data12 */
+ OMAP3_CORE1_IOPAD(0x20f6, PIN_OUTPUT | MUX_MODE0)
/* dss_data13.dss_data13 */
+ OMAP3_CORE1_IOPAD(0x20f8, PIN_OUTPUT | MUX_MODE0)
/* dss_data14.dss_data14 */
+ OMAP3_CORE1_IOPAD(0x20fa, PIN_OUTPUT | MUX_MODE0)
/* dss_data15.dss_data15 */
+ OMAP3_CORE1_IOPAD(0x20fc, PIN_OUTPUT | MUX_MODE0)
/* dss_data16.dss_data16 */
+ OMAP3_CORE1_IOPAD(0x20fe, PIN_OUTPUT | MUX_MODE0)
/* dss_data17.dss_data17 */
+ OMAP3_CORE1_IOPAD(0x2100, PIN_OUTPUT | MUX_MODE0)
/* dss_data18.dss_data18 */
+ OMAP3_CORE1_IOPAD(0x2102, PIN_OUTPUT | MUX_MODE0)
/* dss_data19.dss_data19 */
+ OMAP3_CORE1_IOPAD(0x2104, PIN_OUTPUT | MUX_MODE0)
/* dss_data20.dss_data20 */
+ OMAP3_CORE1_IOPAD(0x2106, PIN_OUTPUT | MUX_MODE0)
/* dss_data21.dss_data21 */
+ OMAP3_CORE1_IOPAD(0x2108, PIN_OUTPUT | MUX_MODE0)
/* dss_data22.dss_data22 */
+ OMAP3_CORE1_IOPAD(0x210a, PIN_OUTPUT | MUX_MODE0)
/* dss_data23.dss_data23 */
+ ;
+ };
I would also define the second set of pins used for cm-t3530 and cm-t3517 here.
So you will not have to duplicate them too.
[...]
--
Regards,
Igor.
--
To unsubscribe from this list: send the line unsubscribe linux-omap in
the body of a message to majord...@vger.kernel.org
More majordomo info at http://vger.kernel.org/majordomo-info.html
[PATCH v3 0/2] Add DRA7xx CPSW Ethernet support in Device Tree
Adding device tree entry for CPSW to make it work in Dual EMAC mode. These patches were tested with DRA7 hwmod patches on top of linux-next. Patches are tested on top of Nishanth's PM tree for v3.17 [1] and pushed my tree to [2]. Did a boot test with CPSW and ping test with suspend/resume, the boot logs on DRA7xx EVM are posted at [3] [1] git://github.com/nmenon/linux-2.6-playground.git testing/v3.17/cpu-idle-suspend-dra7-omap5-framework [2] git://git.ti.com/~mugunthanvnm/ti-linux-kernel/linux.git v3.17/dra7-evm-cpsw-v3 [3] http://pastebin.ubuntu.com/8613072/ Changes from v2: * Changed pinctrl comments to hold mode0-name.mode-selected-name * Changes slave numbers in the pinctrl comments * Added cpsw and cpts clocks Changes from initial version: * Dropped patch for pinoff states * Changed pinoff state to mode15 Mugunthan V N (2): ARM: dts: dra7: Add CPSW and MDIO module nodes for dra7 ARM: dts: dra7-evm: Enable CPSW and MDIO for dra7xx EVM arch/arm/boot/dts/dra7-evm.dts | 106 + arch/arm/boot/dts/dra7.dtsi| 61 2 files changed, 167 insertions(+) -- 2.1.2.484.g13da0fc -- To unsubscribe from this list: send the line unsubscribe linux-omap in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
[PATCH v3 2/2] ARM: dts: dra7-evm: Enable CPSW and MDIO for dra7xx EVM
Adding CPSW phy-id, CPSW and MDIO pinmux configuration for active and
sleep states and enable them in board evm dts file.
Signed-off-by: Mugunthan V N mugunthan...@ti.com
---
arch/arm/boot/dts/dra7-evm.dts | 106 +
1 file changed, 106 insertions(+)
diff --git a/arch/arm/boot/dts/dra7-evm.dts b/arch/arm/boot/dts/dra7-evm.dts
index 518a6c0..3be2630 100644
--- a/arch/arm/boot/dts/dra7-evm.dts
+++ b/arch/arm/boot/dts/dra7-evm.dts
@@ -171,6 +171,86 @@
0xd0(PIN_OUTPUT | MUX_MODE0)/*
gpmc_be0n_cle */
;
};
+
+ cpsw_default: cpsw_default {
+ pinctrl-single,pins =
+ /* Slave 1 */
+ 0x250 (PIN_OUTPUT | MUX_MODE0) /*
rgmii0_txc.rgmii0_txc */
+ 0x254 (PIN_OUTPUT | MUX_MODE0) /*
rgmii0_txctl.rgmii0_txctl */
+ 0x258 (PIN_OUTPUT | MUX_MODE0) /*
rgmii0_td3.rgmii0_txd3 */
+ 0x25c (PIN_OUTPUT | MUX_MODE0) /*
rgmii0_txd2.rgmii0_txd2 */
+ 0x260 (PIN_OUTPUT | MUX_MODE0) /*
rgmii0_txd1.rgmii0_txd1 */
+ 0x264 (PIN_OUTPUT | MUX_MODE0) /*
rgmii0_txd0.rgmii0_txd0 */
+ 0x268 (PIN_INPUT | MUX_MODE0) /*
rgmii0_rxc.rgmii0_rxc */
+ 0x26c (PIN_INPUT | MUX_MODE0) /*
rgmii0_rxctl.rgmii0_rxctl */
+ 0x270 (PIN_INPUT | MUX_MODE0) /*
rgmii0_rxd3.rgmii0_rxd3 */
+ 0x274 (PIN_INPUT | MUX_MODE0) /*
rgmii0_rxd2.rgmii0_rxd2 */
+ 0x278 (PIN_INPUT | MUX_MODE0) /*
rgmii0_rxd1.rgmii0_rxd1 */
+ 0x27c (PIN_INPUT | MUX_MODE0) /*
rgmii0_rxd0.rgmii0_rxd0 */
+
+ /* Slave 2 */
+ 0x198 (PIN_OUTPUT | MUX_MODE3) /* vin2a_d12.rgmii1_txc
*/
+ 0x19c (PIN_OUTPUT | MUX_MODE3) /*
vin2a_d13.rgmii1_tctl */
+ 0x1a0 (PIN_OUTPUT | MUX_MODE3) /* vin2a_d14.rgmii1_td3
*/
+ 0x1a4 (PIN_OUTPUT | MUX_MODE3) /* vin2a_d15.rgmii1_td2
*/
+ 0x1a8 (PIN_OUTPUT | MUX_MODE3) /* vin2a_d16.rgmii1_td1
*/
+ 0x1ac (PIN_OUTPUT | MUX_MODE3) /* vin2a_d17.rgmii1_td0
*/
+ 0x1b0 (PIN_INPUT | MUX_MODE3) /*
vin2a_d18.rgmii1_rclk */
+ 0x1b4 (PIN_INPUT | MUX_MODE3) /*
vin2a_d19.rgmii1_rctl */
+ 0x1b8 (PIN_INPUT | MUX_MODE3) /* vin2a_d20.rgmii1_rd3
*/
+ 0x1bc (PIN_INPUT | MUX_MODE3) /* vin2a_d21.rgmii1_rd2
*/
+ 0x1c0 (PIN_INPUT | MUX_MODE3) /* vin2a_d22.rgmii1_rd1
*/
+ 0x1c4 (PIN_INPUT | MUX_MODE3) /* vin2a_d23.rgmii1_rd0
*/
+ ;
+
+ };
+
+ cpsw_sleep: cpsw_sleep {
+ pinctrl-single,pins =
+ /* Slave 1 */
+ 0x250 (MUX_MODE15)
+ 0x254 (MUX_MODE15)
+ 0x258 (MUX_MODE15)
+ 0x25c (MUX_MODE15)
+ 0x260 (MUX_MODE15)
+ 0x264 (MUX_MODE15)
+ 0x268 (MUX_MODE15)
+ 0x26c (MUX_MODE15)
+ 0x270 (MUX_MODE15)
+ 0x274 (MUX_MODE15)
+ 0x278 (MUX_MODE15)
+ 0x27c (MUX_MODE15)
+
+ /* Slave 2 */
+ 0x198 (MUX_MODE15)
+ 0x19c (MUX_MODE15)
+ 0x1a0 (MUX_MODE15)
+ 0x1a4 (MUX_MODE15)
+ 0x1a8 (MUX_MODE15)
+ 0x1ac (MUX_MODE15)
+ 0x1b0 (MUX_MODE15)
+ 0x1b4 (MUX_MODE15)
+ 0x1b8 (MUX_MODE15)
+ 0x1bc (MUX_MODE15)
+ 0x1c0 (MUX_MODE15)
+ 0x1c4 (MUX_MODE15)
+ ;
+ };
+
+ davinci_mdio_default: davinci_mdio_default {
+ pinctrl-single,pins =
+ 0x23c (PIN_OUTPUT_PULLUP | MUX_MODE0) /*
mdio_d.mdio_d */
+ 0x240 (PIN_INPUT_PULLUP | MUX_MODE0)/*
mdio_clk.mdio_clk */
+ ;
+ };
+
+ davinci_mdio_sleep: davinci_mdio_sleep {
+ pinctrl-single,pins =
+ 0x23c (MUX_MODE15)
+ 0x240 (MUX_MODE15)
+ ;
+ };
+
};
i2c1 {
@@ -528,3 +608,29 @@
ti,no-reset-on-init;
ti,no-idle-on-init;
};
+
+mac {
+ status = okay;
+ pinctrl-names = default, sleep;
+ pinctrl-0 = cpsw_default;
+ pinctrl-1 = cpsw_sleep;
+ dual_emac;
+};
+
+cpsw_emac0 {
+ phy_id = davinci_mdio, 2;
+ phy-mode = rgmii;
+ dual_emac_res_vlan = 1;
+};
+
+cpsw_emac1 {
+ phy_id = davinci_mdio, 3;
+
[PATCH v3 1/2] ARM: dts: dra7: Add CPSW and MDIO module nodes for dra7
Add CPSW and MDIO related device tree data for DRA7XX and made as status
disabled. Phy-id, pinmux for active and sleep state needs to be added in
board dts files and enable the CPSW device.
Signed-off-by: Mugunthan V N mugunthan...@ti.com
---
arch/arm/boot/dts/dra7.dtsi | 61 +
1 file changed, 61 insertions(+)
diff --git a/arch/arm/boot/dts/dra7.dtsi b/arch/arm/boot/dts/dra7.dtsi
index 9cc9843..56f5275 100644
--- a/arch/arm/boot/dts/dra7.dtsi
+++ b/arch/arm/boot/dts/dra7.dtsi
@@ -34,6 +34,8 @@
serial3 = uart4;
serial4 = uart5;
serial5 = uart6;
+ ethernet0 = cpsw_emac0;
+ ethernet1 = cpsw_emac1;
};
timer {
@@ -1265,6 +1267,65 @@
ti,irqs-skip = 10 133 139 140;
ti,irqs-safe-map = 0;
};
+
+ mac: ethernet@4a10 {
+ compatible = ti,cpsw;
+ ti,hwmods = gmac;
+ clocks = dpll_gmac_ck, gmac_gmii_ref_clk_div;
+ clock-names = fck, cpts;
+ cpdma_channels = 8;
+ ale_entries = 1024;
+ bd_ram_size = 0x2000;
+ no_bd_ram = 0;
+ rx_descs = 64;
+ mac_control = 0x20;
+ slaves = 2;
+ active_slave = 0;
+ cpts_clock_mult = 0x8000;
+ cpts_clock_shift = 29;
+ reg = 0x48484000 0x1000
+ 0x48485200 0x2E00;
+ #address-cells = 1;
+ #size-cells = 1;
+ /*
+* rx_thresh_pend
+* rx_pend
+* tx_pend
+* misc_pend
+*/
+ interrupts = GIC_SPI 334 IRQ_TYPE_LEVEL_HIGH,
+GIC_SPI 335 IRQ_TYPE_LEVEL_HIGH,
+GIC_SPI 336 IRQ_TYPE_LEVEL_HIGH,
+GIC_SPI 337 IRQ_TYPE_LEVEL_HIGH;
+ ranges;
+ status = disabled;
+
+ davinci_mdio: mdio@48485000 {
+ compatible = ti,davinci_mdio;
+ #address-cells = 1;
+ #size-cells = 0;
+ ti,hwmods = davinci_mdio;
+ bus_freq = 100;
+ reg = 0x48485000 0x100;
+ };
+
+ cpsw_emac0: slave@48480200 {
+ /* Filled in by U-Boot */
+ mac-address = [ 00 00 00 00 00 00 ];
+ };
+
+ cpsw_emac1: slave@48480300 {
+ /* Filled in by U-Boot */
+ mac-address = [ 00 00 00 00 00 00 ];
+ };
+
+ phy_sel: cpsw-phy-sel@4a002554 {
+ compatible = ti,dra7xx-cpsw-phy-sel;
+ reg= 0x4a002554 0x4;
+ reg-names = gmii-sel;
+ };
+ };
+
};
};
--
2.1.2.484.g13da0fc
--
To unsubscribe from this list: send the line unsubscribe linux-omap in
the body of a message to majord...@vger.kernel.org
More majordomo info at http://vger.kernel.org/majordomo-info.html
Re: [PATCH v3 0/2] Add DRA7xx CPSW Ethernet support in Device Tree
Nishanth On Tuesday 21 October 2014 03:30 PM, Mugunthan V N wrote: Adding device tree entry for CPSW to make it work in Dual EMAC mode. These patches were tested with DRA7 hwmod patches on top of linux-next. Patches are tested on top of Nishanth's PM tree for v3.17 [1] and pushed my tree to [2]. Did a boot test with CPSW and ping test with suspend/resume, the boot logs on DRA7xx EVM are posted at [3] [1] git://github.com/nmenon/linux-2.6-playground.git testing/v3.17/cpu-idle-suspend-dra7-omap5-framework [2] git://git.ti.com/~mugunthanvnm/ti-linux-kernel/linux.git v3.17/dra7-evm-cpsw-v3 [3] http://pastebin.ubuntu.com/8613072/ Changes from v2: * Changed pinctrl comments to hold mode0-name.mode-selected-name * Changes slave numbers in the pinctrl comments * Added cpsw and cpts clocks I have not added support for dra72x-evm as it has only slave no 2 pinned out and having issues with bringing up the interface, need some more time to submit the patch, in the mean time I have submitted dra7-evm support only so that people can use dra7-evm on linux-next. Regards Mugunthan V N -- To unsubscribe from this list: send the line unsubscribe linux-omap in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
[PATCH 0/4] ARM: dts: dra72-evm: NAND and USB support
Hi Tony, These patches add NAND and USB support for DRA72-evm. Patches are for v3.19 and based on v3.18-rc1. I've tested that NAND and USB host works fine on DRA72-evm. I couldn't get USB gadget mode to work. It doesn't work on DRA7-evm either. There seems to be some issue at the driver level. The dts entries are correct though. cheers, -roger George Cherian (1): ARM: dts: dra72-evm: Enable USB support for dra72-evm. Roger Quadros (3): ARM: dts: dra72-evm: Add NAND support ARM: dts: DRA7: Move USB_OTG 4 to dra74x.dtsi ARM: dts: dra72-evm: Add regulator information to USB2 PHYs arch/arm/boot/dts/dra7.dtsi | 20 -- arch/arm/boot/dts/dra72-evm.dts | 147 arch/arm/boot/dts/dra74x.dtsi | 22 ++ 3 files changed, 169 insertions(+), 20 deletions(-) -- 1.8.3.2 -- To unsubscribe from this list: send the line unsubscribe linux-omap in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
[PATCH 2/4] ARM: dts: DRA7: Move USB_OTG 4 to dra74x.dtsi
The 4th USB controller instance present only on the DRA74x family of
devices so move it there.
Signed-off-by: Roger Quadros rog...@ti.com
Acked-by: Nishanth Menon n...@ti.com
Signed-off-by: Sekhar Nori nsek...@ti.com
---
arch/arm/boot/dts/dra7.dtsi | 20
arch/arm/boot/dts/dra74x.dtsi | 22 ++
2 files changed, 22 insertions(+), 20 deletions(-)
diff --git a/arch/arm/boot/dts/dra7.dtsi b/arch/arm/boot/dts/dra7.dtsi
index 9cc9843..ea243e0 100644
--- a/arch/arm/boot/dts/dra7.dtsi
+++ b/arch/arm/boot/dts/dra7.dtsi
@@ -1204,26 +1204,6 @@
};
};
- omap_dwc3_4@4894 {
- compatible = ti,dwc3;
- ti,hwmods = usb_otg_ss4;
- reg = 0x4894 0x1;
- interrupts = GIC_SPI 346 IRQ_TYPE_LEVEL_HIGH;
- #address-cells = 1;
- #size-cells = 1;
- utmi-mode = 2;
- ranges;
- status = disabled;
- usb4: usb@4895 {
- compatible = snps,dwc3;
- reg = 0x4895 0x17000;
- interrupts = GIC_SPI 345 IRQ_TYPE_LEVEL_HIGH;
- tx-fifo-resize;
- maximum-speed = high-speed;
- dr_mode = otg;
- };
- };
-
elm: elm@48078000 {
compatible = ti,am3352-elm;
reg = 0x48078000 0xfc0; /* device IO registers */
diff --git a/arch/arm/boot/dts/dra74x.dtsi b/arch/arm/boot/dts/dra74x.dtsi
index 3be544c..5667b92 100644
--- a/arch/arm/boot/dts/dra74x.dtsi
+++ b/arch/arm/boot/dts/dra74x.dtsi
@@ -44,4 +44,26 @@
interrupts = GIC_SPI DIRECT_IRQ(131) IRQ_TYPE_LEVEL_HIGH,
GIC_SPI DIRECT_IRQ(132) IRQ_TYPE_LEVEL_HIGH;
};
+
+ ocp {
+ omap_dwc3_4@4894 {
+ compatible = ti,dwc3;
+ ti,hwmods = usb_otg_ss4;
+ reg = 0x4894 0x1;
+ interrupts = GIC_SPI 346 IRQ_TYPE_LEVEL_HIGH;
+ #address-cells = 1;
+ #size-cells = 1;
+ utmi-mode = 2;
+ ranges;
+ status = disabled;
+ usb4: usb@4895 {
+ compatible = snps,dwc3;
+ reg = 0x4895 0x17000;
+ interrupts = GIC_SPI 345 IRQ_TYPE_LEVEL_HIGH;
+ tx-fifo-resize;
+ maximum-speed = high-speed;
+ dr_mode = otg;
+ };
+ };
+ };
};
--
1.8.3.2
--
To unsubscribe from this list: send the line unsubscribe linux-omap in
the body of a message to majord...@vger.kernel.org
More majordomo info at http://vger.kernel.org/majordomo-info.html
[PATCH 1/4] ARM: dts: dra72-evm: Add NAND support
DRA72-evm has a 256MB 16-bit wide NAND chip. Add
pinmux and NAND node.
The NAND chips 'Chip select' and 'Write protect' can be
controlled using DIP Switch SW5. To use NAND,
the switch must be configured like so:
SW5.1 (NAND_SELn) = ON (LOW)
SW5.9 (GPMC_WPN) = OFF (HIGH)
Signed-off-by: Roger Quadros rog...@ti.com
Signed-off-by: Sekhar Nori nsek...@ti.com
---
arch/arm/boot/dts/dra72-evm.dts | 115
1 file changed, 115 insertions(+)
diff --git a/arch/arm/boot/dts/dra72-evm.dts b/arch/arm/boot/dts/dra72-evm.dts
index 4107428..6f5417a 100644
--- a/arch/arm/boot/dts/dra72-evm.dts
+++ b/arch/arm/boot/dts/dra72-evm.dts
@@ -26,6 +26,33 @@
0x404 (PIN_INPUT | MUX_MODE0) /* i2c1_scl.i2c1_scl */
;
};
+
+ nand_default: nand_default {
+ pinctrl-single,pins =
+ 0x0 (PIN_INPUT | MUX_MODE0) /* gpmc_ad0 */
+ 0x4 (PIN_INPUT | MUX_MODE0) /* gpmc_ad1 */
+ 0x8 (PIN_INPUT | MUX_MODE0) /* gpmc_ad2 */
+ 0xc (PIN_INPUT | MUX_MODE0) /* gpmc_ad3 */
+ 0x10(PIN_INPUT | MUX_MODE0) /* gpmc_ad4 */
+ 0x14(PIN_INPUT | MUX_MODE0) /* gpmc_ad5 */
+ 0x18(PIN_INPUT | MUX_MODE0) /* gpmc_ad6 */
+ 0x1c(PIN_INPUT | MUX_MODE0) /* gpmc_ad7 */
+ 0x20(PIN_INPUT | MUX_MODE0) /* gpmc_ad8 */
+ 0x24(PIN_INPUT | MUX_MODE0) /* gpmc_ad9 */
+ 0x28(PIN_INPUT | MUX_MODE0) /* gpmc_ad10 */
+ 0x2c(PIN_INPUT | MUX_MODE0) /* gpmc_ad11 */
+ 0x30(PIN_INPUT | MUX_MODE0) /* gpmc_ad12 */
+ 0x34(PIN_INPUT | MUX_MODE0) /* gpmc_ad13 */
+ 0x38(PIN_INPUT | MUX_MODE0) /* gpmc_ad14 */
+ 0x3c(PIN_INPUT | MUX_MODE0) /* gpmc_ad15 */
+ 0xb4(PIN_OUTPUT | MUX_MODE0) /* gpmc_cs0 */
+ 0xc4(PIN_OUTPUT | MUX_MODE0) /* gpmc_advn_ale */
+ 0xcc(PIN_OUTPUT | MUX_MODE0) /* gpmc_wen */
+ 0xc8(PIN_OUTPUT | MUX_MODE0) /* gpmc_oen_ren */
+ 0xd0(PIN_OUTPUT | MUX_MODE0) /* gpmc_ben0 */
+ 0xd8(PIN_INPUT | MUX_MODE0) /* gpmc_wait0 */
+ ;
+ };
};
i2c1 {
@@ -142,3 +169,91 @@
uart1 {
status = okay;
};
+
+elm {
+ status = okay;
+};
+
+gpmc {
+ status = okay;
+ pinctrl-names = default;
+ pinctrl-0 = nand_default;
+ ranges = 0 0 0 0x0100;/* minimum GPMC partition = 16MB */
+ nand@0,0 {
+ /* To use NAND, DIP switch SW5 must be set like so:
+* SW5.1 (NAND_SELn) = ON (LOW)
+* SW5.9 (GPMC_WPN) = OFF (HIGH)
+*/
+ reg = 0 0 4; /* device IO registers */
+ ti,nand-ecc-opt = bch8;
+ ti,elm-id = elm;
+ nand-bus-width = 16;
+ gpmc,device-width = 2;
+ gpmc,sync-clk-ps = 0;
+ gpmc,cs-on-ns = 0;
+ gpmc,cs-rd-off-ns = 80;
+ gpmc,cs-wr-off-ns = 80;
+ gpmc,adv-on-ns = 0;
+ gpmc,adv-rd-off-ns = 60;
+ gpmc,adv-wr-off-ns = 60;
+ gpmc,we-on-ns = 10;
+ gpmc,we-off-ns = 50;
+ gpmc,oe-on-ns = 4;
+ gpmc,oe-off-ns = 40;
+ gpmc,access-ns = 40;
+ gpmc,wr-access-ns = 80;
+ gpmc,rd-cycle-ns = 80;
+ gpmc,wr-cycle-ns = 80;
+ gpmc,bus-turnaround-ns = 0;
+ gpmc,cycle2cycle-delay-ns = 0;
+ gpmc,clk-activation-ns = 0;
+ gpmc,wait-monitoring-ns = 0;
+ gpmc,wr-data-mux-bus-ns = 0;
+ /* MTD partition table */
+ /* All SPL-* partitions are sized to minimal length
+* which can be independently programmable. For
+* NAND flash this is equal to size of erase-block */
+ #address-cells = 1;
+ #size-cells = 1;
+ partition@0 {
+ label = NAND.SPL;
+ reg = 0x 0x2;
+ };
+ partition@1 {
+ label = NAND.SPL.backup1;
+ reg = 0x0002 0x0002;
+ };
+ partition@2 {
+ label = NAND.SPL.backup2;
+ reg = 0x0004 0x0002;
+ };
+ partition@3 {
+ label = NAND.SPL.backup3;
+ reg = 0x0006 0x0002;
+ };
+ partition@4 {
+ label = NAND.u-boot-spl-os;
+
[PATCH 4/4] ARM: dts: dra72-evm: Add regulator information to USB2 PHYs
The ldo4_reg regulator provides power to the USB1 and USB2
High Speed PHYs.
Signed-off-by: Roger Quadros rog...@ti.com
---
arch/arm/boot/dts/dra72-evm.dts | 8
1 file changed, 8 insertions(+)
diff --git a/arch/arm/boot/dts/dra72-evm.dts b/arch/arm/boot/dts/dra72-evm.dts
index ad6ec4a..b135aab 100644
--- a/arch/arm/boot/dts/dra72-evm.dts
+++ b/arch/arm/boot/dts/dra72-evm.dts
@@ -270,6 +270,14 @@
};
};
+usb2_phy1 {
+ phy-supply = ldo4_reg;
+};
+
+usb2_phy2 {
+ phy-supply = ldo4_reg;
+};
+
usb1 {
dr_mode = peripheral;
pinctrl-names = default;
--
1.8.3.2
--
To unsubscribe from this list: send the line unsubscribe linux-omap in
the body of a message to majord...@vger.kernel.org
More majordomo info at http://vger.kernel.org/majordomo-info.html
[PATCH 3/4] ARM: dts: dra72-evm: Enable USB support for dra72-evm.
From: George Cherian george.cher...@ti.com
Add USB data and pinctrl for USB.
Signed-off-by: George Cherian george.cher...@ti.com
Signed-off-by: Sekhar Nori nsek...@ti.com
Signed-off-by: Roger Quadros rog...@ti.com
---
arch/arm/boot/dts/dra72-evm.dts | 24
1 file changed, 24 insertions(+)
diff --git a/arch/arm/boot/dts/dra72-evm.dts b/arch/arm/boot/dts/dra72-evm.dts
index 6f5417a..ad6ec4a 100644
--- a/arch/arm/boot/dts/dra72-evm.dts
+++ b/arch/arm/boot/dts/dra72-evm.dts
@@ -53,6 +53,18 @@
0xd8(PIN_INPUT | MUX_MODE0) /* gpmc_wait0 */
;
};
+
+ usb1_pins: pinmux_usb1_pins {
+ pinctrl-single,pins =
+ 0x280 (PIN_INPUT_SLEW | MUX_MODE0) /* usb1_drvvbus */
+ ;
+ };
+
+ usb2_pins: pinmux_usb2_pins {
+ pinctrl-single,pins =
+ 0x284 (PIN_INPUT_SLEW | MUX_MODE0) /* usb2_drvvbus */
+ ;
+ };
};
i2c1 {
@@ -257,3 +269,15 @@
};
};
};
+
+usb1 {
+ dr_mode = peripheral;
+ pinctrl-names = default;
+ pinctrl-0 = usb1_pins;
+};
+
+usb2 {
+ dr_mode = host;
+ pinctrl-names = default;
+ pinctrl-0 = usb2_pins;
+};
--
1.8.3.2
--
To unsubscribe from this list: send the line unsubscribe linux-omap in
the body of a message to majord...@vger.kernel.org
More majordomo info at http://vger.kernel.org/majordomo-info.html
[PATCH] ARM: dts: am335x-evm: Fix 5th NAND partition's name
The 5th NAND partition should be named NAND.u-boot-spl-os
instead of NAND.u-boot-spl. This is to be consistent with other
TI boards as well as u-boot.
Fixes: 91994facdd2d (ARM: dts: am335x-evm: NAND: update MTD partition table)
Signed-off-by: Roger Quadros rog...@ti.com
Signed-off-by: Sekhar Nori nsek...@ti.com
---
arch/arm/boot/dts/am335x-evm.dts | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/arch/arm/boot/dts/am335x-evm.dts b/arch/arm/boot/dts/am335x-evm.dts
index e2156a5..c4b968f 100644
--- a/arch/arm/boot/dts/am335x-evm.dts
+++ b/arch/arm/boot/dts/am335x-evm.dts
@@ -489,7 +489,7 @@
reg = 0x0006 0x0002;
};
partition@4 {
- label = NAND.u-boot-spl;
+ label = NAND.u-boot-spl-os;
reg = 0x0008 0x0004;
};
partition@5 {
--
1.8.3.2
--
To unsubscribe from this list: send the line unsubscribe linux-omap in
the body of a message to majord...@vger.kernel.org
More majordomo info at http://vger.kernel.org/majordomo-info.html
Re: understanding cpuidle
Hi Ran,
On Thu, Oct 16, 2014 at 1:12 PM, Ran Shalit ransha...@gmail.com wrote:
Hello,
I try to understand the cpuidle main concept but have some
difficulties. I could not find any documentation to explain the
cpuidle.
what does it mean that it enters idle when no thread to run ?if I
have only one process which does only
while(1)
{
printf(C);
mdelay(1000);
}
Can I expect it to enter idle for 1 second and then print C and get
again to idle ?
Your code will not go to cpu idle, because it is mdelay(), which is a
busy looping.
If you have used msleep(), you are relinquishing the cpu.
Considering the fact that you have only one process running in your
system, no other process in runnable state, kernel schedules the
swapper(or idle) process.
And you will enter into cpu idle.
Thanks,
Arun
Thanks
Ran
___
Kernelnewbies mailing list
kernelnewb...@kernelnewbies.org
http://lists.kernelnewbies.org/mailman/listinfo/kernelnewbies
--
To unsubscribe from this list: send the line unsubscribe linux-omap in
the body of a message to majord...@vger.kernel.org
More majordomo info at http://vger.kernel.org/majordomo-info.html
[PATCH 1/5] ARM: OMAP2+: gpmc: Print error message in set_gpmc_timing_reg()
Simplify set_gpmc_timing_reg() and always print error message
if the requested timing cannot be achieved due to a too fast
GPMC functional clock, irrespective if whether DEBUG is defined
or not. This should help us debug timing configuration issues,
which were otherwise simply not being displayed in the kernel log.
Signed-off-by: Roger Quadros rog...@ti.com
Signed-off-by: Sekhar Nori nsek...@ti.com
---
arch/arm/mach-omap2/gpmc.c | 23 ++-
1 file changed, 6 insertions(+), 17 deletions(-)
diff --git a/arch/arm/mach-omap2/gpmc.c b/arch/arm/mach-omap2/gpmc.c
index 5fa3755..45f680f 100644
--- a/arch/arm/mach-omap2/gpmc.c
+++ b/arch/arm/mach-omap2/gpmc.c
@@ -283,13 +283,8 @@ static void gpmc_cs_bool_timings(int cs, const struct
gpmc_bool_timings *p)
p-cycle2cyclediffcsen);
}
-#ifdef DEBUG
static int set_gpmc_timing_reg(int cs, int reg, int st_bit, int end_bit,
int time, const char *name)
-#else
-static int set_gpmc_timing_reg(int cs, int reg, int st_bit, int end_bit,
- int time)
-#endif
{
u32 l;
int ticks, mask, nr_bits;
@@ -299,15 +294,15 @@ static int set_gpmc_timing_reg(int cs, int reg, int
st_bit, int end_bit,
else
ticks = gpmc_ns_to_ticks(time);
nr_bits = end_bit - st_bit + 1;
- if (ticks = 1 nr_bits) {
-#ifdef DEBUG
- printk(KERN_INFO GPMC CS%d: %-10s* %3d ns, %3d ticks = %d\n,
- cs, name, time, ticks, 1 nr_bits);
-#endif
+ mask = (1 nr_bits) - 1;
+
+ if (ticks mask) {
+ pr_err(%s: GPMC error! CS%d: %s: %d ns, %d ticks %d\n,
+ __func__, cs, name, time, ticks, mask);
+
return -1;
}
- mask = (1 nr_bits) - 1;
l = gpmc_cs_read_reg(cs, reg);
#ifdef DEBUG
printk(KERN_INFO
@@ -322,16 +317,10 @@ static int set_gpmc_timing_reg(int cs, int reg, int
st_bit, int end_bit,
return 0;
}
-#ifdef DEBUG
#define GPMC_SET_ONE(reg, st, end, field) \
if (set_gpmc_timing_reg(cs, (reg), (st), (end), \
t-field, #field) 0) \
return -1
-#else
-#define GPMC_SET_ONE(reg, st, end, field) \
- if (set_gpmc_timing_reg(cs, (reg), (st), (end), t-field) 0) \
- return -1
-#endif
int gpmc_calc_divider(unsigned int sync_clk)
{
--
1.8.3.2
--
To unsubscribe from this list: send the line unsubscribe linux-omap in
the body of a message to majord...@vger.kernel.org
More majordomo info at http://vger.kernel.org/majordomo-info.html
[PATCH 2/5] ARM: OMAP2+: gpmc: Error out if timings fail in gpmc_probe_generic_child()
gpmc_cs_set_timings() returns non-zero if there was
an error while setting the GPMC timings. e.g. Timing was too
large to be accomodated with current GPMC clock frequency and available
timing range. Fail in this case, else we risk operating a NOR device
with non compliant timings.
Signed-off-by: Roger Quadros rog...@ti.com
Signed-off-by: Sekhar Nori nsek...@ti.com
---
arch/arm/mach-omap2/gpmc.c | 7 ++-
1 file changed, 6 insertions(+), 1 deletion(-)
diff --git a/arch/arm/mach-omap2/gpmc.c b/arch/arm/mach-omap2/gpmc.c
index 45f680f..f5d9dd2 100644
--- a/arch/arm/mach-omap2/gpmc.c
+++ b/arch/arm/mach-omap2/gpmc.c
@@ -1562,7 +1562,12 @@ static int gpmc_probe_generic_child(struct
platform_device *pdev,
goto err;
gpmc_read_timings_dt(child, gpmc_t);
- gpmc_cs_set_timings(cs, gpmc_t);
+ ret = gpmc_cs_set_timings(cs, gpmc_t);
+ if (ret) {
+ dev_err(pdev-dev, failed to set gpmc timings for: %s\n,
+ child-name);
+ goto err;
+ }
no_timings:
if (of_platform_device_create(child, NULL, pdev-dev))
--
1.8.3.2
--
To unsubscribe from this list: send the line unsubscribe linux-omap in
the body of a message to majord...@vger.kernel.org
More majordomo info at http://vger.kernel.org/majordomo-info.html
[PATCH 3/5] ARM: OMAP2+: gpmc: Always enable A26-A11 for non NAND devices
Although RESET state of LIMITEDADDRESS bit in GPMC_CONFIG register
is 0 (i.e. A26-A11 enabled), faulty bootloaders might accidentally
set this bit. e.g. u-boot 2014.07 with CONFIG_NOR disabled.
Explicity disable LIMITEDADDRESS bit for non NAND devices so that
they can always work.
Signed-off-by: Roger Quadros rog...@ti.com
Signed-off-by: Sekhar Nori nsek...@ti.com
---
arch/arm/mach-omap2/gpmc.c | 8
1 file changed, 8 insertions(+)
diff --git a/arch/arm/mach-omap2/gpmc.c b/arch/arm/mach-omap2/gpmc.c
index f5d9dd2..0ba95d3 100644
--- a/arch/arm/mach-omap2/gpmc.c
+++ b/arch/arm/mach-omap2/gpmc.c
@@ -85,6 +85,8 @@
#define GPMC_ECC_CTRL_ECCREG8 0x008
#define GPMC_ECC_CTRL_ECCREG9 0x009
+#define GPMC_CONFIG_LIMITEDADDRESS BIT(1)
+
#defineGPMC_CONFIG2_CSEXTRADELAY BIT(7)
#defineGPMC_CONFIG3_ADVEXTRADELAY BIT(7)
#defineGPMC_CONFIG4_OEEXTRADELAY BIT(7)
@@ -1501,6 +1503,7 @@ static int gpmc_probe_generic_child(struct
platform_device *pdev,
struct resource res;
unsigned long base;
int ret, cs;
+ u32 val;
if (of_property_read_u32(child, reg, cs) 0) {
dev_err(pdev-dev, %s has no 'reg' property\n,
@@ -1569,6 +1572,11 @@ static int gpmc_probe_generic_child(struct
platform_device *pdev,
goto err;
}
+ /* Clear limited address i.e. enable A26-A11 */
+ val = gpmc_read_reg(GPMC_CONFIG);
+ val = ~GPMC_CONFIG_LIMITEDADDRESS;
+ gpmc_write_reg(GPMC_CONFIG, val);
+
no_timings:
if (of_platform_device_create(child, NULL, pdev-dev))
return 0;
--
1.8.3.2
--
To unsubscribe from this list: send the line unsubscribe linux-omap in
the body of a message to majord...@vger.kernel.org
More majordomo info at http://vger.kernel.org/majordomo-info.html
[PATCH 0/5] ARM: OMAP2+: gpmc: configuration enhancements
Hi Tony, These patches address GPMC configuration issues and are for v3.19. Patches based on v3.18-rc1. - Make sure to print a user visible error if a requested GPMC timing configuration can't be met. - Don't create GPMC child device if a GPMC timing could not be set. - Always enable address lines A26-A11 for non-NAND devices. - Perform GPMC configuration as per recommended procedure i.e. keep Chip Select disabled while changing GPMC configuration. Tested on dra7-evm, am437x-gp-evm and beagleboard. cheers, -roger Roger Quadros (5): ARM: OMAP2+: gpmc: Print error message in set_gpmc_timing_reg() ARM: OMAP2+: gpmc: Error out if timings fail in gpmc_probe_generic_child() ARM: OMAP2+: gpmc: Always enable A26-A11 for non NAND devices ARM: OMAP2+: gpmc: Keep Chip Select disabled while configuring it ARM: OMAP2+: gpmc: Sanity check GPMC fck on probe arch/arm/mach-omap2/gpmc.c | 87 -- 1 file changed, 54 insertions(+), 33 deletions(-) -- 1.8.3.2 -- To unsubscribe from this list: send the line unsubscribe linux-omap in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
[PATCH 4/5] ARM: OMAP2+: gpmc: Keep Chip Select disabled while configuring it
As per the OMAP reference manual [1], the Chip Select must be
disabled (i.e. CSVALID is 0) while configuring any of the
Chip select parameters.
[1] - 10.1.5.1 Chip-Select Base Address and Region Size Configuration
http://www.ti.com/lit/pdf/swpu177
Signed-off-by: Roger Quadros rog...@ti.com
Signed-off-by: Sekhar Nori nsek...@ti.com
---
arch/arm/mach-omap2/gpmc.c | 34 +++---
1 file changed, 27 insertions(+), 7 deletions(-)
diff --git a/arch/arm/mach-omap2/gpmc.c b/arch/arm/mach-omap2/gpmc.c
index 0ba95d3..437fb6f 100644
--- a/arch/arm/mach-omap2/gpmc.c
+++ b/arch/arm/mach-omap2/gpmc.c
@@ -397,7 +397,7 @@ int gpmc_cs_set_timings(int cs, const struct gpmc_timings
*t)
return 0;
}
-static int gpmc_cs_enable_mem(int cs, u32 base, u32 size)
+static int gpmc_cs_set_memconf(int cs, u32 base, u32 size)
{
u32 l;
u32 mask;
@@ -421,6 +421,15 @@ static int gpmc_cs_enable_mem(int cs, u32 base, u32 size)
return 0;
}
+static void gpmc_cs_enable_mem(int cs)
+{
+ u32 l;
+
+ l = gpmc_cs_read_reg(cs, GPMC_CS_CONFIG7);
+ l |= GPMC_CONFIG7_CSVALID;
+ gpmc_cs_write_reg(cs, GPMC_CS_CONFIG7, l);
+}
+
static void gpmc_cs_disable_mem(int cs)
{
u32 l;
@@ -532,18 +541,18 @@ static int gpmc_cs_remap(int cs, u32 base)
gpmc_cs_get_memconf(cs, old_base, size);
if (base == old_base)
return 0;
- gpmc_cs_disable_mem(cs);
+
ret = gpmc_cs_delete_mem(cs);
if (ret 0)
return ret;
+
ret = gpmc_cs_insert_mem(cs, base, size);
if (ret 0)
return ret;
- ret = gpmc_cs_enable_mem(cs, base, size);
- if (ret 0)
- return ret;
- return 0;
+ ret = gpmc_cs_set_memconf(cs, base, size);
+
+ return ret;
}
int gpmc_cs_request(int cs, unsigned long size, unsigned long *base)
@@ -572,12 +581,17 @@ int gpmc_cs_request(int cs, unsigned long size, unsigned
long *base)
if (r 0)
goto out;
- r = gpmc_cs_enable_mem(cs, res-start, resource_size(res));
+ /* Disable CS while changing base address and size mask */
+ gpmc_cs_disable_mem(cs);
+
+ r = gpmc_cs_set_memconf(cs, res-start, resource_size(res));
if (r 0) {
release_resource(res);
goto out;
}
+ /* Enable CS */
+ gpmc_cs_enable_mem(cs);
*base = res-start;
gpmc_cs_set_reserved(cs, 1);
out:
@@ -1539,6 +1553,9 @@ static int gpmc_probe_generic_child(struct
platform_device *pdev,
goto no_timings;
}
+ /* CS must be disabled while making changes to gpmc configuration */
+ gpmc_cs_disable_mem(cs);
+
/*
* FIXME: gpmc_cs_request() will map the CS to an arbitary
* location in the gpmc address space. When booting with
@@ -1577,6 +1594,9 @@ static int gpmc_probe_generic_child(struct
platform_device *pdev,
val = ~GPMC_CONFIG_LIMITEDADDRESS;
gpmc_write_reg(GPMC_CONFIG, val);
+ /* Enable CS region */
+ gpmc_cs_enable_mem(cs);
+
no_timings:
if (of_platform_device_create(child, NULL, pdev-dev))
return 0;
--
1.8.3.2
--
To unsubscribe from this list: send the line unsubscribe linux-omap in
the body of a message to majord...@vger.kernel.org
More majordomo info at http://vger.kernel.org/majordomo-info.html
[PATCH 5/5] ARM: OMAP2+: gpmc: Sanity check GPMC fck on probe
This prevents potential division by zero errors
if GPMC fck turns out to be zero due to faulty clock
data.
Use resource managed clk_get() API.
Signed-off-by: Roger Quadros rog...@ti.com
Signed-off-by: Sekhar Nori nsek...@ti.com
---
arch/arm/mach-omap2/gpmc.c | 15 +++
1 file changed, 7 insertions(+), 8 deletions(-)
diff --git a/arch/arm/mach-omap2/gpmc.c b/arch/arm/mach-omap2/gpmc.c
index 437fb6f..104bc2c 100644
--- a/arch/arm/mach-omap2/gpmc.c
+++ b/arch/arm/mach-omap2/gpmc.c
@@ -204,11 +204,6 @@ static unsigned long gpmc_get_fclk_period(void)
{
unsigned long rate = clk_get_rate(gpmc_l3_clk);
- if (rate == 0) {
- printk(KERN_WARNING gpmc_l3_clk not enabled\n);
- return 0;
- }
-
rate /= 1000;
rate = 10 / rate; /* In picoseconds */
@@ -1692,13 +1687,18 @@ static int gpmc_probe(struct platform_device *pdev)
else
gpmc_irq = res-start;
- gpmc_l3_clk = clk_get(pdev-dev, fck);
+ gpmc_l3_clk = devm_clk_get(pdev-dev, fck);
if (IS_ERR(gpmc_l3_clk)) {
- dev_err(pdev-dev, error: clk_get\n);
+ dev_err(pdev-dev, Failed to get GPMC fck\n);
gpmc_irq = 0;
return PTR_ERR(gpmc_l3_clk);
}
+ if (!clk_get_rate(gpmc_l3_clk)) {
+ dev_err(pdev-dev, Invalid GPMC fck clock rate\n);
+ return -EINVAL;
+ }
+
pm_runtime_enable(pdev-dev);
pm_runtime_get_sync(pdev-dev);
@@ -1741,7 +1741,6 @@ static int gpmc_probe(struct platform_device *pdev)
rc = gpmc_probe_dt(pdev);
if (rc 0) {
pm_runtime_put_sync(pdev-dev);
- clk_put(gpmc_l3_clk);
dev_err(gpmc_dev, failed to probe DT parameters\n);
return rc;
}
--
1.8.3.2
--
To unsubscribe from this list: send the line unsubscribe linux-omap in
the body of a message to majord...@vger.kernel.org
More majordomo info at http://vger.kernel.org/majordomo-info.html
[PATCH] MAINTAINERS: Update entry for omap related .dts files to cover new SoCs
DRA7(including AM5x) and AM47x series are handled under OMAP umbrella. These SoC support and dts have been added since 3.14 kernel and Pull requests for these have come in from OMAP till date. So just ensure that get_maintainers can pick up this list as well. Cc: Benoît Cousson bcous...@baylibre.com Cc: Tony Lindgren t...@atomide.com Cc: linux-omap@vger.kernel.org Cc: devicet...@vger.kernel.org Signed-off-by: Nishanth Menon n...@ti.com --- MAINTAINERS |3 +++ 1 file changed, 3 insertions(+) diff --git a/MAINTAINERS b/MAINTAINERS index a20df9b..e205bd2 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -6585,6 +6585,9 @@ L:devicet...@vger.kernel.org S: Maintained F: arch/arm/boot/dts/*omap* F: arch/arm/boot/dts/*am3* +F: arch/arm/boot/dts/*am4* +F: arch/arm/boot/dts/*am5* +F: arch/arm/boot/dts/*dra7* OMAP CLOCK FRAMEWORK SUPPORT M: Paul Walmsley p...@pwsan.com -- 1.7.9.5 -- To unsubscribe from this list: send the line unsubscribe linux-omap in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
Re: [PATCH] MAINTAINERS: Update entry for omap related .dts files to cover new SoCs
Hi Nishanth, On 21/10/2014 22:24, Nishanth Menon wrote: DRA7(including AM5x) and AM47x series are handled under OMAP umbrella. These SoC support and dts have been added since 3.14 kernel and Pull requests for these have come in from OMAP till date. So just ensure that get_maintainers can pick up this list as well. Cc: Benoît Cousson bcous...@baylibre.com Cc: Tony Lindgren t...@atomide.com Cc: linux-omap@vger.kernel.org Cc: devicet...@vger.kernel.org Signed-off-by: Nishanth Menon n...@ti.com Acked-by: Benoît Cousson bcous...@baylibre.com Thanks, Benoit --- MAINTAINERS |3 +++ 1 file changed, 3 insertions(+) diff --git a/MAINTAINERS b/MAINTAINERS index a20df9b..e205bd2 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -6585,6 +6585,9 @@ L:devicet...@vger.kernel.org S:Maintained F:arch/arm/boot/dts/*omap* F:arch/arm/boot/dts/*am3* +F: arch/arm/boot/dts/*am4* +F: arch/arm/boot/dts/*am5* +F: arch/arm/boot/dts/*dra7* OMAP CLOCK FRAMEWORK SUPPORT M:Paul Walmsley p...@pwsan.com -- Benoît Cousson BayLibre Embedded Linux Technology Lab www.baylibre.com -- To unsubscribe from this list: send the line unsubscribe linux-omap in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
[PATCH 2/3] ARM: dts: dra72-evm: Add power button node
With Commit adff5962fdd2 (Input: introduce palmas-pwrbutton), we can
now support tps power button as a event source - This is SW7 (PB/WAKE)
on the J6-evm.
Signed-off-by: Nishanth Menon n...@ti.com
---
arch/arm/boot/dts/dra72-evm.dts |8
1 file changed, 8 insertions(+)
diff --git a/arch/arm/boot/dts/dra72-evm.dts b/arch/arm/boot/dts/dra72-evm.dts
index 671e473..1242a17 100644
--- a/arch/arm/boot/dts/dra72-evm.dts
+++ b/arch/arm/boot/dts/dra72-evm.dts
@@ -145,6 +145,14 @@
};
};
};
+
+ tps65917_power_button {
+ compatible = ti,palmas-pwrbutton;
+ interrupt-parent = tps65917;
+ interrupts = 1 IRQ_TYPE_NONE;
+ wakeup-source;
+ ti,palmas-long-press-seconds = 6;
+ };
};
};
--
1.7.9.5
--
To unsubscribe from this list: send the line unsubscribe linux-omap in
the body of a message to majord...@vger.kernel.org
More majordomo info at http://vger.kernel.org/majordomo-info.html
[PATCH 3/3] ARM: dts: dra72-evm: Add MMC nodes
From: Menon, Nishanth n...@ti.com
Add MMC1 and 2 nodes. MMC1 is SDcard and MMC2 is eMMC.
NOTE on MMC1 card detect: Ideally, we should be using in-built SDCD
support, but we dont have it yet. So, use the fact that control module
of DRA7 is setup such that no matter what mode one configures it, GPIO
option is always hardwired in - use GPIO mode for SDcard detection.
[peter.ujfal...@ti.com]
The power line feeding the SD card is also used by other devices on the EVM.
Use generic name instead of mmc2_3v3 so when other devices want to use the
same regulator it will look a bit better.
Signed-off-by: Nishanth Menon n...@ti.com
Signed-off-by: Peter Ujfalusi peter.ujfal...@ti.com
---
arch/arm/boot/dts/dra72-evm.dts | 59 +++
1 file changed, 59 insertions(+)
diff --git a/arch/arm/boot/dts/dra72-evm.dts b/arch/arm/boot/dts/dra72-evm.dts
index 1242a17..945a826 100644
--- a/arch/arm/boot/dts/dra72-evm.dts
+++ b/arch/arm/boot/dts/dra72-evm.dts
@@ -17,6 +17,13 @@
device_type = memory;
reg = 0x8000 0x4000; /* 1024 MB */
};
+
+ evm_3v3: fixedregulator-evm_3v3 {
+ compatible = regulator-fixed;
+ regulator-name = evm_3v3;
+ regulator-min-microvolt = 330;
+ regulator-max-microvolt = 330;
+ };
};
dra7_pmx_core {
@@ -32,6 +39,33 @@
0x424 (PIN_INPUT_PULLUP | MUX_MODE1) /*
wakeup3.sys_nirq1 */
;
};
+
+ mmc1_pins_default: mmc1_pins_default {
+ pinctrl-single,pins =
+ 0x36c (PIN_INPUT | MUX_MODE14) /* mmc1sdcd.gpio219 */
+ 0x354 (PIN_INPUT_PULLUP | MUX_MODE0) /* mmc1_clk.clk */
+ 0x358 (PIN_INPUT_PULLUP | MUX_MODE0) /* mmc1_cmd.cmd */
+ 0x35c (PIN_INPUT_PULLUP | MUX_MODE0) /* mmc1_dat0.dat0
*/
+ 0x360 (PIN_INPUT_PULLUP | MUX_MODE0) /* mmc1_dat1.dat1
*/
+ 0x364 (PIN_INPUT_PULLUP | MUX_MODE0) /* mmc1_dat2.dat2
*/
+ 0x368 (PIN_INPUT_PULLUP | MUX_MODE0) /* mmc1_dat3.dat3
*/
+ ;
+ };
+
+ mmc2_pins_default: mmc2_pins_default {
+ pinctrl-single,pins =
+ 0x9c (PIN_INPUT_PULLUP | MUX_MODE1) /*
gpmc_a23.mmc2_clk */
+ 0xb0 (PIN_INPUT_PULLUP | MUX_MODE1) /*
gpmc_cs1.mmc2_cmd */
+ 0xa0 (PIN_INPUT_PULLUP | MUX_MODE1) /*
gpmc_a24.mmc2_dat0 */
+ 0xa4 (PIN_INPUT_PULLUP | MUX_MODE1) /*
gpmc_a25.mmc2_dat1 */
+ 0xa8 (PIN_INPUT_PULLUP | MUX_MODE1) /*
gpmc_a26.mmc2_dat2 */
+ 0xac (PIN_INPUT_PULLUP | MUX_MODE1) /*
gpmc_a27.mmc2_dat3 */
+ 0x8c (PIN_INPUT_PULLUP | MUX_MODE1) /*
gpmc_a19.mmc2_dat4 */
+ 0x90 (PIN_INPUT_PULLUP | MUX_MODE1) /*
gpmc_a20.mmc2_dat5 */
+ 0x94 (PIN_INPUT_PULLUP | MUX_MODE1) /*
gpmc_a21.mmc2_dat6 */
+ 0x98 (PIN_INPUT_PULLUP | MUX_MODE1) /*
gpmc_a22.mmc2_dat7 */
+ ;
+ };
};
i2c1 {
@@ -159,3 +193,28 @@
uart1 {
status = okay;
};
+
+mmc1 {
+ status = okay;
+ pinctrl-names = default;
+ pinctrl-0 = mmc1_pins_default;
+
+ vmmc-supply = ldo1_reg;
+ bus-width = 4;
+ /*
+* SDCD signal is not being used here - using the fact that GPIO mode
+* is a viable alternative
+*/
+ cd-gpios = gpio6 27 0;
+};
+
+mmc2 {
+ /* SW5-3 in ON position */
+ status = okay;
+ pinctrl-names = default;
+ pinctrl-0 = mmc2_pins_default;
+
+ vmmc-supply = evm_3v3;
+ bus-width = 8;
+ ti,non-removable;
+};
--
1.7.9.5
--
To unsubscribe from this list: send the line unsubscribe linux-omap in
the body of a message to majord...@vger.kernel.org
More majordomo info at http://vger.kernel.org/majordomo-info.html
[PATCH 0/3] ARM: dts: dra72-evm: Add MMC PMIC button information
Hi, This series is based on 3.18-rc1 and enables palmas power button and MMC (SD/EMMC) support. These could be queued for 3.19-rc1 considering that these are not fixes, if it is not too late for additional features for dts, might be nice to get them merged for 3.18 series. Menon, Nishanth (1): ARM: dts: dra72-evm: Add MMC nodes Nishanth Menon (2): ARM: dts: dra72-evm: Provide explicit pinmux for TPS PMIC ARM: dts: dra72-evm: Add power button node arch/arm/boot/dts/dra72-evm.dts | 76 +++ 1 file changed, 76 insertions(+) -- 1.7.9.5 Regards, Nishanth Menon -- To unsubscribe from this list: send the line unsubscribe linux-omap in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
[PATCH 1/3] ARM: dts: dra72-evm: Provide explicit pinmux for TPS PMIC
Even thought sys_nirq1 is hardwired on the SoC for the pin, it is
better to configure the pin to the required mux configuration.
Signed-off-by: Nishanth Menon n...@ti.com
---
arch/arm/boot/dts/dra72-evm.dts |9 +
1 file changed, 9 insertions(+)
diff --git a/arch/arm/boot/dts/dra72-evm.dts b/arch/arm/boot/dts/dra72-evm.dts
index 4107428..671e473 100644
--- a/arch/arm/boot/dts/dra72-evm.dts
+++ b/arch/arm/boot/dts/dra72-evm.dts
@@ -26,6 +26,12 @@
0x404 (PIN_INPUT | MUX_MODE0) /* i2c1_scl.i2c1_scl */
;
};
+
+ tps65917_pins_default: tps65917_pins_default {
+ pinctrl-single,pins =
+ 0x424 (PIN_INPUT_PULLUP | MUX_MODE1) /*
wakeup3.sys_nirq1 */
+ ;
+ };
};
i2c1 {
@@ -38,6 +44,9 @@
compatible = ti,tps65917;
reg = 0x58;
+ pinctrl-names = default;
+ pinctrl-0 = tps65917_pins_default;
+
interrupts = GIC_SPI 2 IRQ_TYPE_NONE; /* IRQ_SYS_1N */
interrupt-parent = gic;
interrupt-controller;
--
1.7.9.5
--
To unsubscribe from this list: send the line unsubscribe linux-omap in
the body of a message to majord...@vger.kernel.org
More majordomo info at http://vger.kernel.org/majordomo-info.html
[PATCH V2 3/3] ARM: dts: dra72-evm: Add MMC nodes
Add MMC1 and 2 nodes. MMC1 is SDcard and MMC2 is eMMC.
NOTE on MMC1 card detect: Ideally, we should be using in-built SDCD
support, but we dont have it yet. So, use the fact that control module
of DRA7 is setup such that no matter what mode one configures it, GPIO
option is always hardwired in - use GPIO mode for SDcard detection.
[peter.ujfal...@ti.com]
The power line feeding the SD card is also used by other devices on the EVM.
Use generic name instead of mmc2_3v3 so when other devices want to use the
same regulator it will look a bit better.
Signed-off-by: Nishanth Menon n...@ti.com
Signed-off-by: Peter Ujfalusi peter.ujfal...@ti.com
---
Apologies on the spam, I got my own name screwed up -fixing that right now
Changes in V2: Fixes the formatting error in author name.
V1: https://patchwork.kernel.org/patch/5125291/
arch/arm/boot/dts/dra72-evm.dts | 59 +++
1 file changed, 59 insertions(+)
diff --git a/arch/arm/boot/dts/dra72-evm.dts b/arch/arm/boot/dts/dra72-evm.dts
index 1242a17..945a826 100644
--- a/arch/arm/boot/dts/dra72-evm.dts
+++ b/arch/arm/boot/dts/dra72-evm.dts
@@ -17,6 +17,13 @@
device_type = memory;
reg = 0x8000 0x4000; /* 1024 MB */
};
+
+ evm_3v3: fixedregulator-evm_3v3 {
+ compatible = regulator-fixed;
+ regulator-name = evm_3v3;
+ regulator-min-microvolt = 330;
+ regulator-max-microvolt = 330;
+ };
};
dra7_pmx_core {
@@ -32,6 +39,33 @@
0x424 (PIN_INPUT_PULLUP | MUX_MODE1) /*
wakeup3.sys_nirq1 */
;
};
+
+ mmc1_pins_default: mmc1_pins_default {
+ pinctrl-single,pins =
+ 0x36c (PIN_INPUT | MUX_MODE14) /* mmc1sdcd.gpio219 */
+ 0x354 (PIN_INPUT_PULLUP | MUX_MODE0) /* mmc1_clk.clk */
+ 0x358 (PIN_INPUT_PULLUP | MUX_MODE0) /* mmc1_cmd.cmd */
+ 0x35c (PIN_INPUT_PULLUP | MUX_MODE0) /* mmc1_dat0.dat0
*/
+ 0x360 (PIN_INPUT_PULLUP | MUX_MODE0) /* mmc1_dat1.dat1
*/
+ 0x364 (PIN_INPUT_PULLUP | MUX_MODE0) /* mmc1_dat2.dat2
*/
+ 0x368 (PIN_INPUT_PULLUP | MUX_MODE0) /* mmc1_dat3.dat3
*/
+ ;
+ };
+
+ mmc2_pins_default: mmc2_pins_default {
+ pinctrl-single,pins =
+ 0x9c (PIN_INPUT_PULLUP | MUX_MODE1) /*
gpmc_a23.mmc2_clk */
+ 0xb0 (PIN_INPUT_PULLUP | MUX_MODE1) /*
gpmc_cs1.mmc2_cmd */
+ 0xa0 (PIN_INPUT_PULLUP | MUX_MODE1) /*
gpmc_a24.mmc2_dat0 */
+ 0xa4 (PIN_INPUT_PULLUP | MUX_MODE1) /*
gpmc_a25.mmc2_dat1 */
+ 0xa8 (PIN_INPUT_PULLUP | MUX_MODE1) /*
gpmc_a26.mmc2_dat2 */
+ 0xac (PIN_INPUT_PULLUP | MUX_MODE1) /*
gpmc_a27.mmc2_dat3 */
+ 0x8c (PIN_INPUT_PULLUP | MUX_MODE1) /*
gpmc_a19.mmc2_dat4 */
+ 0x90 (PIN_INPUT_PULLUP | MUX_MODE1) /*
gpmc_a20.mmc2_dat5 */
+ 0x94 (PIN_INPUT_PULLUP | MUX_MODE1) /*
gpmc_a21.mmc2_dat6 */
+ 0x98 (PIN_INPUT_PULLUP | MUX_MODE1) /*
gpmc_a22.mmc2_dat7 */
+ ;
+ };
};
i2c1 {
@@ -159,3 +193,28 @@
uart1 {
status = okay;
};
+
+mmc1 {
+ status = okay;
+ pinctrl-names = default;
+ pinctrl-0 = mmc1_pins_default;
+
+ vmmc-supply = ldo1_reg;
+ bus-width = 4;
+ /*
+* SDCD signal is not being used here - using the fact that GPIO mode
+* is a viable alternative
+*/
+ cd-gpios = gpio6 27 0;
+};
+
+mmc2 {
+ /* SW5-3 in ON position */
+ status = okay;
+ pinctrl-names = default;
+ pinctrl-0 = mmc2_pins_default;
+
+ vmmc-supply = evm_3v3;
+ bus-width = 8;
+ ti,non-removable;
+};
--
1.7.9.5
--
To unsubscribe from this list: send the line unsubscribe linux-omap in
the body of a message to majord...@vger.kernel.org
More majordomo info at http://vger.kernel.org/majordomo-info.html
[PATCH] ARM: dts: dra7-evm: Keep all VDD rails always-on
DRA7 Data Manual (SPRS857L - August 2014) section 4.1.1 states: All unused power supply balls must be supplied with the voltages specified in the Section 5.2, Recommended Operating Conditions. This implies that all unused voltage rails for Vayu can never be switched off even if the hardware blocks inside that voltage domain is unused. Switching off these unused rails may result in stability issues on other domains and increased leakage and power-on-hour impacts. J6eco-evm dts file already considers this, however j6evm-dts file needs to be fixed to consider this constraint of the SoC. Signed-off-by: Nishanth Menon n...@ti.com --- Patch is based on v3.18-rc1 tag. arch/arm/boot/dts/dra7-evm.dts |5 + 1 file changed, 5 insertions(+) diff --git a/arch/arm/boot/dts/dra7-evm.dts b/arch/arm/boot/dts/dra7-evm.dts index c6ce625..4f4c469 100644 --- a/arch/arm/boot/dts/dra7-evm.dts +++ b/arch/arm/boot/dts/dra7-evm.dts @@ -201,6 +201,7 @@ regulator-name = smps45; regulator-min-microvolt = 85; regulator-max-microvolt = 115; + regulator-always-on; regulator-boot-on; }; @@ -209,6 +210,7 @@ regulator-name = smps6; regulator-min-microvolt = 85; regulator-max-microvolt = 1250; + regulator-always-on; regulator-boot-on; }; @@ -226,6 +228,7 @@ regulator-name = smps8; regulator-min-microvolt = 85; regulator-max-microvolt = 125; + regulator-always-on; regulator-boot-on; }; @@ -252,6 +255,7 @@ regulator-name = ldo2; regulator-min-microvolt = 330; regulator-max-microvolt = 330; + regulator-always-on; regulator-boot-on; }; @@ -269,6 +273,7 @@ regulator-name = ldo9; regulator-min-microvolt = 105; regulator-max-microvolt = 105; + regulator-always-on; regulator-boot-on; }; -- 1.7.9.5 -- To unsubscribe from this list: send the line unsubscribe linux-omap in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
[RFCv2 1/8] [media] si4713: switch to devm regulator API
This switches back to the normal regulator API (but use
managed variant) in preparation for device tree support.
Signed-off-by: Sebastian Reichel s...@kernel.org
---
drivers/media/radio/si4713/si4713.c | 80 ++---
drivers/media/radio/si4713/si4713.h | 6 +--
2 files changed, 58 insertions(+), 28 deletions(-)
diff --git a/drivers/media/radio/si4713/si4713.c
b/drivers/media/radio/si4713/si4713.c
index b576555..b335093 100644
--- a/drivers/media/radio/si4713/si4713.c
+++ b/drivers/media/radio/si4713/si4713.c
@@ -23,6 +23,7 @@
#include linux/completion.h
#include linux/delay.h
+#include linux/err.h
#include linux/interrupt.h
#include linux/i2c.h
#include linux/slab.h
@@ -366,13 +367,22 @@ static int si4713_powerup(struct si4713_device *sdev)
if (sdev-power_state)
return 0;
- if (sdev-supplies) {
- err = regulator_bulk_enable(sdev-supplies, sdev-supply_data);
+ if (sdev-vdd) {
+ err = regulator_enable(sdev-vdd);
if (err) {
- v4l2_err(sdev-sd, Failed to enable supplies: %d\n,
err);
+ v4l2_err(sdev-sd, Failed to enable vdd: %d\n, err);
return err;
}
}
+
+ if (sdev-vio) {
+ err = regulator_enable(sdev-vio);
+ if (err) {
+ v4l2_err(sdev-sd, Failed to enable vio: %d\n, err);
+ return err;
+ }
+ }
+
if (gpio_is_valid(sdev-gpio_reset)) {
udelay(50);
gpio_set_value(sdev-gpio_reset, 1);
@@ -399,11 +409,18 @@ static int si4713_powerup(struct si4713_device *sdev)
}
if (gpio_is_valid(sdev-gpio_reset))
gpio_set_value(sdev-gpio_reset, 0);
- if (sdev-supplies) {
- err = regulator_bulk_disable(sdev-supplies, sdev-supply_data);
+
+
+ if (sdev-vdd) {
+ err = regulator_disable(sdev-vdd);
if (err)
- v4l2_err(sdev-sd,
-Failed to disable supplies: %d\n, err);
+ v4l2_err(sdev-sd, Failed to disable vdd: %d\n, err);
+ }
+
+ if (sdev-vio) {
+ err = regulator_disable(sdev-vio);
+ if (err)
+ v4l2_err(sdev-sd, Failed to disable vio: %d\n, err);
}
return err;
@@ -432,12 +449,21 @@ static int si4713_powerdown(struct si4713_device *sdev)
v4l2_dbg(1, debug, sdev-sd, Device in reset mode\n);
if (gpio_is_valid(sdev-gpio_reset))
gpio_set_value(sdev-gpio_reset, 0);
- if (sdev-supplies) {
- err = regulator_bulk_disable(sdev-supplies,
-sdev-supply_data);
- if (err)
+
+ if (sdev-vdd) {
+ err = regulator_disable(sdev-vdd);
+ if (err) {
+ v4l2_err(sdev-sd,
+ Failed to disable vdd: %d\n, err);
+ }
+ }
+
+ if (sdev-vio) {
+ err = regulator_disable(sdev-vio);
+ if (err) {
v4l2_err(sdev-sd,
-Failed to disable supplies: %d\n,
err);
+ Failed to disable vio: %d\n, err);
+ }
}
sdev-power_state = POWER_OFF;
}
@@ -1441,17 +1467,26 @@ static int si4713_probe(struct i2c_client *client,
}
sdev-gpio_reset = pdata-gpio_reset;
gpio_direction_output(sdev-gpio_reset, 0);
- sdev-supplies = pdata-supplies;
}
- for (i = 0; i sdev-supplies; i++)
- sdev-supply_data[i].supply = pdata-supply_names[i];
+ sdev-vdd = devm_regulator_get_optional(client-dev, vdd);
+ if (IS_ERR(sdev-vdd)) {
+ rval = PTR_ERR(sdev-vdd);
+ if (rval == -EPROBE_DEFER)
+ goto exit;
+
+ dev_dbg(client-dev, no vdd regulator found: %d\n, rval);
+ sdev-vdd = NULL;
+ }
+
+ sdev-vio = devm_regulator_get_optional(client-dev, vio);
+ if (IS_ERR(sdev-vio)) {
+ rval = PTR_ERR(sdev-vio);
+ if (rval == -EPROBE_DEFER)
+ goto exit;
- rval = regulator_bulk_get(client-dev, sdev-supplies,
- sdev-supply_data);
- if (rval) {
- dev_err(client-dev, Cannot get regulators: %d\n, rval);
- goto free_gpio;
+ dev_dbg(client-dev, no vio regulator found: %d\n, rval);
+ sdev-vio = NULL;
}
v4l2_i2c_subdev_init(sdev-sd, client,
[RFCv2 0/8] [media] si4713 DT binding
Hi, This is the RFCv2 patchset adding DT support to the si4713 radio transmitter i2c driver. The changes can be summarized as follows: * Move regulator information back into the driver. The regulators needed are documented in the chip and have nothing to do with boarddata. Instead devm_regulator_get_optional is used and errors are handled quite loosely now. Maybe the USB driver should provide dummy regulators. * GPIO handling is updated to gpiod consumer interface, resulting in a driver cleanup and easy DT handling * The driver is updated to use managed resources wherever possible So much about the nice stuff. But there is also * Instantiation of the platform device from the i2c (sub-)device. Since DT is not supposed to contain linuxisms the device is a simple i2c node resulting in the i2c probe function being called. Thus registering the main v4l device must happen from there. Tested: * Compilation on torvalds/linux.git:master (based on 52d589a) * Booting in DT mode * Some simply driver queries using v4l2-ctl Not tested: * The USB driver, since I do not own the USB dongle * The legacy platform code (only DT boot has been tested). (The legacy platform code is supposed to removed in the near future anyways) Changes since RFCv1 (requested by Hans Verkuil): - splitted the patchset into more patches - replaced dev_info with dev_dbg for missing regulators - check for ENOSYS value from devm_gpiod_get (disabled GPIOLIB) -- Sebastian Sebastian Reichel (8): [media] si4713: switch to devm regulator API [media] si4713: switch reset gpio to devm_gpiod API [media] si4713: use managed memory allocation [media] si4713: use managed irq request [media] si4713: add device tree support [media] si4713: add DT binding documentation ARM: OMAP2: RX-51: update si4713 platform data [media] si4713: cleanup platform data Documentation/devicetree/bindings/media/si4713.txt | 30 arch/arm/mach-omap2/board-rx51-peripherals.c | 69 - drivers/media/radio/si4713/radio-platform-si4713.c | 28 +--- drivers/media/radio/si4713/si4713.c| 167 + drivers/media/radio/si4713/si4713.h| 15 +- include/media/radio-si4713.h | 30 include/media/si4713.h | 4 +- 7 files changed, 186 insertions(+), 157 deletions(-) create mode 100644 Documentation/devicetree/bindings/media/si4713.txt delete mode 100644 include/media/radio-si4713.h -- 2.1.1 -- To unsubscribe from this list: send the line unsubscribe linux-omap in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
[RFCv2 4/8] [media] si4713: use managed irq request
Introduce the usage of managed irq request to
simplify the code slightly.
Signed-off-by: Sebastian Reichel s...@kernel.org
---
drivers/media/radio/si4713/si4713.c | 10 ++
1 file changed, 2 insertions(+), 8 deletions(-)
diff --git a/drivers/media/radio/si4713/si4713.c
b/drivers/media/radio/si4713/si4713.c
index efc5d6b..ebec16d 100644
--- a/drivers/media/radio/si4713/si4713.c
+++ b/drivers/media/radio/si4713/si4713.c
@@ -1590,7 +1590,7 @@ static int si4713_probe(struct i2c_client *client,
sdev-sd.ctrl_handler = hdl;
if (client-irq) {
- rval = request_irq(client-irq,
+ rval = devm_request_irq(client-dev, client-irq,
si4713_handler, IRQF_TRIGGER_FALLING,
client-name, sdev);
if (rval 0) {
@@ -1605,14 +1605,11 @@ static int si4713_probe(struct i2c_client *client,
rval = si4713_initialize(sdev);
if (rval 0) {
v4l2_err(sdev-sd, Failed to probe device information.\n);
- goto free_irq;
+ goto free_ctrls;
}
return 0;
-free_irq:
- if (client-irq)
- free_irq(client-irq, sdev);
free_ctrls:
v4l2_ctrl_handler_free(hdl);
exit:
@@ -1628,9 +1625,6 @@ static int si4713_remove(struct i2c_client *client)
if (sdev-power_state)
si4713_set_power_state(sdev, POWER_DOWN);
- if (client-irq 0)
- free_irq(client-irq, sdev);
-
v4l2_device_unregister_subdev(sd);
v4l2_ctrl_handler_free(sd-ctrl_handler);
--
2.1.1
--
To unsubscribe from this list: send the line unsubscribe linux-omap in
the body of a message to majord...@vger.kernel.org
More majordomo info at http://vger.kernel.org/majordomo-info.html
[RFCv2 6/8] [media] si4713: add DT binding documentation
This patch adds the DT bindings documentation for Silicon Labs Si4713 FM
radio transmitter.
Signed-off-by: Sebastian Reichel s...@kernel.org
---
Documentation/devicetree/bindings/media/si4713.txt | 30 ++
1 file changed, 30 insertions(+)
create mode 100644 Documentation/devicetree/bindings/media/si4713.txt
diff --git a/Documentation/devicetree/bindings/media/si4713.txt
b/Documentation/devicetree/bindings/media/si4713.txt
new file mode 100644
index 000..5ee5552
--- /dev/null
+++ b/Documentation/devicetree/bindings/media/si4713.txt
@@ -0,0 +1,30 @@
+* Silicon Labs FM Radio transmitter
+
+The Silicon Labs Si4713 is an FM radio transmitter with receive power scan
+supporting 76-108 MHz. It includes an RDS encoder and has both, a stereo-analog
+and a digital interface, which supports I2S, left-justified and a custom
+DSP-mode format. It is programmable through an I2C interface.
+
+Required Properties:
+- compatible: Should contain silabs,si4713
+- reg: the I2C address of the device
+
+Optional Properties:
+- interrupts-extended: Interrupt specifier for the chips interrupt
+- reset-gpios: GPIO specifier for the chips reset line
+- vdd-supply: phandle for Vdd regulator
+- vio-supply: phandle for Vio regulator
+
+Example:
+
+i2c2 {
+fmtx: si4713@63 {
+compatible = silabs,si4713;
+reg = 0x63;
+
+interrupts-extended = gpio2 21 IRQ_TYPE_EDGE_FALLING; /* 53
*/
+reset-gpios = gpio6 3 GPIO_ACTIVE_HIGH; /* 163 */
+vio-supply = vio;
+vdd-supply = vaux1;
+};
+};
--
2.1.1
--
To unsubscribe from this list: send the line unsubscribe linux-omap in
the body of a message to majord...@vger.kernel.org
More majordomo info at http://vger.kernel.org/majordomo-info.html
[RFCv2 2/8] [media] si4713: switch reset gpio to devm_gpiod API
This updates the driver to use the managed gpiod interface
instead of the unmanged old GPIO API. This is a preperation
for the introduction of device tree support.
Signed-off-by: Sebastian Reichel s...@kernel.org
---
drivers/media/radio/si4713/si4713.c | 38 +
drivers/media/radio/si4713/si4713.h | 3 ++-
2 files changed, 19 insertions(+), 22 deletions(-)
diff --git a/drivers/media/radio/si4713/si4713.c
b/drivers/media/radio/si4713/si4713.c
index b335093..e560a7e 100644
--- a/drivers/media/radio/si4713/si4713.c
+++ b/drivers/media/radio/si4713/si4713.c
@@ -383,9 +383,9 @@ static int si4713_powerup(struct si4713_device *sdev)
}
}
- if (gpio_is_valid(sdev-gpio_reset)) {
+ if (!IS_ERR(sdev-gpio_reset)) {
udelay(50);
- gpio_set_value(sdev-gpio_reset, 1);
+ gpiod_set_value(sdev-gpio_reset, 1);
}
if (client-irq)
@@ -407,8 +407,8 @@ static int si4713_powerup(struct si4713_device *sdev)
SI4713_STC_INT | SI4713_CTS);
return err;
}
- if (gpio_is_valid(sdev-gpio_reset))
- gpio_set_value(sdev-gpio_reset, 0);
+ if (!IS_ERR(sdev-gpio_reset))
+ gpiod_set_value(sdev-gpio_reset, 0);
if (sdev-vdd) {
@@ -447,8 +447,8 @@ static int si4713_powerdown(struct si4713_device *sdev)
v4l2_dbg(1, debug, sdev-sd, Power down response: 0x%02x\n,
resp[0]);
v4l2_dbg(1, debug, sdev-sd, Device in reset mode\n);
- if (gpio_is_valid(sdev-gpio_reset))
- gpio_set_value(sdev-gpio_reset, 0);
+ if (!IS_ERR(sdev-gpio_reset))
+ gpiod_set_value(sdev-gpio_reset, 0);
if (sdev-vdd) {
err = regulator_disable(sdev-vdd);
@@ -1457,16 +1457,17 @@ static int si4713_probe(struct i2c_client *client,
goto exit;
}
- sdev-gpio_reset = -1;
- if (pdata gpio_is_valid(pdata-gpio_reset)) {
- rval = gpio_request(pdata-gpio_reset, si4713 reset);
- if (rval) {
- dev_err(client-dev,
- Failed to request gpio: %d\n, rval);
- goto free_sdev;
- }
- sdev-gpio_reset = pdata-gpio_reset;
- gpio_direction_output(sdev-gpio_reset, 0);
+ sdev-gpio_reset = devm_gpiod_get(client-dev, reset);
+ if (!IS_ERR(sdev-gpio_reset)) {
+ gpiod_direction_output(sdev-gpio_reset, 0);
+ } else if (PTR_ERR(sdev-gpio_reset) == -ENOENT) {
+ dev_dbg(client-dev, No reset GPIO assigned\n);
+ } else if (PTR_ERR(sdev-gpio_reset) == -ENOSYS) {
+ dev_dbg(client-dev, No reset GPIO support\n);
+ } else {
+ rval = PTR_ERR(sdev-gpio_reset);
+ dev_err(client-dev, Failed to request gpio: %d\n, rval);
+ goto free_sdev;
}
sdev-vdd = devm_regulator_get_optional(client-dev, vdd);
@@ -1614,9 +1615,6 @@ free_irq:
free_irq(client-irq, sdev);
free_ctrls:
v4l2_ctrl_handler_free(hdl);
-free_gpio:
- if (gpio_is_valid(sdev-gpio_reset))
- gpio_free(sdev-gpio_reset);
free_sdev:
kfree(sdev);
exit:
@@ -1637,8 +1635,6 @@ static int si4713_remove(struct i2c_client *client)
v4l2_device_unregister_subdev(sd);
v4l2_ctrl_handler_free(sd-ctrl_handler);
- if (gpio_is_valid(sdev-gpio_reset))
- gpio_free(sdev-gpio_reset);
kfree(sdev);
return 0;
diff --git a/drivers/media/radio/si4713/si4713.h
b/drivers/media/radio/si4713/si4713.h
index ed28ed2..7c2479f 100644
--- a/drivers/media/radio/si4713/si4713.h
+++ b/drivers/media/radio/si4713/si4713.h
@@ -16,6 +16,7 @@
#define SI4713_I2C_H
#include linux/regulator/consumer.h
+#include linux/gpio/consumer.h
#include media/v4l2-subdev.h
#include media/v4l2-ctrls.h
#include media/si4713.h
@@ -236,7 +237,7 @@ struct si4713_device {
struct completion work;
struct regulator *vdd;
struct regulator *vio;
- int gpio_reset;
+ struct gpio_desc *gpio_reset;
u32 power_state;
u32 rds_enabled;
u32 frequency;
--
2.1.1
--
To unsubscribe from this list: send the line unsubscribe linux-omap in
the body of a message to majord...@vger.kernel.org
More majordomo info at http://vger.kernel.org/majordomo-info.html
[RFCv2 7/8] ARM: OMAP2: RX-51: update si4713 platform data
This updates platform data related to Si4713, which
has been updated to be compatible with DT interface.
Signed-off-by: Sebastian Reichel s...@kernel.org
---
arch/arm/mach-omap2/board-rx51-peripherals.c | 69 +---
1 file changed, 31 insertions(+), 38 deletions(-)
diff --git a/arch/arm/mach-omap2/board-rx51-peripherals.c
b/arch/arm/mach-omap2/board-rx51-peripherals.c
index ddfc8df..ec2e410 100644
--- a/arch/arm/mach-omap2/board-rx51-peripherals.c
+++ b/arch/arm/mach-omap2/board-rx51-peripherals.c
@@ -23,6 +23,7 @@
#include linux/regulator/machine.h
#include linux/gpio.h
#include linux/gpio_keys.h
+#include linux/gpio/machine.h
#include linux/mmc/host.h
#include linux/power/isp1704_charger.h
#include linux/platform_data/spi-omap2-mcspi.h
@@ -38,7 +39,6 @@
#include sound/tlv320aic3x.h
#include sound/tpa6130a2-plat.h
-#include media/radio-si4713.h
#include media/si4713.h
#include linux/platform_data/leds-lp55xx.h
@@ -760,46 +760,17 @@ static struct regulator_init_data rx51_vintdig = {
},
};
-static const char * const si4713_supply_names[] = {
- vio,
- vdd,
-};
-
-static struct si4713_platform_data rx51_si4713_i2c_data __initdata_or_module =
{
- .supplies = ARRAY_SIZE(si4713_supply_names),
- .supply_names = si4713_supply_names,
- .gpio_reset = RX51_FMTX_RESET_GPIO,
-};
-
-static struct i2c_board_info rx51_si4713_board_info __initdata_or_module = {
- I2C_BOARD_INFO(si4713, SI4713_I2C_ADDR_BUSEN_HIGH),
- .platform_data = rx51_si4713_i2c_data,
-};
-
-static struct radio_si4713_platform_data rx51_si4713_data __initdata_or_module
= {
- .i2c_bus= 2,
- .subdev_board_info = rx51_si4713_board_info,
-};
-
-static struct platform_device rx51_si4713_dev __initdata_or_module = {
- .name = radio-si4713,
- .id = -1,
- .dev= {
- .platform_data = rx51_si4713_data,
+static struct gpiod_lookup_table rx51_fmtx_gpios_table = {
+ .dev_id = 2-0063,
+ .table = {
+ GPIO_LOOKUP(gpio.6, 3, reset, GPIO_ACTIVE_HIGH), /* 163 */
+ { },
},
};
-static __init void rx51_init_si4713(void)
+static __init void rx51_gpio_init(void)
{
- int err;
-
- err = gpio_request_one(RX51_FMTX_IRQ, GPIOF_DIR_IN, si4713 irq);
- if (err) {
- printk(KERN_ERR Cannot request si4713 irq gpio. %d\n, err);
- return;
- }
- rx51_si4713_board_info.irq = gpio_to_irq(RX51_FMTX_IRQ);
- platform_device_register(rx51_si4713_dev);
+ gpiod_add_lookup_table(rx51_fmtx_gpios_table);
}
static int rx51_twlgpio_setup(struct device *dev, unsigned gpio, unsigned n)
@@ -1029,7 +1000,17 @@ static struct aic3x_pdata rx51_aic3x_data2 = {
.gpio_reset = 60,
};
+static struct si4713_platform_data rx51_si4713_platform_data = {
+ .is_platform_device = true
+};
+
static struct i2c_board_info __initdata rx51_peripherals_i2c_board_info_2[] = {
+#if IS_ENABLED(CONFIG_I2C_SI4713) IS_ENABLED(CONFIG_PLATFORM_SI4713)
+ {
+ I2C_BOARD_INFO(si4713, 0x63),
+ .platform_data = rx51_si4713_platform_data,
+ },
+#endif
{
I2C_BOARD_INFO(tlv320aic3x, 0x18),
.platform_data = rx51_aic3x_data,
@@ -1070,6 +1051,10 @@ static struct i2c_board_info __initdata
rx51_peripherals_i2c_board_info_3[] = {
static int __init rx51_i2c_init(void)
{
+#if IS_ENABLED(CONFIG_I2C_SI4713) IS_ENABLED(CONFIG_PLATFORM_SI4713)
+ int err;
+#endif
+
if ((system_rev = SYSTEM_REV_S_USES_VAUX3 system_rev 0x100) ||
system_rev = SYSTEM_REV_B_USES_VAUX3) {
rx51_twldata.vaux3 = rx51_vaux3_mmc;
@@ -1087,6 +1072,14 @@ static int __init rx51_i2c_init(void)
rx51_twldata.vdac-constraints.name = VDAC;
omap_pmic_init(1, 2200, twl5030, 7 + OMAP_INTC_START, rx51_twldata);
+#if IS_ENABLED(CONFIG_I2C_SI4713) IS_ENABLED(CONFIG_PLATFORM_SI4713)
+ err = gpio_request_one(RX51_FMTX_IRQ, GPIOF_DIR_IN, si4713 irq);
+ if (err) {
+ printk(KERN_ERR Cannot request si4713 irq gpio. %d\n, err);
+ return err;
+ }
+ rx51_peripherals_i2c_board_info_2[0].irq = gpio_to_irq(RX51_FMTX_IRQ);
+#endif
omap_register_i2c_bus(2, 100, rx51_peripherals_i2c_board_info_2,
ARRAY_SIZE(rx51_peripherals_i2c_board_info_2));
#if defined(CONFIG_SENSORS_LIS3_I2C) || defined(CONFIG_SENSORS_LIS3_I2C_MODULE)
@@ -1300,6 +1293,7 @@ static void __init rx51_init_omap3_rom_rng(void)
void __init rx51_peripherals_init(void)
{
+ rx51_gpio_init();
rx51_i2c_init();
regulator_has_full_constraints();
gpmc_onenand_init(board_onenand_data);
@@ -1307,7 +1301,6 @@ void __init rx51_peripherals_init(void)
rx51_add_gpio_keys();
rx51_init_wl1251();
rx51_init_tsc2005();
- rx51_init_si4713();
[RFCv2 3/8] [media] si4713: use managed memory allocation
Introduce the usage of managed memory allocation to
simplify the code slightly.
Signed-off-by: Sebastian Reichel s...@kernel.org
---
drivers/media/radio/si4713/si4713.c | 7 ++-
1 file changed, 2 insertions(+), 5 deletions(-)
diff --git a/drivers/media/radio/si4713/si4713.c
b/drivers/media/radio/si4713/si4713.c
index e560a7e..efc5d6b 100644
--- a/drivers/media/radio/si4713/si4713.c
+++ b/drivers/media/radio/si4713/si4713.c
@@ -1450,7 +1450,7 @@ static int si4713_probe(struct i2c_client *client,
struct v4l2_ctrl_handler *hdl;
int rval, i;
- sdev = kzalloc(sizeof(*sdev), GFP_KERNEL);
+ sdev = devm_kzalloc(client-dev, sizeof(*sdev), GFP_KERNEL);
if (!sdev) {
dev_err(client-dev, Failed to alloc video device.\n);
rval = -ENOMEM;
@@ -1467,7 +1467,7 @@ static int si4713_probe(struct i2c_client *client,
} else {
rval = PTR_ERR(sdev-gpio_reset);
dev_err(client-dev, Failed to request gpio: %d\n, rval);
- goto free_sdev;
+ goto exit;
}
sdev-vdd = devm_regulator_get_optional(client-dev, vdd);
@@ -1615,8 +1615,6 @@ free_irq:
free_irq(client-irq, sdev);
free_ctrls:
v4l2_ctrl_handler_free(hdl);
-free_sdev:
- kfree(sdev);
exit:
return rval;
}
@@ -1635,7 +1633,6 @@ static int si4713_remove(struct i2c_client *client)
v4l2_device_unregister_subdev(sd);
v4l2_ctrl_handler_free(sd-ctrl_handler);
- kfree(sdev);
return 0;
}
--
2.1.1
--
To unsubscribe from this list: send the line unsubscribe linux-omap in
the body of a message to majord...@vger.kernel.org
More majordomo info at http://vger.kernel.org/majordomo-info.html
[RFCv2 5/8] [media] si4713: add device tree support
Add device tree support by changing the device registration order.
In the device tree the si4713 node is a normal I2C device, which
will be probed as such. Thus the V4L device must be probed from
the I2C device and not the other way around.
Signed-off-by: Sebastian Reichel s...@kernel.org
---
drivers/media/radio/si4713/radio-platform-si4713.c | 28 --
drivers/media/radio/si4713/si4713.c| 34 --
drivers/media/radio/si4713/si4713.h| 6
include/media/radio-si4713.h | 30 ---
include/media/si4713.h | 1 +
5 files changed, 45 insertions(+), 54 deletions(-)
delete mode 100644 include/media/radio-si4713.h
diff --git a/drivers/media/radio/si4713/radio-platform-si4713.c
b/drivers/media/radio/si4713/radio-platform-si4713.c
index a47502a..2de5439 100644
--- a/drivers/media/radio/si4713/radio-platform-si4713.c
+++ b/drivers/media/radio/si4713/radio-platform-si4713.c
@@ -34,7 +34,7 @@
#include media/v4l2-fh.h
#include media/v4l2-ctrls.h
#include media/v4l2-event.h
-#include media/radio-si4713.h
+#include si4713.h
/* module parameters */
static int radio_nr = -1; /* radio device minor (-1 == auto assign) */
@@ -153,7 +153,6 @@ static int radio_si4713_pdriver_probe(struct
platform_device *pdev)
{
struct radio_si4713_platform_data *pdata = pdev-dev.platform_data;
struct radio_si4713_device *rsdev;
- struct i2c_adapter *adapter;
struct v4l2_subdev *sd;
int rval = 0;
@@ -177,20 +176,11 @@ static int radio_si4713_pdriver_probe(struct
platform_device *pdev)
goto exit;
}
- adapter = i2c_get_adapter(pdata-i2c_bus);
- if (!adapter) {
- dev_err(pdev-dev, Cannot get i2c adapter %d\n,
- pdata-i2c_bus);
- rval = -ENODEV;
- goto unregister_v4l2_dev;
- }
-
- sd = v4l2_i2c_new_subdev_board(rsdev-v4l2_dev, adapter,
- pdata-subdev_board_info, NULL);
- if (!sd) {
+ sd = i2c_get_clientdata(pdata-subdev);
+ rval = v4l2_device_register_subdev(rsdev-v4l2_dev, sd);
+ if (rval) {
dev_err(pdev-dev, Cannot get v4l2 subdevice\n);
- rval = -ENODEV;
- goto put_adapter;
+ goto unregister_v4l2_dev;
}
rsdev-radio_dev = radio_si4713_vdev_template;
@@ -202,14 +192,12 @@ static int radio_si4713_pdriver_probe(struct
platform_device *pdev)
if (video_register_device(rsdev-radio_dev, VFL_TYPE_RADIO, radio_nr))
{
dev_err(pdev-dev, Could not register video device.\n);
rval = -EIO;
- goto put_adapter;
+ goto unregister_v4l2_dev;
}
dev_info(pdev-dev, New device successfully probed\n);
goto exit;
-put_adapter:
- i2c_put_adapter(adapter);
unregister_v4l2_dev:
v4l2_device_unregister(rsdev-v4l2_dev);
exit:
@@ -220,14 +208,10 @@ exit:
static int radio_si4713_pdriver_remove(struct platform_device *pdev)
{
struct v4l2_device *v4l2_dev = platform_get_drvdata(pdev);
- struct v4l2_subdev *sd = list_entry(v4l2_dev-subdevs.next,
- struct v4l2_subdev, list);
- struct i2c_client *client = v4l2_get_subdevdata(sd);
struct radio_si4713_device *rsdev;
rsdev = container_of(v4l2_dev, struct radio_si4713_device, v4l2_dev);
video_unregister_device(rsdev-radio_dev);
- i2c_put_adapter(client-adapter);
v4l2_device_unregister(rsdev-v4l2_dev);
return 0;
diff --git a/drivers/media/radio/si4713/si4713.c
b/drivers/media/radio/si4713/si4713.c
index ebec16d..94fe3c6 100644
--- a/drivers/media/radio/si4713/si4713.c
+++ b/drivers/media/radio/si4713/si4713.c
@@ -1446,9 +1446,13 @@ static int si4713_probe(struct i2c_client *client,
const struct i2c_device_id *id)
{
struct si4713_device *sdev;
- struct si4713_platform_data *pdata = client-dev.platform_data;
struct v4l2_ctrl_handler *hdl;
- int rval, i;
+ struct si4713_platform_data *pdata = client-dev.platform_data;
+ struct device_node *np = client-dev.of_node;
+ int rval;
+
+ struct radio_si4713_platform_data si4713_pdev_pdata;
+ struct platform_device *si4713_pdev;
sdev = devm_kzalloc(client-dev, sizeof(*sdev), GFP_KERNEL);
if (!sdev) {
@@ -1608,8 +1612,31 @@ static int si4713_probe(struct i2c_client *client,
goto free_ctrls;
}
+ if ((pdata pdata-is_platform_device) || np) {
+ si4713_pdev = platform_device_alloc(radio-si4713, -1);
+ if (!si4713_pdev)
+ goto put_main_pdev;
+
+ si4713_pdev_pdata.subdev = client;
+ rval =
[RFCv2 8/8] [media] si4713: cleanup platform data
Remove unreferenced members from the platform
data's structure.
Signed-off-by: Sebastian Reichel s...@kernel.org
---
include/media/si4713.h | 3 ---
1 file changed, 3 deletions(-)
diff --git a/include/media/si4713.h b/include/media/si4713.h
index 343b8fb5..be4f58e 100644
--- a/include/media/si4713.h
+++ b/include/media/si4713.h
@@ -23,9 +23,6 @@
* Platform dependent definition
*/
struct si4713_platform_data {
- const char * const *supply_names;
- unsigned supplies;
- int gpio_reset; /* 0 if not used */
bool is_platform_device;
};
--
2.1.1
--
To unsubscribe from this list: send the line unsubscribe linux-omap in
the body of a message to majord...@vger.kernel.org
More majordomo info at http://vger.kernel.org/majordomo-info.html
[PATCH] ARM: DRA7: hwmod data: Add missing UART hwmod data
From: Ambresh K ambr...@ti.com We had constrainted hwmod entries to entries in dts which were present only for default mapped interrupts, the ones such as UARTs 6 which needed IRQ crossbar configured were never added to hwmod database. Add them now that IRQ crossbar is functional Without this, enabling UARTs7 to 10 in dts results in the following crash: [1.893829] omap_uart 4842.serial: _od_fail_runtime_resume: FIXME: missing hwmod/omap_dev info [1.903381] Unhandled fault: imprecise external abort (0x1406) at 0x [1.903381] [ cut here ] [1.903381] WARNING: CPU: 0 PID: 0 at drivers/bus/omap_l3_noc.c:147 l3_interrupt_handler+0x2ac/0x32c() [1.903411] 4400.ocp:L3 Custom Error: MASTER MPU TARGET L4_PER2_P3 (Read): Data Access in User mode during Functional access [1.903411] Modules linked in: [1.903411] CPU: 0 PID: 0 Comm: swapper/0 Tainted: GW 3.18.0-rc1-dirty #3 [1.903442] [c0015270] (unwind_backtrace) from [c00119b4] (show_stack+0x10/0x14) [1.903442] [c00119b4] (show_stack) from [c05e4afc] (dump_stack+0x78/0x94) [1.903472] [c05e4afc] (dump_stack) from [c003fed0] (warn_slowpath_common+0x6c/0x8c) [1.903472] [c003fed0] (warn_slowpath_common) from [c003ff84] (warn_slowpath_fmt+0x30/0x40) [1.903472] [c003ff84] (warn_slowpath_fmt) from [c0333bfc] (l3_interrupt_handler+0x2ac/0x32c) [1.903503] [c0333bfc] (l3_interrupt_handler) from [c008d6f8] (handle_irq_event_percpu+0x60/0x230) [1.903503] [c008d6f8] (handle_irq_event_percpu) from [c008d904] (handle_irq_event+0x3c/0x5c) [1.903503] [c008d904] (handle_irq_event) from [c00903b0] (handle_fasteoi_irq+0xc4/0x190) [1.903503] [c00903b0] (handle_fasteoi_irq) from [c008d01c] (generic_handle_irq+0x20/0x30) [1.903533] [c008d01c] (generic_handle_irq) from [c008d114] (__handle_domain_irq+0x64/0xb8) [1.903533] [c008d114] (__handle_domain_irq) from [c00086e4] (gic_handle_irq+0x20/0x60) [1.903533] [c00086e4] (gic_handle_irq) from [c05eb124] (__irq_svc+0x44/0x5c) [1.903533] Exception stack(0xc08d1f60 to 0xc08d1fa8) [1.903564] 1f60: 0001 0001 c08dc930 c08d [1.903564] 1f80: ffed c0978028 c08d89dc c08d8978 c08d1fa8 c0083fc0 c000f160 [1.903564] 1fa0: 2013 [1.903564] [c05eb124] (__irq_svc) from [c000f160] (arch_cpu_idle+0x20/0x3c) [1.903594] [c000f160] (arch_cpu_idle) from [c0077c54] (cpu_startup_entry+0x198/0x338) [1.903594] [c0077c54] (cpu_startup_entry) from [c0869be0] (start_kernel+0x358/0x3c4) [1.903594] [c0869be0] (start_kernel) from [80008074] (0x80008074) [1.903594] ---[ end trace 293fc95d463cff71 ]--- [2.117553] Internal error: : 1406 [#1] SMP ARM [2.122314] Modules linked in: [2.125518] CPU: 1 PID: 1 Comm: swapper/0 Tainted: GW 3.18.0-rc1-dirty #3 [2.133850] task: ed868b80 ti: ed86a000 task.ti: ed86a000 [2.139526] PC is at serial_omap_probe+0x2fc/0x514 [2.144561] LR is at trace_hardirqs_on_caller+0xec/0x1c4 [2.150146] pc : [c038f0f0]lr : [c0083fc0]psr: 4013 [2.150146] sp : ed86be18 ip : ed9bb57c fp : f005e000 [2.162231] r10: 012a r9 : ed9b4f80 r8 : edc5bdcd [2.167724] r7 : edc58810 r6 : ed9bb400 r5 : ed9bb410 r4 : edc5bc10 [2.174560] r3 : r2 : r1 : 0014 r0 : ffed [2.181427] Flags: nZcv IRQs on FIQs on Mode SVC_32 ISA ARM Segment kernel [2.189117] Control: 10c5387d Table: 8000406a DAC: 0015 [2.195159] Process swapper/0 (pid: 1, stack limit = 0xed86a248) [2.201477] Stack: (0xed86be18 to 0xed86c000) [2.206054] be00: ed9ba2d0 [2.214660] be20: edc50150 0001 c08cba58 ed9bb410 ffed c09481d8 [2.223236] be40: c09481d8 c08cba58 c039bcfc c1170958 ed9bb410 [2.231842] be60: ed9bb444 c039a6f4 ed9bb410 c09481d8 ed9bb444 c08dc698 [2.240447] be80: edc4a100 c039a8b0 c09481d8 c039a81c c0399060 ed8afaa8 ed92c110 [2.249053] bea0: c09481d8 edc482c0 c0949308 c0399ee0 c077f80c c09481d8 ed86a000 c09481d8 [2.257659] bec0: ed86a000 c08dc698 c039b088 ed86a000 c08a1924 [2.266235] bee0: c08a1904 c00089c4 6093 [2.274841] bf00: 0004 ed868b80 0004 6053 0001 [2.283447] bf20: c0083ea8 0001 ed86a000 c08334bc ef7fc307 00b2 c0059358 [2.292053] bf40: c07e176c c083299c 0006 0006 c08cb588 c08b69cc 0006 c08b69ac [2.300659] bf60: c097a280 00b2 c08cba58 c0869588 c0869e04 0006 0006 [2.309234] bf80: c0869588 c05dfd7c [2.317840] bfa0: c05dfd84 c000e668
[PATCH] ARM: dts: DRA7: Add aliases for all serial ports
Add serial port aliases for consoles 6.
Signed-off-by: Nishanth Menon n...@ti.com
---
arch/arm/boot/dts/dra7.dtsi |4
1 file changed, 4 insertions(+)
diff --git a/arch/arm/boot/dts/dra7.dtsi b/arch/arm/boot/dts/dra7.dtsi
index 9cc9843..208dd83 100644
--- a/arch/arm/boot/dts/dra7.dtsi
+++ b/arch/arm/boot/dts/dra7.dtsi
@@ -34,6 +34,10 @@
serial3 = uart4;
serial4 = uart5;
serial5 = uart6;
+ serial6 = uart7;
+ serial7 = uart8;
+ serial8 = uart9;
+ serial9 = uart10;
};
timer {
--
1.7.9.5
--
To unsubscribe from this list: send the line unsubscribe linux-omap in
the body of a message to majord...@vger.kernel.org
More majordomo info at http://vger.kernel.org/majordomo-info.html
[PATCH] tty: serial: omap: increase max consoles to 10
Increase the maximum number of consoles possible to 10 since DRA7 now has the maximum number of consoles possible. without doing this, for example, enabling DRA7 UART10 results in internal data structures and console cannot match up and we endup with a crash as follows: [1.903503] omap_uart 48424000.serial: [UART-1]: failure [serial_omap_probe]: -22 [1.911437] omap_uart: probe of 48424000.serial failed with error -22 [1.920379] Unable to handle kernel NULL pointer dereference at virtual address 0004 [1.928894] pgd = c0004000 [1.931732] [0004] *pgd= [1.935485] Internal error: Oops: 5 [#1] SMP ARM [1.940338] Modules linked in: [1.943542] CPU: 1 PID: 12 Comm: kworker/1:0 Tainted: GW 3.18.0-rc1-1-g8821bc4-dirty #6 [1.953521] task: ed8a2d00 ti: ed8a4000 task.ti: ed8a4000 [1.959197] PC is at process_one_work+0x38/0x4a4 [1.964050] LR is at 0x0 [1.966705] pc : [c00548e0]lr : []psr: 4093 [1.966705] sp : ed8a5ea8 ip : ed8a5ec8 fp : eeb9abc0 [1.978759] r10: ed8a4000 r9 : 0008 r8 : ed842458 [1.984252] r7 : r6 : eeb9abc0 r5 : ed842440 r4 : edbf26a8 [1.991119] r3 : r2 : r1 : r0 : [1.997985] Flags: nZcv IRQs off FIQs on Mode SVC_32 ISA ARM Segment kernel [2.005767] Control: 10c5387d Table: 8000406a DAC: 0015 [2.011810] Process kworker/1:0 (pid: 12, stack limit = 0xed8a4248) [2.018371] Stack: (0xed8a5ea8 to 0xed8a6000) [2.022949] 5ea0: 0001 6093 c008346c 0001 ed8a5ec8 [2.031555] 5ec0: c0054de4 eeb9abc0 ed8a4000 ed842458 0008 ed8a4000 eeb9abc0 ed842440 [2.040161] 5ee0: eeb9abc0 eeb9abf0 ed8a4000 ed842458 0008 ed8a4000 eeb9abc0 c0054ec4 [2.048767] 5f00: ed8a4000 eeb9ac4c a053 ed845bc0 ed842440 c0054d80 [2.057342] 5f20: c005999c 0001 c05eaa64 ed842440 [2.065948] 5f40: dead4ead c097c680 [2.074554] 5f60: c078acd4 ed8a5f64 ed8a5f64 dead4ead [2.083160] 5f80: c097c680 c078acd4 ed8a5f90 ed8a5f90 60d3 ed845bc0 [2.091766] 5fa0: c00598d4 c000e668 [2.100341] 5fc0: [2.108947] 5fe0: 0013 90005148 11010482 [2.117553] [c00548e0] (process_one_work) from [c0054ec4] (worker_thread+0x144/0x498) [2.126159] [c0054ec4] (worker_thread) from [c005999c] (kthread+0xc8/0xe4) [2.133758] [c005999c] (kthread) from [c000e668] (ret_from_fork+0x14/0x2c) [2.141357] Code: e1a04001 e1a05000 e893000f e31e0004 (e5978004) [2.147766] ---[ end trace 5798e2803311b69f ]--- snip The final solution is to transition off to use 8250 driver and no dependency on console structures and move away from omap-serial driver, hence no major cleanups are done for this driver. Signed-off-by: Nishanth Menon n...@ti.com --- Ref: eventual 8250 driver to transition to: http://marc.info/?l=linux-kernelm=141201409108078w=2 drivers/tty/serial/omap-serial.c |2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/tty/serial/omap-serial.c b/drivers/tty/serial/omap-serial.c index 18c30ca..4f9cbb6 100644 --- a/drivers/tty/serial/omap-serial.c +++ b/drivers/tty/serial/omap-serial.c @@ -46,7 +46,7 @@ #include dt-bindings/gpio/gpio.h -#define OMAP_MAX_HSUART_PORTS 6 +#define OMAP_MAX_HSUART_PORTS 10 #define UART_BUILD_REVISION(x, y) (((x) 8) | (y)) -- 1.7.9.5 -- To unsubscribe from this list: send the line unsubscribe linux-omap in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
Re: [PATCH 1/4] ARM: dts: dra72-evm: Add NAND support
Roger,
On 10/21/2014 05:41 AM, Roger Quadros wrote:
DRA72-evm has a 256MB 16-bit wide NAND chip. Add
pinmux and NAND node.
The NAND chips 'Chip select' and 'Write protect' can be
controlled using DIP Switch SW5. To use NAND,
the switch must be configured like so:
SW5.1 (NAND_SELn) = ON (LOW)
SW5.9 (GPMC_WPN) = OFF (HIGH)
Could we move this description to the dts as a comment? it would be
little more easier to refer to than figuring it out from git log. I
recollect trying to figure this out while attempting to test out NAND
previously, never actually thought to check in git log. just a
suggestion..
Signed-off-by: Roger Quadros rog...@ti.com
Signed-off-by: Sekhar Nori nsek...@ti.com
---
arch/arm/boot/dts/dra72-evm.dts | 115
1 file changed, 115 insertions(+)
diff --git a/arch/arm/boot/dts/dra72-evm.dts b/arch/arm/boot/dts/dra72-evm.dts
index 4107428..6f5417a 100644
--- a/arch/arm/boot/dts/dra72-evm.dts
+++ b/arch/arm/boot/dts/dra72-evm.dts
@@ -26,6 +26,33 @@
0x404 (PIN_INPUT | MUX_MODE0) /* i2c1_scl.i2c1_scl */
;
};
+
+ nand_default: nand_default {
+ pinctrl-single,pins =
+ 0x0 (PIN_INPUT | MUX_MODE0) /* gpmc_ad0 */
+ 0x4 (PIN_INPUT | MUX_MODE0) /* gpmc_ad1 */
+ 0x8 (PIN_INPUT | MUX_MODE0) /* gpmc_ad2 */
+ 0xc (PIN_INPUT | MUX_MODE0) /* gpmc_ad3 */
+ 0x10(PIN_INPUT | MUX_MODE0) /* gpmc_ad4 */
+ 0x14(PIN_INPUT | MUX_MODE0) /* gpmc_ad5 */
+ 0x18(PIN_INPUT | MUX_MODE0) /* gpmc_ad6 */
+ 0x1c(PIN_INPUT | MUX_MODE0) /* gpmc_ad7 */
+ 0x20(PIN_INPUT | MUX_MODE0) /* gpmc_ad8 */
+ 0x24(PIN_INPUT | MUX_MODE0) /* gpmc_ad9 */
+ 0x28(PIN_INPUT | MUX_MODE0) /* gpmc_ad10 */
+ 0x2c(PIN_INPUT | MUX_MODE0) /* gpmc_ad11 */
+ 0x30(PIN_INPUT | MUX_MODE0) /* gpmc_ad12 */
+ 0x34(PIN_INPUT | MUX_MODE0) /* gpmc_ad13 */
+ 0x38(PIN_INPUT | MUX_MODE0) /* gpmc_ad14 */
+ 0x3c(PIN_INPUT | MUX_MODE0) /* gpmc_ad15 */
+ 0xb4(PIN_OUTPUT | MUX_MODE0) /* gpmc_cs0 */
+ 0xc4(PIN_OUTPUT | MUX_MODE0) /* gpmc_advn_ale */
+ 0xcc(PIN_OUTPUT | MUX_MODE0) /* gpmc_wen */
+ 0xc8(PIN_OUTPUT | MUX_MODE0) /* gpmc_oen_ren */
+ 0xd0(PIN_OUTPUT | MUX_MODE0) /* gpmc_ben0 */
+ 0xd8(PIN_INPUT | MUX_MODE0) /* gpmc_wait0 */
+ ;
+ };
};
i2c1 {
@@ -142,3 +169,91 @@
uart1 {
status = okay;
};
+
+elm {
+ status = okay;
+};
+
+gpmc {
+ status = okay;
+ pinctrl-names = default;
+ pinctrl-0 = nand_default;
+ ranges = 0 0 0 0x0100;/* minimum GPMC partition = 16MB */
+ nand@0,0 {
+ /* To use NAND, DIP switch SW5 must be set like so:
+ * SW5.1 (NAND_SELn) = ON (LOW)
+ * SW5.9 (GPMC_WPN) = OFF (HIGH)
+ */
+ reg = 0 0 4; /* device IO registers */
+ ti,nand-ecc-opt = bch8;
+ ti,elm-id = elm;
+ nand-bus-width = 16;
+ gpmc,device-width = 2;
+ gpmc,sync-clk-ps = 0;
+ gpmc,cs-on-ns = 0;
+ gpmc,cs-rd-off-ns = 80;
+ gpmc,cs-wr-off-ns = 80;
+ gpmc,adv-on-ns = 0;
+ gpmc,adv-rd-off-ns = 60;
+ gpmc,adv-wr-off-ns = 60;
+ gpmc,we-on-ns = 10;
+ gpmc,we-off-ns = 50;
+ gpmc,oe-on-ns = 4;
+ gpmc,oe-off-ns = 40;
+ gpmc,access-ns = 40;
+ gpmc,wr-access-ns = 80;
+ gpmc,rd-cycle-ns = 80;
+ gpmc,wr-cycle-ns = 80;
+ gpmc,bus-turnaround-ns = 0;
+ gpmc,cycle2cycle-delay-ns = 0;
+ gpmc,clk-activation-ns = 0;
+ gpmc,wait-monitoring-ns = 0;
+ gpmc,wr-data-mux-bus-ns = 0;
+ /* MTD partition table */
+ /* All SPL-* partitions are sized to minimal length
+ * which can be independently programmable. For
+ * NAND flash this is equal to size of erase-block */
+ #address-cells = 1;
+ #size-cells = 1;
+ partition@0 {
+ label = NAND.SPL;
+ reg = 0x 0x2;
+ };
+ partition@1 {
+ label = NAND.SPL.backup1;
+ reg = 0x0002 0x0002;
+ };
+ partition@2 {
+ label = NAND.SPL.backup2;
+
Re: [PATCH 1/4] ARM: dts: dra72-evm: Add NAND support
On Tue, Oct 21, 2014 at 11:43 AM, Nishanth Menon n...@ti.com wrote:
Roger,
On 10/21/2014 05:41 AM, Roger Quadros wrote:
DRA72-evm has a 256MB 16-bit wide NAND chip. Add
pinmux and NAND node.
The NAND chips 'Chip select' and 'Write protect' can be
controlled using DIP Switch SW5. To use NAND,
the switch must be configured like so:
SW5.1 (NAND_SELn) = ON (LOW)
SW5.9 (GPMC_WPN) = OFF (HIGH)
Could we move this description to the dts as a comment? it would be
little more easier to refer to than figuring it out from git log. I
recollect trying to figure this out while attempting to test out NAND
previously, never actually thought to check in git log. just a
suggestion..
[...]
+gpmc {
+ status = okay;
+ pinctrl-names = default;
+ pinctrl-0 = nand_default;
+ ranges = 0 0 0 0x0100;/* minimum GPMC partition = 16MB */
+ nand@0,0 {
+ /* To use NAND, DIP switch SW5 must be set like so:
+ * SW5.1 (NAND_SELn) = ON (LOW)
+ * SW5.9 (GPMC_WPN) = OFF (HIGH)
+ */
[...]
Uggh.. ignore my comment - I see you already did that.. my bad.. i missed it :(
Quickly trying to test this, I got the following:
[1.840728] omap-gpmc 5000.gpmc: GPMC revision 6.0
[1.847290] nand: device found, Manufacturer ID: 0x2c, Chip ID: 0xca
[1.854003] nand: Micron MT29F2G16ABAEAWP
[1.858245] nand: 256MiB, SLC, page size: 2048, OOB size: 64
[1.864227] omap2-nand omap2-nand.0: CONFIG_MTD_NAND_OMAP_BCH not enabled
[1.871459] omap2-nand: probe of omap2-nand.0 failed with error -22
Full log: http://hastebin.com/ozugepemin.md
Does this depend on
http://marc.info/?l=linux-omapm=141389532511600w=2 to function? I
assume yes.
as well?
---
Regards,
Nishanth Menon
--
To unsubscribe from this list: send the line unsubscribe linux-omap in
the body of a message to majord...@vger.kernel.org
More majordomo info at http://vger.kernel.org/majordomo-info.html
Re: [PATCH v3 0/2] Add DRA7xx CPSW Ethernet support in Device Tree
On 15:37-20141021, Mugunthan V N wrote: Nishanth On Tuesday 21 October 2014 03:30 PM, Mugunthan V N wrote: Adding device tree entry for CPSW to make it work in Dual EMAC mode. These patches were tested with DRA7 hwmod patches on top of linux-next. Patches are tested on top of Nishanth's PM tree for v3.17 [1] and pushed my tree to [2]. Did a boot test with CPSW and ping test with suspend/resume, the boot logs on DRA7xx EVM are posted at [3] [1] git://github.com/nmenon/linux-2.6-playground.git testing/v3.17/cpu-idle-suspend-dra7-omap5-framework [2] git://git.ti.com/~mugunthanvnm/ti-linux-kernel/linux.git v3.17/dra7-evm-cpsw-v3 [3] http://pastebin.ubuntu.com/8613072/ Changes from v2: * Changed pinctrl comments to hold mode0-name.mode-selected-name * Changes slave numbers in the pinctrl comments * Added cpsw and cpts clocks I have not added support for dra72x-evm as it has only slave no 2 pinned out and having issues with bringing up the interface, need some more time to submit the patch, in the mean time I have submitted dra7-evm support only so that people can use dra7-evm on linux-next. Quickly tested as well: http://slexy.org/raw/s2vISJxYrR Please feel free to add: Tested-by: Nishanth Menon n...@ti.com Acked-by: Nishanth Menon n...@ti.com -- Regards, Nishanth Menon -- To unsubscribe from this list: send the line unsubscribe linux-omap in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
Re: [PATCH 1/4] ARM: dts: dra72-evm: Add NAND support
On 12:16-20141021, Nishanth Menon wrote:
On Tue, Oct 21, 2014 at 11:43 AM, Nishanth Menon n...@ti.com wrote:
Roger,
On 10/21/2014 05:41 AM, Roger Quadros wrote:
DRA72-evm has a 256MB 16-bit wide NAND chip. Add
pinmux and NAND node.
The NAND chips 'Chip select' and 'Write protect' can be
controlled using DIP Switch SW5. To use NAND,
the switch must be configured like so:
SW5.1 (NAND_SELn) = ON (LOW)
SW5.9 (GPMC_WPN) = OFF (HIGH)
Could we move this description to the dts as a comment? it would be
little more easier to refer to than figuring it out from git log. I
recollect trying to figure this out while attempting to test out NAND
previously, never actually thought to check in git log. just a
suggestion..
[...]
+gpmc {
+ status = okay;
+ pinctrl-names = default;
+ pinctrl-0 = nand_default;
+ ranges = 0 0 0 0x0100;/* minimum GPMC partition = 16MB */
+ nand@0,0 {
+ /* To use NAND, DIP switch SW5 must be set like so:
^^ minor:
/*
* To use NAND,
+ * SW5.1 (NAND_SELn) = ON (LOW)
+ * SW5.9 (GPMC_WPN) = OFF (HIGH)
+ */
[...]
Uggh.. ignore my comment - I see you already did that.. my bad.. i missed it
:(
Quickly trying to test this, I got the following:
[1.840728] omap-gpmc 5000.gpmc: GPMC revision 6.0
[1.847290] nand: device found, Manufacturer ID: 0x2c, Chip ID: 0xca
[1.854003] nand: Micron MT29F2G16ABAEAWP
[1.858245] nand: 256MiB, SLC, page size: 2048, OOB size: 64
[1.864227] omap2-nand omap2-nand.0: CONFIG_MTD_NAND_OMAP_BCH not enabled
[1.871459] omap2-nand: probe of omap2-nand.0 failed with error -22
Full log: http://hastebin.com/ozugepemin.md
Does this depend on
http://marc.info/?l=linux-omapm=141389532511600w=2 to function? I
assume yes.
looks like we'd want Tony to enable CONFIG_MTD_NAND_OMAP_BCH in
omap2plus_defconfig?
With that, it works like a charm..
http://slexy.org/raw/s29rfTTWB4
Feel free to add my:
Tested-by: Nishanth Menon n...@ti.com
Acked-by: Nishanth Menon n...@ti.com
--
Regards,
Nishanth Menon
--
To unsubscribe from this list: send the line unsubscribe linux-omap in
the body of a message to majord...@vger.kernel.org
More majordomo info at http://vger.kernel.org/majordomo-info.html
[PATCH v2 11/20] rtc: omap: add structured device-type info
Add structured device-type info to encode IP-block revision differences.
Signed-off-by: Johan Hovold jo...@kernel.org
---
drivers/rtc/rtc-omap.c | 103 -
1 file changed, 51 insertions(+), 52 deletions(-)
diff --git a/drivers/rtc/rtc-omap.c b/drivers/rtc/rtc-omap.c
index f70ae660368b..1abd88e24c22 100644
--- a/drivers/rtc/rtc-omap.c
+++ b/drivers/rtc/rtc-omap.c
@@ -102,19 +102,11 @@
#defineKICK0_VALUE 0x83e70b13
#defineKICK1_VALUE 0x95a4f1e0
-#defineOMAP_RTC_HAS_KICKER BIT(0)
-
-/*
- * Few RTC IP revisions has special WAKE-EN Register to enable Wakeup
- * generation for event Alarm.
- */
-#defineOMAP_RTC_HAS_IRQWAKEEN BIT(1)
-
-/*
- * Some RTC IP revisions (like those in AM335x and DRA7x) need
- * the 32KHz clock to be explicitly enabled.
- */
-#define OMAP_RTC_HAS_32KCLK_EN BIT(2)
+struct omap_rtc_device_type {
+ bool has_32kclk_en;
+ bool has_kicker;
+ bool has_irqwakeen;
+};
struct omap_rtc {
struct rtc_device *rtc;
@@ -122,7 +114,7 @@ struct omap_rtc {
int irq_alarm;
int irq_timer;
u8 interrupts_reg;
- unsigned long flags;
+ const struct omap_rtc_device_type *type;
};
static inline u8 rtc_read(struct omap_rtc *rtc, unsigned int reg)
@@ -190,7 +182,7 @@ static int omap_rtc_alarm_irq_enable(struct device *dev,
unsigned int enabled)
local_irq_disable();
rtc_wait_not_busy(rtc);
reg = rtc_read(rtc, OMAP_RTC_INTERRUPTS_REG);
- if (rtc-flags OMAP_RTC_HAS_IRQWAKEEN)
+ if (rtc-type-has_irqwakeen)
irqwake_reg = rtc_read(rtc, OMAP_RTC_IRQWAKEEN);
if (enabled) {
@@ -202,7 +194,7 @@ static int omap_rtc_alarm_irq_enable(struct device *dev,
unsigned int enabled)
}
rtc_wait_not_busy(rtc);
rtc_write(rtc, OMAP_RTC_INTERRUPTS_REG, reg);
- if (rtc-flags OMAP_RTC_HAS_IRQWAKEEN)
+ if (rtc-type-has_irqwakeen)
rtc_write(rtc, OMAP_RTC_IRQWAKEEN, irqwake_reg);
local_irq_enable();
@@ -326,7 +318,7 @@ static int omap_rtc_set_alarm(struct device *dev, struct
rtc_wkalrm *alm)
rtc_write(rtc, OMAP_RTC_ALARM_SECONDS_REG, alm-time.tm_sec);
reg = rtc_read(rtc, OMAP_RTC_INTERRUPTS_REG);
- if (rtc-flags OMAP_RTC_HAS_IRQWAKEEN)
+ if (rtc-type-has_irqwakeen)
irqwake_reg = rtc_read(rtc, OMAP_RTC_IRQWAKEEN);
if (alm-enabled) {
@@ -337,7 +329,7 @@ static int omap_rtc_set_alarm(struct device *dev, struct
rtc_wkalrm *alm)
irqwake_reg = ~OMAP_RTC_IRQWAKEEN_ALARM_WAKEEN;
}
rtc_write(rtc, OMAP_RTC_INTERRUPTS_REG, reg);
- if (rtc-flags OMAP_RTC_HAS_IRQWAKEEN)
+ if (rtc-type-has_irqwakeen)
rtc_write(rtc, OMAP_RTC_IRQWAKEEN, irqwake_reg);
local_irq_enable();
@@ -353,34 +345,45 @@ static struct rtc_class_ops omap_rtc_ops = {
.alarm_irq_enable = omap_rtc_alarm_irq_enable,
};
-#defineOMAP_RTC_DATA_AM3352_IDX1
-#defineOMAP_RTC_DATA_DA830_IDX 2
+static const struct omap_rtc_device_type omap_rtc_default_type = {
+};
+
+static const struct omap_rtc_device_type omap_rtc_am3352_type = {
+ .has_32kclk_en = true,
+ .has_kicker = true,
+ .has_irqwakeen = true,
+};
+
+static const struct omap_rtc_device_type omap_rtc_da830_type = {
+ .has_kicker = true,
+};
-static const struct platform_device_id omap_rtc_devtype[] = {
+static const struct platform_device_id omap_rtc_id_table[] = {
{
.name = omap_rtc,
- },
- [OMAP_RTC_DATA_AM3352_IDX] = {
+ .driver_data = (kernel_ulong_t)omap_rtc_default_type,
+ }, {
.name = am3352-rtc,
- .driver_data = OMAP_RTC_HAS_KICKER | OMAP_RTC_HAS_IRQWAKEEN |
- OMAP_RTC_HAS_32KCLK_EN,
- },
- [OMAP_RTC_DATA_DA830_IDX] = {
+ .driver_data = (kernel_ulong_t)omap_rtc_am3352_type,
+ }, {
.name = da830-rtc,
- .driver_data = OMAP_RTC_HAS_KICKER,
- },
- {},
+ .driver_data = (kernel_ulong_t)omap_rtc_da830_type,
+ }, {
+ /* sentinel */
+ }
};
-MODULE_DEVICE_TABLE(platform, omap_rtc_devtype);
+MODULE_DEVICE_TABLE(platform, omap_rtc_id_table);
static const struct of_device_id omap_rtc_of_match[] = {
- { .compatible = ti,da830-rtc,
- .data = omap_rtc_devtype[OMAP_RTC_DATA_DA830_IDX],
- },
- { .compatible = ti,am3352-rtc,
- .data = omap_rtc_devtype[OMAP_RTC_DATA_AM3352_IDX],
- },
- {},
+ {
+ .compatible = ti,am3352-rtc,
+ .data = omap_rtc_am3352_type,
+ }, {
+ .compatible = ti,da830-rtc,
+
[PATCH v2 07/20] rtc: omap: use dev_info
Use dev_info rather than pr_info.
Signed-off-by: Johan Hovold jo...@kernel.org
---
drivers/rtc/rtc-omap.c | 7 +++
1 file changed, 3 insertions(+), 4 deletions(-)
diff --git a/drivers/rtc/rtc-omap.c b/drivers/rtc/rtc-omap.c
index c750678de652..dbb88e46c25d 100644
--- a/drivers/rtc/rtc-omap.c
+++ b/drivers/rtc/rtc-omap.c
@@ -427,8 +427,7 @@ static int __init omap_rtc_probe(struct platform_device
*pdev)
/* clear old status */
reg = rtc_read(OMAP_RTC_STATUS_REG);
if (reg (u8) OMAP_RTC_STATUS_POWER_UP) {
- pr_info(%s: RTC power up reset detected\n,
- pdev-name);
+ dev_info(pdev-dev, RTC power up reset detected\n);
rtc_write(OMAP_RTC_STATUS_POWER_UP, OMAP_RTC_STATUS_REG);
}
if (reg (u8) OMAP_RTC_STATUS_ALARM)
@@ -437,7 +436,7 @@ static int __init omap_rtc_probe(struct platform_device
*pdev)
/* On boards with split power, RTC_ON_NOFF won't reset the RTC */
reg = rtc_read(OMAP_RTC_CTRL_REG);
if (reg (u8) OMAP_RTC_CTRL_STOP)
- pr_info(%s: already running\n, pdev-name);
+ dev_info(pdev-dev, already running\n);
/* force to 24 hour mode */
new_ctrl = reg (OMAP_RTC_CTRL_SPLIT|OMAP_RTC_CTRL_AUTO_COMP);
@@ -458,7 +457,7 @@ static int __init omap_rtc_probe(struct platform_device
*pdev)
*/
if (new_ctrl (u8) OMAP_RTC_CTRL_SPLIT)
- pr_info(%s: split power mode\n, pdev-name);
+ dev_info(pdev-dev, split power mode\n);
if (reg != new_ctrl)
rtc_write(new_ctrl, OMAP_RTC_CTRL_REG);
--
2.0.4
--
To unsubscribe from this list: send the line unsubscribe linux-omap in
the body of a message to majord...@vger.kernel.org
More majordomo info at http://vger.kernel.org/majordomo-info.html
[PATCH v2 04/20] rtc: omap: clean up probe error handling
Remove some debug messages and return errors from subsystems rather than
always fail with -EIO.
Note that the class-registration error has already been logged by rtc
core.
Signed-off-by: Johan Hovold jo...@kernel.org
---
drivers/rtc/rtc-omap.c | 41 ++---
1 file changed, 18 insertions(+), 23 deletions(-)
diff --git a/drivers/rtc/rtc-omap.c b/drivers/rtc/rtc-omap.c
index 813d475fe7c6..6b10db5a5702 100644
--- a/drivers/rtc/rtc-omap.c
+++ b/drivers/rtc/rtc-omap.c
@@ -379,6 +379,7 @@ static int __init omap_rtc_probe(struct platform_device
*pdev)
u8 reg, new_ctrl;
const struct platform_device_id *id_entry;
const struct of_device_id *of_id;
+ int ret;
of_id = of_match_device(omap_rtc_of_match, pdev-dev);
if (of_id)
@@ -391,16 +392,12 @@ static int __init omap_rtc_probe(struct platform_device
*pdev)
}
omap_rtc_timer = platform_get_irq(pdev, 0);
- if (omap_rtc_timer = 0) {
- pr_debug(%s: no update irq?\n, pdev-name);
+ if (omap_rtc_timer = 0)
return -ENOENT;
- }
omap_rtc_alarm = platform_get_irq(pdev, 1);
- if (omap_rtc_alarm = 0) {
- pr_debug(%s: no alarm irq?\n, pdev-name);
+ if (omap_rtc_alarm = 0)
return -ENOENT;
- }
res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
rtc_base = devm_ioremap_resource(pdev-dev, res);
@@ -421,9 +418,8 @@ static int __init omap_rtc_probe(struct platform_device
*pdev)
rtc = devm_rtc_device_register(pdev-dev, pdev-name,
omap_rtc_ops, THIS_MODULE);
if (IS_ERR(rtc)) {
- pr_debug(%s: can't register RTC device, err %ld\n,
- pdev-name, PTR_ERR(rtc));
- goto fail0;
+ ret = PTR_ERR(rtc);
+ goto err;
}
platform_set_drvdata(pdev, rtc);
@@ -451,18 +447,16 @@ static int __init omap_rtc_probe(struct platform_device
*pdev)
rtc_write(OMAP_RTC_STATUS_ALARM, OMAP_RTC_STATUS_REG);
/* handle periodic and alarm irqs */
- if (devm_request_irq(pdev-dev, omap_rtc_timer, rtc_irq, 0,
- dev_name(rtc-dev), rtc)) {
- pr_debug(%s: RTC timer interrupt IRQ%d already claimed\n,
- pdev-name, omap_rtc_timer);
- goto fail0;
- }
- if ((omap_rtc_timer != omap_rtc_alarm)
- (devm_request_irq(pdev-dev, omap_rtc_alarm, rtc_irq, 0,
- dev_name(rtc-dev), rtc))) {
- pr_debug(%s: RTC alarm interrupt IRQ%d already claimed\n,
- pdev-name, omap_rtc_alarm);
- goto fail0;
+ ret = devm_request_irq(pdev-dev, omap_rtc_timer, rtc_irq, 0,
+ dev_name(rtc-dev), rtc);
+ if (ret)
+ goto err;
+
+ if (omap_rtc_timer != omap_rtc_alarm) {
+ ret = devm_request_irq(pdev-dev, omap_rtc_alarm, rtc_irq, 0,
+ dev_name(rtc-dev), rtc);
+ if (ret)
+ goto err;
}
/* On boards with split power, RTC_ON_NOFF won't reset the RTC */
@@ -496,13 +490,14 @@ static int __init omap_rtc_probe(struct platform_device
*pdev)
return 0;
-fail0:
+err:
device_init_wakeup(pdev-dev, false);
if (id_entry-driver_data OMAP_RTC_HAS_KICKER)
rtc_writel(0, OMAP_RTC_KICK0_REG);
pm_runtime_put_sync(pdev-dev);
pm_runtime_disable(pdev-dev);
- return -EIO;
+
+ return ret;
}
static int __exit omap_rtc_remove(struct platform_device *pdev)
--
2.0.4
--
To unsubscribe from this list: send the line unsubscribe linux-omap in
the body of a message to majord...@vger.kernel.org
More majordomo info at http://vger.kernel.org/majordomo-info.html
[PATCH v2 20/20] ARM: dts: am335x-boneblack: enable power off and rtc wake up
Configure the RTC as system-power controller, which allows the system to
be powered off as well as woken up again on subsequent RTC alarms.
Note that the PMIC needs to be put in SLEEP (rather than OFF) mode to
maintain RTC power. Specifically, this means that the PMIC
ti,pmic-shutdown-controller property must be left unset in order to be
able to wake up on RTC alarms.
Tested on BeagleBone Black (rev A5).
Reviewed-by: Felipe Balbi ba...@ti.com
Signed-off-by: Johan Hovold jo...@kernel.org
---
arch/arm/boot/dts/am335x-boneblack.dts | 4
1 file changed, 4 insertions(+)
diff --git a/arch/arm/boot/dts/am335x-boneblack.dts
b/arch/arm/boot/dts/am335x-boneblack.dts
index 305975d3f531..0c8cdc9520b7 100644
--- a/arch/arm/boot/dts/am335x-boneblack.dts
+++ b/arch/arm/boot/dts/am335x-boneblack.dts
@@ -75,3 +75,7 @@
status = okay;
};
};
+
+rtc {
+ ti,system-power-controller;
+};
--
2.0.4
--
To unsubscribe from this list: send the line unsubscribe linux-omap in
the body of a message to majord...@vger.kernel.org
More majordomo info at http://vger.kernel.org/majordomo-info.html
[PATCH v2 09/20] rtc: omap: add device abstraction
Add struct omap_rtc to hold previously global data as well as the
IP-block feature flags.
Also convert the register-access macros to proper inline helper functions.
Signed-off-by: Johan Hovold jo...@kernel.org
---
drivers/rtc/rtc-omap.c | 239 +++--
1 file changed, 133 insertions(+), 106 deletions(-)
diff --git a/drivers/rtc/rtc-omap.c b/drivers/rtc/rtc-omap.c
index bdee29674589..1da610b8981f 100644
--- a/drivers/rtc/rtc-omap.c
+++ b/drivers/rtc/rtc-omap.c
@@ -118,26 +118,42 @@
*/
#define OMAP_RTC_HAS_32KCLK_EN BIT(2)
-static void __iomem*rtc_base;
+struct omap_rtc {
+ struct rtc_device *rtc;
+ void __iomem *base;
+ int irq_alarm;
+ int irq_timer;
+ u8 interrupts_reg;
+ unsigned long flags;
+};
-#define rtc_read(addr) readb(rtc_base + (addr))
-#define rtc_write(val, addr) writeb(val, rtc_base + (addr))
+static inline u8 rtc_read(struct omap_rtc *rtc, unsigned int reg)
+{
+ return readb(rtc-base + reg);
+}
-#define rtc_writel(val, addr) writel(val, rtc_base + (addr))
+static inline void rtc_write(struct omap_rtc *rtc, unsigned int reg, u8 val)
+{
+ writeb(val, rtc-base + reg);
+}
+static inline void rtc_writel(struct omap_rtc *rtc, unsigned int reg, u32 val)
+{
+ writel(val, rtc-base + reg);
+}
/* we rely on the rtc framework to handle locking (rtc-ops_lock),
* so the only other requirement is that register accesses which
* require BUSY to be clear are made with IRQs locally disabled
*/
-static void rtc_wait_not_busy(void)
+static void rtc_wait_not_busy(struct omap_rtc *rtc)
{
int count = 0;
u8 status;
/* BUSY may stay active for 1/32768 second (~30 usec) */
for (count = 0; count 50; count++) {
- status = rtc_read(OMAP_RTC_STATUS_REG);
+ status = rtc_read(rtc, OMAP_RTC_STATUS_REG);
if ((status (u8)OMAP_RTC_STATUS_BUSY) == 0)
break;
udelay(1);
@@ -145,16 +161,17 @@ static void rtc_wait_not_busy(void)
/* now we have ~15 usec to read/write various registers */
}
-static irqreturn_t rtc_irq(int irq, void *rtc)
+static irqreturn_t rtc_irq(int irq, void *dev_id)
{
+ struct omap_rtc *rtc = dev_id;
unsigned long events = 0;
u8 irq_data;
- irq_data = rtc_read(OMAP_RTC_STATUS_REG);
+ irq_data = rtc_read(rtc, OMAP_RTC_STATUS_REG);
/* alarm irq? */
if (irq_data OMAP_RTC_STATUS_ALARM) {
- rtc_write(OMAP_RTC_STATUS_ALARM, OMAP_RTC_STATUS_REG);
+ rtc_write(rtc, OMAP_RTC_STATUS_REG, OMAP_RTC_STATUS_ALARM);
events |= RTC_IRQF | RTC_AF;
}
@@ -162,23 +179,21 @@ static irqreturn_t rtc_irq(int irq, void *rtc)
if (irq_data OMAP_RTC_STATUS_1S_EVENT)
events |= RTC_IRQF | RTC_UF;
- rtc_update_irq(rtc, 1, events);
+ rtc_update_irq(rtc-rtc, 1, events);
return IRQ_HANDLED;
}
static int omap_rtc_alarm_irq_enable(struct device *dev, unsigned int enabled)
{
+ struct omap_rtc *rtc = dev_get_drvdata(dev);
u8 reg, irqwake_reg = 0;
- struct platform_device *pdev = to_platform_device(dev);
- const struct platform_device_id *id_entry =
- platform_get_device_id(pdev);
local_irq_disable();
- rtc_wait_not_busy();
- reg = rtc_read(OMAP_RTC_INTERRUPTS_REG);
- if (id_entry-driver_data OMAP_RTC_HAS_IRQWAKEEN)
- irqwake_reg = rtc_read(OMAP_RTC_IRQWAKEEN);
+ rtc_wait_not_busy(rtc);
+ reg = rtc_read(rtc, OMAP_RTC_INTERRUPTS_REG);
+ if (rtc-flags OMAP_RTC_HAS_IRQWAKEEN)
+ irqwake_reg = rtc_read(rtc, OMAP_RTC_IRQWAKEEN);
if (enabled) {
reg |= OMAP_RTC_INTERRUPTS_IT_ALARM;
@@ -187,10 +202,10 @@ static int omap_rtc_alarm_irq_enable(struct device *dev,
unsigned int enabled)
reg = ~OMAP_RTC_INTERRUPTS_IT_ALARM;
irqwake_reg = ~OMAP_RTC_IRQWAKEEN_ALARM_WAKEEN;
}
- rtc_wait_not_busy();
- rtc_write(reg, OMAP_RTC_INTERRUPTS_REG);
- if (id_entry-driver_data OMAP_RTC_HAS_IRQWAKEEN)
- rtc_write(irqwake_reg, OMAP_RTC_IRQWAKEEN);
+ rtc_wait_not_busy(rtc);
+ rtc_write(rtc, OMAP_RTC_INTERRUPTS_REG, reg);
+ if (rtc-flags OMAP_RTC_HAS_IRQWAKEEN)
+ rtc_write(rtc, OMAP_RTC_IRQWAKEEN, irqwake_reg);
local_irq_enable();
return 0;
@@ -231,16 +246,18 @@ static void bcd2tm(struct rtc_time *tm)
static int omap_rtc_read_time(struct device *dev, struct rtc_time *tm)
{
+ struct omap_rtc *rtc = dev_get_drvdata(dev);
+
/* we don't report wday/yday/isdst ... */
local_irq_disable();
- rtc_wait_not_busy();
+ rtc_wait_not_busy(rtc);
- tm-tm_sec = rtc_read(OMAP_RTC_SECONDS_REG);
-
[PATCH v2 19/20] ARM: dts: am33xx: update rtc-node compatible property
Enable am33xx specific RTC features (e.g. PMIC control) by adding
ti,am3352-rtc to the compatible property of the rtc node.
Reviewed-by: Felipe Balbi ba...@ti.com
Signed-off-by: Johan Hovold jo...@kernel.org
---
arch/arm/boot/dts/am33xx.dtsi | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/arch/arm/boot/dts/am33xx.dtsi b/arch/arm/boot/dts/am33xx.dtsi
index 3a0a161342ba..098e53602d5c 100644
--- a/arch/arm/boot/dts/am33xx.dtsi
+++ b/arch/arm/boot/dts/am33xx.dtsi
@@ -411,7 +411,7 @@
};
rtc: rtc@44e3e000 {
- compatible = ti,da830-rtc;
+ compatible = ti,am3352-rtc, ti,da830-rtc;
reg = 0x44e3e000 0x1000;
interrupts = 75
76;
--
2.0.4
--
To unsubscribe from this list: send the line unsubscribe linux-omap in
the body of a message to majord...@vger.kernel.org
More majordomo info at http://vger.kernel.org/majordomo-info.html
[PATCH v2 15/20] rtc: omap: add support for pmic_power_en
Add new property ti,system-power-controller to register the RTC as a
power-off handler.
Some RTC IP revisions can control an external PMIC via the pmic_power_en
pin, which can be configured to transition to OFF on ALARM2 events and
back to ON on subsequent ALARM (wakealarm) events.
This is based on earlier work by Colin Foe-Parker and AnilKumar Ch. [1]
[1] https://www.mail-archive.com/linux-omap@vger.kernel.org/msg82127.html
Signed-off-by: Johan Hovold jo...@kernel.org
---
Documentation/devicetree/bindings/rtc/rtc-omap.txt | 9 ++-
drivers/rtc/rtc-omap.c | 93 ++
2 files changed, 101 insertions(+), 1 deletion(-)
diff --git a/Documentation/devicetree/bindings/rtc/rtc-omap.txt
b/Documentation/devicetree/bindings/rtc/rtc-omap.txt
index 5a0f02d34d95..750efd40c72e 100644
--- a/Documentation/devicetree/bindings/rtc/rtc-omap.txt
+++ b/Documentation/devicetree/bindings/rtc/rtc-omap.txt
@@ -5,11 +5,17 @@ Required properties:
- ti,da830-rtc - for RTC IP used similar to that on DA8xx SoC family.
- ti,am3352-rtc - for RTC IP used similar to that on AM335x SoC
family.
This RTC IP has special WAKE-EN Register to enable
- Wakeup generation for event Alarm.
+ Wakeup generation for event Alarm. It can also be
+ used to control an external PMIC via the
+ pmic_power_en pin.
- reg: Address range of rtc register set
- interrupts: rtc timer, alarm interrupts in order
- interrupt-parent: phandle for the interrupt controller
+Optional properties:
+- ti,system-power-controller: whether the rtc is controlling the system power
+ through pmic_power_en
+
Example:
rtc@1c23000 {
@@ -18,4 +24,5 @@ rtc@1c23000 {
interrupts = 19
19;
interrupt-parent = intc;
+ ti,system-power-controller;
};
diff --git a/drivers/rtc/rtc-omap.c b/drivers/rtc/rtc-omap.c
index c508e45ca3ce..f6c93f877857 100644
--- a/drivers/rtc/rtc-omap.c
+++ b/drivers/rtc/rtc-omap.c
@@ -68,6 +68,15 @@
#define OMAP_RTC_IRQWAKEEN 0x7c
+#define OMAP_RTC_ALARM2_SECONDS_REG0x80
+#define OMAP_RTC_ALARM2_MINUTES_REG0x84
+#define OMAP_RTC_ALARM2_HOURS_REG 0x88
+#define OMAP_RTC_ALARM2_DAYS_REG 0x8c
+#define OMAP_RTC_ALARM2_MONTHS_REG 0x90
+#define OMAP_RTC_ALARM2_YEARS_REG 0x94
+
+#define OMAP_RTC_PMIC_REG 0x98
+
/* OMAP_RTC_CTRL_REG bit fields: */
#define OMAP_RTC_CTRL_SPLITBIT(7)
#define OMAP_RTC_CTRL_DISABLE BIT(6)
@@ -80,6 +89,7 @@
/* OMAP_RTC_STATUS_REG bit fields: */
#define OMAP_RTC_STATUS_POWER_UP BIT(7)
+#define OMAP_RTC_STATUS_ALARM2 BIT(7)
#define OMAP_RTC_STATUS_ALARM BIT(6)
#define OMAP_RTC_STATUS_1D_EVENT BIT(5)
#define OMAP_RTC_STATUS_1H_EVENT BIT(4)
@@ -89,6 +99,7 @@
#define OMAP_RTC_STATUS_BUSY BIT(0)
/* OMAP_RTC_INTERRUPTS_REG bit fields: */
+#define OMAP_RTC_INTERRUPTS_IT_ALARM2 BIT(4)
#define OMAP_RTC_INTERRUPTS_IT_ALARM BIT(3)
#define OMAP_RTC_INTERRUPTS_IT_TIMER BIT(2)
@@ -98,6 +109,9 @@
/* OMAP_RTC_IRQWAKEEN bit fields: */
#define OMAP_RTC_IRQWAKEEN_ALARM_WAKEENBIT(1)
+/* OMAP_RTC_PMIC bit fields: */
+#define OMAP_RTC_PMIC_POWER_EN_EN BIT(16)
+
/* OMAP_RTC_KICKER values */
#defineKICK0_VALUE 0x83e70b13
#defineKICK1_VALUE 0x95a4f1e0
@@ -106,6 +120,7 @@ struct omap_rtc_device_type {
bool has_32kclk_en;
bool has_kicker;
bool has_irqwakeen;
+ bool has_pmic_mode;
bool has_power_up_reset;
};
@@ -115,6 +130,7 @@ struct omap_rtc {
int irq_alarm;
int irq_timer;
u8 interrupts_reg;
+ bool is_pmic_controller;
const struct omap_rtc_device_type *type;
};
@@ -345,6 +361,63 @@ static int omap_rtc_set_alarm(struct device *dev, struct
rtc_wkalrm *alm)
return 0;
}
+static struct omap_rtc *omap_rtc_power_off_rtc;
+
+/*
+ * omap_rtc_poweroff: RTC-controlled power off
+ *
+ * The RTC can be used to control an external PMIC via the pmic_power_en pin,
+ * which can be configured to transition to OFF on ALARM2 events.
+ *
+ * Notes:
+ * The two-second alarm offset is the shortest offset possible as the alarm
+ * registers must be set before the next timer update and the offset
+ * calculation is too heavy for everything to be done within a single access
+ * period (~15us).
+ *
+ * Called with local interrupts disabled.
+ */
+static void omap_rtc_power_off(void)
+{
+ struct omap_rtc *rtc = omap_rtc_power_off_rtc;
+ struct rtc_time tm;
+ unsigned long now;
+ u32 val;
+
+ /* enable pmic_power_en control */
+ val = rtc_readl(rtc, OMAP_RTC_PMIC_REG);
+ rtc_writel(rtc, OMAP_RTC_PMIC_REG, val | OMAP_RTC_PMIC_POWER_EN_EN);
+
+ /* set alarm two seconds from now */
+
[PATCH v2 08/20] rtc: omap: make platform-device id table const
Make platform-device id table const.
Signed-off-by: Johan Hovold jo...@kernel.org
---
drivers/rtc/rtc-omap.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/rtc/rtc-omap.c b/drivers/rtc/rtc-omap.c
index dbb88e46c25d..bdee29674589 100644
--- a/drivers/rtc/rtc-omap.c
+++ b/drivers/rtc/rtc-omap.c
@@ -342,7 +342,7 @@ static int omap_rtc_timer;
#defineOMAP_RTC_DATA_AM3352_IDX1
#defineOMAP_RTC_DATA_DA830_IDX 2
-static struct platform_device_id omap_rtc_devtype[] = {
+static const struct platform_device_id omap_rtc_devtype[] = {
{
.name = DRIVER_NAME,
},
--
2.0.4
--
To unsubscribe from this list: send the line unsubscribe linux-omap in
the body of a message to majord...@vger.kernel.org
More majordomo info at http://vger.kernel.org/majordomo-info.html
[PATCH v2 14/20] rtc: omap: add helper to read 32-bit registers
Add helper to read full register width.
Signed-off-by: Johan Hovold jo...@kernel.org
---
drivers/rtc/rtc-omap.c | 5 +
1 file changed, 5 insertions(+)
diff --git a/drivers/rtc/rtc-omap.c b/drivers/rtc/rtc-omap.c
index bcdf3c596214..c508e45ca3ce 100644
--- a/drivers/rtc/rtc-omap.c
+++ b/drivers/rtc/rtc-omap.c
@@ -123,6 +123,11 @@ static inline u8 rtc_read(struct omap_rtc *rtc, unsigned
int reg)
return readb(rtc-base + reg);
}
+static inline u32 rtc_readl(struct omap_rtc *rtc, unsigned int reg)
+{
+ return readl(rtc-base + reg);
+}
+
static inline void rtc_write(struct omap_rtc *rtc, unsigned int reg, u8 val)
{
writeb(val, rtc-base + reg);
--
2.0.4
--
To unsubscribe from this list: send the line unsubscribe linux-omap in
the body of a message to majord...@vger.kernel.org
More majordomo info at http://vger.kernel.org/majordomo-info.html
[PATCH v2 00/20] rtc: omap: fixes and power-off feature
This series fixes a few issues with the omap rtc-driver, cleans up a bit, adds device abstraction, and finally adds support for the PMIC control feature found in some revisions of this RTC IP block. Ultimately, this allows for powering off the Beaglebone and waking it up again on RTC alarms. Changes since v1 include: - add device abstraction - add structured device-type info - fix interrupt disable at probe separately - register interrupts after class device as before - add helper to read raw bcd time - more clean ups - add copyright entry - enable pmic control only for Beaglebone Black I realised that it was better to keep this patch series self-contained and include the device abstraction in it, rather than rely on some patches yet to be posted (contrary to what I proposed in v1). It should now be straight forward to add deferred-probing and regulator support on top of this series instead. [1] I've kept Felipe's Reviewed-by tags only on the first and last couple of patches which have not changed (in any significant way). For the record, the new functionality is easily tested on BBB with: echo +30 /sys/class/rtc/rtc0/wakealarm; poweroff There are some patches floating around to add power-off handler call chains [2] as well as an RFC for a generic poweroff-source property [3]. Since it is unclear if, when (and through which tree) this will eventually go in, I suggest merging this series as-is now and do the trivial updates to use these new interfaces once the infrastructure is in place. Johan [1] https://lkml.org/lkml/2014/10/9/427 [2] https://lkml.org/lkml/2014/10/7/30 [3] https://lkml.org/lkml/2014/10/7/654 Johan Hovold (20): rtc: omap: fix clock-source configuration rtc: omap: fix missing wakealarm attribute rtc: omap: fix interrupt disable at probe rtc: omap: clean up probe error handling rtc: omap: fix class-device registration rtc: omap: remove unused register-base define rtc: omap: use dev_info rtc: omap: make platform-device id table const rtc: omap: add device abstraction rtc: omap: remove DRIVER_NAME macro rtc: omap: add structured device-type info rtc: omap: silence bogus power-up reset message at probe rtc: omap: add helper to read raw bcd time rtc: omap: add helper to read 32-bit registers rtc: omap: add support for pmic_power_en rtc: omap: enable wake-up from power off rtc: omap: fix minor coding style issues rtc: omap: add copyright entry ARM: dts: am33xx: update rtc-node compatible property ARM: dts: am335x-boneblack: enable power off and rtc wake up Documentation/devicetree/bindings/rtc/rtc-omap.txt | 9 +- arch/arm/boot/dts/am335x-boneblack.dts | 4 + arch/arm/boot/dts/am33xx.dtsi | 2 +- drivers/rtc/rtc-omap.c | 540 + 4 files changed, 355 insertions(+), 200 deletions(-) -- 2.0.4 -- To unsubscribe from this list: send the line unsubscribe linux-omap in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
[PATCH v2 18/20] rtc: omap: add copyright entry
Add myself to the list of copyright holders. Signed-off-by: Johan Hovold jo...@kernel.org --- drivers/rtc/rtc-omap.c | 1 + 1 file changed, 1 insertion(+) diff --git a/drivers/rtc/rtc-omap.c b/drivers/rtc/rtc-omap.c index 4278421183e5..e74750f00b18 100644 --- a/drivers/rtc/rtc-omap.c +++ b/drivers/rtc/rtc-omap.c @@ -5,6 +5,7 @@ * Author: George G. Davis gda...@mvista.com or sou...@mvista.com * * Copyright (C) 2006 David Brownell (new RTC framework) + * Copyright (C) 2014 Johan Hovold jo...@kernel.org * * This program is free software; you can redistribute it and/or * modify it under the terms of the GNU General Public License -- 2.0.4 -- To unsubscribe from this list: send the line unsubscribe linux-omap in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
[PATCH v2 03/20] rtc: omap: fix interrupt disable at probe
Use writel instead of writeb when disabling interrupts at probe as
ALARM2 is not cleared otherwise on some IP-block revisions (e.g.
AM3352).
Note that the driver currently never enables the ALARM2 interrupt.
Signed-off-by: Johan Hovold jo...@kernel.org
---
drivers/rtc/rtc-omap.c | 8 +---
1 file changed, 5 insertions(+), 3 deletions(-)
diff --git a/drivers/rtc/rtc-omap.c b/drivers/rtc/rtc-omap.c
index 828cb9983cc2..813d475fe7c6 100644
--- a/drivers/rtc/rtc-omap.c
+++ b/drivers/rtc/rtc-omap.c
@@ -427,10 +427,12 @@ static int __init omap_rtc_probe(struct platform_device
*pdev)
}
platform_set_drvdata(pdev, rtc);
- /* clear pending irqs, and set 1/second periodic,
-* which we'll use instead of update irqs
+ /*
+* disable interrupts
+*
+* NOTE: ALARM2 is not cleared on AM3352 if rtc_write (writeb) is used
*/
- rtc_write(0, OMAP_RTC_INTERRUPTS_REG);
+ rtc_writel(0, OMAP_RTC_INTERRUPTS_REG);
/* enable RTC functional clock */
if (id_entry-driver_data OMAP_RTC_HAS_32KCLK_EN) {
--
2.0.4
--
To unsubscribe from this list: send the line unsubscribe linux-omap in
the body of a message to majord...@vger.kernel.org
More majordomo info at http://vger.kernel.org/majordomo-info.html
[PATCH v2 17/20] rtc: omap: fix minor coding style issues
Fix minor coding style issues like comment style, indentation and remove
a few unnecessary casts.
Also drop the 1 from OMAP1 in the driver description.
Signed-off-by: Johan Hovold jo...@kernel.org
---
drivers/rtc/rtc-omap.c | 46 +++---
1 file changed, 27 insertions(+), 19 deletions(-)
diff --git a/drivers/rtc/rtc-omap.c b/drivers/rtc/rtc-omap.c
index cb5ef3c845d1..4278421183e5 100644
--- a/drivers/rtc/rtc-omap.c
+++ b/drivers/rtc/rtc-omap.c
@@ -1,5 +1,5 @@
/*
- * TI OMAP1 Real Time Clock interface for Linux
+ * TI OMAP Real Time Clock interface for Linux
*
* Copyright (C) 2003 MontaVista Software, Inc.
* Author: George G. Davis gda...@mvista.com or sou...@mvista.com
@@ -25,7 +25,8 @@
#include linux/pm_runtime.h
#include linux/io.h
-/* The OMAP1 RTC is a year/month/day/hours/minutes/seconds BCD clock
+/*
+ * The OMAP RTC is a year/month/day/hours/minutes/seconds BCD clock
* with century-range alarm matching, driven by the 32kHz clock.
*
* The main user-visible ways it differs from PC RTCs are by omitting
@@ -154,19 +155,20 @@ static inline void rtc_writel(struct omap_rtc *rtc,
unsigned int reg, u32 val)
writel(val, rtc-base + reg);
}
-/* we rely on the rtc framework to handle locking (rtc-ops_lock),
+/*
+ * We rely on the rtc framework to handle locking (rtc-ops_lock),
* so the only other requirement is that register accesses which
* require BUSY to be clear are made with IRQs locally disabled
*/
static void rtc_wait_not_busy(struct omap_rtc *rtc)
{
- int count = 0;
- u8 status;
+ int count;
+ u8 status;
/* BUSY may stay active for 1/32768 second (~30 usec) */
for (count = 0; count 50; count++) {
status = rtc_read(rtc, OMAP_RTC_STATUS_REG);
- if ((status (u8)OMAP_RTC_STATUS_BUSY) == 0)
+ if (!(status OMAP_RTC_STATUS_BUSY))
break;
udelay(1);
}
@@ -175,9 +177,9 @@ static void rtc_wait_not_busy(struct omap_rtc *rtc)
static irqreturn_t rtc_irq(int irq, void *dev_id)
{
- struct omap_rtc *rtc = dev_id;
- unsigned long events = 0;
- u8 irq_data;
+ struct omap_rtc *rtc = dev_id;
+ unsigned long events = 0;
+ u8 irq_data;
irq_data = rtc_read(rtc, OMAP_RTC_STATUS_REG);
@@ -276,6 +278,7 @@ static int omap_rtc_read_time(struct device *dev, struct
rtc_time *tm)
local_irq_enable();
bcd2tm(tm);
+
return 0;
}
@@ -285,6 +288,7 @@ static int omap_rtc_set_time(struct device *dev, struct
rtc_time *tm)
if (tm2bcd(tm) 0)
return -EINVAL;
+
local_irq_disable();
rtc_wait_not_busy(rtc);
@@ -303,6 +307,7 @@ static int omap_rtc_set_time(struct device *dev, struct
rtc_time *tm)
static int omap_rtc_read_alarm(struct device *dev, struct rtc_wkalrm *alm)
{
struct omap_rtc *rtc = dev_get_drvdata(dev);
+ u8 interrupts;
local_irq_disable();
rtc_wait_not_busy(rtc);
@@ -317,8 +322,9 @@ static int omap_rtc_read_alarm(struct device *dev, struct
rtc_wkalrm *alm)
local_irq_enable();
bcd2tm(alm-time);
- alm-enabled = !!(rtc_read(rtc, OMAP_RTC_INTERRUPTS_REG)
-OMAP_RTC_INTERRUPTS_IT_ALARM);
+
+ interrupts = rtc_read(rtc, OMAP_RTC_INTERRUPTS_REG);
+ alm-enabled = !!(interrupts OMAP_RTC_INTERRUPTS_IT_ALARM);
return 0;
}
@@ -472,9 +478,9 @@ MODULE_DEVICE_TABLE(of, omap_rtc_of_match);
static int __init omap_rtc_probe(struct platform_device *pdev)
{
- struct omap_rtc *rtc;
- struct resource *res;
- u8 reg, mask, new_ctrl;
+ struct omap_rtc *rtc;
+ struct resource *res;
+ u8 reg, mask, new_ctrl;
const struct platform_device_id *id_entry;
const struct of_device_id *of_id;
int ret;
@@ -551,14 +557,15 @@ static int __init omap_rtc_probe(struct platform_device
*pdev)
/* On boards with split power, RTC_ON_NOFF won't reset the RTC */
reg = rtc_read(rtc, OMAP_RTC_CTRL_REG);
- if (reg (u8) OMAP_RTC_CTRL_STOP)
+ if (reg OMAP_RTC_CTRL_STOP)
dev_info(pdev-dev, already running\n);
/* force to 24 hour mode */
- new_ctrl = reg (OMAP_RTC_CTRL_SPLIT|OMAP_RTC_CTRL_AUTO_COMP);
+ new_ctrl = reg (OMAP_RTC_CTRL_SPLIT | OMAP_RTC_CTRL_AUTO_COMP);
new_ctrl |= OMAP_RTC_CTRL_STOP;
- /* BOARD-SPECIFIC CUSTOMIZATION CAN GO HERE:
+ /*
+* BOARD-SPECIFIC CUSTOMIZATION CAN GO HERE:
*
* - Device wake-up capability setting should come through chip
*init logic. OMAP1 boards should initialize the wakeup capable
@@ -572,7 +579,7 @@ static int __init omap_rtc_probe(struct platform_device
*pdev)
*is write-only, and always reads as zero...)
*/
[PATCH v2 05/20] rtc: omap: fix class-device registration
Make sure not to register the class device until after the device has
been configured.
Currently, the device is not fully configured (e.g. 24-hour mode) when
the class device is registered, something which involves driver
callbacks for example to read the current time.
Signed-off-by: Johan Hovold jo...@kernel.org
---
drivers/rtc/rtc-omap.c | 46 +++---
1 file changed, 23 insertions(+), 23 deletions(-)
diff --git a/drivers/rtc/rtc-omap.c b/drivers/rtc/rtc-omap.c
index 6b10db5a5702..813bed270867 100644
--- a/drivers/rtc/rtc-omap.c
+++ b/drivers/rtc/rtc-omap.c
@@ -413,16 +413,6 @@ static int __init omap_rtc_probe(struct platform_device
*pdev)
rtc_writel(KICK1_VALUE, OMAP_RTC_KICK1_REG);
}
- device_init_wakeup(pdev-dev, true);
-
- rtc = devm_rtc_device_register(pdev-dev, pdev-name,
- omap_rtc_ops, THIS_MODULE);
- if (IS_ERR(rtc)) {
- ret = PTR_ERR(rtc);
- goto err;
- }
- platform_set_drvdata(pdev, rtc);
-
/*
* disable interrupts
*
@@ -446,19 +436,6 @@ static int __init omap_rtc_probe(struct platform_device
*pdev)
if (reg (u8) OMAP_RTC_STATUS_ALARM)
rtc_write(OMAP_RTC_STATUS_ALARM, OMAP_RTC_STATUS_REG);
- /* handle periodic and alarm irqs */
- ret = devm_request_irq(pdev-dev, omap_rtc_timer, rtc_irq, 0,
- dev_name(rtc-dev), rtc);
- if (ret)
- goto err;
-
- if (omap_rtc_timer != omap_rtc_alarm) {
- ret = devm_request_irq(pdev-dev, omap_rtc_alarm, rtc_irq, 0,
- dev_name(rtc-dev), rtc);
- if (ret)
- goto err;
- }
-
/* On boards with split power, RTC_ON_NOFF won't reset the RTC */
reg = rtc_read(OMAP_RTC_CTRL_REG);
if (reg (u8) OMAP_RTC_CTRL_STOP)
@@ -488,6 +465,29 @@ static int __init omap_rtc_probe(struct platform_device
*pdev)
if (reg != new_ctrl)
rtc_write(new_ctrl, OMAP_RTC_CTRL_REG);
+ device_init_wakeup(pdev-dev, true);
+
+ rtc = devm_rtc_device_register(pdev-dev, pdev-name,
+ omap_rtc_ops, THIS_MODULE);
+ if (IS_ERR(rtc)) {
+ ret = PTR_ERR(rtc);
+ goto err;
+ }
+ platform_set_drvdata(pdev, rtc);
+
+ /* handle periodic and alarm irqs */
+ ret = devm_request_irq(pdev-dev, omap_rtc_timer, rtc_irq, 0,
+ dev_name(rtc-dev), rtc);
+ if (ret)
+ goto err;
+
+ if (omap_rtc_timer != omap_rtc_alarm) {
+ ret = devm_request_irq(pdev-dev, omap_rtc_alarm, rtc_irq, 0,
+ dev_name(rtc-dev), rtc);
+ if (ret)
+ goto err;
+ }
+
return 0;
err:
--
2.0.4
--
To unsubscribe from this list: send the line unsubscribe linux-omap in
the body of a message to majord...@vger.kernel.org
More majordomo info at http://vger.kernel.org/majordomo-info.html
[PATCH v2 16/20] rtc: omap: enable wake-up from power off
The ALARM interrupt must not be disabled during shutdown in order to be
able to power up the system using an RTC alarm.
Signed-off-by: Johan Hovold jo...@kernel.org
---
drivers/rtc/rtc-omap.c | 9 -
1 file changed, 8 insertions(+), 1 deletion(-)
diff --git a/drivers/rtc/rtc-omap.c b/drivers/rtc/rtc-omap.c
index f6c93f877857..cb5ef3c845d1 100644
--- a/drivers/rtc/rtc-omap.c
+++ b/drivers/rtc/rtc-omap.c
@@ -687,8 +687,15 @@ static SIMPLE_DEV_PM_OPS(omap_rtc_pm_ops,
omap_rtc_suspend, omap_rtc_resume);
static void omap_rtc_shutdown(struct platform_device *pdev)
{
struct omap_rtc *rtc = platform_get_drvdata(pdev);
+ u8 mask;
- rtc_write(rtc, OMAP_RTC_INTERRUPTS_REG, 0);
+ /*
+* Keep the ALARM interrupt enabled to allow the system to power up on
+* alarm events.
+*/
+ mask = rtc_read(rtc, OMAP_RTC_INTERRUPTS_REG);
+ mask = OMAP_RTC_INTERRUPTS_IT_ALARM;
+ rtc_write(rtc, OMAP_RTC_INTERRUPTS_REG, mask);
}
static struct platform_driver omap_rtc_driver = {
--
2.0.4
--
To unsubscribe from this list: send the line unsubscribe linux-omap in
the body of a message to majord...@vger.kernel.org
More majordomo info at http://vger.kernel.org/majordomo-info.html
[PATCH v2 12/20] rtc: omap: silence bogus power-up reset message at probe
Some legacy RTC IP revisions has a power-up reset flag in the status
register that later revisions lack.
As this flag is always read back as set on later revisions (or is
overloaded with a different flag), make sure to only clear the flag and
print the info message on legacy platforms.
Signed-off-by: Johan Hovold jo...@kernel.org
---
drivers/rtc/rtc-omap.c | 19 +--
1 file changed, 13 insertions(+), 6 deletions(-)
diff --git a/drivers/rtc/rtc-omap.c b/drivers/rtc/rtc-omap.c
index 1abd88e24c22..ee20f2d36065 100644
--- a/drivers/rtc/rtc-omap.c
+++ b/drivers/rtc/rtc-omap.c
@@ -106,6 +106,7 @@ struct omap_rtc_device_type {
bool has_32kclk_en;
bool has_kicker;
bool has_irqwakeen;
+ bool has_power_up_reset;
};
struct omap_rtc {
@@ -346,6 +347,7 @@ static struct rtc_class_ops omap_rtc_ops = {
};
static const struct omap_rtc_device_type omap_rtc_default_type = {
+ .has_power_up_reset = true,
};
static const struct omap_rtc_device_type omap_rtc_am3352_type = {
@@ -391,7 +393,7 @@ static int __init omap_rtc_probe(struct platform_device
*pdev)
{
struct omap_rtc *rtc;
struct resource *res;
- u8 reg, new_ctrl;
+ u8 reg, mask, new_ctrl;
const struct platform_device_id *id_entry;
const struct of_device_id *of_id;
int ret;
@@ -448,12 +450,17 @@ static int __init omap_rtc_probe(struct platform_device
*pdev)
/* clear old status */
reg = rtc_read(rtc, OMAP_RTC_STATUS_REG);
- if (reg (u8) OMAP_RTC_STATUS_POWER_UP) {
- dev_info(pdev-dev, RTC power up reset detected\n);
- rtc_write(rtc, OMAP_RTC_STATUS_REG, OMAP_RTC_STATUS_POWER_UP);
+
+ mask = OMAP_RTC_STATUS_ALARM;
+
+ if (rtc-type-has_power_up_reset) {
+ mask |= OMAP_RTC_STATUS_POWER_UP;
+ if (reg OMAP_RTC_STATUS_POWER_UP)
+ dev_info(pdev-dev, RTC power up reset detected\n);
}
- if (reg (u8) OMAP_RTC_STATUS_ALARM)
- rtc_write(rtc, OMAP_RTC_STATUS_REG, OMAP_RTC_STATUS_ALARM);
+
+ if (reg mask)
+ rtc_write(rtc, OMAP_RTC_STATUS_REG, reg mask);
/* On boards with split power, RTC_ON_NOFF won't reset the RTC */
reg = rtc_read(rtc, OMAP_RTC_CTRL_REG);
--
2.0.4
--
To unsubscribe from this list: send the line unsubscribe linux-omap in
the body of a message to majord...@vger.kernel.org
More majordomo info at http://vger.kernel.org/majordomo-info.html
[PATCH v2 02/20] rtc: omap: fix missing wakealarm attribute
The platform device must be registered as wakeup capable before
registering the class device, or the wakealarm attribute will not be
created.
Also make sure to unregister the wakeup source on probe errors.
Fixes: 1d2e2b65d098 (rtc: omap: restore back (hard-code) wakeup support)
Cc: stable sta...@vger.kernel.org
Reviewed-by: Felipe Balbi ba...@ti.com
Signed-off-by: Johan Hovold jo...@kernel.org
---
drivers/rtc/rtc-omap.c | 5 +++--
1 file changed, 3 insertions(+), 2 deletions(-)
diff --git a/drivers/rtc/rtc-omap.c b/drivers/rtc/rtc-omap.c
index f842c216f2dd..828cb9983cc2 100644
--- a/drivers/rtc/rtc-omap.c
+++ b/drivers/rtc/rtc-omap.c
@@ -416,6 +416,8 @@ static int __init omap_rtc_probe(struct platform_device
*pdev)
rtc_writel(KICK1_VALUE, OMAP_RTC_KICK1_REG);
}
+ device_init_wakeup(pdev-dev, true);
+
rtc = devm_rtc_device_register(pdev-dev, pdev-name,
omap_rtc_ops, THIS_MODULE);
if (IS_ERR(rtc)) {
@@ -484,8 +486,6 @@ static int __init omap_rtc_probe(struct platform_device
*pdev)
*is write-only, and always reads as zero...)
*/
- device_init_wakeup(pdev-dev, true);
-
if (new_ctrl (u8) OMAP_RTC_CTRL_SPLIT)
pr_info(%s: split power mode\n, pdev-name);
@@ -495,6 +495,7 @@ static int __init omap_rtc_probe(struct platform_device
*pdev)
return 0;
fail0:
+ device_init_wakeup(pdev-dev, false);
if (id_entry-driver_data OMAP_RTC_HAS_KICKER)
rtc_writel(0, OMAP_RTC_KICK0_REG);
pm_runtime_put_sync(pdev-dev);
--
2.0.4
--
To unsubscribe from this list: send the line unsubscribe linux-omap in
the body of a message to majord...@vger.kernel.org
More majordomo info at http://vger.kernel.org/majordomo-info.html
[PATCH v2 01/20] rtc: omap: fix clock-source configuration
Make sure not to reset the clock-source configuration when enabling the
32kHz clock mux.
Until the clock source can be configured through device tree we must not
overwrite settings made by the bootloader (e.g. clock-source selection).
Fixes: cd914bba03d8 (drivers/rtc/rtc-omap.c: add support for enabling
32khz clock)
Cc: stable sta...@vger.kernel.org
Reviewed-by: Felipe Balbi ba...@ti.com
Signed-off-by: Johan Hovold jo...@kernel.org
---
drivers/rtc/rtc-omap.c | 6 --
1 file changed, 4 insertions(+), 2 deletions(-)
diff --git a/drivers/rtc/rtc-omap.c b/drivers/rtc/rtc-omap.c
index 21142e6574a9..f842c216f2dd 100644
--- a/drivers/rtc/rtc-omap.c
+++ b/drivers/rtc/rtc-omap.c
@@ -431,8 +431,10 @@ static int __init omap_rtc_probe(struct platform_device
*pdev)
rtc_write(0, OMAP_RTC_INTERRUPTS_REG);
/* enable RTC functional clock */
- if (id_entry-driver_data OMAP_RTC_HAS_32KCLK_EN)
- rtc_writel(OMAP_RTC_OSC_32KCLK_EN, OMAP_RTC_OSC_REG);
+ if (id_entry-driver_data OMAP_RTC_HAS_32KCLK_EN) {
+ reg = rtc_read(OMAP_RTC_OSC_REG);
+ rtc_writel(reg | OMAP_RTC_OSC_32KCLK_EN, OMAP_RTC_OSC_REG);
+ }
/* clear old status */
reg = rtc_read(OMAP_RTC_STATUS_REG);
--
2.0.4
--
To unsubscribe from this list: send the line unsubscribe linux-omap in
the body of a message to majord...@vger.kernel.org
More majordomo info at http://vger.kernel.org/majordomo-info.html
[PATCH v2 06/20] rtc: omap: remove unused register-base define
Remove register-base define, which is no longer used. Signed-off-by: Johan Hovold jo...@kernel.org --- drivers/rtc/rtc-omap.c | 2 -- 1 file changed, 2 deletions(-) diff --git a/drivers/rtc/rtc-omap.c b/drivers/rtc/rtc-omap.c index 813bed270867..c750678de652 100644 --- a/drivers/rtc/rtc-omap.c +++ b/drivers/rtc/rtc-omap.c @@ -41,8 +41,6 @@ #defineDRIVER_NAME omap_rtc -#define OMAP_RTC_BASE 0xfffb4800 - /* RTC registers */ #define OMAP_RTC_SECONDS_REG 0x00 #define OMAP_RTC_MINUTES_REG 0x04 -- 2.0.4 -- To unsubscribe from this list: send the line unsubscribe linux-omap in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
[PATCH v2 13/20] rtc: omap: add helper to read raw bcd time
Add helper to read raw BCD time that can be used in interrupt context.
Signed-off-by: Johan Hovold jo...@kernel.org
---
drivers/rtc/rtc-omap.c | 18 ++
1 file changed, 10 insertions(+), 8 deletions(-)
diff --git a/drivers/rtc/rtc-omap.c b/drivers/rtc/rtc-omap.c
index ee20f2d36065..bcdf3c596214 100644
--- a/drivers/rtc/rtc-omap.c
+++ b/drivers/rtc/rtc-omap.c
@@ -234,22 +234,24 @@ static void bcd2tm(struct rtc_time *tm)
tm-tm_year = bcd2bin(tm-tm_year) + 100;
}
-
-static int omap_rtc_read_time(struct device *dev, struct rtc_time *tm)
+static void omap_rtc_read_time_raw(struct omap_rtc *rtc, struct rtc_time *tm)
{
- struct omap_rtc *rtc = dev_get_drvdata(dev);
-
- /* we don't report wday/yday/isdst ... */
- local_irq_disable();
- rtc_wait_not_busy(rtc);
-
tm-tm_sec = rtc_read(rtc, OMAP_RTC_SECONDS_REG);
tm-tm_min = rtc_read(rtc, OMAP_RTC_MINUTES_REG);
tm-tm_hour = rtc_read(rtc, OMAP_RTC_HOURS_REG);
tm-tm_mday = rtc_read(rtc, OMAP_RTC_DAYS_REG);
tm-tm_mon = rtc_read(rtc, OMAP_RTC_MONTHS_REG);
tm-tm_year = rtc_read(rtc, OMAP_RTC_YEARS_REG);
+}
+
+static int omap_rtc_read_time(struct device *dev, struct rtc_time *tm)
+{
+ struct omap_rtc *rtc = dev_get_drvdata(dev);
+ /* we don't report wday/yday/isdst ... */
+ local_irq_disable();
+ rtc_wait_not_busy(rtc);
+ omap_rtc_read_time_raw(rtc, tm);
local_irq_enable();
bcd2tm(tm);
--
2.0.4
--
To unsubscribe from this list: send the line unsubscribe linux-omap in
the body of a message to majord...@vger.kernel.org
More majordomo info at http://vger.kernel.org/majordomo-info.html
[PATCH v2 10/20] rtc: omap: remove DRIVER_NAME macro
Remove DRIVER_NAME macro which was used for unrelated strings (e.g.
id-table entry and module name), but not for related ones (e.g. module
name and alias).
Also move the module alias to the other module-info entries.
Signed-off-by: Johan Hovold jo...@kernel.org
---
drivers/rtc/rtc-omap.c | 8 +++-
1 file changed, 3 insertions(+), 5 deletions(-)
diff --git a/drivers/rtc/rtc-omap.c b/drivers/rtc/rtc-omap.c
index 1da610b8981f..f70ae660368b 100644
--- a/drivers/rtc/rtc-omap.c
+++ b/drivers/rtc/rtc-omap.c
@@ -39,8 +39,6 @@
* the SoC). See the BOARD-SPECIFIC CUSTOMIZATION comment.
*/
-#defineDRIVER_NAME omap_rtc
-
/* RTC registers */
#define OMAP_RTC_SECONDS_REG 0x00
#define OMAP_RTC_MINUTES_REG 0x04
@@ -360,7 +358,7 @@ static struct rtc_class_ops omap_rtc_ops = {
static const struct platform_device_id omap_rtc_devtype[] = {
{
- .name = DRIVER_NAME,
+ .name = omap_rtc,
},
[OMAP_RTC_DATA_AM3352_IDX] = {
.name = am3352-rtc,
@@ -587,12 +585,11 @@ static void omap_rtc_shutdown(struct platform_device
*pdev)
rtc_write(rtc, OMAP_RTC_INTERRUPTS_REG, 0);
}
-MODULE_ALIAS(platform:omap_rtc);
static struct platform_driver omap_rtc_driver = {
.remove = __exit_p(omap_rtc_remove),
.shutdown = omap_rtc_shutdown,
.driver = {
- .name = DRIVER_NAME,
+ .name = omap_rtc,
.owner = THIS_MODULE,
.pm = omap_rtc_pm_ops,
.of_match_table = omap_rtc_of_match,
@@ -602,5 +599,6 @@ static struct platform_driver omap_rtc_driver = {
module_platform_driver_probe(omap_rtc_driver, omap_rtc_probe);
+MODULE_ALIAS(platform:omap_rtc);
MODULE_AUTHOR(George G. Davis (and others));
MODULE_LICENSE(GPL);
--
2.0.4
--
To unsubscribe from this list: send the line unsubscribe linux-omap in
the body of a message to majord...@vger.kernel.org
More majordomo info at http://vger.kernel.org/majordomo-info.html
Re: [PATCH] ARM: dts: DRA7: Add aliases for all serial ports
On Tuesday 21 October 2014 11:18:15 Nishanth Menon wrote: Add serial port aliases for consoles 6. Signed-off-by: Nishanth Menon n...@ti.com --- arch/arm/boot/dts/dra7.dtsi |4 1 file changed, 4 insertions(+) diff --git a/arch/arm/boot/dts/dra7.dtsi b/arch/arm/boot/dts/dra7.dtsi index 9cc9843..208dd83 100644 --- a/arch/arm/boot/dts/dra7.dtsi +++ b/arch/arm/boot/dts/dra7.dtsi @@ -34,6 +34,10 @@ serial3 = uart4; serial4 = uart5; serial5 = uart6; + serial6 = uart7; + serial7 = uart8; + serial8 = uart9; + serial9 = uart10; I think this was wrong to start with: The aliases should be in the per-board .dts file and only list the ones that are actually connected to the outside. Otherwise the numbering won't match what's written on the board. Arnd -- To unsubscribe from this list: send the line unsubscribe linux-omap in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
Re: [PATCH] ARM: dts: DRA7: Add aliases for all serial ports
On 10/21/2014 02:57 PM, Arnd Bergmann wrote: On Tuesday 21 October 2014 11:18:15 Nishanth Menon wrote: Add serial port aliases for consoles 6. Signed-off-by: Nishanth Menon n...@ti.com --- arch/arm/boot/dts/dra7.dtsi |4 1 file changed, 4 insertions(+) diff --git a/arch/arm/boot/dts/dra7.dtsi b/arch/arm/boot/dts/dra7.dtsi index 9cc9843..208dd83 100644 --- a/arch/arm/boot/dts/dra7.dtsi +++ b/arch/arm/boot/dts/dra7.dtsi @@ -34,6 +34,10 @@ serial3 = uart4; serial4 = uart5; serial5 = uart6; + serial6 = uart7; + serial7 = uart8; + serial8 = uart9; + serial9 = uart10; I think this was wrong to start with: The aliases should be in the per-board .dts file and only list the ones that are actually connected to the outside. Otherwise the numbering won't match what's written on the board. At least in the case of DRA7 boards, they are not written specifically since they come out over onboard FTDI usb2serial. This will at least ensure that /dev/ttyO9 will always point to uart10 no matter the board, instead of having ttyO0 always pointing to console serial port no matter the board (and having to guess which figure out it actually was aliased to). -- Regards, Nishanth Menon -- To unsubscribe from this list: send the line unsubscribe linux-omap in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
[PATCH 1/2] ARM: OMAP4: PM: Only do static dependency configuration in omap4_init_static_deps
Commit 705814b5ea6f (ARM: OMAP4+: PM: Consolidate OMAP4 PM code to
re-use it for OMAP5)
Moved logic generic for OMAP5+ as part of the init routine by
introducing omap4_pm_init. However, the patch left the powerdomain
initial setup, an unused omap4430 es1.0 check and a spurious log
Power Management for TI OMAP4. in the original code.
Remove the duplicate code which is already present in omap4_pm_init from
omap4_init_static_deps.
As part of this change, also move the u-boot version print out of the
static dependency function to the omap4_pm_init function.
Fixes: 705814b5ea6f (ARM: OMAP4+: PM: Consolidate OMAP4 PM code to re-use it
for OMAP5)
Signed-off-by: Nishanth Menon n...@ti.com
---
arch/arm/mach-omap2/pm44xx.c | 29 +
1 file changed, 9 insertions(+), 20 deletions(-)
diff --git a/arch/arm/mach-omap2/pm44xx.c b/arch/arm/mach-omap2/pm44xx.c
index 503097c..e7f823b 100644
--- a/arch/arm/mach-omap2/pm44xx.c
+++ b/arch/arm/mach-omap2/pm44xx.c
@@ -160,26 +160,6 @@ static inline int omap4_init_static_deps(void)
struct clockdomain *ducati_clkdm, *l3_2_clkdm;
int ret = 0;
- if (omap_rev() == OMAP4430_REV_ES1_0) {
- WARN(1, Power Management not supported on OMAP4430 ES1.0\n);
- return -ENODEV;
- }
-
- pr_err(Power Management for TI OMAP4.\n);
- /*
-* OMAP4 chip PM currently works only with certain (newer)
-* versions of bootloaders. This is due to missing code in the
-* kernel to properly reset and initialize some devices.
-* http://www.spinics.net/lists/arm-kernel/msg218641.html
-*/
- pr_warn(OMAP4 PM: u-boot = v2012.07 is required for full PM
support\n);
-
- ret = pwrdm_for_each(pwrdms_setup, NULL);
- if (ret) {
- pr_err(Failed to setup powerdomains\n);
- return ret;
- }
-
/*
* The dynamic dependency between MPUSS - MEMIF and
* MPUSS - L4_PER/L3_* and DUCATI - L3_* doesn't work as
@@ -272,6 +252,15 @@ int __init omap4_pm_init(void)
pr_info(Power Management for TI OMAP4+ devices.\n);
+ /*
+* OMAP4 chip PM currently works only with certain (newer)
+* versions of bootloaders. This is due to missing code in the
+* kernel to properly reset and initialize some devices.
+* http://www.spinics.net/lists/arm-kernel/msg218641.html
+*/
+ if (cpu_is_omap44xx())
+ pr_warn(OMAP4 PM: u-boot = v2012.07 is required for full PM
support\n);
+
ret = pwrdm_for_each(pwrdms_setup, NULL);
if (ret) {
pr_err(Failed to setup powerdomains.\n);
--
1.7.9.5
--
To unsubscribe from this list: send the line unsubscribe linux-omap in
the body of a message to majord...@vger.kernel.org
More majordomo info at http://vger.kernel.org/majordomo-info.html
[PATCH 2/2] ARM: OMAP4+: PM: Centralize static dependency mapping table
As we add more static dependency mapping for various errata, the logic
gets clunkier. Since it is a simple lookup and map logic, centralize the
same and provide the mapping as a simple list.
Signed-off-by: Nishanth Menon n...@ti.com
---
arch/arm/mach-omap2/pm44xx.c | 117 --
1 file changed, 57 insertions(+), 60 deletions(-)
diff --git a/arch/arm/mach-omap2/pm44xx.c b/arch/arm/mach-omap2/pm44xx.c
index e7f823b..d697cec 100644
--- a/arch/arm/mach-omap2/pm44xx.c
+++ b/arch/arm/mach-omap2/pm44xx.c
@@ -37,6 +37,16 @@ struct power_state {
struct list_head node;
};
+/**
+ * struct static_dep_map - Static dependency map
+ * @from: from clockdomain
+ * @to:to clockdomain
+ */
+struct static_dep_map {
+ const char *from;
+ const char *to;
+};
+
static u32 cpu_suspend_state = PWRDM_POWER_OFF;
static LIST_HEAD(pwrst_list);
@@ -148,74 +158,61 @@ static void omap_default_idle(void)
omap_do_wfi();
}
-/**
- * omap4_init_static_deps - Add OMAP4 static dependencies
- *
- * Add needed static clockdomain dependencies on OMAP4 devices.
- * Return: 0 on success or 'err' on failures
+/*
+ * The dynamic dependency between MPUSS - MEMIF and
+ * MPUSS - L4_PER/L3_* and DUCATI - L3_* doesn't work as
+ * expected. The hardware recommendation is to enable static
+ * dependencies for these to avoid system lock ups or random crashes.
+ * The L4 wakeup depedency is added to workaround the OCP sync hardware
+ * BUG with 32K synctimer which lead to incorrect timer value read
+ * from the 32K counter. The BUG applies for GPTIMER1 and WDT2 which
+ * are part of L4 wakeup clockdomain.
*/
-static inline int omap4_init_static_deps(void)
-{
- struct clockdomain *emif_clkdm, *mpuss_clkdm, *l3_1_clkdm;
- struct clockdomain *ducati_clkdm, *l3_2_clkdm;
- int ret = 0;
-
- /*
-* The dynamic dependency between MPUSS - MEMIF and
-* MPUSS - L4_PER/L3_* and DUCATI - L3_* doesn't work as
-* expected. The hardware recommendation is to enable static
-* dependencies for these to avoid system lock ups or random crashes.
-* The L4 wakeup depedency is added to workaround the OCP sync hardware
-* BUG with 32K synctimer which lead to incorrect timer value read
-* from the 32K counter. The BUG applies for GPTIMER1 and WDT2 which
-* are part of L4 wakeup clockdomain.
-*/
- mpuss_clkdm = clkdm_lookup(mpuss_clkdm);
- emif_clkdm = clkdm_lookup(l3_emif_clkdm);
- l3_1_clkdm = clkdm_lookup(l3_1_clkdm);
- l3_2_clkdm = clkdm_lookup(l3_2_clkdm);
- ducati_clkdm = clkdm_lookup(ducati_clkdm);
- if ((!mpuss_clkdm) || (!emif_clkdm) || (!l3_1_clkdm) ||
- (!l3_2_clkdm) || (!ducati_clkdm))
- return -EINVAL;
-
- ret = clkdm_add_wkdep(mpuss_clkdm, emif_clkdm);
- ret |= clkdm_add_wkdep(mpuss_clkdm, l3_1_clkdm);
- ret |= clkdm_add_wkdep(mpuss_clkdm, l3_2_clkdm);
- ret |= clkdm_add_wkdep(ducati_clkdm, l3_1_clkdm);
- ret |= clkdm_add_wkdep(ducati_clkdm, l3_2_clkdm);
- if (ret) {
- pr_err(Failed to add MPUSS - L3/EMIF/L4PER, DUCATI - L3
wakeup dependency\n);
- return -EINVAL;
- }
+static const struct static_dep_map omap4_static_dep_map[] = {
+ {.from = mpuss_clkdm, .to = l3_emif_clkdm},
+ {.from = mpuss_clkdm, .to = l3_1_clkdm},
+ {.from = mpuss_clkdm, .to = l3_2_clkdm},
+ {.from = ducati_clkdm, .to = l3_1_clkdm},
+ {.from = ducati_clkdm, .to = l3_2_clkdm},
+ {.from = NULL} /* TERMINATION */
+};
- return ret;
-}
+static const struct static_dep_map omap5_dra7_static_dep_map[] = {
+ {.from = mpu_clkdm, .to = emif_clkdm},
+ {.from = NULL} /* TERMINATION */
+};
/**
- * omap5_dra7_init_static_deps - Init static clkdm dependencies on OMAP5 and
- * DRA7
- *
- * The dynamic dependency between MPUSS - EMIF is broken and has
- * not worked as expected. The hardware recommendation is to
- * enable static dependencies for these to avoid system
- * lock ups or random crashes.
+ * omap4plus_init_static_deps() - Initialize a static dependency map
+ * @map: Mapping of clock domains
*/
-static inline int omap5_dra7_init_static_deps(void)
+static inline int omap4plus_init_static_deps(const struct static_dep_map *map)
{
- struct clockdomain *mpuss_clkdm, *emif_clkdm;
int ret;
+ struct clockdomain *from, *to;
- mpuss_clkdm = clkdm_lookup(mpu_clkdm);
- emif_clkdm = clkdm_lookup(emif_clkdm);
- if (!mpuss_clkdm || !emif_clkdm)
- return -EINVAL;
+ if (!map)
+ return 0;
+
+ while (map-from) {
+ from = clkdm_lookup(map-from);
+ to = clkdm_lookup(map-to);
+ if (!from || !to) {
+ pr_err(Failed lookup %s or %s for wakeup dependency\n,
+
[PATCH 0/2] ARM: OMAP4+: PM: centralize static dependency mapping table
Hi, This is a small step towards getting rid of static dependency logic from mach-omap2. As part of this, we split the list of static dep map from the function implementing it. This should eventually aid in helping remove the tables from the kernel to the device tree at a later point in time of cleanup. Series based on v3.18-rc1 and could be a 3.19-rc1 material. Nishanth Menon (2): ARM: OMAP4: PM: Only do static dependency configuration in omap4_init_static_deps ARM: OMAP4+: PM: Centralize static dependency mapping table arch/arm/mach-omap2/pm44xx.c | 146 +++--- 1 file changed, 66 insertions(+), 80 deletions(-) -- 1.7.9.5 -- To unsubscribe from this list: send the line unsubscribe linux-omap in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
[PATCH] ARM: OMAP4+: PM: Program CPU logic power state
CPU logic power state is never programmed in either the initialization
or the suspend/resume logic, instead, we depend on mpuss to program this
properly. However, this leaves CPU logic power state indeterminate and
most probably in reset configuration (If bootloader or other similar
software have'nt monkeyed with the register). This can make powerstate=
RET be either programmed for CSWR (logic=ret) or OSWR(logic = OFF) and
in OSWR, there can be context loss when the code does not expect it.
To prevent all these confusions, just support clearly ON, INA, CSWR,
OFF which is the intent of the existing code by explicitly programming
logic state.
NOTE: since this is a hot path (using in cpuidle), the exit path just
programs powerstate (logic state is immaterial when powerstate is ON).
Without doing this, we end up with lockups when CPUs enter OSWR and
multiple blocks loose context, when we expect them to hit CSWR.
Signed-off-by: Nishanth Menon n...@ti.com
---
arch/arm/mach-omap2/omap-mpuss-lowpower.c |4 +++-
1 file changed, 3 insertions(+), 1 deletion(-)
diff --git a/arch/arm/mach-omap2/omap-mpuss-lowpower.c
b/arch/arm/mach-omap2/omap-mpuss-lowpower.c
index 6944ae3..79f49d9 100644
--- a/arch/arm/mach-omap2/omap-mpuss-lowpower.c
+++ b/arch/arm/mach-omap2/omap-mpuss-lowpower.c
@@ -227,7 +227,7 @@ static void __init save_l2x0_context(void)
int omap4_enter_lowpower(unsigned int cpu, unsigned int power_state)
{
struct omap4_cpu_pm_info *pm_info = per_cpu(omap4_pm_info, cpu);
- unsigned int save_state = 0;
+ unsigned int save_state = 0, cpu_logic_state = PWRDM_POWER_RET;
unsigned int wakeup_cpu;
if (omap_rev() == OMAP4430_REV_ES1_0)
@@ -239,6 +239,7 @@ int omap4_enter_lowpower(unsigned int cpu, unsigned int
power_state)
save_state = 0;
break;
case PWRDM_POWER_OFF:
+ cpu_logic_state = PWRDM_POWER_OFF;
save_state = 1;
break;
case PWRDM_POWER_RET:
@@ -270,6 +271,7 @@ int omap4_enter_lowpower(unsigned int cpu, unsigned int
power_state)
cpu_clear_prev_logic_pwrst(cpu);
pwrdm_set_next_pwrst(pm_info-pwrdm, power_state);
+ pwrdm_set_logic_retst(pm_info-pwrdm, cpu_logic_state);
set_cpu_wakeup_addr(cpu, virt_to_phys(omap_pm_ops.resume));
omap_pm_ops.scu_prepare(cpu, power_state);
l2x0_pwrst_prepare(cpu, save_state);
--
1.7.9.5
--
To unsubscribe from this list: send the line unsubscribe linux-omap in
the body of a message to majord...@vger.kernel.org
More majordomo info at http://vger.kernel.org/majordomo-info.html
Re: [PATCH 12/17] iommu/omap: Integrate omap-iommu-debug into omap-iommu
Hi Joerg, On 10/01/2014 11:07 AM, Anna, Suman wrote: Hi Laurent, On Tuesday 30 September 2014 16:16:07 Suman Anna wrote: The debugfs support for OMAP IOMMU is currently implemented as a module, warranting certain OMAP-specific IOMMU API to be exported. The OMAP IOMMU, when enabled, can only be built-in into the kernel, so integrate the OMAP IOMMU debug module into the OMAP IOMMU driver. This helps in eliminating the need to export most of the current OMAP IOMMU API. The following are the main changes: - The OMAP_IOMMU_DEBUG Kconfig option is eliminated, and the OMAP IOMMU debugfs support is built alongside the OMAP IOMMU driver, and enabled automatically only when debugfs is enabled. That's the part I'm unsure about. We're loosing the ability to save space by not building the omap-iommu debugfs support when debugfs is enabled. Yeah, I thought about it a bit, and went in favor of eliminating the Kconfig. I don't have a strong opinion on this, but if saving space is what is preferred, I can easily rework this patch to add it back. Joerg, any preference which way we should go here? I am looking to refresh this series for 3.19, and this is the only patch that may need some changes. Please let me know what your preference is, and I can rework this patch if needed. Either way, the plan is to not have an OMAP IOMMU debugfs module, but only to have an option not to build the debugfs portions. regards Suman For the rest of the series, Acked-by: Laurent Pinchart laurent.pinch...@ideasonboard.com Thank you for reviewing the patches. regards Suman -- To unsubscribe from this list: send the line unsubscribe linux-omap in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
Re: USB Ethernet gadget on Nokia n900
Hi! After some hand-bisecting and real-bisecting, I found two commits that cause problems for 3.13: With these reverted, I get usb networking back in 3.13 on nokia n900. (Pali, if you revert these, you should get working usb networking in your 3.13 branch, too.) Any ideas? Hmm maybe check if current stable kernels work for you without reverting anything ? Few weeks ago I did the the following two fixes with cc stable v3.13+: 96be39ab34b7 usb: phy: twl4030-usb: Fix regressions to runtime PM on omaps 85601b8d81e2 usb: phy: twl4030-usb: Fix lost interrupts after ID pin goes down I tried these on top of 3.14 (where my revert fixes stuff) and no, it does not seem to help. (Trying stable would be a bit more work). Do you want me to try on 3.13, too? Sounds like there's something else missing too then. Maybe give v3.18-rc1 and device tree based boot a try? Ok, I tried 3.18-rc1 (with dt appended to the zImage) and this should be the logs from that attempt (on PC). [205583.689477] usb 4-1: Product: Nokia N900 (Update mode) [205583.689480] usb 4-1: Manufacturer: Nokia [205583.689483] usb 4-1: SerialNumber: 4D554D363434323537 [205584.467273] usb 4-1: USB disconnect, device number 72 [205590.120043] usb 4-1: new high-speed USB device number 73 using ehci-pci [205605.232034] usb 4-1: device descriptor read/64, error -110 [205620.448036] usb 4-1: device descriptor read/64, error -110 [205620.664032] usb 4-1: new high-speed USB device number 74 using ehci-pci [205635.776032] usb 4-1: device descriptor read/64, error -110 [205650.992032] usb 4-1: device descriptor read/64, error -110 [205651.208030] usb 4-1: new high-speed USB device number 75 using ehci-pci [205661.616025] usb 4-1: device not accepting address 75, error -110 IOW usb gadget driver loaded (or there would be no new high-speed USB device message, but communication does not work. I'm attaching the config. FYI, there's some PM support there too since v3.16-rc7, so using anything pre v3.17 is probably not fun on the battery. Well it works My goal is to get nfsroot to work, and then I can play with bluetooth, userland and power management. For now, power consumption is not important, as I'm unable to boot useful system. (I could boot from MMC, but that's too cumbersome to use due to lack of space, hard communication, and constant fiddling with device cover). Best regards, Pavel -- (english) http://www.livejournal.com/~pavelmachek (cesky, pictures) http://atrey.karlin.mff.cuni.cz/~pavel/picture/horses/blog.html -- To unsubscribe from this list: send the line unsubscribe linux-omap in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
