Re: [PATCH 1/4] PM / Wakeirq: Add minimal device wakeirq helper functions

[Tony Lindgren]

* Alan Stern st...@rowland.harvard.edu [150306 11:05]:
 On Fri, 6 Mar 2015, Tony Lindgren wrote:
 
+   struct wakeirq_source *wirq = _wirq;
+   irqreturn_t ret = IRQ_NONE;
+
+   /* We don't want RPM_ASYNC or RPM_NOWAIT here */
+   if (pm_runtime_suspended(wirq-dev)) {
   
   What if the device is resumed on a different CPU right here?
  
  Good point, sounds like we need to do this in some pm_runtime
  function directly for the locking.
   
+   pm_runtime_mark_last_busy(wirq-dev);
+   pm_runtime_resume(wirq-dev);
   
   Calling this with disabled interrupts is a bad idea in general.
   Is the device guaranteed to have power.irq_safe set?
  
  Well right now it's using threaded irq, and I'd like to get rid of
  the pm_runtime calls in the regular driver interrupts completely.
  We need to ensure the device runtime_resume is completed before
  returning IRQ_HANDLED here.
 
 In general, runtime_resume methods are allowed to sleep.  They can't be
 used in an interrupt handler top half unless the driver has
 specifically promised they are IRQ-safe.  That's what Rafael was
 getting at.

Yes I understand, otherwise things certainly would not work :)

 Of course, if this routine is a threaded-irq bottom half then there's 
 no problem.

Right this is threaded-irq bottom half because the devices may
need to restore state and start regulators.
 
   I guess what you want to call here is pm_request_resume() and
   I wouldn't say that calling pm_runtime_mark_last_busy() on a
   suspended device was valid.
  
  I'll verify again, but I believe the issue was that without doing
  mark_last_busy here the device falls back asleep right away.
  That probably should be fixed in pm_runtime in general if that's
  the case.
 
 It's up to the subsystem to handle this.  For example, the USB 
 subsystem's runtime-resume routine calls pm_runtime_mark_last_busy.

Hmm.. OK thanks this probably explains why pm_request_resume() did
not work.

For omaps, I could call this from the interconnect related code,
but then how dow we deal with the subsystems that don't call it?

  Considering the above, should we add a new function something like
  pm_resume_complete() that does not need irq_safe set but does
  not return until the device has completed resume?
 
 That doesn't make sense.  You're asking for a routine that is allowed
 to sleep but can safely be called in interrupt context.

Oh it naturally would not work in irq context, it's for the bottom
half again. But I'll take a look if we can just call
pm_request_resume() and disable_irq() on the wakeirq in without
waiting for the device driver runtime_suspend to disable the wakeirq.
That would minimize the interface to just dev_pm_request_wakeirq()
and dev_pm_free_wakeirq().

Regards,

Tony
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Re: twl4030_charger: need changes to get probed?

[Pali Rohár]

On Friday 06 March 2015 23:40:34 Pavel Machek wrote:
 On Sat 2015-03-07 00:12:07, Grazvydas Ignotas wrote:
  On Fri, Mar 6, 2015 at 11:57 PM, Pali Rohár
  pali.ro...@gmail.com wrote:
   On Friday 06 March 2015 22:24:17 Pavel Machek wrote:
   Hi!
   
   According to n900 dts, twl4030-bci (aka charger) should
   be included.
   
   AFAIK it is not present on n900...
  
  Right, it uses twl5030 variant without the charger, charging
  on n900 is provided by separate chip and for a good reason
  as twl's charger is not that good. Forcing the driver to
  load just ends up with it accessing non-existent registers
  over i2c.
 
 Ok, but:
 
 1) Why is the twl4030-bci enabled in n900's dts, then
 

maybe it is bug in n900 dts...

Grazvydas, is there some runtime check if twl4030/twl5030 chip 
has charger or not? or do we need to explicitly disable device 
twl4030-bci in DT?

 and
 
 2) When it is enabled, why it does not load?
 
 (I guess there's no way to get to input voltage on n900...?)
 
   Pavel

you can read voltage only from rx51_battery.ko (TWL ADC) or 
bq27x00_battery.ko

look for Nokia_N900_RX-51_Schematics.pdf file where you can find 
information what is connected to ADC and bq27200 chip.

-- 
Pali Rohár
pali.ro...@gmail.com


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Re: [PATCH 2/4] ARM: OMAP2+: AM43xx hwmod: Add RTC hwmod for AM43xx

[Paul Walmsley]

On Fri, 6 Mar 2015, Dave Gerlach wrote:

 On 03/06/2015 11:44 AM, Paul Walmsley wrote:
  On Fri, 6 Mar 2015, Dave Gerlach wrote:
  On 03/05/2015 10:26 PM, Paul Walmsley wrote:
  On Thu, 5 Mar 2015, Dave Gerlach wrote:
 
  RTC hwmod is needed for proper operation of PM features like
  rtcwake and rtc-only mode so reuse the am33xx rtc hwmod.
 
  Signed-off-by: Dave Gerlach d-gerl...@ti.com
 
  Thanks, queued for v4.1.
 
  Thanks, but please note as I just commented in Patch 1 of this series, 
  without
  the ti,no-init flag in place that is introduced there this patch will 
  cause the
  am43x-epos-evm to fail to boot.
  
  If that's so, shouldn't it appear in the series after patch 3, then?  
  If only patches 1 and 2 are applied, then won't the boot be broken on 
  am43x-epos-evm ?
 
 Hmm yes you are correct that would be the case, seems I should have swapped 
 the
 order. I've gotten into the habit of putting dt patches last to enable what 
 gets
 introduced previously, guess it's not always the best thing to do. Thanks for
 pointing this out.

OK dropped until this thing is sorted out.


- Paul
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Re: [PATCH 1/4] PM / Wakeirq: Add minimal device wakeirq helper functions

[Tony Lindgren]

* Rafael J. Wysocki r...@rjwysocki.net [150306 16:19]:
 On Friday, March 06, 2015 03:05:40 PM Tony Lindgren wrote:
  
  Oh it naturally would not work in irq context, it's for the bottom
  half again. But I'll take a look if we can just call
  pm_request_resume() and disable_irq() on the wakeirq in without
  waiting for the device driver runtime_suspend to disable the wakeirq.
  That would minimize the interface to just dev_pm_request_wakeirq()
  and dev_pm_free_wakeirq().
 
 But this is part of a bigger picture.  Namely, if a separete wakeup interrupt
 is required for a device, the device's power.can_wakeup flag cannot be set
 until that interrupt has been successfully requested.  Also for devices that
 can signal wakeup via their own IO interrupts, it would make sense to allow
 those interrupts to be registered somehow as wakeup interrupts.

It sure would be nice to provide at least some automated handling
for those too, even if it was just to deal with if device_may_wake()
irq_set_irq_wake().

At least in the cases I've seen, the IO interrupt is capable of waking
up too, but not from any deeper idle states. The wakeirq is always
capable of waking up the system, so if wakeirq was configured we
could just ignore the wake configureation for the IO interrupt.

And it seems some devices have a single wakeirq dealing with a group
of IO interrupts (GPIOs), see commit 97d86e07b716 (Input: gpio_keys -
allow separating gpio and irq in device tree). Not sure if that
interrupt is wake-up capable, but that would certainly make sense
considering it's for gpio-keys.

So it seems as long as we have one wakeirq entry per device, we
should be covered, even if a single wakeirq needs to wake up multiple
devices.

 So I wonder if we can define a new struct along the lines of your
 struct wakeirq_source, but call it struct wake_irq and make it look
 something like this:
 
 struct wake_irq {
struct device *dev;
int irq;
irq_handler_t handler;
 };
 
 Then, add a struct wake_irq pointer to struct dev_pm_info *and* to
 struct wakeup_source.  Next, make dev_pm_request_wake_irq() allocate the
 structure and request the interrupt and only set the pointer to it from
 struct dev_pm_info *along* *with* power.can_wakeup if all that was
 successful.
 
 For devices that use their own IO IRQ for wakeup, we can add something
 like dev_pm_set_wake_irq() that will work analogously, but without requesting
 the interrupt.  It will just set the dev and irq members of struct wake_irq
 and point struct dev_pm_info to it and set its power.can_wakeup flag.

OK
 
 Then, device_wakeup_enable() will be able to see that the device has a
 wakeup IRQ and it may then point its own struct wake_irq pointer to that.
 The core may then use that pointer to trigger enable_irq_wake() for the
 IRQ in question and it will cover the devices that don't need separate
 wakeup interrupts too.

Are you thinking we could do more than automate irq_set_irq_wake()
for the devices with just wake-up capable IO IRQ?
 
 Does that make sense to you?

Sure, at least for the irq_set_irq_wake() case.

Regards,

Tony
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Re: twl4030_charger: need changes to get probed?

[Pavel Machek]

On Sat 2015-03-07 00:12:07, Grazvydas Ignotas wrote:
 On Fri, Mar 6, 2015 at 11:57 PM, Pali Rohár pali.ro...@gmail.com wrote:
  On Friday 06 March 2015 22:24:17 Pavel Machek wrote:
  Hi!
 
  According to n900 dts, twl4030-bci (aka charger) should be
  included.
 
 
  AFAIK it is not present on n900...
 
 Right, it uses twl5030 variant without the charger, charging on n900
 is provided by separate chip and for a good reason as twl's charger is
 not that good. Forcing the driver to load just ends up with it
 accessing non-existent registers over i2c.

Ok, but:

1) Why is the twl4030-bci enabled in n900's dts, then

and

2) When it is enabled, why it does not load?

(I guess there's no way to get to input voltage on n900...?)

Pavel
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(cesky, pictures) 
http://atrey.karlin.mff.cuni.cz/~pavel/picture/horses/blog.html
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Re: [PATCH 1/4] PM / Wakeirq: Add minimal device wakeirq helper functions

[Rafael J. Wysocki]

On Friday, March 06, 2015 03:05:40 PM Tony Lindgren wrote:
 * Alan Stern st...@rowland.harvard.edu [150306 11:05]:
  On Fri, 6 Mar 2015, Tony Lindgren wrote:
  
 + struct wakeirq_source *wirq = _wirq;
 + irqreturn_t ret = IRQ_NONE;
 +
 + /* We don't want RPM_ASYNC or RPM_NOWAIT here */
 + if (pm_runtime_suspended(wirq-dev)) {

What if the device is resumed on a different CPU right here?
   
   Good point, sounds like we need to do this in some pm_runtime
   function directly for the locking.

 + pm_runtime_mark_last_busy(wirq-dev);
 + pm_runtime_resume(wirq-dev);

Calling this with disabled interrupts is a bad idea in general.
Is the device guaranteed to have power.irq_safe set?
   
   Well right now it's using threaded irq, and I'd like to get rid of
   the pm_runtime calls in the regular driver interrupts completely.
   We need to ensure the device runtime_resume is completed before
   returning IRQ_HANDLED here.
  
  In general, runtime_resume methods are allowed to sleep.  They can't be
  used in an interrupt handler top half unless the driver has
  specifically promised they are IRQ-safe.  That's what Rafael was
  getting at.
 
 Yes I understand, otherwise things certainly would not work :)
 
  Of course, if this routine is a threaded-irq bottom half then there's 
  no problem.
 
 Right this is threaded-irq bottom half because the devices may
 need to restore state and start regulators.
  
I guess what you want to call here is pm_request_resume() and
I wouldn't say that calling pm_runtime_mark_last_busy() on a
suspended device was valid.
   
   I'll verify again, but I believe the issue was that without doing
   mark_last_busy here the device falls back asleep right away.
   That probably should be fixed in pm_runtime in general if that's
   the case.
  
  It's up to the subsystem to handle this.  For example, the USB 
  subsystem's runtime-resume routine calls pm_runtime_mark_last_busy.
 
 Hmm.. OK thanks this probably explains why pm_request_resume() did
 not work.
 
 For omaps, I could call this from the interconnect related code,
 but then how dow we deal with the subsystems that don't call it?

Good question. :-)

   Considering the above, should we add a new function something like
   pm_resume_complete() that does not need irq_safe set but does
   not return until the device has completed resume?
  
  That doesn't make sense.  You're asking for a routine that is allowed
  to sleep but can safely be called in interrupt context.
 
 Oh it naturally would not work in irq context, it's for the bottom
 half again. But I'll take a look if we can just call
 pm_request_resume() and disable_irq() on the wakeirq in without
 waiting for the device driver runtime_suspend to disable the wakeirq.
 That would minimize the interface to just dev_pm_request_wakeirq()
 and dev_pm_free_wakeirq().

But this is part of a bigger picture.  Namely, if a separete wakeup interrupt
is required for a device, the device's power.can_wakeup flag cannot be set
until that interrupt has been successfully requested.  Also for devices that
can signal wakeup via their own IO interrupts, it would make sense to allow
those interrupts to be registered somehow as wakeup interrupts.

So I wonder if we can define a new struct along the lines of your
struct wakeirq_source, but call it struct wake_irq and make it look
something like this:

struct wake_irq {
   struct device *dev;
   int irq;
   irq_handler_t handler;
};

Then, add a struct wake_irq pointer to struct dev_pm_info *and* to
struct wakeup_source.  Next, make dev_pm_request_wake_irq() allocate the
structure and request the interrupt and only set the pointer to it from
struct dev_pm_info *along* *with* power.can_wakeup if all that was
successful.

For devices that use their own IO IRQ for wakeup, we can add something
like dev_pm_set_wake_irq() that will work analogously, but without requesting
the interrupt.  It will just set the dev and irq members of struct wake_irq
and point struct dev_pm_info to it and set its power.can_wakeup flag.

Then, device_wakeup_enable() will be able to see that the device has a
wakeup IRQ and it may then point its own struct wake_irq pointer to that.
The core may then use that pointer to trigger enable_irq_wake() for the
IRQ in question and it will cover the devices that don't need separate
wakeup interrupts too.

Does that make sense to you?

Rafael

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Re: [PATCH 1/4] PM / Wakeirq: Add minimal device wakeirq helper functions

[Rafael J. Wysocki]

On Friday, March 06, 2015 02:05:43 PM Alan Stern wrote:
 On Fri, 6 Mar 2015, Tony Lindgren wrote:
 
+   struct wakeirq_source *wirq = _wirq;
+   irqreturn_t ret = IRQ_NONE;
+
+   /* We don't want RPM_ASYNC or RPM_NOWAIT here */
+   if (pm_runtime_suspended(wirq-dev)) {
   
   What if the device is resumed on a different CPU right here?
  
  Good point, sounds like we need to do this in some pm_runtime
  function directly for the locking.
   
+   pm_runtime_mark_last_busy(wirq-dev);
+   pm_runtime_resume(wirq-dev);
   
   Calling this with disabled interrupts is a bad idea in general.
   Is the device guaranteed to have power.irq_safe set?
  
  Well right now it's using threaded irq, and I'd like to get rid of
  the pm_runtime calls in the regular driver interrupts completely.
  We need to ensure the device runtime_resume is completed before
  returning IRQ_HANDLED here.
 
 In general, runtime_resume methods are allowed to sleep.  They can't be
 used in an interrupt handler top half unless the driver has
 specifically promised they are IRQ-safe.  That's what Rafael was
 getting at.
 
 Of course, if this routine is a threaded-irq bottom half then there's 
 no problem.

Yup.  I overlooked the threaded part.

   I guess what you want to call here is pm_request_resume() and
   I wouldn't say that calling pm_runtime_mark_last_busy() on a
   suspended device was valid.
  
  I'll verify again, but I believe the issue was that without doing
  mark_last_busy here the device falls back asleep right away.
  That probably should be fixed in pm_runtime in general if that's
  the case.
 
 It's up to the subsystem to handle this.  For example, the USB 
 subsystem's runtime-resume routine calls pm_runtime_mark_last_busy.

I'm wondering, though, if there's any reason for us to avoid updating
power.last_busy in rpm_resume().

If I was a driver writer, I'd expect the core to do that for me quite frankly.

Rafael

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[GIT PULL] omap fixes against v4.0-rc2

[Tony Lindgren]

The following changes since commit 13a7a6ac0a11197edcd0f756a035f472b42cdf8b:

  Linux 4.0-rc2 (2015-03-03 09:04:59 -0800)

are available in the git repository at:

  git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap 
tags/fixes-v4.0-rc2

for you to fetch changes up to 5b7610f235627878617648a99dd1442997f1c889:

  ARM: OMAP2+: Fix wl12xx on dm3730-evm with mainline u-boot (2015-03-06 
10:37:34 -0800)


Fixes for various omap variants, mostly minor fixes for various SoCs
with the bigger changes being for the dra7 clocks and hwmod data:

- Fix wl12xx for dm3730-evm

- Fix omap4 prm save and clea

- Fix hwmod clkdm use count

- Fix hwmod data for pcie on dra7

- Fix lockdep for hwmod

- Fix USB on most omap3 boars by enabling it in the defconfig

- Fix the bypass clock source for omap5 and dra7

- Fix the ehrpwm clock for am33xx and am43xx

- Enable AES and SHAM for BeagleBone white

- Use rmii clock for am335x-lxm

- Fix polling intervals for omap5 thermal zones

- Fix slewctrl for am33xx and am43xx

- Fix dra7-evm dcan pinctrl


Aaro Koskinen (1):
  ARM: OMAP: enable TWL4030_USB in omap2plus_defconfig

Dave Gerlach (2):
  ARM: dts: am33xx: fix SLEWCTRL_FAST pinctrl binding
  ARM: dts: am43xx: fix SLEWCTRL_FAST pinctrl binding

George McCollister (1):
  ARM: dts: am335x-lxm: Use rmii-clock-ext

Kishon Vijay Abraham I (1):
  ARM: DRA7: hwmod_data: Fix hwmod data for pcie

Matt Porter (1):
  ARM: dts: am335x-bone-common: enable aes and sham

Peter Ujfalusi (1):
  ARM: omap2+: omap_hwmod: Set unique lock_class_key per hwmod

Ravikumar Kattekola (2):
  ARM: dts: DRA7x: Fix the bypass clock source for dpll_iva and others
  ARM: dts: OMAP5: Fix the bypass clock source for dpll_iva and others

Roger Quadros (2):
  ARM: dts: dra7x-evm: Don't use dcan1_rx.gpio1_15 in DCAN pinctrl
  ARM: dts: dra7x-evm: avoid possible contention while muxing on CAN lines

Tero Kristo (3):
  ARM: OMAP2+: hwmod: fix deassert hardreset clkdm usecounting
  ARM: OMAP4+: PRM: fix omap4 version of prm_save_and_clear_irqen
  ARM: dts: OMAP5: fix polling intervals for thermal zones

Tony Lindgren (2):
  Merge tag 'for-v4.0-rc/omap-fixes-a' of 
git://git.kernel.org/.../pjw/omap-pending into omap-for-v4.0/fixes
  ARM: OMAP2+: Fix wl12xx on dm3730-evm with mainline u-boot

Vignesh R (2):
  ARM: dts: am33xx-clocks: Fix ehrpwm tbclk data on am33xx
  ARM: dts: am43xx-clocks: Fix ehrpwm tbclk data on am43xx

 arch/arm/boot/dts/am335x-bone-common.dtsi |   8 +++
 arch/arm/boot/dts/am335x-bone.dts |   8 ---
 arch/arm/boot/dts/am335x-lxm.dts  |   4 ++
 arch/arm/boot/dts/am33xx-clocks.dtsi  |   6 +-
 arch/arm/boot/dts/am43xx-clocks.dtsi  |  12 ++--
 arch/arm/boot/dts/dra7-evm.dts|  10 ++-
 arch/arm/boot/dts/dra72-evm.dts   |  10 ++-
 arch/arm/boot/dts/dra7xx-clocks.dtsi  |  90 +++---
 arch/arm/boot/dts/omap5-core-thermal.dtsi |   2 +-
 arch/arm/boot/dts/omap5-gpu-thermal.dtsi  |   2 +-
 arch/arm/boot/dts/omap5.dtsi  |   4 ++
 arch/arm/boot/dts/omap54xx-clocks.dtsi|  41 ++--
 arch/arm/configs/omap2plus_defconfig  |   1 +
 arch/arm/mach-omap2/omap_hwmod.c  |  10 +--
 arch/arm/mach-omap2/omap_hwmod.h  |   1 +
 arch/arm/mach-omap2/omap_hwmod_7xx_data.c | 103 +++---
 arch/arm/mach-omap2/pdata-quirks.c|   1 +
 arch/arm/mach-omap2/prm44xx.c |   4 +-
 include/dt-bindings/pinctrl/am33xx.h  |   3 +-
 include/dt-bindings/pinctrl/am43xx.h  |   3 +-
 20 files changed, 191 insertions(+), 132 deletions(-)
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Re: [RFC/RFT PATCH 2/2] gpio: omap: ensure that runtime pm will disable unused gpio banks

[Tony Lindgren]

* grygorii.stras...@linaro.org grygorii.stras...@linaro.org [150306 11:27]:
 From: Grygorii Strashko grygorii.stras...@linaro.org
 
 Now there are two points related to Runtime PM usage:
 1) bank state doesn't need to be checked in places where
 Rintime PM is used, bacause Runtime PM maintains its
 own usage counter:
   if (!BANK_USED(bank))
pm_runtime_get_sync(bank-dev);
 so, it's safe to drop such checks.
 
 2) There is a call of pm_runtime_get_sync() in omap_gpio_irq_type(),
 but no corresponding put. As result, GPIO devices could be
 powered on forever if at least one GPIO was used as IRQ.
 Hence, allow powering off GPIO banks by adding missed
 pm_runtime_put(bank-dev) at the end of omap_gpio_irq_type().

Nice to see this happening, but I think before merging this we need
to test to be sure that the pm_runtime calls actually match.. I'm
not convinced right now.. We may still have uninitialized entry
points similar to 3d009c8c61f9 (gpio: omap: Fix bad device
access with setup_irq()).

Regards,

Tony
 
 Signed-off-by: Grygorii Strashko grygorii.stras...@linaro.org
 ---
  drivers/gpio/gpio-omap.c | 17 +++--
  1 file changed, 7 insertions(+), 10 deletions(-)
 
 diff --git a/drivers/gpio/gpio-omap.c b/drivers/gpio/gpio-omap.c
 index 2b2fc4b..b1176c5 100644
 --- a/drivers/gpio/gpio-omap.c
 +++ b/drivers/gpio/gpio-omap.c
 @@ -497,8 +497,7 @@ static int omap_gpio_irq_type(struct irq_data *d, 
 unsigned type)
   unsigned long flags;
   unsigned offset;
  
 - if (!BANK_USED(bank))
 - pm_runtime_get_sync(bank-dev);
 + pm_runtime_get_sync(bank-dev);
  
  #ifdef CONFIG_ARCH_OMAP1
   if (d-irq  IH_MPUIO_BASE)
 @@ -530,6 +529,8 @@ static int omap_gpio_irq_type(struct irq_data *d, 
 unsigned type)
   else if (type  (IRQ_TYPE_EDGE_FALLING | IRQ_TYPE_EDGE_RISING))
   __irq_set_handler_locked(d-irq, handle_edge_irq);
  
 + pm_runtime_put(bank-dev);
 +
   return retval;
  }
  
 @@ -680,8 +681,7 @@ static int omap_gpio_request(struct gpio_chip *chip, 
 unsigned offset)
* If this is the first gpio_request for the bank,
* enable the bank module.
*/
 - if (!BANK_USED(bank))
 - pm_runtime_get_sync(bank-dev);
 + pm_runtime_get_sync(bank-dev);
  
   spin_lock_irqsave(bank-lock, flags);
   /* Set trigger to none. You need to enable the desired trigger with
 @@ -713,8 +713,7 @@ static void omap_gpio_free(struct gpio_chip *chip, 
 unsigned offset)
* If this is the last gpio to be freed in the bank,
* disable the bank module.
*/
 - if (!BANK_USED(bank))
 - pm_runtime_put(bank-dev);
 + pm_runtime_put(bank-dev);
  }
  
  /*
 @@ -807,8 +806,7 @@ static unsigned int omap_gpio_irq_startup(struct irq_data 
 *d)
   unsigned long flags;
   unsigned offset = GPIO_INDEX(bank, gpio);
  
 - if (!BANK_USED(bank))
 - pm_runtime_get_sync(bank-dev);
 + pm_runtime_get_sync(bank-dev);
  
   spin_lock_irqsave(bank-lock, flags);
   omap_gpio_init_irq(bank, gpio, offset);
 @@ -835,8 +833,7 @@ static void omap_gpio_irq_shutdown(struct irq_data *d)
* If this is the last IRQ to be freed in the bank,
* disable the bank module.
*/
 - if (!BANK_USED(bank))
 - pm_runtime_put(bank-dev);
 + pm_runtime_put(bank-dev);
  }
  
  static void omap_gpio_ack_irq(struct irq_data *d)
 -- 
 1.9.1
 
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[PATCH RESEND] serial: omap_serial: document missing properties and add an example

[Matt Porter]

The omap_serial.txt binding documentation lacks a number of properties
that are used in DTS files for platforms incorporating this peripheral.
Fix this by documenting the missing required and optional fields and
add an example.

Signed-off-by: Matt Porter mpor...@konsulko.com
---
 .../devicetree/bindings/serial/omap_serial.txt   | 20 
 1 file changed, 20 insertions(+)

diff --git a/Documentation/devicetree/bindings/serial/omap_serial.txt 
b/Documentation/devicetree/bindings/serial/omap_serial.txt
index 342eedd..54c2a15 100644
--- a/Documentation/devicetree/bindings/serial/omap_serial.txt
+++ b/Documentation/devicetree/bindings/serial/omap_serial.txt
@@ -4,7 +4,27 @@ Required properties:
 - compatible : should be ti,omap2-uart for OMAP2 controllers
 - compatible : should be ti,omap3-uart for OMAP3 controllers
 - compatible : should be ti,omap4-uart for OMAP4 controllers
+- reg : address and length of the register space
+- interrupts or interrupts-extended : Should contain the uart interrupt
+  specifier or both the interrupt
+  controller phandle and interrupt
+  specifier.
 - ti,hwmods : Must be uartn, n being the instance number (1-based)
 
 Optional properties:
 - clock-frequency : frequency of the clock input to the UART
+- dmas : DMA specifier, consisting of a phandle to the DMA controller
+ node and a DMA channel number.
+- dma-names : rx for receive channel, tx for transmit channel.
+
+Example:
+
+uart4: serial@49042000 {
+compatible = ti,omap3-uart;
+reg = 0x49042000 0x400;
+interrupts = 80;
+dmas = sdma 81 sdma 82;
+dma-names = tx, rx;
+ti,hwmods = uart4;
+clock-frequency = 4800;
+};
-- 
1.8.4

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[PATCH v2 3/7] drm/tilcdc: Add support for external tda998x encoder

[Jyri Sarha]

Add support for an external compontised DRM encoder. The external
encoder can be connected to tilcdc trough device tree graph binding.
The binding document for tilcdc has been updated. The current
implementation supports only tda998x encoder.

I got the idea and some lines of code from Jean-Francois Moine's
drm/tilcdc: Change the interface with the tda998x driver-patch.

Signed-off-by: Jyri Sarha jsa...@ti.com
---
 .../devicetree/bindings/drm/tilcdc/tilcdc.txt  |  27 ++
 drivers/gpu/drm/tilcdc/Makefile|   1 +
 drivers/gpu/drm/tilcdc/tilcdc_crtc.c   |  33 +++
 drivers/gpu/drm/tilcdc/tilcdc_drv.c|  76 ---
 drivers/gpu/drm/tilcdc/tilcdc_drv.h|   4 +
 drivers/gpu/drm/tilcdc/tilcdc_external.c   | 104 +
 drivers/gpu/drm/tilcdc/tilcdc_external.h   |  24 +
 7 files changed, 256 insertions(+), 13 deletions(-)
 create mode 100644 drivers/gpu/drm/tilcdc/tilcdc_external.c
 create mode 100644 drivers/gpu/drm/tilcdc/tilcdc_external.h

diff --git a/Documentation/devicetree/bindings/drm/tilcdc/tilcdc.txt 
b/Documentation/devicetree/bindings/drm/tilcdc/tilcdc.txt
index fff10da..2136ee8 100644
--- a/Documentation/devicetree/bindings/drm/tilcdc/tilcdc.txt
+++ b/Documentation/devicetree/bindings/drm/tilcdc/tilcdc.txt
@@ -18,6 +18,12 @@ Optional properties:
  - max-pixelclock: The maximum pixel clock that can be supported
by the lcd controller in KHz.
 
+Optional nodes:
+
+ - port/ports: to describe a connection to an external encoder. The
+   binding follows Documentation/devicetree/bindings/graph.txt and
+   suppors a single port with a single endpoint.
+
 Example:
 
fb: fb@4830e000 {
@@ -26,4 +32,25 @@ Example:
interrupt-parent = intc;
interrupts = 36;
ti,hwmods = lcdc;
+
+   port {
+   lcdc_0: endpoint@0 {
+   remote-endpoint = hdmi_0;
+   };
+   };
+   };
+
+   tda19988: tda19988 {
+   compatible = nxp,tda998x;
+   reg = 0x70;
+
+   pinctrl-names = default, off;
+   pinctrl-0 = nxp_hdmi_bonelt_pins;
+   pinctrl-1 = nxp_hdmi_bonelt_off_pins;
+
+   port {
+   hdmi_0: endpoint@0 {
+   remote-endpoint = lcdc_0;
+   };
+   };
};
diff --git a/drivers/gpu/drm/tilcdc/Makefile b/drivers/gpu/drm/tilcdc/Makefile
index 44485f9..e1f738b 100644
--- a/drivers/gpu/drm/tilcdc/Makefile
+++ b/drivers/gpu/drm/tilcdc/Makefile
@@ -7,6 +7,7 @@ tilcdc-y := \
tilcdc_crtc.o \
tilcdc_tfp410.o \
tilcdc_panel.o \
+   tilcdc_external.o \
tilcdc_drv.o
 
 obj-$(CONFIG_DRM_TILCDC)   += tilcdc.o
diff --git a/drivers/gpu/drm/tilcdc/tilcdc_crtc.c 
b/drivers/gpu/drm/tilcdc/tilcdc_crtc.c
index c2d5980..7d07733 100644
--- a/drivers/gpu/drm/tilcdc/tilcdc_crtc.c
+++ b/drivers/gpu/drm/tilcdc/tilcdc_crtc.c
@@ -37,6 +37,9 @@ struct tilcdc_crtc {
 
/* for deferred fb unref's: */
struct drm_flip_work unref_work;
+
+   /* Only set if an external encoder is connected */
+   bool simulate_vesa_sync;
 };
 #define to_tilcdc_crtc(x) container_of(x, struct tilcdc_crtc, base)
 
@@ -214,6 +217,28 @@ static bool tilcdc_crtc_mode_fixup(struct drm_crtc *crtc,
const struct drm_display_mode *mode,
struct drm_display_mode *adjusted_mode)
 {
+   struct tilcdc_crtc *tilcdc_crtc = to_tilcdc_crtc(crtc);
+
+   if (!tilcdc_crtc-simulate_vesa_sync)
+   return true;
+
+   /*
+* tilcdc does not generate VESA-compliant sync but aligns
+* VS on the second edge of HS instead of first edge.
+* We use adjusted_mode, to fixup sync by aligning both rising
+* edges and add HSKEW offset to fix the sync.
+*/
+   adjusted_mode-hskew = mode-hsync_end - mode-hsync_start;
+   adjusted_mode-flags |= DRM_MODE_FLAG_HSKEW;
+
+   if (mode-flags  DRM_MODE_FLAG_NHSYNC) {
+   adjusted_mode-flags |= DRM_MODE_FLAG_PHSYNC;
+   adjusted_mode-flags = ~DRM_MODE_FLAG_NHSYNC;
+   } else {
+   adjusted_mode-flags |= DRM_MODE_FLAG_NHSYNC;
+   adjusted_mode-flags = ~DRM_MODE_FLAG_PHSYNC;
+   }
+
return true;
 }
 
@@ -534,6 +559,14 @@ void tilcdc_crtc_set_panel_info(struct drm_crtc *crtc,
tilcdc_crtc-info = info;
 }
 
+void tilcdc_crtc_set_simulate_vesa_sync(struct drm_crtc *crtc,
+   bool simulate_vesa_sync)
+{
+   struct tilcdc_crtc *tilcdc_crtc = to_tilcdc_crtc(crtc);
+
+   tilcdc_crtc-simulate_vesa_sync = simulate_vesa_sync;
+}
+
 void tilcdc_crtc_update_clk(struct drm_crtc *crtc)
 {
struct tilcdc_crtc *tilcdc_crtc = to_tilcdc_crtc(crtc);
diff --git a/drivers/gpu/drm/tilcdc/tilcdc_drv.c 

[PATCH v2 2/7] drm/tilcdc: Remove tilcdc slave support for tda998x driver

[Jyri Sarha]

Remove tilcdc slave support for tda998x driver. The tilcdc slave
support would conflicts with componentized use of tda998x.

Signed-off-by: Jyri Sarha jsa...@ti.com
---
 .../devicetree/bindings/drm/tilcdc/slave.txt   |  18 -
 drivers/gpu/drm/tilcdc/Makefile|   1 -
 drivers/gpu/drm/tilcdc/tilcdc_drv.c|  13 -
 drivers/gpu/drm/tilcdc/tilcdc_drv.h|   1 -
 drivers/gpu/drm/tilcdc/tilcdc_slave.c  | 411 -
 drivers/gpu/drm/tilcdc/tilcdc_slave.h  |  26 --
 6 files changed, 470 deletions(-)
 delete mode 100644 Documentation/devicetree/bindings/drm/tilcdc/slave.txt
 delete mode 100644 drivers/gpu/drm/tilcdc/tilcdc_slave.c
 delete mode 100644 drivers/gpu/drm/tilcdc/tilcdc_slave.h

diff --git a/Documentation/devicetree/bindings/drm/tilcdc/slave.txt 
b/Documentation/devicetree/bindings/drm/tilcdc/slave.txt
deleted file mode 100644
index 3d2c524..000
--- a/Documentation/devicetree/bindings/drm/tilcdc/slave.txt
+++ /dev/null
@@ -1,18 +0,0 @@
-Device-Tree bindings for tilcdc DRM encoder slave output driver
-
-Required properties:
- - compatible: value should be ti,tilcdc,slave.
- - i2c: the phandle for the i2c device the encoder slave is connected to
-
-Recommended properties:
- - pinctrl-names, pinctrl-0: the pincontrol settings to configure
-   muxing properly for pins that connect to TFP410 device
-
-Example:
-
-   hdmi {
-   compatible = ti,tilcdc,slave;
-   i2c = i2c0;
-   pinctrl-names = default;
-   pinctrl-0 = nxp_hdmi_bonelt_pins;
-   };
diff --git a/drivers/gpu/drm/tilcdc/Makefile b/drivers/gpu/drm/tilcdc/Makefile
index 7d2eefe..44485f9 100644
--- a/drivers/gpu/drm/tilcdc/Makefile
+++ b/drivers/gpu/drm/tilcdc/Makefile
@@ -6,7 +6,6 @@ endif
 tilcdc-y := \
tilcdc_crtc.o \
tilcdc_tfp410.o \
-   tilcdc_slave.o \
tilcdc_panel.o \
tilcdc_drv.o
 
diff --git a/drivers/gpu/drm/tilcdc/tilcdc_drv.c 
b/drivers/gpu/drm/tilcdc/tilcdc_drv.c
index 095fca9..0f1e099 100644
--- a/drivers/gpu/drm/tilcdc/tilcdc_drv.c
+++ b/drivers/gpu/drm/tilcdc/tilcdc_drv.c
@@ -20,13 +20,11 @@
 #include tilcdc_drv.h
 #include tilcdc_regs.h
 #include tilcdc_tfp410.h
-#include tilcdc_slave.h
 #include tilcdc_panel.h
 
 #include drm_fb_helper.h
 
 static LIST_HEAD(module_list);
-static bool slave_probing;
 
 void tilcdc_module_init(struct tilcdc_module *mod, const char *name,
const struct tilcdc_module_ops *funcs)
@@ -42,11 +40,6 @@ void tilcdc_module_cleanup(struct tilcdc_module *mod)
list_del(mod-list);
 }
 
-void tilcdc_slave_probedefer(bool defered)
-{
-   slave_probing = defered;
-}
-
 static struct of_device_id tilcdc_of_match[];
 
 static struct drm_framebuffer *tilcdc_fb_create(struct drm_device *dev,
@@ -620,10 +613,6 @@ static int tilcdc_pdev_probe(struct platform_device *pdev)
return -ENXIO;
}
 
-   /* defer probing if slave is in deferred probing */
-   if (slave_probing == true)
-   return -EPROBE_DEFER;
-
return drm_platform_init(tilcdc_driver, pdev);
 }
 
@@ -654,7 +643,6 @@ static int __init tilcdc_drm_init(void)
 {
DBG(init);
tilcdc_tfp410_init();
-   tilcdc_slave_init();
tilcdc_panel_init();
return platform_driver_register(tilcdc_platform_driver);
 }
@@ -664,7 +652,6 @@ static void __exit tilcdc_drm_fini(void)
DBG(fini);
platform_driver_unregister(tilcdc_platform_driver);
tilcdc_panel_fini();
-   tilcdc_slave_fini();
tilcdc_tfp410_fini();
 }
 
diff --git a/drivers/gpu/drm/tilcdc/tilcdc_drv.h 
b/drivers/gpu/drm/tilcdc/tilcdc_drv.h
index 7596c14..6336512 100644
--- a/drivers/gpu/drm/tilcdc/tilcdc_drv.h
+++ b/drivers/gpu/drm/tilcdc/tilcdc_drv.h
@@ -116,7 +116,6 @@ struct tilcdc_module {
 void tilcdc_module_init(struct tilcdc_module *mod, const char *name,
const struct tilcdc_module_ops *funcs);
 void tilcdc_module_cleanup(struct tilcdc_module *mod);
-void tilcdc_slave_probedefer(bool defered);
 
 /* Panel config that needs to be set in the crtc, but is not coming from
  * the mode timings.  The display module is expected to call
diff --git a/drivers/gpu/drm/tilcdc/tilcdc_slave.c 
b/drivers/gpu/drm/tilcdc/tilcdc_slave.c
deleted file mode 100644
index 3775fd4..000
--- a/drivers/gpu/drm/tilcdc/tilcdc_slave.c
+++ /dev/null
@@ -1,411 +0,0 @@
-/*
- * Copyright (C) 2012 Texas Instruments
- * Author: Rob Clark robdcl...@gmail.com
- *
- * This program is free software; you can redistribute it and/or modify it
- * under the terms of the GNU General Public License version 2 as published by
- * the Free Software Foundation.
- *
- * This program is distributed in the hope that it will be useful, but WITHOUT
- * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
- * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
- * more details.
- *
- * You 

[PATCH v2 6/7] drm/tilcdc: Force building of DRM_TILCDC_SLAVE_COMPAT

[Jyri Sarha]

If I read Documentation/kbuild/makefiles.txt section 3.6 right, this
patch should not be needed. However, without this patch the objects
needed for DRM_TILCDC_SLAVE_COMPAT are not linked, if DRM_TILCDC is
built as module.

Signed-off-by: Jyri Sarha jsa...@ti.com
---
 drivers/gpu/drm/Makefile | 1 +
 1 file changed, 1 insertion(+)

diff --git a/drivers/gpu/drm/Makefile b/drivers/gpu/drm/Makefile
index 2c239b9..ad7f10f 100644
--- a/drivers/gpu/drm/Makefile
+++ b/drivers/gpu/drm/Makefile
@@ -60,6 +60,7 @@ obj-$(CONFIG_DRM_RCAR_DU) += rcar-du/
 obj-$(CONFIG_DRM_SHMOBILE) +=shmobile/
 obj-$(CONFIG_DRM_OMAP) += omapdrm/
 obj-$(CONFIG_DRM_TILCDC)   += tilcdc/
+obj-$(CONFIG_DRM_TILCDC_SLAVE_COMPAT) += tilcdc/
 obj-$(CONFIG_DRM_QXL) += qxl/
 obj-$(CONFIG_DRM_BOCHS) += bochs/
 obj-$(CONFIG_DRM_MSM) += msm/
-- 
1.9.1

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[PATCH v2 4/7] drm/tilcdc: Decrement refcount of ep-node from of_graph_get_next_endpoint

[Jyri Sarha]

This patch should be dropped/reverterd if/after of: Decrement refcount
of previous endpoint in of_graph_get_next_endpoint patch has been
merged.

Signed-off-by: Jyri Sarha jsa...@ti.com
---
 drivers/gpu/drm/tilcdc/tilcdc_external.c | 1 +
 1 file changed, 1 insertion(+)

diff --git a/drivers/gpu/drm/tilcdc/tilcdc_external.c 
b/drivers/gpu/drm/tilcdc/tilcdc_external.c
index 61f8aee..1dd6c20 100644
--- a/drivers/gpu/drm/tilcdc/tilcdc_external.c
+++ b/drivers/gpu/drm/tilcdc/tilcdc_external.c
@@ -83,6 +83,7 @@ int tilcdc_get_external_components(struct device *dev,
struct device_node *node;
 
node = of_graph_get_remote_port_parent(ep);
+   of_node_put(ep);
if (!node  !of_device_is_available(node)) {
of_node_put(node);
continue;
-- 
1.9.1

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[PATCH v2 5/7] drm/tilcdc: Add DRM_TILCDC_SLAVE_COMPAT for ti,tilcdc,slave binding support

[Jyri Sarha]

Adds a CONFIG_DRM_TILCDC_SLAVE_COMPAT module for ti,tilcdc,slave
node conversion. The implementation is in tilcdc_slave_compat.c and it
uses tilcdc_slave_compat.dts as a basis for creating a DTS
overlay. The DTS overlay adds an external tda998x encoder to tilcdc
that corresponds to the old tda998x based slave encoder.

Signed-off-by: Jyri Sarha jsa...@ti.com
---
 drivers/gpu/drm/tilcdc/Kconfig |  13 ++
 drivers/gpu/drm/tilcdc/Makefile|   3 +
 drivers/gpu/drm/tilcdc/tilcdc_slave_compat.c   | 270 +
 drivers/gpu/drm/tilcdc/tilcdc_slave_compat.dts |  72 +++
 4 files changed, 358 insertions(+)
 create mode 100644 drivers/gpu/drm/tilcdc/tilcdc_slave_compat.c
 create mode 100644 drivers/gpu/drm/tilcdc/tilcdc_slave_compat.dts

diff --git a/drivers/gpu/drm/tilcdc/Kconfig b/drivers/gpu/drm/tilcdc/Kconfig
index 8394a0b..7e1e72b 100644
--- a/drivers/gpu/drm/tilcdc/Kconfig
+++ b/drivers/gpu/drm/tilcdc/Kconfig
@@ -1,3 +1,15 @@
+config DRM_TILCDC_SLAVE_COMPAT
+   bool Support device tree blobs using TI LCDC Slave binding
+   depends on DRM_TILCDC
+   default y
+   select OF_RESOLVE
+   select OF_OVERLAY
+   help
+ Choose this option if you need a kernel that is compatible
+ with device tree blobs using the obsolete ti,tilcdc,slave
+ binding. If you find ti,tilcdc,slave-string from your DTB,
+ you probably need this. Otherwise you do not.
+
 config DRM_TILCDC
tristate DRM Support for TI LCDC Display Controller
depends on DRM  OF  ARM  HAVE_DMA_ATTRS
@@ -8,6 +20,7 @@ config DRM_TILCDC
select VIDEOMODE_HELPERS
select BACKLIGHT_CLASS_DEVICE
select BACKLIGHT_LCD_SUPPORT
+   select DRM_TILCDC_INIT
help
  Choose this option if you have an TI SoC with LCDC display
  controller, for example AM33xx in beagle-bone, DA8xx, or
diff --git a/drivers/gpu/drm/tilcdc/Makefile b/drivers/gpu/drm/tilcdc/Makefile
index e1f738b..deeca48 100644
--- a/drivers/gpu/drm/tilcdc/Makefile
+++ b/drivers/gpu/drm/tilcdc/Makefile
@@ -3,6 +3,9 @@ ifeq (, $(findstring -W,$(EXTRA_CFLAGS)))
ccflags-y += -Werror
 endif
 
+obj-$(CONFIG_DRM_TILCDC_SLAVE_COMPAT) += tilcdc_slave_compat.o \
+tilcdc_slave_compat.dtb.o
+
 tilcdc-y := \
tilcdc_crtc.o \
tilcdc_tfp410.o \
diff --git a/drivers/gpu/drm/tilcdc/tilcdc_slave_compat.c 
b/drivers/gpu/drm/tilcdc/tilcdc_slave_compat.c
new file mode 100644
index 000..cc9572d
--- /dev/null
+++ b/drivers/gpu/drm/tilcdc/tilcdc_slave_compat.c
@@ -0,0 +1,270 @@
+/*
+ * Copyright (C) 2015 Texas Instruments
+ * Author: Jyri Sarha jsa...@ti.com
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of the GNU General Public License version 2 as published by
+ * the Free Software Foundation.
+ *
+ */
+
+/*
+ * To support the old ti,tilcdc,slave binding the binding has to be
+ * transformed to the new external encoder binding.
+ */
+
+#include linux/kernel.h
+#include linux/of.h
+#include linux/of_graph.h
+#include linux/of_fdt.h
+#include linux/slab.h
+#include linux/list.h
+
+struct kfree_table {
+   int total;
+   int num;
+   void **table;
+};
+
+static int __init kfree_table_init(struct kfree_table *kft)
+{
+   kft-total = 32;
+   kft-num = 0;
+   kft-table = kmalloc(kft-total * sizeof(*kft-table),
+GFP_KERNEL);
+   if (!kft-table)
+   return -ENOMEM;
+
+   return 0;
+}
+
+static int __init kfree_table_add(struct kfree_table *kft, void *p)
+{
+   if (kft-num == kft-total) {
+   void **old = kft-table;
+
+   kft-total *= 2;
+   kft-table = krealloc(old, kft-total * sizeof(*kft-table),
+ GFP_KERNEL);
+   if (!kft-table) {
+   kft-table = old;
+   kfree(p);
+   return -ENOMEM;
+   }
+   }
+   kft-table[kft-num++] = p;
+   return 0;
+}
+
+static void __init kfree_table_free(struct kfree_table *kft)
+{
+   int i;
+
+   for (i = 0; i  kft-num; i++)
+   kfree(kft-table[i]);
+
+   kfree(kft-table);
+}
+
+static
+struct property * __init tilcdc_prop_dup(const struct property *prop,
+struct kfree_table *kft)
+{
+   struct property *nprop;
+
+   nprop = kzalloc(sizeof(*nprop), GFP_KERNEL);
+   if (!nprop || kfree_table_add(kft, nprop))
+   return NULL;
+
+   nprop-name = kstrdup(prop-name, GFP_KERNEL);
+   if (!nprop-name || kfree_table_add(kft, nprop-name))
+   return NULL;
+
+   nprop-value = kmemdup(prop-value, prop-length, GFP_KERNEL);
+   if (!nprop-value || kfree_table_add(kft, nprop-value))
+   return NULL;
+
+   nprop-length = prop-length;
+
+   return nprop;
+}
+
+static 

[PATCH v2 7/7] ARM: dts: am335x-boneblack: Use new binding for HDMI

[Jyri Sarha]

Use new binding for the external tda19988 HDMI encoder.

Signed-off-by: Jyri Sarha jsa...@ti.com
---
 arch/arm/boot/dts/am335x-boneblack.dts | 20 +++-
 1 file changed, 15 insertions(+), 5 deletions(-)

diff --git a/arch/arm/boot/dts/am335x-boneblack.dts 
b/arch/arm/boot/dts/am335x-boneblack.dts
index 5c42d25..eadbba3 100644
--- a/arch/arm/boot/dts/am335x-boneblack.dts
+++ b/arch/arm/boot/dts/am335x-boneblack.dts
@@ -68,16 +68,26 @@
 
 lcdc {
status = okay;
+   port {
+   lcdc_0: endpoint@0 {
+   remote-endpoint = hdmi_0;
+   };
+   };
 };
 
-/ {
-   hdmi {
-   compatible = ti,tilcdc,slave;
-   i2c = i2c0;
+i2c0 {
+   tda19988 {
+   compatible = nxp,tda998x;
+   reg = 0x70;
pinctrl-names = default, off;
pinctrl-0 = nxp_hdmi_bonelt_pins;
pinctrl-1 = nxp_hdmi_bonelt_off_pins;
-   status = okay;
+
+   port {
+   hdmi_0: endpoint@0 {
+   remote-endpoint = lcdc_0;
+   };
+   };
};
 };
 
-- 
1.9.1

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Re: [PATCH 11/24] ARM: OMAP2+: clock: remove support for legacy mpurate command line param

[Tony Lindgren]

* Tero Kristo t-kri...@ti.com [150306 04:29]:
 The legacy support is wrong and dangerous, as it doesn't take any
 OPPs into account and does not scale voltages. Switching mpurate should
 be handled through cpufreq.

Hmm I wonder if some systems actually rely on the mpurate cmdline
parameter. If this cannot be fixed properly, you should at least
print an error here.

Regards,

Tony
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[PATCH] ARM: dts: omap3-beagle: Add NAND device

[Roger Quadros]

The beagle board contains a 16-bit NAND device connected to
chip select 0 of the GPMC controller.

Signed-off-by: Roger Quadros rog...@ti.com
---
 arch/arm/boot/dts/omap3-beagle.dts | 52 ++
 1 file changed, 52 insertions(+)

diff --git a/arch/arm/boot/dts/omap3-beagle.dts 
b/arch/arm/boot/dts/omap3-beagle.dts
index c792391..bf28502 100644
--- a/arch/arm/boot/dts/omap3-beagle.dts
+++ b/arch/arm/boot/dts/omap3-beagle.dts
@@ -379,3 +379,55 @@
};
};
 };
+
+gpmc {
+   status = ok;
+   ranges = 0 0 0x3000 0x100;/* CS0 space, 16MB */
+
+   /* Chip select 0 */
+   nand@0,0 {
+   reg = 0 0 4;  /* NAND I/O window, 4 bytes */
+   interrupts = 20;
+   ti,nand-ecc-opt = ham1;
+   nand-bus-width = 16;
+   #address-cells = 1;
+   #size-cells = 1;
+
+   gpmc,device-width = 2;
+   gpmc,cs-on-ns = 0;
+   gpmc,cs-rd-off-ns = 36;
+   gpmc,cs-wr-off-ns = 36;
+   gpmc,adv-on-ns = 6;
+   gpmc,adv-rd-off-ns = 24;
+   gpmc,adv-wr-off-ns = 36;
+   gpmc,oe-on-ns = 6;
+   gpmc,oe-off-ns = 48;
+   gpmc,we-on-ns = 6;
+   gpmc,we-off-ns = 30;
+   gpmc,rd-cycle-ns = 72;
+   gpmc,wr-cycle-ns = 72;
+   gpmc,access-ns = 54;
+   gpmc,wr-access-ns = 30;
+
+   partition@0 {
+   label = X-Loader;
+   reg = 0 0x8;
+   };
+   partition@8 {
+   label = U-Boot;
+   reg = 0x8 0x1e;
+   };
+   partition@1c {
+   label = U-Boot Env;
+   reg = 0x26 0x2;
+   };
+   partition@28 {
+   label = Kernel;
+   reg = 0x28 0x40;
+   };
+   partition@78 {
+   label = Filesystem;
+   reg = 0x68 0xf98;
+   };
+   };
+};
-- 
2.1.0

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[PATCH v2 0/7] Use DRM component API in tilcdc to connect to tda998x

[Jyri Sarha]

Changes since first version of the patch-set:
- Rename DRM_TILCDC_INIT to DRM_TILCDC_SLAVE_COMPAT and make it visible
- Add separate: 
  drm/tilcdc: Decrement refcount of ep-node from of_graph_get_next_endpoint
- Reduce info-level spam
- Use component_master_add_with_match()
- Be more explicit about tda998x being the only supported external encoder

Remove tilcdc slave support and connect to tda998x trough its
component DRM API. For dtb backward compatibility the code creates at
boot time a DT overlay based on the earlier binding. The overlay
conforms to the new graph based binding.

The first patch is just a bugfix and can be applied or dropped
independently.

Jyri Sarha (7):
  drm/tilcdc: Fix module unloading
  drm/tilcdc: Remove tilcdc slave support for tda998x driver
  drm/tilcdc: Add support for external tda998x encoder
  drm/tilcdc: Decrement refcount of ep-node from
of_graph_get_next_endpoint
  drm/tilcdc: Add DRM_TILCDC_SLAVE_COMPAT for ti,tilcdc,slave binding
support
  drm/tilcdc: Force building of DRM_TILCDC_SLAVE_COMPAT
  ARM: dts: am335x-boneblack: Use new binding for HDMI

 .../devicetree/bindings/drm/tilcdc/slave.txt   |  18 -
 .../devicetree/bindings/drm/tilcdc/tilcdc.txt  |  27 ++
 arch/arm/boot/dts/am335x-boneblack.dts |  20 +-
 drivers/gpu/drm/Makefile   |   1 +
 drivers/gpu/drm/tilcdc/Kconfig |  13 +
 drivers/gpu/drm/tilcdc/Makefile|   5 +-
 drivers/gpu/drm/tilcdc/tilcdc_crtc.c   |  36 +-
 drivers/gpu/drm/tilcdc/tilcdc_drv.c|  89 +++--
 drivers/gpu/drm/tilcdc/tilcdc_drv.h|   5 +-
 drivers/gpu/drm/tilcdc/tilcdc_external.c   | 105 ++
 drivers/gpu/drm/tilcdc/tilcdc_external.h   |  24 ++
 drivers/gpu/drm/tilcdc/tilcdc_slave.c  | 411 -
 drivers/gpu/drm/tilcdc/tilcdc_slave.h  |  26 --
 drivers/gpu/drm/tilcdc/tilcdc_slave_compat.c   | 270 ++
 drivers/gpu/drm/tilcdc/tilcdc_slave_compat.dts |  72 
 15 files changed, 633 insertions(+), 489 deletions(-)
 delete mode 100644 Documentation/devicetree/bindings/drm/tilcdc/slave.txt
 create mode 100644 drivers/gpu/drm/tilcdc/tilcdc_external.c
 create mode 100644 drivers/gpu/drm/tilcdc/tilcdc_external.h
 delete mode 100644 drivers/gpu/drm/tilcdc/tilcdc_slave.c
 delete mode 100644 drivers/gpu/drm/tilcdc/tilcdc_slave.h
 create mode 100644 drivers/gpu/drm/tilcdc/tilcdc_slave_compat.c
 create mode 100644 drivers/gpu/drm/tilcdc/tilcdc_slave_compat.dts

-- 
1.9.1

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[PATCH v2 1/7] drm/tilcdc: Fix module unloading

[Jyri Sarha]

Force crtc dpms off before destroying the crtc instead of just
checking the dpms state. This fixes warning message and frozen picture
after tilcdc module unloading.

Signed-off-by: Jyri Sarha jsa...@ti.com
---
 drivers/gpu/drm/tilcdc/tilcdc_crtc.c | 3 ++-
 1 file changed, 2 insertions(+), 1 deletion(-)

diff --git a/drivers/gpu/drm/tilcdc/tilcdc_crtc.c 
b/drivers/gpu/drm/tilcdc/tilcdc_crtc.c
index c735884..c2d5980 100644
--- a/drivers/gpu/drm/tilcdc/tilcdc_crtc.c
+++ b/drivers/gpu/drm/tilcdc/tilcdc_crtc.c
@@ -135,11 +135,12 @@ static void stop(struct drm_crtc *crtc)
tilcdc_clear(dev, LCDC_RASTER_CTRL_REG, LCDC_RASTER_ENABLE);
 }
 
+static void tilcdc_crtc_dpms(struct drm_crtc *crtc, int mode);
 static void tilcdc_crtc_destroy(struct drm_crtc *crtc)
 {
struct tilcdc_crtc *tilcdc_crtc = to_tilcdc_crtc(crtc);
 
-   WARN_ON(tilcdc_crtc-dpms == DRM_MODE_DPMS_ON);
+   tilcdc_crtc_dpms(crtc, DRM_MODE_DPMS_OFF);
 
drm_crtc_cleanup(crtc);
drm_flip_work_cleanup(tilcdc_crtc-unref_work);
-- 
1.9.1

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[PATCH 18/24] clk: ti: omap2430: move clock support code under clock driver

[Tero Kristo]

With the legacy clock support gone, this is no longer needed under
platform code-base. Thus, move this under the TI clock driver, and
remove the exported API from the public header.

Signed-off-by: Tero Kristo t-kri...@ti.com
---
 arch/arm/mach-omap2/Makefile|1 -
 arch/arm/mach-omap2/clock2430.c |   57 ---
 drivers/clk/ti/clkt_iclk.c  |   35 
 drivers/clk/ti/clock.h  |1 +
 include/linux/clk/ti.h  |1 -
 5 files changed, 36 insertions(+), 59 deletions(-)
 delete mode 100644 arch/arm/mach-omap2/clock2430.c

diff --git a/arch/arm/mach-omap2/Makefile b/arch/arm/mach-omap2/Makefile
index ebfc3f6..967833b 100644
--- a/arch/arm/mach-omap2/Makefile
+++ b/arch/arm/mach-omap2/Makefile
@@ -185,7 +185,6 @@ obj-$(CONFIG_ARCH_OMAP2)+= $(clock-common)
 obj-$(CONFIG_ARCH_OMAP2)   += clkt2xxx_dpllcore.o
 obj-$(CONFIG_ARCH_OMAP2)   += clkt2xxx_virt_prcm_set.o
 obj-$(CONFIG_ARCH_OMAP2)   += clkt2xxx_dpll.o
-obj-$(CONFIG_SOC_OMAP2430) += clock2430.o
 obj-$(CONFIG_ARCH_OMAP3)   += $(clock-common)
 obj-$(CONFIG_ARCH_OMAP3)   += clock34xx.o clkt34xx_dpll3m2.o
 obj-$(CONFIG_ARCH_OMAP3)   += clock3517.o
diff --git a/arch/arm/mach-omap2/clock2430.c b/arch/arm/mach-omap2/clock2430.c
deleted file mode 100644
index cef0c8d..000
--- a/arch/arm/mach-omap2/clock2430.c
+++ /dev/null
@@ -1,57 +0,0 @@
-/*
- * clock2430.c - OMAP2430-specific clock integration code
- *
- * Copyright (C) 2005-2008 Texas Instruments, Inc.
- * Copyright (C) 2004-2010 Nokia Corporation
- *
- * Contacts:
- * Richard Woodruff r-woodru...@ti.com
- * Paul Walmsley
- *
- * Based on earlier work by Tuukka Tikkanen, Tony Lindgren,
- * Gordon McNutt and RidgeRun, Inc.
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
- */
-#undef DEBUG
-
-#include linux/kernel.h
-#include linux/clk.h
-#include linux/io.h
-
-#include soc.h
-#include iomap.h
-#include clock.h
-#include clock2xxx.h
-#include cm2xxx.h
-#include cm-regbits-24xx.h
-
-/**
- * omap2430_clk_i2chs_find_idlest - return CM_IDLEST info for 2430 I2CHS
- * @clk: struct clk * being enabled
- * @idlest_reg: void __iomem ** to store CM_IDLEST reg address into
- * @idlest_bit: pointer to a u8 to store the CM_IDLEST bit shift into
- * @idlest_val: pointer to a u8 to store the CM_IDLEST indicator
- *
- * OMAP2430 I2CHS CM_IDLEST bits are in CM_IDLEST1_CORE, but the
- * CM_*CLKEN bits are in CM_{I,F}CLKEN2_CORE.  This custom function
- * passes back the correct CM_IDLEST register address for I2CHS
- * modules.  No return value.
- */
-static void omap2430_clk_i2chs_find_idlest(struct clk_hw_omap *clk,
-  void __iomem **idlest_reg,
-  u8 *idlest_bit,
-  u8 *idlest_val)
-{
-   *idlest_reg = OMAP2430_CM_REGADDR(CORE_MOD, CM_IDLEST);
-   *idlest_bit = clk-enable_bit;
-   *idlest_val = OMAP24XX_CM_IDLEST_VAL;
-}
-
-/* 2430 I2CHS has non-standard IDLEST register */
-const struct clk_hw_omap_ops clkhwops_omap2430_i2chs_wait = {
-   .find_idlest= omap2430_clk_i2chs_find_idlest,
-   .find_companion = omap2_clk_dflt_find_companion,
-};
diff --git a/drivers/clk/ti/clkt_iclk.c b/drivers/clk/ti/clkt_iclk.c
index a03919d..38c3690 100644
--- a/drivers/clk/ti/clkt_iclk.c
+++ b/drivers/clk/ti/clkt_iclk.c
@@ -18,8 +18,12 @@
 #include clock.h
 
 /* Register offsets */
+#define OMAP24XX_CM_FCLKEN20x04
 #define CM_AUTOIDLE0x30
 #define CM_ICLKEN  0x10
+#define CM_IDLEST  0x20
+
+#define OMAP24XX_CM_IDLEST_VAL 0
 
 /* Private functions */
 
@@ -51,6 +55,31 @@ void omap2_clkt_iclk_deny_idle(struct clk_hw_omap *clk)
ti_clk_ll_ops-clk_writel(v, r);
 }
 
+/**
+ * omap2430_clk_i2chs_find_idlest - return CM_IDLEST info for 2430 I2CHS
+ * @clk: struct clk * being enabled
+ * @idlest_reg: void __iomem ** to store CM_IDLEST reg address into
+ * @idlest_bit: pointer to a u8 to store the CM_IDLEST bit shift into
+ * @idlest_val: pointer to a u8 to store the CM_IDLEST indicator
+ *
+ * OMAP2430 I2CHS CM_IDLEST bits are in CM_IDLEST1_CORE, but the
+ * CM_*CLKEN bits are in CM_{I,F}CLKEN2_CORE.  This custom function
+ * passes back the correct CM_IDLEST register address for I2CHS
+ * modules.  No return value.
+ */
+static void omap2430_clk_i2chs_find_idlest(struct clk_hw_omap *clk,
+  void __iomem **idlest_reg,
+  u8 *idlest_bit,
+  u8 *idlest_val)
+{
+   u32 r;
+
+   r = ((__force u32)clk-enable_reg ^ (OMAP24XX_CM_FCLKEN2 ^ CM_IDLEST));
+   *idlest_reg = (__force void 

[PATCH 23/24] clk: ti: move some public definitions to private header

[Tero Kristo]

Several exported TI clock driver features are no longer needed outside
the clock driver itself, thus move all of these to the driver private
header file. Also, update some of the driver files to actually include
this header.

Signed-off-by: Tero Kristo t-kri...@ti.com
---
 drivers/clk/ti/apll.c |2 ++
 drivers/clk/ti/autoidle.c |2 ++
 drivers/clk/ti/clk-43xx.c |2 ++
 drivers/clk/ti/clk-44xx.c |2 ++
 drivers/clk/ti/clk-54xx.c |2 ++
 drivers/clk/ti/clk-7xx.c  |3 ++-
 drivers/clk/ti/clock.h|   47 +
 include/linux/clk/ti.h|   45 ---
 8 files changed, 59 insertions(+), 46 deletions(-)

diff --git a/drivers/clk/ti/apll.c b/drivers/clk/ti/apll.c
index 72d9727..98e3a69 100644
--- a/drivers/clk/ti/apll.c
+++ b/drivers/clk/ti/apll.c
@@ -27,6 +27,8 @@
 #include linux/clk/ti.h
 #include linux/delay.h
 
+#include clock.h
+
 #define APLL_FORCE_LOCK 0x1
 #define APLL_AUTO_IDLE 0x2
 #define MAX_APLL_WAIT_TRIES100
diff --git a/drivers/clk/ti/autoidle.c b/drivers/clk/ti/autoidle.c
index 7f4010d..d58af4b 100644
--- a/drivers/clk/ti/autoidle.c
+++ b/drivers/clk/ti/autoidle.c
@@ -22,6 +22,8 @@
 #include linux/of_address.h
 #include linux/clk/ti.h
 
+#include clock.h
+
 struct clk_ti_autoidle {
void __iomem*reg;
u8  shift;
diff --git a/drivers/clk/ti/clk-43xx.c b/drivers/clk/ti/clk-43xx.c
index 3795fce..8943167 100644
--- a/drivers/clk/ti/clk-43xx.c
+++ b/drivers/clk/ti/clk-43xx.c
@@ -19,6 +19,8 @@
 #include linux/clk-provider.h
 #include linux/clk/ti.h
 
+#include clock.h
+
 static struct ti_dt_clk am43xx_clks[] = {
DT_CLK(NULL, clk_32768_ck, clk_32768_ck),
DT_CLK(NULL, clk_rc32k_ck, clk_rc32k_ck),
diff --git a/drivers/clk/ti/clk-44xx.c b/drivers/clk/ti/clk-44xx.c
index 4f4c877..9978255 100644
--- a/drivers/clk/ti/clk-44xx.c
+++ b/drivers/clk/ti/clk-44xx.c
@@ -16,6 +16,8 @@
 #include linux/clkdev.h
 #include linux/clk/ti.h
 
+#include clock.h
+
 /*
  * OMAP4 ABE DPLL default frequency. In OMAP4460 TRM version V, section
  * 3.6.3.2.3 CM1_ABE Clock Generator states that the DPLL_ABE_X2_CLK
diff --git a/drivers/clk/ti/clk-54xx.c b/drivers/clk/ti/clk-54xx.c
index 14160b2..76a9ccb 100644
--- a/drivers/clk/ti/clk-54xx.c
+++ b/drivers/clk/ti/clk-54xx.c
@@ -17,6 +17,8 @@
 #include linux/io.h
 #include linux/clk/ti.h
 
+#include clock.h
+
 #define OMAP5_DPLL_ABE_DEFFREQ 98304000
 
 /*
diff --git a/drivers/clk/ti/clk-7xx.c b/drivers/clk/ti/clk-7xx.c
index ee32f4de..b1d4d0d 100644
--- a/drivers/clk/ti/clk-7xx.c
+++ b/drivers/clk/ti/clk-7xx.c
@@ -16,11 +16,12 @@
 #include linux/clkdev.h
 #include linux/clk/ti.h
 
+#include clock.h
+
 #define DRA7_DPLL_ABE_DEFFREQ  180633600
 #define DRA7_DPLL_GMAC_DEFFREQ 10
 #define DRA7_DPLL_USB_DEFFREQ  96000
 
-
 static struct ti_dt_clk dra7xx_clks[] = {
DT_CLK(NULL, atl_clkin0_ck, atl_clkin0_ck),
DT_CLK(NULL, atl_clkin1_ck, atl_clkin1_ck),
diff --git a/drivers/clk/ti/clock.h b/drivers/clk/ti/clock.h
index 0ca5a36..3c43125 100644
--- a/drivers/clk/ti/clock.h
+++ b/drivers/clk/ti/clock.h
@@ -154,6 +154,35 @@ struct ti_clk_dpll {
u8 recal_st_bit;
 };
 
+/* Composite clock component types */
+enum {
+   CLK_COMPONENT_TYPE_GATE = 0,
+   CLK_COMPONENT_TYPE_DIVIDER,
+   CLK_COMPONENT_TYPE_MUX,
+   CLK_COMPONENT_TYPE_MAX,
+};
+
+/**
+ * struct ti_dt_clk - OMAP DT clock alias declarations
+ * @lk: clock lookup definition
+ * @node_name: clock DT node to map to
+ */
+struct ti_dt_clk {
+   struct clk_lookup   lk;
+   char*node_name;
+};
+
+#define DT_CLK(dev, con, name) \
+   {   \
+   .lk = { \
+   .dev_id = dev,  \
+   .con_id = con,  \
+   },  \
+   .node_name = name,  \
+   }
+
+typedef void (*ti_of_clk_init_cb_t)(struct clk_hw *, struct device_node *);
+
 struct clk *ti_clk_register_gate(struct ti_clk *setup);
 struct clk *ti_clk_register_interface(struct ti_clk *setup);
 struct clk *ti_clk_register_mux(struct ti_clk *setup);
@@ -169,6 +198,12 @@ void ti_clk_patch_legacy_clks(struct ti_clk **patch);
 struct clk *ti_clk_register_clk(struct ti_clk *setup);
 int ti_clk_register_legacy_clks(struct ti_clk_alias *clks);
 
+void __iomem *ti_clk_get_reg_addr(struct device_node *node, int index);
+void ti_dt_clocks_register(struct ti_dt_clk *oclks);
+int ti_clk_retry_init(struct device_node *node, struct clk_hw *hw,
+ ti_of_clk_init_cb_t func);
+int ti_clk_add_component(struct device_node *node, struct clk_hw *hw, int 
type);
+
 void omap2_init_clk_hw_omap_clocks(struct clk *clk);
 int of_ti_clk_autoidle_setup(struct device_node *node);
 void 

[PATCH 10/24] clk: ti: move omap2_clk_enable_init_clocks under clock driver

[Tero Kristo]

This is no longer used outside clock driver, so move it under the driver
and remove the export for it from the global header file.

Signed-off-by: Tero Kristo t-kri...@ti.com
---
 arch/arm/mach-omap2/clock.c |   24 
 drivers/clk/ti/clk-2xxx.c   |2 ++
 drivers/clk/ti/clk-33xx.c   |2 ++
 drivers/clk/ti/clk-3xxx.c   |1 +
 drivers/clk/ti/clk-816x.c   |2 ++
 drivers/clk/ti/clk.c|   24 
 drivers/clk/ti/clock.h  |1 +
 include/linux/clk/ti.h  |1 -
 8 files changed, 32 insertions(+), 25 deletions(-)

diff --git a/arch/arm/mach-omap2/clock.c b/arch/arm/mach-omap2/clock.c
index 99f1dc5..720c2bc 100644
--- a/arch/arm/mach-omap2/clock.c
+++ b/arch/arm/mach-omap2/clock.c
@@ -494,30 +494,6 @@ static int __init omap_clk_setup(char *str)
 }
 __setup(mpurate=, omap_clk_setup);
 
-/**
- * omap2_clk_enable_init_clocks - prepare  enable a list of clocks
- * @clk_names: ptr to an array of strings of clock names to enable
- * @num_clocks: number of clock names in @clk_names
- *
- * Prepare and enable a list of clocks, named by @clk_names.  No
- * return value. XXX Deprecated; only needed until these clocks are
- * properly claimed and enabled by the drivers or core code that uses
- * them.  XXX What code disables  calls clk_put on these clocks?
- */
-void omap2_clk_enable_init_clocks(const char **clk_names, u8 num_clocks)
-{
-   struct clk *init_clk;
-   int i;
-
-   for (i = 0; i  num_clocks; i++) {
-   init_clk = clk_get(NULL, clk_names[i]);
-   if (WARN(IS_ERR(init_clk), could not find init clock %s\n,
-   clk_names[i]))
-   continue;
-   clk_prepare_enable(init_clk);
-   }
-}
-
 const struct clk_hw_omap_ops clkhwops_wait = {
.find_idlest= omap2_clk_dflt_find_idlest,
.find_companion = omap2_clk_dflt_find_companion,
diff --git a/drivers/clk/ti/clk-2xxx.c b/drivers/clk/ti/clk-2xxx.c
index c808ab3..bd8790b 100644
--- a/drivers/clk/ti/clk-2xxx.c
+++ b/drivers/clk/ti/clk-2xxx.c
@@ -19,6 +19,8 @@
 #include linux/clk-provider.h
 #include linux/clk/ti.h
 
+#include clock.h
+
 static struct ti_dt_clk omap2xxx_clks[] = {
DT_CLK(NULL, func_32k_ck, func_32k_ck),
DT_CLK(NULL, secure_32k_ck, secure_32k_ck),
diff --git a/drivers/clk/ti/clk-33xx.c b/drivers/clk/ti/clk-33xx.c
index 028b337..733f9d3 100644
--- a/drivers/clk/ti/clk-33xx.c
+++ b/drivers/clk/ti/clk-33xx.c
@@ -19,6 +19,8 @@
 #include linux/clk-provider.h
 #include linux/clk/ti.h
 
+#include clock.h
+
 static struct ti_dt_clk am33xx_clks[] = {
DT_CLK(NULL, clk_32768_ck, clk_32768_ck),
DT_CLK(NULL, clk_rc32k_ck, clk_rc32k_ck),
diff --git a/drivers/clk/ti/clk-3xxx.c b/drivers/clk/ti/clk-3xxx.c
index 383a06e..c0da0b0 100644
--- a/drivers/clk/ti/clk-3xxx.c
+++ b/drivers/clk/ti/clk-3xxx.c
@@ -19,6 +19,7 @@
 #include linux/clk-provider.h
 #include linux/clk/ti.h
 
+#include clock.h
 
 static struct ti_dt_clk omap3xxx_clks[] = {
DT_CLK(NULL, apb_pclk, dummy_apb_pclk),
diff --git a/drivers/clk/ti/clk-816x.c b/drivers/clk/ti/clk-816x.c
index 9451e65..c69352b 100644
--- a/drivers/clk/ti/clk-816x.c
+++ b/drivers/clk/ti/clk-816x.c
@@ -14,6 +14,8 @@
 #include linux/clk-provider.h
 #include linux/clk/ti.h
 
+#include clock.h
+
 static struct ti_dt_clk dm816x_clks[] = {
DT_CLK(NULL, sys_clkin, sys_clkin_ck),
DT_CLK(NULL, timer_sys_ck, sys_clkin_ck),
diff --git a/drivers/clk/ti/clk.c b/drivers/clk/ti/clk.c
index 6d4e381..1b28086 100644
--- a/drivers/clk/ti/clk.c
+++ b/drivers/clk/ti/clk.c
@@ -334,4 +334,28 @@ struct ti_clk_features *ti_clk_get_features(void)
 {
return ti_clk_features;
 }
+
+/**
+ * omap2_clk_enable_init_clocks - prepare  enable a list of clocks
+ * @clk_names: ptr to an array of strings of clock names to enable
+ * @num_clocks: number of clock names in @clk_names
+ *
+ * Prepare and enable a list of clocks, named by @clk_names.  No
+ * return value. XXX Deprecated; only needed until these clocks are
+ * properly claimed and enabled by the drivers or core code that uses
+ * them.  XXX What code disables  calls clk_put on these clocks?
+ */
+void omap2_clk_enable_init_clocks(const char **clk_names, u8 num_clocks)
+{
+   struct clk *init_clk;
+   int i;
+
+   for (i = 0; i  num_clocks; i++) {
+   init_clk = clk_get(NULL, clk_names[i]);
+   if (WARN(IS_ERR(init_clk), could not find init clock %s\n,
+clk_names[i]))
+   continue;
+   clk_prepare_enable(init_clk);
+   }
+}
 #endif
diff --git a/drivers/clk/ti/clock.h b/drivers/clk/ti/clock.h
index 9b51021..4b26af8 100644
--- a/drivers/clk/ti/clock.h
+++ b/drivers/clk/ti/clock.h
@@ -171,6 +171,7 @@ int ti_clk_register_legacy_clks(struct ti_clk_alias *clks);
 
 void omap2_init_clk_hw_omap_clocks(struct clk *clk);
 int of_ti_clk_autoidle_setup(struct device_node *node);
+void 

[PATCH 14/24] clk: ti: dpll: move omap3 DPLL functionality to clock driver

[Tero Kristo]

With the legacy clock support gone, OMAP3 generic DPLL code can now be
moved over to the clock driver also. A few un-unused clkoutx2 functions
are also removed at the same time.

Signed-off-by: Tero Kristo t-kri...@ti.com
---
 arch/arm/mach-omap2/Makefile|8 +-
 arch/arm/mach-omap2/clock.h |4 -
 arch/arm/mach-omap2/clock3xxx.c |   77 
 arch/arm/mach-omap2/dpll3xxx.c  |  818 --
 drivers/clk/ti/Makefile |2 +-
 drivers/clk/ti/clk-3xxx.c   |   31 ++
 drivers/clk/ti/clock.h  |   27 ++
 drivers/clk/ti/dpll3xxx.c   |  825 +++
 include/linux/clk/ti.h  |   30 --
 9 files changed, 886 insertions(+), 936 deletions(-)
 delete mode 100644 arch/arm/mach-omap2/dpll3xxx.c
 create mode 100644 drivers/clk/ti/dpll3xxx.c

diff --git a/arch/arm/mach-omap2/Makefile b/arch/arm/mach-omap2/Makefile
index f3fe7ae..2c8b36d 100644
--- a/arch/arm/mach-omap2/Makefile
+++ b/arch/arm/mach-omap2/Makefile
@@ -189,15 +189,11 @@ obj-$(CONFIG_SOC_OMAP2430)+= clock2430.o
 obj-$(CONFIG_ARCH_OMAP3)   += $(clock-common) clock3xxx.o
 obj-$(CONFIG_ARCH_OMAP3)   += clock34xx.o clkt34xx_dpll3m2.o
 obj-$(CONFIG_ARCH_OMAP3)   += clock3517.o
-obj-$(CONFIG_ARCH_OMAP3)   += dpll3xxx.o
 obj-$(CONFIG_ARCH_OMAP4)   += $(clock-common)
-obj-$(CONFIG_ARCH_OMAP4)   += dpll3xxx.o
-obj-$(CONFIG_SOC_AM33XX)   += $(clock-common) dpll3xxx.o
+obj-$(CONFIG_SOC_AM33XX)   += $(clock-common)
 obj-$(CONFIG_SOC_OMAP5)+= $(clock-common)
-obj-$(CONFIG_SOC_OMAP5)+= dpll3xxx.o
 obj-$(CONFIG_SOC_DRA7XX)   += $(clock-common)
-obj-$(CONFIG_SOC_DRA7XX)   += dpll3xxx.o
-obj-$(CONFIG_SOC_AM43XX)   += $(clock-common) dpll3xxx.o
+obj-$(CONFIG_SOC_AM43XX)   += $(clock-common)
 
 # OMAP2 clock rate set data (old OPP data)
 obj-$(CONFIG_SOC_OMAP2420) += opp2420_data.o
diff --git a/arch/arm/mach-omap2/clock.h b/arch/arm/mach-omap2/clock.h
index 5de3786..c224719 100644
--- a/arch/arm/mach-omap2/clock.h
+++ b/arch/arm/mach-omap2/clock.h
@@ -180,10 +180,6 @@ struct clksel {
 #define OMAP4XXX_EN_DPLL_FRBYPASS  0x6
 #define OMAP4XXX_EN_DPLL_LOCKED0x7
 
-u32 omap3_dpll_autoidle_read(struct clk_hw_omap *clk);
-void omap3_dpll_allow_idle(struct clk_hw_omap *clk);
-void omap3_dpll_deny_idle(struct clk_hw_omap *clk);
-
 void __init omap2_clk_disable_clkdm_control(void);
 
 void omap2_clk_print_new_rates(const char *hfclkin_ck_name,
diff --git a/arch/arm/mach-omap2/clock3xxx.c b/arch/arm/mach-omap2/clock3xxx.c
index 4bd6122..0b0e3a87 100644
--- a/arch/arm/mach-omap2/clock3xxx.c
+++ b/arch/arm/mach-omap2/clock3xxx.c
@@ -29,82 +29,5 @@
 #include cm2xxx_3xxx.h
 #include cm-regbits-34xx.h
 
-/*
- * DPLL5_FREQ_FOR_USBHOST: USBHOST and USBTLL are the only clocks
- * that are sourced by DPLL5, and both of these require this clock
- * to be at 120 MHz for proper operation.
- */
-#define DPLL5_FREQ_FOR_USBHOST 12000
-
 /* needed by omap3_core_dpll_m2_set_rate() */
 struct clk *sdrc_ick_p, *arm_fck_p;
-
-/**
- * omap3_dpll4_set_rate - set rate for omap3 per-dpll
- * @hw: clock to change
- * @rate: target rate for clock
- * @parent_rate: rate of the parent clock
- *
- * Check if the current SoC supports the per-dpll reprogram operation
- * or not, and then do the rate change if supported. Returns -EINVAL
- * if not supported, 0 for success, and potential error codes from the
- * clock rate change.
- */
-int omap3_dpll4_set_rate(struct clk_hw *hw, unsigned long rate,
-   unsigned long parent_rate)
-{
-   /*
-* According to the 12-5 CDP code from TI, Limitation 2.5
-* on 3430ES1 prevents us from changing DPLL multipliers or dividers
-* on DPLL4.
-*/
-   if (ti_clk_get_features()-flags  TI_CLK_DPLL4_DENY_REPROGRAM) {
-   pr_err(clock: DPLL4 cannot change rate due to silicon 
'Limitation 2.5' on 3430ES1.\n);
-   return -EINVAL;
-   }
-
-   return omap3_noncore_dpll_set_rate(hw, rate, parent_rate);
-}
-
-/**
- * omap3_dpll4_set_rate_and_parent - set rate and parent for omap3 per-dpll
- * @hw: clock to change
- * @rate: target rate for clock
- * @parent_rate: rate of the parent clock
- * @index: parent index, 0 - reference clock, 1 - bypass clock
- *
- * Check if the current SoC support the per-dpll reprogram operation
- * or not, and then do the rate + parent change if supported. Returns
- * -EINVAL if not supported, 0 for success, and potential error codes
- * from the clock rate change.
- */
-int omap3_dpll4_set_rate_and_parent(struct clk_hw *hw, unsigned long rate,
-   unsigned long parent_rate, u8 index)
-{
-   if (ti_clk_get_features()-flags  TI_CLK_DPLL4_DENY_REPROGRAM) {
-   

[PATCH 22/24] clk: ti: am3517: move remaining am3517 clock support code to clock driver

[Tero Kristo]

With legacy clock support gone, this is no longer needed under platform,
so move it under the clock driver itself. Make some exports be driver
internal definitions at the same time.

Signed-off-by: Tero Kristo t-kri...@ti.com
---
 arch/arm/mach-omap2/Makefile|1 -
 arch/arm/mach-omap2/clock3517.c |  118 ---
 arch/arm/mach-omap2/clock3517.h |   14 -
 drivers/clk/ti/clk-3xxx.c   |   94 +++
 drivers/clk/ti/clock.h  |2 +
 include/linux/clk/ti.h  |2 -
 6 files changed, 96 insertions(+), 135 deletions(-)
 delete mode 100644 arch/arm/mach-omap2/clock3517.c
 delete mode 100644 arch/arm/mach-omap2/clock3517.h

diff --git a/arch/arm/mach-omap2/Makefile b/arch/arm/mach-omap2/Makefile
index 9ee4395..7693456 100644
--- a/arch/arm/mach-omap2/Makefile
+++ b/arch/arm/mach-omap2/Makefile
@@ -187,7 +187,6 @@ obj-$(CONFIG_ARCH_OMAP2)+= 
clkt2xxx_virt_prcm_set.o
 obj-$(CONFIG_ARCH_OMAP2)   += clkt2xxx_dpll.o
 obj-$(CONFIG_ARCH_OMAP3)   += $(clock-common)
 obj-$(CONFIG_ARCH_OMAP3)   += clkt34xx_dpll3m2.o
-obj-$(CONFIG_ARCH_OMAP3)   += clock3517.o
 obj-$(CONFIG_ARCH_OMAP4)   += $(clock-common)
 obj-$(CONFIG_SOC_AM33XX)   += $(clock-common)
 obj-$(CONFIG_SOC_OMAP5)+= $(clock-common)
diff --git a/arch/arm/mach-omap2/clock3517.c b/arch/arm/mach-omap2/clock3517.c
deleted file mode 100644
index 4d79ae2..000
--- a/arch/arm/mach-omap2/clock3517.c
+++ /dev/null
@@ -1,118 +0,0 @@
-/*
- * OMAP3517/3505-specific clock framework functions
- *
- * Copyright (C) 2010 Texas Instruments, Inc.
- * Copyright (C) 2011 Nokia Corporation
- *
- * Ranjith Lohithakshan
- * Paul Walmsley
- *
- * Parts of this code are based on code written by
- * Richard Woodruff, Tony Lindgren, Tuukka Tikkanen, Karthik Dasu,
- * Russell King
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
- */
-#undef DEBUG
-
-#include linux/kernel.h
-#include linux/clk.h
-#include linux/io.h
-
-#include clock.h
-#include clock3517.h
-#include cm3xxx.h
-#include cm-regbits-34xx.h
-
-/*
- * In AM35xx IPSS, the {ICK,FCK} enable bits for modules are exported
- * in the same register at a bit offset of 0x8. The EN_ACK for ICK is
- * at an offset of 4 from ICK enable bit.
- */
-#define AM35XX_IPSS_ICK_MASK   0xF
-#define AM35XX_IPSS_ICK_EN_ACK_OFFSET  0x4
-#define AM35XX_IPSS_ICK_FCK_OFFSET 0x8
-#define AM35XX_IPSS_CLK_IDLEST_VAL 0
-
-/**
- * am35xx_clk_find_idlest - return clock ACK info for AM35XX IPSS
- * @clk: struct clk * being enabled
- * @idlest_reg: void __iomem ** to store CM_IDLEST reg address into
- * @idlest_bit: pointer to a u8 to store the CM_IDLEST bit shift into
- * @idlest_val: pointer to a u8 to store the CM_IDLEST indicator
- *
- * The interface clocks on AM35xx IPSS reflects the clock idle status
- * in the enable register itsel at a bit offset of 4 from the enable
- * bit. A value of 1 indicates that clock is enabled.
- */
-static void am35xx_clk_find_idlest(struct clk_hw_omap *clk,
-   void __iomem **idlest_reg,
-   u8 *idlest_bit,
-   u8 *idlest_val)
-{
-   *idlest_reg = (__force void __iomem *)(clk-enable_reg);
-   *idlest_bit = clk-enable_bit + AM35XX_IPSS_ICK_EN_ACK_OFFSET;
-   *idlest_val = AM35XX_IPSS_CLK_IDLEST_VAL;
-}
-
-/**
- * am35xx_clk_find_companion - find companion clock to @clk
- * @clk: struct clk * to find the companion clock of
- * @other_reg: void __iomem ** to return the companion clock CM_*CLKEN va in
- * @other_bit: u8 ** to return the companion clock bit shift in
- *
- * Some clocks don't have companion clocks.  For example, modules with
- * only an interface clock (such as HECC) don't have a companion
- * clock.  Right now, this code relies on the hardware exporting a bit
- * in the correct companion register that indicates that the
- * nonexistent 'companion clock' is active.  Future patches will
- * associate this type of code with per-module data structures to
- * avoid this issue, and remove the casts.  No return value.
- */
-static void am35xx_clk_find_companion(struct clk_hw_omap *clk,
- void __iomem **other_reg,
- u8 *other_bit)
-{
-   *other_reg = (__force void __iomem *)(clk-enable_reg);
-   if (clk-enable_bit  AM35XX_IPSS_ICK_MASK)
-   *other_bit = clk-enable_bit + AM35XX_IPSS_ICK_FCK_OFFSET;
-   else
-   *other_bit = clk-enable_bit - AM35XX_IPSS_ICK_FCK_OFFSET;
-}
-const struct clk_hw_omap_ops clkhwops_am35xx_ipss_module_wait = {
-   .find_idlest= am35xx_clk_find_idlest,
-   

[PATCH 21/24] ARM: OMAP4: clock: remove clock44xx.h header

[Tero Kristo]

This is not needed for anything anymore, so remove it completely.

Signed-off-by: Tero Kristo t-kri...@ti.com
---
 arch/arm/mach-omap2/clock44xx.h |   20 
 arch/arm/mach-omap2/io.c|1 -
 2 files changed, 21 deletions(-)
 delete mode 100644 arch/arm/mach-omap2/clock44xx.h

diff --git a/arch/arm/mach-omap2/clock44xx.h b/arch/arm/mach-omap2/clock44xx.h
deleted file mode 100644
index 287a46f..000
--- a/arch/arm/mach-omap2/clock44xx.h
+++ /dev/null
@@ -1,20 +0,0 @@
-/*
- * OMAP4 clock function prototypes and macros
- *
- * Copyright (C) 2009 Texas Instruments, Inc.
- * Copyright (C) 2010 Nokia Corporation
- */
-
-#ifndef __ARCH_ARM_MACH_OMAP2_CLOCK44XX_H
-#define __ARCH_ARM_MACH_OMAP2_CLOCK44XX_H
-
-/*
- * OMAP4430_REGM4XEN_MULT: If the CM_CLKMODE_DPLL_ABE.DPLL_REGM4XEN bit is
- *set, then the DPLL's lock frequency is multiplied by 4 (OMAP4430 TRM
- *vV Section 3.6.3.3.1 DPLLs Output Clocks Parameters)
- */
-#define OMAP4430_REGM4XEN_MULT 4
-
-int omap4xxx_clk_init(void);
-
-#endif
diff --git a/arch/arm/mach-omap2/io.c b/arch/arm/mach-omap2/io.c
index c4871c5..ede2229 100644
--- a/arch/arm/mach-omap2/io.c
+++ b/arch/arm/mach-omap2/io.c
@@ -37,7 +37,6 @@
 #include clock.h
 #include clock2xxx.h
 #include clock3xxx.h
-#include clock44xx.h
 #include omap-pm.h
 #include sdrc.h
 #include control.h
-- 
1.7.9.5

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[PATCH 13/24] ARM: OMAP2+: clock: add support for specific CM ops to ti_clk_ll_ops

[Tero Kristo]

Clock driver requires access to some CM API functions once the code
is being moved under the clock driver from the platform directory.
Gate type clock requires access to cm_wait_module_ready and
cm_split_idlest_reg functions, which are both used for waiting until
the module being clocked has been successfully activated. These CM
APIs are now exported through the ti_clk_ll_ops struct.

Signed-off-by: Tero Kristo t-kri...@ti.com
---
 arch/arm/mach-omap2/prm_common.c |2 ++
 include/linux/clk/ti.h   |6 ++
 2 files changed, 8 insertions(+)

diff --git a/arch/arm/mach-omap2/prm_common.c b/arch/arm/mach-omap2/prm_common.c
index 6fcb932..b9ad113 100644
--- a/arch/arm/mach-omap2/prm_common.c
+++ b/arch/arm/mach-omap2/prm_common.c
@@ -626,6 +626,8 @@ static struct ti_clk_ll_ops omap_clk_ll_ops = {
.clk_writel = prm_clk_writel,
.clkdm_clk_enable = clkdm_clk_enable,
.clkdm_clk_disable = clkdm_clk_disable,
+   .cm_wait_module_ready = omap_cm_wait_module_ready,
+   .cm_split_idlest_reg = cm_split_idlest_reg,
 };
 
 int __init of_prcm_init(void)
diff --git a/include/linux/clk/ti.h b/include/linux/clk/ti.h
index 4778783..339cc38 100644
--- a/include/linux/clk/ti.h
+++ b/include/linux/clk/ti.h
@@ -243,6 +243,8 @@ struct clk_omap_reg {
  * @clk_writel: pointer to register write function
  * @clkdm_clk_enable: pointer to clockdomain enable function
  * @clkdm_clk_disable: pointer to clockdomain disable function
+ * @cm_wait_module_ready: pointer to CM module wait ready function
+ * @cm_split_idlest_reg: pointer to CM module function to split idlest reg
  *
  * Low-level ops are generally used by the basic clock types (clk-gate,
  * clk-mux, clk-divider etc.) to provide support for various low-level
@@ -256,6 +258,10 @@ struct ti_clk_ll_ops {
int (*clkdm_clk_enable)(struct clockdomain *clkdm, struct clk *clk);
int (*clkdm_clk_disable)(struct clockdomain *clkdm,
 struct clk *clk);
+   int (*cm_wait_module_ready)(u8 part, s16 prcm_mod, u16 idlest_reg,
+   u8 idlest_shift);
+   int (*cm_split_idlest_reg)(void __iomem *idlest_reg, s16 *prcm_inst,
+  u8 *idlest_reg_id);
 };
 
 extern struct ti_clk_ll_ops *ti_clk_ll_ops;
-- 
1.7.9.5

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[PATCH 19/24] clk: ti: clkdm: move clkdm gate clock support code to clock driver

[Tero Kristo]

With the legacy clock data gone, this is no longer needed under platform,
so move it under the clock driver itself. Remove the exported clock driver
APIs as well, as these are not needed outside clock driver anymore.

Signed-off-by: Tero Kristo t-kri...@ti.com
---
 arch/arm/mach-omap2/clock.c  |   76 --
 arch/arm/mach-omap2/clock.h  |3 --
 drivers/clk/ti/clock.h   |3 ++
 drivers/clk/ti/clockdomain.c |   76 ++
 include/linux/clk/ti.h   |2 --
 5 files changed, 79 insertions(+), 81 deletions(-)

diff --git a/arch/arm/mach-omap2/clock.c b/arch/arm/mach-omap2/clock.c
index efa09bc..944ad5f 100644
--- a/arch/arm/mach-omap2/clock.c
+++ b/arch/arm/mach-omap2/clock.c
@@ -116,82 +116,6 @@ void omap2_init_clk_clkdm(struct clk_hw *hw)
}
 }
 
-/**
- * omap2_clkops_enable_clkdm - increment usecount on clkdm of @hw
- * @hw: struct clk_hw * of the clock being enabled
- *
- * Increment the usecount of the clockdomain of the clock pointed to
- * by @hw; if the usecount is 1, the clockdomain will be enabled.
- * Only needed for clocks that don't use omap2_dflt_clk_enable() as
- * their enable function pointer.  Passes along the return value of
- * clkdm_clk_enable(), -EINVAL if @hw is not associated with a
- * clockdomain, or 0 if clock framework-based clockdomain control is
- * not implemented.
- */
-int omap2_clkops_enable_clkdm(struct clk_hw *hw)
-{
-   struct clk_hw_omap *clk;
-   int ret = 0;
-
-   clk = to_clk_hw_omap(hw);
-
-   if (unlikely(!clk-clkdm)) {
-   pr_err(%s: %s: no clkdm set ?!\n, __func__,
-  __clk_get_name(hw-clk));
-   return -EINVAL;
-   }
-
-   if (unlikely(clk-enable_reg))
-   pr_err(%s: %s: should use dflt_clk_enable ?!\n, __func__,
-  __clk_get_name(hw-clk));
-
-   if (ti_clk_get_features()-flags  TI_CLK_DISABLE_CLKDM_CONTROL) {
-   pr_err(%s: %s: clkfw-based clockdomain control disabled ?!\n,
-  __func__, __clk_get_name(hw-clk));
-   return 0;
-   }
-
-   ret = clkdm_clk_enable(clk-clkdm, hw-clk);
-   WARN(ret, %s: could not enable %s's clockdomain %s: %d\n,
-__func__, __clk_get_name(hw-clk), clk-clkdm-name, ret);
-
-   return ret;
-}
-
-/**
- * omap2_clkops_disable_clkdm - decrement usecount on clkdm of @hw
- * @hw: struct clk_hw * of the clock being disabled
- *
- * Decrement the usecount of the clockdomain of the clock pointed to
- * by @hw; if the usecount is 0, the clockdomain will be disabled.
- * Only needed for clocks that don't use omap2_dflt_clk_disable() as their
- * disable function pointer.  No return value.
- */
-void omap2_clkops_disable_clkdm(struct clk_hw *hw)
-{
-   struct clk_hw_omap *clk;
-
-   clk = to_clk_hw_omap(hw);
-
-   if (unlikely(!clk-clkdm)) {
-   pr_err(%s: %s: no clkdm set ?!\n, __func__,
-  __clk_get_name(hw-clk));
-   return;
-   }
-
-   if (unlikely(clk-enable_reg))
-   pr_err(%s: %s: should use dflt_clk_disable ?!\n, __func__,
-  __clk_get_name(hw-clk));
-
-   if (ti_clk_get_features()-flags  TI_CLK_DISABLE_CLKDM_CONTROL) {
-   pr_err(%s: %s: clkfw-based clockdomain control disabled ?!\n,
-  __func__, __clk_get_name(hw-clk));
-   return;
-   }
-
-   clkdm_clk_disable(clk-clkdm, hw-clk);
-}
-
 static int __initdata mpurate;
 
 /*
diff --git a/arch/arm/mach-omap2/clock.h b/arch/arm/mach-omap2/clock.h
index f8282e8..3227acd 100644
--- a/arch/arm/mach-omap2/clock.h
+++ b/arch/arm/mach-omap2/clock.h
@@ -204,8 +204,5 @@ extern const struct clk_hw_omap_ops clkhwops_apll96;
 
 extern void __iomem *clk_memmaps[];
 
-extern int omap2_clkops_enable_clkdm(struct clk_hw *hw);
-extern void omap2_clkops_disable_clkdm(struct clk_hw *hw);
-
 void __init ti_clk_init_features(void);
 #endif
diff --git a/drivers/clk/ti/clock.h b/drivers/clk/ti/clock.h
index 3652c26..83476d1 100644
--- a/drivers/clk/ti/clock.h
+++ b/drivers/clk/ti/clock.h
@@ -180,6 +180,9 @@ extern const struct clk_hw_omap_ops clkhwops_iclk;
 extern const struct clk_hw_omap_ops clkhwops_iclk_wait;
 extern const struct clk_hw_omap_ops clkhwops_omap2430_i2chs_wait;
 
+int omap2_clkops_enable_clkdm(struct clk_hw *hw);
+void omap2_clkops_disable_clkdm(struct clk_hw *hw);
+
 int omap2_dflt_clk_enable(struct clk_hw *hw);
 void omap2_dflt_clk_disable(struct clk_hw *hw);
 int omap2_dflt_clk_is_enabled(struct clk_hw *hw);
diff --git a/drivers/clk/ti/clockdomain.c b/drivers/clk/ti/clockdomain.c
index b4c5fac..6206c3a 100644
--- a/drivers/clk/ti/clockdomain.c
+++ b/drivers/clk/ti/clockdomain.c
@@ -24,6 +24,82 @@
 #undef pr_fmt
 #define pr_fmt(fmt) %s:  fmt, __func__
 
+/**
+ * omap2_clkops_enable_clkdm - increment usecount on clkdm of @hw
+ * @hw: struct clk_hw * of the clock being enabled
+ *
+ * 

[PATCH 24/24] ARM: OMAP2+: clock: remove dead definitions from the clock header file

[Tero Kristo]

Cleanup the mess in clock.h by removing all definitions that are no longer
used for anything.

Signed-off-by: Tero Kristo t-kri...@ti.com
---
 arch/arm/mach-omap2/clkt34xx_dpll3m2.c |1 -
 arch/arm/mach-omap2/clock.h|  129 
 arch/arm/mach-omap2/clock34xx.h|   18 -
 3 files changed, 148 deletions(-)
 delete mode 100644 arch/arm/mach-omap2/clock34xx.h

diff --git a/arch/arm/mach-omap2/clkt34xx_dpll3m2.c 
b/arch/arm/mach-omap2/clkt34xx_dpll3m2.c
index 6cd2961..07e1956 100644
--- a/arch/arm/mach-omap2/clkt34xx_dpll3m2.c
+++ b/arch/arm/mach-omap2/clkt34xx_dpll3m2.c
@@ -23,7 +23,6 @@
 
 #include clock.h
 #include clock3xxx.h
-#include clock34xx.h
 #include sdrc.h
 #include sram.h
 
diff --git a/arch/arm/mach-omap2/clock.h b/arch/arm/mach-omap2/clock.h
index 3227acd..6250a07 100644
--- a/arch/arm/mach-omap2/clock.h
+++ b/arch/arm/mach-omap2/clock.h
@@ -23,90 +23,6 @@
 #include linux/clk-provider.h
 #include linux/clk/ti.h
 
-struct omap_clk {
-   u16 cpu;
-   struct clk_lookup   lk;
-};
-
-#define CLK(dev, con, ck)  \
-   {   \
-   .lk = { \
-   .dev_id = dev,  \
-   .con_id = con,  \
-   .clk = ck,  \
-   },  \
-   }
-
-struct clockdomain;
-
-#define DEFINE_STRUCT_CLK(_name, _parent_array_name, _clkops_name) \
-   static struct clk_core _name##_core = { \
-   .name = #_name, \
-   .hw = _name##_hw.hw,   \
-   .parent_names = _parent_array_name, \
-   .num_parents = ARRAY_SIZE(_parent_array_name),  \
-   .ops = _clkops_name,   \
-   };  \
-   static struct clk _name = { \
-   .core = _name##_core,  \
-   };
-
-#define DEFINE_STRUCT_CLK_FLAGS(_name, _parent_array_name, \
-   _clkops_name, _flags)   \
-   static struct clk_core _name##_core = { \
-   .name = #_name, \
-   .hw = _name##_hw.hw,   \
-   .parent_names = _parent_array_name, \
-   .num_parents = ARRAY_SIZE(_parent_array_name),  \
-   .ops = _clkops_name,   \
-   .flags = _flags,\
-   };  \
-   static struct clk _name = { \
-   .core = _name##_core,  \
-   };
-
-#define DEFINE_STRUCT_CLK_HW_OMAP(_name, _clkdm_name)  \
-   static struct clk_hw_omap _name##_hw = {\
-   .hw = { \
-   .clk = _name,  \
-   },  \
-   .clkdm_name = _clkdm_name,  \
-   };
-
-#define DEFINE_CLK_OMAP_MUX(_name, _clkdm_name, _clksel,   \
-   _clksel_reg, _clksel_mask,  \
-   _parent_names, _ops)\
-   static struct clk _name;\
-   static struct clk_hw_omap _name##_hw = {\
-   .hw = { \
-   .clk = _name,  \
-   },  \
-   .clksel = _clksel,  \
-   .clksel_reg = _clksel_reg,  \
-   .clksel_mask= _clksel_mask, \
-   .clkdm_name = _clkdm_name,  \
-   };  \
-   DEFINE_STRUCT_CLK(_name, _parent_names, _ops);
-
-#define DEFINE_CLK_OMAP_MUX_GATE(_name, _clkdm_name, _clksel,  \
-_clksel_reg, _clksel_mask, \
-_enable_reg, _enable_bit,  \
-_hwops, _parent_names, _ops)   \
-   static struct clk _name;\
-   static struct clk_hw_omap _name##_hw = {\
-   .hw = { \
-   .clk = _name,  \
-   },  \
-   .ops= _hwops,   \
-   .enable_reg = _enable_reg,  \
-   .enable_bit = 

[PATCH 12/24] ARM: OMAP2+: clock: add support for clkdm ops to the low level clk ops

[Tero Kristo]

Clock driver requires access to certain clockdomain handling ops once
the code is being moved over under clock driver. Example of this is
clk_enable / clk_disable under omap3 DPLL code. The required clkdm
APIs are now exported through the ti_clk_ll_ops struct.

Signed-off-by: Tero Kristo t-kri...@ti.com
---
 arch/arm/mach-omap2/prm_common.c |3 +++
 include/linux/clk/ti.h   |   16 +++-
 2 files changed, 14 insertions(+), 5 deletions(-)

diff --git a/arch/arm/mach-omap2/prm_common.c b/arch/arm/mach-omap2/prm_common.c
index bfaa7ba..6fcb932 100644
--- a/arch/arm/mach-omap2/prm_common.c
+++ b/arch/arm/mach-omap2/prm_common.c
@@ -37,6 +37,7 @@
 #include clock.h
 #include cm.h
 #include control.h
+#include clockdomain.h
 
 /*
  * OMAP_PRCM_MAX_NR_PENDING_REG: maximum number of PRM_IRQ*_MPU regs
@@ -623,6 +624,8 @@ static void prm_clk_writel(u32 val, void __iomem *reg)
 static struct ti_clk_ll_ops omap_clk_ll_ops = {
.clk_readl = prm_clk_readl,
.clk_writel = prm_clk_writel,
+   .clkdm_clk_enable = clkdm_clk_enable,
+   .clkdm_clk_disable = clkdm_clk_disable,
 };
 
 int __init of_prcm_init(void)
diff --git a/include/linux/clk/ti.h b/include/linux/clk/ti.h
index b1ecb7a..4778783 100644
--- a/include/linux/clk/ti.h
+++ b/include/linux/clk/ti.h
@@ -238,18 +238,24 @@ struct clk_omap_reg {
 };
 
 /**
- * struct ti_clk_ll_ops - low-level register access ops for a clock
+ * struct ti_clk_ll_ops - low-level ops for clocks
  * @clk_readl: pointer to register read function
  * @clk_writel: pointer to register write function
+ * @clkdm_clk_enable: pointer to clockdomain enable function
+ * @clkdm_clk_disable: pointer to clockdomain disable function
  *
- * Low-level register access ops are generally used by the basic clock types
- * (clk-gate, clk-mux, clk-divider etc.) to provide support for various
- * low-level hardware interfaces (direct MMIO, regmap etc.), but can also be
- * used by other hardware-specific clock drivers if needed.
+ * Low-level ops are generally used by the basic clock types (clk-gate,
+ * clk-mux, clk-divider etc.) to provide support for various low-level
+ * hadrware interfaces (direct MMIO, regmap etc.), and is initialized
+ * by board code. Low-level ops also contain some other platform specific
+ * operations not provided directly by clock drivers.
  */
 struct ti_clk_ll_ops {
u32 (*clk_readl)(void __iomem *reg);
void(*clk_writel)(u32 val, void __iomem *reg);
+   int (*clkdm_clk_enable)(struct clockdomain *clkdm, struct clk *clk);
+   int (*clkdm_clk_disable)(struct clockdomain *clkdm,
+struct clk *clk);
 };
 
 extern struct ti_clk_ll_ops *ti_clk_ll_ops;
-- 
1.7.9.5

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[PATCH 15/24] ARM: OMAP3: clock: remove clock3xxx.c file

[Tero Kristo]

This now only has a couple of variables within it, which are used outside
the file itself. Move these variables to where they are actually used,
and remove the file completely as it is now empty.

Signed-off-by: Tero Kristo t-kri...@ti.com
---
 arch/arm/mach-omap2/Makefile   |2 +-
 arch/arm/mach-omap2/clkt34xx_dpll3m2.c |2 ++
 arch/arm/mach-omap2/clock3xxx.c|   33 
 3 files changed, 3 insertions(+), 34 deletions(-)
 delete mode 100644 arch/arm/mach-omap2/clock3xxx.c

diff --git a/arch/arm/mach-omap2/Makefile b/arch/arm/mach-omap2/Makefile
index 2c8b36d..ebfc3f6 100644
--- a/arch/arm/mach-omap2/Makefile
+++ b/arch/arm/mach-omap2/Makefile
@@ -186,7 +186,7 @@ obj-$(CONFIG_ARCH_OMAP2)+= clkt2xxx_dpllcore.o
 obj-$(CONFIG_ARCH_OMAP2)   += clkt2xxx_virt_prcm_set.o
 obj-$(CONFIG_ARCH_OMAP2)   += clkt2xxx_dpll.o
 obj-$(CONFIG_SOC_OMAP2430) += clock2430.o
-obj-$(CONFIG_ARCH_OMAP3)   += $(clock-common) clock3xxx.o
+obj-$(CONFIG_ARCH_OMAP3)   += $(clock-common)
 obj-$(CONFIG_ARCH_OMAP3)   += clock34xx.o clkt34xx_dpll3m2.o
 obj-$(CONFIG_ARCH_OMAP3)   += clock3517.o
 obj-$(CONFIG_ARCH_OMAP4)   += $(clock-common)
diff --git a/arch/arm/mach-omap2/clkt34xx_dpll3m2.c 
b/arch/arm/mach-omap2/clkt34xx_dpll3m2.c
index 825e3da..6cd2961 100644
--- a/arch/arm/mach-omap2/clkt34xx_dpll3m2.c
+++ b/arch/arm/mach-omap2/clkt34xx_dpll3m2.c
@@ -29,6 +29,8 @@
 
 #define CYCLES_PER_MHZ 100
 
+struct clk *sdrc_ick_p, *arm_fck_p;
+
 /*
  * CORE DPLL (DPLL3) M2 divider rate programming functions
  *
diff --git a/arch/arm/mach-omap2/clock3xxx.c b/arch/arm/mach-omap2/clock3xxx.c
deleted file mode 100644
index 0b0e3a87..000
--- a/arch/arm/mach-omap2/clock3xxx.c
+++ /dev/null
@@ -1,33 +0,0 @@
-/*
- * OMAP3-specific clock framework functions
- *
- * Copyright (C) 2007-2008 Texas Instruments, Inc.
- * Copyright (C) 2007-2010 Nokia Corporation
- *
- * Paul Walmsley
- * Jouni Högander
- *
- * Parts of this code are based on code written by
- * Richard Woodruff, Tony Lindgren, Tuukka Tikkanen, Karthik Dasu
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
- */
-#undef DEBUG
-
-#include linux/kernel.h
-#include linux/errno.h
-#include linux/clk.h
-#include linux/io.h
-
-#include soc.h
-#include clock.h
-#include clock3xxx.h
-#include prm2xxx_3xxx.h
-#include prm-regbits-34xx.h
-#include cm2xxx_3xxx.h
-#include cm-regbits-34xx.h
-
-/* needed by omap3_core_dpll_m2_set_rate() */
-struct clk *sdrc_ick_p, *arm_fck_p;
-- 
1.7.9.5

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[PATCH 17/24] clk: ti: dflt: move support for default gate clock to clock driver

[Tero Kristo]

With the legacy support gone, OMAP2+ default gate clock can be moved
under clock driver. Create a new file for the purpose, and clean-up
the header exports a bit as some clock APIs are no longer needed
outside clock driver itself.

Signed-off-by: Tero Kristo t-kri...@ti.com
---
 arch/arm/mach-omap2/clock.c |  273 -
 drivers/clk/ti/Makefile |3 +-
 drivers/clk/ti/clkt_dflt.c  |  316 +++
 drivers/clk/ti/clock.h  |5 +
 include/linux/clk/ti.h  |4 -
 5 files changed, 323 insertions(+), 278 deletions(-)
 create mode 100644 drivers/clk/ti/clkt_dflt.c

diff --git a/arch/arm/mach-omap2/clock.c b/arch/arm/mach-omap2/clock.c
index d9150f8..efa09bc 100644
--- a/arch/arm/mach-omap2/clock.c
+++ b/arch/arm/mach-omap2/clock.c
@@ -37,12 +37,6 @@
 #include cm-regbits-34xx.h
 #include common.h
 
-/*
- * MAX_MODULE_ENABLE_WAIT: maximum of number of microseconds to wait
- * for a module to indicate that it is no longer in idle
- */
-#define MAX_MODULE_ENABLE_WAIT 10
-
 u16 cpu_mask;
 
 /* DPLL valid Fint frequency band limits - from 34xx TRM Section 4.7.6.2 */
@@ -90,77 +84,6 @@ u32 omap2_clk_readl(struct clk_hw_omap *clk, void __iomem 
*reg)
 
 /* Private functions */
 
-
-/**
- * _wait_idlest_generic - wait for a module to leave the idle state
- * @clk: module clock to wait for (needed for register offsets)
- * @reg: virtual address of module IDLEST register
- * @mask: value to mask against to determine if the module is active
- * @idlest: idle state indicator (0 or 1) for the clock
- * @name: name of the clock (for printk)
- *
- * Wait for a module to leave idle, where its idle-status register is
- * not inside the CM module.  Returns 1 if the module left idle
- * promptly, or 0 if the module did not leave idle before the timeout
- * elapsed.  XXX Deprecated - should be moved into drivers for the
- * individual IP block that the IDLEST register exists in.
- */
-static int _wait_idlest_generic(struct clk_hw_omap *clk, void __iomem *reg,
-   u32 mask, u8 idlest, const char *name)
-{
-   int i = 0, ena = 0;
-
-   ena = (idlest) ? 0 : mask;
-
-   omap_test_timeout(((omap2_clk_readl(clk, reg)  mask) == ena),
- MAX_MODULE_ENABLE_WAIT, i);
-
-   if (i  MAX_MODULE_ENABLE_WAIT)
-   pr_debug(omap clock: module associated with clock %s ready 
after %d loops\n,
-name, i);
-   else
-   pr_err(omap clock: module associated with clock %s didn't 
enable in %d tries\n,
-  name, MAX_MODULE_ENABLE_WAIT);
-
-   return (i  MAX_MODULE_ENABLE_WAIT) ? 1 : 0;
-};
-
-/**
- * _omap2_module_wait_ready - wait for an OMAP module to leave IDLE
- * @clk: struct clk * belonging to the module
- *
- * If the necessary clocks for the OMAP hardware IP block that
- * corresponds to clock @clk are enabled, then wait for the module to
- * indicate readiness (i.e., to leave IDLE).  This code does not
- * belong in the clock code and will be moved in the medium term to
- * module-dependent code.  No return value.
- */
-static void _omap2_module_wait_ready(struct clk_hw_omap *clk)
-{
-   void __iomem *companion_reg, *idlest_reg;
-   u8 other_bit, idlest_bit, idlest_val, idlest_reg_id;
-   s16 prcm_mod;
-   int r;
-
-   /* Not all modules have multiple clocks that their IDLEST depends on */
-   if (clk-ops-find_companion) {
-   clk-ops-find_companion(clk, companion_reg, other_bit);
-   if (!(omap2_clk_readl(clk, companion_reg)  (1  other_bit)))
-   return;
-   }
-
-   clk-ops-find_idlest(clk, idlest_reg, idlest_bit, idlest_val);
-   r = cm_split_idlest_reg(idlest_reg, prcm_mod, idlest_reg_id);
-   if (r) {
-   /* IDLEST register not in the CM module */
-   _wait_idlest_generic(clk, idlest_reg, (1  idlest_bit),
-idlest_val, __clk_get_name(clk-hw.clk));
-   } else {
-   omap_cm_wait_module_ready(0, prcm_mod, idlest_reg_id,
- idlest_bit);
-   };
-}
-
 /* Public functions */
 
 /**
@@ -194,174 +117,6 @@ void omap2_init_clk_clkdm(struct clk_hw *hw)
 }
 
 /**
- * omap2_clk_dflt_find_companion - find companion clock to @clk
- * @clk: struct clk * to find the companion clock of
- * @other_reg: void __iomem ** to return the companion clock CM_*CLKEN va in
- * @other_bit: u8 ** to return the companion clock bit shift in
- *
- * Note: We don't need special code here for INVERT_ENABLE for the
- * time being since INVERT_ENABLE only applies to clocks enabled by
- * CM_CLKEN_PLL
- *
- * Convert CM_ICLKEN* - CM_FCLKEN*.  This conversion assumes it's
- * just a matter of XORing the bits.
- *
- * Some clocks don't have companion clocks.  For example, modules with
- * only an interface clock (such as MAILBOXES) don't have a companion

[PATCH 20/24] clk: ti: omap34xx: move omap34xx clock type support code to clock driver

[Tero Kristo]

With the legacy clock data gone, this is no longer needed under platform,
so move it under the clock driver itself. Remove unnecessary declarations
from the TI clock header also.

Signed-off-by: Tero Kristo t-kri...@ti.com
---
 arch/arm/mach-omap2/Makefile|2 +-
 arch/arm/mach-omap2/clock34xx.c |  138 ---
 drivers/clk/ti/clk-3xxx.c   |  118 +
 drivers/clk/ti/clock.h  |4 ++
 include/linux/clk/ti.h  |4 --
 5 files changed, 123 insertions(+), 143 deletions(-)
 delete mode 100644 arch/arm/mach-omap2/clock34xx.c

diff --git a/arch/arm/mach-omap2/Makefile b/arch/arm/mach-omap2/Makefile
index 967833b..9ee4395 100644
--- a/arch/arm/mach-omap2/Makefile
+++ b/arch/arm/mach-omap2/Makefile
@@ -186,7 +186,7 @@ obj-$(CONFIG_ARCH_OMAP2)+= clkt2xxx_dpllcore.o
 obj-$(CONFIG_ARCH_OMAP2)   += clkt2xxx_virt_prcm_set.o
 obj-$(CONFIG_ARCH_OMAP2)   += clkt2xxx_dpll.o
 obj-$(CONFIG_ARCH_OMAP3)   += $(clock-common)
-obj-$(CONFIG_ARCH_OMAP3)   += clock34xx.o clkt34xx_dpll3m2.o
+obj-$(CONFIG_ARCH_OMAP3)   += clkt34xx_dpll3m2.o
 obj-$(CONFIG_ARCH_OMAP3)   += clock3517.o
 obj-$(CONFIG_ARCH_OMAP4)   += $(clock-common)
 obj-$(CONFIG_SOC_AM33XX)   += $(clock-common)
diff --git a/arch/arm/mach-omap2/clock34xx.c b/arch/arm/mach-omap2/clock34xx.c
deleted file mode 100644
index 4596468..000
--- a/arch/arm/mach-omap2/clock34xx.c
+++ /dev/null
@@ -1,138 +0,0 @@
-/*
- * OMAP3-specific clock framework functions
- *
- * Copyright (C) 2007-2008 Texas Instruments, Inc.
- * Copyright (C) 2007-2011 Nokia Corporation
- *
- * Paul Walmsley
- * Jouni Högander
- *
- * Parts of this code are based on code written by
- * Richard Woodruff, Tony Lindgren, Tuukka Tikkanen, Karthik Dasu,
- * Russell King
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
- */
-#undef DEBUG
-
-#include linux/kernel.h
-#include linux/clk.h
-#include linux/io.h
-
-#include clock.h
-#include clock34xx.h
-#include cm3xxx.h
-#include cm-regbits-34xx.h
-
-/**
- * omap3430es2_clk_ssi_find_idlest - return CM_IDLEST info for SSI
- * @clk: struct clk * being enabled
- * @idlest_reg: void __iomem ** to store CM_IDLEST reg address into
- * @idlest_bit: pointer to a u8 to store the CM_IDLEST bit shift into
- * @idlest_val: pointer to a u8 to store the CM_IDLEST indicator
- *
- * The OMAP3430ES2 SSI target CM_IDLEST bit is at a different shift
- * from the CM_{I,F}CLKEN bit.  Pass back the correct info via
- * @idlest_reg and @idlest_bit.  No return value.
- */
-static void omap3430es2_clk_ssi_find_idlest(struct clk_hw_omap *clk,
-   void __iomem **idlest_reg,
-   u8 *idlest_bit,
-   u8 *idlest_val)
-{
-   u32 r;
-
-   r = (((__force u32)clk-enable_reg  ~0xf0) | 0x20);
-   *idlest_reg = (__force void __iomem *)r;
-   *idlest_bit = OMAP3430ES2_ST_SSI_IDLE_SHIFT;
-   *idlest_val = OMAP34XX_CM_IDLEST_VAL;
-}
-const struct clk_hw_omap_ops clkhwops_omap3430es2_ssi_wait = {
-   .find_idlest= omap3430es2_clk_ssi_find_idlest,
-   .find_companion = omap2_clk_dflt_find_companion,
-};
-
-const struct clk_hw_omap_ops clkhwops_omap3430es2_iclk_ssi_wait = {
-   .allow_idle = omap2_clkt_iclk_allow_idle,
-   .deny_idle  = omap2_clkt_iclk_deny_idle,
-   .find_idlest= omap3430es2_clk_ssi_find_idlest,
-   .find_companion = omap2_clk_dflt_find_companion,
-};
-
-/**
- * omap3430es2_clk_dss_usbhost_find_idlest - CM_IDLEST info for DSS, USBHOST
- * @clk: struct clk * being enabled
- * @idlest_reg: void __iomem ** to store CM_IDLEST reg address into
- * @idlest_bit: pointer to a u8 to store the CM_IDLEST bit shift into
- * @idlest_val: pointer to a u8 to store the CM_IDLEST indicator
- *
- * Some OMAP modules on OMAP3 ES2+ chips have both initiator and
- * target IDLEST bits.  For our purposes, we are concerned with the
- * target IDLEST bits, which exist at a different bit position than
- * the *CLKEN bit position for these modules (DSS and USBHOST) (The
- * default find_idlest code assumes that they are at the same
- * position.)  No return value.
- */
-static void omap3430es2_clk_dss_usbhost_find_idlest(struct clk_hw_omap *clk,
-   void __iomem **idlest_reg,
-   u8 *idlest_bit,
-   u8 *idlest_val)
-{
-   u32 r;
-
-   r = (((__force u32)clk-enable_reg  ~0xf0) | 0x20);
-   *idlest_reg = (__force void __iomem *)r;
-   /* USBHOST_IDLE has same shift */
-   *idlest_bit = OMAP3430ES2_ST_DSS_IDLE_SHIFT;
-   *idlest_val = 

[PATCH 16/24] ARM: OMAP2+: clock: remove clkdm_control static boolean from code

[Tero Kristo]

clkdm_control is used to determine, whether clocks should trigger a
clockdomain transition when they are enabled/disabled. Keep this
functionality intact, but replace this with a clk_features flag
which can be initialized during boot if needed.

Signed-off-by: Tero Kristo t-kri...@ti.com
---
 arch/arm/mach-omap2/clock.c |   34 ++
 arch/arm/mach-omap2/clock.h |2 --
 include/linux/clk/ti.h  |1 +
 3 files changed, 11 insertions(+), 26 deletions(-)

diff --git a/arch/arm/mach-omap2/clock.c b/arch/arm/mach-omap2/clock.c
index 9f86e50..d9150f8 100644
--- a/arch/arm/mach-omap2/clock.c
+++ b/arch/arm/mach-omap2/clock.c
@@ -58,14 +58,6 @@ u16 cpu_mask;
 #define OMAP3PLUS_DPLL_FINT_MIN32000
 #define OMAP3PLUS_DPLL_FINT_MAX5200
 
-/*
- * clkdm_control: if true, then when a clock is enabled in the
- * hardware, its clockdomain will first be enabled; and when a clock
- * is disabled in the hardware, its clockdomain will be disabled
- * afterwards.
- */
-static bool clkdm_control = true;
-
 void __iomem *clk_memmaps[CLK_MAX_MEMMAPS];
 
 void omap2_clk_writel(u32 val, struct clk_hw_omap *clk, void __iomem *reg)
@@ -202,19 +194,6 @@ void omap2_init_clk_clkdm(struct clk_hw *hw)
 }
 
 /**
- * omap2_clk_disable_clkdm_control - disable clkdm control on clk 
enable/disable
- *
- * Prevent the OMAP clock code from calling into the clockdomain code
- * when a hardware clock in that clockdomain is enabled or disabled.
- * Intended to be called at init time from omap*_clk_init().  No
- * return value.
- */
-void __init omap2_clk_disable_clkdm_control(void)
-{
-   clkdm_control = false;
-}
-
-/**
  * omap2_clk_dflt_find_companion - find companion clock to @clk
  * @clk: struct clk * to find the companion clock of
  * @other_reg: void __iomem ** to return the companion clock CM_*CLKEN va in
@@ -298,6 +277,12 @@ int omap2_dflt_clk_enable(struct clk_hw *hw)
struct clk_hw_omap *clk;
u32 v;
int ret = 0;
+   bool clkdm_control;
+
+   if (ti_clk_get_features()-flags  TI_CLK_DISABLE_CLKDM_CONTROL)
+   clkdm_control = false;
+   else
+   clkdm_control = true;
 
clk = to_clk_hw_omap(hw);
 
@@ -371,7 +356,8 @@ void omap2_dflt_clk_disable(struct clk_hw *hw)
omap2_clk_writel(v, clk, clk-enable_reg);
/* No OCP barrier needed here since it is a disable operation */
 
-   if (clkdm_control  clk-clkdm)
+   if (!(ti_clk_get_features()-flags  TI_CLK_DISABLE_CLKDM_CONTROL) 
+   clk-clkdm)
clkdm_clk_disable(clk-clkdm, hw-clk);
 }
 
@@ -404,7 +390,7 @@ int omap2_clkops_enable_clkdm(struct clk_hw *hw)
pr_err(%s: %s: should use dflt_clk_enable ?!\n, __func__,
   __clk_get_name(hw-clk));
 
-   if (!clkdm_control) {
+   if (ti_clk_get_features()-flags  TI_CLK_DISABLE_CLKDM_CONTROL) {
pr_err(%s: %s: clkfw-based clockdomain control disabled ?!\n,
   __func__, __clk_get_name(hw-clk));
return 0;
@@ -442,7 +428,7 @@ void omap2_clkops_disable_clkdm(struct clk_hw *hw)
pr_err(%s: %s: should use dflt_clk_disable ?!\n, __func__,
   __clk_get_name(hw-clk));
 
-   if (!clkdm_control) {
+   if (ti_clk_get_features()-flags  TI_CLK_DISABLE_CLKDM_CONTROL) {
pr_err(%s: %s: clkfw-based clockdomain control disabled ?!\n,
   __func__, __clk_get_name(hw-clk));
return;
diff --git a/arch/arm/mach-omap2/clock.h b/arch/arm/mach-omap2/clock.h
index c224719..f8282e8 100644
--- a/arch/arm/mach-omap2/clock.h
+++ b/arch/arm/mach-omap2/clock.h
@@ -180,8 +180,6 @@ struct clksel {
 #define OMAP4XXX_EN_DPLL_FRBYPASS  0x6
 #define OMAP4XXX_EN_DPLL_LOCKED0x7
 
-void __init omap2_clk_disable_clkdm_control(void);
-
 void omap2_clk_print_new_rates(const char *hfclkin_ck_name,
   const char *core_ck_name,
   const char *mpu_ck_name);
diff --git a/include/linux/clk/ti.h b/include/linux/clk/ti.h
index 653791e..78b776a 100644
--- a/include/linux/clk/ti.h
+++ b/include/linux/clk/ti.h
@@ -330,6 +330,7 @@ struct ti_clk_features {
 
 #define TI_CLK_DPLL_HAS_FREQSELBIT(0)
 #define TI_CLK_DPLL4_DENY_REPROGRAMBIT(1)
+#define TI_CLK_DISABLE_CLKDM_CONTROL   BIT(2)
 
 void ti_clk_setup_features(struct ti_clk_features *features);
 struct ti_clk_features *ti_clk_get_features(void);
-- 
1.7.9.5

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[PATCH 08/24] ARM: OMAP36xx: remove clock36xx.c/.h files

[Tero Kristo]

These files contain legacy clock implementations which are no longer used
for anything, thus remove them completely.

Signed-off-by: Tero Kristo t-kri...@ti.com
---
 arch/arm/mach-omap2/Makefile|2 +-
 arch/arm/mach-omap2/clock36xx.c |   69 ---
 arch/arm/mach-omap2/clock36xx.h |   13 
 3 files changed, 1 insertion(+), 83 deletions(-)
 delete mode 100644 arch/arm/mach-omap2/clock36xx.c
 delete mode 100644 arch/arm/mach-omap2/clock36xx.h

diff --git a/arch/arm/mach-omap2/Makefile b/arch/arm/mach-omap2/Makefile
index c172cf1..db627b2 100644
--- a/arch/arm/mach-omap2/Makefile
+++ b/arch/arm/mach-omap2/Makefile
@@ -188,7 +188,7 @@ obj-$(CONFIG_ARCH_OMAP2)+= clkt2xxx_dpll.o
 obj-$(CONFIG_SOC_OMAP2430) += clock2430.o
 obj-$(CONFIG_ARCH_OMAP3)   += $(clock-common) clock3xxx.o
 obj-$(CONFIG_ARCH_OMAP3)   += clock34xx.o clkt34xx_dpll3m2.o
-obj-$(CONFIG_ARCH_OMAP3)   += clock3517.o clock36xx.o
+obj-$(CONFIG_ARCH_OMAP3)   += clock3517.o
 obj-$(CONFIG_ARCH_OMAP3)   += dpll3xxx.o
 obj-$(CONFIG_ARCH_OMAP4)   += $(clock-common)
 obj-$(CONFIG_ARCH_OMAP4)   += dpll3xxx.o
diff --git a/arch/arm/mach-omap2/clock36xx.c b/arch/arm/mach-omap2/clock36xx.c
deleted file mode 100644
index 91ccb96..000
--- a/arch/arm/mach-omap2/clock36xx.c
+++ /dev/null
@@ -1,69 +0,0 @@
-/*
- * OMAP36xx-specific clkops
- *
- * Copyright (C) 2010 Texas Instruments, Inc.
- * Copyright (C) 2010 Nokia Corporation
- *
- * Mike Turquette
- * Vijaykumar GN
- * Paul Walmsley
- *
- * Parts of this code are based on code written by
- * Richard Woodruff, Tony Lindgren, Tuukka Tikkanen, Karthik Dasu,
- * Russell King
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
- */
-#undef DEBUG
-
-#include linux/kernel.h
-#include linux/clk.h
-#include linux/clk-provider.h
-#include linux/io.h
-
-#include clock.h
-#include clock36xx.h
-#define to_clk_divider(_hw) container_of(_hw, struct clk_divider, hw)
-
-/**
- * omap36xx_pwrdn_clk_enable_with_hsdiv_restore - enable clocks suffering
- * from HSDivider PWRDN problem Implements Errata ID: i556.
- * @clk: DPLL output struct clk
- *
- * 3630 only: dpll3_m3_ck, dpll4_m2_ck, dpll4_m3_ck, dpll4_m4_ck,
- * dpll4_m5_ck  dpll4_m6_ck dividers gets loaded with reset
- * valueafter their respective PWRDN bits are set.  Any dummy write
- * (Any other value different from the Read value) to the
- * corresponding CM_CLKSEL register will refresh the dividers.
- */
-int omap36xx_pwrdn_clk_enable_with_hsdiv_restore(struct clk_hw *clk)
-{
-   struct clk_divider *parent;
-   struct clk_hw *parent_hw;
-   u32 dummy_v, orig_v;
-   struct clk_hw_omap *omap_clk = to_clk_hw_omap(clk);
-   int ret;
-
-   /* Clear PWRDN bit of HSDIVIDER */
-   ret = omap2_dflt_clk_enable(clk);
-
-   parent_hw = __clk_get_hw(__clk_get_parent(clk-clk));
-   parent = to_clk_divider(parent_hw);
-
-   /* Restore the dividers */
-   if (!ret) {
-   orig_v = omap2_clk_readl(omap_clk, parent-reg);
-   dummy_v = orig_v;
-
-   /* Write any other value different from the Read value */
-   dummy_v ^= (1  parent-shift);
-   omap2_clk_writel(dummy_v, omap_clk, parent-reg);
-
-   /* Write the original divider */
-   omap2_clk_writel(orig_v, omap_clk, parent-reg);
-   }
-
-   return ret;
-}
diff --git a/arch/arm/mach-omap2/clock36xx.h b/arch/arm/mach-omap2/clock36xx.h
deleted file mode 100644
index 945bb7f..000
--- a/arch/arm/mach-omap2/clock36xx.h
+++ /dev/null
@@ -1,13 +0,0 @@
-/*
- * OMAP36xx clock function prototypes and macros
- *
- * Copyright (C) 2010 Texas Instruments, Inc.
- * Copyright (C) 2010 Nokia Corporation
- */
-
-#ifndef __ARCH_ARM_MACH_OMAP2_CLOCK36XX_H
-#define __ARCH_ARM_MACH_OMAP2_CLOCK36XX_H
-
-extern int omap36xx_pwrdn_clk_enable_with_hsdiv_restore(struct clk_hw *hw);
-
-#endif
-- 
1.7.9.5

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[PATCH 11/24] ARM: OMAP2+: clock: remove support for legacy mpurate command line param

[Tero Kristo]

The legacy support is wrong and dangerous, as it doesn't take any
OPPs into account and does not scale voltages. Switching mpurate should
be handled through cpufreq.

Signed-off-by: Tero Kristo t-kri...@ti.com
---
 arch/arm/mach-omap2/Makefile|2 +-
 arch/arm/mach-omap2/clock.c |   41 
 arch/arm/mach-omap2/clock.h |1 -
 arch/arm/mach-omap2/clock2xxx.c |   57 ---
 arch/arm/mach-omap2/clock3xxx.c |   25 -
 5 files changed, 1 insertion(+), 125 deletions(-)
 delete mode 100644 arch/arm/mach-omap2/clock2xxx.c

diff --git a/arch/arm/mach-omap2/Makefile b/arch/arm/mach-omap2/Makefile
index db627b2..f3fe7ae 100644
--- a/arch/arm/mach-omap2/Makefile
+++ b/arch/arm/mach-omap2/Makefile
@@ -181,7 +181,7 @@ obj-$(CONFIG_SOC_DRA7XX)+= $(clockdomain-common)
 obj-$(CONFIG_SOC_DRA7XX)   += clockdomains7xx_data.o
 
 # Clock framework
-obj-$(CONFIG_ARCH_OMAP2)   += $(clock-common) clock2xxx.o
+obj-$(CONFIG_ARCH_OMAP2)   += $(clock-common)
 obj-$(CONFIG_ARCH_OMAP2)   += clkt2xxx_dpllcore.o
 obj-$(CONFIG_ARCH_OMAP2)   += clkt2xxx_virt_prcm_set.o
 obj-$(CONFIG_ARCH_OMAP2)   += clkt2xxx_dpll.o
diff --git a/arch/arm/mach-omap2/clock.c b/arch/arm/mach-omap2/clock.c
index 720c2bc..9f86e50 100644
--- a/arch/arm/mach-omap2/clock.c
+++ b/arch/arm/mach-omap2/clock.c
@@ -500,47 +500,6 @@ const struct clk_hw_omap_ops clkhwops_wait = {
 };
 
 /**
- * omap2_clk_switch_mpurate_at_boot - switch ARM MPU rate by boot-time argument
- * @mpurate_ck_name: clk name of the clock to change rate
- *
- * Change the ARM MPU clock rate to the rate specified on the command
- * line, if one was specified.  @mpurate_ck_name should be
- * virt_prcm_set on OMAP2xxx and dpll1_ck on OMAP34xx/OMAP36xx.
- * XXX Does not handle voltage scaling - on OMAP2xxx this is currently
- * handled by the virt_prcm_set clock, but this should be handled by
- * the OPP layer.  XXX This is intended to be handled by the OPP layer
- * code in the near future and should be removed from the clock code.
- * Returns -EINVAL if 'mpurate' is zero or if clk_set_rate() rejects
- * the rate, -ENOENT if the struct clk referred to by @mpurate_ck_name
- * cannot be found, or 0 upon success.
- */
-int __init omap2_clk_switch_mpurate_at_boot(const char *mpurate_ck_name)
-{
-   struct clk *mpurate_ck;
-   int r;
-
-   if (!mpurate)
-   return -EINVAL;
-
-   mpurate_ck = clk_get(NULL, mpurate_ck_name);
-   if (WARN(IS_ERR(mpurate_ck), Failed to get %s.\n, mpurate_ck_name))
-   return -ENOENT;
-
-   r = clk_set_rate(mpurate_ck, mpurate);
-   if (r  0) {
-   WARN(1, clock: %s: unable to set MPU rate to %d: %d\n,
-mpurate_ck_name, mpurate, r);
-   clk_put(mpurate_ck);
-   return -EINVAL;
-   }
-
-   calibrate_delay();
-   clk_put(mpurate_ck);
-
-   return 0;
-}
-
-/**
  * omap2_clk_print_new_rates - print summary of current clock tree rates
  * @hfclkin_ck_name: clk name for the off-chip HF oscillator
  * @core_ck_name: clk name for the on-chip CORE_CLK
diff --git a/arch/arm/mach-omap2/clock.h b/arch/arm/mach-omap2/clock.h
index 1ce54b3..5de3786 100644
--- a/arch/arm/mach-omap2/clock.h
+++ b/arch/arm/mach-omap2/clock.h
@@ -186,7 +186,6 @@ void omap3_dpll_deny_idle(struct clk_hw_omap *clk);
 
 void __init omap2_clk_disable_clkdm_control(void);
 
-int omap2_clk_switch_mpurate_at_boot(const char *mpurate_ck_name);
 void omap2_clk_print_new_rates(const char *hfclkin_ck_name,
   const char *core_ck_name,
   const char *mpu_ck_name);
diff --git a/arch/arm/mach-omap2/clock2xxx.c b/arch/arm/mach-omap2/clock2xxx.c
deleted file mode 100644
index b870f6a..000
--- a/arch/arm/mach-omap2/clock2xxx.c
+++ /dev/null
@@ -1,57 +0,0 @@
-/*
- * clock2xxx.c - OMAP2xxx-specific clock integration code
- *
- * Copyright (C) 2005-2008 Texas Instruments, Inc.
- * Copyright (C) 2004-2010 Nokia Corporation
- *
- * Contacts:
- * Richard Woodruff r-woodru...@ti.com
- * Paul Walmsley
- *
- * Based on earlier work by Tuukka Tikkanen, Tony Lindgren,
- * Gordon McNutt and RidgeRun, Inc.
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
- */
-#undef DEBUG
-
-#include linux/kernel.h
-#include linux/errno.h
-#include linux/clk.h
-#include linux/io.h
-
-#include soc.h
-#include clock.h
-#include clock2xxx.h
-#include cm.h
-#include cm-regbits-24xx.h
-
-struct clk_hw *dclk_hw;
-/*
- * Omap24xx specific clock functions
- */
-
-/*
- * Switch the MPU rate if specified on cmdline.  We cannot do this
- * early until cmdline is parsed.  XXX This should be removed from the
- * clock code and handled by the OPP layer code in the near future.
- 

[PATCH 09/24] clk: ti: autoidle: move generic autoidle handling code to clock driver

[Tero Kristo]

This is no longer needed in platform directory, as the legacy clock data
is gone, so move it under TI clock driver. Some static functions are
renamed also.

Signed-off-by: Tero Kristo t-kri...@ti.com
---
 arch/arm/mach-omap2/clock.c   |  103 ---
 arch/arm/mach-omap2/clock.h   |3 --
 drivers/clk/ti/autoidle.c |  119 ++---
 drivers/clk/ti/clock.h|3 ++
 drivers/clk/ti/fixed-factor.c |2 +
 include/linux/clk/ti.h|   13 ++---
 6 files changed, 119 insertions(+), 124 deletions(-)

diff --git a/arch/arm/mach-omap2/clock.c b/arch/arm/mach-omap2/clock.c
index 1d87860..99f1dc5 100644
--- a/arch/arm/mach-omap2/clock.c
+++ b/arch/arm/mach-omap2/clock.c
@@ -66,7 +66,6 @@ u16 cpu_mask;
  */
 static bool clkdm_control = true;
 
-static LIST_HEAD(clk_hw_omap_clocks);
 void __iomem *clk_memmaps[CLK_MAX_MEMMAPS];
 
 void omap2_clk_writel(u32 val, struct clk_hw_omap *clk, void __iomem *reg)
@@ -496,108 +495,6 @@ static int __init omap_clk_setup(char *str)
 __setup(mpurate=, omap_clk_setup);
 
 /**
- * omap2_init_clk_hw_omap_clocks - initialize an OMAP clock
- * @clk: struct clk * to initialize
- *
- * Add an OMAP clock @clk to the internal list of OMAP clocks.  Used
- * temporarily for autoidle handling, until this support can be
- * integrated into the common clock framework code in some way.  No
- * return value.
- */
-void omap2_init_clk_hw_omap_clocks(struct clk *clk)
-{
-   struct clk_hw_omap *c;
-
-   if (__clk_get_flags(clk)  CLK_IS_BASIC)
-   return;
-
-   c = to_clk_hw_omap(__clk_get_hw(clk));
-   list_add(c-node, clk_hw_omap_clocks);
-}
-
-/**
- * omap2_clk_enable_autoidle_all - enable autoidle on all OMAP clocks that
- * support it
- *
- * Enable clock autoidle on all OMAP clocks that have allow_idle
- * function pointers associated with them.  This function is intended
- * to be temporary until support for this is added to the common clock
- * code.  Returns 0.
- */
-int omap2_clk_enable_autoidle_all(void)
-{
-   struct clk_hw_omap *c;
-
-   list_for_each_entry(c, clk_hw_omap_clocks, node)
-   if (c-ops  c-ops-allow_idle)
-   c-ops-allow_idle(c);
-
-   of_ti_clk_allow_autoidle_all();
-
-   return 0;
-}
-
-/**
- * omap2_clk_disable_autoidle_all - disable autoidle on all OMAP clocks that
- * support it
- *
- * Disable clock autoidle on all OMAP clocks that have allow_idle
- * function pointers associated with them.  This function is intended
- * to be temporary until support for this is added to the common clock
- * code.  Returns 0.
- */
-int omap2_clk_disable_autoidle_all(void)
-{
-   struct clk_hw_omap *c;
-
-   list_for_each_entry(c, clk_hw_omap_clocks, node)
-   if (c-ops  c-ops-deny_idle)
-   c-ops-deny_idle(c);
-
-   of_ti_clk_deny_autoidle_all();
-
-   return 0;
-}
-
-/**
- * omap2_clk_deny_idle - disable autoidle on an OMAP clock
- * @clk: struct clk * to disable autoidle for
- *
- * Disable autoidle on an OMAP clock.
- */
-int omap2_clk_deny_idle(struct clk *clk)
-{
-   struct clk_hw_omap *c;
-
-   if (__clk_get_flags(clk)  CLK_IS_BASIC)
-   return -EINVAL;
-
-   c = to_clk_hw_omap(__clk_get_hw(clk));
-   if (c-ops  c-ops-deny_idle)
-   c-ops-deny_idle(c);
-   return 0;
-}
-
-/**
- * omap2_clk_allow_idle - enable autoidle on an OMAP clock
- * @clk: struct clk * to enable autoidle for
- *
- * Enable autoidle on an OMAP clock.
- */
-int omap2_clk_allow_idle(struct clk *clk)
-{
-   struct clk_hw_omap *c;
-
-   if (__clk_get_flags(clk)  CLK_IS_BASIC)
-   return -EINVAL;
-
-   c = to_clk_hw_omap(__clk_get_hw(clk));
-   if (c-ops  c-ops-allow_idle)
-   c-ops-allow_idle(c);
-   return 0;
-}
-
-/**
  * omap2_clk_enable_init_clocks - prepare  enable a list of clocks
  * @clk_names: ptr to an array of strings of clock names to enable
  * @num_clocks: number of clock names in @clk_names
diff --git a/arch/arm/mach-omap2/clock.h b/arch/arm/mach-omap2/clock.h
index d7c6644..1ce54b3 100644
--- a/arch/arm/mach-omap2/clock.h
+++ b/arch/arm/mach-omap2/clock.h
@@ -186,9 +186,6 @@ void omap3_dpll_deny_idle(struct clk_hw_omap *clk);
 
 void __init omap2_clk_disable_clkdm_control(void);
 
-int omap2_clk_enable_autoidle_all(void);
-int omap2_clk_allow_idle(struct clk *clk);
-int omap2_clk_deny_idle(struct clk *clk);
 int omap2_clk_switch_mpurate_at_boot(const char *mpurate_ck_name);
 void omap2_clk_print_new_rates(const char *hfclkin_ck_name,
   const char *core_ck_name,
diff --git a/drivers/clk/ti/autoidle.c b/drivers/clk/ti/autoidle.c
index 8912ff8..7f4010d 100644
--- a/drivers/clk/ti/autoidle.c
+++ b/drivers/clk/ti/autoidle.c
@@ -33,8 +33,47 @@ struct clk_ti_autoidle {
 #define AUTOIDLE_LOW   0x1
 
 static LIST_HEAD(autoidle_clks);
+static LIST_HEAD(clk_hw_omap_clocks);
 
-static 

Re: [PATCH 0/8 v4] ARM OMAP2+ GPMC: fixes and bus children

[Roger Quadros]

On 06/03/15 02:58, Tony Lindgren wrote:
 * Robert ABEL ra...@cit-ec.uni-bielefeld.de [150227 08:00]:
 These are the changes I proposed in these patch series: [1], [2], [3], [4]
 rebased to 3.19 as well as new changes for little bugs I noticed while
 preparing this patch series as well as changes introduced via comments.

 1. DEBUG was undefined in source code -- remove offending lines
 2. add capability to have busses as children of the GPMC and multiple
devices on a bus. See [2] for an example DTS syntax.
 3. debug output was unaligned -- align it
 4. output for copy-pasting to DTS had erroneous timing outputs and
made it hard to copy-paste -- correct timing values, add comments
as DTS comments.
 5. WAITMONITORINGTIME is expressed as GPMC_CLK cycles for all accesses.
GPMCFCLKDIVIDER is used as a divider, so it must always be programmed.
 6. GPMCFCLKDIVIDER is calculated according to WAITMONITORINGTIME for
asynchronous accesses inside the driver -- asynchronous accesses now
completely decoupled from gpmc,sync-clk-ps.
 7. WAITMONITORINGTIME was being programmed/shown in GPMC_FCLK cycles instead
of GPMC_CLK cycles -- add clock domain information where necessary.
 8. Calculated values for WAITMONITORINGTIME and CLKACTIVATIONTIME that were
outside the defined range would not raise an error.
DEVICESIZE, ATTACHEDDEVICEPAGELENGTH, WAITMONITORINGTIME and
CLKACTIVATIONTIME would not be marked as incorrect on DTS output.
-- Fix all of these.
 
 Thanks for fixing all these issues:
 
 Acked-by: Tony Lindgren t...@atomide.com

Thanks. Patches are added to my git tree at
g...@github.com:rogerq/linux.git
in the branch
for-v4.1/gpmc-omap

cheers,
-roger
 
  
 [1]: https://lkml.org/lkml/2015/2/12/495
 [2]: https://lkml.org/lkml/2015/2/16/337
 [3]: https://lkml.org/lkml/2015/2/24/609
 [4]: https://lkml.org/lkml/2015/2/26/387

 Robert ABEL (9):
   ARM OMAP2+ GPMC: don't undef DEBUG
   ARM OMAP2+ GPMC: add bus children
   ARM OMAP2+ GPMC: fix debug output alignment
   ARM OMAP2+ GPMC: change get_gpmc_timing_reg output for DTS
   ARM OMAP2+ GPMC: always program GPMCFCLKDIVIDER
   ARM OMAP2+ GPMC: calculate GPMCFCLKDIVIDER based on WAITMONITORINGTIME
   ARM OMAP2+ GPMC: fix WAITMONITORINGTIME divider bug
   ARM OMAP2+ GPMC: fix programming/showing reserved timing parameters

  arch/arm/mach-omap2/gpmc-nand.c|  17 +-
  arch/arm/mach-omap2/gpmc-onenand.c |   4 +-
  arch/arm/mach-omap2/usb-tusb6010.c |   4 +-
  drivers/memory/Makefile|   2 +
  drivers/memory/omap-gpmc.c | 313 
 +
  include/linux/omap-gpmc.h  |   2 +-
  6 files changed, 265 insertions(+), 77 deletions(-)

 -- 
 2.3.0


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[PATCH 07/24] ARM: OMAP2+: clock: remove clock_common_data.c file

[Tero Kristo]

This only contains clksel tables that were used with the legacy clock data.
Now that legacy clock data is completely gone, this file can be removed
also.

Signed-off-by: Tero Kristo t-kri...@ti.com
---
 arch/arm/mach-omap2/Makefile|2 +-
 arch/arm/mach-omap2/clock.h |   14 
 arch/arm/mach-omap2/clock_common_data.c |  115 ---
 3 files changed, 1 insertion(+), 130 deletions(-)
 delete mode 100644 arch/arm/mach-omap2/clock_common_data.c

diff --git a/arch/arm/mach-omap2/Makefile b/arch/arm/mach-omap2/Makefile
index ca2f356..c172cf1 100644
--- a/arch/arm/mach-omap2/Makefile
+++ b/arch/arm/mach-omap2/Makefile
@@ -12,7 +12,7 @@ obj-y := id.o io.o control.o mux.o devices.o fb.o serial.o 
timer.o pm.o \
 
 hwmod-common   = omap_hwmod.o omap_hwmod_reset.o \
  omap_hwmod_common_data.o
-clock-common   = clock.o clock_common_data.o
+clock-common   = clock.o
 secure-common  = omap-smc.o omap-secure.o
 
 obj-$(CONFIG_ARCH_OMAP2) += $(omap-2-3-common) $(hwmod-common)
diff --git a/arch/arm/mach-omap2/clock.h b/arch/arm/mach-omap2/clock.h
index 082db14..d7c6644 100644
--- a/arch/arm/mach-omap2/clock.h
+++ b/arch/arm/mach-omap2/clock.h
@@ -204,11 +204,6 @@ extern const struct clkops clkops_omap2_dflt;
 
 extern struct clk_functions omap2_clk_functions;
 
-extern const struct clksel_rate gpt_32k_rates[];
-extern const struct clksel_rate gpt_sys_rates[];
-extern const struct clksel_rate gfx_l3_rates[];
-extern const struct clksel_rate dsp_ick_rates[];
-
 extern const struct clk_hw_omap_ops clkhwops_wait;
 extern const struct clk_hw_omap_ops clkhwops_omap3430es2_ssi_wait;
 extern const struct clk_hw_omap_ops clkhwops_omap3430es2_dss_usbhost_wait;
@@ -217,15 +212,6 @@ extern const struct clk_hw_omap_ops 
clkhwops_am35xx_ipss_module_wait;
 extern const struct clk_hw_omap_ops clkhwops_apll54;
 extern const struct clk_hw_omap_ops clkhwops_apll96;
 
-/* clksel_rate blocks shared between OMAP44xx and AM33xx */
-extern const struct clksel_rate div_1_0_rates[];
-extern const struct clksel_rate div3_1to4_rates[];
-extern const struct clksel_rate div_1_1_rates[];
-extern const struct clksel_rate div_1_2_rates[];
-extern const struct clksel_rate div_1_3_rates[];
-extern const struct clksel_rate div_1_4_rates[];
-extern const struct clksel_rate div31_1to31_rates[];
-
 extern void __iomem *clk_memmaps[];
 
 extern int omap2_clkops_enable_clkdm(struct clk_hw *hw);
diff --git a/arch/arm/mach-omap2/clock_common_data.c 
b/arch/arm/mach-omap2/clock_common_data.c
deleted file mode 100644
index 61b60df..000
--- a/arch/arm/mach-omap2/clock_common_data.c
+++ /dev/null
@@ -1,115 +0,0 @@
-/*
- *  linux/arch/arm/mach-omap2/clock_common_data.c
- *
- *  Copyright (C) 2005-2009 Texas Instruments, Inc.
- *  Copyright (C) 2004-2009 Nokia Corporation
- *
- *  Contacts:
- *  Richard Woodruff r-woodru...@ti.com
- *  Paul Walmsley
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
- *
- * This file contains clock data that is common to both the OMAP2xxx and
- * OMAP3xxx clock definition files.
- */
-
-#include clock.h
-
-/* clksel_rate data common to 24xx/343x */
-const struct clksel_rate gpt_32k_rates[] = {
-{ .div = 1, .val = 0, .flags = RATE_IN_24XX | RATE_IN_3XXX },
-{ .div = 0 }
-};
-
-const struct clksel_rate gpt_sys_rates[] = {
-{ .div = 1, .val = 1, .flags = RATE_IN_24XX | RATE_IN_3XXX },
-{ .div = 0 }
-};
-
-const struct clksel_rate gfx_l3_rates[] = {
-   { .div = 1, .val = 1, .flags = RATE_IN_24XX | RATE_IN_3XXX },
-   { .div = 2, .val = 2, .flags = RATE_IN_24XX | RATE_IN_3XXX },
-   { .div = 3, .val = 3, .flags = RATE_IN_243X | RATE_IN_3XXX },
-   { .div = 4, .val = 4, .flags = RATE_IN_243X | RATE_IN_3XXX },
-   { .div = 0 }
-};
-
-const struct clksel_rate dsp_ick_rates[] = {
-   { .div = 1, .val = 1, .flags = RATE_IN_24XX },
-   { .div = 2, .val = 2, .flags = RATE_IN_24XX },
-   { .div = 3, .val = 3, .flags = RATE_IN_243X },
-   { .div = 0 },
-};
-
-
-/* clksel_rate blocks shared between OMAP44xx and AM33xx */
-
-const struct clksel_rate div_1_0_rates[] = {
-   { .div = 1, .val = 0, .flags = RATE_IN_4430 | RATE_IN_AM33XX },
-   { .div = 0 },
-};
-
-const struct clksel_rate div3_1to4_rates[] = {
-   { .div = 1, .val = 0, .flags = RATE_IN_4430 },
-   { .div = 2, .val = 1, .flags = RATE_IN_4430 },
-   { .div = 4, .val = 2, .flags = RATE_IN_4430 },
-   { .div = 0 },
-};
-
-const struct clksel_rate div_1_1_rates[] = {
-   { .div = 1, .val = 1, .flags = RATE_IN_4430 | RATE_IN_AM33XX },
-   { .div = 0 },
-};
-
-const struct clksel_rate div_1_2_rates[] = {
-   { .div = 1, .val = 2, .flags = RATE_IN_4430 | 

[PATCH 04/24] clk: ti: move interface clock implementation under drivers/clk

[Tero Kristo]

With the legacy clock support gone, the OMAP interface clock implementation
can be moved under the clock driver. Some temporary header file tweaks are
also needed to make this change work properly.

Signed-off-by: Tero Kristo t-kri...@ti.com
---
 arch/arm/mach-omap2/Makefile|3 +-
 arch/arm/mach-omap2/clkt_iclk.c |   68 ---
 arch/arm/mach-omap2/clock.h |   11 ---
 drivers/clk/ti/Makefile |2 +-
 drivers/clk/ti/clkt_iclk.c  |   66 +
 drivers/clk/ti/clock.h  |2 ++
 include/linux/clk/ti.h  |   10 --
 7 files changed, 78 insertions(+), 84 deletions(-)
 delete mode 100644 arch/arm/mach-omap2/clkt_iclk.c
 create mode 100644 drivers/clk/ti/clkt_iclk.c

diff --git a/arch/arm/mach-omap2/Makefile b/arch/arm/mach-omap2/Makefile
index a7739a0..2a85261 100644
--- a/arch/arm/mach-omap2/Makefile
+++ b/arch/arm/mach-omap2/Makefile
@@ -185,13 +185,12 @@ obj-$(CONFIG_SOC_DRA7XX)  += 
clockdomains7xx_data.o
 obj-$(CONFIG_ARCH_OMAP2)   += $(clock-common) clock2xxx.o
 obj-$(CONFIG_ARCH_OMAP2)   += clkt2xxx_dpllcore.o
 obj-$(CONFIG_ARCH_OMAP2)   += clkt2xxx_virt_prcm_set.o
-obj-$(CONFIG_ARCH_OMAP2)   += clkt2xxx_dpll.o clkt_iclk.o
+obj-$(CONFIG_ARCH_OMAP2)   += clkt2xxx_dpll.o
 obj-$(CONFIG_SOC_OMAP2430) += clock2430.o
 obj-$(CONFIG_ARCH_OMAP3)   += $(clock-common) clock3xxx.o
 obj-$(CONFIG_ARCH_OMAP3)   += clock34xx.o clkt34xx_dpll3m2.o
 obj-$(CONFIG_ARCH_OMAP3)   += clock3517.o clock36xx.o
 obj-$(CONFIG_ARCH_OMAP3)   += dpll3xxx.o
-obj-$(CONFIG_ARCH_OMAP3)   += clkt_iclk.o
 obj-$(CONFIG_ARCH_OMAP4)   += $(clock-common)
 obj-$(CONFIG_ARCH_OMAP4)   += dpll3xxx.o
 obj-$(CONFIG_SOC_AM33XX)   += $(clock-common) dpll3xxx.o
diff --git a/arch/arm/mach-omap2/clkt_iclk.c b/arch/arm/mach-omap2/clkt_iclk.c
deleted file mode 100644
index 55eb579..000
--- a/arch/arm/mach-omap2/clkt_iclk.c
+++ /dev/null
@@ -1,68 +0,0 @@
-/*
- * OMAP2/3 interface clock control
- *
- * Copyright (C) 2011 Nokia Corporation
- * Paul Walmsley
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
- */
-#undef DEBUG
-
-#include linux/kernel.h
-#include linux/clk-provider.h
-#include linux/io.h
-
-#include clock.h
-
-/* Register offsets */
-#define CM_AUTOIDLE0x30
-#define CM_ICLKEN  0x10
-
-/* Private functions */
-
-/* XXX */
-void omap2_clkt_iclk_allow_idle(struct clk_hw_omap *clk)
-{
-   u32 v;
-   void __iomem *r;
-
-   r = (__force void __iomem *)
-   ((__force u32)clk-enable_reg ^ (CM_AUTOIDLE ^ CM_ICLKEN));
-
-   v = omap2_clk_readl(clk, r);
-   v |= (1  clk-enable_bit);
-   omap2_clk_writel(v, clk, r);
-}
-
-/* XXX */
-void omap2_clkt_iclk_deny_idle(struct clk_hw_omap *clk)
-{
-   u32 v;
-   void __iomem *r;
-
-   r = (__force void __iomem *)
-   ((__force u32)clk-enable_reg ^ (CM_AUTOIDLE ^ CM_ICLKEN));
-
-   v = omap2_clk_readl(clk, r);
-   v = ~(1  clk-enable_bit);
-   omap2_clk_writel(v, clk, r);
-}
-
-/* Public data */
-
-const struct clk_hw_omap_ops clkhwops_iclk = {
-   .allow_idle = omap2_clkt_iclk_allow_idle,
-   .deny_idle  = omap2_clkt_iclk_deny_idle,
-};
-
-const struct clk_hw_omap_ops clkhwops_iclk_wait = {
-   .allow_idle = omap2_clkt_iclk_allow_idle,
-   .deny_idle  = omap2_clkt_iclk_deny_idle,
-   .find_idlest= omap2_clk_dflt_find_idlest,
-   .find_companion = omap2_clk_dflt_find_companion,
-};
-
-
-
diff --git a/arch/arm/mach-omap2/clock.h b/arch/arm/mach-omap2/clock.h
index 2686530..e56c1df 100644
--- a/arch/arm/mach-omap2/clock.h
+++ b/arch/arm/mach-omap2/clock.h
@@ -198,16 +198,6 @@ int omap2_clksel_set_rate(struct clk_hw *hw, unsigned long 
rate,
unsigned long parent_rate);
 int omap2_clksel_set_parent(struct clk_hw *hw, u8 field_val);
 
-/* clkt_iclk.c public functions */
-extern void omap2_clkt_iclk_allow_idle(struct clk_hw_omap *clk);
-extern void omap2_clkt_iclk_deny_idle(struct clk_hw_omap *clk);
-
-void omap2_clk_dflt_find_companion(struct clk_hw_omap *clk,
-  void __iomem **other_reg,
-  u8 *other_bit);
-void omap2_clk_dflt_find_idlest(struct clk_hw_omap *clk,
-   void __iomem **idlest_reg,
-   u8 *idlest_bit, u8 *idlest_val);
 int omap2_clk_enable_autoidle_all(void);
 int omap2_clk_allow_idle(struct clk *clk);
 int omap2_clk_deny_idle(struct clk *clk);
@@ -231,7 +221,6 @@ extern const struct clksel_rate gpt_sys_rates[];
 extern const struct clksel_rate gfx_l3_rates[];
 extern const 

[PATCH 03/24] clk: ti: move OMAP4+ DPLL implementation under drivers/clk

[Tero Kristo]

With the legacy clock support gone, the OMAP4 specific DPLL implementations
can be moved under the clock driver. Change some of the function prototypes
to be static at the same time, and remove some exports from the global TI
clock driver header.

Signed-off-by: Tero Kristo t-kri...@ti.com
---
 arch/arm/mach-omap2/Makefile   |6 +-
 arch/arm/mach-omap2/clock.h|4 -
 arch/arm/mach-omap2/dpll44xx.c |  232 ---
 drivers/clk/ti/Makefile|6 +-
 drivers/clk/ti/clock.h |   14 +++
 drivers/clk/ti/dpll44xx.c  |  233 
 include/linux/clk/ti.h |   13 +--
 7 files changed, 254 insertions(+), 254 deletions(-)
 delete mode 100644 arch/arm/mach-omap2/dpll44xx.c
 create mode 100644 drivers/clk/ti/dpll44xx.c

diff --git a/arch/arm/mach-omap2/Makefile b/arch/arm/mach-omap2/Makefile
index af89278..a7739a0 100644
--- a/arch/arm/mach-omap2/Makefile
+++ b/arch/arm/mach-omap2/Makefile
@@ -193,12 +193,12 @@ obj-$(CONFIG_ARCH_OMAP3)  += clock3517.o 
clock36xx.o
 obj-$(CONFIG_ARCH_OMAP3)   += dpll3xxx.o
 obj-$(CONFIG_ARCH_OMAP3)   += clkt_iclk.o
 obj-$(CONFIG_ARCH_OMAP4)   += $(clock-common)
-obj-$(CONFIG_ARCH_OMAP4)   += dpll3xxx.o dpll44xx.o
+obj-$(CONFIG_ARCH_OMAP4)   += dpll3xxx.o
 obj-$(CONFIG_SOC_AM33XX)   += $(clock-common) dpll3xxx.o
 obj-$(CONFIG_SOC_OMAP5)+= $(clock-common)
-obj-$(CONFIG_SOC_OMAP5)+= dpll3xxx.o dpll44xx.o
+obj-$(CONFIG_SOC_OMAP5)+= dpll3xxx.o
 obj-$(CONFIG_SOC_DRA7XX)   += $(clock-common)
-obj-$(CONFIG_SOC_DRA7XX)   += dpll3xxx.o dpll44xx.o
+obj-$(CONFIG_SOC_DRA7XX)   += dpll3xxx.o
 obj-$(CONFIG_SOC_AM43XX)   += $(clock-common) dpll3xxx.o
 
 # OMAP2 clock rate set data (old OPP data)
diff --git a/arch/arm/mach-omap2/clock.h b/arch/arm/mach-omap2/clock.h
index 3649e5e..2686530 100644
--- a/arch/arm/mach-omap2/clock.h
+++ b/arch/arm/mach-omap2/clock.h
@@ -183,8 +183,6 @@ struct clksel {
 u32 omap3_dpll_autoidle_read(struct clk_hw_omap *clk);
 void omap3_dpll_allow_idle(struct clk_hw_omap *clk);
 void omap3_dpll_deny_idle(struct clk_hw_omap *clk);
-void omap4_dpllmx_allow_gatectrl(struct clk_hw_omap *clk);
-void omap4_dpllmx_deny_gatectrl(struct clk_hw_omap *clk);
 
 void __init omap2_clk_disable_clkdm_control(void);
 
@@ -204,8 +202,6 @@ int omap2_clksel_set_parent(struct clk_hw *hw, u8 
field_val);
 extern void omap2_clkt_iclk_allow_idle(struct clk_hw_omap *clk);
 extern void omap2_clkt_iclk_deny_idle(struct clk_hw_omap *clk);
 
-unsigned long omap2_get_dpll_rate(struct clk_hw_omap *clk);
-
 void omap2_clk_dflt_find_companion(struct clk_hw_omap *clk,
   void __iomem **other_reg,
   u8 *other_bit);
diff --git a/arch/arm/mach-omap2/dpll44xx.c b/arch/arm/mach-omap2/dpll44xx.c
deleted file mode 100644
index f231be0..000
--- a/arch/arm/mach-omap2/dpll44xx.c
+++ /dev/null
@@ -1,232 +0,0 @@
-/*
- * OMAP4-specific DPLL control functions
- *
- * Copyright (C) 2011 Texas Instruments, Inc.
- * Rajendra Nayak
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
- */
-
-#include linux/kernel.h
-#include linux/errno.h
-#include linux/clk.h
-#include linux/io.h
-#include linux/bitops.h
-
-#include clock.h
-
-/*
- * Maximum DPLL input frequency (FINT) and output frequency (FOUT) that
- * can supported when using the DPLL low-power mode. Frequencies are
- * defined in OMAP4430/60 Public TRM section 3.6.3.3.2 Enable Control,
- * Status, and Low-Power Operation Mode.
- */
-#define OMAP4_DPLL_LP_FINT_MAX 100
-#define OMAP4_DPLL_LP_FOUT_MAX 1
-
-/*
- * Bitfield declarations
- */
-#define OMAP4430_DPLL_CLKOUT_GATE_CTRL_MASK(1  8)
-#define OMAP4430_DPLL_CLKOUTX2_GATE_CTRL_MASK  (1  10)
-#define OMAP4430_DPLL_REGM4XEN_MASK(1  11)
-
-/* Static rate multiplier for OMAP4 REGM4XEN clocks */
-#define OMAP4430_REGM4XEN_MULT 4
-
-void omap4_dpllmx_allow_gatectrl(struct clk_hw_omap *clk)
-{
-   u32 v;
-   u32 mask;
-
-   if (!clk || !clk-clksel_reg)
-   return;
-
-   mask = clk-flags  CLOCK_CLKOUTX2 ?
-   OMAP4430_DPLL_CLKOUTX2_GATE_CTRL_MASK :
-   OMAP4430_DPLL_CLKOUT_GATE_CTRL_MASK;
-
-   v = omap2_clk_readl(clk, clk-clksel_reg);
-   /* Clear the bit to allow gatectrl */
-   v = ~mask;
-   omap2_clk_writel(v, clk, clk-clksel_reg);
-}
-
-void omap4_dpllmx_deny_gatectrl(struct clk_hw_omap *clk)
-{
-   u32 v;
-   u32 mask;
-
-   if (!clk || !clk-clksel_reg)
-   return;
-
-   mask = clk-flags  CLOCK_CLKOUTX2 ?
-   

[PATCH 06/24] ARM: OMAP2+: clk: remove obsolete clksel support code

[Tero Kristo]

The clksel clock type is no longer used for anything, it is rather
replaced with common clock divider code. Thus, remove the dead code
from kernel.

Signed-off-by: Tero Kristo t-kri...@ti.com
---
 arch/arm/mach-omap2/Makefile  |3 +-
 arch/arm/mach-omap2/clkt_clksel.c |  466 -
 arch/arm/mach-omap2/clock.h   |   12 -
 3 files changed, 1 insertion(+), 480 deletions(-)
 delete mode 100644 arch/arm/mach-omap2/clkt_clksel.c

diff --git a/arch/arm/mach-omap2/Makefile b/arch/arm/mach-omap2/Makefile
index 2a85261..ca2f356 100644
--- a/arch/arm/mach-omap2/Makefile
+++ b/arch/arm/mach-omap2/Makefile
@@ -12,8 +12,7 @@ obj-y := id.o io.o control.o mux.o devices.o fb.o serial.o 
timer.o pm.o \
 
 hwmod-common   = omap_hwmod.o omap_hwmod_reset.o \
  omap_hwmod_common_data.o
-clock-common   = clock.o clock_common_data.o \
- clkt_clksel.o
+clock-common   = clock.o clock_common_data.o
 secure-common  = omap-smc.o omap-secure.o
 
 obj-$(CONFIG_ARCH_OMAP2) += $(omap-2-3-common) $(hwmod-common)
diff --git a/arch/arm/mach-omap2/clkt_clksel.c 
b/arch/arm/mach-omap2/clkt_clksel.c
deleted file mode 100644
index 7ee2610..000
--- a/arch/arm/mach-omap2/clkt_clksel.c
+++ /dev/null
@@ -1,466 +0,0 @@
-/*
- * clkt_clksel.c - OMAP2/3/4 clksel clock functions
- *
- * Copyright (C) 2005-2008 Texas Instruments, Inc.
- * Copyright (C) 2004-2010 Nokia Corporation
- *
- * Contacts:
- * Richard Woodruff r-woodru...@ti.com
- * Paul Walmsley
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
- *
- *
- * clksel clocks are clocks that do not have a fixed parent, or that
- * can divide their parent's rate, or possibly both at the same time, based
- * on the contents of a hardware register bitfield.
- *
- * All of the various mux and divider settings can be encoded into
- * struct clksel* data structures, and then these can be autogenerated
- * from some hardware database for each new chip generation.  This
- * should avoid the need to write, review, and validate a lot of new
- * clock code for each new chip, since it can be exported from the SoC
- * design flow.  This is now done on OMAP4.
- *
- * The fusion of mux and divider clocks is a software creation.  In
- * hardware reality, the multiplexer (parent selection) and the
- * divider exist separately.  XXX At some point these clksel clocks
- * should be split into divider clocks and mux clocks to better
- * match the hardware.
- *
- * (The name clksel comes from the name of the corresponding
- * register field in the OMAP2/3 family of SoCs.)
- *
- * XXX Currently these clocks are only used in the OMAP2/3/4 code, but
- * many of the OMAP1 clocks should be convertible to use this
- * mechanism.
- */
-#undef DEBUG
-
-#include linux/kernel.h
-#include linux/errno.h
-#include linux/clk-provider.h
-#include linux/io.h
-#include linux/bug.h
-
-#include clock.h
-
-/* Private functions */
-
-/**
- * _get_clksel_by_parent() - return clksel struct for a given clk  parent
- * @clk: OMAP struct clk ptr to inspect
- * @src_clk: OMAP struct clk ptr of the parent clk to search for
- *
- * Scan the struct clksel array associated with the clock to find
- * the element associated with the supplied parent clock address.
- * Returns a pointer to the struct clksel on success or NULL on error.
- */
-static const struct clksel *_get_clksel_by_parent(struct clk_hw_omap *clk,
- struct clk *src_clk)
-{
-   const struct clksel *clks;
-
-   if (!src_clk)
-   return NULL;
-
-   for (clks = clk-clksel; clks-parent; clks++)
-   if (clks-parent == src_clk)
-   break; /* Found the requested parent */
-
-   if (!clks-parent) {
-   /* This indicates a data problem */
-   WARN(1, clock: %s: could not find parent clock %s in clksel 
array\n,
-__clk_get_name(clk-hw.clk), __clk_get_name(src_clk));
-   return NULL;
-   }
-
-   return clks;
-}
-
-/**
- * _write_clksel_reg() - program a clock's clksel register in hardware
- * @clk: struct clk * to program
- * @v: clksel bitfield value to program (with LSB at bit 0)
- *
- * Shift the clksel register bitfield value @v to its appropriate
- * location in the clksel register and write it in.  This function
- * will ensure that the write to the clksel_reg reaches its
- * destination before returning -- important since PRM and CM register
- * accesses can be quite slow compared to ARM cycles -- but does not
- * take into account any time the hardware might take to switch the
- * clock source.
- */
-static void _write_clksel_reg(struct clk_hw_omap *clk, u32 

[PATCH 02/24] clk: ti: move generic OMAP DPLL implementation under drivers/clk

[Tero Kristo]

With the legacy clock data now gone, we can start moving OMAP clock
type implementations under clock driver. Start this with moving the
generic OMAP DPLL clock type under TI clock driver.

Signed-off-by: Tero Kristo t-kri...@ti.com
---
 arch/arm/mach-omap2/Makefile|2 +-
 arch/arm/mach-omap2/clkt_dpll.c |  370 ---
 drivers/clk/ti/Makefile |3 +-
 drivers/clk/ti/clkt_dpll.c  |  369 ++
 drivers/clk/ti/clock.h  |2 +
 include/linux/clk/ti.h  |1 -
 6 files changed, 374 insertions(+), 373 deletions(-)
 delete mode 100644 arch/arm/mach-omap2/clkt_dpll.c
 create mode 100644 drivers/clk/ti/clkt_dpll.c

diff --git a/arch/arm/mach-omap2/Makefile b/arch/arm/mach-omap2/Makefile
index b83f18f..af89278 100644
--- a/arch/arm/mach-omap2/Makefile
+++ b/arch/arm/mach-omap2/Makefile
@@ -13,7 +13,7 @@ obj-y := id.o io.o control.o mux.o devices.o fb.o serial.o 
timer.o pm.o \
 hwmod-common   = omap_hwmod.o omap_hwmod_reset.o \
  omap_hwmod_common_data.o
 clock-common   = clock.o clock_common_data.o \
- clkt_dpll.o clkt_clksel.o
+ clkt_clksel.o
 secure-common  = omap-smc.o omap-secure.o
 
 obj-$(CONFIG_ARCH_OMAP2) += $(omap-2-3-common) $(hwmod-common)
diff --git a/arch/arm/mach-omap2/clkt_dpll.c b/arch/arm/mach-omap2/clkt_dpll.c
deleted file mode 100644
index 82f0600..000
--- a/arch/arm/mach-omap2/clkt_dpll.c
+++ /dev/null
@@ -1,370 +0,0 @@
-/*
- * OMAP2/3/4 DPLL clock functions
- *
- * Copyright (C) 2005-2008 Texas Instruments, Inc.
- * Copyright (C) 2004-2010 Nokia Corporation
- *
- * Contacts:
- * Richard Woodruff r-woodru...@ti.com
- * Paul Walmsley
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
- */
-#undef DEBUG
-
-#include linux/kernel.h
-#include linux/errno.h
-#include linux/clk-provider.h
-#include linux/io.h
-
-#include asm/div64.h
-
-#include clock.h
-
-/* DPLL rate rounding: minimum DPLL multiplier, divider values */
-#define DPLL_MIN_MULTIPLIER2
-#define DPLL_MIN_DIVIDER   1
-
-/* Possible error results from _dpll_test_mult */
-#define DPLL_MULT_UNDERFLOW-1
-
-/*
- * Scale factor to mitigate roundoff errors in DPLL rate rounding.
- * The higher the scale factor, the greater the risk of arithmetic overflow,
- * but the closer the rounded rate to the target rate.  DPLL_SCALE_FACTOR
- * must be a power of DPLL_SCALE_BASE.
- */
-#define DPLL_SCALE_FACTOR  64
-#define DPLL_SCALE_BASE2
-#define DPLL_ROUNDING_VAL  ((DPLL_SCALE_BASE / 2) * \
-(DPLL_SCALE_FACTOR / DPLL_SCALE_BASE))
-
-/*
- * DPLL valid Fint frequency range for OMAP36xx and OMAP4xxx.
- * From device data manual section 4.3 DPLL and DLL Specifications.
- */
-#define OMAP3PLUS_DPLL_FINT_JTYPE_MIN  50
-#define OMAP3PLUS_DPLL_FINT_JTYPE_MAX  250
-
-/* _dpll_test_fint() return codes */
-#define DPLL_FINT_UNDERFLOW-1
-#define DPLL_FINT_INVALID  -2
-
-/* Private functions */
-
-/*
- * _dpll_test_fint - test whether an Fint value is valid for the DPLL
- * @clk: DPLL struct clk to test
- * @n: divider value (N) to test
- *
- * Tests whether a particular divider @n will result in a valid DPLL
- * internal clock frequency Fint. See the 34xx TRM 4.7.6.2 DPLL Jitter
- * Correction.  Returns 0 if OK, -1 if the enclosing loop can terminate
- * (assuming that it is counting N upwards), or -2 if the enclosing loop
- * should skip to the next iteration (again assuming N is increasing).
- */
-static int _dpll_test_fint(struct clk_hw_omap *clk, unsigned int n)
-{
-   struct dpll_data *dd;
-   long fint, fint_min, fint_max;
-   int ret = 0;
-
-   dd = clk-dpll_data;
-
-   /* DPLL divider must result in a valid jitter correction val */
-   fint = __clk_get_rate(__clk_get_parent(clk-hw.clk)) / n;
-
-   if (dd-flags  DPLL_J_TYPE) {
-   fint_min = OMAP3PLUS_DPLL_FINT_JTYPE_MIN;
-   fint_max = OMAP3PLUS_DPLL_FINT_JTYPE_MAX;
-   } else {
-   fint_min = ti_clk_get_features()-fint_min;
-   fint_max = ti_clk_get_features()-fint_max;
-   }
-
-   if (!fint_min || !fint_max) {
-   WARN(1, No fint limits available!\n);
-   return DPLL_FINT_INVALID;
-   }
-
-   if (fint  ti_clk_get_features()-fint_min) {
-   pr_debug(rejecting n=%d due to Fint failure, lowering 
max_divider\n,
-n);
-   dd-max_divider = n;
-   ret = DPLL_FINT_UNDERFLOW;
-   } else if (fint  ti_clk_get_features()-fint_max) {
-   

[PATCH 01/24] ARM: OMAP2+: clock: export driver API to setup/get clock features

[Tero Kristo]

As most of the clock driver support code is going to be moved under
drivers/clk/ti, an API for setting / getting the SoC specific clock
features is needed. This patch provides this API and changes the
existing code to use it.

Signed-off-by: Tero Kristo t-kri...@ti.com
---
 arch/arm/mach-omap2/clkt_dpll.c |   14 +++---
 arch/arm/mach-omap2/clock.c |   36 +---
 arch/arm/mach-omap2/clock.h |   18 --
 arch/arm/mach-omap2/clock3xxx.c |4 ++--
 arch/arm/mach-omap2/dpll3xxx.c  |4 ++--
 drivers/clk/ti/clk.c|   25 +
 include/linux/clk/ti.h  |   16 
 7 files changed, 69 insertions(+), 48 deletions(-)

diff --git a/arch/arm/mach-omap2/clkt_dpll.c b/arch/arm/mach-omap2/clkt_dpll.c
index f251a14..82f0600 100644
--- a/arch/arm/mach-omap2/clkt_dpll.c
+++ b/arch/arm/mach-omap2/clkt_dpll.c
@@ -80,8 +80,8 @@ static int _dpll_test_fint(struct clk_hw_omap *clk, unsigned 
int n)
fint_min = OMAP3PLUS_DPLL_FINT_JTYPE_MIN;
fint_max = OMAP3PLUS_DPLL_FINT_JTYPE_MAX;
} else {
-   fint_min = ti_clk_features.fint_min;
-   fint_max = ti_clk_features.fint_max;
+   fint_min = ti_clk_get_features()-fint_min;
+   fint_max = ti_clk_get_features()-fint_max;
}
 
if (!fint_min || !fint_max) {
@@ -89,18 +89,18 @@ static int _dpll_test_fint(struct clk_hw_omap *clk, 
unsigned int n)
return DPLL_FINT_INVALID;
}
 
-   if (fint  ti_clk_features.fint_min) {
+   if (fint  ti_clk_get_features()-fint_min) {
pr_debug(rejecting n=%d due to Fint failure, lowering 
max_divider\n,
 n);
dd-max_divider = n;
ret = DPLL_FINT_UNDERFLOW;
-   } else if (fint  ti_clk_features.fint_max) {
+   } else if (fint  ti_clk_get_features()-fint_max) {
pr_debug(rejecting n=%d due to Fint failure, boosting 
min_divider\n,
 n);
dd-min_divider = n;
ret = DPLL_FINT_INVALID;
-   } else if (fint  ti_clk_features.fint_band1_max 
-  fint  ti_clk_features.fint_band2_min) {
+   } else if (fint  ti_clk_get_features()-fint_band1_max 
+  fint  ti_clk_get_features()-fint_band2_min) {
pr_debug(rejecting n=%d due to Fint failure\n, n);
ret = DPLL_FINT_INVALID;
}
@@ -183,7 +183,7 @@ static int _omap2_dpll_is_in_bypass(u32 v)
 {
u8 mask, val;
 
-   mask = ti_clk_features.dpll_bypass_vals;
+   mask = ti_clk_get_features()-dpll_bypass_vals;
 
/*
 * Each set bit in the mask corresponds to a bypass value equal
diff --git a/arch/arm/mach-omap2/clock.c b/arch/arm/mach-omap2/clock.c
index 6124db5..1d87860 100644
--- a/arch/arm/mach-omap2/clock.c
+++ b/arch/arm/mach-omap2/clock.c
@@ -45,11 +45,6 @@
 
 u16 cpu_mask;
 
-/*
- * Clock features setup. Used instead of CPU type checks.
- */
-struct ti_clk_features ti_clk_features;
-
 /* DPLL valid Fint frequency band limits - from 34xx TRM Section 4.7.6.2 */
 #define OMAP3430_DPLL_FINT_BAND1_MIN   75
 #define OMAP3430_DPLL_FINT_BAND1_MAX   210
@@ -284,7 +279,7 @@ void omap2_clk_dflt_find_idlest(struct clk_hw_omap *clk,
 * 34xx reverses this, just to keep us on our toes
 * AM35xx uses both, depending on the module.
 */
-   *idlest_val = ti_clk_features.cm_idlest_val;
+   *idlest_val = ti_clk_get_features()-cm_idlest_val;
 }
 
 /**
@@ -718,29 +713,30 @@ void __init omap2_clk_print_new_rates(const char 
*hfclkin_ck_name,
  */
 void __init ti_clk_init_features(void)
 {
+   struct ti_clk_features features = { 0 };
/* Fint setup for DPLLs */
if (cpu_is_omap3430()) {
-   ti_clk_features.fint_min = OMAP3430_DPLL_FINT_BAND1_MIN;
-   ti_clk_features.fint_max = OMAP3430_DPLL_FINT_BAND2_MAX;
-   ti_clk_features.fint_band1_max = OMAP3430_DPLL_FINT_BAND1_MAX;
-   ti_clk_features.fint_band2_min = OMAP3430_DPLL_FINT_BAND2_MIN;
+   features.fint_min = OMAP3430_DPLL_FINT_BAND1_MIN;
+   features.fint_max = OMAP3430_DPLL_FINT_BAND2_MAX;
+   features.fint_band1_max = OMAP3430_DPLL_FINT_BAND1_MAX;
+   features.fint_band2_min = OMAP3430_DPLL_FINT_BAND2_MIN;
} else {
-   ti_clk_features.fint_min = OMAP3PLUS_DPLL_FINT_MIN;
-   ti_clk_features.fint_max = OMAP3PLUS_DPLL_FINT_MAX;
+   features.fint_min = OMAP3PLUS_DPLL_FINT_MIN;
+   features.fint_max = OMAP3PLUS_DPLL_FINT_MAX;
}
 
/* Bypass value setup for DPLLs */
if (cpu_is_omap24xx()) {
-   ti_clk_features.dpll_bypass_vals |=
+   features.dpll_bypass_vals |=
(1  OMAP2XXX_EN_DPLL_LPBYPASS) |
(1  

[PATCH 00/24] ARM: OMAP2+: move clock implementations under clock driver

[Tero Kristo]

Hi,

This set moves almost all the legacy OMAP2+ clock driver implementations
under TI clock driver itself. Some non-used code is deleted at the same time.

This set touches both mach-omap2 folder + drivers/clk/ti, and should be
merged either through the clock tree or omap tree. Separating the set
for two pull-requests is not possible due to inter-dependencies (move
of code from one location to another.)

Please note that patches 12+13 will cause merge conflicts with the PRCM +
SCM set I posted earlier, as both are touching ti_clk_ll_ops. I have
pushed a separate sample branch that has the merge conflicts resolved also
(see info below; same test set has also been executed with the merged
branch.)

Testing done:
- am335x-evm:  boot
- am335x-sk:  boot
- am3517-evm:  boot
- am43xx-gpevm:  boot
- omap3-beagle-xm:  boot
- omap3-beagle:  boot, suspend-resume (ret/off), cpuidle (ret/off)
- beaglebone-black:  boot
- beaglebone:  boot
- dra7xx-evm:  boot
- n900:  boot
- omap5-uevm:  boot
- omap4-panda-es:  boot, suspend-resume (ret), cpuidle (ret)
- omap4-panda:  boot
- omap2430-sdp:  boot
- omap3430-sdp:  boot
- omap4430-sdp:  boot

Branch info:
- tree: https://github.com/t-kristo/linux-pm.git
- branch: 4.0-rc1-clock-move
- merged PRCM branch: 4.0-rc1-clock-move-prcm-cleanup

Bloat-o-meter:
add/remove: 2/33 grow/shrink: 32/6 up/down: 935/-3201 (-2266)

Overall diffstat:
 43 files changed, 2531 insertions(+), 3599 deletions(-)

-Tero

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[PATCH 05/24] ARM: OMAP3: dpll3-m2: get rid of obsolete omap2_clksel_round_rate_div call

[Tero Kristo]

Core DVFS support code is currently referencing clksel functionality, which
is wrong. The m2 divisor has been implemented as a divider clock for a long
time already, so replace the validrate check call with proper functionality.
Core DVFS is currently not supported in the kernel so verifying this patch
can be rather tricky, this should probably be fixed at some point.

Signed-off-by: Tero Kristo t-kri...@ti.com
---
 arch/arm/mach-omap2/clkt34xx_dpll3m2.c |4 +++-
 1 file changed, 3 insertions(+), 1 deletion(-)

diff --git a/arch/arm/mach-omap2/clkt34xx_dpll3m2.c 
b/arch/arm/mach-omap2/clkt34xx_dpll3m2.c
index eb69acf..825e3da 100644
--- a/arch/arm/mach-omap2/clkt34xx_dpll3m2.c
+++ b/arch/arm/mach-omap2/clkt34xx_dpll3m2.c
@@ -60,7 +60,9 @@ int omap3_core_dpll_m2_set_rate(struct clk_hw *hw, unsigned 
long rate,
if (!clk || !rate)
return -EINVAL;
 
-   validrate = omap2_clksel_round_rate_div(clk, rate, new_div);
+   new_div = DIV_ROUND_UP(parent_rate, rate);
+   validrate = parent_rate / new_div;
+
if (validrate != rate)
return -EINVAL;
 
-- 
1.7.9.5

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Re: [PATCH 1/4] PM / Wakeirq: Add minimal device wakeirq helper functions

[Rafael J. Wysocki]

On Fri, Mar 6, 2015 at 3:02 AM, Rafael J. Wysocki r...@rjwysocki.net wrote:
 Please always CC linux-pm on CC patches.

Doh.  That was supposed to say Please always CC linux-pm on PM patches.

I really should not reply to email when I'm too tired ...
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Re: [PATCH v2] ARM: dts: am335x-bone-common: enable aes and sham

[Tony Lindgren]

* Robert Nelson robertcnel...@gmail.com [150225 11:13]:
 On Wed, Feb 25, 2015 at 12:52 PM, Matt Porter mpor...@konsulko.com wrote:
  Beaglebone Black doesn't have AES and SHAM enabled like the
  original Beaglebone White dts. This breaks applications that
  leverage the crypto blocks so fix this by enabling these nodes
  in the am335x-bone-common.dtsi. With this change, enabling the
  nodes in am335x-bone.dts is no longer required so remove them.
 
  Signed-off-by: Matt Porter mpor...@konsulko.com
 
 Looks good! Wonder why didn't we do this sooner! ;)
 
 Acked-by: Robert Nelson robertcnel...@gmail.com

Applying both into omap-for-v4.0/fixes thanks.

Tony
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Re: [PATCH v2 7/7] ARM: dts: am335x-boneblack: Use new binding for HDMI

[Tony Lindgren]

* Jyri Sarha jsa...@ti.com [150306 07:57]:
 On 03/06/15 17:36, Tony Lindgren wrote:
 * Jyri Sarha jsa...@ti.com [150306 07:37]:
 Use new binding for the external tda19988 HDMI encoder.
 
 Can this be merged separately after the driver code is
 merged with things still working?
 
 
 Yes absolutely. That is why DRM_TILCDC_SLAVE_COMPAT is there for.

Great, thanks for sorting it out properly. Please ping me to
apply this patch when the driver changes are in Linux next.

Regards,

Tony
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Re: [PATCH] ARM: dts: am335x-lxm: Use rmii-clock-ext

[Tony Lindgren]

* George McCollister george.mccollis...@gmail.com [150226 08:53]:
 Use external clock for RMII since the internal clock doesn't meet the
 jitter requirements.
 
 Signed-off-by: George McCollister george.mccollis...@gmail.com
 ---
  arch/arm/boot/dts/am335x-lxm.dts | 4 
  1 file changed, 4 insertions(+)
 
 diff --git a/arch/arm/boot/dts/am335x-lxm.dts 
 b/arch/arm/boot/dts/am335x-lxm.dts
 index 7266a00..5c5667a 100644
 --- a/arch/arm/boot/dts/am335x-lxm.dts
 +++ b/arch/arm/boot/dts/am335x-lxm.dts
 @@ -328,6 +328,10 @@
   dual_emac_res_vlan = 3;
  };
  
 +phy_sel {
 + rmii-clock-ext;
 +};
 +
  mac {
   pinctrl-names = default, sleep;
   pinctrl-0 = cpsw_default;

Applying into omap-for-v4.0/fixes thanks.

Tony
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Re: [PATCH 11/24] ARM: OMAP2+: clock: remove support for legacy mpurate command line param

[Tero Kristo]

On 03/06/2015 05:32 PM, Tony Lindgren wrote:

* Tero Kristo t-kri...@ti.com [150306 04:29]:

The legacy support is wrong and dangerous, as it doesn't take any
OPPs into account and does not scale voltages. Switching mpurate should
be handled through cpufreq.


Hmm I wonder if some systems actually rely on the mpurate cmdline
parameter. If this cannot be fixed properly, you should at least
print an error here.


Yea, I was kind of worried about this comment. We have also an option of 
doing this through clock driver, but I was hesitant of doing this 
either. Isn't having a global kernel option like this frowned upon 
anyway? I believe this piece of init code gets executed on every board 
on multiarch kernel.


-Tero
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Re: [PATCH 11/24] ARM: OMAP2+: clock: remove support for legacy mpurate command line param

[Tony Lindgren]

* Tero Kristo t-kri...@ti.com [150306 08:10]:
 On 03/06/2015 05:32 PM, Tony Lindgren wrote:
 * Tero Kristo t-kri...@ti.com [150306 04:29]:
 The legacy support is wrong and dangerous, as it doesn't take any
 OPPs into account and does not scale voltages. Switching mpurate should
 be handled through cpufreq.
 
 Hmm I wonder if some systems actually rely on the mpurate cmdline
 parameter. If this cannot be fixed properly, you should at least
 print an error here.
 
 Yea, I was kind of worried about this comment. We have also an option of
 doing this through clock driver, but I was hesitant of doing this either.
 Isn't having a global kernel option like this frowned upon anyway? I believe
 this piece of init code gets executed on every board on multiarch kernel.

Well the option has been there probably for 10 years already so we
can't just drop it like that. Chances are it's unused though, so I
suggest you just print out a warning for it.

It's called from omap_arch_initcall which checks for soc_is_omap()
so that's not an issue. But when moving the code, you naturally
need to check the moved code initcall usage.

Regards,

Tony
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Re: [PATCH] ARM: dts: OMAP5: fix polling intervals for thermal zones

[Tony Lindgren]

* Eduardo Valentin edubez...@gmail.com [150227 13:39]:
 On Fri, Feb 27, 2015 at 03:59:03PM +0200, Tero Kristo wrote:
  OMAP4 has a finer counter granularity, which allows for a delay of 1000ms
  in the thermal zone polling intervals. OMAP5 has a different counter
  mechanism, which allows at maximum a 500ms timer. Adjust the cpu thermal
  zone polling interval accordingly.
  
  Without this patch, the polling interval information is simply ignored,
  and the following thermal warnings are printed during boot (assuming
  thermal is enabled);
  
  [1.545343] ti-soc-thermal 4a0021e0.bandgap: Delay 1000 ms is not 
  supported
  [1.552691] ti-soc-thermal 4a0021e0.bandgap: Delay 1000 ms is not 
  supported
  [1.560029] ti-soc-thermal 4a0021e0.bandgap: Delay 1000 ms is not 
  supported
  
  Signed-off-by: Tero Kristo t-kri...@ti.com
  Cc: Tony Lindgren t...@atomide.com
 
 Acked-by: Eduardo Valentin edubez...@gmail.com

Applying into omap-for-v4.0/fixes thanks.

Tony
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Re: [PATCH 0/2] pinctrl: dt-bindings: Fix amx3 SLEWCTRL_FAST binding

[Tony Lindgren]

* Dave Gerlach d-gerl...@ti.com [150227 17:14]:
 Currently both am33xx and am43xx have the macro for SLEWCTRL_FAST
 in pinctrl dt-bindings reversed so that selecting the macro actually
 sets SLEWCTRL_SLOW in the pad control registers. These patches
 correct the bindings but leave the pinctrl states that use the binding
 *UNMODIFIED*. Previously i2c and mdio on am33xx and i2c, mdio, and
 uart on am43xx had been using this macro and selecting SLEWCTRL_FAST
 while actually programming SLEWCTRL_SLOW in the pad config registers.
 
 Because the intended selection was SLEWCTRL_FAST the macros are
 unchanged. I tested on am335x-gp-evm and am437x-gp-evm with no
 difference in functionality seen.

Applying both into omap-for-v4.0/fixes thanks.

Tony
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Re: [PATCH v2 7/7] ARM: dts: am335x-boneblack: Use new binding for HDMI

[Jyri Sarha]

On 03/06/15 17:36, Tony Lindgren wrote:

* Jyri Sarha jsa...@ti.com [150306 07:37]:

Use new binding for the external tda19988 HDMI encoder.


Can this be merged separately after the driver code is
merged with things still working?



Yes absolutely. That is why DRM_TILCDC_SLAVE_COMPAT is there for.

Cheers,
Jyri
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Re: [PATCH 0/2] fix ehrpwm tbclk data on am33xx and am43xx

[Tony Lindgren]

* Tero Kristo t-kri...@ti.com [150224 23:39]:
 On 02/24/2015 07:15 PM, Tony Lindgren wrote:
 * Vignesh R vigne...@ti.com [150209 22:43]:
 In am33xx and am43xx, ehrpwm tbclk is derived from functional clock of
 PWMSS. The schematics and TRMs show that there is only one input clock to
 the PWMSS. But currently, tbclk is wrongly shown to be deriving from
 dpll_per_m2_ck instead of functional clock l4ls_gclk in the DT.
 
 Fixing ehrpwm tbclk data to reflect the right clk source.
 Tested on beaglebone and am437x-gp-evm.
 
 Vignesh R (2):
ARM: dts: am33xx-clocks: Fix ehrpwm tbclk data on am33xx
ARM: dts: am43xx-clocks: Fix ehrpwm tbclk data on am43xx
 
   arch/arm/boot/dts/am33xx-clocks.dtsi |  6 +++---
   arch/arm/boot/dts/am43xx-clocks.dtsi | 12 ++--
   2 files changed, 9 insertions(+), 9 deletions(-)
 
 Tero, care to check this one too and ack if OK?
 
 These look fine also, just verified from TRM. These two were actually buried
 in my mailbox, sorry about that.
 
 Acked-by: Tero Kristo t-kri...@ti.com

Thanks applying both into omap-for-v4.0/fixes.

Tony 
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Re: [PATCH v2 7/7] ARM: dts: am335x-boneblack: Use new binding for HDMI

[Tony Lindgren]

* Jyri Sarha jsa...@ti.com [150306 07:37]:
 Use new binding for the external tda19988 HDMI encoder.

Can this be merged separately after the driver code is
merged with things still working?

Otherwise we can have glitches with the output working and
have dependencies between kernel branches.

Regards,

Tony

 Signed-off-by: Jyri Sarha jsa...@ti.com
 ---
  arch/arm/boot/dts/am335x-boneblack.dts | 20 +++-
  1 file changed, 15 insertions(+), 5 deletions(-)
 
 diff --git a/arch/arm/boot/dts/am335x-boneblack.dts 
 b/arch/arm/boot/dts/am335x-boneblack.dts
 index 5c42d25..eadbba3 100644
 --- a/arch/arm/boot/dts/am335x-boneblack.dts
 +++ b/arch/arm/boot/dts/am335x-boneblack.dts
 @@ -68,16 +68,26 @@
  
  lcdc {
   status = okay;
 + port {
 + lcdc_0: endpoint@0 {
 + remote-endpoint = hdmi_0;
 + };
 + };
  };
  
 -/ {
 - hdmi {
 - compatible = ti,tilcdc,slave;
 - i2c = i2c0;
 +i2c0 {
 + tda19988 {
 + compatible = nxp,tda998x;
 + reg = 0x70;
   pinctrl-names = default, off;
   pinctrl-0 = nxp_hdmi_bonelt_pins;
   pinctrl-1 = nxp_hdmi_bonelt_off_pins;
 - status = okay;
 +
 + port {
 + hdmi_0: endpoint@0 {
 + remote-endpoint = lcdc_0;
 + };
 + };
   };
  };
  
 -- 
 1.9.1
 
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Re: [PATCH 1/4] PM / Wakeirq: Add minimal device wakeirq helper functions

[Tony Lindgren]

Hi,

* Rafael J. Wysocki r...@rjwysocki.net [150305 17:38]:
 Please always CC linux-pm on CC patches.

Sure will do for the next rev, sorry forgot to add that.
 
 On Thursday, March 05, 2015 04:34:06 PM Tony Lindgren wrote:
  +/**
  + * handle_dedicated_wakeirq - Handler for device wake-up interrupts
  + * @wakeirq: Separate wake-up interrupt for a device different
  + * @_wirq: Wake-up interrupt data
  + *
  + * Some devices have a separate wake-up interrupt in addition to the
  + * regular device interrupt. The wake-up interrupts signal that the
  + * device should be woken up from a deeper idle state. This handler
  + * uses device specific pm_runtime functions to wake-up the device
  + * and then it's up to the device to do whatever it needs to. Note
  + * as the device may need to restore context and start up regulators,
  + * this is not a fast path.
  + *
  + * Note that we are not resending the lost device interrupts. We assume
  + * that the wake-up interrupt just needs to wake-up the device, and
  + * the device pm_runtime_resume() can deal with the situation.
  + */
  +static irqreturn_t handle_dedicated_wakeirq(int wakeirq, void *_wirq)
  +{
  +   struct wakeirq_source *wirq = _wirq;
  +   irqreturn_t ret = IRQ_NONE;
  +
  +   /* We don't want RPM_ASYNC or RPM_NOWAIT here */
  +   if (pm_runtime_suspended(wirq-dev)) {
 
 What if the device is resumed on a different CPU right here?

Good point, sounds like we need to do this in some pm_runtime
function directly for the locking.
 
  +   pm_runtime_mark_last_busy(wirq-dev);
  +   pm_runtime_resume(wirq-dev);
 
 Calling this with disabled interrupts is a bad idea in general.
 Is the device guaranteed to have power.irq_safe set?

Well right now it's using threaded irq, and I'd like to get rid of
the pm_runtime calls in the regular driver interrupts completely.
We need to ensure the device runtime_resume is completed before
returning IRQ_HANDLED here.
 
 I guess what you want to call here is pm_request_resume() and
 I wouldn't say that calling pm_runtime_mark_last_busy() on a
 suspended device was valid.

I'll verify again, but I believe the issue was that without doing
mark_last_busy here the device falls back asleep right away.
That probably should be fixed in pm_runtime in general if that's
the case.

Considering the above, should we add a new function something like
pm_resume_complete() that does not need irq_safe set but does
not return until the device has completed resume?

I think that would be pretty much probably just pm_request_resume
+ pm_runtime_barrier.

  +/**
  + * dev_pm_wakeirq_arm_for_suspend - Configure device wake-up
  + * @wirq: Device wake-up interrupt
  + *
  + * Called from the bus code or the device driver for
  + * device suspend(). Just sets up the wake-up event
  + * conditionally based on the device_may_wake(). The
  + * rest is handled automatically by the generic suspend()
  + * code and runtime_suspend().
  + */
  +void dev_pm_wakeirq_arm_for_suspend(struct wakeirq_source *wirq)
  +{
  +   if (is_invalid_wakeirq(wirq))
  +   return;
  +
  +   irq_set_irq_wake(wirq-wakeirq,
  +device_may_wakeup(wirq-dev));
 
 You want to do
 
   if (device_may_wakeup(wirq-dev))
   enable_irq_wake(wirq-wakeirq);
 
 here or strange things may happen if two devices share a wakeup IRQ.

OK sure.
 
 Also instead of doing it this way, I'd prefer to hook system wakeup
 interrupts into the wakeup source objects pointed to by the power.wakeup
 fields in struct device.
 
 Then we could just walk the list of wakeup sources and do enable_irq_wake()
 automatically for the wakeup interrupts hooked up to them at the
 suspend_device_irqs() time without the need to do anything from drivers
 at suspend time.

OK that's a good idea. Then we can drop dev_pm_wakeirq_arm_for_suspend()
and make that part automatic.

Then for runtime_pm, we could make the toggling of the wakeirq handling
automatic too. Or do you see a problem with that?

  +struct wakeirq_source {
  +   struct device *dev;
  +   int wakeirq;
  +   bool initialized;
  +   bool enabled;
  +   irq_handler_t handler;
  +   void *data;
  +};
 
 Well, so now we have struct wakeup_source already and here we get struct 
 wakeirq_source
 and they mean different things ...

Well I was trying to keep it out of the way for most drivers not needing
to use wakeirqs. I'll take a look at making it a pointer in the struct
wakeup_source.

Regards,

Tony
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Re: [PATCH 0/2] ARM: DRA7x/OMAP5: Clock: DPLL Clock fixes

[Tony Lindgren]

* Tero Kristo t-kri...@ti.com [150225 00:05]:
 On 02/24/2015 06:27 PM, Tony Lindgren wrote:
 * Ravikumar Kattekola r...@ti.com [150219 08:13]:
 On 1/31/2015 10:36 PM, Ravikumar Kattekola wrote:
 Fix bypass clock source for a few DPLLs.
 
 On DRA7x/OMAP5, for a few DPLLs, both CLKINP and CLKINPULOW are connected
 to a mux and the output from mux is routed to the bypass clkout.
 Add a mux-clock as bypass clock with CLKINP and CLKINPULOW as parents.
 
 Tested against:
tree: https://git.kernel.org/cgit/linux/kernel/git/torvalds/linux.git
branch: master
 On:
 CPU  : OMAP5432 ES2.0
 Board: OMAP5432 uEVM
 and
 CPU  : DRA752 ES1.0
 Board: DRA7xx
 
 
 Ravikumar Kattekola (2):
ARM: DRA7x: dts: Fix the bypass clock source for dpll_iva and others
ARM: OMAP5: dts: Fix the bypass clock source for dpll_iva and others
 
   arch/arm/boot/dts/dra7xx-clocks.dtsi   |   90 
  
   arch/arm/boot/dts/omap54xx-clocks.dtsi |   41 +--
   2 files changed, 118 insertions(+), 13 deletions(-)
 
 Hi Benoit,
  Can these fixes be looked into for 3.20-rc?
 
 Seem like valid fixes to me. Tero, care to take a look at these and ack
 if OK?
 
 Yes, both are good to go.
 
 Acked-by: Tero Kristo t-kri...@ti.com

Applying both into omap-for-v4.0/fixes thanks.

Tony 
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Re: [PATCH RFC 3/6] drm/tilcdc: Add support for external compontised DRM encoder

[Russell King - ARM Linux]

On Fri, Mar 06, 2015 at 10:33:27AM +0200, Jyri Sarha wrote:
 Would it be Ok to add a check that master-ops-add_components is defined,
 before calling it in find_componets() (drivers/base/component.c:120) and
 return 0 if it is not?

No:

http://ftp.arm.linux.org.uk/cgit/linux-arm.git/commit/?h=8c4e8764a7e3

also:

http://ftp.arm.linux.org.uk/cgit/linux-arm.git/log/?h=11eda5aaf41e

is what's planned to be merged when I can get a round tuit, and people
stop using the old methods.

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Re: [PATCH RFC 3/6] drm/tilcdc: Add support for external compontised DRM encoder

[Jyri Sarha]

On 03/06/15 11:58, Russell King - ARM Linux wrote:

On Fri, Mar 06, 2015 at 10:33:27AM +0200, Jyri Sarha wrote:

Would it be Ok to add a check that master-ops-add_components is defined,
before calling it in find_componets() (drivers/base/component.c:120) and
return 0 if it is not?


No:

http://ftp.arm.linux.org.uk/cgit/linux-arm.git/commit/?h=8c4e8764a7e3

also:

http://ftp.arm.linux.org.uk/cgit/linux-arm.git/log/?h=11eda5aaf41e

is what's planned to be merged when I can get a round tuit, and people
stop using the old methods.



Ok, but could it still be allowed to add a master without any components 
(match == NULL)?


Or do I have to handle the configurations without any components separately?

Best regards,
Jyri
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Re: [PATCH RFC 3/6] drm/tilcdc: Add support for external compontised DRM encoder

[Russell King - ARM Linux]

On Fri, Mar 06, 2015 at 12:21:42PM +0200, Jyri Sarha wrote:
 On 03/06/15 11:58, Russell King - ARM Linux wrote:
 On Fri, Mar 06, 2015 at 10:33:27AM +0200, Jyri Sarha wrote:
 Would it be Ok to add a check that master-ops-add_components is defined,
 before calling it in find_componets() (drivers/base/component.c:120) and
 return 0 if it is not?
 
 No:
 
 http://ftp.arm.linux.org.uk/cgit/linux-arm.git/commit/?h=8c4e8764a7e3
 
 also:
 
 http://ftp.arm.linux.org.uk/cgit/linux-arm.git/log/?h=11eda5aaf41e
 
 is what's planned to be merged when I can get a round tuit, and people
 stop using the old methods.
 
 
 Ok, but could it still be allowed to add a master without any components
 (match == NULL)?
 
 Or do I have to handle the configurations without any components separately?

That's not a decision I want to make in my current state.  Give me a
couple of week or two and re-ping me.

http://archive.arm.linux.org.uk/lurker/message/20150306.102749.fcabd2bf.en.html

(and the reason becomes self-evident when you realise that message did
not go to the right list on Tuesday evening when it was meant to.)

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Right interface for cellphone modem audio (was Re: [PATCHv2 0/2] N900 Modem Speech Support)

[Pavel Machek]

Hi!

 Userland access goes via /dev/cmt_speech. The API is implemented in
 libcmtspeechdata, which is used by ofono and the freesmartphone.org project.
 Yes, the ABI is tested for some years, but it is not documented, and
 it is very wrong ABI.
 
 I'm not sure what they do with the read(). I was assuming it is
 meant for passing voice data, but it can return at most 4 bytes,
 AFAICT.
 
 We already have perfectly good ABI for passing voice data around. It
 is called ALSA. libcmtspeech will then become unneccessary, and the
 daemon routing voice data will be as simple as read sample from
 
 I'm no longer involved with cmt_speech (with this driver nor modems in
 general), but let me clarify some bits about the design.

Thanks a lot for your insights; high level design decisions are quite
hard to understand from C code.

 First, the team that designed the driver and the stack above had a lot of
 folks working also with ALSA (and the ALSA drivers have been merged to
 mainline long ago) and we considered ALSA on multiple occasions as the
 interface for this as well.
 
 Our take was that ALSA is not the right interface for cmt_speech. The
 cmt_speech interface in the modem is _not_ a PCM interface as modelled by
 ALSA. Specifically:
 
 - the interface is lossy in both directions
 - data is sent in packets, not a stream of samples (could be other things
   than PCM samples), with timing and meta-data
 - timing of uplink is of utmost importance

I see that you may not have data available in downlink scenario, but
how is it lossy in uplink scenario? Phone should always try to fill
the uplink, no? (Or do you detect silence and not transmit in this
case?) (Actually, I guess applications should be ready for data not
ready case even on normal hardware due to differing clocks.)

Packets vs. stream of samples... does userland need to know about the
packets? Could we simply hide it from the userland? As userland daemon
is (supposed to be) realtime, do we really need extra set of
timestamps? What other metadata are there?

Uplink timing... As the daemon is realtime, can it just send the data
at the right time? Also normally uplink would be filled, no?

 Some definite similarities:
  - the mmap interface to manage the PCM buffers (that is on purpose
similar to that of ALSA)
 
 The interface was designed so that the audio mixer (e.g. Pulseaudio) is run
 with a soft real-time SCHED_FIFO/RR user-space thread that has full control
 over _when_ voice _packets_ are sent, and can receive packets with meta-data
 (see libcmtspeechdata interface, cmtspeech.h), and can detect and handle
 gaps in the received packets.

Well, packets are of fixed size, right? So the userland can simply
supply the right size in the common case. As for sending at the right
time... well... if the userspace is already real-time, that should be
easy. 

Now, there's a difference in the downlink. Maybe ALSA people have an
idea what to do in this case? Perhaps we can just provide artificial
zero data?

 This is very different from modems that offer an actual PCM voice link for
 example over I2S to the application processor (there are lots of these on
 the market). When you walk out of coverage during a call with these modems,
 you'll still get samples over I2S, but not so with cmt_speech, so ALSA is
 not the right interface.

Yes, understood.

 Now, I'm not saying the interface is perfect, but just to give a bit of
 background, why a custom char-device interface was chosen.

Thanks and best regards,
Pavel
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Re: [PATCH 1/4] PM / Wakeirq: Add minimal device wakeirq helper functions

[Alan Stern]

On Fri, 6 Mar 2015, Tony Lindgren wrote:

   + struct wakeirq_source *wirq = _wirq;
   + irqreturn_t ret = IRQ_NONE;
   +
   + /* We don't want RPM_ASYNC or RPM_NOWAIT here */
   + if (pm_runtime_suspended(wirq-dev)) {
  
  What if the device is resumed on a different CPU right here?
 
 Good point, sounds like we need to do this in some pm_runtime
 function directly for the locking.
  
   + pm_runtime_mark_last_busy(wirq-dev);
   + pm_runtime_resume(wirq-dev);
  
  Calling this with disabled interrupts is a bad idea in general.
  Is the device guaranteed to have power.irq_safe set?
 
 Well right now it's using threaded irq, and I'd like to get rid of
 the pm_runtime calls in the regular driver interrupts completely.
 We need to ensure the device runtime_resume is completed before
 returning IRQ_HANDLED here.

In general, runtime_resume methods are allowed to sleep.  They can't be
used in an interrupt handler top half unless the driver has
specifically promised they are IRQ-safe.  That's what Rafael was
getting at.

Of course, if this routine is a threaded-irq bottom half then there's 
no problem.

  I guess what you want to call here is pm_request_resume() and
  I wouldn't say that calling pm_runtime_mark_last_busy() on a
  suspended device was valid.
 
 I'll verify again, but I believe the issue was that without doing
 mark_last_busy here the device falls back asleep right away.
 That probably should be fixed in pm_runtime in general if that's
 the case.

It's up to the subsystem to handle this.  For example, the USB 
subsystem's runtime-resume routine calls pm_runtime_mark_last_busy.

 Considering the above, should we add a new function something like
 pm_resume_complete() that does not need irq_safe set but does
 not return until the device has completed resume?

That doesn't make sense.  You're asking for a routine that is allowed
to sleep but can safely be called in interrupt context.

Alan Stern

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Re: [PATCH 0/2] pinctrl: dt-bindings: Fix amx3 SLEWCTRL_FAST binding

[Dave Gerlach]

On 03/06/2015 11:13 AM, Tony Lindgren wrote:
 * Dave Gerlach d-gerl...@ti.com [150227 17:14]:
 Currently both am33xx and am43xx have the macro for SLEWCTRL_FAST
 in pinctrl dt-bindings reversed so that selecting the macro actually
 sets SLEWCTRL_SLOW in the pad control registers. These patches
 correct the bindings but leave the pinctrl states that use the binding
 *UNMODIFIED*. Previously i2c and mdio on am33xx and i2c, mdio, and
 uart on am43xx had been using this macro and selecting SLEWCTRL_FAST
 while actually programming SLEWCTRL_SLOW in the pad config registers.

 Because the intended selection was SLEWCTRL_FAST the macros are
 unchanged. I tested on am335x-gp-evm and am437x-gp-evm with no
 difference in functionality seen.
 
 Applying both into omap-for-v4.0/fixes thanks.

Thanks!

Regards,
Dave

 
 Tony
 

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ARM: OMAP2+: Fix wl12xx on dm3730-evm with mainline u-boot

[Tony Lindgren]

I upgraded my u-boot and noticed that wl12xx stopped working.
Turns out the kernel is not setting the quirk for the MMC2
copy clock while the eariler bootloader I had was setting it.

Signed-off-by: Tony Lindgren t...@atomide.com

--- a/arch/arm/mach-omap2/pdata-quirks.c
+++ b/arch/arm/mach-omap2/pdata-quirks.c
@@ -173,6 +173,7 @@ static void __init omap3_igep0030_rev_g_legacy_init(void)
 
 static void __init omap3_evm_legacy_init(void)
 {
+   hsmmc2_internal_input_clk();
legacy_init_wl12xx(WL12XX_REFCLOCK_38, 0, 149);
 }
 
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Re: [PATCH 2/4] ARM: OMAP2+: AM43xx hwmod: Add RTC hwmod for AM43xx

[Dave Gerlach]

Paul,
On 03/05/2015 10:26 PM, Paul Walmsley wrote:
 On Thu, 5 Mar 2015, Dave Gerlach wrote:
 
 RTC hwmod is needed for proper operation of PM features like
 rtcwake and rtc-only mode so reuse the am33xx rtc hwmod.

 Signed-off-by: Dave Gerlach d-gerl...@ti.com
 ---
  arch/arm/mach-omap2/omap_hwmod_43xx_data.c | 1 +
  1 file changed, 1 insertion(+)

 diff --git a/arch/arm/mach-omap2/omap_hwmod_43xx_data.c 
 b/arch/arm/mach-omap2/omap_hwmod_43xx_data.c
 index 8eb8592..9070535 100644
 --- a/arch/arm/mach-omap2/omap_hwmod_43xx_data.c
 +++ b/arch/arm/mach-omap2/omap_hwmod_43xx_data.c
 @@ -889,6 +889,7 @@ static struct omap_hwmod_ocp_if *am43xx_hwmod_ocp_ifs[] 
 __initdata = {
  am43xx_l4_ls__dss,
  am43xx_l4_ls__dss_dispc,
  am43xx_l4_ls__dss_rfbi,
 +am33xx_l4_wkup__rtc,
  NULL,
  };
 
 Thanks, queued for v4.1.

Thanks, but please note as I just commented in Patch 1 of this series, without
the ti,no-init flag in place that is introduced there this patch will cause the
am43x-epos-evm to fail to boot.

Regards,
Dave

 
 
 - Paul
 

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Re: [PATCH 0/2] ARM: dts: dra7x-evm: DCAN pinmux fixes

[Tony Lindgren]

* Roger Quadros rog...@ti.com [150305 05:34]:
 Hi Tony,
 
 These are some fixes to the DCAN pinmux.
 
 cheers,
 -roger
 
 Roger Quadros (2):
   ARM: dts: dra7x-evm: Don't use dcan1_rx.gpio1_15 in DCAN pinctrl
   ARM: dts: dra7x-evm: avoid possible contention while muxing on CAN
 lines
 
  arch/arm/boot/dts/dra7-evm.dts  | 10 --
  arch/arm/boot/dts/dra72-evm.dts | 10 --
  2 files changed, 8 insertions(+), 12 deletions(-)

Applying both into omap-for-v4.0/fixes thanks.

Tony
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Re: [PATCH 1/4] ARM: OMAP2+: omap_hwmod: Introduce ti,no-init dt property

[Tony Lindgren]

* Dave Gerlach d-gerl...@ti.com [150306 09:28]:
 On 03/05/2015 06:41 PM, Tony Lindgren wrote:
  * Tony Lindgren t...@atomide.com [150305 12:24]:
  * Dave Gerlach d-gerl...@ti.com [150305 11:53]:
  On 03/05/2015 12:49 PM, Tony Lindgren wrote:
  * Paul Walmsley p...@pwsan.com [150305 10:16]:
  On Thu, 5 Mar 2015, Dave Gerlach wrote:
 
  Introduce a dt property, ti,no-init, that prevents hwmod 
  initialization.
  Even if a dt node is marked as disabled, hwmod still at least enables
  the hwmod and programs the sysconfig before attempting to idle it at
  boot. If an IP has been disabled by the hardware configuration on a
  platform, this will cause a hang due to writing to inactive registers.
  This property prevents that from happening by marking the hwmod as
  _HWMOD_STATE_DISABLED during init.
 
  I'm kind of wondering if hwmod should even touch a device if it's 
  marked 
  as disabled in the DT.  Tony, what do you think?
 
  Well nothing happens if a device is status = disabled. No dev entry
  gets created for it at all and hwmod won't have any data for the device
  populated. The only way hwmod code could see that device if the device
  gets it's data from the legacy omap_hwmod_*_data.c instead of DT.
 
 
  We still need this for the sysconfig programming, correct? hwmod programs 
  that
  regardless of dt status and then idles the IP,
 
  Well hwmod does not even know about the IP IO addresses if it's marked
  with status = disabled.. Which IP are you having problems with?
 
  which is why I needed the ti,no-init for the epos evm. It isn't just a
  matter of we shouldnt write to it because we don't want to use it; we
  can't write to it because the module is held off so it causes an
  external abort if we do.
 
  Well hard to say not knowing which module this is.. Pretty much all
  the modules have drivers and the driver just does pm_runtime_get()
  on it?
  
  Heh OK this thread is about the RTC driver, so I assume that's the
  problem :) So if you set the rtc to status = disabled how can the
  hwmod code do anything as AFAIK it won't even get the rtc IO address?
  
  Or am I missing something here?
 
 Perhaps I am mistaken, but from what I understand, all hwmods have _init and
 _setup called on them, and all hwmods read the IO address regardless of DT
 status at this point with _init_mpu_rt_base. In _setup, _setup_reset gets 
 called
 which calls _enable for the hwmod, and this calls both _enable_sysc and
 _update_sysc_cache which touch the sysconfig register of the IP.

Oh OK, I think you're right. I was thinking of omap_device_build_from_dt(),
sorry. Looks like the hwmod IO address data does get populated even
for status = disabled although the dev entry won't get created and
omap_device_build_from_dt() never gets called.

 Normally this is fine regardless of whether or not we are using an IP because
 the module will wake up for a moment, have it's sysc programmed, and then be 
 put
 back to sleep later, potentially never to be woken again if we bind no driver
 for it, which is fine for 99% of cases. In the case of am43x epos evm, you can
 take the same piece of silicon that will boot happily on the gp evm with the 
 rtc
 hwmod in place and it will hang during boot on the epos evm because the board
 uses a pin to hold the RTC IP in reset. There is no way to detect this in
 software, the module can be turned on as normal using the clk_ctrl, but if you
 touch any of the IP registers you get an abort.

OK sounds like some dts property is needed to signal this.
 
 So we need to prevent this from happening but of course we can't selectively
 choose when the rtc hwmod gets added based on which board we are using so it
 seemed a DT flag was appropriate to indicate that we do not want to init the 
 rtc
 IP at all only on this board.
 
 Without this flag in place but with the rtc hwmod added, the am43x-epos-evm
 fails booting with an imprecise abort.

OK thanks for explaining it. I'm fine with this patch, Paul may have
other issues. The other option would be to use status = disabled to
not touch the device at all like Paul suggested. I wonder if that's
going to break PM on some devices though..

Regards,

Tony
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Re: [PATCH] ARM: OMAP: enable TWL4030_USB in omap2plus_defconfig

[Tony Lindgren]

* Aaro Koskinen aaro.koski...@iki.fi [150226 13:11]:
 Enable TWL4030_USB which is used at least on Nokia N900/N950/N9 (OMAP3).
 
 Signed-off-by: Aaro Koskinen aaro.koski...@iki.fi
 ---
  arch/arm/configs/omap2plus_defconfig | 1 +
  1 file changed, 1 insertion(+)
 
 diff --git a/arch/arm/configs/omap2plus_defconfig 
 b/arch/arm/configs/omap2plus_defconfig
 index b738652..8c93aa9 100644
 --- a/arch/arm/configs/omap2plus_defconfig
 +++ b/arch/arm/configs/omap2plus_defconfig
 @@ -375,6 +375,7 @@ CONFIG_PWM_TWL=m
  CONFIG_PWM_TWL_LED=m
  CONFIG_OMAP_USB2=m
  CONFIG_TI_PIPE3=m
 +CONFIG_TWL4030_USB=m
  CONFIG_EXT2_FS=y
  CONFIG_EXT3_FS=y
  # CONFIG_EXT3_FS_XATTR is not set

Thanks I noticed the same on beagle-xm too, applying into
omap-for-v4.0/fixes.

Tony
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Re: [PATCH 00/10] omap3 crypto fixes

[Tony Lindgren]

* Pali Rohár pali.ro...@gmail.com [150226 05:54]:
 This patch series fix crypto support for omap3 devices which use DT.
 
 It enables AES and SHAM on N9/N950 and SHAM on N900. AES is still disabled 
 for N900.
 
 Pali Rohár (10):
   ARM: OMAP2+: Return correct error values from device and hwmod
   ARM: OMAP3: Fix crypto support for HS devices
   crypto: omap-sham: Add support for omap3 devices
   crypto: omap-sham: Check for return value from pm_runtime_get_sync
   ARM: dts: omap3 hs: Remove timer12
   ARM: dts: omap3: Add missing dmas for crypto
   ARM: dts: n9/n950: Enable omap crypto support
   ARM: dts: n900: Enable omap sham and include directly omap34xx.dtsi
   ARM: dts: omap3-tao3530: Include directly omap34xx.dtsi
   ARM: dts: Remove files omap34xx-hs.dtsi and omap36xx-hs.dtsi
 
  arch/arm/boot/dts/omap3-n900.dts   |   16 +-
  arch/arm/boot/dts/omap3-n950-n9.dtsi   |2 +-
  arch/arm/boot/dts/omap3-tao3530.dtsi   |   11 +++-
  arch/arm/boot/dts/omap3.dtsi   |4 ++
  arch/arm/boot/dts/omap34xx-hs.dtsi |   16 --
  arch/arm/boot/dts/omap36xx-hs.dtsi |   16 --
  arch/arm/mach-omap2/omap_device.c  |   30 ++-
  arch/arm/mach-omap2/omap_hwmod.c   |   10 ++--
  arch/arm/mach-omap2/omap_hwmod_3xxx_data.c |   79 
 +++-
  drivers/crypto/omap-sham.c |   13 -
  10 files changed, 131 insertions(+), 66 deletions(-)
  delete mode 100644 arch/arm/boot/dts/omap34xx-hs.dtsi
  delete mode 100644 arch/arm/boot/dts/omap36xx-hs.dtsi

Are there any fixes in this series that should go into
v4.0-rc series, or can it all wait for v4.1?

Regards,

Tony
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Re: [PATCH 2/4] ARM: OMAP2+: AM43xx hwmod: Add RTC hwmod for AM43xx

[Dave Gerlach]

Paul,

On 03/06/2015 11:44 AM, Paul Walmsley wrote:
 Hi Dave,
 
 On Fri, 6 Mar 2015, Dave Gerlach wrote:
 
 Paul,
 On 03/05/2015 10:26 PM, Paul Walmsley wrote:
 On Thu, 5 Mar 2015, Dave Gerlach wrote:

 RTC hwmod is needed for proper operation of PM features like
 rtcwake and rtc-only mode so reuse the am33xx rtc hwmod.

 Signed-off-by: Dave Gerlach d-gerl...@ti.com
 ---
  arch/arm/mach-omap2/omap_hwmod_43xx_data.c | 1 +
  1 file changed, 1 insertion(+)

 diff --git a/arch/arm/mach-omap2/omap_hwmod_43xx_data.c 
 b/arch/arm/mach-omap2/omap_hwmod_43xx_data.c
 index 8eb8592..9070535 100644
 --- a/arch/arm/mach-omap2/omap_hwmod_43xx_data.c
 +++ b/arch/arm/mach-omap2/omap_hwmod_43xx_data.c
 @@ -889,6 +889,7 @@ static struct omap_hwmod_ocp_if 
 *am43xx_hwmod_ocp_ifs[] __initdata = {
am43xx_l4_ls__dss,
am43xx_l4_ls__dss_dispc,
am43xx_l4_ls__dss_rfbi,
 +  am33xx_l4_wkup__rtc,
NULL,
  };

 Thanks, queued for v4.1.

 Thanks, but please note as I just commented in Patch 1 of this series, 
 without
 the ti,no-init flag in place that is introduced there this patch will cause 
 the
 am43x-epos-evm to fail to boot.
 
 If that's so, shouldn't it appear in the series after patch 3, then?  
 If only patches 1 and 2 are applied, then won't the boot be broken on 
 am43x-epos-evm ?

Hmm yes you are correct that would be the case, seems I should have swapped the
order. I've gotten into the habit of putting dt patches last to enable what gets
introduced previously, guess it's not always the best thing to do. Thanks for
pointing this out.

Regards,
Dave

 
 - Paul
 

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Re: [GIT PULL v2] ARM: OMAP2+: first set of hwmod and PRCM fixes for v4.0-rc

[Tony Lindgren]

* Paul Walmsley p...@pwsan.com [150301 20:17]:
 The following changes since commit c517d838eb7d07bbe9507871fab3931deccff539:
 
   Linux 4.0-rc1 (2015-02-22 18:21:14 -0800)
 
 are available in the git repository at:
 
   git://git.kernel.org/pub/scm/linux/kernel/git/pjw/omap-pending.git 
 tags/for-v4.0-rc/omap-fixes-a
 
 for you to fetch changes up to 50f59d07e9822274a2e6034777eb4e90cfb30cfc:
 
   ARM: OMAP4+: PRM: fix omap4 version of prm_save_and_clear_irqen (2015-03-01 
 16:58:25 -0700)
 
 
 ARM: OMAP2+: first set of hwmod and PRCM fixes for v4.0-rc
 
 This series fixes the following bugs:
 
 - a lockdep problem with the OMAP hwmod code;
 - incorrect PCIe hwmod data for the DRA7xx chips;
 - the clockdomain handling in the hardreset deassertion code,
   preventing idle;
 - the use of an IRQ status register rather than an IRQ enable register
   in the OMAP4 PRM code.
 
 Basic build, boot, and PM test results are available here:
 
 http://www.pwsan.com/omap/testlogs/omap-hwmod-a-for-v4.0-rc/20150301165949/

Thanks pulling this into omap-for-v4.0/fixes, sorry for the delay
with this one.

Regards,

Tony
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Re: [PATCH 1/4] ARM: OMAP2+: omap_hwmod: Introduce ti,no-init dt property

[Dave Gerlach]

On 03/05/2015 06:41 PM, Tony Lindgren wrote:
 * Tony Lindgren t...@atomide.com [150305 12:24]:
 * Dave Gerlach d-gerl...@ti.com [150305 11:53]:
 On 03/05/2015 12:49 PM, Tony Lindgren wrote:
 * Paul Walmsley p...@pwsan.com [150305 10:16]:
 On Thu, 5 Mar 2015, Dave Gerlach wrote:

 Introduce a dt property, ti,no-init, that prevents hwmod initialization.
 Even if a dt node is marked as disabled, hwmod still at least enables
 the hwmod and programs the sysconfig before attempting to idle it at
 boot. If an IP has been disabled by the hardware configuration on a
 platform, this will cause a hang due to writing to inactive registers.
 This property prevents that from happening by marking the hwmod as
 _HWMOD_STATE_DISABLED during init.

 I'm kind of wondering if hwmod should even touch a device if it's marked 
 as disabled in the DT.  Tony, what do you think?

 Well nothing happens if a device is status = disabled. No dev entry
 gets created for it at all and hwmod won't have any data for the device
 populated. The only way hwmod code could see that device if the device
 gets it's data from the legacy omap_hwmod_*_data.c instead of DT.


 We still need this for the sysconfig programming, correct? hwmod programs 
 that
 regardless of dt status and then idles the IP,

 Well hwmod does not even know about the IP IO addresses if it's marked
 with status = disabled.. Which IP are you having problems with?

 which is why I needed the ti,no-init for the epos evm. It isn't just a
 matter of we shouldnt write to it because we don't want to use it; we
 can't write to it because the module is held off so it causes an
 external abort if we do.

 Well hard to say not knowing which module this is.. Pretty much all
 the modules have drivers and the driver just does pm_runtime_get()
 on it?
 
 Heh OK this thread is about the RTC driver, so I assume that's the
 problem :) So if you set the rtc to status = disabled how can the
 hwmod code do anything as AFAIK it won't even get the rtc IO address?
 
 Or am I missing something here?

Perhaps I am mistaken, but from what I understand, all hwmods have _init and
_setup called on them, and all hwmods read the IO address regardless of DT
status at this point with _init_mpu_rt_base. In _setup, _setup_reset gets called
which calls _enable for the hwmod, and this calls both _enable_sysc and
_update_sysc_cache which touch the sysconfig register of the IP.

Normally this is fine regardless of whether or not we are using an IP because
the module will wake up for a moment, have it's sysc programmed, and then be put
back to sleep later, potentially never to be woken again if we bind no driver
for it, which is fine for 99% of cases. In the case of am43x epos evm, you can
take the same piece of silicon that will boot happily on the gp evm with the rtc
hwmod in place and it will hang during boot on the epos evm because the board
uses a pin to hold the RTC IP in reset. There is no way to detect this in
software, the module can be turned on as normal using the clk_ctrl, but if you
touch any of the IP registers you get an abort.

So we need to prevent this from happening but of course we can't selectively
choose when the rtc hwmod gets added based on which board we are using so it
seemed a DT flag was appropriate to indicate that we do not want to init the rtc
IP at all only on this board.

Without this flag in place but with the rtc hwmod added, the am43x-epos-evm
fails booting with an imprecise abort.

Regards,
Dave

 
 Regards,
 
 Tony
 

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Re: [PATCH 2/4] ARM: OMAP2+: AM43xx hwmod: Add RTC hwmod for AM43xx

[Paul Walmsley]

Hi Dave,

On Fri, 6 Mar 2015, Dave Gerlach wrote:

 Paul,
 On 03/05/2015 10:26 PM, Paul Walmsley wrote:
  On Thu, 5 Mar 2015, Dave Gerlach wrote:
  
  RTC hwmod is needed for proper operation of PM features like
  rtcwake and rtc-only mode so reuse the am33xx rtc hwmod.
 
  Signed-off-by: Dave Gerlach d-gerl...@ti.com
  ---
   arch/arm/mach-omap2/omap_hwmod_43xx_data.c | 1 +
   1 file changed, 1 insertion(+)
 
  diff --git a/arch/arm/mach-omap2/omap_hwmod_43xx_data.c 
  b/arch/arm/mach-omap2/omap_hwmod_43xx_data.c
  index 8eb8592..9070535 100644
  --- a/arch/arm/mach-omap2/omap_hwmod_43xx_data.c
  +++ b/arch/arm/mach-omap2/omap_hwmod_43xx_data.c
  @@ -889,6 +889,7 @@ static struct omap_hwmod_ocp_if 
  *am43xx_hwmod_ocp_ifs[] __initdata = {
 am43xx_l4_ls__dss,
 am43xx_l4_ls__dss_dispc,
 am43xx_l4_ls__dss_rfbi,
  +  am33xx_l4_wkup__rtc,
 NULL,
   };
  
  Thanks, queued for v4.1.
 
 Thanks, but please note as I just commented in Patch 1 of this series, without
 the ti,no-init flag in place that is introduced there this patch will cause 
 the
 am43x-epos-evm to fail to boot.

If that's so, shouldn't it appear in the series after patch 3, then?  
If only patches 1 and 2 are applied, then won't the boot be broken on 
am43x-epos-evm ?

- Paul
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Re: [PATCH 00/10] omap3 crypto fixes

[Tony Lindgren]

* Pali Rohár pali.ro...@gmail.com [150306 11:16]:
 On Friday 06 March 2015 19:36:32 Tony Lindgren wrote:
  * Pali Rohár pali.ro...@gmail.com [150226 05:54]:
   This patch series fix crypto support for omap3 devices which
   use DT.
   
   It enables AES and SHAM on N9/N950 and SHAM on N900. AES is
   still disabled for N900.
   
   Pali Rohár (10):
 ARM: OMAP2+: Return correct error values from device and
 hwmod ARM: OMAP3: Fix crypto support for HS devices
 crypto: omap-sham: Add support for omap3 devices
 crypto: omap-sham: Check for return value from
 pm_runtime_get_sync ARM: dts: omap3 hs: Remove timer12
 ARM: dts: omap3: Add missing dmas for crypto
 ARM: dts: n9/n950: Enable omap crypto support
 ARM: dts: n900: Enable omap sham and include directly
 omap34xx.dtsi ARM: dts: omap3-tao3530: Include directly
 omap34xx.dtsi ARM: dts: Remove files omap34xx-hs.dtsi and
 omap36xx-hs.dtsi

arch/arm/boot/dts/omap3-n900.dts   |   16 +-
arch/arm/boot/dts/omap3-n950-n9.dtsi   |2 +-
arch/arm/boot/dts/omap3-tao3530.dtsi   |   11 +++-
arch/arm/boot/dts/omap3.dtsi   |4 ++
arch/arm/boot/dts/omap34xx-hs.dtsi |   16 --
arch/arm/boot/dts/omap36xx-hs.dtsi |   16 --
arch/arm/mach-omap2/omap_device.c  |   30
++- arch/arm/mach-omap2/omap_hwmod.c   |  
10 ++-- arch/arm/mach-omap2/omap_hwmod_3xxx_data.c |   79
+++- drivers/crypto/omap-sham.c   
 |   13 - 10 files changed, 131
insertions(+), 66 deletions(-) delete mode 100644
arch/arm/boot/dts/omap34xx-hs.dtsi delete mode 100644
arch/arm/boot/dts/omap36xx-hs.dtsi
  
  Are there any fixes in this series that should go into
  v4.0-rc series, or can it all wait for v4.1?
  
  Regards,
  
  Tony
 
 I do not know which patches are you sending to 4.0-rc series, but 
 omap crypto is totally broken in linus tree for both GP  HS 
 omap3 devices when DT booting is used. This patch series fix that 
 problem.

OK so the whole series is needed then. It seems too intrusive for
the v4.0-rc series unless this fixes a regression with some earlier
commit.

Regards,

Tony
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[PATCH 1/2] gpio: omap: irq_shutdown: remove unnecessary call of gpiochip_unlock_as_irq

[grygorii.strashko]

From: Grygorii Strashko grygorii.stras...@linaro.org

GPIOLib core implemnts irqchip-irq_request/release_resources callbacks
internally and these callbacks already contain clalls of
gpiochip_lock/unlock_as_irq().

Hence, remove unnecessary call of gpiochip_unlock_as_irq() from
omap_gpio_irq_shutdown().

Signed-off-by: Grygorii Strashko grygorii.stras...@linaro.org
---
 drivers/gpio/gpio-omap.c | 1 -
 1 file changed, 1 deletion(-)

diff --git a/drivers/gpio/gpio-omap.c b/drivers/gpio/gpio-omap.c
index f476ae2..2b2fc4b 100644
--- a/drivers/gpio/gpio-omap.c
+++ b/drivers/gpio/gpio-omap.c
@@ -826,7 +826,6 @@ static void omap_gpio_irq_shutdown(struct irq_data *d)
unsigned offset = GPIO_INDEX(bank, gpio);
 
spin_lock_irqsave(bank-lock, flags);
-   gpiochip_unlock_as_irq(bank-chip, offset);
bank-irq_usage = ~(BIT(offset));
omap_disable_gpio_module(bank, offset);
omap_reset_gpio(bank, gpio);
-- 
1.9.1

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[RFC/RFT PATCH 2/2] gpio: omap: ensure that runtime pm will disable unused gpio banks

[grygorii.strashko]

From: Grygorii Strashko grygorii.stras...@linaro.org

Now there are two points related to Runtime PM usage:
1) bank state doesn't need to be checked in places where
Rintime PM is used, bacause Runtime PM maintains its
own usage counter:
  if (!BANK_USED(bank))
   pm_runtime_get_sync(bank-dev);
so, it's safe to drop such checks.

2) There is a call of pm_runtime_get_sync() in omap_gpio_irq_type(),
but no corresponding put. As result, GPIO devices could be
powered on forever if at least one GPIO was used as IRQ.
Hence, allow powering off GPIO banks by adding missed
pm_runtime_put(bank-dev) at the end of omap_gpio_irq_type().

Signed-off-by: Grygorii Strashko grygorii.stras...@linaro.org
---
 drivers/gpio/gpio-omap.c | 17 +++--
 1 file changed, 7 insertions(+), 10 deletions(-)

diff --git a/drivers/gpio/gpio-omap.c b/drivers/gpio/gpio-omap.c
index 2b2fc4b..b1176c5 100644
--- a/drivers/gpio/gpio-omap.c
+++ b/drivers/gpio/gpio-omap.c
@@ -497,8 +497,7 @@ static int omap_gpio_irq_type(struct irq_data *d, unsigned 
type)
unsigned long flags;
unsigned offset;
 
-   if (!BANK_USED(bank))
-   pm_runtime_get_sync(bank-dev);
+   pm_runtime_get_sync(bank-dev);
 
 #ifdef CONFIG_ARCH_OMAP1
if (d-irq  IH_MPUIO_BASE)
@@ -530,6 +529,8 @@ static int omap_gpio_irq_type(struct irq_data *d, unsigned 
type)
else if (type  (IRQ_TYPE_EDGE_FALLING | IRQ_TYPE_EDGE_RISING))
__irq_set_handler_locked(d-irq, handle_edge_irq);
 
+   pm_runtime_put(bank-dev);
+
return retval;
 }
 
@@ -680,8 +681,7 @@ static int omap_gpio_request(struct gpio_chip *chip, 
unsigned offset)
 * If this is the first gpio_request for the bank,
 * enable the bank module.
 */
-   if (!BANK_USED(bank))
-   pm_runtime_get_sync(bank-dev);
+   pm_runtime_get_sync(bank-dev);
 
spin_lock_irqsave(bank-lock, flags);
/* Set trigger to none. You need to enable the desired trigger with
@@ -713,8 +713,7 @@ static void omap_gpio_free(struct gpio_chip *chip, unsigned 
offset)
 * If this is the last gpio to be freed in the bank,
 * disable the bank module.
 */
-   if (!BANK_USED(bank))
-   pm_runtime_put(bank-dev);
+   pm_runtime_put(bank-dev);
 }
 
 /*
@@ -807,8 +806,7 @@ static unsigned int omap_gpio_irq_startup(struct irq_data 
*d)
unsigned long flags;
unsigned offset = GPIO_INDEX(bank, gpio);
 
-   if (!BANK_USED(bank))
-   pm_runtime_get_sync(bank-dev);
+   pm_runtime_get_sync(bank-dev);
 
spin_lock_irqsave(bank-lock, flags);
omap_gpio_init_irq(bank, gpio, offset);
@@ -835,8 +833,7 @@ static void omap_gpio_irq_shutdown(struct irq_data *d)
 * If this is the last IRQ to be freed in the bank,
 * disable the bank module.
 */
-   if (!BANK_USED(bank))
-   pm_runtime_put(bank-dev);
+   pm_runtime_put(bank-dev);
 }
 
 static void omap_gpio_ack_irq(struct irq_data *d)
-- 
1.9.1

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Re: [PATCH 00/10] omap3 crypto fixes

[Pali Rohár]

On Friday 06 March 2015 19:36:32 Tony Lindgren wrote:
 * Pali Rohár pali.ro...@gmail.com [150226 05:54]:
  This patch series fix crypto support for omap3 devices which
  use DT.
  
  It enables AES and SHAM on N9/N950 and SHAM on N900. AES is
  still disabled for N900.
  
  Pali Rohár (10):
ARM: OMAP2+: Return correct error values from device and
hwmod ARM: OMAP3: Fix crypto support for HS devices
crypto: omap-sham: Add support for omap3 devices
crypto: omap-sham: Check for return value from
pm_runtime_get_sync ARM: dts: omap3 hs: Remove timer12
ARM: dts: omap3: Add missing dmas for crypto
ARM: dts: n9/n950: Enable omap crypto support
ARM: dts: n900: Enable omap sham and include directly
omap34xx.dtsi ARM: dts: omap3-tao3530: Include directly
omap34xx.dtsi ARM: dts: Remove files omap34xx-hs.dtsi and
omap36xx-hs.dtsi
   
   arch/arm/boot/dts/omap3-n900.dts   |   16 +-
   arch/arm/boot/dts/omap3-n950-n9.dtsi   |2 +-
   arch/arm/boot/dts/omap3-tao3530.dtsi   |   11 +++-
   arch/arm/boot/dts/omap3.dtsi   |4 ++
   arch/arm/boot/dts/omap34xx-hs.dtsi |   16 --
   arch/arm/boot/dts/omap36xx-hs.dtsi |   16 --
   arch/arm/mach-omap2/omap_device.c  |   30
   ++- arch/arm/mach-omap2/omap_hwmod.c   |  
   10 ++-- arch/arm/mach-omap2/omap_hwmod_3xxx_data.c |   79
   +++- drivers/crypto/omap-sham.c   
|   13 - 10 files changed, 131
   insertions(+), 66 deletions(-) delete mode 100644
   arch/arm/boot/dts/omap34xx-hs.dtsi delete mode 100644
   arch/arm/boot/dts/omap36xx-hs.dtsi
 
 Are there any fixes in this series that should go into
 v4.0-rc series, or can it all wait for v4.1?
 
 Regards,
 
 Tony

I do not know which patches are you sending to 4.0-rc series, but 
omap crypto is totally broken in linus tree for both GP  HS 
omap3 devices when DT booting is used. This patch series fix that 
problem.

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Re: [PATCHv3 08/35] clk: ti: fix ti_clk_get_reg_addr error handling

[Mike Turquette]

Quoting Tero Kristo (2015-02-25 11:04:18)
 There is a case where NULL can be a valid return value for
 ti_clk_get_reg_addr, specifically the case where both the provider index
 and register offsets are zero. In this case, the current error checking
 against a NULL pointer will fail. Thus, change the API to return a
 ERR_PTR value in an error case, and change all the users of this API to
 check against IS_ERR instead.
 
 Signed-off-by: Tero Kristo t-kri...@ti.com
 Cc: Michael Turquette mturque...@linaro.org

Looks good to me.

Regards,
Mike

 ---
  drivers/clk/ti/apll.c  |5 +++--
  drivers/clk/ti/autoidle.c  |2 +-
  drivers/clk/ti/clk.c   |7 ---
  drivers/clk/ti/divider.c   |4 ++--
  drivers/clk/ti/dpll.c  |6 +++---
  drivers/clk/ti/gate.c  |4 ++--
  drivers/clk/ti/interface.c |2 +-
  drivers/clk/ti/mux.c   |4 ++--
  8 files changed, 18 insertions(+), 16 deletions(-)
 
 diff --git a/drivers/clk/ti/apll.c b/drivers/clk/ti/apll.c
 index 72d9727..49baf38 100644
 --- a/drivers/clk/ti/apll.c
 +++ b/drivers/clk/ti/apll.c
 @@ -203,7 +203,7 @@ static void __init of_dra7_apll_setup(struct device_node 
 *node)
 ad-control_reg = ti_clk_get_reg_addr(node, 0);
 ad-idlest_reg = ti_clk_get_reg_addr(node, 1);
  
 -   if (!ad-control_reg || !ad-idlest_reg)
 +   if (IS_ERR(ad-control_reg) || IS_ERR(ad-idlest_reg))
 goto cleanup;
  
 ad-idlest_mask = 0x1;
 @@ -384,7 +384,8 @@ static void __init of_omap2_apll_setup(struct device_node 
 *node)
 ad-autoidle_reg = ti_clk_get_reg_addr(node, 1);
 ad-idlest_reg = ti_clk_get_reg_addr(node, 2);
  
 -   if (!ad-control_reg || !ad-autoidle_reg || !ad-idlest_reg)
 +   if (IS_ERR(ad-control_reg) || IS_ERR(ad-autoidle_reg) ||
 +   IS_ERR(ad-idlest_reg))
 goto cleanup;
  
 clk = clk_register(NULL, clk_hw-hw);
 diff --git a/drivers/clk/ti/autoidle.c b/drivers/clk/ti/autoidle.c
 index 8912ff8..e75c64c 100644
 --- a/drivers/clk/ti/autoidle.c
 +++ b/drivers/clk/ti/autoidle.c
 @@ -119,7 +119,7 @@ int __init of_ti_clk_autoidle_setup(struct device_node 
 *node)
 clk-name = node-name;
 clk-reg = ti_clk_get_reg_addr(node, 0);
  
 -   if (!clk-reg) {
 +   if (IS_ERR(clk-reg)) {
 kfree(clk);
 return -EINVAL;
 }
 diff --git a/drivers/clk/ti/clk.c b/drivers/clk/ti/clk.c
 index e22b956..0ebe5c5 100644
 --- a/drivers/clk/ti/clk.c
 +++ b/drivers/clk/ti/clk.c
 @@ -103,7 +103,8 @@ int __init ti_clk_retry_init(struct device_node *node, 
 struct clk_hw *hw,
   * @index: register index from the clock node
   *
   * Builds clock register address from device tree information. This
 - * is a struct of type clk_omap_reg.
 + * is a struct of type clk_omap_reg. Returns a pointer to the register
 + * address, or a pointer error value in failure.
   */
  void __iomem *ti_clk_get_reg_addr(struct device_node *node, int index)
  {
 @@ -121,14 +122,14 @@ void __iomem *ti_clk_get_reg_addr(struct device_node 
 *node, int index)
  
 if (i == CLK_MAX_MEMMAPS) {
 pr_err(clk-provider not found for %s!\n, node-name);
 -   return NULL;
 +   return ERR_PTR(-ENOENT);
 }
  
 reg-index = i;
  
 if (of_property_read_u32_index(node, reg, index, val)) {
 pr_err(%s must have reg[%d]!\n, node-name, index);
 -   return NULL;
 +   return ERR_PTR(-EINVAL);
 }
  
 reg-offset = val;
 diff --git a/drivers/clk/ti/divider.c b/drivers/clk/ti/divider.c
 index 6211893..ff5f117 100644
 --- a/drivers/clk/ti/divider.c
 +++ b/drivers/clk/ti/divider.c
 @@ -530,8 +530,8 @@ static int __init ti_clk_divider_populate(struct 
 device_node *node,
 u32 val;
  
 *reg = ti_clk_get_reg_addr(node, 0);
 -   if (!*reg)
 -   return -EINVAL;
 +   if (IS_ERR(*reg))
 +   return PTR_ERR(*reg);
  
 if (!of_property_read_u32(node, ti,bit-shift, val))
 *shift = val;
 diff --git a/drivers/clk/ti/dpll.c b/drivers/clk/ti/dpll.c
 index 81dc469..11478a5 100644
 --- a/drivers/clk/ti/dpll.c
 +++ b/drivers/clk/ti/dpll.c
 @@ -390,18 +390,18 @@ static void __init of_ti_dpll_setup(struct device_node 
 *node,
  #endif
 } else {
 dd-idlest_reg = ti_clk_get_reg_addr(node, 1);
 -   if (!dd-idlest_reg)
 +   if (IS_ERR(dd-idlest_reg))
 goto cleanup;
  
 dd-mult_div1_reg = ti_clk_get_reg_addr(node, 2);
 }
  
 -   if (!dd-control_reg || !dd-mult_div1_reg)
 +   if (IS_ERR(dd-control_reg) || IS_ERR(dd-mult_div1_reg))
 goto cleanup;
  
 if (dd-autoidle_mask) {
 dd-autoidle_reg = ti_clk_get_reg_addr(node, 3);
 -   if (!dd-autoidle_reg)
 +   if (IS_ERR(dd-autoidle_reg))
 goto cleanup;
 

Re: [PATCH v2] ASoC: omap: fix up SND_OMAP_SOC_OMAP_ABE_TWL6040 dependency

[Mark Brown]

On Wed, Feb 25, 2015 at 04:42:12PM +0100, Arnd Bergmann wrote:
 The change to enable OMAP5 support on this platform was a little too
 eager in adding a 'select' for a particular clock driver that might
 not be enabled in all configurations, which in turn leads to a build
 error:

Applied, thanks.


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twl4030_charger: need changes to get probed?

[Pavel Machek]

Hi!

According to n900 dts, twl4030-bci (aka charger) should be included.

(But it does not seem to do anything useful on n900. I was hoping for
measurement of input voltage, but .. no.)

Any ideas why the patch below is needed?

Signed-off-by: Pavel Machek pa...@ucw.cz

diff --git a/drivers/power/twl4030_charger.c b/drivers/power/twl4030_charger.c
index d35b83e..96bbbe9 100644
--- a/drivers/power/twl4030_charger.c
+++ b/drivers/power/twl4030_charger.c
@@ -714,6 +722,7 @@ static const struct of_device_id twl_bci_of_match[] = {
 MODULE_DEVICE_TABLE(of, twl_bci_of_match);
 
 static struct platform_driver twl4030_bci_driver = {
+   .probe = twl4030_bci_probe,
.driver = {
.name   = twl4030_bci,
.of_match_table = of_match_ptr(twl_bci_of_match),
@@ -721,7 +730,7 @@ static struct platform_driver twl4030_bci_driver = {
.remove = __exit_p(twl4030_bci_remove),
 };
 
-module_platform_driver_probe(twl4030_bci_driver, twl4030_bci_probe);
+module_platform_driver(twl4030_bci_driver);
 
 MODULE_AUTHOR(Gražvydas Ignotas);
 MODULE_DESCRIPTION(TWL4030 Battery Charger Interface driver);


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Re: twl4030_charger: need changes to get probed?

[Pali Rohár]

On Friday 06 March 2015 22:24:17 Pavel Machek wrote:
 Hi!
 
 According to n900 dts, twl4030-bci (aka charger) should be
 included.
 

AFAIK it is not present on n900...

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Re: ARM: OMPA4+: is it expected dma_coerce_mask_and_coherent(dev, DMA_BIT_MASK(64)); to fail?

[grygorii.stras...@linaro.org]

Hi Russell,

On 03/05/2015 10:17 PM, Russell King - ARM Linux wrote:
 On Thu, Mar 05, 2015 at 08:55:07PM +0200, grygorii.stras...@linaro.org wrote:
 Now I can see very interesting behavior related to 
 dma_coerce_mask_and_coherent()
 and friends which I'd like to explain and clarify.

 Below is set of questions I have (why - I explained below):
 - Is expected dma_coerce_mask_and_coherent(DMA_BIT_MASK(64)) and friends to 
 fail on 32 bits HW?
 
 Not really.
 
 - What is expected value for max_pfn: max_phys_pfn or max_phys_pfn + 1?
 
 mm/page_owner.c:
  /* Find an allocated page */
  for (; pfn  max_pfn; pfn++) {
 
 drivers/base/platform.c:u32 low_totalram = ((max_pfn - 1)  PAGE_SHIFT);
 drivers/base/platform.c:u32 high_totalram = ((max_pfn - 1)  (32 - 
 PAGE_SHIFT));
 
 So, there's ample evidence that max_pfn is one more than the greatest pfn
 which may be used in the system.
 
 - What is expected value for struct memblock_region-size: mem_range_size or 
 mem_range_size - 1?
 
 A size is a size - it's a number of bytes contained within the region.
 If it is value 1, then there is exactly one byte in the region.  If
 there are 0x7fff, then there are 2G-1 bytes in the region, not 2G.

Thanks - it seems clear now.

 - What is expected value to be returned by memblock_end_of_DRAM():
@base + @size(max_phys_addr + 1) or @base + @size - 1(max_phys_addr)?
 
 The last address plus one in the system.  However, there's a problem here.
 On a 32-bit system, phys_addr_t may be 32-bit.  If it is 32-bit, then
 last address plus one could be zero, which makes no sense.  Hence, it
 is artificially reduced to 0xf000, thereby omitting the final page.

^ this part seems not fully true now, because for ARM32 + DT the 
fdt.c-early_init_dt_add_memory_arch() is called instead of arm_add_memory()
 and it works in a different way a bit.

For example, I don't see below message when reg = 0x8000 0x8000:
Truncating memory at 0x8000 to fit in 32-bit physical address space

instead memblock silently configured as
memory.cnt  = 0x1
memory[0x0].base = 0x8000
memory[0x0].size = 0x7fff


 
 Example 3 CONFIG_ARM_LPAE=y (but system really works with 32 bit address 
 space):
  memory {
  device_type = memory;
  reg = 0x8000 0x8000;
  };

memblock will be configured as:
  memory.cnt  = 0x1
  memory[0x0] [0x008000-0x00], 0x8000 bytes 
 flags: 0x0
   ^^
max_pfn = 0x0010

 The dma_coerce_mask_and_coherent() will fail in case 'Example 3' and succeed 
 in cases 1,2.
 dma-mapping.c -- __dma_supported()
  if (sizeof(mask) != sizeof(dma_addr_t)  == true for all OMAP4+
  mask  (dma_addr_t)~0 == true for DMA_BIT_MASK(64)
  dma_to_pfn(dev, ~0)  max_pfn) {  == true only for Example 3
 
 Hmm, I think this may make more sense to be  max_pfn - 1 here, as
 that would be better suited to our intention.
 
 The result of dma_to_pfn(dev, ~0) is the maximum PFN which we could
 address via DMA, but we're comparing it with the maximum PFN in the
 system plus 1 - so we need to subtract one from it.

Ok. I'll try it.

 
 Please think about this and test this out; I'm not back to normal yet
 (post-op) so I could very well not be thinking straight yet.

Thanks for your comments. I hope you feel better.

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regards,
-grygorii
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Re: Right interface for cellphone modem audio (was Re: [PATCHv2 0/2] N900 Modem Speech Support)

[Kai Vehmanen]

Hi,

On Fri, 6 Mar 2015, Pavel Machek wrote:


Our take was that ALSA is not the right interface for cmt_speech. The
cmt_speech interface in the modem is _not_ a PCM interface as modelled by
ALSA. Specifically:

- the interface is lossy in both directions
- data is sent in packets, not a stream of samples (could be other things
  than PCM samples), with timing and meta-data
- timing of uplink is of utmost importance


I see that you may not have data available in downlink scenario, but
how is it lossy in uplink scenario? Phone should always try to fill
the uplink, no? (Or do you detect silence and not transmit in this


Lossy was perhaps not the best choice of words, non-continuous would be 
a better choice in the uplink case. To adjust timing, some samples from 
the continuous locally recorded PCM stream need to be skipped and/or 
duplicated. This would normally be done between speech bursts to avoid 
artifacts.



Packets vs. stream of samples... does userland need to know about the
packets? Could we simply hide it from the userland? As userland daemon
is (supposed to be) realtime, do we really need extra set of
timestamps? What other metadata are there?


Yes, we need flags that tell about the frame. Please see docs for 
'frame_flags' and 'spc_flags' in libcmtspeechdata cmtspeech.h:

https://www.gitorious.org/libcmtspeechdata/libcmtspeechdata/source/9206835ea3c96815840a80ccba9eaeb16ff7e294:cmtspeech.h

Kernel space does not have enough info to handle these flags as the audio 
mixer is not implemented in kernel, so they have to be passed to/from 
user-space.


And some further info in libcmtspeechdata/docs/ 
https://www.gitorious.org/libcmtspeechdata/libcmtspeechdata/source/9206835ea3c96815840a80ccba9eaeb16ff7e294:doc/libcmtspeechdata_api_docs_main.txt



Uplink timing... As the daemon is realtime, can it just send the data
at the right time? Also normally uplink would be filled, no?


But how would you implement that via the ALSA API? With cmt_speech, a 
speech packet is prepared in a mmap'ed buffer, flags are set to describe 
the buffer, and at the correct time, write() is called to trigger 
transmission in HW (see cmtspeech_ul_buffer_release() in 
libcmtspeechdata() - compare this to snd_pcm_mmap_commit() in ALSA). In 
ALSA, the mmap commit and PCM write variants just add data to the 
ringbuffer and update the appl pointer. Only initial start (and stop) on 
stream have the do something now semantics in ALSA.


The ALSA compressed offload API did not exist back when we were working on 
cmt_speech, but that's still not a good fit, although adds some of the 
concepts (notably frames).



Well, packets are of fixed size, right? So the userland can simply
supply the right size in the common case. As for sending at the right
time... well... if the userspace is already real-time, that should be 
easy


See above, ALSA just doesn't work like that, there's no syscall for send 
these samples now, the model is different.


Br, Kai
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Re: [PATCH 13/15] twl4030_charger: add ac/mode to match usb/mode

[Grazvydas Ignotas]

On Tue, Feb 24, 2015 at 6:33 AM, NeilBrown ne...@suse.de wrote:
 This allows AC charging to be turned off, much like usb charging.

 continuous (aka linear) mode maps to the CVENAC (constant voltage)
 feature of the twl4030.

Are you sure? Before your patches CVENAC was set at all times and and
charger still worked in automatic mode.


 Signed-off-by: NeilBrown ne...@suse.de
 ---
  drivers/power/twl4030_charger.c |   40 
 +--
  1 file changed, 30 insertions(+), 10 deletions(-)

 diff --git a/drivers/power/twl4030_charger.c b/drivers/power/twl4030_charger.c
 index 6c53f0b601a4..e5a0225ea87e 100644
 --- a/drivers/power/twl4030_charger.c
 +++ b/drivers/power/twl4030_charger.c
 @@ -112,7 +112,7 @@ struct twl4030_bci {
 int ichg_eoc, ichg_lo, ichg_hi;
 int usb_cur, ac_cur;
 boolac_is_active;
 -   int usb_mode; /* charging mode requested */
 +   int usb_mode, ac_mode; /* charging mode requested 
 */
  #defineCHARGE_OFF  0
  #defineCHARGE_AUTO 1
  #defineCHARGE_LINEAR   2
 @@ -449,12 +449,18 @@ static int twl4030_charger_enable_usb(struct 
 twl4030_bci *bci, bool enable)
  /*
   * Enable/Disable AC Charge funtionality.
   */
 -static int twl4030_charger_enable_ac(bool enable)
 +static int twl4030_charger_enable_ac(struct twl4030_bci *bci, bool enable)
  {
 int ret;

 -   if (enable)
 -   ret = twl4030_clear_set_boot_bci(0, TWL4030_BCIAUTOAC);
 +   if (bci-ac_mode == CHARGE_OFF)
 +   enable = false;
 +
 +   if (enable  bci-ac_mode == CHARGE_LINEAR)
 +   ret = twl4030_clear_set_boot_bci(0, (TWL4030_CVENAC |
 +TWL4030_BCIAUTOAC));
 +   else if (enable)
 +   ret = twl4030_clear_set_boot_bci(TWL4030_CVENAC, 
 TWL4030_BCIAUTOAC);
 else
 ret = twl4030_clear_set_boot_bci(TWL4030_BCIAUTOAC, 0);

CVENAC is required to be set for operation on AC without battery
(which works fine on most pandora boards). After this patch, when
booted without battery,  the board will reset before there is a chance
to set the linear mode by userspace, because this is called on
probe...


Gražvydas
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Re: twl4030_charger: need changes to get probed?

[Grazvydas Ignotas]

On Fri, Mar 6, 2015 at 11:57 PM, Pali Rohár pali.ro...@gmail.com wrote:
 On Friday 06 March 2015 22:24:17 Pavel Machek wrote:
 Hi!

 According to n900 dts, twl4030-bci (aka charger) should be
 included.


 AFAIK it is not present on n900...

Right, it uses twl5030 variant without the charger, charging on n900
is provided by separate chip and for a good reason as twl's charger is
not that good. Forcing the driver to load just ends up with it
accessing non-existent registers over i2c.


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Re: [PATCH RFC 3/6] drm/tilcdc: Add support for external compontised DRM encoder

[Jyri Sarha]

On 03/02/15 18:01, Russell King - ARM Linux wrote:

On Thu, Feb 26, 2015 at 04:55:32PM +0200, Jyri Sarha wrote:

+   ret = component_bind_all(dev-dev, dev);
+   if (ret  0) {
+   dev_err(dev-dev, Binding subcomponents failed: %d\n, ret);


Do you need to print this?  The component helper is already fairly
verbose about what succeeds and fails.



Will remove.


+static const struct component_master_ops tilcdc_comp_ops = {
+   .add_components = tilcdc_add_external_components,


I'd much rather you used the new matching support rather than using the
old .add_components.  The new matching support is more efficient as you
only have to scan DT once, rather than each time we try to probe.  That
will mean...



That is otherwise fine, but with the match code it not possible to 
implement a master that may not have any components.


Would it be Ok to add a check that master-ops-add_components is 
defined, before calling it in find_componets() 
(drivers/base/component.c:120) and return 0 if it is not?


Best regards,
Jyri


@@ -613,12 +643,12 @@ static int tilcdc_pdev_probe(struct platform_device *pdev)
return -ENXIO;
}


You need to build a struct component_match array here using
component_match_add()...



-   return drm_platform_init(tilcdc_driver, pdev);
+   return component_master_add(pdev-dev, tilcdc_comp_ops);


and then finally register the ops with component_master_add_with_match().

Thanks.



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Re: [PATCH 00/10] omap3 crypto fixes

[Aaro Koskinen]

Hi,

On Fri, Mar 06, 2015 at 10:36:32AM -0800, Tony Lindgren wrote:
 Are there any fixes in this series that should go into
 v4.0-rc series, or can it all wait for v4.1?

I think these all should wait for v4.1.

A.
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