Re: [PATCHv3 10/10] CLK: TI: always enable DESHDCP clock

2015-05-20 Thread Tero Kristo

On 05/20/2015 02:47 PM, Tero Kristo wrote:

On 05/06/2015 01:08 PM, Tomi Valkeinen wrote:

DESHDCP clock is needed on DRA7 based SoCs to enable the DSS IP. That
clock is an odd one, as it is not supposed to be any kind of core clock
for DSS, and we don't even support HDCP, but the clock is still needed
even for the HWMOD framework to be able to reset the DSS IP.

As there's no support for multiple core clocks in the HWMOD framework,
we don't have any obvious place to enable this clock when DSS IP is
being enabled.

Furthermore, the HDMI on OMAP5 DSS is the same as on DRA7, and OMAP5
does not have any such clock configuration bit. This suggests that on
OMAP5 the DESHDCP clock is always enabled, and for DRA7 we have the
possibility to gate it.

So, as we don't have any clean way to enable and disable the clock
based on the need, this patch enables the clock at boot time, making it
work similarly to OMAP5.

Signed-off-by: Tomi Valkeinen tomi.valkei...@ti.com
---
  drivers/clk/ti/clk-7xx.c | 7 ++-
  1 file changed, 6 insertions(+), 1 deletion(-)

diff --git a/drivers/clk/ti/clk-7xx.c b/drivers/clk/ti/clk-7xx.c
index 2dd956b9affa..63b8323df918 100644
--- a/drivers/clk/ti/clk-7xx.c
+++ b/drivers/clk/ti/clk-7xx.c
@@ -312,7 +312,7 @@ static struct ti_dt_clk dra7xx_clks[] = {
  int __init dra7xx_dt_clk_init(void)
  {
  int rc;
-struct clk *abe_dpll_mux, *sys_clkin2, *dpll_ck;
+struct clk *abe_dpll_mux, *sys_clkin2, *dpll_ck, *hdcp_ck;

  ti_dt_clocks_register(dra7xx_clks);

@@ -348,5 +348,10 @@ int __init dra7xx_dt_clk_init(void)
  if (rc)
  pr_err(%s: failed to set USB_DPLL M2 OUT\n, __func__);

+hdcp_ck = clk_get_sys(NULL, dss_deshdcp_clk);
+rc = clk_prepare_enable(hdcp_ck);
+if (rc)
+pr_err(%s: failed to set dss_deshdcp_clk\n, __func__);
+
  return rc;
  }



You should rather use the assigned-clock properties in DT to accomplish
this, the manual clock tweaks under the drivers/clk/ti/clk-* files
should be converted to DT setup also.


Now that I sent this, I realize we only have support to set_parent / 
set_rate through the assigned-clock props, no enable. Any plans to 
extend this support Mike/Stephen?


-Tero



-Tero



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Re: [RFC v1 08/25] mfd: Use irq_desc_get_xxx() to avoid redundant lookup of irq_desc

2015-05-20 Thread Lee Jones
On Wed, 20 May 2015, Jiang Liu wrote:

 Use irq_desc_get_xxx() to avoid redundant lookup of irq_desc while we
 already have a pointer to corresponding irq_desc.
 
 Do the same thing to avoid pattern irq_get_chip_data(data-irq).
 
 Signed-off-by: Jiang Liu jiang@linux.intel.com
 ---
  drivers/mfd/ezx-pcap.c|2 +-
  drivers/mfd/max8997-irq.c |8 
  drivers/mfd/mt6397-core.c |8 
  drivers/mfd/t7l66xb.c |2 +-
  drivers/mfd/tc6393xb.c|2 +-
  drivers/mfd/twl6030-irq.c |2 +-
  6 files changed, 12 insertions(+), 12 deletions(-)

Again, so long as this has been properly tested:

Acked-by: Lee Jones lee.jo...@linaro.org

 diff --git a/drivers/mfd/ezx-pcap.c b/drivers/mfd/ezx-pcap.c
 index 5991faddd3c6..e5f4ffaa5414 100644
 --- a/drivers/mfd/ezx-pcap.c
 +++ b/drivers/mfd/ezx-pcap.c
 @@ -207,7 +207,7 @@ static void pcap_isr_work(struct work_struct *work)
  
  static void pcap_irq_handler(unsigned int irq, struct irq_desc *desc)
  {
 - struct pcap_chip *pcap = irq_get_handler_data(irq);
 + struct pcap_chip *pcap = irq_desc_get_handler_data(desc);
  
   desc-irq_data.chip-irq_ack(desc-irq_data);
   queue_work(pcap-workqueue, pcap-isr_work);
 diff --git a/drivers/mfd/max8997-irq.c b/drivers/mfd/max8997-irq.c
 index 43fa61413e93..381738b477f8 100644
 --- a/drivers/mfd/max8997-irq.c
 +++ b/drivers/mfd/max8997-irq.c
 @@ -113,14 +113,14 @@ static const struct max8997_irq_data max8997_irqs[] = {
  
  static void max8997_irq_lock(struct irq_data *data)
  {
 - struct max8997_dev *max8997 = irq_get_chip_data(data-irq);
 + struct max8997_dev *max8997 = irq_data_get_irq_chip_data(data);
  
   mutex_lock(max8997-irqlock);
  }
  
  static void max8997_irq_sync_unlock(struct irq_data *data)
  {
 - struct max8997_dev *max8997 = irq_get_chip_data(data-irq);
 + struct max8997_dev *max8997 = irq_data_get_irq_chip_data(data);
   int i;
  
   for (i = 0; i  MAX8997_IRQ_GROUP_NR; i++) {
 @@ -148,7 +148,7 @@ irq_to_max8997_irq(struct max8997_dev *max8997, int irq)
  
  static void max8997_irq_mask(struct irq_data *data)
  {
 - struct max8997_dev *max8997 = irq_get_chip_data(data-irq);
 + struct max8997_dev *max8997 = irq_data_get_irq_chip_data(data);
   const struct max8997_irq_data *irq_data = irq_to_max8997_irq(max8997,
   data-irq);
  
 @@ -157,7 +157,7 @@ static void max8997_irq_mask(struct irq_data *data)
  
  static void max8997_irq_unmask(struct irq_data *data)
  {
 - struct max8997_dev *max8997 = irq_get_chip_data(data-irq);
 + struct max8997_dev *max8997 = irq_data_get_irq_chip_data(data);
   const struct max8997_irq_data *irq_data = irq_to_max8997_irq(max8997,
   data-irq);
  
 diff --git a/drivers/mfd/mt6397-core.c b/drivers/mfd/mt6397-core.c
 index 09bc7804952a..dab325b9d0df 100644
 --- a/drivers/mfd/mt6397-core.c
 +++ b/drivers/mfd/mt6397-core.c
 @@ -39,14 +39,14 @@ static const struct mfd_cell mt6397_devs[] = {
  
  static void mt6397_irq_lock(struct irq_data *data)
  {
 - struct mt6397_chip *mt6397 = irq_get_chip_data(data-irq);
 + struct mt6397_chip *mt6397 = irq_data_get_irq_chip_data(data);
  
   mutex_lock(mt6397-irqlock);
  }
  
  static void mt6397_irq_sync_unlock(struct irq_data *data)
  {
 - struct mt6397_chip *mt6397 = irq_get_chip_data(data-irq);
 + struct mt6397_chip *mt6397 = irq_data_get_irq_chip_data(data);
  
   regmap_write(mt6397-regmap, MT6397_INT_CON0, mt6397-irq_masks_cur[0]);
   regmap_write(mt6397-regmap, MT6397_INT_CON1, mt6397-irq_masks_cur[1]);
 @@ -56,7 +56,7 @@ static void mt6397_irq_sync_unlock(struct irq_data *data)
  
  static void mt6397_irq_disable(struct irq_data *data)
  {
 - struct mt6397_chip *mt6397 = irq_get_chip_data(data-irq);
 + struct mt6397_chip *mt6397 = irq_data_get_irq_chip_data(data);
   int shift = data-hwirq  0xf;
   int reg = data-hwirq  4;
  
 @@ -65,7 +65,7 @@ static void mt6397_irq_disable(struct irq_data *data)
  
  static void mt6397_irq_enable(struct irq_data *data)
  {
 - struct mt6397_chip *mt6397 = irq_get_chip_data(data-irq);
 + struct mt6397_chip *mt6397 = irq_data_get_irq_chip_data(data);
   int shift = data-hwirq  0xf;
   int reg = data-hwirq  4;
  
 diff --git a/drivers/mfd/t7l66xb.c b/drivers/mfd/t7l66xb.c
 index c09fb5dccd50..b752ca2be549 100644
 --- a/drivers/mfd/t7l66xb.c
 +++ b/drivers/mfd/t7l66xb.c
 @@ -187,7 +187,7 @@ static struct mfd_cell t7l66xb_cells[] = {
  /* Handle the T7L66XB interrupt mux */
  static void t7l66xb_irq(unsigned int irq, struct irq_desc *desc)
  {
 - struct t7l66xb *t7l66xb = irq_get_handler_data(irq);
 + struct t7l66xb *t7l66xb = irq_desc_get_handler_data(desc);
   unsigned int isr;
   unsigned int i, irq_base;
  
 diff --git a/drivers/mfd/tc6393xb.c b/drivers/mfd/tc6393xb.c
 index 63458b39a97d..d21253a51cff 100644
 --- 

Re: [PATCH] ASoC: omap: fix up SND_OMAP_SOC_OMAP_ABE_TWL6040 dependency, again

2015-05-20 Thread Peter Ujfalusi
On 05/19/2015 03:47 PM, Arnd Bergmann wrote:
 I tried to fix this before and submitted a working patch, but after
 some discussion we came up with what seemed to be a nicer solution,
 resulting in commit 3d4cf65e2d (ASoC: omap: fix up
 SND_OMAP_SOC_OMAP_ABE_TWL6040 dependency). Unfortunately, that
 version was incomplete, and we still get this build error:
 
 drivers/clk/clk-palmas.c:46:16: error: field 'hw' has incomplete type
 drivers/clk/clk-palmas.c: In function 'to_palmas_clks_info':
 drivers/clk/clk-palmas.c:54:74: warning: initialization from incompatible 
 pointer type [-Winc
 
 This happens only in randconfig builds that turn on MFD_PALMAS
 on a platform other than OMAP2+ when COMPILE_TEST is set
 but COMMON_CLK is not.
 
 The new approach is only 'select COMMON_CLK_PALMAS' if we know
 that we are on an OMAP5 platform and MFD_PALMAS is already set.
 This patch has survived thousands of randconfig builds and I
 don't see a remaining hole in the logic.

Yeah, debugging Kconfig is not for the faint-hearted ;)

Acked-by: Peter Ujfalusi peter.ujfal...@ti.com

 Signed-off-by: Arnd Bergmann a...@arndb.de
 Fixes: 3d4cf65e2d (ASoC: omap: fix up SND_OMAP_SOC_OMAP_ABE_TWL6040 
 dependency)
 
 diff --git a/sound/soc/omap/Kconfig b/sound/soc/omap/Kconfig
 index 6768e4f7d7d0..30d0109703a9 100644
 --- a/sound/soc/omap/Kconfig
 +++ b/sound/soc/omap/Kconfig
 @@ -100,12 +100,13 @@ config SND_OMAP_SOC_OMAP_TWL4030
  
  config SND_OMAP_SOC_OMAP_ABE_TWL6040
   tristate SoC Audio support for OMAP boards using ABE and twl6040 codec
 - depends on TWL6040_CORE  SND_OMAP_SOC  (ARCH_OMAP4 || SOC_OMAP5 || 
 COMPILE_TEST)
 + depends on TWL6040_CORE  SND_OMAP_SOC
 + depends on ARCH_OMAP4 || (SOC_OMAP5  MFD_PALMAS) || COMPILE_TEST
   select SND_OMAP_SOC_DMIC
   select SND_OMAP_SOC_MCPDM
   select SND_SOC_TWL6040
   select SND_SOC_DMIC
 - select COMMON_CLK_PALMAS if MFD_PALMAS
 + select COMMON_CLK_PALMAS if (SOC_OMAP5  MFD_PALMAS)
   help
 Say Y if you want to add support for SoC audio on OMAP boards using
 ABE and twl6040 codec. This driver currently supports:
 
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[RFC v1 22/25] genirq: Kill the first parameter 'irq' of irq_flow_handler_t

2015-05-20 Thread Jiang Liu
Now most IRQ flow handlers make no use of the first parameter 'irq'.
And for those who do make use of 'irq', we could easily get the irq
number through irq_desc-irq_data-irq. So kill the first parameter
'irq' of irq_flow_handler_t.

To ease review, I have split the changes into several parts, though
they should be merge as one to support bisecting.

Signed-off-by: Jiang Liu jiang@linux.intel.com
---
 drivers/gpio/gpio-altera.c |6 ++
 drivers/gpio/gpio-bcm-kona.c   |2 +-
 drivers/gpio/gpio-davinci.c|3 ++-
 drivers/gpio/gpio-dwapb.c  |2 +-
 drivers/gpio/gpio-ep93xx.c |5 +++--
 drivers/gpio/gpio-intel-mid.c  |2 +-
 drivers/gpio/gpio-lynxpoint.c  |2 +-
 drivers/gpio/gpio-mpc8xxx.c|2 +-
 drivers/gpio/gpio-msic.c   |2 +-
 drivers/gpio/gpio-msm-v2.c |2 +-
 drivers/gpio/gpio-mvebu.c  |2 +-
 drivers/gpio/gpio-mxc.c|4 ++--
 drivers/gpio/gpio-mxs.c|2 +-
 drivers/gpio/gpio-omap.c   |2 +-
 drivers/gpio/gpio-pl061.c  |2 +-
 drivers/gpio/gpio-pxa.c|2 +-
 drivers/gpio/gpio-sa1100.c |4 ++--
 drivers/gpio/gpio-tegra.c  |2 +-
 drivers/gpio/gpio-timberdale.c |5 +++--
 drivers/gpio/gpio-tz1090.c |4 ++--
 drivers/gpio/gpio-vf610.c  |2 +-
 drivers/gpio/gpio-zynq.c   |2 +-
 22 files changed, 31 insertions(+), 30 deletions(-)

diff --git a/drivers/gpio/gpio-altera.c b/drivers/gpio/gpio-altera.c
index 449fb46cb8a0..985c3bd9a03e 100644
--- a/drivers/gpio/gpio-altera.c
+++ b/drivers/gpio/gpio-altera.c
@@ -200,8 +200,7 @@ static int altera_gpio_direction_output(struct gpio_chip 
*gc,
return 0;
 }
 
-static void altera_gpio_irq_edge_handler(unsigned int irq,
-   struct irq_desc *desc)
+static void altera_gpio_irq_edge_handler(struct irq_desc *desc)
 {
struct altera_gpio_chip *altera_gc;
struct irq_chip *chip;
@@ -230,8 +229,7 @@ static void altera_gpio_irq_edge_handler(unsigned int irq,
 }
 
 
-static void altera_gpio_irq_leveL_high_handler(unsigned int irq,
- struct irq_desc *desc)
+static void altera_gpio_irq_leveL_high_handler(struct irq_desc *desc)
 {
struct altera_gpio_chip *altera_gc;
struct irq_chip *chip;
diff --git a/drivers/gpio/gpio-bcm-kona.c b/drivers/gpio/gpio-bcm-kona.c
index 2e7a8c66fe57..6471892f4f83 100644
--- a/drivers/gpio/gpio-bcm-kona.c
+++ b/drivers/gpio/gpio-bcm-kona.c
@@ -427,7 +427,7 @@ static int bcm_kona_gpio_irq_set_type(struct irq_data *d, 
unsigned int type)
return 0;
 }
 
-static void bcm_kona_gpio_irq_handler(unsigned int irq, struct irq_desc *desc)
+static void bcm_kona_gpio_irq_handler(struct irq_desc *desc)
 {
void __iomem *reg_base;
int bit, bank_id;
diff --git a/drivers/gpio/gpio-davinci.c b/drivers/gpio/gpio-davinci.c
index 477d5b8616ab..31206ea4c84e 100644
--- a/drivers/gpio/gpio-davinci.c
+++ b/drivers/gpio/gpio-davinci.c
@@ -327,8 +327,9 @@ static struct irq_chip gpio_irqchip = {
 };
 
 static void
-gpio_irq_handler(unsigned irq, struct irq_desc *desc)
+gpio_irq_handler(struct irq_desc *desc)
 {
+   unsigned irq = irq_desc_get_irq(desc);
struct davinci_gpio_regs __iomem *g;
u32 mask = 0x;
struct davinci_gpio_controller *d;
diff --git a/drivers/gpio/gpio-dwapb.c b/drivers/gpio/gpio-dwapb.c
index 649be07a845d..bf7cb1be756d 100644
--- a/drivers/gpio/gpio-dwapb.c
+++ b/drivers/gpio/gpio-dwapb.c
@@ -147,7 +147,7 @@ static u32 dwapb_do_irq(struct dwapb_gpio *gpio)
return ret;
 }
 
-static void dwapb_irq_handler(u32 irq, struct irq_desc *desc)
+static void dwapb_irq_handler(struct irq_desc *desc)
 {
struct dwapb_gpio *gpio = irq_desc_get_handler_data(desc);
struct irq_chip *chip = irq_desc_get_chip(desc);
diff --git a/drivers/gpio/gpio-ep93xx.c b/drivers/gpio/gpio-ep93xx.c
index 45684f36ddb1..03648a8a6f8e 100644
--- a/drivers/gpio/gpio-ep93xx.c
+++ b/drivers/gpio/gpio-ep93xx.c
@@ -78,7 +78,7 @@ static void ep93xx_gpio_int_debounce(unsigned int irq, bool 
enable)
EP93XX_GPIO_REG(int_debounce_register_offset[port]));
 }
 
-static void ep93xx_gpio_ab_irq_handler(unsigned int irq, struct irq_desc *desc)
+static void ep93xx_gpio_ab_irq_handler(struct irq_desc *desc)
 {
unsigned char status;
int i;
@@ -100,13 +100,14 @@ static void ep93xx_gpio_ab_irq_handler(unsigned int irq, 
struct irq_desc *desc)
}
 }
 
-static void ep93xx_gpio_f_irq_handler(unsigned int irq, struct irq_desc *desc)
+static void ep93xx_gpio_f_irq_handler(struct irq_desc *desc)
 {
/*
 * map discontiguous hw irq range to continuous sw irq range:
 *
 *  IRQ_EP93XX_GPIO{0..7}MUX - gpio_to_irq(EP93XX_GPIO_LINE_F({0..7})
 */
+   unsigned int irq = irq_desc_get_irq(desc);
int port_f_idx = ((irq + 1)  7) ^ 4; /* {19..22,47..50} - {0..7} */
int gpio_irq = 

Re: [PATCHv3 00/10] ARM: DRA7: add display support

2015-05-20 Thread Tomi Valkeinen
Hi,

On 06/05/15 13:08, Tomi Valkeinen wrote:
 Hi,
 
 This series adds the arch/arm/ side of the display support for DRA7 (DRA72x,
 DRA74x, AM54xx) SoCs. Also support for HDMI output on x15 and DRA72 EVM boards
 is added.
 
 This series is v3, and is based on v4.1-rc2. There are no differences to v2,
 except rebased and tested.
 
  Tomi
 
 Tomi Valkeinen (10):
   arm/dts: dra7xx: add 'ti,set-rate-parent' for dss_dss_clk
   ARM: DRA7: hwmod: add DMM hwmod description
   ARM: DRA7: hwmod: set DSS submodule parent hwmods
   ARM: OMAP: display: change compat names to array
   ARM: OMAP2+: display: detect DRA7 DSS
   arm/dts: dra7.dtsi: add DSS support
   arm/dts: dra72-evm.dts: add HDMI
   arm/dts: am57xx-beagle-x15.dts: add HDMI
   arm: dra7: add DESHDCP clock
   CLK: TI: always enable DESHDCP clock
 
  arch/arm/boot/dts/am57xx-beagle-x15.dts   |  81 ++
  arch/arm/boot/dts/dra7.dtsi   |  43 
  arch/arm/boot/dts/dra72-evm.dts   | 110 
 ++
  arch/arm/boot/dts/dra72x.dtsi |  11 +++
  arch/arm/boot/dts/dra74x.dtsi |  15 
  arch/arm/boot/dts/dra7xx-clocks.dtsi  |  11 +++
  arch/arm/mach-omap2/display.c |  32 +
  arch/arm/mach-omap2/omap_hwmod_7xx_data.c |  33 +
  drivers/clk/ti/clk-7xx.c  |   8 ++-
  9 files changed, 328 insertions(+), 16 deletions(-)

Ping. Any comments? Can we get this into the next merge window?

 Tomi



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Re: [PATCH 1/3] phy: ti-pipe3: fix suspend

2015-05-20 Thread Kishon Vijay Abraham I

Hi Roger,

On Tuesday 12 May 2015 09:37 PM, Roger Quadros wrote:

Relying on PM-ops for shutting down PHY clocks was a
bad idea since the users (e.g. PCIe/SATA) might not
have been suspended by then.

The main culprit for not shutting down the clocks was
the stray pm_runtime_get() call in probe.

Fix the whole thing in the right way by getting rid
of that pm_runtime_get() call from probe and
removing all PM-ops. It is the sole responsibility
of the PHY user to properly turn OFF and de-initialize
the PHY as part of its suspend routine.

As PHY core serializes init/exit we don't need
to use a spinlock in this driver. So get rid of it.

Signed-off-by: Roger Quadros rog...@ti.com
Signed-off-by: Sekhar Nori nsek...@ti.com
---
  drivers/phy/phy-ti-pipe3.c | 112 -
  1 file changed, 18 insertions(+), 94 deletions(-)

diff --git a/drivers/phy/phy-ti-pipe3.c b/drivers/phy/phy-ti-pipe3.c
index 53f295c..e13a306 100644
--- a/drivers/phy/phy-ti-pipe3.c
+++ b/drivers/phy/phy-ti-pipe3.c
@@ -28,7 +28,6 @@
  #include linux/delay.h
  #include linux/phy/omap_control_phy.h
  #include linux/of_platform.h
-#include linux/spinlock.h

  #define   PLL_STATUS  0x0004
  #define   PLL_GO  0x0008
@@ -83,10 +82,6 @@ struct ti_pipe3 {
struct clk  *refclk;
struct clk  *div_clk;
struct pipe3_dpll_map   *dpll_map;
-   boolenabled;
-   spinlock_t  lock;   /* serialize clock enable/disable */
-   /* the below flag is needed specifically for SATA */
-   boolrefclk_enabled;
  };

  static struct pipe3_dpll_map dpll_map_usb[] = {
@@ -137,6 +132,9 @@ static struct pipe3_dpll_params 
*ti_pipe3_get_dpll_params(struct ti_pipe3 *phy)
return NULL;
  }

+static int ti_pipe3_enable_clocks(struct ti_pipe3 *phy);
+static void ti_pipe3_disable_clocks(struct ti_pipe3 *phy);
+
  static int ti_pipe3_power_off(struct phy *x)
  {
struct ti_pipe3 *phy = phy_get_drvdata(x);
@@ -217,6 +215,7 @@ static int ti_pipe3_init(struct phy *x)
u32 val;
int ret = 0;

+   ti_pipe3_enable_clocks(phy);
/*
 * Set pcie_pcs register to 0x96 for proper functioning of phy
 * as recommended in AM572x TRM SPRUHZ6, section 18.5.2.2, table
@@ -277,6 +276,8 @@ static int ti_pipe3_exit(struct phy *x)
return -EBUSY;
}

+   ti_pipe3_disable_clocks(phy);
+
return 0;
  }
  static struct phy_ops ops = {
@@ -305,8 +306,7 @@ static int ti_pipe3_probe(struct platform_device *pdev)
if (!phy)
return -ENOMEM;

-   phy-dev = pdev-dev;
-   spin_lock_init(phy-lock);
+   phy-dev = pdev-dev;


this looks more of a cleanup.


if (!of_device_is_compatible(node, ti,phy-pipe3-pcie)) {
match = of_match_device(ti_pipe3_id_table, pdev-dev);
@@ -402,6 +402,9 @@ static int ti_pipe3_probe(struct platform_device *pdev)

platform_set_drvdata(pdev, phy);
pm_runtime_enable(phy-dev);
+   /* Prevent auto-disable of refclk for SATA PHY due to Errata i783 */
+   if (of_device_is_compatible(node, ti,phy-pipe3-sata))
+   clk_prepare_enable(phy-refclk);

generic_phy = devm_phy_create(phy-dev, NULL, ops);
if (IS_ERR(generic_phy))
@@ -413,24 +416,19 @@ static int ti_pipe3_probe(struct platform_device *pdev)
if (IS_ERR(phy_provider))
return PTR_ERR(phy_provider);

-   pm_runtime_get(pdev-dev);
-
return 0;
  }

  static int ti_pipe3_remove(struct platform_device *pdev)
  {
-   if (!pm_runtime_suspended(pdev-dev))
-   pm_runtime_put(pdev-dev);
pm_runtime_disable(pdev-dev);

return 0;
  }

-#ifdef CONFIG_PM
  static int ti_pipe3_enable_refclk(struct ti_pipe3 *phy)
  {
-   if (!IS_ERR(phy-refclk)  !phy-refclk_enabled) {
+   if (!IS_ERR(phy-refclk)) {
int ret;

ret = clk_prepare_enable(phy-refclk);
@@ -438,7 +436,6 @@ static int ti_pipe3_enable_refclk(struct ti_pipe3 *phy)
dev_err(phy-dev, Failed to enable refclk %d\n, ret);
return ret;
}
-   phy-refclk_enabled = true;
}

return 0;
@@ -448,28 +445,21 @@ static void ti_pipe3_disable_refclk(struct ti_pipe3 *phy)
  {
if (!IS_ERR(phy-refclk))
clk_disable_unprepare(phy-refclk);
-
-   phy-refclk_enabled = false;
  }

  static int ti_pipe3_enable_clocks(struct ti_pipe3 *phy)
  {
int ret = 0;
-   unsigned long flags;
-
-   spin_lock_irqsave(phy-lock, flags);
-   if (phy-enabled)
-   goto err1;

ret = ti_pipe3_enable_refclk(phy);


we can enable refclk here itself instead of having a separate function it?

if (ret)
-   goto err1;
+   return ret;

if (!IS_ERR(phy-wkupclk)) 

Re: [PATCH 2/3] phy: ti-pipe3: i783 workaround for SATA lockup after dpll unlock/relock

2015-05-20 Thread Kishon Vijay Abraham I

Hi Roger,

On Tuesday 12 May 2015 09:37 PM, Roger Quadros wrote:

SATA_PLL_SOFT_RESET bit of CTRL_CORE_SMA_SW_0 must be toggled
between a SATA DPLL unlock and re-lock to prevent SATA lockup.

Introduce a new DT parameter 'syscon-pllreset' to provide the syscon
regmap access to this register which sits in the control module.

If the register is not provided we fallback to the old behaviour
i.e. SATA DPLL refclk will not be disabled and we prevent SoC low
power states.

Signed-off-by: Roger Quadros rog...@ti.com
---
  Documentation/devicetree/bindings/phy/ti-phy.txt | 16 ++
  drivers/phy/phy-ti-pipe3.c   | 67 
  2 files changed, 74 insertions(+), 9 deletions(-)

diff --git a/Documentation/devicetree/bindings/phy/ti-phy.txt 
b/Documentation/devicetree/bindings/phy/ti-phy.txt
index 305e3df..f0f5537 100644
--- a/Documentation/devicetree/bindings/phy/ti-phy.txt
+++ b/Documentation/devicetree/bindings/phy/ti-phy.txt
@@ -82,6 +82,9 @@ Optional properties:
   - id: If there are multiple instance of the same type, in order to
 differentiate between each instance id can be used (e.g., multi-lane PCIe
 PHY). If id is not provided, it is set to default value of '1'.
+ - syscon-pllreset: Handle to system control region that contains the
+   CTRL_CORE_SMA_SW_0 register and register offset to the CTRL_CORE_SMA_SW_0
+   register that contains the SATA_PLL_SOFT_RESET bit. Only valid for sata_phy.

  This is usually a subnode of ocp2scp to which it is connected.

@@ -100,3 +103,16 @@ usb3phy@4a084400 {
sysclk,
refclk;
  };
+
+sata_phy: phy@4A096000 {
+   compatible = ti,phy-pipe3-sata;
+   reg = 0x4A096000 0x80, /* phy_rx */
+ 0x4A096400 0x64, /* phy_tx */
+ 0x4A096800 0x40; /* pll_ctrl */
+   reg-names = phy_rx, phy_tx, pll_ctrl;
+   ctrl-module = omap_control_sata;
+   clocks = sys_clkin1, sata_ref_clk;
+   clock-names = sysclk, refclk;
+   syscon-pllreset = dra7_ctrl_core 0x3fc;
+   #phy-cells = 0;
+};
diff --git a/drivers/phy/phy-ti-pipe3.c b/drivers/phy/phy-ti-pipe3.c
index e13a306..d730142 100644
--- a/drivers/phy/phy-ti-pipe3.c
+++ b/drivers/phy/phy-ti-pipe3.c
@@ -28,6 +28,8 @@
  #include linux/delay.h
  #include linux/phy/omap_control_phy.h
  #include linux/of_platform.h
+#include linux/mfd/syscon.h
+#include linux/regmap.h

  #define   PLL_STATUS  0x0004
  #define   PLL_GO  0x0008
@@ -52,6 +54,8 @@
  #define   PLL_LOCK0x2
  #define   PLL_IDLE0x1

+#define SATA_PLL_SOFT_RESETBIT(18)
+
  /*
   * This is an Empirical value that works, need to confirm the actual
   * value required for the PIPE3PHY_PLL_CONFIGURATION2.PLL_IDLE status
@@ -82,6 +86,9 @@ struct ti_pipe3 {
struct clk  *refclk;
struct clk  *div_clk;
struct pipe3_dpll_map   *dpll_map;
+   struct regmap   *dpll_reset_syscon; /* ctrl. reg. acces */
+   unsigned intdpll_reset_reg; /* reg. index within syscon */
+   boolsata_refclk_enabled;
  };

  static struct pipe3_dpll_map dpll_map_usb[] = {
@@ -249,11 +256,15 @@ static int ti_pipe3_exit(struct phy *x)
u32 val;
unsigned long timeout;

-   /* SATA DPLL can't be powered down due to Errata i783 and PCIe
-* does not have internal DPLL
+   /* If dpll_reset_syscon is not present we wont power down SATA DPLL
+* due to Errata i783
 */
-   if (of_device_is_compatible(phy-dev-of_node, ti,phy-pipe3-sata) ||
-   of_device_is_compatible(phy-dev-of_node, ti,phy-pipe3-pcie))
+   if (of_device_is_compatible(phy-dev-of_node, ti,phy-pipe3-sata) 
+   !phy-dpll_reset_syscon)
+   return 0;
+
+   /* PCIe doesn't have DPLL. FIXME: need to disable clocks though */


I think it's better to fix it in this patch itself.. to disable clocks for PCIe.

+   if (of_device_is_compatible(phy-dev-of_node, ti,phy-pipe3-pcie))
return 0;

/* Put DPLL in IDLE mode */
@@ -276,6 +287,14 @@ static int ti_pipe3_exit(struct phy *x)
return -EBUSY;
}

+   /* i783: SATA needs control bit toggle after PLL unlock */
+   if (of_device_is_compatible(phy-dev-of_node, ti,phy-pipe3-sata)) {
+   regmap_update_bits(phy-dpll_reset_syscon, phy-dpll_reset_reg,
+   SATA_PLL_SOFT_RESET, SATA_PLL_SOFT_RESET);
+   regmap_update_bits(phy-dpll_reset_syscon, phy-dpll_reset_reg,
+   SATA_PLL_SOFT_RESET, 0);
+   }
+
ti_pipe3_disable_clocks(phy);

return 0;
@@ -350,6 +369,21 @@ static int ti_pipe3_probe(struct platform_device *pdev)
}
} else {
phy-wkupclk = ERR_PTR(-ENODEV);
+   phy-dpll_reset_syscon = syscon_regmap_lookup_by_phandle(node,

Re: [PATCH 2/3] phy: ti-pipe3: i783 workaround for SATA lockup after dpll unlock/relock

2015-05-20 Thread Roger Quadros

Kishon,

On 20/05/15 16:19, Kishon Vijay Abraham I wrote:

Hi Roger,

On Tuesday 12 May 2015 09:37 PM, Roger Quadros wrote:

SATA_PLL_SOFT_RESET bit of CTRL_CORE_SMA_SW_0 must be toggled
between a SATA DPLL unlock and re-lock to prevent SATA lockup.

Introduce a new DT parameter 'syscon-pllreset' to provide the syscon
regmap access to this register which sits in the control module.

If the register is not provided we fallback to the old behaviour
i.e. SATA DPLL refclk will not be disabled and we prevent SoC low
power states.

Signed-off-by: Roger Quadros rog...@ti.com
---
  Documentation/devicetree/bindings/phy/ti-phy.txt | 16 ++
  drivers/phy/phy-ti-pipe3.c   | 67

  2 files changed, 74 insertions(+), 9 deletions(-)

diff --git a/Documentation/devicetree/bindings/phy/ti-phy.txt
b/Documentation/devicetree/bindings/phy/ti-phy.txt
index 305e3df..f0f5537 100644
--- a/Documentation/devicetree/bindings/phy/ti-phy.txt
+++ b/Documentation/devicetree/bindings/phy/ti-phy.txt
@@ -82,6 +82,9 @@ Optional properties:
   - id: If there are multiple instance of the same type, in order to
 differentiate between each instance id can be used (e.g.,
multi-lane PCIe
 PHY). If id is not provided, it is set to default value of '1'.
+ - syscon-pllreset: Handle to system control region that contains the
+   CTRL_CORE_SMA_SW_0 register and register offset to the
CTRL_CORE_SMA_SW_0
+   register that contains the SATA_PLL_SOFT_RESET bit. Only valid for
sata_phy.

  This is usually a subnode of ocp2scp to which it is connected.

@@ -100,3 +103,16 @@ usb3phy@4a084400 {
  sysclk,
  refclk;
  };
+
+sata_phy: phy@4A096000 {
+compatible = ti,phy-pipe3-sata;
+reg = 0x4A096000 0x80, /* phy_rx */
+  0x4A096400 0x64, /* phy_tx */
+  0x4A096800 0x40; /* pll_ctrl */
+reg-names = phy_rx, phy_tx, pll_ctrl;
+ctrl-module = omap_control_sata;
+clocks = sys_clkin1, sata_ref_clk;
+clock-names = sysclk, refclk;
+syscon-pllreset = dra7_ctrl_core 0x3fc;
+#phy-cells = 0;
+};
diff --git a/drivers/phy/phy-ti-pipe3.c b/drivers/phy/phy-ti-pipe3.c
index e13a306..d730142 100644
--- a/drivers/phy/phy-ti-pipe3.c
+++ b/drivers/phy/phy-ti-pipe3.c
@@ -28,6 +28,8 @@
  #include linux/delay.h
  #include linux/phy/omap_control_phy.h
  #include linux/of_platform.h
+#include linux/mfd/syscon.h
+#include linux/regmap.h

  #definePLL_STATUS0x0004
  #definePLL_GO0x0008
@@ -52,6 +54,8 @@
  #definePLL_LOCK0x2
  #definePLL_IDLE0x1

+#define SATA_PLL_SOFT_RESETBIT(18)
+
  /*
   * This is an Empirical value that works, need to confirm the actual
   * value required for the PIPE3PHY_PLL_CONFIGURATION2.PLL_IDLE status
@@ -82,6 +86,9 @@ struct ti_pipe3 {
  struct clk*refclk;
  struct clk*div_clk;
  struct pipe3_dpll_map*dpll_map;
+struct regmap*dpll_reset_syscon; /* ctrl. reg. acces */
+unsigned intdpll_reset_reg; /* reg. index within syscon */
+boolsata_refclk_enabled;
  };

  static struct pipe3_dpll_map dpll_map_usb[] = {
@@ -249,11 +256,15 @@ static int ti_pipe3_exit(struct phy *x)
  u32 val;
  unsigned long timeout;

-/* SATA DPLL can't be powered down due to Errata i783 and PCIe
- * does not have internal DPLL
+/* If dpll_reset_syscon is not present we wont power down SATA DPLL
+ * due to Errata i783
   */
-if (of_device_is_compatible(phy-dev-of_node,
ti,phy-pipe3-sata) ||
-of_device_is_compatible(phy-dev-of_node, ti,phy-pipe3-pcie))
+if (of_device_is_compatible(phy-dev-of_node,
ti,phy-pipe3-sata) 
+!phy-dpll_reset_syscon)
+return 0;
+
+/* PCIe doesn't have DPLL. FIXME: need to disable clocks though */


I think it's better to fix it in this patch itself.. to disable clocks
for PCIe.

+if (of_device_is_compatible(phy-dev-of_node, ti,phy-pipe3-pcie))
  return 0;

  /* Put DPLL in IDLE mode */
@@ -276,6 +287,14 @@ static int ti_pipe3_exit(struct phy *x)
  return -EBUSY;
  }

+/* i783: SATA needs control bit toggle after PLL unlock */
+if (of_device_is_compatible(phy-dev-of_node,
ti,phy-pipe3-sata)) {
+regmap_update_bits(phy-dpll_reset_syscon, phy-dpll_reset_reg,
+SATA_PLL_SOFT_RESET, SATA_PLL_SOFT_RESET);
+regmap_update_bits(phy-dpll_reset_syscon, phy-dpll_reset_reg,
+SATA_PLL_SOFT_RESET, 0);
+}
+
  ti_pipe3_disable_clocks(phy);

  return 0;
@@ -350,6 +369,21 @@ static int ti_pipe3_probe(struct platform_device
*pdev)
  }
  } else {
  phy-wkupclk = ERR_PTR(-ENODEV);
+phy-dpll_reset_syscon = syscon_regmap_lookup_by_phandle(node,
+syscon-pllreset);
+if (IS_ERR(phy-dpll_reset_syscon)) {
+dev_info(pdev-dev,
+ can't get syscon-pllreset, sata dpll won't idle\n);
+

Re: [PATCH] ARM: dts: omap3-devkit8000: Fix NAND DT node

2015-05-20 Thread Tony Lindgren
* Anthoine Bourgeois anthoine.bourge...@gmail.com [150519 14:11]:
 Add nand-ecc-opt and device-width properties to enable nand support on
 Devkit8000.
 
 Signed-off-by: Anthoine Bourgeois anthoine.bourge...@gmail.com
 ---
  arch/arm/boot/dts/omap3-devkit8000.dts | 2 ++
  1 file changed, 2 insertions(+)
 
 diff --git a/arch/arm/boot/dts/omap3-devkit8000.dts 
 b/arch/arm/boot/dts/omap3-devkit8000.dts
 index 169037e..283db1d 100644
 --- a/arch/arm/boot/dts/omap3-devkit8000.dts
 +++ b/arch/arm/boot/dts/omap3-devkit8000.dts
 @@ -111,6 +111,8 @@
   nand@0,0 {
   reg = 0 0 4; /* CS0, offset 0, IO size 4 */
   nand-bus-width = 16;
 + gpmc,device-width = 2;
 + ti,nand-ecc-opt = sw;
  
   gpmc,sync-clk-ps = 0;
   gpmc,cs-on-ns = 0;

Applying into omap-for-v4.1/fixes thanks.

Tony
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Re: [PATCH] ARM: dts: am335x-boneblack: disable RTC-only sleep

2015-05-20 Thread Tony Lindgren
* Robert Nelson robertcnel...@gmail.com [150520 08:53]:
 Fixes: http://bugs.elinux.org/issues/143
 
 Entering RTC-only sleep is only properly supported on early prototypes series
 (pre-A6) of the BeagleBone Black.  Since rev (A6A), which include all 
 production
 versions, it is not support at due to.
 
 (rev A6) enable of the 3v3b regulator moved from LDO2 to LDO4 (3v3a)
 side-effect: 3v3b rail remains on in sleep-mode (also in off-mode when 
 battery-powered)
 
 (rev A6A) am335x vdds supply moved from LDO3 to LDO1
 side-effect: vdds remains supplied in sleep-mode
 
 Reported-by: Matthijs van Duin matthijsvand...@gmail.com
 Tested-by: Matthijs van Duin matthijsvand...@gmail.com
 Signed-off-by: Robert Nelson robertcnel...@gmail.com
 Cc: Tony Lindgren t...@atomide.com
 Cc: Felipe Balbi ba...@ti.com
 Cc: Johan Hovold jo...@kernel.org
 ---
  arch/arm/boot/dts/am335x-boneblack.dts | 4 
  1 file changed, 4 deletions(-)
 
 diff --git a/arch/arm/boot/dts/am335x-boneblack.dts 
 b/arch/arm/boot/dts/am335x-boneblack.dts
 index 5c42d25..901739f 100644
 --- a/arch/arm/boot/dts/am335x-boneblack.dts
 +++ b/arch/arm/boot/dts/am335x-boneblack.dts
 @@ -80,7 +80,3 @@
   status = okay;
   };
  };
 -
 -rtc {
 - system-power-controller;
 -};

Applying into omap-for-v4.1/fixes thanks.

Regards,

Tony
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Re: [PATCH] ARM: dts: add core2 padconf region for am3517

2015-05-20 Thread Tony Lindgren
* Andrey Skvortsov andrej.skvort...@gmail.com [150510 14:29]:
 According to the technical reference manual for AM35xx system
 controller module (SCM) PADCONFS core registers are divided in two
 regions: 0x48002030..0x48002268 and 0x480025d8..0x480025FC.
 First region is the same for all omap3 SoC and is described in omap3.dtsi.
 The second region is the same as in omap34xx (see omap34xx.dtsi)
 and omap35xx. The patch adds missing description for the second region.
 This patch was tested on AM3517.
 
 Signed-off-by: Andrey Skvortsov andrej.skvort...@gmail.com

Applying into omap-for-v4.2/dt thanks.

Tony

 Commit 3d495383648a (ARM: dts: Split omap3 pinmux core device) notes that
 Nishanth Menon n...@ti.com said that 3517 does not have padconf2 region.
 Unfortunately I couldn't find reference to his post on mailing list.
 This patch was tested on AM3517 SoC and original vendor code contains
 pinmuxing for this second region as well.
 
  arch/arm/boot/dts/am3517.dtsi | 12 
  1 file changed, 12 insertions(+)
 
 diff --git a/arch/arm/boot/dts/am3517.dtsi b/arch/arm/boot/dts/am3517.dtsi
 index c90724b..2534500 100644
 --- a/arch/arm/boot/dts/am3517.dtsi
 +++ b/arch/arm/boot/dts/am3517.dtsi
 @@ -60,5 +60,16 @@
   dma-names = tx, rx;
   clock-frequency = 4800;
   };
 +
 + omap3_pmx_core2: pinmux@480025D8 {
 + compatible = ti,omap3-padconf, pinctrl-single;
 + reg = 0x480025D8 0x24;
 + #address-cells = 1;
 + #size-cells = 0;
 + #interrupt-cells = 1;
 + interrupt-controller;
 + pinctrl-single,register-width = 16;
 + pinctrl-single,function-mask = 0xff1f;
 + };
   };
  };
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Re: [RFC v1 15/25] genirq: Kill the first parameter 'irq' of irq_flow_handler_t

2015-05-20 Thread Jiang Liu
On 2015/5/20 23:28, Thomas Gleixner wrote:
 On Wed, 20 May 2015, Jiang Liu wrote:
 -static void locomo_handler(unsigned int irq, struct irq_desc *desc)
 +static void locomo_handler(struct irq_desc *desc)
  {
  struct locomo *lchip = irq_desc_get_chip_data(desc);
 +unsigned int irq;
  int req, i;
 
 That leaves irq unitialized 
That should be OK, 'irq' here is just a local variable.
Actually it may be changed as:
if (req) {
/* generate the next interrupt(s) */
-irq = lchip-irq_base;
+unsigned int irq = lchip-irq_base;
for (i = 0; i = 3; i++, irq++) {
if (req  (0x0100  i)) {
generic_handle_irq(irq);
}

}
}

 
 Thanks,
 
   tglx
 
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Re: [RFC v1 15/25] genirq: Kill the first parameter 'irq' of irq_flow_handler_t

2015-05-20 Thread Thomas Gleixner
On Wed, 20 May 2015, Jiang Liu wrote:

 On 2015/5/20 23:28, Thomas Gleixner wrote:
  On Wed, 20 May 2015, Jiang Liu wrote:
  -static void locomo_handler(unsigned int irq, struct irq_desc *desc)
  +static void locomo_handler(struct irq_desc *desc)
   {
 struct locomo *lchip = irq_desc_get_chip_data(desc);
  +  unsigned int irq;
 int req, i;
  
  That leaves irq unitialized 
 That should be OK, 'irq' here is just a local variable.
 Actually it may be changed as:
 if (req) {
 /* generate the next interrupt(s) */
 -irq = lchip-irq_base;
 +unsigned int irq = lchip-irq_base;

Indeed. 
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Re: [PATCH] ARM: dts: Fix WLAN interrupt line for AM335x EVM-SK

2015-05-20 Thread Tony Lindgren
* Romain Izard romain.izard@gmail.com [150513 00:39]:
 While Sitara AM335x SoCs are very close to OMAP SoCs, the 32-line GPIO
 controllers are numbered from 0 on AM335x and from 1 on OMAP. But when
 the configuration for the TI WLAN controllers was converted from
 platform data to device tree, this detail was overlooked, as 10 boards
 were using OMAP with the WL12xx and WL18xx controllers, and only one
 was based on AM335x.
 
 This invalid configuration prevents the WL1271 module on the AM335x
 EVM-SK from notifying interrupts to the SoC, and breaks the wlan driver.
 
 The DTS must be corrected to use the correct GPIO controller.
 
 Signed-off-by: Romain Izard romain.izard@gmail.com
 ---
  arch/arm/boot/dts/am335x-evmsk.dts | 2 +-
  1 file changed, 1 insertion(+), 1 deletion(-)
 
 diff --git a/arch/arm/boot/dts/am335x-evmsk.dts 
 b/arch/arm/boot/dts/am335x-evmsk.dts
 index 87fc7a35e802..156d05efcb70 100644
 --- a/arch/arm/boot/dts/am335x-evmsk.dts
 +++ b/arch/arm/boot/dts/am335x-evmsk.dts
 @@ -654,7 +654,7 @@
   wlcore: wlcore@2 {
   compatible = ti,wl1271;
   reg = 2;
 - interrupt-parent = gpio1;
 + interrupt-parent = gpio0;
   interrupts = 31 IRQ_TYPE_LEVEL_HIGH; /* gpio 31 */
   ref-clock-frequency = 3840;
   };

Applying into omap-for-v4.1/fixes thanks.

Tony
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Re: [RFC v1 15/25] genirq: Kill the first parameter 'irq' of irq_flow_handler_t

2015-05-20 Thread Thomas Gleixner
On Wed, 20 May 2015, Jiang Liu wrote:
 -static void locomo_handler(unsigned int irq, struct irq_desc *desc)
 +static void locomo_handler(struct irq_desc *desc)
  {
   struct locomo *lchip = irq_desc_get_chip_data(desc);
 + unsigned int irq;
   int req, i;

That leaves irq unitialized 

Thanks,

tglx
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Re: [RFC v1 15/25] genirq: Kill the first parameter 'irq' of irq_flow_handler_t

2015-05-20 Thread Hans Ulli Kroll


On Wed, 20 May 2015, Jiang Liu wrote:

 Now most IRQ flow handlers make no use of the first parameter 'irq'.
 And for those who do make use of 'irq', we could easily get the irq
 number through irq_desc-irq_data-irq. So kill the first parameter
 'irq' of irq_flow_handler_t.
 
 To ease review, I have split the changes into several parts, though
 they should be merge as one to support bisecting.
 
 Signed-off-by: Jiang Liu jiang@linux.intel.com
 ---
  arch/arm/common/it8152.c   |2 +-
  arch/arm/common/locomo.c   |3 ++-
  arch/arm/common/sa.c   |4 ++--
  arch/arm/include/asm/hardware/it8152.h |2 +-
  arch/arm/include/asm/mach/irq.h|4 ++--
  arch/arm/mach-dove/irq.c   |5 +++--
  arch/arm/mach-footbridge/isa-irq.c |4 ++--
  arch/arm/mach-gemini/gpio.c|2 +-
  arch/arm/mach-imx/3ds_debugboard.c |2 +-
  arch/arm/mach-imx/mach-mx31ads.c   |2 +-
  arch/arm/mach-iop13xx/msi.c|2 +-
  arch/arm/mach-lpc32xx/irq.c|4 ++--
  arch/arm/mach-omap1/fpga.c |2 +-
  arch/arm/mach-omap2/prm_common.c   |2 +-
  arch/arm/mach-pxa/balloon3.c   |3 ++-
  arch/arm/mach-pxa/cm-x2xx-pci.c|4 ++--
  arch/arm/mach-pxa/lpd270.c |3 ++-
  arch/arm/mach-pxa/pcm990-baseboard.c   |1 +
  arch/arm/mach-pxa/viper.c  |3 ++-
  arch/arm/mach-pxa/zeus.c   |3 ++-
  arch/arm/mach-rpc/ecard.c  |2 +-
  arch/arm/mach-s3c64xx/common.c |8 
  arch/arm/mach-sa1100/neponset.c|2 +-
  arch/arm/plat-orion/gpio.c |2 +-
  24 files changed, 39 insertions(+), 32 deletions(-)
 
 diff --git a/arch/arm/common/it8152.c b/arch/arm/common/it8152.c
 index 5114b68e99d5..aaa206181f92 100644
 --- a/arch/arm/common/it8152.c
 +++ b/arch/arm/common/it8152.c
 @@ -95,7 +95,7 @@ void it8152_init_irq(void)
   }
  }
  
 -void it8152_irq_demux(unsigned int irq, struct irq_desc *desc)
 +void it8152_irq_demux(struct irq_desc *desc)
  {
 int bits_pd, bits_lp, bits_ld;
 int i;
 diff --git a/arch/arm/common/locomo.c b/arch/arm/common/locomo.c
 index 02af4a07ceca..99d4535d7cc6 100644
 --- a/arch/arm/common/locomo.c
 +++ b/arch/arm/common/locomo.c
 @@ -138,9 +138,10 @@ static struct locomo_dev_info locomo_devices[] = {
   },
  };
  
 -static void locomo_handler(unsigned int irq, struct irq_desc *desc)
 +static void locomo_handler(struct irq_desc *desc)
  {
   struct locomo *lchip = irq_desc_get_chip_data(desc);
 + unsigned int irq;
   int req, i;
  
   /* Acknowledge the parent IRQ */
 diff --git a/arch/arm/common/sa.c b/arch/arm/common/sa.c
 index 0d0844fa54c2..762dfe7081f0 100644
 --- a/arch/arm/common/sa.c
 +++ b/arch/arm/common/sa.c
 @@ -197,7 +197,7 @@ static struct sa_dev_info sa_devices[] = {
   * will call us again if there are more interrupts to process.
   */
  static void
 -sa_irq_handler(unsigned int irq, struct irq_desc *desc)
 +sa_irq_handler(struct irq_desc *desc)
  {
   unsigned int stat0, stat1, i;
   struct sa *sachip = irq_desc_get_handler_data(desc);
 @@ -213,7 +213,7 @@ sa_irq_handler(unsigned int irq, struct irq_desc 
 *desc)
   sa_writel(stat1, mapbase + SA_INTSTATCLR1);
  
   if (stat0 == 0  stat1 == 0) {
 - do_bad_IRQ(irq, desc);
 + do_bad_IRQ(desc);
   return;
   }
  
 diff --git a/arch/arm/include/asm/hardware/it8152.h 
 b/arch/arm/include/asm/hardware/it8152.h
 index d36a73d7c0e8..076777ff3daa 100644
 --- a/arch/arm/include/asm/hardware/it8152.h
 +++ b/arch/arm/include/asm/hardware/it8152.h
 @@ -106,7 +106,7 @@ extern void __iomem *it8152_base_address;
  struct pci_dev;
  struct pci_sys_data;
  
 -extern void it8152_irq_demux(unsigned int irq, struct irq_desc *desc);
 +extern void it8152_irq_demux(struct irq_desc *desc);
  extern void it8152_init_irq(void);
  extern int it8152_pci_map_irq(const struct pci_dev *dev, u8 slot, u8 pin);
  extern int it8152_pci_setup(int nr, struct pci_sys_data *sys);
 diff --git a/arch/arm/include/asm/mach/irq.h b/arch/arm/include/asm/mach/irq.h
 index 2092ee1e1300..4703e00283db 100644
 --- a/arch/arm/include/asm/mach/irq.h
 +++ b/arch/arm/include/asm/mach/irq.h
 @@ -23,10 +23,10 @@ extern int show_fiq_list(struct seq_file *, int);
  /*
   * This is for easy migration, but should be changed in the source
   */
 -#define do_bad_IRQ(irq,desc) \
 +#define do_bad_IRQ(desc) \
  do { \
   raw_spin_lock(desc-lock); \
 - handle_bad_irq(irq, desc);  \
 + handle_bad_irq(desc);   \
   raw_spin_unlock(desc-lock);   \
  } while(0)
  
 diff --git a/arch/arm/mach-dove/irq.c b/arch/arm/mach-dove/irq.c
 index 

Re: [PATCH] ARM: OMAP: Constify irq_domain_ops

2015-05-20 Thread Tony Lindgren
* Krzysztof Kozlowski k.kozlowsk...@gmail.com [150427 05:52]:
 The irq_domain_ops are not modified by the driver and the irqdomain core
 code accepts pointer to a const data.
 
 Signed-off-by: Krzysztof Kozlowski k.kozlowsk...@gmail.com

Applying into omap-for-v4.2/cleanup thanks.

Tony

 ---
  arch/arm/mach-omap2/omap-wakeupgen.c | 2 +-
  1 file changed, 1 insertion(+), 1 deletion(-)
 
 diff --git a/arch/arm/mach-omap2/omap-wakeupgen.c 
 b/arch/arm/mach-omap2/omap-wakeupgen.c
 index 3b56722dfd8a..8e52621b5a6b 100644
 --- a/arch/arm/mach-omap2/omap-wakeupgen.c
 +++ b/arch/arm/mach-omap2/omap-wakeupgen.c
 @@ -444,7 +444,7 @@ static int wakeupgen_domain_alloc(struct irq_domain 
 *domain,
   return irq_domain_alloc_irqs_parent(domain, virq, nr_irqs, 
 parent_args);
  }
  
 -static struct irq_domain_ops wakeupgen_domain_ops = {
 +static const struct irq_domain_ops wakeupgen_domain_ops = {
   .xlate  = wakeupgen_domain_xlate,
   .alloc  = wakeupgen_domain_alloc,
   .free   = irq_domain_free_irqs_common,
 -- 
 2.1.0
 
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[PATCH] ARM: dts: am335x-boneblack: disable RTC-only sleep

2015-05-20 Thread Robert Nelson
Fixes: http://bugs.elinux.org/issues/143

Entering RTC-only sleep is only properly supported on early prototypes series
(pre-A6) of the BeagleBone Black.  Since rev (A6A), which include all production
versions, it is not support at due to.

(rev A6) enable of the 3v3b regulator moved from LDO2 to LDO4 (3v3a)
side-effect: 3v3b rail remains on in sleep-mode (also in off-mode when 
battery-powered)

(rev A6A) am335x vdds supply moved from LDO3 to LDO1
side-effect: vdds remains supplied in sleep-mode

Reported-by: Matthijs van Duin matthijsvand...@gmail.com
Tested-by: Matthijs van Duin matthijsvand...@gmail.com
Signed-off-by: Robert Nelson robertcnel...@gmail.com
Cc: Tony Lindgren t...@atomide.com
Cc: Felipe Balbi ba...@ti.com
Cc: Johan Hovold jo...@kernel.org
---
 arch/arm/boot/dts/am335x-boneblack.dts | 4 
 1 file changed, 4 deletions(-)

diff --git a/arch/arm/boot/dts/am335x-boneblack.dts 
b/arch/arm/boot/dts/am335x-boneblack.dts
index 5c42d25..901739f 100644
--- a/arch/arm/boot/dts/am335x-boneblack.dts
+++ b/arch/arm/boot/dts/am335x-boneblack.dts
@@ -80,7 +80,3 @@
status = okay;
};
 };
-
-rtc {
-   system-power-controller;
-};
-- 
2.1.4

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Re: [PATCHv2 4/4] DTS: ARM: OMAP3-N900: Add lis3lv02d support

2015-05-20 Thread Tony Lindgren
* Sebastian Reichel s...@kernel.org [150514 15:41]:
 Hi Tony,
 
 On Fri, Mar 27, 2015 at 03:39:46PM +0100, Sebastian Reichel wrote:
  This adds support for the N900's accelerometer to
  the Nokia N900 DTS file.
  
  Signed-off-by: Sebastian Reichel s...@kernel.org
  Acked-by: Tony Lindgren t...@atomide.com
  ---
  Quote from Tony:
  
  This at least currently does not conflict with anything I have
  queued, so I suggest you try to get Greg to take the whole set:
  
  http://article.gmane.org/gmane.linux.ports.arm.omap/125020
 
 It seems Greg did not see this message (this patch did not make it
 into 4.1-rc and the driver changes did), so could you queue this
 patch for 4.2?

Hmm seems to be there as commit 1ac4e6fee41d6.

Tony
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Re: [PATCH] ASoC: omap: fix up SND_OMAP_SOC_OMAP_ABE_TWL6040 dependency, again

2015-05-20 Thread Mark Brown
On Tue, May 19, 2015 at 02:47:32PM +0200, Arnd Bergmann wrote:
 I tried to fix this before and submitted a working patch, but after
 some discussion we came up with what seemed to be a nicer solution,
 resulting in commit 3d4cf65e2d (ASoC: omap: fix up
 SND_OMAP_SOC_OMAP_ABE_TWL6040 dependency). Unfortunately, that
 version was incomplete, and we still get this build error:

Applied, thanks.


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Description: Digital signature


Re: [PATCH RESEND] mach-omap2:Remove calls to deprecacted marco,PTR_RET in the files,fb.c and pmu.c

2015-05-20 Thread Tony Lindgren
* Nicholas Krause xerofo...@gmail.com [150518 07:09]:
 This removes two calls to the deprecated marco,PTR_RET in
 the files,fb.c and pmu.c for the functions,omap_init_vrfb
 and omap_init_pmu respectfully. Furthermore these are now
 replaced by calling the correctly non deprecacted function,
 PTR_ERR_OR_ZERO in both functions.

I've applied the original version today as they seem to be
the same.

Thanks,

Tony
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[GIT PULL] omap fixes against v4.1-rc4

2015-05-20 Thread Tony Lindgren
The following changes since commit e60a8fe1792dcd3aacda0959e0f4865bfefb7bb5:

  Merge tag 'for-v4.1-rc/omap-fixes-a' of 
git://git.kernel.org/pub/scm/linux/kernel/git/pjw/omap-pending into 
omap-for-v4.1/fixes (2015-05-11 13:23:19 -0700)

are available in the git repository at:

  git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap 
tags/omap-for-v4.1/fixes-rc4

for you to fetch changes up to f25bf74c8862efdc30453d16d60cf22958a4873e:

  ARM: dts: Fix WLAN interrupt line for AM335x EVM-SK (2015-05-20 10:00:10 
-0700)


Few minimal omap device tree fixes for v4.1-rc series:

- Disable BeagleBone black RTC-only sleep mode because of hardare
  related issues

- Fix NAND on Devkit8000

- Fix WLAN interrupt line on AM335x EVM-SK


Anthoine Bourgeois (1):
  ARM: dts: omap3-devkit8000: Fix NAND DT node

Robert Nelson (1):
  ARM: dts: am335x-boneblack: disable RTC-only sleep

Romain Izard (1):
  ARM: dts: Fix WLAN interrupt line for AM335x EVM-SK

 arch/arm/boot/dts/am335x-boneblack.dts | 4 
 arch/arm/boot/dts/am335x-evmsk.dts | 2 +-
 arch/arm/boot/dts/omap3-devkit8000.dts | 2 ++
 3 files changed, 3 insertions(+), 5 deletions(-)
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[PATCH 0/2] omap gpmc changes for parsing devices and working debug

2015-05-20 Thread Tony Lindgren
Hi all,

Here are few fixes that allow to hook any devices to GPMC
instead of artificially limiting them by name. There are at
least FPGAs and USB controllers that I'm aware of.

Then we need disable hwmod reset for GPMC debug, otherwise
debug only shows the default memory timings.. Let's do this
with a Kconfig option.

Regards,

Tony


Tony Lindgren (2):
  memory: omap-gpmc: Fix parsing of devices
  memory: omap-gpmc: Add Kconfig option for debug

 arch/arm/mach-omap2/omap_hwmod.h|  6 ++
 arch/arm/mach-omap2/omap_hwmod_2xxx_ipblock_data.c  | 12 ++--
 arch/arm/mach-omap2/omap_hwmod_33xx_43xx_ipblock_data.c |  3 ++-
 arch/arm/mach-omap2/omap_hwmod_3xxx_data.c  | 12 ++--
 arch/arm/mach-omap2/omap_hwmod_44xx_data.c  | 11 ++-
 arch/arm/mach-omap2/omap_hwmod_7xx_data.c   |  4 ++--
 arch/arm/mach-omap2/omap_hwmod_81xx_data.c  |  2 ++
 drivers/memory/Kconfig  |  8 
 drivers/memory/omap-gpmc.c  | 14 --
 9 files changed, 30 insertions(+), 42 deletions(-)

-- 
2.1.4

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[PATCH 2/2] memory: omap-gpmc: Add Kconfig option for debug

2015-05-20 Thread Tony Lindgren
We support decoding the bootloader values if DEBUG is defined.
But we also need to change the struct omap_hwmod flags to have
HWMOD_INIT_NO_RESET to avoid the GPMC being reset during the
boot. Otherwise just the default timings will be displayed
instead of the bootloader configured timings.

This also allows us to clean up the various GPMC related
hwmod flags. For debugging, we only need HWMOD_INIT_NO_RESET,
and HWMOD_INIT_NO_IDLE is not needed.

Cc: Brian Hutchinson b.hutch...@gmail.com
Cc: Paul Walmsley p...@pwsan.com
Cc: Roger Quadros rog...@ti.com
Signed-off-by: Tony Lindgren t...@atomide.com
---
 arch/arm/mach-omap2/omap_hwmod.h|  6 ++
 arch/arm/mach-omap2/omap_hwmod_2xxx_ipblock_data.c  | 12 ++--
 arch/arm/mach-omap2/omap_hwmod_33xx_43xx_ipblock_data.c |  3 ++-
 arch/arm/mach-omap2/omap_hwmod_3xxx_data.c  | 12 ++--
 arch/arm/mach-omap2/omap_hwmod_44xx_data.c  | 11 ++-
 arch/arm/mach-omap2/omap_hwmod_7xx_data.c   |  4 ++--
 arch/arm/mach-omap2/omap_hwmod_81xx_data.c  |  2 ++
 drivers/memory/Kconfig  |  8 
 drivers/memory/omap-gpmc.c  |  6 +++---
 9 files changed, 29 insertions(+), 35 deletions(-)

diff --git a/arch/arm/mach-omap2/omap_hwmod.h b/arch/arm/mach-omap2/omap_hwmod.h
index 9611c91..b5d27ec 100644
--- a/arch/arm/mach-omap2/omap_hwmod.h
+++ b/arch/arm/mach-omap2/omap_hwmod.h
@@ -109,6 +109,12 @@ extern struct omap_hwmod_sysc_fields omap_hwmod_sysc_type3;
 
 #define DEBUG_OMAPUART_FLAGS   (HWMOD_INIT_NO_IDLE | HWMOD_INIT_NO_RESET)
 
+#ifdef CONFIG_OMAP_GPMC_DEBUG
+#define DEBUG_OMAP_GPMC_HWMOD_FLAGSHWMOD_INIT_NO_RESET
+#else
+#define DEBUG_OMAP_GPMC_HWMOD_FLAGS0
+#endif
+
 #if defined(CONFIG_DEBUG_OMAP2UART1)
 #undef DEBUG_OMAP2UART1_FLAGS
 #define DEBUG_OMAP2UART1_FLAGS DEBUG_OMAPUART_FLAGS
diff --git a/arch/arm/mach-omap2/omap_hwmod_2xxx_ipblock_data.c 
b/arch/arm/mach-omap2/omap_hwmod_2xxx_ipblock_data.c
index 8821b9d..6dcfd03 100644
--- a/arch/arm/mach-omap2/omap_hwmod_2xxx_ipblock_data.c
+++ b/arch/arm/mach-omap2/omap_hwmod_2xxx_ipblock_data.c
@@ -762,16 +762,8 @@ struct omap_hwmod omap2xxx_gpmc_hwmod = {
.name   = gpmc,
.class  = omap2xxx_gpmc_hwmod_class,
.main_clk   = gpmc_fck,
-   /*
-* XXX HWMOD_INIT_NO_RESET should not be needed for this IP
-* block.  It is not being added due to any known bugs with
-* resetting the GPMC IP block, but rather because any timings
-* set by the bootloader are not being correctly programmed by
-* the kernel from the board file or DT data.
-* HWMOD_INIT_NO_RESET should be removed ASAP.
-*/
-   .flags  = (HWMOD_INIT_NO_IDLE | HWMOD_INIT_NO_RESET |
-  HWMOD_NO_IDLEST),
+   /* Skip reset for CONFIG_OMAP_GPMC_DEBUG for bootloader timings */
+   .flags  = HWMOD_NO_IDLEST | DEBUG_OMAP_GPMC_HWMOD_FLAGS,
.prcm   = {
.omap2  = {
.prcm_reg_id = 3,
diff --git a/arch/arm/mach-omap2/omap_hwmod_33xx_43xx_ipblock_data.c 
b/arch/arm/mach-omap2/omap_hwmod_33xx_43xx_ipblock_data.c
index cabc569..ae0cb67 100644
--- a/arch/arm/mach-omap2/omap_hwmod_33xx_43xx_ipblock_data.c
+++ b/arch/arm/mach-omap2/omap_hwmod_33xx_43xx_ipblock_data.c
@@ -668,7 +668,8 @@ struct omap_hwmod am33xx_gpmc_hwmod = {
.name   = gpmc,
.class  = am33xx_gpmc_hwmod_class,
.clkdm_name = l3s_clkdm,
-   .flags  = (HWMOD_INIT_NO_IDLE | HWMOD_INIT_NO_RESET),
+   /* Skip reset for CONFIG_OMAP_GPMC_DEBUG for bootloader timings */
+   .flags  = DEBUG_OMAP_GPMC_HWMOD_FLAGS,
.main_clk   = l3s_gclk,
.prcm   = {
.omap4  = {
diff --git a/arch/arm/mach-omap2/omap_hwmod_3xxx_data.c 
b/arch/arm/mach-omap2/omap_hwmod_3xxx_data.c
index 4e8e93c..0ca4d3f 100644
--- a/arch/arm/mach-omap2/omap_hwmod_3xxx_data.c
+++ b/arch/arm/mach-omap2/omap_hwmod_3xxx_data.c
@@ -2169,16 +2169,8 @@ static struct omap_hwmod omap3xxx_gpmc_hwmod = {
.clkdm_name = core_l3_clkdm,
.mpu_irqs   = omap3xxx_gpmc_irqs,
.main_clk   = gpmc_fck,
-   /*
-* XXX HWMOD_INIT_NO_RESET should not be needed for this IP
-* block.  It is not being added due to any known bugs with
-* resetting the GPMC IP block, but rather because any timings
-* set by the bootloader are not being correctly programmed by
-* the kernel from the board file or DT data.
-* HWMOD_INIT_NO_RESET should be removed ASAP.
-*/
-   .flags  = (HWMOD_INIT_NO_IDLE | HWMOD_INIT_NO_RESET |
-  HWMOD_NO_IDLEST),
+   /* Skip reset for CONFIG_OMAP_GPMC_DEBUG for bootloader timings */
+   .flags  = HWMOD_NO_IDLEST | DEBUG_OMAP_GPMC_HWMOD_FLAGS,
 };
 
 /*
diff 

[PATCH 1/2] memory: omap-gpmc: Fix parsing of devices

2015-05-20 Thread Tony Lindgren
We currently artificially limit the parsing of GPMC connected
devices based on the device name. Let's stop doing that, it's
confusing as adding devices to .dts files with using normal
names like fpga and usb will currently cause them to not probe.

Cc: Roger Quadros rog...@ti.com
Reported-by: Brian Hutchinson b.hutch...@gmail.com
Signed-off-by: Tony Lindgren t...@atomide.com
---
 drivers/memory/omap-gpmc.c | 8 +---
 1 file changed, 1 insertion(+), 7 deletions(-)

diff --git a/drivers/memory/omap-gpmc.c b/drivers/memory/omap-gpmc.c
index c94ea0d..0e524a1 100644
--- a/drivers/memory/omap-gpmc.c
+++ b/drivers/memory/omap-gpmc.c
@@ -2074,14 +2074,8 @@ static int gpmc_probe_dt(struct platform_device *pdev)
ret = gpmc_probe_nand_child(pdev, child);
else if (of_node_cmp(child-name, onenand) == 0)
ret = gpmc_probe_onenand_child(pdev, child);
-   else if (of_node_cmp(child-name, ethernet) == 0 ||
-of_node_cmp(child-name, nor) == 0 ||
-of_node_cmp(child-name, uart) == 0)
+   else
ret = gpmc_probe_generic_child(pdev, child);
-
-   if (WARN(ret  0, %s: probing gpmc child %s failed\n,
-__func__, child-full_name))
-   of_node_put(child);
}
 
return 0;
-- 
2.1.4

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Re: [PATCH] mach-omap2: Remove use of deprecated marco, PTR_RET in devices.c

2015-05-20 Thread Tony Lindgren
* Nicholas Krause xerofo...@gmail.com [150520 12:33]:
 This removes the deprecacted marco, PTR_RET and changes the
 functions that use this marco in their return statement to
 instead use the non deprecacted function, PTR_ERR_OR_ZERO
 for the file devices.c.
 
 Signed-off-by: Nicholas Krause xerofo...@gmail.com

Applying into omap-for-v4.2/cleanup thanks.

Tony

 ---
  arch/arm/mach-omap2/devices.c | 4 ++--
  1 file changed, 2 insertions(+), 2 deletions(-)
 
 diff --git a/arch/arm/mach-omap2/devices.c b/arch/arm/mach-omap2/devices.c
 index 990338f..a69bd67 100644
 --- a/arch/arm/mach-omap2/devices.c
 +++ b/arch/arm/mach-omap2/devices.c
 @@ -63,7 +63,7 @@ static int __init omap3_l3_init(void)
  
   WARN(IS_ERR(pdev), could not build omap_device for %s\n, oh_name);
  
 - return PTR_RET(pdev);
 + return PTR_ERR_OR_ZERO(pdev);
  }
  omap_postcore_initcall(omap3_l3_init);
  
 @@ -333,6 +333,6 @@ static int __init omap_gpmc_init(void)
   pdev = omap_device_build(omap-gpmc, -1, oh, NULL, 0);
   WARN(IS_ERR(pdev), could not build omap_device for %s\n, oh_name);
  
 - return PTR_RET(pdev);
 + return PTR_ERR_OR_ZERO(pdev);
  }
  omap_postcore_initcall(omap_gpmc_init);
 -- 
 2.1.4
 
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[PATCH] serial: 8250_omap: provide complete custom startup shutdown callbacks

2015-05-20 Thread Sebastian Andrzej Siewior
The currently in-use port-startup and port-shutdown are okay. The
startup part for instance does the tiny omap extra part and invokes
serial8250_do_startup() for the remaining pieces. The workflow in
serial8250_do_startup() is okay except for the part where UART_RX is
read without a check if there is something to read. I tried to
workaround it in commit 0aa525d11859 (tty: serial: 8250_core: read only
RX if there is something in the FIFO) but then reverted it later in
commit ca8bb4aefb9 (serial: 8250: Revert tty: serial: 8250_core: read
only RX if there is something in the FIFO).

This is the second attempt to get it to work on older OMAPs without
breaking other chips this time
Peter Hurley suggested to pull in the few needed lines from
serial8250_do_startup() and drop everything else that is not required
including making it simpler like using just request_irq() instead the
chain handler like it is doing now.
So lets try that.

Fixes: ca8bb4aefb93 (serial: 8250: Revert tty: serial: 8250_core:
   read only RX if there is something in the FIFO)
Tested-by: Tony Lindgren t...@atomide.com
Signed-off-by: Sebastian Andrzej Siewior bige...@linutronix.de
---
 drivers/tty/serial/8250/8250_omap.c | 82 +
 1 file changed, 73 insertions(+), 9 deletions(-)

diff --git a/drivers/tty/serial/8250/8250_omap.c 
b/drivers/tty/serial/8250/8250_omap.c
index 928cb7c6..dce1a23706e8 100644
--- a/drivers/tty/serial/8250/8250_omap.c
+++ b/drivers/tty/serial/8250/8250_omap.c
@@ -562,12 +562,36 @@ static irqreturn_t omap_wake_irq(int irq, void *dev_id)
return IRQ_NONE;
 }
 
+#ifdef CONFIG_SERIAL_8250_DMA
+static int omap_8250_dma_handle_irq(struct uart_port *port);
+#endif
+
+static irqreturn_t omap8250_irq(int irq, void *dev_id)
+{
+   struct uart_port *port = dev_id;
+   struct uart_8250_port *up = up_to_u8250p(port);
+   unsigned int iir;
+   int ret;
+
+#ifdef CONFIG_SERIAL_8250_DMA
+   if (up-dma) {
+   ret = omap_8250_dma_handle_irq(port);
+   return IRQ_RETVAL(ret);
+   }
+#endif
+
+   serial8250_rpm_get(up);
+   iir = serial_port_in(port, UART_IIR);
+   ret = serial8250_handle_irq(port, iir);
+   serial8250_rpm_put(up);
+
+   return IRQ_RETVAL(ret);
+}
+
 static int omap_8250_startup(struct uart_port *port)
 {
-   struct uart_8250_port *up =
-   container_of(port, struct uart_8250_port, port);
+   struct uart_8250_port *up = up_to_u8250p(port);
struct omap8250_priv *priv = port-private_data;
-
int ret;
 
if (priv-wakeirq) {
@@ -580,10 +604,31 @@ static int omap_8250_startup(struct uart_port *port)
 
pm_runtime_get_sync(port-dev);
 
-   ret = serial8250_do_startup(port);
-   if (ret)
+   up-mcr = 0;
+   serial_out(up, UART_FCR, UART_FCR_CLEAR_RCVR | UART_FCR_CLEAR_XMIT);
+
+   serial_out(up, UART_LCR, UART_LCR_WLEN8);
+
+   up-lsr_saved_flags = 0;
+   up-msr_saved_flags = 0;
+
+   if (up-dma) {
+   ret = serial8250_request_dma(up);
+   if (ret) {
+   dev_warn_ratelimited(port-dev,
+failed to request DMA\n);
+   up-dma = NULL;
+   }
+   }
+
+   ret = request_irq(port-irq, omap8250_irq, IRQF_SHARED,
+ dev_name(port-dev), port);
+   if (ret  0)
goto err;
 
+   up-ier = UART_IER_RLSI | UART_IER_RDI;
+   serial_out(up, UART_IER, up-ier);
+
 #ifdef CONFIG_PM
up-capabilities |= UART_CAP_RPM;
 #endif
@@ -610,8 +655,7 @@ static int omap_8250_startup(struct uart_port *port)
 
 static void omap_8250_shutdown(struct uart_port *port)
 {
-   struct uart_8250_port *up =
-   container_of(port, struct uart_8250_port, port);
+   struct uart_8250_port *up = up_to_u8250p(port);
struct omap8250_priv *priv = port-private_data;
 
flush_work(priv-qos_work);
@@ -621,11 +665,24 @@ static void omap_8250_shutdown(struct uart_port *port)
pm_runtime_get_sync(port-dev);
 
serial_out(up, UART_OMAP_WER, 0);
-   serial8250_do_shutdown(port);
+
+   up-ier = 0;
+   serial_out(up, UART_IER, 0);
+
+   if (up-dma)
+   serial8250_release_dma(up);
+
+   /*
+* Disable break condition and FIFOs
+*/
+   if (up-lcr  UART_LCR_SBC)
+   serial_out(up, UART_LCR, up-lcr  ~UART_LCR_SBC);
+   serial_out(up, UART_FCR, UART_FCR_CLEAR_RCVR | UART_FCR_CLEAR_XMIT);
 
pm_runtime_mark_last_busy(port-dev);
pm_runtime_put_autosuspend(port-dev);
 
+   free_irq(port-irq, port);
if (priv-wakeirq)
free_irq(priv-wakeirq, port);
 }
@@ -974,6 +1031,13 @@ static inline int omap_8250_rx_dma(struct uart_8250_port 
*p, unsigned int iir)
 }
 #endif
 
+static int omap8250_no_handle_irq(struct uart_port *port)
+{
+   /* IRQ has not been requested but 

[PATCH] ARM: dts: Enable SDIO card interrupt for 37xx-evm

2015-05-20 Thread Tony Lindgren
This allows to use the MMC1 slot with SDIO cards.

Signed-off-by: Tony Lindgren t...@atomide.com
---
 arch/arm/boot/dts/omap3-evm-common.dtsi | 1 +
 1 file changed, 1 insertion(+)

diff --git a/arch/arm/boot/dts/omap3-evm-common.dtsi 
b/arch/arm/boot/dts/omap3-evm-common.dtsi
index 346552b..b2589f9 100644
--- a/arch/arm/boot/dts/omap3-evm-common.dtsi
+++ b/arch/arm/boot/dts/omap3-evm-common.dtsi
@@ -96,6 +96,7 @@
 };
 
 mmc1 {
+   interrupts-extended = intc 83 omap3_pmx_core 0x11a;
vmmc-supply = vmmc1;
vmmc_aux-supply = vsim;
bus-width = 8;
-- 
2.1.4

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[PATCH] ARM: dts: Fix ldp gpio keys to use defines

2015-05-20 Thread Tony Lindgren
Fix ldp gpio keys to use defines.

Signed-off-by: Tony Lindgren t...@atomide.com
---
 arch/arm/boot/dts/omap3-ldp.dts | 18 +-
 1 file changed, 9 insertions(+), 9 deletions(-)

diff --git a/arch/arm/boot/dts/omap3-ldp.dts b/arch/arm/boot/dts/omap3-ldp.dts
index b699bc4..bd6e676 100644
--- a/arch/arm/boot/dts/omap3-ldp.dts
+++ b/arch/arm/boot/dts/omap3-ldp.dts
@@ -34,63 +34,63 @@
key_enter {
label = enter;
gpios = gpio4 5 GPIO_ACTIVE_LOW; /* gpio101 */
-   linux,code = 0x0107001c; /* KEY_ENTER */
+   linux,code = KEY_ENTER;
gpio-key,wakeup;
};
 
key_f1 {
label = f1;
gpios = gpio4 6 GPIO_ACTIVE_LOW; /* gpio102 */
-   linux,code = 0x0303003b; /* KEY_F1 */
+   linux,code = KEY_F1;
gpio-key,wakeup;
};
 
key_f2 {
label = f2;
gpios = gpio4 7 GPIO_ACTIVE_LOW; /* gpio103 */
-   linux,code = 0x0403003c; /* KEY_F2 */
+   linux,code = KEY_F2;
gpio-key,wakeup;
};
 
key_f3 {
label = f3;
gpios = gpio4 8 GPIO_ACTIVE_LOW; /* gpio104 */
-   linux,code = 0x0503003d; /* KEY_F3 */
+   linux,code = KEY_F3;
gpio-key,wakeup;
};
 
key_f4 {
label = f4;
gpios = gpio4 9 GPIO_ACTIVE_LOW; /* gpio105 */
-   linux,code = 0x0704003e; /* KEY_F4 */
+   linux,code = KEY_F4;
gpio-key,wakeup;
};
 
key_left {
label = left;
gpios = gpio4 10 GPIO_ACTIVE_LOW; /* gpio106 */
-   linux,code = 0x04070069; /* KEY_LEFT */
+   linux,code = KEY_LEFT;
gpio-key,wakeup;
};
 
key_right {
label = right;
gpios = gpio4 11 GPIO_ACTIVE_LOW; /* gpio107 */
-   linux,code = 0x0507006a; /* KEY_RIGHT */
+   linux,code = KEY_RIGHT;
gpio-key,wakeup;
};
 
key_up {
label = up;
gpios = gpio4 12 GPIO_ACTIVE_LOW; /* gpio108 */
-   linux,code = 0x06070067; /* KEY_UP */
+   linux,code = KEY_UP;
gpio-key,wakeup;
};
 
key_down {
label = down;
gpios = gpio4 13 GPIO_ACTIVE_LOW; /* gpio109 */
-   linux,code = 0x0707006c; /* KEY_DOWN */
+   linux,code = KEY_DOWN;
gpio-key,wakeup;
};
};
-- 
2.1.4

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Re: [PATCH] ARM: dts: am437x-gp-evm: add DT nodes for ov2659 sensor

2015-05-20 Thread Tony Lindgren
* Tony Lindgren t...@atomide.com [150316 15:22]:
 * Lad Prabhakar prabhakar.cse...@gmail.com [150312 16:38]:
  From: Lad, Prabhakar prabhakar.cse...@gmail.com
  
  this patch does the following:
  1: adds DT node for fixed oscillator.
  2: adds DT node entries for ov2659 sensor
  3: adds remote-endpoint entry for VPFE.
  
  Signed-off-by: Lad, Prabhakar prabhakar.cse...@gmail.com
 
 Applying into omap-for-v4.1/dt thanks.

Hmm looks like I somehow dropped this one, sorry. Applying into
omap-for-v4.2/dt now thanks.

Regards,

Tony
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Re: [PATCH] mach-omap2:Remove calls to deprecacted marco,PTR_RET in the files,fb.c and pmu.c

2015-05-20 Thread Tony Lindgren
* Nicholas Krause xerofo...@gmail.com [150509 21:58]:
 This removes two calls to the deprecated marco,PTR_RET in
 the files,fb.c and pmu.c for the functions,omap_init_vrfb
 and omap_init_pmu respectfully. Furthermore these are now
 replaced by calling the correctly non deprecacted function,
 PTR_ERR_OR_ZERO in both functions.
 
 Signed-off-by: Nicholas Krause xerofo...@gmail.com

Applying into omap-for-v4.2/cleanup thanks.

Tony

 ---
  arch/arm/mach-omap2/fb.c  | 2 +-
  arch/arm/mach-omap2/pmu.c | 2 +-
  2 files changed, 2 insertions(+), 2 deletions(-)
 
 diff --git a/arch/arm/mach-omap2/fb.c b/arch/arm/mach-omap2/fb.c
 index 26e28e9..1f1ecf8 100644
 --- a/arch/arm/mach-omap2/fb.c
 +++ b/arch/arm/mach-omap2/fb.c
 @@ -84,7 +84,7 @@ int __init omap_init_vrfb(void)
   pdev = platform_device_register_resndata(NULL, omapvrfb, -1,
   res, num_res, NULL, 0);
  
 - return PTR_RET(pdev);
 + return PTR_ERR_OR_ZERO(pdev);
  }
  #else
  int __init omap_init_vrfb(void) { return 0; }
 diff --git a/arch/arm/mach-omap2/pmu.c b/arch/arm/mach-omap2/pmu.c
 index a69e9a3..d2adfeb 100644
 --- a/arch/arm/mach-omap2/pmu.c
 +++ b/arch/arm/mach-omap2/pmu.c
 @@ -55,7 +55,7 @@ static int __init omap2_init_pmu(unsigned oh_num, char 
 *oh_names[])
   WARN(IS_ERR(omap_pmu_dev), Can't build omap_device for %s.\n,
dev_name);
  
 - return PTR_RET(omap_pmu_dev);
 + return PTR_ERR_OR_ZERO(omap_pmu_dev);
  }
  
  static int __init omap_init_pmu(void)
 -- 
 2.1.4
 
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Re: [PATCH V2] ARM: dts: omap5-uevm: Add Uart wakeup interrupt

2015-05-20 Thread Tony Lindgren
* Nishanth Menon n...@ti.com [150515 15:18]:
 UART3 wakeup takes place with iodaisy chain. enable the wakeup pin.
 
 Reported-by: Suman Anna s-a...@ti.com
 Signed-off-by: Nishanth Menon n...@ti.com

Applying into omap-for-v4.2/dt thanks.

Tony

 ---
 
 Test on linus master (f0897f4cc0fc) with 8250  driver: 
 http://pastebin.ubuntu.com/11154663/
 Applies on next-20150515 and linus master (f0897f4cc0fc)
 
 Changes in V2:
   - switched over to wakeupgen instead of GIC.
   - retested.
 V1: https://patchwork.kernel.org/patch/6416981/
 
  arch/arm/boot/dts/omap5-uevm.dts |2 ++
  1 file changed, 2 insertions(+)
 
 diff --git a/arch/arm/boot/dts/omap5-uevm.dts 
 b/arch/arm/boot/dts/omap5-uevm.dts
 index 74777a6e200a..c4dc487832ea 100644
 --- a/arch/arm/boot/dts/omap5-uevm.dts
 +++ b/arch/arm/boot/dts/omap5-uevm.dts
 @@ -604,6 +604,8 @@
  uart3 {
  pinctrl-names = default;
  pinctrl-0 = uart3_pins;
 + interrupts-extended = wakeupgen GIC_SPI 74 IRQ_TYPE_LEVEL_HIGH,
 +   omap5_pmx_core 0x19c;
  };
  
  uart5 {
 -- 
 1.7.9.5
 
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Re: [PATCHv2 02/27] clk: ti: move generic OMAP DPLL implementation under drivers/clk

2015-05-20 Thread Stephen Boyd
On 05/20, Tero Kristo wrote:
 On 05/20/2015 04:20 AM, Stephen Boyd wrote:
 On 05/11, Tero Kristo wrote:
 With the legacy clock data now gone, we can start moving OMAP clock
 type implementations under clock driver. Start this with moving the
 generic OMAP DPLL clock type under TI clock driver.
 
 Signed-off-by: Tero Kristo t-kri...@ti.com
 ---
 
 How much of the code is the same from the original copy? Can you
 generate these patches with -M -C so that we can see?
 
 Looks like for the move patches the range is from 85%...95% exact
 copy. Shall I repost the patches in this format?

Sure, a resend would be nice to actually see what changed. If
that's too much mail, maybe you can share the diffstat for the
whole series with -M -C so we can see what's moved instead.

 Good hint for the
 -M -C btw, I wonder why those are not default options for
 git-format-patch.
 

I think it isn't the default because 'patch' the program didn't
always support the diff format that git generates with the -M and
-C options. FWIW, I have

[diff] 
renames = copy

in my .gitconfig for this purpose.

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Re: [PATCH] ARM: dts: omap3-gta04: Add GSM audio support

2015-05-20 Thread Tony Lindgren
* Marek Belisko ma...@goldelico.com [150507 12:36]:
 Add voice audio card which is used for telephony on gta04 board.
 gtm601 codec is UMTS modem with pcm interface which get samples from
 microphone and provide data from other party side. Use simple audio card
 to describe audio card.
 
 Signed-off-by: Marek Belisko ma...@goldelico.com

Applying into omap-for-v4.2/dt thanks.

Tony

 ---
  arch/arm/boot/dts/omap3-gta04.dtsi | 26 ++
  1 file changed, 26 insertions(+)
 
 diff --git a/arch/arm/boot/dts/omap3-gta04.dtsi 
 b/arch/arm/boot/dts/omap3-gta04.dtsi
 index b9f6881..a3a4156 100644
 --- a/arch/arm/boot/dts/omap3-gta04.dtsi
 +++ b/arch/arm/boot/dts/omap3-gta04.dtsi
 @@ -48,6 +48,28 @@
   ti,mcbsp = mcbsp2;
   };
  
 +  /* GSM audio */
 + sound_telephony {
 + compatible = simple-audio-card;
 + simple-audio-card,name = GTA04 voice;
 + simple-audio-card,bitclock-master = telephony_link_master;
 + simple-audio-card,frame-master = telephony_link_master;
 + simple-audio-card,format = i2s;
 +
 + simple-audio-card,cpu {
 + sound-dai = mcbsp4;
 + };
 +
 + telephony_link_master: simple-audio-card,codec {
 + sound-dai = gtm601_codec;
 + };
 + };
 +
 + gtm601_codec: gsm_codec {
 + compatible = option,gtm601;
 + #sound-dai-cells = 0;
 + };
 +
   spi_lcd {
   compatible = spi-gpio;
   #address-cells = 0x1;
 @@ -517,3 +539,7 @@
  mcbsp2 {
   status = okay;
  };
 +
 +mcbsp4 {
 + status = okay;
 +};
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Re: [PATCHv2 02/27] clk: ti: move generic OMAP DPLL implementation under drivers/clk

2015-05-20 Thread Tero Kristo

On 05/20/2015 04:20 AM, Stephen Boyd wrote:

On 05/11, Tero Kristo wrote:

With the legacy clock data now gone, we can start moving OMAP clock
type implementations under clock driver. Start this with moving the
generic OMAP DPLL clock type under TI clock driver.

Signed-off-by: Tero Kristo t-kri...@ti.com
---


How much of the code is the same from the original copy? Can you
generate these patches with -M -C so that we can see?


Looks like for the move patches the range is from 85%...95% exact copy. 
Shall I repost the patches in this format? Good hint for the -M -C btw, 
I wonder why those are not default options for git-format-patch.


-Tero




  arch/arm/mach-omap2/Makefile|2 +-
  arch/arm/mach-omap2/clkt_dpll.c |  370 ---
  drivers/clk/ti/Makefile |3 +-
  drivers/clk/ti/clkt_dpll.c  |  369 ++
  drivers/clk/ti/clock.h  |2 +
  include/linux/clk/ti.h  |1 -
  6 files changed, 374 insertions(+), 373 deletions(-)
  delete mode 100644 arch/arm/mach-omap2/clkt_dpll.c
  create mode 100644 drivers/clk/ti/clkt_dpll.c




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Re: [PATCH] ASoC: rx51: use flags argument of devm_gpiod_get to set direction

2015-05-20 Thread Mark Brown
On Tue, May 19, 2015 at 09:48:08AM +0200, Uwe Kleine-König wrote:
 Since 39b2bbe3d715 (gpio: add flags argument to gpiod_get*() functions)
 which appeared in v3.17-rc1, the gpiod_get* functions take an additional
 parameter that allows to specify direction and initial value for output.

Applied, thanks.


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Description: Digital signature


Re: [RFC v1 15/25] genirq: Kill the first parameter 'irq' of irq_flow_handler_t

2015-05-20 Thread Robert Jarzmik
Jiang Liu jiang@linux.intel.com writes:

 diff --git a/arch/arm/mach-pxa/pcm990-baseboard.c 
 b/arch/arm/mach-pxa/pcm990-baseboard.c
 index 2897da2a5df6..0d8331f8536e 100644
 --- a/arch/arm/mach-pxa/pcm990-baseboard.c
 +++ b/arch/arm/mach-pxa/pcm990-baseboard.c
 @@ -287,6 +287,7 @@ static struct irq_chip pcm990_irq_chip = {
  static void pcm990_irq_handler(unsigned int irq, struct irq_desc *desc)
  {
   unsigned long pending;
 + unsigned int irq;
That doesn't look good, double irq definition.

Cheers.

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Re: [PATCHv2] am437x-gp-evm: add wilink8 support

2015-05-20 Thread Tony Lindgren
* Reizer, Eyal ey...@ti.com [150514 05:45]:
 Ping on this patch
 
  -Original Message-
  From: Eyal Reizer [mailto:eyalrei...@gmail.com]
  Sent: Monday, May 04, 2015 3:24 PM
  To: bcous...@baylibre.com; t...@atomide.com; robh...@kernel.org;
  pawel.m...@arm.com; mark.rutl...@arm.com;
  ijc+devicet...@hellion.org.uk; ga...@codeaurora.org;
  li...@arm.linux.org.uk; linux-omap@vger.kernel.org
  Cc: Reizer, Eyal
  Subject: [PATCHv2] am437x-gp-evm: add wilink8 support
  
  enable mmc3 used for wlan and uart3 used for bluetooth
  
  configure the gpios used for wlan and bluetooth controls
  
  add fixed voltage regulator used for wlan power control
  
  Signed-off-by: Eyal Reizer ey...@ti.com

Applying into omap-for-v4.2/dt thanks.

Tony
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Re: [PATCH] arm: dts: Beaglebone i2c definitions

2015-05-20 Thread Tony Lindgren
* Tony Lindgren t...@atomide.com [150514 08:40]:
 * Pantelis Antoniou pantelis.anton...@konsulko.com [150513 01:05]:
  The beaglebone family of boards contain two I2C busses enabled.
  The first one with a baseboard identification EEPROM and a
  cape I2C bus.
 
 This seems safe to apply as the i2c2 pins are listed in the cape
 specification.
 
 These pins could be used for other devices too.. But in that case
 the cape would not follow the cape standard.

So applying this one into omap-for-v4.2/dt thanks.

Tony
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Re: [PATCH v2] arm: boot: dts: add DTS for Baltos IR5221

2015-05-20 Thread Tony Lindgren
* yegorsli...@googlemail.com yegorsli...@googlemail.com [150519 01:31]:
 From: Yegor Yefremov yegorsli...@googlemail.com
 
 This device is an industrial PC based on
 AM335x SoC.
 
 [ ba...@ti.com : updated to fit current mainline ]
 
 Signed-off-by: Yegor Yefremov yegorsli...@googlemail.com
 Signed-off-by: Felipe Balbi ba...@ti.com

Applying into omap-for-v4.2/dt thanks.

Tony
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Re: [PATCHv3 10/10] CLK: TI: always enable DESHDCP clock

2015-05-20 Thread Stephen Boyd
On 05/20/15 04:50, Tero Kristo wrote:


 @@ -348,5 +348,10 @@ int __init dra7xx_dt_clk_init(void)
   if (rc)
   pr_err(%s: failed to set USB_DPLL M2 OUT\n, __func__);

 +hdcp_ck = clk_get_sys(NULL, dss_deshdcp_clk);
 +rc = clk_prepare_enable(hdcp_ck);
 +if (rc)
 +pr_err(%s: failed to set dss_deshdcp_clk\n, __func__);
 +
   return rc;
   }


 You should rather use the assigned-clock properties in DT to accomplish
 this, the manual clock tweaks under the drivers/clk/ti/clk-* files
 should be converted to DT setup also.

 Now that I sent this, I realize we only have support to set_parent /
 set_rate through the assigned-clock props, no enable. Any plans to
 extend this support Mike/Stephen?



Enable falls under the critical clocks discussion that is ongoing. I
assume that this is some sort of critical clock that can't be turned off?

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Re: [PATCHv2 02/27] clk: ti: move generic OMAP DPLL implementation under drivers/clk

2015-05-20 Thread Tony Lindgren
* Tero Kristo t-kri...@ti.com [150520 10:45]:
 On 05/20/2015 04:20 AM, Stephen Boyd wrote:
 On 05/11, Tero Kristo wrote:
 With the legacy clock data now gone, we can start moving OMAP clock
 type implementations under clock driver. Start this with moving the
 generic OMAP DPLL clock type under TI clock driver.
 
 Signed-off-by: Tero Kristo t-kri...@ti.com
 ---
 
 How much of the code is the same from the original copy? Can you
 generate these patches with -M -C so that we can see?
 
 Looks like for the move patches the range is from 85%...95% exact copy.
 Shall I repost the patches in this format? Good hint for the -M -C btw, I
 wonder why those are not default options for git-format-patch.

While tweaking your scripts.. Can you also check why the cover
letter for your patches is missing the whole series diffstat?

The diffstat is automatically created with:

$ git format-patch --cover-letter -o /tmp/outgoing v4.1-rc1..

Regards,

Tony
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Re: [PATCH] ARM: dts: omap3-gta04: Add hdqw1 support

2015-05-20 Thread Tony Lindgren
* Marek Belisko ma...@goldelico.com [150428 13:55]:
 Enable omap-hdq for battery fuel gauge access.
 
 Signed-off-by: Marek Belisko ma...@goldelico.com
 Signed-off-by: H. Nikolaus Schaller h...@goldelico.com

Applying into omap-for-v4.2/dt thanks.

Tony

 ---
  arch/arm/boot/dts/omap3-gta04.dtsi | 11 +++
  1 file changed, 11 insertions(+)
 
 diff --git a/arch/arm/boot/dts/omap3-gta04.dtsi 
 b/arch/arm/boot/dts/omap3-gta04.dtsi
 index b9f6881..6ea1257 100644
 --- a/arch/arm/boot/dts/omap3-gta04.dtsi
 +++ b/arch/arm/boot/dts/omap3-gta04.dtsi
 @@ -200,6 +200,12 @@
   OMAP3_CORE1_IOPAD(0x210a, PIN_OUTPUT | MUX_MODE0)   /* 
 dss_data23.dss_data23 */
   ;
 };
 +
 + hdq_pins: hdq_pins {
 + pinctrl-single,pins = 
 + OMAP3_CORE1_IOPAD(0x21c6, PIN_INPUT_PULLUP | MUX_MODE0) 
 /* i2c3_sda.hdq */
 + ;
 + };
  };
  
  omap3_pmx_core2 {
 @@ -517,3 +523,8 @@
  mcbsp2 {
   status = okay;
  };
 +
 +hdqw1w {
 +pinctrl-names = default;
 +pinctrl-0 = hdq_pins;
 +};
 -- 
 1.9.1
 
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Re: [PATCHv2] am335x-evm: add bluetooth support

2015-05-20 Thread Tony Lindgren
* Eyal Reizer eyalrei...@gmail.com [150504 05:43]:
 From: Eliad Peller el...@wizery.com
 
 uart1 is used for connecting to wilink8 bluetooth subsystem.
 add the needed muxes and definitions.
 
 Signed-off-by: Eliad Peller el...@wizery.com
 Signed-off-by: Eyal Reizer ey...@ti.com

Applying into omap-for-v4.2/dt thanks.

Tony

 ---
 Changes in v2:
 removed ti shared transport bindings
 
  arch/arm/boot/dts/am335x-evm.dts |   16 
  1 file changed, 16 insertions(+)
 
 diff --git a/arch/arm/boot/dts/am335x-evm.dts 
 b/arch/arm/boot/dts/am335x-evm.dts
 index 0f398fa..765be27 100644
 --- a/arch/arm/boot/dts/am335x-evm.dts
 +++ b/arch/arm/boot/dts/am335x-evm.dts
 @@ -191,6 +191,15 @@
   ;
   };
  
 + uart1_pins: pinmux_uart1_pins {
 + pinctrl-single,pins = 
 + 0x178 (PIN_INPUT | MUX_MODE0)   /* 
 uart1_ctsn.uart1_ctsn */
 + 0x17C (PIN_OUTPUT_PULLDOWN | MUX_MODE0) /* 
 uart1_rtsn.uart1_rtsn */
 + 0x180 (PIN_INPUT_PULLUP | MUX_MODE0)/* 
 uart1_rxd.uart1_rxd */
 + 0x184 (PIN_OUTPUT_PULLDOWN | MUX_MODE0) /* 
 uart1_txd.uart1_txd */
 + ;
 + };
 +
   clkout2_pin: pinmux_clkout2_pin {
   pinctrl-single,pins = 
   0x1b4 (PIN_OUTPUT_PULLDOWN | MUX_MODE3) /* 
 xdma_event_intr1.clkout2 */
 @@ -357,6 +366,13 @@
   status = okay;
  };
  
 +uart1 {
 + pinctrl-names = default;
 + pinctrl-0 = uart1_pins;
 +
 + status = okay;
 +};
 +
  i2c0 {
   pinctrl-names = default;
   pinctrl-0 = i2c0_pins;
 -- 
 1.7.9.5
 
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Re: [PATCHv2 4/4] DTS: ARM: OMAP3-N900: Add lis3lv02d support

2015-05-20 Thread Sebastian Reichel
Hi,

On Wed, May 20, 2015 at 10:21:22AM -0700, Tony Lindgren wrote:
 * Sebastian Reichel s...@kernel.org [150514 15:41]:
  On Fri, Mar 27, 2015 at 03:39:46PM +0100, Sebastian Reichel wrote:
   This adds support for the N900's accelerometer to
   the Nokia N900 DTS file.
   
   Signed-off-by: Sebastian Reichel s...@kernel.org
   Acked-by: Tony Lindgren t...@atomide.com
   ---
   Quote from Tony:
   
   This at least currently does not conflict with anything I have
   queued, so I suggest you try to get Greg to take the whole set:
   
   http://article.gmane.org/gmane.linux.ports.arm.omap/125020
  
  It seems Greg did not see this message (this patch did not make it
  into 4.1-rc and the driver changes did), so could you queue this
  patch for 4.2?
 
 Hmm seems to be there as commit 1ac4e6fee41d6.

uhm right, my mistake. No clue how I missed it (especially since it's
the last change in the n900 dts file).

Sorry for the noise.

-- Sebastian


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[GIT PULL 1/2] omap clean-up for v4.2

2015-05-20 Thread Tony Lindgren
The following changes since commit b787f68c36d49bb1d9236f403813641efa74a031:

  Linux 4.1-rc1 (2015-04-26 17:59:10 -0700)

are available in the git repository at:

  git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap 
tags/omap-for-v4.2/clean

for you to fetch changes up to fd0dbc83c6602ad57f34d1ec0b120fea25fcca56:

  Merge branch 'omap-for-v4.2/legacy' into omap-for-v4.2/cleanup (2015-05-20 
14:51:05 -0700)


Clean-up for omaps for v4.2 merge window:

Drop more omap3 legacy board-*.c files for v4.2. This time we're
dropping the board files for beagle, overo and cm-t35.

The reason for dropping these now rather than later is that now
we can simply revert the patches in case of unexpected issues as
we are not dropping any platform data at this point.

This leaves us with only the following board-*.c files:

BOARD   REASON NEEDED
board-ldp.c Still used in RMKs boot test system
board-omap3logic.c  Getting a .dts file for v4.2
board-omap3pandora.cGot a .dts file for v4.1
board-rx51-*.c  Needs /proc/atags support for user space

I'm hoping we can drop the remaining board-*.c for v4.3 merge
window, then keep the platform data around for one more merge
window in case of reverting needed, then drop the platform data
too for v4.4 if no issues needing reverting are found.

Also, few patches to clean-up the usage of Linux generic
macros:

- Use define for console loglevel

- Use const for struct irq_domain_ops

- Use PTR_ERR_OR_ZERO instead of PTR_RET


Alexander Kuleshov (1):
  ARM: OMAP2+: use symbolic defines for console loglevels instead of numbers

Krzysztof Kozlowski (1):
  ARM: OMAP2+: Constify irq_domain_ops

Nicholas Krause (2):
  ARM: OMAP2+: Remove calls to deprecacted marco,PTR_RET in the files,fb.c 
and pmu.c
  mach-omap2: Remove use of deprecated marco, PTR_RET in devices.c

Tony Lindgren (4):
  ARM: OMAP2+: Remove legacy booting support for cm-t35
  ARM: OMAP2+: Remove legacy booting support for Overo
  ARM: OMAP2+: Remove legacy booting support for Beagleboards
  Merge branch 'omap-for-v4.2/legacy' into omap-for-v4.2/cleanup

 arch/arm/mach-omap2/Kconfig |  22 -
 arch/arm/mach-omap2/Makefile|   3 -
 arch/arm/mach-omap2/board-cm-t35.c  | 769 
 arch/arm/mach-omap2/board-omap3beagle.c | 595 
 arch/arm/mach-omap2/board-overo.c   | 571 
 arch/arm/mach-omap2/devices.c   |   4 +-
 arch/arm/mach-omap2/fb.c|   2 +-
 arch/arm/mach-omap2/omap-wakeupgen.c|   2 +-
 arch/arm/mach-omap2/pmu.c   |   2 +-
 arch/arm/mach-omap2/serial.c|   2 +-
 10 files changed, 6 insertions(+), 1966 deletions(-)
 delete mode 100644 arch/arm/mach-omap2/board-cm-t35.c
 delete mode 100644 arch/arm/mach-omap2/board-omap3beagle.c
 delete mode 100644 arch/arm/mach-omap2/board-overo.c
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[GIT PULL 2/2] omap1 sparse irq support for v4.2

2015-05-20 Thread Tony Lindgren
The following changes since commit 030bbdbf4c833bc69f502eae58498bc5572db736:

  Linux 4.1-rc3 (2015-05-10 15:12:29 -0700)

are available in the git repository at:

  git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap 
tags/omap-for-v4.2/omap1

for you to fetch changes up to 685e2d08c54b1a1bf31bbe6562f06db089d31c7b:

  ARM: OMAP1: Change interrupt numbering for sparse IRQ (2015-05-20 09:01:21 
-0700)


Add support for CONFIG_SPARSE_IRQ for omap1. This takes us a bit closer
to making omap1 support multiarch. After this series we still need to
make omap1 use the common clock framework and fix up the drivers to not
rely on includes from mach and plat directories.

Note that this branch depends on a GPIO driver fix in v4.1-rc3
d2d05c65c40e (gpio: omap: Fix regression for MPUIO interrupts).


Tony Lindgren (4):
  ARM: OMAP1: Move UART defines to prepare for sparse IRQ
  ARM: OMAP1: Switch to use generic irqchip in preparation for sparse IRQ
  ARM: omap1: Switch to use MULTI_IRQ
  ARM: OMAP1: Change interrupt numbering for sparse IRQ

 arch/arm/Kconfig   |   2 +
 arch/arm/mach-omap1/ams-delta-fiq-handler.S|   3 +-
 arch/arm/mach-omap1/board-ams-delta.c  |   1 +
 arch/arm/mach-omap1/board-fsample.c|   1 +
 arch/arm/mach-omap1/board-generic.c|   1 +
 arch/arm/mach-omap1/board-h2.c |   1 +
 arch/arm/mach-omap1/board-h3.c |   1 +
 arch/arm/mach-omap1/board-htcherald.c  |   1 +
 arch/arm/mach-omap1/board-innovator.c  |   1 +
 arch/arm/mach-omap1/board-nokia770.c   |   1 +
 arch/arm/mach-omap1/board-osk.c|   1 +
 arch/arm/mach-omap1/board-palmte.c |   1 +
 arch/arm/mach-omap1/board-palmtt.c |   1 +
 arch/arm/mach-omap1/board-palmz71.c|   1 +
 arch/arm/mach-omap1/board-perseus2.c   |   1 +
 arch/arm/mach-omap1/board-sx1.c|   1 +
 arch/arm/mach-omap1/board-voiceblue.c  |   1 +
 arch/arm/mach-omap1/common.h   |   5 +-
 arch/arm/mach-omap1/dma.c  |   2 +-
 arch/arm/mach-omap1/i2c.c  |   3 +-
 arch/arm/mach-omap1/include/mach/entry-macro.S |  39 --
 arch/arm/mach-omap1/include/mach/irqs.h| 124 ++-
 arch/arm/mach-omap1/include/mach/serial.h  |   5 -
 arch/arm/mach-omap1/include/mach/soc.h |   4 +
 arch/arm/mach-omap1/irq.c  | 157 +++--
 arch/arm/mach-omap1/timer.c|   4 +-
 arch/arm/plat-omap/dma.c   |   4 +
 include/uapi/linux/serial_reg.h|   3 +
 28 files changed, 190 insertions(+), 180 deletions(-)
 delete mode 100644 arch/arm/mach-omap1/include/mach/entry-macro.S
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Re: [PATCH 2/2] memory: omap-gpmc: Add Kconfig option for debug

2015-05-20 Thread Tony Lindgren
* Paul Walmsley p...@pwsan.com [150520 15:52]:
 On Wed, 20 May 2015, Tony Lindgren wrote:
 
  We support decoding the bootloader values if DEBUG is defined.
  But we also need to change the struct omap_hwmod flags to have
  HWMOD_INIT_NO_RESET to avoid the GPMC being reset during the
  boot. Otherwise just the default timings will be displayed
  instead of the bootloader configured timings.
  
  This also allows us to clean up the various GPMC related
  hwmod flags. For debugging, we only need HWMOD_INIT_NO_RESET,
  and HWMOD_INIT_NO_IDLE is not needed.
  
  Cc: Brian Hutchinson b.hutch...@gmail.com
  Cc: Paul Walmsley p...@pwsan.com
  Cc: Roger Quadros rog...@ti.com
  Signed-off-by: Tony Lindgren t...@atomide.com
 
 Looks good to me, want me to queue it or do you want to?

Feel free to take it if it looks OK to you, I'll just queue
the first patch then. Roger may have other GPMC patches
coming up, but this should not conflict with them, there's
more of a hwmod conflict chance.

Regards,

Tony
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Re: [PATCH 2/5] PM / Wakeirq: Add automated device wake IRQ handling

2015-05-20 Thread Rafael J. Wysocki
On Tuesday, May 19, 2015 07:10:57 PM Tony Lindgren wrote:
 * Rafael J. Wysocki r...@rjwysocki.net [150519 17:01]:
  On Tuesday, May 19, 2015 04:27:56 PM Tony Lindgren wrote:
   * Rafael J. Wysocki r...@rjwysocki.net [150519 16:07]:
On Wednesday, May 20, 2015 12:41:06 AM Thomas Gleixner wrote:
 On Wed, 20 May 2015, Rafael J. Wysocki wrote:
  This one looks really good. :-)
  
  If it doesn't depend on anything, I can apply it right away, so 
  please let me
  know.
   
   Sure works for me, it just has a dependency to patch #1 in this
   series ([PATCH 1/5] PM / Runtime: Update last_busy in rpm_resume).
  
  OK, I'll queue them both up for 4.2, then.
  
  Please let me know if you need a special branch with them.
 
 A separate branch would be nice so I can merge that in too.

OK

I added a new pm-wakeirq branch to linux-pm.git with these two patches and
one other commit related to runtime PM (all based on 4.1-rc4).  This branch
will not be rebased going forward.


-- 
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Rafael J. Wysocki, Intel Open Source Technology Center.
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Re: [PATCH 2/2] memory: omap-gpmc: Add Kconfig option for debug

2015-05-20 Thread Paul Walmsley
On Wed, 20 May 2015, Tony Lindgren wrote:

 We support decoding the bootloader values if DEBUG is defined.
 But we also need to change the struct omap_hwmod flags to have
 HWMOD_INIT_NO_RESET to avoid the GPMC being reset during the
 boot. Otherwise just the default timings will be displayed
 instead of the bootloader configured timings.
 
 This also allows us to clean up the various GPMC related
 hwmod flags. For debugging, we only need HWMOD_INIT_NO_RESET,
 and HWMOD_INIT_NO_IDLE is not needed.
 
 Cc: Brian Hutchinson b.hutch...@gmail.com
 Cc: Paul Walmsley p...@pwsan.com
 Cc: Roger Quadros rog...@ti.com
 Signed-off-by: Tony Lindgren t...@atomide.com

Looks good to me, want me to queue it or do you want to?


- Paul
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Re: [PATCH 2/2] memory: omap-gpmc: Add Kconfig option for debug

2015-05-20 Thread Paul Walmsley
On Wed, 20 May 2015, Tony Lindgren wrote:

 * Paul Walmsley p...@pwsan.com [150520 15:52]:
  On Wed, 20 May 2015, Tony Lindgren wrote:
  
   We support decoding the bootloader values if DEBUG is defined.
   But we also need to change the struct omap_hwmod flags to have
   HWMOD_INIT_NO_RESET to avoid the GPMC being reset during the
   boot. Otherwise just the default timings will be displayed
   instead of the bootloader configured timings.
   
   This also allows us to clean up the various GPMC related
   hwmod flags. For debugging, we only need HWMOD_INIT_NO_RESET,
   and HWMOD_INIT_NO_IDLE is not needed.
   
   Cc: Brian Hutchinson b.hutch...@gmail.com
   Cc: Paul Walmsley p...@pwsan.com
   Cc: Roger Quadros rog...@ti.com
   Signed-off-by: Tony Lindgren t...@atomide.com
  
  Looks good to me, want me to queue it or do you want to?
 
 Feel free to take it if it looks OK to you, I'll just queue
 the first patch then. Roger may have other GPMC patches
 coming up, but this should not conflict with them, there's
 more of a hwmod conflict chance.

OK thanks queued for v4.2.

- Paul
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Re: [PATCH 2/5] PM / Wakeirq: Add automated device wake IRQ handling

2015-05-20 Thread Tony Lindgren
* Rafael J. Wysocki r...@rjwysocki.net [150520 17:30]:
 On Tuesday, May 19, 2015 07:10:57 PM Tony Lindgren wrote:
  * Rafael J. Wysocki r...@rjwysocki.net [150519 17:01]:
   On Tuesday, May 19, 2015 04:27:56 PM Tony Lindgren wrote:
* Rafael J. Wysocki r...@rjwysocki.net [150519 16:07]:
 On Wednesday, May 20, 2015 12:41:06 AM Thomas Gleixner wrote:
  On Wed, 20 May 2015, Rafael J. Wysocki wrote:
   This one looks really good. :-)
   
   If it doesn't depend on anything, I can apply it right away, so 
   please let me
   know.

Sure works for me, it just has a dependency to patch #1 in this
series ([PATCH 1/5] PM / Runtime: Update last_busy in rpm_resume).
   
   OK, I'll queue them both up for 4.2, then.
   
   Please let me know if you need a special branch with them.
  
  A separate branch would be nice so I can merge that in too.
 
 OK
 
 I added a new pm-wakeirq branch to linux-pm.git with these two patches and
 one other commit related to runtime PM (all based on 4.1-rc4).  This branch
 will not be rebased going forward.

Great thanks!

Tony
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Re: [PATCHv2 00/27] ARM: OMAP2+: clock code migration to drivers/clk/ti

2015-05-20 Thread Paul Walmsley
On Tue, 19 May 2015, Tero Kristo wrote:

 Any news on this? As noted previously, I am not able to reproduce the issue
 you are seeing currently, can you give DEBUG_LL a shot?

Yeah I just bisected it, it was caused by this:

commit cc4a5fe972ad7834e8662b49b3a5fdb597e9e15e
Author: Felipe Balbi ba...@ti.com
Date:   Fri Jan 30 11:18:56 2015 -0600

arm: config: omap2plus_defconfig: switch over to LZMA compression

LZMA compression makes about 33% smaller zImage
with just a slight extra decompression time.

Before this patch, zImage built with o2+_dc
is 4.5MiB and after it's about 3.3MiB.

Suggested-by: David Cohen david.a.co...@linux.intel.com
Signed-off-by: Felipe Balbi ba...@ti.com
Signed-off-by: Tony Lindgren t...@atomide.com


and the timeouts on the testbed being set to fail if a kernel takes longer 
than five seconds to start.  Seems that the part about a slight extra 
decompression time probably only applies to relatively recent chips.


- Paul
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Re: [PATCH 2/5] PM / Wakeirq: Add automated device wake IRQ handling

2015-05-20 Thread Felipe Balbi
On Thu, May 21, 2015 at 02:54:14AM +0200, Rafael J. Wysocki wrote:
 On Tuesday, May 19, 2015 07:10:57 PM Tony Lindgren wrote:
  * Rafael J. Wysocki r...@rjwysocki.net [150519 17:01]:
   On Tuesday, May 19, 2015 04:27:56 PM Tony Lindgren wrote:
* Rafael J. Wysocki r...@rjwysocki.net [150519 16:07]:
 On Wednesday, May 20, 2015 12:41:06 AM Thomas Gleixner wrote:
  On Wed, 20 May 2015, Rafael J. Wysocki wrote:
   This one looks really good. :-)
   
   If it doesn't depend on anything, I can apply it right away, so 
   please let me
   know.

Sure works for me, it just has a dependency to patch #1 in this
series ([PATCH 1/5] PM / Runtime: Update last_busy in rpm_resume).
   
   OK, I'll queue them both up for 4.2, then.
   
   Please let me know if you need a special branch with them.
  
  A separate branch would be nice so I can merge that in too.
 
 OK
 
 I added a new pm-wakeirq branch to linux-pm.git with these two patches and
 one other commit related to runtime PM (all based on 4.1-rc4).  This branch
 will not be rebased going forward.

Hopefully it's not too late to get my

Reviewed-by: Felipe Balbi ba...@ti.com

in the patch. If it is, no problem :-)

cheers

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Re: [PATCH] spi: omap2-mcspi: Fix native cs with new set_cs

2015-05-20 Thread Michael Welling
On Tue, May 12, 2015 at 08:17:58PM +0100, Mark Brown wrote:
 On Tue, May 12, 2015 at 12:38:57PM -0500, Michael Welling wrote:
  GPIO chip select patch series appears to have broken the native chip select
  support. This patch pulls the manual native chip select toggling out of
  the transfer_one routine and adds a set_cs routine.
 
 Applied, thanks

It appears that in haste, this fix for the native cs support broke
the GPIO chip select support that I was originally shooting for.

[2.653658] mcp23s08 spi1.1: TXS timed out
[2.657961] mcp23s08 spi1.1: SPI transfer failed: -5
[2.663305] spi_master spi1: failed to transfer one message from queue
[2.670172] mcp23s08 spi1.1: can't setup chip 64, -- -5
[2.675784] GPIO chip mcp23s08: gpiochip_unexport: status -19

My guess is that the set_cs needs to be called even when toggling as GPIO.

How should I handle this?


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Re: [PATCHv3 10/10] CLK: TI: always enable DESHDCP clock

2015-05-20 Thread Paul Walmsley
On Wed, 20 May 2015, Stephen Boyd wrote:

 On 05/20/15 04:50, Tero Kristo wrote:
 
 
  @@ -348,5 +348,10 @@ int __init dra7xx_dt_clk_init(void)
if (rc)
pr_err(%s: failed to set USB_DPLL M2 OUT\n, __func__);
 
  +hdcp_ck = clk_get_sys(NULL, dss_deshdcp_clk);
  +rc = clk_prepare_enable(hdcp_ck);
  +if (rc)
  +pr_err(%s: failed to set dss_deshdcp_clk\n, __func__);
  +
return rc;
}
 
 
  You should rather use the assigned-clock properties in DT to accomplish
  this, the manual clock tweaks under the drivers/clk/ti/clk-* files
  should be converted to DT setup also.
 
  Now that I sent this, I realize we only have support to set_parent /
  set_rate through the assigned-clock props, no enable. Any plans to
  extend this support Mike/Stephen?
 
 
 
 Enable falls under the critical clocks discussion that is ongoing. I
 assume that this is some sort of critical clock that can't be turned off?

It only needs to be enabled for this particular display IP subsystem to 
function:

http://marc.info/?l=linux-omapm=142071550111482w=2

I believe Tomi is taking this approach (enabling it unconditionally) to 
avoid adding support for a secondary IP block main clock to the hwmod 
code.  Apparently, the chips that contain this clock gating bit are not 
intended to be used for power-critical use cases, so there's not much 
motivation to switch it on and off with the display controller.


- Paul
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