Re: [PATCH 3/3] serial: 8250: omap: restore registers on shutdown
On 08/03/2015 09:32 PM, Peter Hurley wrote: You mean a function in 8250-dma API which does what I did just here with the wait_event() and the wake_up in the callback? That way I could move the termios_wait into the dma struct instead of keeping in the omap specific part. I am also not sure if OMAP is the only one that may hang here or the other people just didn't notice it yet. Exactly; and we need to fix DMA wrt x_char anyway. Going back to the dmaengine api, I think something like this might work (as a first approximation): dma_sync_wait(dma-txchan, dma-tx_cookie); dmaengine_pause(dma-txchan); /* remainder of set_termios */ dmaengine_resume(dma-txchan); We could require 8250 core dma to support pause/resume. I would prefer the waitqueue approach. You can't do this while holding the port lock. The lock is taken with irqs off so may not see the transfer completing. Why do you pause the channel? It may not work without an active descriptor and a start without resume should work. Also you must ensure that DMA's complete callback does not start another transfer if there is something queued up (that is why I had the tx_running dance). I am not sure if a transfer that is active and then paused will not trigger the hang bug if we change the termios in between. Sebastian -- To unsubscribe from this list: send the line unsubscribe linux-omap in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
Re: cpuidle results in ethernet degredation ?
* Ran Shalit ransha...@gmail.com [150803 07:03]: I am using GPMC with smsc911x controller. If I understand you correctly, I can overcome this, but asking the hardware not get into inactive state. Correct. Probably the automatic way to block deeper idle states here with GPMC would be to implement DMA transfers for smsc911x. Then the hardware would not enter deeper idle states when a DMA transfer is in progress. Of course there may be still other tuning needed too. I actully need that the code won't get into inactive state (I don't think that anyelse is inactive, except the core - this is C3 state). The problem with this approach is that I'm not sure I can determine when to decide turn cpuidle off and when to decide turn cpuidle on. Right, and the hardware can take care of it if implemented. Using pm_runtime_put_autosuspend() in the device driver gives you the timeouts to idle things, but you'd still have to call something to keep the system active when the smsc911x device driver is PM runtime enabled. I thought that if there is a way to ask the governer (in tickless kernel, it is menu governer), to wait for a longer time, before deciding to get into sleep. I think that if it waits longer time, it will see that there are tasks to do (small packets in iperf test), and will not enter sleep state. Is that possible ? Is there any parameter in governer which control this ? Sure I guess you just need to figure out what the official interface to block deeper idle states is. Regards, Tony -- To unsubscribe from this list: send the line unsubscribe linux-omap in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
[PATCH] usb: musb: omap2430: use *syscon* framework API to write to mailbox register
Deprecate using phy-omap-control driver to write to the mailbox register
and start using *syscon* framework to do the same.
Signed-off-by: Kishon Vijay Abraham I kis...@ti.com
---
Documentation/devicetree/bindings/usb/omap-usb.txt |7 +-
drivers/usb/musb/omap2430.c| 115
2 files changed, 99 insertions(+), 23 deletions(-)
diff --git a/Documentation/devicetree/bindings/usb/omap-usb.txt
b/Documentation/devicetree/bindings/usb/omap-usb.txt
index 38d9bb8..c001306 100644
--- a/Documentation/devicetree/bindings/usb/omap-usb.txt
+++ b/Documentation/devicetree/bindings/usb/omap-usb.txt
@@ -20,10 +20,15 @@ OMAP MUSB GLUE
- phy-names : the names of the PHY corresponding to the PHYs present in the
*phy* phandle.
-Optional properties:
+Optional Properties:
+Deprecated properties:
- ctrl-module : phandle of the control module this glue uses to write to
mailbox
+Recommended properies:
+ - syscon-otghs : phandle/offset pair. Phandle to the system control module
and the
+ register offset of the mailbox.
+
SOC specific device node entry
usb_otg_hs: usb_otg_hs@4a0ab000 {
compatible = ti,omap4-musb;
diff --git a/drivers/usb/musb/omap2430.c b/drivers/usb/musb/omap2430.c
index 70f2b8a..a03cf1e 100644
--- a/drivers/usb/musb/omap2430.c
+++ b/drivers/usb/musb/omap2430.c
@@ -39,16 +39,27 @@
#include linux/usb/musb-omap.h
#include linux/phy/omap_control_phy.h
#include linux/of_platform.h
+#include linux/regmap.h
+#include linux/mfd/syscon.h
#include musb_core.h
#include omap2430.h
+#define OMAP2430_MUSB_MODE_MASK0x1f
+#define OMAP2430_MUSB_AVALID BIT(0)
+#define OMAP2430_MUSB_BVALID BIT(1)
+#define OMAP2430_MUSB_VBUSVALIDBIT(2)
+#define OMAP2430_MUSB_SESSEND BIT(3)
+#define OMAP2430_MUSB_IDDIGBIT(4)
+
struct omap2430_glue {
struct device *dev;
struct platform_device *musb;
enum omap_musb_vbus_id_status status;
struct work_struct omap_musb_mailbox_work;
struct device *control_otghs;
+ struct regmap *syscon_otghs; /* ctrl. reg. acces */
+ unsigned intotghs_reg; /* otghs reg. index within syscon */
};
#define glue_to_musb(g)platform_get_drvdata(g-musb)
@@ -253,6 +264,44 @@ void omap_musb_mailbox(enum omap_musb_vbus_id_status
status)
}
EXPORT_SYMBOL_GPL(omap_musb_mailbox);
+static void omap2430_musb_set_usbmode(struct omap2430_glue *glue,
+ enum omap_control_usb_mode mode)
+{
+ u32 val;
+ int ret;
+
+ if (glue-syscon_otghs) {
+ switch (mode) {
+ case USB_MODE_HOST:
+ val = OMAP2430_MUSB_AVALID | OMAP2430_MUSB_VBUSVALID;
+ break;
+ case USB_MODE_DEVICE:
+ val = OMAP2430_MUSB_IDDIG | OMAP2430_MUSB_AVALID |
+ OMAP2430_MUSB_VBUSVALID;
+ break;
+ case USB_MODE_DISCONNECT:
+ val = OMAP2430_MUSB_IDDIG | OMAP2430_MUSB_SESSEND;
+ break;
+ default:
+ dev_dbg(glue-dev, Invalid mode\n);
+ goto err_regmap_update;
+ }
+
+ ret = regmap_update_bits(glue-syscon_otghs,
+glue-otghs_reg,
+OMAP2430_MUSB_MODE_MASK, val);
+ if (ret 0)
+ goto err_regmap_update;
+ } else {
+ omap_control_usb_set_mode(glue-control_otghs, mode);
+ }
+
+ return;
+
+err_regmap_update:
+ dev_err(glue-dev, Failed to set mode to %d\n, mode);
+}
+
static void omap_musb_set_mailbox(struct omap2430_glue *glue)
{
struct musb *musb = glue_to_musb(glue);
@@ -270,8 +319,7 @@ static void omap_musb_set_mailbox(struct omap2430_glue
*glue)
musb-xceiv-last_event = USB_EVENT_ID;
if (musb-gadget_driver) {
pm_runtime_get_sync(dev);
- omap_control_usb_set_mode(glue-control_otghs,
- USB_MODE_HOST);
+ omap2430_musb_set_usbmode(glue, USB_MODE_HOST);
omap2430_musb_set_vbus(musb, 1);
}
break;
@@ -284,7 +332,7 @@ static void omap_musb_set_mailbox(struct omap2430_glue
*glue)
musb-xceiv-last_event = USB_EVENT_VBUS;
if (musb-gadget_driver)
pm_runtime_get_sync(dev);
- omap_control_usb_set_mode(glue-control_otghs, USB_MODE_DEVICE);
+ omap2430_musb_set_usbmode(glue, USB_MODE_DEVICE);
break;
case OMAP_MUSB_ID_FLOAT:
@@ -301,8 +349,7 @@ static void omap_musb_set_mailbox(struct omap2430_glue
*glue)
if (data-interface_type == MUSB_INTERFACE_UTMI)
Re: Nokia N900 - audio TPA6130A2 problems
On 08/03/2015 09:48 PM, Jarkko Nikula wrote: It is well possible that some regression got introduced to TPA6130A2 I2C communication over the years without nobody than you now notices. We used to do QA back in Meego N900 days but that was pre 3.x kernels. No major changes has been done to the tpa driver during the past years... I wanted to do some updates, like moving it to regmap, but as you said, n900 is the only user (and n9) and I do not feel comfortable to hack on a device where I do not have serial console... And I'm using the n900 time to time also. So maybe something similar? Kernel expects that some PM or regulator parts are initialized, but they are only sometimes? Just speculation... I'm thinking the same. I could figure SCL could be stuck low if TPA or some other chip connected to the same I2C bus is without power and is pulling I2C signals down. What would happen with the SCL stuck on i2c.2 bus if you remove the tpa driver from the kernel? If you remove the other drivers for the devices on i2c.2? -- Péter -- To unsubscribe from this list: send the line unsubscribe linux-omap in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
Re: [PATCH v3 2/3] ARM: dts: dra7: Add syscon-pllreset syscon to SATA PHY
* Roger Quadros rog...@ti.com [150804 01:22]: Tony, On 17/07/15 16:47, Roger Quadros wrote: This register is required to be passed to the SATA PHY driver to workaround errata i783 (SATA Lockup After SATA DPLL Unlock/Relock). Signed-off-by: Roger Quadros rog...@ti.com Can you please Ack or pick this for -fixes. Kishon has already picked patch 1 in this series. Thanks. Best that Kishon takes both then: Acked-by: Tony Lindgren t...@atomide.com --- arch/arm/boot/dts/dra7.dtsi | 1 + 1 file changed, 1 insertion(+) diff --git a/arch/arm/boot/dts/dra7.dtsi b/arch/arm/boot/dts/dra7.dtsi index 8f1e25b..4a0718c 100644 --- a/arch/arm/boot/dts/dra7.dtsi +++ b/arch/arm/boot/dts/dra7.dtsi @@ -1140,6 +1140,7 @@ ctrl-module = omap_control_sata; clocks = sys_clkin1, sata_ref_clk; clock-names = sysclk, refclk; + syscon-pllreset = scm_conf 0x3fc; #phy-cells = 0; }; -- To unsubscribe from this list: send the line unsubscribe linux-omap in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
[PATCH v3 3/3] ARM: dts: dra7: Add scm_conf@1c04 node
This region contains CTRL_CORE_SMA_SW2..9 registers which
are not specific to any domain and can be reasonably
accessed via syscon driver.
Signed-off-by: Roger Quadros rog...@ti.com
---
v3: removed #address/size-cells.
arch/arm/boot/dts/dra7.dtsi | 5 +
1 file changed, 5 insertions(+)
diff --git a/arch/arm/boot/dts/dra7.dtsi b/arch/arm/boot/dts/dra7.dtsi
index 913032b..2cab476 100644
--- a/arch/arm/boot/dts/dra7.dtsi
+++ b/arch/arm/boot/dts/dra7.dtsi
@@ -149,6 +149,11 @@
pinctrl-single,register-width = 32;
pinctrl-single,function-mask =
0x3fff;
};
+
+ scm_conf1: scm_conf@1c04 {
+ compatible = syscon;
+ reg = 0x1c04 0x0020;
+ };
};
cm_core_aon: cm_core_aon@5000 {
--
2.1.4
--
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Re: [PATCH v2 3/3] ARM: dts: dra7: Add scm_conf@1c04 node
On 03/08/15 18:51, Kishon Vijay Abraham I wrote:
Hi Roger,
On Monday 27 July 2015 03:57 PM, Roger Quadros wrote:
This region contains CTRL_CORE_SMA_SW2..9 registers which
are not specific to any domain and can be reasonably
accessed via syscon driver.
Signed-off-by: Roger Quadros rog...@ti.com
---
arch/arm/boot/dts/dra7.dtsi | 7 +++
1 file changed, 7 insertions(+)
diff --git a/arch/arm/boot/dts/dra7.dtsi b/arch/arm/boot/dts/dra7.dtsi
index 913032b..43b5074 100644
--- a/arch/arm/boot/dts/dra7.dtsi
+++ b/arch/arm/boot/dts/dra7.dtsi
@@ -149,6 +149,13 @@
pinctrl-single,register-width = 32;
pinctrl-single,function-mask =
0x3fff;
};
+
+scm_conf1: scm_conf@1c04 {
+compatible = syscon;
+reg = 0x1c04 0x0020;
+#address-cells = 1;
+#size-cells = 1;
Why do you need address-cells and size-cells property here? AFAIK it is
usually
used to decode childs reg property.
Right. I'll remove them.
cheers,
-roger
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Re: [PATCH v3 2/3] ARM: dts: dra7: Add syscon-pllreset syscon to SATA PHY
Tony, On 17/07/15 16:47, Roger Quadros wrote: This register is required to be passed to the SATA PHY driver to workaround errata i783 (SATA Lockup After SATA DPLL Unlock/Relock). Signed-off-by: Roger Quadros rog...@ti.com Can you please Ack or pick this for -fixes. Kishon has already picked patch 1 in this series. Thanks. cheers, -roger --- arch/arm/boot/dts/dra7.dtsi | 1 + 1 file changed, 1 insertion(+) diff --git a/arch/arm/boot/dts/dra7.dtsi b/arch/arm/boot/dts/dra7.dtsi index 8f1e25b..4a0718c 100644 --- a/arch/arm/boot/dts/dra7.dtsi +++ b/arch/arm/boot/dts/dra7.dtsi @@ -1140,6 +1140,7 @@ ctrl-module = omap_control_sata; clocks = sys_clkin1, sata_ref_clk; clock-names = sysclk, refclk; + syscon-pllreset = scm_conf 0x3fc; #phy-cells = 0; }; -- To unsubscribe from this list: send the line unsubscribe linux-omap in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
Re: [PATCH v3 0/5] ARM: dts: OMAP2+: Enable USB dual-role on supported boards
* Roger Quadros rog...@ti.com [150727 02:30]: Tony, On 21/07/15 13:54, Tony Lindgren wrote: * Roger Quadros rog...@ti.com [150708 03:45]: Hi, Enables dual-role feaure on supported boards. Depends on [1] - core USB DRD support - http://thread.gmane.org/gmane.linux.kernel/1991413 [2] - dwc3 DRD support - http://thread.gmane.org/gmane.linux.usb.general/127890 Is this series safe to apply separately actually? Adding the interrupts and the mode name may not be a problem without the related driver changes? The interrupt changes (patches 1 to 3) should be fine but let's not add the otg mode change yet till we have the driver OTG patches in. OK applying patches 1 - 3 into omap-for-v4.3/dt and ignoring the rest. Please resend the rest once the dependencies are merged. Regards, Tony -- To unsubscribe from this list: send the line unsubscribe linux-omap in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
Re: cpuidle results in ethernet degredation ?
On Tue, Aug 4, 2015 at 11:09 AM, Tony Lindgren t...@atomide.com wrote: * Ran Shalit ransha...@gmail.com [150803 07:03]: I am using GPMC with smsc911x controller. If I understand you correctly, I can overcome this, but asking the hardware not get into inactive state. Correct. Probably the automatic way to block deeper idle states here with GPMC would be to implement DMA transfers for smsc911x. Then the hardware would not enter deeper idle states when a DMA transfer is in progress. Of course there may be still other tuning needed too. Hi Tony, but why does it happen in small packet test and not in big packets ? as to your suggestion above, Can you please give a hint as to how to add DMA usage into ethernet ? Regards, Ran -- To unsubscribe from this list: send the line unsubscribe linux-omap in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
[PATCH 1/7] phy: ti-pipe3: cleanup ti_pipe3_probe()
No functional change. Add separate functions for pll,
clocks and syscon to make ti_pipe3_probe clean.
Signed-off-by: Kishon Vijay Abraham I kis...@ti.com
---
drivers/phy/phy-ti-pipe3.c | 165
1 file changed, 104 insertions(+), 61 deletions(-)
diff --git a/drivers/phy/phy-ti-pipe3.c b/drivers/phy/phy-ti-pipe3.c
index 08020dc..072d308 100644
--- a/drivers/phy/phy-ti-pipe3.c
+++ b/drivers/phy/phy-ti-pipe3.c
@@ -308,51 +308,45 @@ static struct phy_ops ops = {
static const struct of_device_id ti_pipe3_id_table[];
-static int ti_pipe3_probe(struct platform_device *pdev)
+static int ti_pipe3_get_pll_base(struct ti_pipe3 *phy)
{
- struct ti_pipe3 *phy;
- struct phy *generic_phy;
- struct phy_provider *phy_provider;
struct resource *res;
- struct device_node *node = pdev-dev.of_node;
- struct device_node *control_node;
- struct platform_device *control_pdev;
const struct of_device_id *match;
- struct clk *clk;
+ struct device *dev = phy-dev;
+ struct device_node *node = dev-of_node;
+ struct platform_device *pdev = to_platform_device(dev);
- phy = devm_kzalloc(pdev-dev, sizeof(*phy), GFP_KERNEL);
- if (!phy)
- return -ENOMEM;
+ if (of_device_is_compatible(node, ti,phy-pipe3-pcie))
+ return 0;
- phy-dev= pdev-dev;
+ match = of_match_device(ti_pipe3_id_table, dev);
+ if (!match)
+ return -EINVAL;
- if (!of_device_is_compatible(node, ti,phy-pipe3-pcie)) {
- match = of_match_device(ti_pipe3_id_table, pdev-dev);
- if (!match)
- return -EINVAL;
+ phy-dpll_map = (struct pipe3_dpll_map *)match-data;
+ if (!phy-dpll_map) {
+ dev_err(dev, no DPLL data\n);
+ return -EINVAL;
+ }
- phy-dpll_map = (struct pipe3_dpll_map *)match-data;
- if (!phy-dpll_map) {
- dev_err(pdev-dev, no DPLL data\n);
- return -EINVAL;
- }
+ res = platform_get_resource_byname(pdev, IORESOURCE_MEM,
+ pll_ctrl);
+ phy-pll_ctrl_base = devm_ioremap_resource(dev, res);
+ if (IS_ERR(phy-pll_ctrl_base))
+ return PTR_ERR(phy-pll_ctrl_base);
- res = platform_get_resource_byname(pdev, IORESOURCE_MEM,
- pll_ctrl);
- phy-pll_ctrl_base = devm_ioremap_resource(pdev-dev, res);
- if (IS_ERR(phy-pll_ctrl_base))
- return PTR_ERR(phy-pll_ctrl_base);
+ return 0;
+}
- phy-sys_clk = devm_clk_get(phy-dev, sysclk);
- if (IS_ERR(phy-sys_clk)) {
- dev_err(pdev-dev, unable to get sysclk\n);
- return -EINVAL;
- }
- }
+static int ti_pipe3_get_clk(struct ti_pipe3 *phy)
+{
+ struct clk *clk;
+ struct device *dev = phy-dev;
+ struct device_node *node = dev-of_node;
- phy-refclk = devm_clk_get(phy-dev, refclk);
+ phy-refclk = devm_clk_get(dev, refclk);
if (IS_ERR(phy-refclk)) {
- dev_err(pdev-dev, unable to get refclk\n);
+ dev_err(dev, unable to get refclk\n);
/* older DTBs have missing refclk in SATA PHY
* so don't bail out in case of SATA PHY.
*/
@@ -361,76 +355,125 @@ static int ti_pipe3_probe(struct platform_device *pdev)
}
if (!of_device_is_compatible(node, ti,phy-pipe3-sata)) {
- phy-wkupclk = devm_clk_get(phy-dev, wkupclk);
+ phy-wkupclk = devm_clk_get(dev, wkupclk);
if (IS_ERR(phy-wkupclk)) {
- dev_err(pdev-dev, unable to get wkupclk\n);
+ dev_err(dev, unable to get wkupclk\n);
return PTR_ERR(phy-wkupclk);
}
} else {
phy-wkupclk = ERR_PTR(-ENODEV);
- phy-dpll_reset_syscon = syscon_regmap_lookup_by_phandle(node,
- syscon-pllreset);
- if (IS_ERR(phy-dpll_reset_syscon)) {
- dev_info(pdev-dev,
-can't get syscon-pllreset, sata dpll won't
idle\n);
- phy-dpll_reset_syscon = NULL;
- } else {
- if (of_property_read_u32_index(node,
- syscon-pllreset, 1,
- phy-dpll_reset_reg)) {
- dev_err(pdev-dev,
- couldn't get pllreset reg. offset\n);
- return -EINVAL;
- }
+ }
+
+ if
[PATCH 5/7] phy: omap-usb2: use omap_usb_power_off to power off the PHY during probe
No functional change. Previously omap_control_phy_power() was used to power off the PHY during probe. But once phy-omap-usb2 driver is adapted to use syscon, omap_control_phy_power() cannot be used. Hence used omap_usb_power_off to power off the PHY. Signed-off-by: Kishon Vijay Abraham I kis...@ti.com Acked-by: Roger Quadros rog...@ti.com --- drivers/phy/phy-omap-usb2.c |2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/phy/phy-omap-usb2.c b/drivers/phy/phy-omap-usb2.c index c1a4686..b5c266a 100644 --- a/drivers/phy/phy-omap-usb2.c +++ b/drivers/phy/phy-omap-usb2.c @@ -241,7 +241,6 @@ static int omap_usb2_probe(struct platform_device *pdev) } phy-control_dev = control_pdev-dev; - omap_control_phy_power(phy-control_dev, 0); otg-set_host = omap_usb_set_host; otg-set_peripheral = omap_usb_set_peripheral; @@ -261,6 +260,7 @@ static int omap_usb2_probe(struct platform_device *pdev) } phy_set_drvdata(generic_phy, phy); + omap_usb_power_off(generic_phy); phy_provider = devm_of_phy_provider_register(phy-dev, of_phy_simple_xlate); -- 1.7.9.5 -- To unsubscribe from this list: send the line unsubscribe linux-omap in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
[PATCH 0/7] phy: use syscon framework APIs to set ctrl mod reg
This series is split from [1] to include only the PHY patches. This series is basically to deprecate using phy-omap-control and use syscon APIs to program the control module registers. Changes from [1] in PHY patches include *) cleanup ti_pipe3_probe *) have mask, power_on and power_off values in usb_phy_data for omap-usb2 phy Did basic enumeration testing in the below platforms. *) Tested PCIe, SATA and USB in dra7 *) Tested SATA and USB in omap5 *) Tested USB(dwc3) in am43xx_evm *) Tested USB(musb) in omap4 panda after including [2] All the testing was done both before applying the dt patches and after applying the dt patches (dt patches will be posted shortly). [1] - https://lkml.org/lkml/2015/6/23/189 [2] - http://permalink.gmane.org/gmane.linux.kernel/2012427 Kishon Vijay Abraham I (7): phy: ti-pipe3: cleanup ti_pipe3_probe() phy: ti-pipe3: use ti_pipe3_power_off to power off the PHY during probe phy: ti-pipe3: use *syscon* framework API to power on/off the PHY phy: ti-pipe3: use *syscon* framework API to set PCS value of the PHY phy: omap-usb2: use omap_usb_power_off to power off the PHY during probe phy: omap-usb2: Add a new compatible string for USB2 PHY2 phy: omap-usb2: use *syscon* framework API to power on/off the PHY Documentation/devicetree/bindings/phy/ti-phy.txt | 20 +- drivers/phy/phy-omap-usb2.c | 96 ++-- drivers/phy/phy-ti-pipe3.c | 283 -- include/linux/phy/omap_usb.h | 23 ++ 4 files changed, 329 insertions(+), 93 deletions(-) -- 1.7.9.5 -- To unsubscribe from this list: send the line unsubscribe linux-omap in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
[PATCH 4/7] phy: ti-pipe3: use *syscon* framework API to set PCS value of the PHY
Deprecate using phy-omap-control driver to set PCS value of the PHY
and start using *syscon* API to do the same.
Signed-off-by: Kishon Vijay Abraham I kis...@ti.com
Acked-by: Roger Quadros rog...@ti.com
---
Documentation/devicetree/bindings/phy/ti-phy.txt |2 ++
drivers/phy/phy-ti-pipe3.c | 34 +-
2 files changed, 35 insertions(+), 1 deletion(-)
diff --git a/Documentation/devicetree/bindings/phy/ti-phy.txt
b/Documentation/devicetree/bindings/phy/ti-phy.txt
index e06f980..49e5b0c 100644
--- a/Documentation/devicetree/bindings/phy/ti-phy.txt
+++ b/Documentation/devicetree/bindings/phy/ti-phy.txt
@@ -83,6 +83,8 @@ Optional properties:
- syscon-pllreset: Handle to system control region that contains the
CTRL_CORE_SMA_SW_0 register and register offset to the CTRL_CORE_SMA_SW_0
register that contains the SATA_PLL_SOFT_RESET bit. Only valid for sata_phy.
+ - syscon-pcs : phandle/offset pair. Phandle to the system control module and
the
+ register offset to write the PCS delay value.
Deprecated properties:
- ctrl-module : phandle of the control module used by PHY driver to power on
diff --git a/drivers/phy/phy-ti-pipe3.c b/drivers/phy/phy-ti-pipe3.c
index a7c20e8..8dc606d 100644
--- a/drivers/phy/phy-ti-pipe3.c
+++ b/drivers/phy/phy-ti-pipe3.c
@@ -65,6 +65,9 @@
#define PIPE3_PHY_TX_RX_POWERON0x3
#define PIPE3_PHY_TX_RX_POWEROFF 0x0
+#define PCIE_PCS_MASK 0xFF
+#define PCIE_PCS_DELAY_COUNT_SHIFT 0x10
+
/*
* This is an Empirical value that works, need to confirm the actual
* value required for the PIPE3PHY_PLL_CONFIGURATION2.PLL_IDLE status
@@ -96,9 +99,11 @@ struct ti_pipe3 {
struct clk *div_clk;
struct pipe3_dpll_map *dpll_map;
struct regmap *phy_power_syscon; /* ctrl. reg. acces */
+ struct regmap *pcs_syscon; /* ctrl. reg. acces */
struct regmap *dpll_reset_syscon; /* ctrl. reg. acces */
unsigned intdpll_reset_reg; /* reg. index within syscon */
unsigned intpower_reg; /* power reg. index within syscon */
+ unsigned intpcie_pcs_reg; /* pcs reg. index in syscon */
boolsata_refclk_enabled;
};
@@ -275,7 +280,16 @@ static int ti_pipe3_init(struct phy *x)
* 18-1804.
*/
if (of_device_is_compatible(phy-dev-of_node, ti,phy-pipe3-pcie)) {
- omap_control_pcie_pcs(phy-control_dev, 0x96);
+ if (phy-pcs_syscon) {
+ val = 0x96 OMAP_CTRL_PCIE_PCS_DELAY_COUNT_SHIFT;
+ ret = regmap_update_bits(phy-pcs_syscon,
+phy-pcie_pcs_reg,
+PCIE_PCS_MASK, val);
+ if (ret 0)
+ return ret;
+ } else {
+ omap_control_pcie_pcs(phy-control_dev, 0x96);
+ }
return 0;
}
@@ -491,6 +505,24 @@ static int ti_pipe3_get_sysctrl(struct ti_pipe3 *phy)
phy-control_dev = control_pdev-dev;
}
+ if (of_device_is_compatible(node, ti,phy-pipe3-pcie)) {
+ phy-pcs_syscon = syscon_regmap_lookup_by_phandle(node,
+ syscon-pcs);
+ if (IS_ERR(phy-pcs_syscon)) {
+ dev_dbg(dev,
+ can't get syscon-pcs, using omap control\n);
+ phy-pcs_syscon = NULL;
+ } else {
+ if (of_property_read_u32_index(node,
+ syscon-pcs, 1,
+ phy-pcie_pcs_reg)) {
+ dev_err(dev,
+ couldn't get pcie pcs reg. offset\n);
+ return -EINVAL;
+ }
+ }
+ }
+
if (of_device_is_compatible(node, ti,phy-pipe3-sata)) {
phy-dpll_reset_syscon = syscon_regmap_lookup_by_phandle(node,
syscon-pllreset);
--
1.7.9.5
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[PATCH 6/7] phy: omap-usb2: Add a new compatible string for USB2 PHY2
The USB2 PHY2 has a different register map compared to USB2 PHY1
to power on/off the PHY. In order to handle it, add a new
compatible string.
Signed-off-by: Kishon Vijay Abraham I kis...@ti.com
---
Documentation/devicetree/bindings/phy/ti-phy.txt |2 ++
drivers/phy/phy-omap-usb2.c |9 +
2 files changed, 11 insertions(+)
diff --git a/Documentation/devicetree/bindings/phy/ti-phy.txt
b/Documentation/devicetree/bindings/phy/ti-phy.txt
index 49e5b0c..a061077 100644
--- a/Documentation/devicetree/bindings/phy/ti-phy.txt
+++ b/Documentation/devicetree/bindings/phy/ti-phy.txt
@@ -31,6 +31,8 @@ OMAP USB2 PHY
Required properties:
- compatible: Should be ti,omap-usb2
+ Should be ti,dra7x-usb2-phy2 for the 2nd instance of USB2 PHY
+ in DRA7x
- reg : Address and length of the register set for the device.
- #phy-cells: determine the number of cells that should be given in the
phandle while referencing this phy.
diff --git a/drivers/phy/phy-omap-usb2.c b/drivers/phy/phy-omap-usb2.c
index b5c266a..2f7220f 100644
--- a/drivers/phy/phy-omap-usb2.c
+++ b/drivers/phy/phy-omap-usb2.c
@@ -159,6 +159,11 @@ static const struct usb_phy_data dra7x_usb2_data = {
.flags = OMAP_USB2_CALIBRATE_FALSE_DISCONNECT,
};
+static const struct usb_phy_data dra7x_usb2_phy2_data = {
+ .label = dra7x_usb2_phy2,
+ .flags = OMAP_USB2_CALIBRATE_FALSE_DISCONNECT,
+};
+
static const struct usb_phy_data am437x_usb2_data = {
.label = am437x_usb2,
.flags = 0,
@@ -178,6 +183,10 @@ static const struct of_device_id omap_usb2_id_table[] = {
.data = dra7x_usb2_data,
},
{
+ .compatible = ti,dra7x-usb2-phy2,
+ .data = dra7x_usb2_phy2_data,
+ },
+ {
.compatible = ti,am437x-usb2,
.data = am437x_usb2_data,
},
--
1.7.9.5
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[PATCH 3/7] phy: ti-pipe3: use *syscon* framework API to power on/off the PHY
Deprecate using phy-omap-control driver to power on/off the PHY and
use *syscon* framework to do the same.
Signed-off-by: Kishon Vijay Abraham I kis...@ti.com
---
Documentation/devicetree/bindings/phy/ti-phy.txt | 10 ++-
drivers/phy/phy-ti-pipe3.c | 90 ++
2 files changed, 85 insertions(+), 15 deletions(-)
diff --git a/Documentation/devicetree/bindings/phy/ti-phy.txt
b/Documentation/devicetree/bindings/phy/ti-phy.txt
index 9cf9446..e06f980 100644
--- a/Documentation/devicetree/bindings/phy/ti-phy.txt
+++ b/Documentation/devicetree/bindings/phy/ti-phy.txt
@@ -77,8 +77,6 @@ Required properties:
* div-clk - apll clock
Optional properties:
- - ctrl-module : phandle of the control module used by PHY driver to power on
- the PHY.
- id: If there are multiple instance of the same type, in order to
differentiate between each instance id can be used (e.g., multi-lane PCIe
PHY). If id is not provided, it is set to default value of '1'.
@@ -86,6 +84,14 @@ Optional properties:
CTRL_CORE_SMA_SW_0 register and register offset to the CTRL_CORE_SMA_SW_0
register that contains the SATA_PLL_SOFT_RESET bit. Only valid for sata_phy.
+Deprecated properties:
+ - ctrl-module : phandle of the control module used by PHY driver to power on
+ the PHY.
+
+Recommended properies:
+ - syscon-phy-power : phandle/offset pair. Phandle to the system control
+ module and the register offset to power on/off the PHY.
+
This is usually a subnode of ocp2scp to which it is connected.
usb3phy@4a084400 {
diff --git a/drivers/phy/phy-ti-pipe3.c b/drivers/phy/phy-ti-pipe3.c
index 9782c16..a7c20e8 100644
--- a/drivers/phy/phy-ti-pipe3.c
+++ b/drivers/phy/phy-ti-pipe3.c
@@ -56,6 +56,15 @@
#define SATA_PLL_SOFT_RESETBIT(18)
+#define PIPE3_PHY_PWRCTL_CLK_CMD_MASK 0x003FC000
+#define PIPE3_PHY_PWRCTL_CLK_CMD_SHIFT 14
+
+#define PIPE3_PHY_PWRCTL_CLK_FREQ_MASK 0xFFC0
+#define PIPE3_PHY_PWRCTL_CLK_FREQ_SHIFT22
+
+#define PIPE3_PHY_TX_RX_POWERON0x3
+#define PIPE3_PHY_TX_RX_POWEROFF 0x0
+
/*
* This is an Empirical value that works, need to confirm the actual
* value required for the PIPE3PHY_PLL_CONFIGURATION2.PLL_IDLE status
@@ -86,8 +95,10 @@ struct ti_pipe3 {
struct clk *refclk;
struct clk *div_clk;
struct pipe3_dpll_map *dpll_map;
+ struct regmap *phy_power_syscon; /* ctrl. reg. acces */
struct regmap *dpll_reset_syscon; /* ctrl. reg. acces */
unsigned intdpll_reset_reg; /* reg. index within syscon */
+ unsigned intpower_reg; /* power reg. index within syscon */
boolsata_refclk_enabled;
};
@@ -144,18 +155,53 @@ static void ti_pipe3_disable_clocks(struct ti_pipe3 *phy);
static int ti_pipe3_power_off(struct phy *x)
{
+ u32 val;
+ int ret;
struct ti_pipe3 *phy = phy_get_drvdata(x);
- omap_control_phy_power(phy-control_dev, 0);
+ if (phy-phy_power_syscon) {
+ val = PIPE3_PHY_TX_RX_POWEROFF
+ PIPE3_PHY_PWRCTL_CLK_CMD_SHIFT;
+
+ ret = regmap_update_bits(phy-phy_power_syscon, phy-power_reg,
+PIPE3_PHY_PWRCTL_CLK_CMD_MASK, val);
+ if (ret 0)
+ return ret;
+ } else {
+ omap_control_phy_power(phy-control_dev, 0);
+ }
return 0;
}
static int ti_pipe3_power_on(struct phy *x)
{
+ u32 val;
+ u32 mask;
+ int ret;
+ unsigned long rate;
struct ti_pipe3 *phy = phy_get_drvdata(x);
- omap_control_phy_power(phy-control_dev, 1);
+ if (phy-phy_power_syscon) {
+ rate = clk_get_rate(phy-sys_clk);
+ if (!rate) {
+ dev_err(phy-dev, Invalid clock rate\n);
+ return -EINVAL;
+ }
+ rate = rate / 100;
+ mask = OMAP_CTRL_PIPE3_PHY_PWRCTL_CLK_CMD_MASK |
+ OMAP_CTRL_PIPE3_PHY_PWRCTL_CLK_FREQ_MASK;
+ val = PIPE3_PHY_TX_RX_POWERON
+ PIPE3_PHY_PWRCTL_CLK_CMD_SHIFT;
+ val |= rate OMAP_CTRL_PIPE3_PHY_PWRCTL_CLK_FREQ_SHIFT;
+
+ ret = regmap_update_bits(phy-phy_power_syscon, phy-power_reg,
+mask, val);
+ if (ret 0)
+ return ret;
+ } else {
+ omap_control_phy_power(phy-control_dev, 1);
+ }
return 0;
}
@@ -364,7 +410,8 @@ static int ti_pipe3_get_clk(struct ti_pipe3 *phy)
phy-wkupclk = ERR_PTR(-ENODEV);
}
- if (!of_device_is_compatible(node, ti,phy-pipe3-pcie)) {
+ if (!of_device_is_compatible(node, ti,phy-pipe3-pcie) ||
+ phy-phy_power_syscon) {
phy-sys_clk = devm_clk_get(dev, sysclk);
[PATCH 2/7] phy: ti-pipe3: use ti_pipe3_power_off to power off the PHY during probe
No functional change. Previously omap_control_phy_power() was used to power off the PHY during probe. But once PIPE3 driver is adapted to use syscon, omap_control_phy_power() cannot be used. Hence used ti_pipe3_power_off to power off the PHY. Signed-off-by: Kishon Vijay Abraham I kis...@ti.com Acked-by: Roger Quadros rog...@ti.com --- drivers/phy/phy-ti-pipe3.c |4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/drivers/phy/phy-ti-pipe3.c b/drivers/phy/phy-ti-pipe3.c index 072d308..9782c16 100644 --- a/drivers/phy/phy-ti-pipe3.c +++ b/drivers/phy/phy-ti-pipe3.c @@ -474,8 +474,6 @@ static int ti_pipe3_probe(struct platform_device *pdev) if (ret) return ret; - omap_control_phy_power(phy-control_dev, 0); - platform_set_drvdata(pdev, phy); pm_runtime_enable(phy-dev); @@ -494,6 +492,8 @@ static int ti_pipe3_probe(struct platform_device *pdev) return PTR_ERR(generic_phy); phy_set_drvdata(generic_phy, phy); + ti_pipe3_power_off(generic_phy); + phy_provider = devm_of_phy_provider_register(phy-dev, of_phy_simple_xlate); if (IS_ERR(phy_provider)) -- 1.7.9.5 -- To unsubscribe from this list: send the line unsubscribe linux-omap in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
[PATCH 7/7] phy: omap-usb2: use *syscon* framework API to power on/off the PHY
Deprecate using phy-omap-control driver to power on/off the PHY,
and use *syscon* framework to do the same. This handles
powering on/off the PHY for the USB2 PHYs used in various TI SoCs.
Signed-off-by: Kishon Vijay Abraham I kis...@ti.com
---
Documentation/devicetree/bindings/phy/ti-phy.txt |6 +-
drivers/phy/phy-omap-usb2.c | 85 +-
include/linux/phy/omap_usb.h | 23 ++
3 files changed, 96 insertions(+), 18 deletions(-)
diff --git a/Documentation/devicetree/bindings/phy/ti-phy.txt
b/Documentation/devicetree/bindings/phy/ti-phy.txt
index a061077..a3b3945 100644
--- a/Documentation/devicetree/bindings/phy/ti-phy.txt
+++ b/Documentation/devicetree/bindings/phy/ti-phy.txt
@@ -42,10 +42,14 @@ Required properties:
* wkupclk - wakeup clock.
* refclk - reference clock (optional).
-Optional properties:
+Deprecated properties:
- ctrl-module : phandle of the control module used by PHY driver to power on
the PHY.
+Recommended properies:
+- syscon-phy-power : phandle/offset pair. Phandle to the system control
+ module and the register offset to power on/off the PHY.
+
This is usually a subnode of ocp2scp to which it is connected.
usb2phy@4a0ad080 {
diff --git a/drivers/phy/phy-omap-usb2.c b/drivers/phy/phy-omap-usb2.c
index 2f7220f..531fe04 100644
--- a/drivers/phy/phy-omap-usb2.c
+++ b/drivers/phy/phy-omap-usb2.c
@@ -29,6 +29,8 @@
#include linux/delay.h
#include linux/phy/omap_control_phy.h
#include linux/phy/phy.h
+#include linux/mfd/syscon.h
+#include linux/regmap.h
#include linux/of_platform.h
#define USB2PHY_DISCON_BYP_LATCH (1 31)
@@ -97,22 +99,40 @@ static int omap_usb_set_peripheral(struct usb_otg *otg,
return 0;
}
-static int omap_usb_power_off(struct phy *x)
+static int omap_usb_phy_power(struct omap_usb *phy, int on)
{
- struct omap_usb *phy = phy_get_drvdata(x);
+ u32 val = 0;
+ int ret;
- omap_control_phy_power(phy-control_dev, 0);
+ if (phy-syscon_phy_power) {
+ if (on)
+ val = phy-power_on;
+ else
+ val = phy-power_off;
+
+ ret = regmap_update_bits(phy-syscon_phy_power, phy-power_reg,
+phy-mask, val);
+ if (ret 0)
+ return ret;
+ } else {
+ omap_control_phy_power(phy-control_dev, on);
+ }
return 0;
}
-static int omap_usb_power_on(struct phy *x)
+static int omap_usb_power_off(struct phy *x)
{
struct omap_usb *phy = phy_get_drvdata(x);
- omap_control_phy_power(phy-control_dev, 1);
+ return omap_usb_phy_power(phy, false);
+}
- return 0;
+static int omap_usb_power_on(struct phy *x)
+{
+ struct omap_usb *phy = phy_get_drvdata(x);
+
+ return omap_usb_phy_power(phy, true);
}
static int omap_usb_init(struct phy *x)
@@ -147,26 +167,38 @@ static struct phy_ops ops = {
static const struct usb_phy_data omap_usb2_data = {
.label = omap_usb2,
.flags = OMAP_USB2_HAS_START_SRP | OMAP_USB2_HAS_SET_VBUS,
+ .mask = OMAP_DEV_PHY_PD,
+ .power_off = OMAP_DEV_PHY_PD,
};
static const struct usb_phy_data omap5_usb2_data = {
.label = omap5_usb2,
.flags = 0,
+ .mask = OMAP_DEV_PHY_PD,
+ .power_off = OMAP_DEV_PHY_PD,
};
static const struct usb_phy_data dra7x_usb2_data = {
.label = dra7x_usb2,
.flags = OMAP_USB2_CALIBRATE_FALSE_DISCONNECT,
+ .mask = OMAP_DEV_PHY_PD,
+ .power_off = OMAP_DEV_PHY_PD,
};
static const struct usb_phy_data dra7x_usb2_phy2_data = {
.label = dra7x_usb2_phy2,
.flags = OMAP_USB2_CALIBRATE_FALSE_DISCONNECT,
+ .mask = OMAP_USB2_PHY_PD,
+ .power_off = OMAP_USB2_PHY_PD,
};
static const struct usb_phy_data am437x_usb2_data = {
.label = am437x_usb2,
.flags = 0,
+ .mask = AM437X_USB2_PHY_PD | AM437X_USB2_OTG_PD |
+ AM437X_USB2_OTGVDET_EN | AM437X_USB2_OTGSESSEND_EN,
+ .power_on = AM437X_USB2_OTGVDET_EN | AM437X_USB2_OTGSESSEND_EN,
+ .power_off = AM437X_USB2_PHY_PD | AM437X_USB2_OTG_PD,
};
static const struct of_device_id omap_usb2_id_table[] = {
@@ -228,6 +260,9 @@ static int omap_usb2_probe(struct platform_device *pdev)
phy-phy.label = phy_data-label;
phy-phy.otg= otg;
phy-phy.type = USB_PHY_TYPE_USB2;
+ phy-mask = phy_data-mask;
+ phy-power_on = phy_data-power_on;
+ phy-power_off = phy_data-power_off;
if (phy_data-flags OMAP_USB2_CALIBRATE_FALSE_DISCONNECT) {
res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
@@ -237,20 +272,36 @@ static int omap_usb2_probe(struct platform_device *pdev)
phy-flags |= OMAP_USB2_CALIBRATE_FALSE_DISCONNECT;
}
- control_node =
[PATCH 04/10] ARM: dts: dra7: Use ti,dra7x-usb2-phy2 compatible string for USB2 PHY2
The USB2 PHY2 has a different register map compared to USB2 PHY1
to power on/off the PHY. In order to handle it, use the new compatible
string ti,dra7x-usb2-phy2 for the second instance of USB2 PHY.
Signed-off-by: Kishon Vijay Abraham I kis...@ti.com
---
arch/arm/boot/dts/dra7.dtsi |2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/arch/arm/boot/dts/dra7.dtsi b/arch/arm/boot/dts/dra7.dtsi
index 0ebb808..dfefd17 100644
--- a/arch/arm/boot/dts/dra7.dtsi
+++ b/arch/arm/boot/dts/dra7.dtsi
@@ -1234,7 +1234,7 @@
};
usb2_phy2: phy@4a085000 {
- compatible = ti,omap-usb2;
+ compatible = ti,dra7x-usb2-phy2,
ti,omap-usb2;
reg = 0x4a085000 0x400;
ctrl-module = omap_control_usb2phy2;
clocks = usb_phy2_always_on_clk32k,
--
1.7.9.5
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[PATCH 05/10] ARM: dts: dra7: Use syscon-phy-power instead of ctrl-module in USB PHY node
Add syscon-phy-power property and remove the deprecated ctrl-module
property from USB PHY devicetree nodes.
Since omap_control_usb2phy1, omap_control_usb3phy1 and
omap_control_usb2phy2 devicetree nodes are no longer used, remove it.
Signed-off-by: Kishon Vijay Abraham I kis...@ti.com
---
arch/arm/boot/dts/dra7.dtsi | 24 +++-
1 file changed, 3 insertions(+), 21 deletions(-)
diff --git a/arch/arm/boot/dts/dra7.dtsi b/arch/arm/boot/dts/dra7.dtsi
index dfefd17..191ffae 100644
--- a/arch/arm/boot/dts/dra7.dtsi
+++ b/arch/arm/boot/dts/dra7.dtsi
@@ -1195,24 +1195,6 @@
clocks = sys_32k_ck;
};
- omap_control_usb2phy1: control-phy@4a002300 {
- compatible = ti,control-phy-usb2;
- reg = 0x4a002300 0x4;
- reg-names = power;
- };
-
- omap_control_usb3phy1: control-phy@4a002370 {
- compatible = ti,control-phy-pipe3;
- reg = 0x4a002370 0x4;
- reg-names = power;
- };
-
- omap_control_usb2phy2: control-phy@0x4a002e74 {
- compatible = ti,control-phy-usb2-dra7;
- reg = 0x4a002e74 0x4;
- reg-names = power;
- };
-
/* OCP2SCP1 */
ocp2scp@4a08 {
compatible = ti,omap-ocp2scp;
@@ -1225,7 +1207,7 @@
usb2_phy1: phy@4a084000 {
compatible = ti,omap-usb2;
reg = 0x4a084000 0x400;
- ctrl-module = omap_control_usb2phy1;
+ syscon-phy-power = scm_conf 0x300;
clocks = usb_phy1_always_on_clk32k,
usb_otg_ss1_refclk960m;
clock-names = wkupclk,
@@ -1236,7 +1218,7 @@
usb2_phy2: phy@4a085000 {
compatible = ti,dra7x-usb2-phy2,
ti,omap-usb2;
reg = 0x4a085000 0x400;
- ctrl-module = omap_control_usb2phy2;
+ syscon-phy-power = scm_conf 0xe74;
clocks = usb_phy2_always_on_clk32k,
usb_otg_ss2_refclk960m;
clock-names = wkupclk,
@@ -1250,7 +1232,7 @@
0x4a084800 0x64,
0x4a084c00 0x40;
reg-names = phy_rx, phy_tx, pll_ctrl;
- ctrl-module = omap_control_usb3phy1;
+ syscon-phy-power = scm_conf 0x370;
clocks = usb_phy3_always_on_clk32k,
sys_clkin1,
usb_otg_ss1_refclk960m;
--
1.7.9.5
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[PATCH 03/10] ARM: dts: dra7: Use syscon-phy-power and syscon-pcs in PCIe PHY node
Add syscon-phy-power property and syscon-pcs property which can
be used to perform the control module initializations and remove
the deprecated ctrl-module property from PCIe PHY dt nodes.
Phandle to sysclk clock node is also added to the PCIe PHY node
since some of the syscon initializations is based on system clock
frequency.
Since omap_control_pcie1phy and omap_control_pcie2phy devicetree
nodes are no longer used, remove it.
Signed-off-by: Kishon Vijay Abraham I kis...@ti.com
---
arch/arm/boot/dts/dra7.dtsi | 28 +++-
1 file changed, 7 insertions(+), 21 deletions(-)
diff --git a/arch/arm/boot/dts/dra7.dtsi b/arch/arm/boot/dts/dra7.dtsi
index 6854385..0ebb808 100644
--- a/arch/arm/boot/dts/dra7.dtsi
+++ b/arch/arm/boot/dts/dra7.dtsi
@@ -1140,16 +1140,18 @@
reg = 0x4a094000 0x80, /* phy_rx */
0x4a094400 0x64; /* phy_tx */
reg-names = phy_rx, phy_tx;
- ctrl-module = omap_control_pcie1phy;
+ syscon-phy-power = scm_conf2 0x1c;
+ syscon-pcs = scm_conf2 0x10;
clocks = dpll_pcie_ref_ck,
dpll_pcie_ref_m2ldo_ck,
optfclk_pciephy1_32khz,
optfclk_pciephy1_clk,
optfclk_pciephy1_div_clk,
-optfclk_pciephy_div;
+optfclk_pciephy_div,
+sys_clkin1;
clock-names = dpll_ref, dpll_ref_m2,
wkupclk, refclk,
- div-clk, phy-div;
+ div-clk, phy-div, sysclk;
#phy-cells = 0;
};
@@ -1158,7 +1160,8 @@
reg = 0x4a095000 0x80, /* phy_rx */
0x4a095400 0x64; /* phy_tx */
reg-names = phy_rx, phy_tx;
- ctrl-module = omap_control_pcie2phy;
+ syscon-phy-power = scm_conf2 0x20;
+ syscon-pcs = scm_conf2 0x10;
clocks = dpll_pcie_ref_ck,
dpll_pcie_ref_m2ldo_ck,
optfclk_pciephy2_32khz,
@@ -1183,23 +1186,6 @@
ti,hwmods = sata;
};
- omap_control_pcie1phy: control-phy@0x4a003c40 {
- compatible = ti,control-phy-pcie;
- reg = 0x4a003c40 0x4, 0x4a003c14 0x4, 0x4a003c34
0x4;
- reg-names = power, control_sma, pcie_pcs;
- clocks = sys_clkin1;
- clock-names = sysclk;
- };
-
- omap_control_pcie2phy: control-pcie@0x4a003c44 {
- compatible = ti,control-phy-pcie;
- reg = 0x4a003c44 0x4, 0x4a003c14 0x4, 0x4a003c34
0x4;
- reg-names = power, control_sma, pcie_pcs;
- clocks = sys_clkin1;
- clock-names = sysclk;
- status = disabled;
- };
-
rtc: rtc@48838000 {
compatible = ti,am3352-rtc;
reg = 0x48838000 0x100;
--
1.7.9.5
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[PATCH 01/10] ARM: dts: dra7: Add dt node for PCIe registers in sysctrl space
Add new device tree node for the control module register space where
PCIe registers are present.
Signed-off-by: Kishon Vijay Abraham I kis...@ti.com
---
arch/arm/boot/dts/dra7.dtsi |5 +
1 file changed, 5 insertions(+)
diff --git a/arch/arm/boot/dts/dra7.dtsi b/arch/arm/boot/dts/dra7.dtsi
index aa6abfc..33c5655 100644
--- a/arch/arm/boot/dts/dra7.dtsi
+++ b/arch/arm/boot/dts/dra7.dtsi
@@ -154,6 +154,11 @@
compatible = syscon;
reg = 0x1c04 0x0020;
};
+
+ scm_conf2: scm_conf@1c24 {
+ compatible = syscon;
+ reg = 0x1c24 0x0024;
+ };
};
cm_core_aon: cm_core_aon@5000 {
--
1.7.9.5
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[PATCH 2/3] ARM: dts: am437x-gp-evm: Add gpio-hog for configuring eMMC/NAND driver
On this board either eMMC or NAND can work based on the level of
spi2_cs0.gpio0_23. Add a gpio-hog to enable configuration of this
pin in the device tree.
Move pinmux for spi2_cs0 (SEL_eMMCorNANDn) out of
NAND node into gpio0 so it is initialized with gpio0.
Signed-off-by: Roger Quadros rog...@ti.com
---
arch/arm/boot/dts/am437x-gp-evm.dts | 23 ++-
1 file changed, 22 insertions(+), 1 deletion(-)
diff --git a/arch/arm/boot/dts/am437x-gp-evm.dts
b/arch/arm/boot/dts/am437x-gp-evm.dts
index 58cfad2..3c59858 100644
--- a/arch/arm/boot/dts/am437x-gp-evm.dts
+++ b/arch/arm/boot/dts/am437x-gp-evm.dts
@@ -231,7 +231,6 @@
nand_flash_x8: nand_flash_x8 {
pinctrl-single,pins =
- 0x26c(PIN_OUTPUT_PULLDOWN | MUX_MODE7) /*
spi2_cs0.gpio/eMMCorNANDsel */
0x0 (PIN_INPUT | MUX_MODE0) /* gpmc_ad0.gpmc_ad0 */
0x4 (PIN_INPUT | MUX_MODE0) /* gpmc_ad1.gpmc_ad1 */
0x8 (PIN_INPUT | MUX_MODE0) /* gpmc_ad2.gpmc_ad2 */
@@ -441,6 +440,12 @@
0x144 (PIN_INPUT_PULLDOWN | MUX_MODE7)
;
};
+
+ gpio0_pins: gpio0_pins {
+ pinctrl-single,pins =
+ 0x26c (PIN_OUTPUT | MUX_MODE9) /* spi2_cs0.gpio0_23
SEL_eMMCorNANDn */
+ ;
+ };
};
i2c0 {
@@ -587,7 +592,23 @@
};
gpio0 {
+ pinctrl-names = default;
+ pinctrl-0 = gpio0_pins;
status = okay;
+
+ p23 {
+ gpio-hog;
+ gpios = 23 GPIO_ACTIVE_HIGH;
+ /* SelEMMCorNAND selects between eMMC and NAND:
+* Low: NAND
+* High: eMMC
+* When changing this line make sure the newly
+* selected device node is enabled and the previously
+* selected device node is disabled.
+*/
+ output-low;
+ line-name = SelEMMCorNAND;
+ };
};
gpio1 {
--
2.1.4
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[PATCH 0/3] ARM: dts: am437x-gp-evm: Add eMMC and eMMC/NAND selection
Hi, On this board either eMMC or NAND can work based on the level of spi2_cs0.gpio0_23. Add a gpio-hog to enable configuration of this pin in the device tree. Add eMMC node but keep it disabled. cheers, -roger Dave Gerlach (1): ARM: dts: am43xx: Introduce MUX_MODE9 for pinctrl Roger Quadros (2): ARM: dts: am437x-gp-evm: Add gpio-hog for configuring eMMC/NAND driver ARM: dts: am437x-gp-evm: Add eMMC support arch/arm/boot/dts/am437x-gp-evm.dts | 72 +++- include/dt-bindings/pinctrl/am43xx.h | 1 + 2 files changed, 72 insertions(+), 1 deletion(-) -- 2.1.4 -- To unsubscribe from this list: send the line unsubscribe linux-omap in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
[PATCH 02/10] ARM: dts: dra7: Use syscon-phy-power instead of ctrl-module in SATA PHY node
Add syscon-phy-power property and remove the deprecated ctrl-module
property from SATA PHY node. Since omap_control_sata note is no longer
used, remove it.
Signed-off-by: Kishon Vijay Abraham I kis...@ti.com
---
arch/arm/boot/dts/dra7.dtsi | 10 +-
1 file changed, 1 insertion(+), 9 deletions(-)
diff --git a/arch/arm/boot/dts/dra7.dtsi b/arch/arm/boot/dts/dra7.dtsi
index 33c5655..6854385 100644
--- a/arch/arm/boot/dts/dra7.dtsi
+++ b/arch/arm/boot/dts/dra7.dtsi
@@ -1115,14 +1115,6 @@
status = disabled;
};
- omap_control_sata: control-phy@4a002374 {
- compatible = ti,control-phy-pipe3;
- reg = 0x4a002374 0x4;
- reg-names = power;
- clocks = sys_clkin1;
- clock-names = sysclk;
- };
-
/* OCP2SCP3 */
ocp2scp@4a09 {
compatible = ti,omap-ocp2scp;
@@ -1137,7 +1129,7 @@
0x4A096400 0x64, /* phy_tx */
0x4A096800 0x40; /* pll_ctrl */
reg-names = phy_rx, phy_tx, pll_ctrl;
- ctrl-module = omap_control_sata;
+ syscon-phy-power = scm_conf 0x374;
clocks = sys_clkin1, sata_ref_clk;
clock-names = sysclk, refclk;
#phy-cells = 0;
--
1.7.9.5
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[PATCH 1/3] ARM: dts: am43xx: Introduce MUX_MODE9 for pinctrl
From: Dave Gerlach d-gerl...@ti.com Some pins on AM43XX support MODE9 for the pinctrl settings so add a binding to describe this. Signed-off-by: Dave Gerlach d-gerl...@ti.com Signed-off-by: Roger Quadros rog...@ti.com --- include/dt-bindings/pinctrl/am43xx.h | 1 + 1 file changed, 1 insertion(+) diff --git a/include/dt-bindings/pinctrl/am43xx.h b/include/dt-bindings/pinctrl/am43xx.h index b00bbc9..774dc1e 100644 --- a/include/dt-bindings/pinctrl/am43xx.h +++ b/include/dt-bindings/pinctrl/am43xx.h @@ -14,6 +14,7 @@ #define MUX_MODE6 6 #define MUX_MODE7 7 #define MUX_MODE8 8 +#define MUX_MODE9 9 #define PULL_DISABLE (1 16) #define PULL_UP(1 17) -- 2.1.4 -- To unsubscribe from this list: send the line unsubscribe linux-omap in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
Re: [RFC PATCH 1/5] spi: introduce flag for memory mapped read
On Mon, Aug 03, 2015 at 10:27:19AM +0530, Vignesh R wrote: @use_mmap_mode: Some SPI controller chips are optimized for interacting with serial flash memories. These chips have memory mapped interface, through which entire serial flash memory slave can be read/written as if though they are physical memories (like RAM). Using this interface, flash can be accessed using memcpy() function and the spi controller hardware will take care of communicating with serial flash over SPI. Setting this flag will indicate the SPI controller driver that the spi_message is from mtd layer to read from/write to flash. The SPI master driver can then appropriately switch the controller to memory mapped interface to read from/write to flash, based on this flag (See drivers/spi/spi-ti-qspi.c for example). NOTE: If the SPI controller chip lacks memory mapped interface, then the driver will ignore this flag and use normal SPI protocol to read from/write to flash. Communication with non-flash SPI devices is not possible using the memory mapped interface. I still can't tell from the above what this interface is supposed to do. It sounds like the use of memory mapped mode is supposed to be transparent to users, it should just affect how the controller interacts with the hardware, but if that's the case why do we need to expose it to users at all? Shouldn't the driver just use memory mapped mode if it's faster? signature.asc Description: Digital signature
[PATCH 06/10] ARM: dts: am4372: Use syscon-phy-power instead of ctrl-module in USB PHY node
Add syscon-phy-power property and remove the deprecated ctrl-module
property from USB PHY device tree node.
Since am43xx_control_usb2phy1 and am43xx_control_usb2phy2
devicetree nodes are no longer used, remove it.
Signed-off-by: Kishon Vijay Abraham I kis...@ti.com
---
arch/arm/boot/dts/am4372.dtsi | 16 ++--
1 file changed, 2 insertions(+), 14 deletions(-)
diff --git a/arch/arm/boot/dts/am4372.dtsi b/arch/arm/boot/dts/am4372.dtsi
index ade28c79..24fa073 100644
--- a/arch/arm/boot/dts/am4372.dtsi
+++ b/arch/arm/boot/dts/am4372.dtsi
@@ -802,18 +802,6 @@
status = disabled;
};
- am43xx_control_usb2phy1: control-phy@44e10620 {
- compatible = ti,control-phy-usb2-am437;
- reg = 0x44e10620 0x4;
- reg-names = power;
- };
-
- am43xx_control_usb2phy2: control-phy@0x44e10628 {
- compatible = ti,control-phy-usb2-am437;
- reg = 0x44e10628 0x4;
- reg-names = power;
- };
-
ocp2scp0: ocp2scp@483a8000 {
compatible = ti,am437x-ocp2scp, ti,omap-ocp2scp;
#address-cells = 1;
@@ -824,7 +812,7 @@
usb2_phy1: phy@483a8000 {
compatible = ti,am437x-usb2;
reg = 0x483a8000 0x8000;
- ctrl-module = am43xx_control_usb2phy1;
+ syscon-phy-power = scm_conf 0x620;
clocks = usb_phy0_always_on_clk32k,
usb_otg_ss0_refclk960m;
clock-names = wkupclk, refclk;
@@ -843,7 +831,7 @@
usb2_phy2: phy@483e8000 {
compatible = ti,am437x-usb2;
reg = 0x483e8000 0x8000;
- ctrl-module = am43xx_control_usb2phy2;
+ syscon-phy-power = scm_conf 0x628;
clocks = usb_phy1_always_on_clk32k,
usb_otg_ss1_refclk960m;
clock-names = wkupclk, refclk;
--
1.7.9.5
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[PATCH 09/10] ARM: dts: omap4: Use syscon-phy-power instead of ctrl-module in USB PHY node
Add syscon-phy-power property and remove the deprecated ctrl-module
property from USB PHY dt node.
Since omap_control_usb2phy devicetree node is no longer used,
remove it.
Signed-off-by: Kishon Vijay Abraham I kis...@ti.com
---
arch/arm/boot/dts/omap4.dtsi |8 +---
1 file changed, 1 insertion(+), 7 deletions(-)
diff --git a/arch/arm/boot/dts/omap4.dtsi b/arch/arm/boot/dts/omap4.dtsi
index 7d31c6f..b27634d 100644
--- a/arch/arm/boot/dts/omap4.dtsi
+++ b/arch/arm/boot/dts/omap4.dtsi
@@ -703,7 +703,7 @@
usb2_phy: usb2phy@4a0ad080 {
compatible = ti,omap-usb2;
reg = 0x4a0ad080 0x58;
- ctrl-module = omap_control_usb2phy;
+ syscon-phy-power = scm_conf 0x300;
clocks = usb_phy_cm_clk32k;
clock-names = wkupclk;
#phy-cells = 0;
@@ -854,12 +854,6 @@
};
};
- omap_control_usb2phy: control-phy@4a002300 {
- compatible = ti,control-phy-usb2;
- reg = 0x4a002300 0x4;
- reg-names = power;
- };
-
omap_control_usbotg: control-phy@4a00233c {
compatible = ti,control-phy-otghs;
reg = 0x4a00233c 0x4;
--
1.7.9.5
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[PATCH 3/3] ARM: dts: am437x-gp-evm: Add eMMC support
Add eMMC pinmux and mmc2 related bits. We keep the mmc2
controller disabled as it conflits with gpmc/NAND.
To enable emmc, simply set mmc2 controller node to okay
and set the gpmc node to disabled and change the
SelEMMCorNAND gpio-hog to output-high.
Signed-off-by: Roger Quadros rog...@ti.com
---
arch/arm/boot/dts/am437x-gp-evm.dts | 49 +
1 file changed, 49 insertions(+)
diff --git a/arch/arm/boot/dts/am437x-gp-evm.dts
b/arch/arm/boot/dts/am437x-gp-evm.dts
index 3c59858..c7423ed 100644
--- a/arch/arm/boot/dts/am437x-gp-evm.dts
+++ b/arch/arm/boot/dts/am437x-gp-evm.dts
@@ -446,6 +446,36 @@
0x26c (PIN_OUTPUT | MUX_MODE9) /* spi2_cs0.gpio0_23
SEL_eMMCorNANDn */
;
};
+
+ emmc_pins_default: emmc_pins_default {
+ pinctrl-single,pins =
+ 0x00 (PIN_INPUT_PULLUP | MUX_MODE1) /*
gpmc_ad0.mmc1_dat0 */
+ 0x04 (PIN_INPUT_PULLUP | MUX_MODE1) /*
gpmc_ad1.mmc1_dat1 */
+ 0x08 (PIN_INPUT_PULLUP | MUX_MODE1) /*
gpmc_ad2.mmc1_dat2 */
+ 0x0c (PIN_INPUT_PULLUP | MUX_MODE1) /*
gpmc_ad3.mmc1_dat3 */
+ 0x10 (PIN_INPUT_PULLUP | MUX_MODE1) /*
gpmc_ad4.mmc1_dat4 */
+ 0x14 (PIN_INPUT_PULLUP | MUX_MODE1) /*
gpmc_ad5.mmc1_dat5 */
+ 0x18 (PIN_INPUT_PULLUP | MUX_MODE1) /*
gpmc_ad6.mmc1_dat6 */
+ 0x1c (PIN_INPUT_PULLUP | MUX_MODE1) /*
gpmc_ad7.mmc1_dat7 */
+ 0x80 (PIN_INPUT_PULLUP | MUX_MODE2) /*
gpmc_csn1.mmc1_clk */
+ 0x84 (PIN_INPUT_PULLUP | MUX_MODE2) /*
gpmc_csn2.mmc1_cmd */
+ ;
+ };
+
+ emmc_pins_sleep: emmc_pins_sleep {
+ pinctrl-single,pins =
+ 0x00 (PIN_INPUT_PULLDOWN | MUX_MODE7) /*
gpmc_ad0.gpio1_0 */
+ 0x04 (PIN_INPUT_PULLDOWN | MUX_MODE7) /*
gpmc_ad1.gpio1_1 */
+ 0x08 (PIN_INPUT_PULLDOWN | MUX_MODE7) /*
gpmc_ad2.gpio1_2 */
+ 0x0c (PIN_INPUT_PULLDOWN | MUX_MODE7) /*
gpmc_ad3.gpio1_3 */
+ 0x10 (PIN_INPUT_PULLDOWN | MUX_MODE7) /*
gpmc_ad4.gpio1_4 */
+ 0x14 (PIN_INPUT_PULLDOWN | MUX_MODE7) /*
gpmc_ad5.gpio1_5 */
+ 0x18 (PIN_INPUT_PULLDOWN | MUX_MODE7) /*
gpmc_ad6.gpio1_6 */
+ 0x1c (PIN_INPUT_PULLDOWN | MUX_MODE7) /*
gpmc_ad7.gpio1_7 */
+ 0x80 (PIN_INPUT_PULLDOWN | MUX_MODE7) /*
gpmc_csn1.gpio1_30 */
+ 0x84 (PIN_INPUT_PULLDOWN | MUX_MODE7) /*
gpmc_csn2.gpio1_31 */
+ ;
+ };
};
i2c0 {
@@ -651,6 +681,21 @@
cd-gpios = gpio0 6 GPIO_ACTIVE_HIGH;
};
+/* eMMC sits on mmc2 */
+mmc2 {
+ /*
+* When enabling eMMC, disable GPMC/NAND and set
+* SelEMMCorNAND to output-high
+*/
+ status = disabled;
+ vmmc-supply = evm_v3_3d;
+ bus-width = 8;
+ pinctrl-names = default, sleep;
+ pinctrl-0 = emmc_pins_default;
+ pinctrl-1 = emmc_pins_sleep;
+ ti,non-removable;
+};
+
mmc3 {
status = okay;
/* these are on the crossbar and are outlined in the
@@ -731,6 +776,10 @@
};
gpmc {
+ /*
+* When enabling GPMC, disable eMMC and set
+* SelEMMCorNAND to output-low
+*/
status = okay;
pinctrl-names = default;
pinctrl-0 = nand_flash_x8;
--
2.1.4
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[PATCH 10/10] ARM: dts: omap4: Use syscon-otghs instead of ctrl-module in USB node
Add syscon-otghs property and remove the deprecated ctrl-module
property from MUSB devicetree node.
Since omap_control_usbotg devicetree node is no longer used, remove
it.
Signed-off-by: Kishon Vijay Abraham I kis...@ti.com
---
arch/arm/boot/dts/omap4.dtsi |8 +---
1 file changed, 1 insertion(+), 7 deletions(-)
diff --git a/arch/arm/boot/dts/omap4.dtsi b/arch/arm/boot/dts/omap4.dtsi
index b27634d..2fb49a5 100644
--- a/arch/arm/boot/dts/omap4.dtsi
+++ b/arch/arm/boot/dts/omap4.dtsi
@@ -854,12 +854,6 @@
};
};
- omap_control_usbotg: control-phy@4a00233c {
- compatible = ti,control-phy-otghs;
- reg = 0x4a00233c 0x4;
- reg-names = otghs_control;
- };
-
usb_otg_hs: usb_otg_hs@4a0ab000 {
compatible = ti,omap4-musb;
reg = 0x4a0ab000 0x7ff;
@@ -872,7 +866,7 @@
multipoint = 1;
num-eps = 16;
ram-bits = 12;
- ctrl-module = omap_control_usbotg;
+ syscon-otghs = scm_conf 0x33c;
};
aes: aes@4b501000 {
--
1.7.9.5
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[PATCH 07/10] ARM: dts: OMAP5: Use syscon-phy-power instead of ctrl-module in USB PHY node
Add syscon-phy-power property and remove the deprecated ctrl-module
property from USB PHY devicetree node.
Since omap_control_usb2phy and omap_control_usb3phy devicetree nodes
are no longer used, remove it.
Signed-off-by: Kishon Vijay Abraham I kis...@ti.com
---
arch/arm/boot/dts/omap5.dtsi | 16 ++--
1 file changed, 2 insertions(+), 14 deletions(-)
diff --git a/arch/arm/boot/dts/omap5.dtsi b/arch/arm/boot/dts/omap5.dtsi
index c8fd648..f0b6cd6 100644
--- a/arch/arm/boot/dts/omap5.dtsi
+++ b/arch/arm/boot/dts/omap5.dtsi
@@ -848,18 +848,6 @@
hw-caps-temp-alert;
};
- omap_control_usb2phy: control-phy@4a002300 {
- compatible = ti,control-phy-usb2;
- reg = 0x4a002300 0x4;
- reg-names = power;
- };
-
- omap_control_usb3phy: control-phy@4a002370 {
- compatible = ti,control-phy-pipe3;
- reg = 0x4a002370 0x4;
- reg-names = power;
- };
-
usb3: omap_dwc3@4a02 {
compatible = ti,dwc3;
ti,hwmods = usb_otg_ss;
@@ -890,7 +878,7 @@
usb2_phy: usb2phy@4a084000 {
compatible = ti,omap-usb2;
reg = 0x4a084000 0x7c;
- ctrl-module = omap_control_usb2phy;
+ syscon-phy-power = scm_conf 0x300;
clocks = usb_phy_cm_clk32k,
usb_otg_ss_refclk960m;
clock-names = wkupclk, refclk;
#phy-cells = 0;
@@ -902,7 +890,7 @@
0x4a084800 0x64,
0x4a084c00 0x40;
reg-names = phy_rx, phy_tx, pll_ctrl;
- ctrl-module = omap_control_usb3phy;
+ syscon-phy-power = scm_conf 0x370;
clocks = usb_phy_cm_clk32k,
sys_clkin,
usb_otg_ss_refclk960m;
--
1.7.9.5
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[PATCH 08/10] ARM: dts: OMAP5: Use syscon-phy-power instead of ctrl-module in SATA PHY node
Add syscon-phy-power property and remove the deprecated ctrl-module
property from SATA PHY node.
Since omap_control_sata devicetree node is no longer used, remove it.
Signed-off-by: Kishon Vijay Abraham I kis...@ti.com
---
arch/arm/boot/dts/omap5.dtsi | 10 +-
1 file changed, 1 insertion(+), 9 deletions(-)
diff --git a/arch/arm/boot/dts/omap5.dtsi b/arch/arm/boot/dts/omap5.dtsi
index f0b6cd6..c3ca5b7 100644
--- a/arch/arm/boot/dts/omap5.dtsi
+++ b/arch/arm/boot/dts/omap5.dtsi
@@ -946,14 +946,6 @@
#thermal-sensor-cells = 1;
};
- omap_control_sata: control-phy@4a002374 {
- compatible = ti,control-phy-pipe3;
- reg = 0x4a002374 0x4;
- reg-names = power;
- clocks = sys_clkin;
- clock-names = sysclk;
- };
-
/* OCP2SCP3 */
ocp2scp@4a09 {
compatible = ti,omap-ocp2scp;
@@ -968,7 +960,7 @@
0x4A096400 0x64, /* phy_tx */
0x4A096800 0x40; /* pll_ctrl */
reg-names = phy_rx, phy_tx, pll_ctrl;
- ctrl-module = omap_control_sata;
+ syscon-phy-power = scm_conf 0x374;
clocks = sys_clkin, sata_ref_clk;
clock-names = sysclk, refclk;
#phy-cells = 0;
--
1.7.9.5
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[PATCH 00/10] ARM: dts: use syscon property instead of ctrl-module
This series is split from [1] to include only the dt patches. This series is basically to deprecate using ctrl-module property and use corresponding syscon properties to program the control module registers. Changes from [1] in PHY patches include *) series created after applying [2] Did basic enumeration testing in the below platforms. *) Tested PCIe, SATA and USB in dra7 *) Tested SATA and USB in omap5 *) Tested USB(dwc3) in am43xx_evm *) Tested USB(musb) in omap4 panda after including [3] All the testing was done after applying [4] [1] - https://lkml.org/lkml/2015/6/23/189 [2] - http://www.spinics.net/lists/linux-omap/msg120644.html [3] - http://permalink.gmane.org/gmane.linux.kernel/2012427 [4] - http://permalink.gmane.org/gmane.linux.kernel/2012604 Kishon Vijay Abraham I (10): ARM: dts: dra7: Add dt node for PCIe registers in sysctrl space ARM: dts: dra7: Use syscon-phy-power instead of ctrl-module in SATA PHY node ARM: dts: dra7: Use syscon-phy-power and syscon-pcs in PCIe PHY node ARM: dts: dra7: Use ti,dra7x-usb2-phy2 compatible string for USB2 PHY2 ARM: dts: dra7: Use syscon-phy-power instead of ctrl-module in USB PHY node ARM: dts: am4372: Use syscon-phy-power instead of ctrl-module in USB PHY node ARM: dts: OMAP5: Use syscon-phy-power instead of ctrl-module in USB PHY node ARM: dts: OMAP5: Use syscon-phy-power instead of ctrl-module in SATA PHY node ARM: dts: omap4: Use syscon-phy-power instead of ctrl-module in USB PHY node ARM: dts: omap4: Use syscon-otghs instead of ctrl-module in USB node arch/arm/boot/dts/am4372.dtsi | 16 ++ arch/arm/boot/dts/dra7.dtsi | 69 ++--- arch/arm/boot/dts/omap4.dtsi | 16 ++ arch/arm/boot/dts/omap5.dtsi | 26 ++-- 4 files changed, 24 insertions(+), 103 deletions(-) -- 1.7.9.5 -- To unsubscribe from this list: send the line unsubscribe linux-omap in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
Re: [PATCH v3 2/3] ARM: dts: dra7: Add syscon-pllreset syscon to SATA PHY
On Tuesday 04 August 2015 02:11 PM, Tony Lindgren wrote: * Roger Quadros rog...@ti.com [150804 01:22]: Tony, On 17/07/15 16:47, Roger Quadros wrote: This register is required to be passed to the SATA PHY driver to workaround errata i783 (SATA Lockup After SATA DPLL Unlock/Relock). Signed-off-by: Roger Quadros rog...@ti.com Can you please Ack or pick this for -fixes. Kishon has already picked patch 1 in this series. Thanks. Best that Kishon takes both then: Acked-by: Tony Lindgren t...@atomide.com merged, thanks. -Kishon --- arch/arm/boot/dts/dra7.dtsi | 1 + 1 file changed, 1 insertion(+) diff --git a/arch/arm/boot/dts/dra7.dtsi b/arch/arm/boot/dts/dra7.dtsi index 8f1e25b..4a0718c 100644 --- a/arch/arm/boot/dts/dra7.dtsi +++ b/arch/arm/boot/dts/dra7.dtsi @@ -1140,6 +1140,7 @@ ctrl-module = omap_control_sata; clocks = sys_clkin1, sata_ref_clk; clock-names = sysclk, refclk; + syscon-pllreset = scm_conf 0x3fc; #phy-cells = 0; }; -- To unsubscribe from this list: send the line unsubscribe linux-omap in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
Re: [RFC PATCH 4/5] ARM: dts: DRA7: Add memory map region entries for qspi
On Mon, Aug 03, 2015 at 10:32:09AM +0530, Vignesh R wrote: On 07/31/2015 11:49 PM, Mark Brown wrote: - reg = 0x4790 0x100; + reg = 0x4790 0x100, +0x3000 0x3ff; + reg-names = qspi_base, qspi_mmap; The DT binding document for the controller needs to be extended to document this change in the binding. DT bindings are already documented at Documentation/devicetree/bindings/spi/ti_qspi.txt. Did you mean to add this node as an example in that file? No, I mean you're changing the binding to add this new memory region - that new region needs to be added to the documentation. signature.asc Description: Digital signature
Re: [RFC PATCH 1/5] spi: introduce flag for memory mapped read
Hello, On 4 August 2015 at 19:59, R, Vignesh vigne...@ti.com wrote: On 8/4/2015 9:21 PM, Mark Brown wrote: On Mon, Aug 03, 2015 at 10:27:19AM +0530, Vignesh R wrote: @use_mmap_mode: Some SPI controller chips are optimized for interacting with serial flash memories. These chips have memory mapped interface, through which entire serial flash memory slave can be read/written as if though they are physical memories (like RAM). Using this interface, flash can be accessed using memcpy() function and the spi controller hardware will take care of communicating with serial flash over SPI. Setting this flag will indicate the SPI controller driver that the spi_message is from mtd layer to read from/write to flash. The SPI master driver can then appropriately switch the controller to memory mapped interface to read from/write to flash, based on this flag (See drivers/spi/spi-ti-qspi.c for example). NOTE: If the SPI controller chip lacks memory mapped interface, then the driver will ignore this flag and use normal SPI protocol to read from/write to flash. Communication with non-flash SPI devices is not possible using the memory mapped interface. I still can't tell from the above what this interface is supposed to do. It sounds like the use of memory mapped mode is supposed to be transparent to users, it should just affect how the controller interacts with the hardware, but if that's the case why do we need to expose it to users at all? Shouldn't the driver just use memory mapped mode if it's faster? TI QSPI controller has two blocks: 1. SPI_CORE: This is generic(normal) spi mode. This can be used to communicate with any SPI devices (serial flashes as well as non-flash devices like touchscreen). 2. SFI_MM_IF(SPI memory mapped interface): The SFI_MM_IF block only allows reading and writing to an SPI flash device only. Used to speed up flash reads. It _cannot_ be used to communicate with non flash devices. Now, the spi_message that ti-qspi receives in transfer_one() callback can be from mtd device(in which case SFI_MM_IF can be used) or from any other non flash SPI device (in which case SFI_MM_IF must not be used instead SPI_CORE is to be used) but there is no way(is there?) to distinguish where spi_message is from. Therefore I introduced flag (use_mmap_mode) to struct spi_message. mtd driver will set flag to true, this helps the ti-qspi driver to determine that the user is flash device and thus can do read via SFI_MM_IF. If this flag is not set then the user is assumed to be non flash SPI driver and will use SPI_CORE block to communicate. On the whole, I just need a way to determine that the user is a flash device in order to switch to memory mapped interface. Maybe it can be set on the SPI slave rather than each message. Thanks Michal -- To unsubscribe from this list: send the line unsubscribe linux-omap in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
Re: [RFC PATCH 1/5] spi: introduce flag for memory mapped read
On 08/05/2015 10:51 AM, Michal Suchanek wrote: Hello, On 4 August 2015 at 19:59, R, Vignesh vigne...@ti.com wrote: On 8/4/2015 9:21 PM, Mark Brown wrote: On Mon, Aug 03, 2015 at 10:27:19AM +0530, Vignesh R wrote: @use_mmap_mode: Some SPI controller chips are optimized for interacting with serial flash memories. These chips have memory mapped interface, through which entire serial flash memory slave can be read/written as if though they are physical memories (like RAM). Using this interface, flash can be accessed using memcpy() function and the spi controller hardware will take care of communicating with serial flash over SPI. Setting this flag will indicate the SPI controller driver that the spi_message is from mtd layer to read from/write to flash. The SPI master driver can then appropriately switch the controller to memory mapped interface to read from/write to flash, based on this flag (See drivers/spi/spi-ti-qspi.c for example). NOTE: If the SPI controller chip lacks memory mapped interface, then the driver will ignore this flag and use normal SPI protocol to read from/write to flash. Communication with non-flash SPI devices is not possible using the memory mapped interface. I still can't tell from the above what this interface is supposed to do. It sounds like the use of memory mapped mode is supposed to be transparent to users, it should just affect how the controller interacts with the hardware, but if that's the case why do we need to expose it to users at all? Shouldn't the driver just use memory mapped mode if it's faster? TI QSPI controller has two blocks: 1. SPI_CORE: This is generic(normal) spi mode. This can be used to communicate with any SPI devices (serial flashes as well as non-flash devices like touchscreen). 2. SFI_MM_IF(SPI memory mapped interface): The SFI_MM_IF block only allows reading and writing to an SPI flash device only. Used to speed up flash reads. It _cannot_ be used to communicate with non flash devices. Now, the spi_message that ti-qspi receives in transfer_one() callback can be from mtd device(in which case SFI_MM_IF can be used) or from any other non flash SPI device (in which case SFI_MM_IF must not be used instead SPI_CORE is to be used) but there is no way(is there?) to distinguish where spi_message is from. Therefore I introduced flag (use_mmap_mode) to struct spi_message. mtd driver will set flag to true, this helps the ti-qspi driver to determine that the user is flash device and thus can do read via SFI_MM_IF. If this flag is not set then the user is assumed to be non flash SPI driver and will use SPI_CORE block to communicate. On the whole, I just need a way to determine that the user is a flash device in order to switch to memory mapped interface. Maybe it can be set on the SPI slave rather than each message. You mean to add flag to spi_device struct? That's ok for me. -- Regards Vignesh -- To unsubscribe from this list: send the line unsubscribe linux-omap in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
Re: [RFC PATCH 1/5] spi: introduce flag for memory mapped read
On 5 August 2015 at 07:35, Vignesh R vigne...@ti.com wrote: On 08/05/2015 10:51 AM, Michal Suchanek wrote: Hello, On 4 August 2015 at 19:59, R, Vignesh vigne...@ti.com wrote: On 8/4/2015 9:21 PM, Mark Brown wrote: On Mon, Aug 03, 2015 at 10:27:19AM +0530, Vignesh R wrote: TI QSPI controller has two blocks: 1. SPI_CORE: This is generic(normal) spi mode. This can be used to communicate with any SPI devices (serial flashes as well as non-flash devices like touchscreen). 2. SFI_MM_IF(SPI memory mapped interface): The SFI_MM_IF block only allows reading and writing to an SPI flash device only. Used to speed up flash reads. It _cannot_ be used to communicate with non flash devices. Now, the spi_message that ti-qspi receives in transfer_one() callback can be from mtd device(in which case SFI_MM_IF can be used) or from any other non flash SPI device (in which case SFI_MM_IF must not be used instead SPI_CORE is to be used) but there is no way(is there?) to distinguish where spi_message is from. Therefore I introduced flag (use_mmap_mode) to struct spi_message. mtd driver will set flag to true, this helps the ti-qspi driver to determine that the user is flash device and thus can do read via SFI_MM_IF. If this flag is not set then the user is assumed to be non flash SPI driver and will use SPI_CORE block to communicate. On the whole, I just need a way to determine that the user is a flash device in order to switch to memory mapped interface. Maybe it can be set on the SPI slave rather than each message. You mean to add flag to spi_device struct? That's ok for me. There are already mode flags so you can just add one more. Thanks Michal -- To unsubscribe from this list: send the line unsubscribe linux-omap in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
Re: [PATCH v5 07/46] usb: dwc3: gadget: add ep capabilities support
On Fri, Jul 31, 2015 at 04:00:19PM +0200, Robert Baldyga wrote:
Convert endpoint configuration to new capabilities model.
Signed-off-by: Robert Baldyga r.bald...@samsung.com
---
drivers/usb/dwc3/gadget.c | 13 +
1 file changed, 13 insertions(+)
diff --git a/drivers/usb/dwc3/gadget.c b/drivers/usb/dwc3/gadget.c
index 2feed9e..bd4c3db 100644
--- a/drivers/usb/dwc3/gadget.c
+++ b/drivers/usb/dwc3/gadget.c
@@ -1715,6 +1715,19 @@ static int dwc3_gadget_init_hw_endpoints(struct dwc3
*dwc,
return ret;
}
+ if (epnum == 0 || epnum == 1) {
+ dep-endpoint.caps.type_control = true;
+ } else {
+ dep-endpoint.caps.type_iso = true;
+ dep-endpoint.caps.type_bulk = true;
+ dep-endpoint.caps.type_int = true;
+ }
+
+ if (direction)
+ dep-endpoint.caps.dir_in = true;
+ else
+ dep-endpoint.caps.dir_out = true;
you can avoid the branch for the direction:
dep-endpoint.caps.dir_in = !!direction;
dep-endpoint.caps.dir_out = !direction;
--
balbi
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Re: [V3] [TWL4030 MADC] Fix ADC[3:6] readings
Hello Jonathan, thanks for your comment.
Just submitted V4 with corrections:
1. regulator configuration is now done before iio_device_register
2. devm_regulator_put has been removed as it is not necessary
Let me know!
Adam
On Sun, Aug 2, 2015 at 9:55 AM, Jonathan Cameron ji...@kernel.org wrote:
On 21/07/15 01:49, Adam YH Lee wrote:
MADC[3:6] reads incorrect values without these two following changes:
- enable the 3v1 bias regulator for ADC[3:6]
- configure ADC[3:6] lines as input, not as USB
Signed-off-by: Adam YH Lee adam.yh@gmail.com
---
drivers/iio/adc/twl4030-madc.c | 36
1 file changed, 36 insertions(+)
diff --git a/drivers/iio/adc/twl4030-madc.c b/drivers/iio/adc/twl4030-madc.c
index 94c5f05..ae33eba 100644
--- a/drivers/iio/adc/twl4030-madc.c
+++ b/drivers/iio/adc/twl4030-madc.c
@@ -45,13 +45,18 @@
#include linux/types.h
#include linux/gfp.h
#include linux/err.h
+#include linux/regulator/consumer.h
#include linux/iio/iio.h
+#define TWL4030_USB_SEL_MADC_MCPC(13)
+#define TWL4030_USB_CARKIT_ANA_CTRL 0xBB
+
/**
* struct twl4030_madc_data - a container for madc info
* @dev: Pointer to device structure for madc
* @lock:Mutex protecting this data structure
+ * @regulator: Pointer to bias regulator for madc
* @requests:Array of request struct corresponding to SW1,
SW2 and RT
* @use_second_irq: IRQ selection (main or co-processor)
* @imr: Interrupt mask register of MADC
@@ -60,6 +65,7 @@
struct twl4030_madc_data {
struct device *dev;
struct mutex lock; /* mutex protecting this data structure */
+ struct regulator *usb3v1;
struct twl4030_madc_request requests[TWL4030_MADC_NUM_METHODS];
bool use_second_irq;
u8 imr;
@@ -848,6 +854,33 @@ static int twl4030_madc_probe(struct platform_device
*pdev)
goto err_i2c;
}
At this point in the driver the userspace (an in kernel) interfaces to read
from the device are exposed. Thus if you need this stuff set up right, it
wants to be done before the iio_device_register call.
+ /* Configure MADC[3:6] */
+ ret = twl_i2c_read_u8(TWL_MODULE_USB, regval,
+ TWL4030_USB_CARKIT_ANA_CTRL);
+ if (ret) {
+ dev_err(pdev-dev, unable to read reg CARKIT_ANA_CTRL
0x%X\n,
+ TWL4030_USB_CARKIT_ANA_CTRL);
+ goto err_i2c;
+ }
+ regval |= TWL4030_USB_SEL_MADC_MCPC;
+ ret = twl_i2c_write_u8(TWL_MODULE_USB, regval,
+ TWL4030_USB_CARKIT_ANA_CTRL);
+ if (ret) {
+ dev_err(pdev-dev, unable to write reg CARKIT_ANA_CTRL
0x%X\n,
+ TWL4030_USB_CARKIT_ANA_CTRL);
+ goto err_i2c;
+ }
+
+
+ /* Enable 3v1 bias regulator for MADC[3:6] */
+ madc-usb3v1 = devm_regulator_get(madc-dev, vusb3v1);
+ if (IS_ERR(madc-usb3v1))
+ return -ENODEV;
+
+ ret = regulator_enable(madc-usb3v1);
+ if (ret)
+ dev_err(madc-dev, could not enable 3v1 bias regulator\n);
+
return 0;
err_i2c:
@@ -867,6 +900,9 @@ static int twl4030_madc_remove(struct platform_device
*pdev)
twl4030_madc_set_current_generator(madc, 0, 0);
twl4030_madc_set_power(madc, 0);
+ regulator_disable(madc-usb3v1);
+ devm_regulator_put(madc-usb3v1);
The whole point of devm_ allocators (or in this case _gets) is that when
the driver is removed they are cleaned up automatically. Hence you don't
need them in your remove call. Obviously it also clears up the error
handling in probe as well.
+
return 0;
}
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[V4] [TWL4030 MADC] Fix ADC[3:6] readings
MADC[3:6] reads incorrect values without these two following changes:
- enable the 3v1 bias regulator for ADC[3:6]
- configure ADC[3:6] lines as input, not as USB
Signed-off-by: Adam YH Lee adam.yh@gmail.com
---
drivers/iio/adc/twl4030-madc.c | 34 ++
1 file changed, 34 insertions(+)
diff --git a/drivers/iio/adc/twl4030-madc.c b/drivers/iio/adc/twl4030-madc.c
index 94c5f05..8c58498 100644
--- a/drivers/iio/adc/twl4030-madc.c
+++ b/drivers/iio/adc/twl4030-madc.c
@@ -45,13 +45,18 @@
#include linux/types.h
#include linux/gfp.h
#include linux/err.h
+#include linux/regulator/consumer.h
#include linux/iio/iio.h
+#define TWL4030_USB_SEL_MADC_MCPC (13)
+#define TWL4030_USB_CARKIT_ANA_CTRL0xBB
+
/**
* struct twl4030_madc_data - a container for madc info
* @dev: Pointer to device structure for madc
* @lock: Mutex protecting this data structure
+ * @regulator: Pointer to bias regulator for madc
* @requests: Array of request struct corresponding to SW1, SW2 and RT
* @use_second_irq:IRQ selection (main or co-processor)
* @imr: Interrupt mask register of MADC
@@ -60,6 +65,7 @@
struct twl4030_madc_data {
struct device *dev;
struct mutex lock; /* mutex protecting this data structure */
+ struct regulator *usb3v1;
struct twl4030_madc_request requests[TWL4030_MADC_NUM_METHODS];
bool use_second_irq;
u8 imr;
@@ -842,6 +848,32 @@ static int twl4030_madc_probe(struct platform_device *pdev)
}
twl4030_madc = madc;
+ /* Configure MADC[3:6] */
+ ret = twl_i2c_read_u8(TWL_MODULE_USB, regval,
+ TWL4030_USB_CARKIT_ANA_CTRL);
+ if (ret) {
+ dev_err(pdev-dev, unable to read reg CARKIT_ANA_CTRL
0x%X\n,
+ TWL4030_USB_CARKIT_ANA_CTRL);
+ goto err_i2c;
+ }
+ regval |= TWL4030_USB_SEL_MADC_MCPC;
+ ret = twl_i2c_write_u8(TWL_MODULE_USB, regval,
+TWL4030_USB_CARKIT_ANA_CTRL);
+ if (ret) {
+ dev_err(pdev-dev, unable to write reg CARKIT_ANA_CTRL
0x%X\n,
+ TWL4030_USB_CARKIT_ANA_CTRL);
+ goto err_i2c;
+ }
+
+ /* Enable 3v1 bias regulator for MADC[3:6] */
+ madc-usb3v1 = devm_regulator_get(madc-dev, vusb3v1);
+ if (IS_ERR(madc-usb3v1))
+ return -ENODEV;
+
+ ret = regulator_enable(madc-usb3v1);
+ if (ret)
+ dev_err(madc-dev, could not enable 3v1 bias regulator\n);
+
ret = iio_device_register(iio_dev);
if (ret) {
dev_err(pdev-dev, could not register iio device\n);
@@ -867,6 +899,8 @@ static int twl4030_madc_remove(struct platform_device *pdev)
twl4030_madc_set_current_generator(madc, 0, 0);
twl4030_madc_set_power(madc, 0);
+ regulator_disable(madc-usb3v1);
+
return 0;
}
--
2.1.4
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[V4] [TWL4030 MADC] Correction and clean-up
The V4 of this patch addresses issues raised by Jonathan [1]. iio_device_register call should be the last call in the probe. All regulators should be configured before that call. Remove devm_regulator_put as it is not necessary. devm_allocators (devm_regulator_get, in this case) does device removal as well as error handling. [1] http://www.spinics.net/lists/linux-omap/msg120871.html Adam YH Lee (1): [TWL4030 MADC] Fix ADC[3:6] readings drivers/iio/adc/twl4030-madc.c | 34 ++ 1 file changed, 34 insertions(+) -- 2.1.4 -- To unsubscribe from this list: send the line unsubscribe linux-omap in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
Re: [RFC PATCH 1/5] spi: introduce flag for memory mapped read
On 8/4/2015 9:21 PM, Mark Brown wrote: On Mon, Aug 03, 2015 at 10:27:19AM +0530, Vignesh R wrote: @use_mmap_mode: Some SPI controller chips are optimized for interacting with serial flash memories. These chips have memory mapped interface, through which entire serial flash memory slave can be read/written as if though they are physical memories (like RAM). Using this interface, flash can be accessed using memcpy() function and the spi controller hardware will take care of communicating with serial flash over SPI. Setting this flag will indicate the SPI controller driver that the spi_message is from mtd layer to read from/write to flash. The SPI master driver can then appropriately switch the controller to memory mapped interface to read from/write to flash, based on this flag (See drivers/spi/spi-ti-qspi.c for example). NOTE: If the SPI controller chip lacks memory mapped interface, then the driver will ignore this flag and use normal SPI protocol to read from/write to flash. Communication with non-flash SPI devices is not possible using the memory mapped interface. I still can't tell from the above what this interface is supposed to do. It sounds like the use of memory mapped mode is supposed to be transparent to users, it should just affect how the controller interacts with the hardware, but if that's the case why do we need to expose it to users at all? Shouldn't the driver just use memory mapped mode if it's faster? TI QSPI controller has two blocks: 1. SPI_CORE: This is generic(normal) spi mode. This can be used to communicate with any SPI devices (serial flashes as well as non-flash devices like touchscreen). 2. SFI_MM_IF(SPI memory mapped interface): The SFI_MM_IF block only allows reading and writing to an SPI flash device only. Used to speed up flash reads. It _cannot_ be used to communicate with non flash devices. Now, the spi_message that ti-qspi receives in transfer_one() callback can be from mtd device(in which case SFI_MM_IF can be used) or from any other non flash SPI device (in which case SFI_MM_IF must not be used instead SPI_CORE is to be used) but there is no way(is there?) to distinguish where spi_message is from. Therefore I introduced flag (use_mmap_mode) to struct spi_message. mtd driver will set flag to true, this helps the ti-qspi driver to determine that the user is flash device and thus can do read via SFI_MM_IF. If this flag is not set then the user is assumed to be non flash SPI driver and will use SPI_CORE block to communicate. On the whole, I just need a way to determine that the user is a flash device in order to switch to memory mapped interface. Regards Vignesh -- To unsubscribe from this list: send the line unsubscribe linux-omap in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
Re: [PATCH v5 40/46] usb: gadget: epautoconf: rework ep_matches() function
On Fri, Jul 31, 2015 at 04:00:52PM +0200, Robert Baldyga wrote: Rework ep_matches() function to make it shorter and more readable. Signed-off-by: Robert Baldyga r.bald...@samsung.com this regresses at least mass storage. How did you test it ? I'll keep all patches up to this one, please fix the problem, rebase on testing/next and resend the remaining patches. cheers -- balbi signature.asc Description: Digital signature
Re: [PATCH v5 00/46] usb: gadget: rework ep matching and claiming mechanism
Hi, On Fri, Jul 31, 2015 at 04:00:12PM +0200, Robert Baldyga wrote: Hello, This patch series reworks endpoint matching and claiming mechanism in epautoconf. From v2 there are couple of new patches adding 'ep_match' to usb_gadget_ops and removing chip-specific quirk handling from generic code of autoconfig. I'm not sure if this patch set isn't too long, as it has 46 patches, but I decided to send it as single series to avoid problems with patch applying order. The aim of whole patchset is to rework epautoconf code to get rid of things like name-based endpoint matching and UDC name-based quirks in generic code. These needed to do some modifications in framework like adding 'endpoint capabilities flags' feature or adding 'match_ep'. Following paragraphs contain brief description of what modifications are done by particular parts of this patch set: Patch (1) introduces new safer endpoint claiming method, basing on new 'claimed' flag. It was discussed here [1]. I proposed this solution over year ago and it was accepted, but I apparently forgot to send the final version of my patch. Patches (2-3) add the 'capabilities flags' structure and helper macros. This solution is inspired by the 'feature flags' originally proposed by Felipe Balbi in 2013 [2], but unfortunately implementation of this feature has never been completed. Patches (4-36) add' capabilites flags' support to all UDC drivers present in the kernel tree. It's needed to be done before replacing old endpoint matching mechanism, otherwise UDC drivers which doesn't set 'capabilities flags' won't work with new matching function. Patch (37) finally replaces old endpoint matching method with the new one basing on capabilities flags. These changes aims to get rid of code, which guesses endpoint capabilities basing on it's name, and introduce new better replacement. In result we have better way to describe types and directions supported by each endpoint. For example the old name-based method didn't allow to have endpoint supporing two types of transfers - there were only ability to support one or all of endpoint types. The 'capabilities flags' feature supply precise, flexible and extensible mechanism of description of endpoint hardware limitations, which is desired for proper endpoint matching. Patch (38) removes chip-specific quirk from ep_matches() function. Patches (39-40) remove code modifying endpoint and descriptor structures from ep_matches() function and cleans it up to make it simpler and more readable. Patch (41) add 'match_ep' callback to usb_gadget_ops and make use of it in epautoconf. This callback allows UDC drivers to supply non-standard endpoint matching algorithms. Patches (42-43) move ep_matches() and find_ep() functions outside epautoconf and rename them to usb_gadget_ep_match_desc() and gadget_find_ep_by_name(). It's because they may be useful in 'match_ep' callbacks in UDC drivers to avoid writing repetitive code. Patches (44-46) move chip-specific enpoint matching algorithms from generic code of usb_ep_autoconfig_ss() function to UDC controller drivers using 'match_ep' callback. In the result we have epautoconf source free of chip-specific code, plus two new mechanisms allowing to handle non-standard hardware limitations. [1] https://lkml.org/lkml/2014/6/16/94 [2] http://www.spinics.net/lists/linux-usb/msg99662.html adding these to my testing/next after fixing a few build warnings and the comment I had on dwc3 patch. Let's hope it just works :-) -- balbi signature.asc Description: Digital signature
[PATCH 1/7] ARM: dts: omap3-devkit8000: Add user button support
This patch links the user button to the BTN_EXTRA action.
---
arch/arm/boot/dts/omap3-devkit8000.dts | 13 +
1 file changed, 13 insertions(+)
diff --git a/arch/arm/boot/dts/omap3-devkit8000.dts
b/arch/arm/boot/dts/omap3-devkit8000.dts
index 2af54cb..07b0f5a 100644
--- a/arch/arm/boot/dts/omap3-devkit8000.dts
+++ b/arch/arm/boot/dts/omap3-devkit8000.dts
@@ -7,6 +7,8 @@
*/
/dts-v1/;
+#include dt-bindings/input/input.h
+
#include omap34xx.dtsi
/ {
model = TimLL OMAP3 Devkit8000;
@@ -55,6 +57,17 @@
MAINMIC, Main Mic,
Main Mic, Mic Bias 1;
};
+
+ gpio_keys {
+ compatible = gpio-keys;
+
+ user {
+ label = user;
+ gpios = gpio1 26 GPIO_ACTIVE_HIGH;
+ linux,code = BTN_EXTRA;
+ gpio-key,wakeup;
+ };
+ };
};
i2c1 {
--
2.4.6
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[PATCH 0/7] Convert devkit8000 board file to device tree
This serie converts some structures and informations from devkit8000's board file to the device tree format. One patch per feature. Anthoine Bourgeois (7): ARM: dts: omap3-devkit8000: Add user button support ARM: dts: omap3-devkit8000: Add PMU stat support ARM: dts: omap3-devkit8000: Add keymap support ARM: dts: omap3-devkit8000: Add S-video output support ARM: dts: omap3-devkit8000: Add DSS' DVI support ARM: dts: omap3-devkit8000: add LCD panels ARM: dts: omap3-devkit8000: Add ADS7846 Touchscreen support arch/arm/boot/dts/Makefile | 2 + arch/arm/boot/dts/omap3-devkit8000-common.dtsi | 375 + arch/arm/boot/dts/omap3-devkit8000-lcd-common.dtsi | 73 arch/arm/boot/dts/omap3-devkit8000-lcd43.dts | 37 ++ arch/arm/boot/dts/omap3-devkit8000-lcd70.dts | 37 ++ arch/arm/boot/dts/omap3-devkit8000.dts | 192 +-- 6 files changed, 529 insertions(+), 187 deletions(-) create mode 100644 arch/arm/boot/dts/omap3-devkit8000-common.dtsi create mode 100644 arch/arm/boot/dts/omap3-devkit8000-lcd-common.dtsi create mode 100644 arch/arm/boot/dts/omap3-devkit8000-lcd43.dts create mode 100644 arch/arm/boot/dts/omap3-devkit8000-lcd70.dts -- 2.4.6 -- To unsubscribe from this list: send the line unsubscribe linux-omap in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
Regarding unused cross trigger interface omap4 helpers in mainline
Hi, I stumbled upon these upstream helpers while sorting out a merge conflict and after looking around a bit, it turned out that these CTI helpers have no users in mainline tree at all. Introduced in commit 14eec97ff463 arm: introduce cross trigger interface helpers, these CTI helpers were intended to be used by OMAP4 to route performance monitor irq to GIC. After scanning few git logs, I run into few commits like [1][2] and comments in arch/arm/mach-omap2/pmu.c which suggested that CTI driver for OMAP4430 was never implemented or never submitted upstream(may be?). I was just wondering if it make sense to send out a cleanup patch upstream to remove these unused CTI helpers, if there is no activity planned around it. Let me know your take on this. Regards, Amit Pundir [1] eeb7ba21ab7e (ARM: OMAP2+: Prepare for device-tree PMU support) [2] efc7f49c87b7 (ARM: OMAP4430: PMU: prepare to create PMU device via HWMOD) -- To unsubscribe from this list: send the line unsubscribe linux-omap in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
Re: [PATCH v2 3/3] soc: ti: Add wkup_m3_ipc driver
On 07/20/2015 01:16 AM, Tony Lindgren wrote: * Dave Gerlach d-gerl...@ti.com [150717 13:59]: + +/* Public functions */ ... +EXPORT_SYMBOL_GPL(wkup_m3_set_mem_type); +EXPORT_SYMBOL_GPL(wkup_m3_set_resume_address); +EXPORT_SYMBOL_GPL(wkup_m3_request_pm_status); +EXPORT_SYMBOL_GPL(wkup_m3_prepare_low_power); +EXPORT_SYMBOL_GPL(wkup_m3_finish_low_power); I think you can avoid exporting these SoC specific functions by just exporting wkup_m3_request() and wkup_m3_free() type functions with a data structure containing the necessary function pointers. Ok thanks for the comment, I can try that change out, I agree it probably isn't necessary to export so much. Regards, Dave Regards, Tony -- To unsubscribe from this list: send the line unsubscribe linux-omap in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
[PATCH 2/7] ARM: dts: omap3-devkit8000: Add PMU stat support
This patch declares the LEDB usage to the PMU stat monitor.
---
arch/arm/boot/dts/omap3-devkit8000.dts | 16 +++-
1 file changed, 15 insertions(+), 1 deletion(-)
diff --git a/arch/arm/boot/dts/omap3-devkit8000.dts
b/arch/arm/boot/dts/omap3-devkit8000.dts
index 07b0f5a..96c7020 100644
--- a/arch/arm/boot/dts/omap3-devkit8000.dts
+++ b/arch/arm/boot/dts/omap3-devkit8000.dts
@@ -41,8 +41,12 @@
gpios = gpio6 4 GPIO_ACTIVE_HIGH;/* 164 - LED3
*/
default-state = on;
linux,default-trigger = usr;
-};
+ };
+ pmu_stat {
+ label = devkit8000::pmu_stat;
+ gpios = twl_gpio 19 GPIO_ACTIVE_HIGH; /* LEDB */
+ };
};
sound {
@@ -110,6 +114,16 @@
status = disabled;
};
+twl_gpio {
+ ti,use-leds;
+ /*
+* pulldowns:
+* BIT(1), BIT(2), BIT(6), BIT(7), BIT(8), BIT(13)
+* BIT(15), BIT(16), BIT(17)
+*/
+ ti,pulldowns = 0x03a1c6;
+};
+
wdt2 {
status = disabled;
};
--
2.4.6
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[PATCH 6/7] ARM: dts: omap3-devkit8000: add LCD panels
Devkit8000 was sold with a 4.3 LCD or 7.0 or without. This patch
creates one dts file per bundle.
---
arch/arm/boot/dts/Makefile | 2 +
arch/arm/boot/dts/omap3-devkit8000-common.dtsi | 370 +
arch/arm/boot/dts/omap3-devkit8000-lcd-common.dtsi | 38 +++
arch/arm/boot/dts/omap3-devkit8000-lcd43.dts | 37 +++
arch/arm/boot/dts/omap3-devkit8000-lcd70.dts | 37 +++
arch/arm/boot/dts/omap3-devkit8000.dts | 365 +---
6 files changed, 489 insertions(+), 360 deletions(-)
create mode 100644 arch/arm/boot/dts/omap3-devkit8000-common.dtsi
create mode 100644 arch/arm/boot/dts/omap3-devkit8000-lcd-common.dtsi
create mode 100644 arch/arm/boot/dts/omap3-devkit8000-lcd43.dts
create mode 100644 arch/arm/boot/dts/omap3-devkit8000-lcd70.dts
diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile
index a1c776b..cea90f7 100644
--- a/arch/arm/boot/dts/Makefile
+++ b/arch/arm/boot/dts/Makefile
@@ -358,6 +358,8 @@ dtb-$(CONFIG_ARCH_OMAP3) += \
omap3-cm-t3530.dtb \
omap3-cm-t3730.dtb \
omap3-devkit8000.dtb \
+ omap3-devkit8000-lcd43.dtb \
+ omap3-devkit8000-lcd70.dtb \
omap3-evm.dtb \
omap3-evm-37xx.dtb \
omap3-gta04a3.dtb \
diff --git a/arch/arm/boot/dts/omap3-devkit8000-common.dtsi
b/arch/arm/boot/dts/omap3-devkit8000-common.dtsi
new file mode 100644
index 000..cf3667c
--- /dev/null
+++ b/arch/arm/boot/dts/omap3-devkit8000-common.dtsi
@@ -0,0 +1,370 @@
+/*
+ * Author: Anil Kumar anilk...@gmail.com
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+
+#include dt-bindings/input/input.h
+
+#include omap34xx.dtsi
+/ {
+ memory {
+ device_type = memory;
+ reg = 0x8000 0x1000; /* 256 MB */
+ };
+
+ leds {
+ compatible = gpio-leds;
+
+ heartbeat {
+ label = devkit8000::led1;
+ gpios = gpio6 26 GPIO_ACTIVE_HIGH; /* 186 - LED1
*/
+ default-state = on;
+ linux,default-trigger = heartbeat;
+ };
+
+ mmc {
+ label = devkit8000::led2;
+ gpios = gpio6 3 GPIO_ACTIVE_HIGH;/* 163 - LED2
*/
+ default-state = on;
+ linux,default-trigger = none;
+ };
+
+ usr {
+ label = devkit8000::led3;
+ gpios = gpio6 4 GPIO_ACTIVE_HIGH;/* 164 - LED3
*/
+ default-state = on;
+ linux,default-trigger = usr;
+ };
+
+ pmu_stat {
+ label = devkit8000::pmu_stat;
+ gpios = twl_gpio 19 GPIO_ACTIVE_HIGH; /* LEDB */
+ };
+ };
+
+ sound {
+ compatible = ti,omap-twl4030;
+ ti,model = devkit8000;
+
+ ti,mcbsp = mcbsp2;
+ ti,codec = twl_audio;
+ ti,audio-routing =
+ Ext Spk, PREDRIVEL,
+ Ext Spk, PREDRIVER,
+ MAINMIC, Main Mic,
+ Main Mic, Mic Bias 1;
+ };
+
+ gpio_keys {
+ compatible = gpio-keys;
+
+ user {
+ label = user;
+ gpios = gpio1 26 GPIO_ACTIVE_HIGH;
+ linux,code = BTN_EXTRA;
+ gpio-key,wakeup;
+ };
+ };
+
+ tfp410: encoder@0 {
+ compatible = ti,tfp410;
+ powerdown-gpios = twl_gpio 7 GPIO_ACTIVE_LOW;
+
+ ports {
+ #address-cells = 1;
+ #size-cells = 0;
+
+ port@0 {
+ reg = 0;
+
+ tfp410_in: endpoint@0 {
+ remote-endpoint = dpi_dvi_out;
+ };
+ };
+
+ port@1 {
+ reg = 1;
+
+ tfp410_out: endpoint@0 {
+ remote-endpoint = dvi_connector_in;
+ };
+ };
+ };
+ };
+
+ dvi0: connector@0 {
+ compatible = dvi-connector;
+ label = dvi;
+
+ digital;
+
+ ddc-i2c-bus = i2c2;
+
+ port {
+ dvi_connector_in: endpoint {
+ remote-endpoint = tfp410_out;
+ };
+ };
+ };
+
+ tv0: connector@1 {
+ compatible = svideo-connector;
+
[PATCH 4/7] ARM: dts: omap3-devkit8000: Add S-video output support
This commit adds the support of TV output on the devkit8000 board.
---
arch/arm/boot/dts/omap3-devkit8000.dts | 24
1 file changed, 24 insertions(+)
diff --git a/arch/arm/boot/dts/omap3-devkit8000.dts
b/arch/arm/boot/dts/omap3-devkit8000.dts
index 980e3b8..9d0c438 100644
--- a/arch/arm/boot/dts/omap3-devkit8000.dts
+++ b/arch/arm/boot/dts/omap3-devkit8000.dts
@@ -72,6 +72,17 @@
gpio-key,wakeup;
};
};
+
+ tv0: connector@1 {
+ compatible = svideo-connector;
+ label = tv;
+
+ port {
+ tv_connector_in: endpoint {
+ remote-endpoint = venc_out;
+ };
+ };
+ };
};
i2c1 {
@@ -247,3 +258,16 @@
gpmc,wr-access-ns = 0;
};
};
+
+venc {
+ status = ok;
+
+ vdda-supply = vdac;
+
+ port {
+ venc_out: endpoint {
+ remote-endpoint = tv_connector_in;
+ ti,channels = 2;
+ };
+ };
+};
--
2.4.6
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[PATCH 3/7] ARM: dts: omap3-devkit8000: Add keymap support
The keymap is convert in devicetree from the legacy board file.
---
arch/arm/boot/dts/omap3-devkit8000.dts | 21 +
1 file changed, 21 insertions(+)
diff --git a/arch/arm/boot/dts/omap3-devkit8000.dts
b/arch/arm/boot/dts/omap3-devkit8000.dts
index 96c7020..980e3b8 100644
--- a/arch/arm/boot/dts/omap3-devkit8000.dts
+++ b/arch/arm/boot/dts/omap3-devkit8000.dts
@@ -124,6 +124,27 @@
ti,pulldowns = 0x03a1c6;
};
+twl_keypad {
+ linux,keymap = MATRIX_KEY(0, 0, KEY_1)
+ MATRIX_KEY(1, 0, KEY_2)
+ MATRIX_KEY(2, 0, KEY_3)
+ MATRIX_KEY(0, 1, KEY_4)
+ MATRIX_KEY(1, 1, KEY_5)
+ MATRIX_KEY(2, 1, KEY_6)
+ MATRIX_KEY(3, 1, KEY_F5)
+ MATRIX_KEY(0, 2, KEY_7)
+ MATRIX_KEY(1, 2, KEY_8)
+ MATRIX_KEY(2, 2, KEY_9)
+ MATRIX_KEY(3, 2, KEY_F6)
+ MATRIX_KEY(0, 3, KEY_F7)
+ MATRIX_KEY(1, 3, KEY_0)
+ MATRIX_KEY(2, 3, KEY_F8)
+ MATRIX_KEY(4, 5, KEY_RESERVED)
+ MATRIX_KEY(4, 4, KEY_VOLUMEUP)
+ MATRIX_KEY(5, 5, KEY_VOLUMEDOWN)
+ ;
+};
+
wdt2 {
status = disabled;
};
--
2.4.6
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[PATCH 5/7] ARM: dts: omap3-devkit8000: Add DSS' DVI support
This commit adds the support of DVI output on the devkit8000 board.
---
arch/arm/boot/dts/omap3-devkit8000.dts | 103 -
1 file changed, 102 insertions(+), 1 deletion(-)
diff --git a/arch/arm/boot/dts/omap3-devkit8000.dts
b/arch/arm/boot/dts/omap3-devkit8000.dts
index 9d0c438..18abb19 100644
--- a/arch/arm/boot/dts/omap3-devkit8000.dts
+++ b/arch/arm/boot/dts/omap3-devkit8000.dts
@@ -73,6 +73,47 @@
};
};
+ tfp410: encoder@0 {
+ compatible = ti,tfp410;
+ powerdown-gpios = twl_gpio 7 GPIO_ACTIVE_LOW;
+
+ ports {
+ #address-cells = 1;
+ #size-cells = 0;
+
+ port@0 {
+ reg = 0;
+
+ tfp410_in: endpoint@0 {
+ remote-endpoint = dpi_dvi_out;
+ };
+ };
+
+ port@1 {
+ reg = 1;
+
+ tfp410_out: endpoint@0 {
+ remote-endpoint = dvi_connector_in;
+ };
+ };
+ };
+ };
+
+ dvi0: connector@0 {
+ compatible = dvi-connector;
+ label = dvi;
+
+ digital;
+
+ ddc-i2c-bus = i2c2;
+
+ port {
+ dvi_connector_in: endpoint {
+ remote-endpoint = tfp410_out;
+ };
+ };
+ };
+
tv0: connector@1 {
compatible = svideo-connector;
label = tv;
@@ -101,7 +142,7 @@
};
i2c2 {
- status = disabled;
+ clock-frequency = 40;
};
i2c3 {
@@ -259,6 +300,66 @@
};
};
+omap3_pmx_core {
+ dss_dpi_pins: pinmux_dss_dpi_pins {
+ pinctrl-single,pins =
+ OMAP3_CORE1_IOPAD(0x20d4, PIN_OUTPUT | MUX_MODE0)
/* dss_pclk.dss_pclk */
+ OMAP3_CORE1_IOPAD(0x20d6, PIN_OUTPUT | MUX_MODE0)
/* dss_hsync.dss_hsync */
+ OMAP3_CORE1_IOPAD(0x20d8, PIN_OUTPUT | MUX_MODE0)
/* dss_vsync.dss_vsync */
+ OMAP3_CORE1_IOPAD(0x20da, PIN_OUTPUT | MUX_MODE0)
/* dss_acbias.dss_acbias */
+ OMAP3_CORE1_IOPAD(0x20dc, PIN_OUTPUT | MUX_MODE0)
/* dss_data0.dss_data0 */
+ OMAP3_CORE1_IOPAD(0x20de, PIN_OUTPUT | MUX_MODE0)
/* dss_data1.dss_data1 */
+ OMAP3_CORE1_IOPAD(0x20e0, PIN_OUTPUT | MUX_MODE0)
/* dss_data2.dss_data2 */
+ OMAP3_CORE1_IOPAD(0x20e2, PIN_OUTPUT | MUX_MODE0)
/* dss_data3.dss_data3 */
+ OMAP3_CORE1_IOPAD(0x20e4, PIN_OUTPUT | MUX_MODE0)
/* dss_data4.dss_data4 */
+ OMAP3_CORE1_IOPAD(0x20e6, PIN_OUTPUT | MUX_MODE0)
/* dss_data5.dss_data5 */
+ OMAP3_CORE1_IOPAD(0x20e8, PIN_OUTPUT | MUX_MODE0)
/* dss_data6.dss_data6 */
+ OMAP3_CORE1_IOPAD(0x20ea, PIN_OUTPUT | MUX_MODE0)
/* dss_data7.dss_data7 */
+ OMAP3_CORE1_IOPAD(0x20ec, PIN_OUTPUT | MUX_MODE0)
/* dss_data8.dss_data8 */
+ OMAP3_CORE1_IOPAD(0x20ee, PIN_OUTPUT | MUX_MODE0)
/* dss_data9.dss_data9 */
+ OMAP3_CORE1_IOPAD(0x20f0, PIN_OUTPUT | MUX_MODE0)
/* dss_data10.dss_data10 */
+ OMAP3_CORE1_IOPAD(0x20f2, PIN_OUTPUT | MUX_MODE0)
/* dss_data11.dss_data11 */
+ OMAP3_CORE1_IOPAD(0x20f4, PIN_OUTPUT | MUX_MODE0)
/* dss_data12.dss_data12 */
+ OMAP3_CORE1_IOPAD(0x20f6, PIN_OUTPUT | MUX_MODE0)
/* dss_data13.dss_data13 */
+ OMAP3_CORE1_IOPAD(0x20f8, PIN_OUTPUT | MUX_MODE0)
/* dss_data14.dss_data14 */
+ OMAP3_CORE1_IOPAD(0x20fa, PIN_OUTPUT | MUX_MODE0)
/* dss_data15.dss_data15 */
+ OMAP3_CORE1_IOPAD(0x20fc, PIN_OUTPUT | MUX_MODE0)
/* dss_data16.dss_data16 */
+ OMAP3_CORE1_IOPAD(0x20fe, PIN_OUTPUT | MUX_MODE0)
/* dss_data17.dss_data17 */
+ OMAP3_CORE1_IOPAD(0x2100, PIN_OUTPUT | MUX_MODE0)
/* dss_data18.dss_data18 */
+ OMAP3_CORE1_IOPAD(0x2102, PIN_OUTPUT | MUX_MODE0)
/* dss_data19.dss_data19 */
+ OMAP3_CORE1_IOPAD(0x2104, PIN_OUTPUT | MUX_MODE0)
/* dss_data20.dss_data20 */
+ OMAP3_CORE1_IOPAD(0x2106, PIN_OUTPUT | MUX_MODE0)
/* dss_data21.dss_data21 */
+ OMAP3_CORE1_IOPAD(0x2108, PIN_OUTPUT | MUX_MODE0)
/* dss_data22.dss_data22 */
+ OMAP3_CORE1_IOPAD(0x210a, PIN_OUTPUT | MUX_MODE0)
/*
[PATCH 7/7] ARM: dts: omap3-devkit8000: Add ADS7846 Touchscreen support
This patch is the touchscreen part for LCD screens sold with devkit8000
board.
---
arch/arm/boot/dts/omap3-devkit8000-lcd-common.dtsi | 35 ++
1 file changed, 35 insertions(+)
diff --git a/arch/arm/boot/dts/omap3-devkit8000-lcd-common.dtsi
b/arch/arm/boot/dts/omap3-devkit8000-lcd-common.dtsi
index 332766d..e84184d 100644
--- a/arch/arm/boot/dts/omap3-devkit8000-lcd-common.dtsi
+++ b/arch/arm/boot/dts/omap3-devkit8000-lcd-common.dtsi
@@ -36,3 +36,38 @@
};
};
};
+
+vio {
+ regulator-min-microvolt = 180;
+ regulator-max-microvolt = 180;
+};
+
+mcspi2 {
+
+ /* touch controller */
+ ads7846@0 {
+ compatible = ti,ads7846;
+ vcc-supply = vio;
+
+ reg = 0; /* CS0 */
+ spi-max-frequency = 150;
+
+ interrupt-parent = gpio1;
+ interrupts = 27 0;/* gpio_27 */
+ pendown-gpio = gpio1 27 0;
+
+ ti,x-min = /bits/ 16 0x0;
+ ti,x-max = /bits/ 16 0x0fff;
+ ti,y-min = /bits/ 16 0x0;
+ ti,y-max = /bits/ 16 0x0fff;
+ ti,x-plate-ohms = /bits/ 16 180;
+ ti,pressure-max = /bits/ 16 255;
+ ti,debounce-max = /bits/ 16 10;
+ ti,debounce-tol = /bits/ 16 5;
+ ti,debounce-rep = /bits/ 16 1;
+ ti,keep-vref-on = 1;
+ ti,settle-delay-usec = /bits/ 16 150;
+
+ linux,wakeup;
+ };
+};
--
2.4.6
--
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Re: [PATCH] usb: musb: omap2430: use *syscon* framework API to write to mailbox register
Hi,
On Tue, Aug 04, 2015 at 07:36:09PM +0530, Kishon Vijay Abraham I wrote:
Deprecate using phy-omap-control driver to write to the mailbox register
and start using *syscon* framework to do the same.
Signed-off-by: Kishon Vijay Abraham I kis...@ti.com
---
Documentation/devicetree/bindings/usb/omap-usb.txt |7 +-
drivers/usb/musb/omap2430.c| 115
2 files changed, 99 insertions(+), 23 deletions(-)
diff --git a/Documentation/devicetree/bindings/usb/omap-usb.txt
b/Documentation/devicetree/bindings/usb/omap-usb.txt
index 38d9bb8..c001306 100644
--- a/Documentation/devicetree/bindings/usb/omap-usb.txt
+++ b/Documentation/devicetree/bindings/usb/omap-usb.txt
@@ -20,10 +20,15 @@ OMAP MUSB GLUE
- phy-names : the names of the PHY corresponding to the PHYs present in the
*phy* phandle.
-Optional properties:
+Optional Properties:
+Deprecated properties:
- ctrl-module : phandle of the control module this glue uses to write to
mailbox
+Recommended properies:
+ - syscon-otghs : phandle/offset pair. Phandle to the system control module
and the
+ register offset of the mailbox.
+
SOC specific device node entry
usb_otg_hs: usb_otg_hs@4a0ab000 {
compatible = ti,omap4-musb;
diff --git a/drivers/usb/musb/omap2430.c b/drivers/usb/musb/omap2430.c
index 70f2b8a..a03cf1e 100644
--- a/drivers/usb/musb/omap2430.c
+++ b/drivers/usb/musb/omap2430.c
@@ -39,16 +39,27 @@
#include linux/usb/musb-omap.h
#include linux/phy/omap_control_phy.h
#include linux/of_platform.h
+#include linux/regmap.h
+#include linux/mfd/syscon.h
#include musb_core.h
#include omap2430.h
+#define OMAP2430_MUSB_MODE_MASK 0x1f
+#define OMAP2430_MUSB_AVALID BIT(0)
+#define OMAP2430_MUSB_BVALID BIT(1)
+#define OMAP2430_MUSB_VBUSVALID BIT(2)
+#define OMAP2430_MUSB_SESSENDBIT(3)
+#define OMAP2430_MUSB_IDDIG BIT(4)
+
struct omap2430_glue {
struct device *dev;
struct platform_device *musb;
enum omap_musb_vbus_id_status status;
struct work_struct omap_musb_mailbox_work;
struct device *control_otghs;
+ struct regmap *syscon_otghs; /* ctrl. reg. acces */
+ unsigned intotghs_reg; /* otghs reg. index within syscon */
};
#define glue_to_musb(g) platform_get_drvdata(g-musb)
@@ -253,6 +264,44 @@ void omap_musb_mailbox(enum omap_musb_vbus_id_status
status)
}
EXPORT_SYMBOL_GPL(omap_musb_mailbox);
+static void omap2430_musb_set_usbmode(struct omap2430_glue *glue,
+ enum omap_control_usb_mode mode)
+{
+ u32 val;
+ int ret;
+
if (!glue-syscon_otghs) {
omap_control_usb_set_mode(glue-control_otghs, mode);
return;
}
switch (mode) {
case USB_MODE_HOST:
val = OMAP2430_MUSB_AVALID | OMAP2430_MUSB_VBUSVALID;
break;
case USB_MODE_DEVICE:
val = OMAP2430_MUSB_IDDIG | OMAP2430_MUSB_AVALID |
OMAP2430_MUSB_VBUSVALID;
break;
case USB_MODE_DISCONNECT:
val = OMAP2430_MUSB_IDDIG | OMAP2430_MUSB_SESSEND;
break;
default:
dev_dbg(glue-dev, Invalid mode\n);
dev_err(glue-dev, Failed to set mode to %d\n, mode);
}
ret = regmap_update_bits(glue-syscon_otghs,
glue-otghs_reg,
OMAP2430_MUSB_MODE_MASK, val);
if (ret 0)
dev_err(glue-dev, Failed to update regmap\n);
other than that, looks fine.
--
balbi
signature.asc
Description: Digital signature
Re: [PATCH 1/7] phy: ti-pipe3: cleanup ti_pipe3_probe()
On Tue, Aug 04, 2015 at 08:50:40PM +0530, Kishon Vijay Abraham I wrote: No functional change. Add separate functions for pll, clocks and syscon to make ti_pipe3_probe clean. Signed-off-by: Kishon Vijay Abraham I kis...@ti.com I think this needs to be splitted into smaller patches. Seems like the very first patch would be to introduce a local struct device pointer to be used. Than add each and every new function on their own patch. This will help big time making your refactoring a lot clearer and, should anything go wrong, we can atomically revert a specific change, instead of loosing the entire refactor. -- balbi signature.asc Description: Digital signature
Re: [PATCH 2/7] phy: ti-pipe3: use ti_pipe3_power_off to power off the PHY during probe
On Tue, Aug 04, 2015 at 08:50:41PM +0530, Kishon Vijay Abraham I wrote: No functional change. Previously omap_control_phy_power() was used to power there is a slight functional change. You moved PHY power off from before to after pm_runtime_enable(), clk_prepare_enable() and creation of the PHY device. That ought to have a slight impact on how the driver behaves. -- balbi signature.asc Description: Digital signature
Re: [PATCH 5/7] phy: omap-usb2: use omap_usb_power_off to power off the PHY during probe
On Tue, Aug 04, 2015 at 08:50:44PM +0530, Kishon Vijay Abraham I wrote: No functional change. Previously omap_control_phy_power() was used to power same comment as before. off the PHY during probe. But once phy-omap-usb2 driver is adapted to use syscon, omap_control_phy_power() cannot be used. Hence used omap_usb_power_off to power off the PHY. Signed-off-by: Kishon Vijay Abraham I kis...@ti.com Acked-by: Roger Quadros rog...@ti.com --- drivers/phy/phy-omap-usb2.c |2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/phy/phy-omap-usb2.c b/drivers/phy/phy-omap-usb2.c index c1a4686..b5c266a 100644 --- a/drivers/phy/phy-omap-usb2.c +++ b/drivers/phy/phy-omap-usb2.c @@ -241,7 +241,6 @@ static int omap_usb2_probe(struct platform_device *pdev) } phy-control_dev = control_pdev-dev; - omap_control_phy_power(phy-control_dev, 0); otg-set_host = omap_usb_set_host; otg-set_peripheral = omap_usb_set_peripheral; @@ -261,6 +260,7 @@ static int omap_usb2_probe(struct platform_device *pdev) } phy_set_drvdata(generic_phy, phy); + omap_usb_power_off(generic_phy); phy_provider = devm_of_phy_provider_register(phy-dev, of_phy_simple_xlate); -- 1.7.9.5 -- balbi signature.asc Description: Digital signature
Re: [PATCH 00/13] Enhance twl4030_charger functionality. - V3
Hi, On Thu, Jul 30, 2015 at 10:11:24AM +1000, NeilBrown wrote: Following is most of my twl4030_charger patches, rebased against git://git.infradead.org/battery-2.6 Since the previous set I have added the conversion to module_platform_driver so EPROBE_DEFER can be used, and fixed a few minor typos. This does not include the changes to add extcon support, in part because extcon has seen some changes lately which leave me even more confused about how best to use it than before. I need to sort that out before I can resolve the rest of my usb phy patches and then add a few more charger patches. Thanks, queued. -- Sebastian signature.asc Description: Digital signature
