Re: [PATCH v2 16/16] mmc: host: omap_hsmmc: use "mmc_of_parse_voltage" to get ocr_avail

[Ulf Hansson]

On 11 November 2015 at 11:26, Roger Quadros  wrote:
> Hi,
>
> On 25/08/15 17:50, Ulf Hansson wrote:
>> On 3 August 2015 at 14:26, Kishon Vijay Abraham I  wrote:
>>> From: Roger Quadros 
>>>
>>> For platforms that doesn't have explicit regulator control in MMC,
>>> populate voltage-ranges in MMC device tree node and use
>>> mmc_of_parse_voltage to get ocr_avail
>>
>> I don't like this.
>>
>> If we are able to fetch the OCR mask via an external regulator, that
>> shall be done.
>
> Agreed.
>>
>> I think the mmc_of_parse_voltage() API and the corresponding DT
>> binding it parses, should be used for those HW when we don't have an
>> external regulator to use. For example if the MMC controller itself
>> somehow controls the voltage levels. Is that really the case for you?
>
> What shall be done if there is no software control of the external regulator
> and it is fixed at a certain voltage?

I think you can model that as a so called fixed regulator.

Kind regards
Uffe
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[PATCH 1/4] dmaengine: omap-dma: Correct status reporting for memcpy

[Peter Ujfalusi]

During mem copy both src and dst position moves at the same pace. Check the
dst position for progress reporting.

Signed-off-by: Peter Ujfalusi 
Tested-by: Tomi Valkeinen 
Signed-off-by: Jyri Sarha 
---
 drivers/dma/omap-dma.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/dma/omap-dma.c b/drivers/dma/omap-dma.c
index 1dfc71c90123..8ed39ce24d46 100644
--- a/drivers/dma/omap-dma.c
+++ b/drivers/dma/omap-dma.c
@@ -719,7 +719,7 @@ static enum dma_status omap_dma_tx_status(struct dma_chan 
*chan,
 
if (d->dir == DMA_MEM_TO_DEV)
pos = omap_dma_get_src_pos(c);
-   else if (d->dir == DMA_DEV_TO_MEM)
+   else if (d->dir == DMA_DEV_TO_MEM  || d->dir == DMA_MEM_TO_MEM)
pos = omap_dma_get_dst_pos(c);
else
pos = 0;
-- 
2.6.2

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Re: [PATCH v2 16/16] mmc: host: omap_hsmmc: use "mmc_of_parse_voltage" to get ocr_avail

[Roger Quadros]

Hi,

On 25/08/15 17:50, Ulf Hansson wrote:
> On 3 August 2015 at 14:26, Kishon Vijay Abraham I  wrote:
>> From: Roger Quadros 
>>
>> For platforms that doesn't have explicit regulator control in MMC,
>> populate voltage-ranges in MMC device tree node and use
>> mmc_of_parse_voltage to get ocr_avail
> 
> I don't like this.
> 
> If we are able to fetch the OCR mask via an external regulator, that
> shall be done.

Agreed.
> 
> I think the mmc_of_parse_voltage() API and the corresponding DT
> binding it parses, should be used for those HW when we don't have an
> external regulator to use. For example if the MMC controller itself
> somehow controls the voltage levels. Is that really the case for you?

What shall be done if there is no software control of the external regulator
and it is fixed at a certain voltage?

cheers,
-roger

> 
> Kind regards
> Uffe
> 
>>
>> Signed-off-by: Roger Quadros 
>> Signed-off-by: Lokesh Vutla 
>> Signed-off-by: Murali Karicheri 
>> Signed-off-by: Franklin S Cooper Jr 
>> Signed-off-by: Kishon Vijay Abraham I 
>> ---
>>  .../devicetree/bindings/mmc/ti-omap-hsmmc.txt  |2 ++
>>  drivers/mmc/host/omap_hsmmc.c  |9 -
>>  2 files changed, 10 insertions(+), 1 deletion(-)
>>
>> diff --git a/Documentation/devicetree/bindings/mmc/ti-omap-hsmmc.txt 
>> b/Documentation/devicetree/bindings/mmc/ti-omap-hsmmc.txt
>> index 76bf087..2408e87 100644
>> --- a/Documentation/devicetree/bindings/mmc/ti-omap-hsmmc.txt
>> +++ b/Documentation/devicetree/bindings/mmc/ti-omap-hsmmc.txt
>> @@ -22,6 +22,8 @@ ti,dual-volt: boolean, supports dual voltage cards
>>  ti,non-removable: non-removable slot (like eMMC)
>>  ti,needs-special-reset: Requires a special softreset sequence
>>  ti,needs-special-hs-handling: HSMMC IP needs special setting for handling 
>> High Speed
>> +voltage-ranges: Specify the voltage range supported if regulator framework
>> +isn't enabled.
>>  dmas: List of DMA specifiers with the controller specific format
>>  as described in the generic DMA client binding. A tx and rx
>>  specifier is required.
>> diff --git a/drivers/mmc/host/omap_hsmmc.c b/drivers/mmc/host/omap_hsmmc.c
>> index 15973f1..d884d8f 100644
>> --- a/drivers/mmc/host/omap_hsmmc.c
>> +++ b/drivers/mmc/host/omap_hsmmc.c
>> @@ -2184,7 +2184,13 @@ static int omap_hsmmc_probe(struct platform_device 
>> *pdev)
>> goto err_irq;
>> }
>>
>> -   mmc->ocr_avail = mmc_pdata(host)->ocr_mask;
>> +   if (!mmc_pdata(host)->ocr_mask) {
>> +   ret = mmc_of_parse_voltage(pdev->dev.of_node, 
>> >ocr_avail);
>> +   if (ret)
>> +   goto err_parse_voltage;
>> +   } else {
>> +   mmc->ocr_avail = mmc_pdata(host)->ocr_mask;
>> +   }
>>
>> omap_hsmmc_disable_irq(host);
>>
>> @@ -2224,6 +2230,7 @@ static int omap_hsmmc_probe(struct platform_device 
>> *pdev)
>>
>>  err_slot_name:
>> mmc_remove_host(mmc);
>> +err_parse_voltage:
>> omap_hsmmc_reg_put(host);
>>  err_irq:
>> device_init_wakeup(>dev, false);
>> --
>> 1.7.9.5
>>
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[PATCH] ARM: OMAP: DRA7: hwmod: Add data for McASP3

[Felipe Balbi]

From: Peter Ujfalusi 

McASP3 is used by default on DRA7x based boards for audio.

This fixes following error with Beagle x15:

[0.402190] platform 48468000.mcasp: Cannot lookup hwmod 'mcasp3'

which is followed by a splat:

[   11.207663] Unhandled fault: imprecise external abort (0x1406) at 0x
[   11.207670] [ cut here ]
[   11.207683] WARNING: CPU: 0 PID: 272 at 
/home/balbi/workspace/linux/drivers/bus/omap_l3_noc.c:147 
l3_interrupt_handler+0x220/0x34c()
[   11.207688] 4400.ocp:L3 Custom Error: MASTER MPU TARGET L4_PER2_P3 
(Read): Data Access in User mode during Functional access
[   11.207742] Modules linked in: snd_soc_simple_card(+) omapdss leds_gpio 
led_class gpio_fan extcon_usb_gpio cpufreq_dt omap_wdt phy_omap_usb2 
snd_soc_davinci_mcasp snd_soc_edma snd_soc_omap snd_soc_tlv320aic3x rtc_omap 
snd_soc_core ti_soc_thermal dwc3_omap snd_pcm_dmaengine snd_pcm extcon_palmas 
snd_timer extcon snd rtc_palmas rtc_ds1307 tmp102 palmas_pwrbutton thermal_sys 
soundcore hwmon autofs4
[   11.207748] CPU: 0 PID: 272 Comm: systemd-udevd Not tainted 
4.3.0-11482-g3d26f1f5fc82-dirty #27
[   11.207751] Hardware name: Generic DRA74X (Flattened Device Tree)
[   11.207765] [] (unwind_backtrace) from [] 
(show_stack+0x10/0x14)
[   11.207772] [] (show_stack) from [] 
(dump_stack+0x84/0x9c)
[   11.207783] [] (dump_stack) from [] 
(warn_slowpath_common+0x78/0xb4)
[   11.207790] [] (warn_slowpath_common) from [] 
(warn_slowpath_fmt+0x30/0x40)
[   11.207798] [] (warn_slowpath_fmt) from [] 
(l3_interrupt_handler+0x220/0x34c)
[   11.207805] [] (l3_interrupt_handler) from [] 
(handle_irq_event_percpu+0x44/0x1f0)
[   11.207811] [] (handle_irq_event_percpu) from [] 
(handle_irq_event+0x38/0x5c)
[   11.207818] [] (handle_irq_event) from [] 
(handle_fasteoi_irq+0xcc/0x1b0)
[   11.207824] [] (handle_fasteoi_irq) from [] 
(generic_handle_irq+0x20/0x34)
[   11.207829] [] (generic_handle_irq) from [] 
(__handle_domain_irq+0x64/0xe0)
[   11.207835] [] (__handle_domain_irq) from [] 
(gic_handle_irq+0x40/0x8c)
[   11.207842] [] (gic_handle_irq) from [] 
(__irq_usr+0x54/0x80)
[   11.207846] Exception stack(0xed143fb0 to 0xed143ff8)
[   11.207851] 3fa0: 7f69b370 7f69b368 
0370 
[   11.207857] 3fc0: b6ddb4e0 7f69b370 0016 7f69b308 be8db278 be8db2a0 
7f68b024 0001
[   11.207863] 3fe0: b6ddb4e0 be8db180 b6d46a47 b6d46a50 6030 
[   11.207866] ---[ end trace 7d8de48d1bc8fbac ]---

Signed-off-by: Peter Ujfalusi 
Signed-off-by: Felipe Balbi 
---
 arch/arm/mach-omap2/omap_hwmod_7xx_data.c | 41 +++
 1 file changed, 41 insertions(+)

diff --git a/arch/arm/mach-omap2/omap_hwmod_7xx_data.c 
b/arch/arm/mach-omap2/omap_hwmod_7xx_data.c
index 51d1ecb384bd..b730c582a1f7 100644
--- a/arch/arm/mach-omap2/omap_hwmod_7xx_data.c
+++ b/arch/arm/mach-omap2/omap_hwmod_7xx_data.c
@@ -1298,6 +1298,38 @@ static struct omap_hwmod dra7xx_mcspi4_hwmod = {
 };
 
 /*
+ * 'mcasp' class
+ *
+ */
+static struct omap_hwmod_class_sysconfig dra7xx_mcasp_sysc = {
+   .sysc_offs  = 0x0004,
+   .sysc_flags = SYSC_HAS_SIDLEMODE,
+   .idlemodes  = (SIDLE_FORCE | SIDLE_NO | SIDLE_SMART),
+   .sysc_fields= _hwmod_sysc_type3,
+};
+
+static struct omap_hwmod_class dra7xx_mcasp_hwmod_class = {
+   .name   = "mcasp",
+   .sysc   = _mcasp_sysc,
+};
+
+/* mcasp3 */
+static struct omap_hwmod dra7xx_mcasp3_hwmod = {
+   .name   = "mcasp3",
+   .class  = _mcasp_hwmod_class,
+   .clkdm_name = "l4per2_clkdm",
+   .main_clk   = "mcasp3_ahclkx_mux",
+   .flags  = HWMOD_SWSUP_SIDLE,
+   .prcm = {
+   .omap4 = {
+   .clkctrl_offs = DRA7XX_CM_L4PER2_MCASP3_CLKCTRL_OFFSET,
+   .context_offs = DRA7XX_RM_L4PER2_MCASP3_CONTEXT_OFFSET,
+   .modulemode   = MODULEMODE_SWCTRL,
+   },
+   },
+};
+
+/*
  * 'mmc' class
  *
  */
@@ -2566,6 +2598,14 @@ static struct omap_hwmod_ocp_if dra7xx_l3_main_1__hdmi = 
{
.user   = OCP_USER_MPU | OCP_USER_SDMA,
 };
 
+/* l4_per2 -> mcasp3 */
+static struct omap_hwmod_ocp_if dra7xx_l4_per2__mcasp3 = {
+   .master = _l4_per2_hwmod,
+   .slave  = _mcasp3_hwmod,
+   .clk= "l3_iclk_div",
+   .user   = OCP_USER_MPU | OCP_USER_SDMA,
+};
+
 /* l4_per1 -> elm */
 static struct omap_hwmod_ocp_if dra7xx_l4_per1__elm = {
.master = _l4_per1_hwmod,
@@ -3308,6 +3348,7 @@ static struct omap_hwmod_ocp_if *dra7xx_hwmod_ocp_ifs[] 
__initdata = {
_l4_wkup__dcan1,
_l4_per2__dcan2,
_l4_per2__cpgmac0,
+   _l4_per2__mcasp3,
_gmac__mdio,
_l4_cfg__dma_system,
_l3_main_1__dss,
-- 
2.6.2

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Re: Minimal support for dm814x

[Tony Lindgren]

* Delio Brignoli  [151110 02:24]:
> On 10 Nov 2015, at 09:50, Matthijs van Duin  wrote:
> > On 9 November 2015 at 16:06, Tony Lindgren  wrote:
> >> The PLL support is still missing, so it relies on the bootloader
> >> configured PLL values for now. I'm hoping to post PLL support patches over
> >> next few weeks and then we can have that and more devices working for v4.5.
> > 
> > Ah, yes, configuring a DPLL-LJ is fun.. figuring out how to write the
> > desired ratio as M/(M2*(1+N)) while simultaneously satisfying all
> > constraints on M, N, M2, refclk, and dco. :-)
> 
> Yes, indeed. We have the additional requirement of being able to adjust the 
> frequency (by a relatively small amount) without loss of lock. Recalculating 
> the DCO mode and M,N,M2 from scratch each time based on the target frequency, 
> like was done in the 2.6.37 based tree from TI was not acceptable, so we try 
> to change m2 first to see if we can reach the target frequency and fall back 
> to recalculate parameters from scratch if that fails.

Well we do first try to set the rate using the divider only at least for
drivers/clk/ti/fapll.c used on dm816x. I'm thinking about doing a similar
driver for the dm814x adpll where we have a PLL and separate output clocks
in a single driver as the PLL and output control registers are all mixed
in.

> BTW, are you aware of section 2.1.2 of “TMS320DM814x DaVinci Digital Media 
> Processors Silicon Revisions 3.0, 2.1”? 
> 

OK good to know :)

Tony
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Re: [PATCH 2/6] ARM: OMAP2+: dts: cm-t335: add basic support for I2C

[Uri Mashiach]

Gentle ping

On 27/10/15 14:14, Uri Mashiach wrote:

From: Ilya Ledvich 

Add pinmux configuration for I2C0 and I2C1 pins.
Add description for I2C0 bus, set clock frequency to 400kHz.
Add child nodes for 24c02 EEPROM and em3027 RTC on I2C0 bus.

Acked-by: Igor Grinberg 
Signed-off-by: Ilya Ledvich 
Signed-off-by: Uri Mashiach 
---
  arch/arm/boot/dts/am335x-cm-t335.dts | 37 
  1 file changed, 37 insertions(+)

diff --git a/arch/arm/boot/dts/am335x-cm-t335.dts 
b/arch/arm/boot/dts/am335x-cm-t335.dts
index 197d5ce..39df3d2 100644
--- a/arch/arm/boot/dts/am335x-cm-t335.dts
+++ b/arch/arm/boot/dts/am335x-cm-t335.dts
@@ -37,6 +37,24 @@
pinctrl-names = "default";
pinctrl-0 = <>;

+   i2c0_pins: pinmux_i2c0_pins {
+   pinctrl-single,pins = <
+   /* i2c0_sda.i2c0_sda */
+   0x188 (PIN_INPUT_PULLUP | MUX_MODE0)
+   /* i2c0_scl.i2c0_scl */
+   0x18c (PIN_INPUT_PULLUP | MUX_MODE0)
+   >;
+   };
+
+   i2c1_pins: pinmux_i2c1_pins {
+   pinctrl-single,pins = <
+   /* uart0_ctsn.i2c1_sda */
+   0x168 (PIN_INPUT_PULLUP | MUX_MODE2)
+   /* uart0_rtsn.i2c1_scl */
+   0x16c (PIN_INPUT_PULLUP | MUX_MODE2)
+   >;
+   };
+
gpio_led_pins: pinmux_gpio_led_pins {
pinctrl-single,pins = <
0x88 (PIN_OUTPUT | MUX_MODE7)   /* gpmc_csn3.gpio2_0 */
@@ -60,3 +78,22 @@
status = "okay";
  };

+ {
+   pinctrl-names = "default";
+   pinctrl-0 = <_pins>;
+
+   status = "okay";
+   clock-frequency = <40>;
+
+   eeprom: 24c02@50 {
+   compatible = "atmel,24c02";
+   reg = <0x50>;
+   pagesize = <16>;
+   };
+
+   ext_rtc: em3027@56 {
+   compatible = "emmicro,em3027";
+   reg = <0x56>;
+   };
+};
+


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Re: [PATCH 5/6] ARM: OMAP2+: dts: cm-t335: add support for network device

[Uri Mashiach]

Gentle ping

On 27/10/15 14:14, Uri Mashiach wrote:

From: Ilya Ledvich 

Add pinmux configurations for RGMII1 based CPSW Ethernet pins and
MDIO pins:
  - default configuration required for module in active state,
  - sleep configuration required for module in inactive state.
Add mac node with single slave device. Add nodes for davinci_mdio and
cpsw_emac0.

Acked-by: Igor Grinberg 
Signed-off-by: Ilya Ledvich 
Signed-off-by: Uri Mashiach 
---
  arch/arm/boot/dts/am335x-cm-t335.dts | 85 
  1 file changed, 85 insertions(+)

diff --git a/arch/arm/boot/dts/am335x-cm-t335.dts 
b/arch/arm/boot/dts/am335x-cm-t335.dts
index 976c330..0296d3f 100644
--- a/arch/arm/boot/dts/am335x-cm-t335.dts
+++ b/arch/arm/boot/dts/am335x-cm-t335.dts
@@ -113,6 +113,71 @@
>;
};

+   cpsw_default: cpsw_default {
+   pinctrl-single,pins = <
+   /* Slave 1 */
+   /* mii1_txen.rgmii1_tctl */
+   0x114 (PIN_OUTPUT_PULLDOWN | MUX_MODE2)
+   /* mii1_rxdv.rgmii1_rctl */
+   0x118 (PIN_INPUT_PULLDOWN | MUX_MODE2)
+   /* mii1_txd3.rgmii1_td3 */
+   0x11c (PIN_OUTPUT_PULLDOWN | MUX_MODE2)
+   /* mii1_txd2.rgmii1_td2 */
+   0x120 (PIN_OUTPUT_PULLDOWN | MUX_MODE2)
+   /* mii1_txd1.rgmii1_td1 */
+   0x124 (PIN_OUTPUT_PULLDOWN | MUX_MODE2)
+   /* mii1_txd0.rgmii1_td0 */
+   0x128 (PIN_OUTPUT_PULLDOWN | MUX_MODE2)
+   /* mii1_txclk.rgmii1_tclk */
+   0x12c (PIN_OUTPUT_PULLDOWN | MUX_MODE2)
+   /* mii1_rxclk.rgmii1_rclk */
+   0x130 (PIN_INPUT_PULLDOWN | MUX_MODE2)
+   /* mii1_rxd3.rgmii1_rd3 */
+   0x134 (PIN_INPUT_PULLDOWN | MUX_MODE2)
+   /* mii1_rxd2.rgmii1_rd2 */
+   0x138 (PIN_INPUT_PULLDOWN | MUX_MODE2)
+   /* mii1_rxd1.rgmii1_rd1 */
+   0x13c (PIN_INPUT_PULLDOWN | MUX_MODE2)
+   /* mii1_rxd0.rgmii1_rd0 */
+   0x140 (PIN_INPUT_PULLDOWN | MUX_MODE2)
+   >;
+   };
+
+   cpsw_sleep: cpsw_sleep {
+   pinctrl-single,pins = <
+   /* Slave 1 reset value */
+   0x114 (PIN_INPUT_PULLDOWN | MUX_MODE7)
+   0x118 (PIN_INPUT_PULLDOWN | MUX_MODE7)
+   0x11c (PIN_INPUT_PULLDOWN | MUX_MODE7)
+   0x120 (PIN_INPUT_PULLDOWN | MUX_MODE7)
+   0x124 (PIN_INPUT_PULLDOWN | MUX_MODE7)
+   0x128 (PIN_INPUT_PULLDOWN | MUX_MODE7)
+   0x12c (PIN_INPUT_PULLDOWN | MUX_MODE7)
+   0x130 (PIN_INPUT_PULLDOWN | MUX_MODE7)
+   0x134 (PIN_INPUT_PULLDOWN | MUX_MODE7)
+   0x138 (PIN_INPUT_PULLDOWN | MUX_MODE7)
+   0x13c (PIN_INPUT_PULLDOWN | MUX_MODE7)
+   0x140 (PIN_INPUT_PULLDOWN | MUX_MODE7)
+   >;
+   };
+
+   davinci_mdio_default: davinci_mdio_default {
+   pinctrl-single,pins = <
+   /* mdio_data.mdio_data */
+   0x148 (PIN_INPUT_PULLUP | SLEWCTRL_FAST | MUX_MODE0)
+   /* mdio_clk.mdio_clk */
+   0x14c (PIN_OUTPUT_PULLUP | MUX_MODE0)
+   >;
+   };
+
+   davinci_mdio_sleep: davinci_mdio_sleep {
+   pinctrl-single,pins = <
+   /* MDIO reset value */
+   0x148 (PIN_INPUT_PULLDOWN | MUX_MODE7)
+   0x14c (PIN_INPUT_PULLDOWN | MUX_MODE7)
+   >;
+   };
+
mmc1_pins: pinmux_mmc1_pins {
pinctrl-single,pins = <
/* mmc0_dat3.mmc0_dat3 */
@@ -228,6 +293,26 @@
status = "okay";
  };

+ {
+   pinctrl-names = "default", "sleep";
+   pinctrl-0 = <_default>;
+   pinctrl-1 = <_sleep>;
+   slaves = <1>;
+   status = "okay";
+};
+
+_mdio {
+   pinctrl-names = "default", "sleep";
+   pinctrl-0 = <_mdio_default>;
+   pinctrl-1 = <_mdio_sleep>;
+   status = "okay";
+};
+
+_emac0 {
+   phy_id = <_mdio>, <0>;
+   phy-mode = "rgmii-txid";
+};
+
   {
status = "okay";
vmmc-supply = <_fixed>;


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Re: [PATCH 6/6] ARM: OMAP2+: dts: cm-t335: add support for PWM backlight

[Uri Mashiach]

Gentle ping

On 27/10/15 14:15, Uri Mashiach wrote:

From: Ilya Ledvich 

Add pinmux configuration for ECAP0 pin.
Add node for PWM backlight device.
Use PWM output from ecap0 as backlight source.

Acked-by: Igor Grinberg 
Signed-off-by: Ilya Ledvich 
Signed-off-by: Uri Mashiach 
---
  arch/arm/boot/dts/am335x-cm-t335.dts | 24 
  1 file changed, 24 insertions(+)

diff --git a/arch/arm/boot/dts/am335x-cm-t335.dts 
b/arch/arm/boot/dts/am335x-cm-t335.dts
index 0296d3f..571a453 100644
--- a/arch/arm/boot/dts/am335x-cm-t335.dts
+++ b/arch/arm/boot/dts/am335x-cm-t335.dts
@@ -39,6 +39,13 @@
regulator-min-microvolt = <330>;
regulator-max-microvolt = <330>;
};
+
+   backlight {
+   compatible = "pwm-backlight";
+   pwms = < 0 5 0>;
+   brightness-levels = <0 51 53 56 62 75 101 152 255>;
+   default-brightness-level = <8>;
+   };
  };

  _pinmux {
@@ -113,6 +120,13 @@
>;
};

+   ecap0_pins: pinmux_ecap0_pins {
+   pinctrl-single,pins = <
+   /* eCAP0_in_PWM0_out.eCAP0_in_PWM0_out MODE0 */
+   0x164 0x0
+   >;
+   };
+
cpsw_default: cpsw_default {
pinctrl-single,pins = <
/* Slave 1 */
@@ -222,6 +236,16 @@
};
  };

+ {
+   status = "okay";
+
+   ecap0: ecap@48300100 {
+   status = "okay";
+   pinctrl-names = "default";
+   pinctrl-0 = <_pins>;
+   };
+};
+
   {
status = "okay";
pinctrl-names = "default";


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Re: [PATCH 0/6] ARM: OMAP2+: dts: cm-t335: initial support

[Tony Lindgren]

Hi,

* Uri Mashiach  [15 09:32]:
> Gentle ping

Well the merge window is ongoing, and I'm not touching anything
except fixes until they are all out of the way. And after that
I'll start applying patches for v4.5 merge window, usually by
-rc2 except when things go wrong and we have regressions with
the mainline kernel like we did during v4.3-rc cycle.

So for fixes, it's always a good time to send them. The sooner
we have fixes out of the way after each merge window, the sooner
I'll start applying new features.

So for new features, between -rc1 and -rc4. We really want to
have all the new code sit in Linux next for a few weeks before
each merge window so in general I try to have things ready togo
by -rc5 for most part and by -rc6 latest.

Regards,

Tony
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Re: [PATCH] rtc: ds1307: fix kernel splat due to wakeup irq handling

[Tony Lindgren]

* Felipe Balbi  [15 08:11]:
> Since commit 3fffd1283927 ("i2c: allow specifying
> separate wakeup interrupt in device tree") we have
> automatic wakeup irq support for i2c devices. That
> commit missed the fact that rtc-1307 had its own
> wakeup irq handling and ended up introducing a
> kernel splat for at least Beagle x15 boards.
> 
> Fix that by reverting original commit _and_ passing
> correct interrupt names on DTS so i2c-core can
> choose correct IRQ as wakeup.
> 
> Now that we have automatic wakeirq support, we can
> revert the original commit which did it manually.
> 
> Fixes the following warning:
> 
> [   10.346582] WARNING: CPU: 1 PID: 263 at 
> linux/drivers/base/power/wakeirq.c:43 dev_pm_attach_wake_irq+0xbc/0xd4()
> [   10.359244] rtc-ds1307 2-006f: wake irq already initialized

Best to merge the dts change along with the driver fix in this case:

Acked-by: Tony Lindgren 


> Cc: Nishanth Menon 
> Signed-off-by: Felipe Balbi 
> ---
>  arch/arm/boot/dts/am57xx-beagle-x15.dts |  1 +
>  drivers/rtc/rtc-ds1307.c| 36 
> +++--
>  2 files changed, 4 insertions(+), 33 deletions(-)
> 
> diff --git a/arch/arm/boot/dts/am57xx-beagle-x15.dts 
> b/arch/arm/boot/dts/am57xx-beagle-x15.dts
> index d9ba6b879fc1..00352e761b8c 100644
> --- a/arch/arm/boot/dts/am57xx-beagle-x15.dts
> +++ b/arch/arm/boot/dts/am57xx-beagle-x15.dts
> @@ -604,6 +604,7 @@
>   reg = <0x6f>;
>   interrupts-extended = <_mpu GIC_SPI 2 
> IRQ_TYPE_EDGE_RISING>,
> <_pmx_core 0x424>;
> + interrupt-names = "irq", "wakeup";
>  
>   pinctrl-names = "default";
>   pinctrl-0 = <_pins_default>;
> diff --git a/drivers/rtc/rtc-ds1307.c b/drivers/rtc/rtc-ds1307.c
> index 188006c55ce0..325836818826 100644
> --- a/drivers/rtc/rtc-ds1307.c
> +++ b/drivers/rtc/rtc-ds1307.c
> @@ -15,9 +15,6 @@
>  #include 
>  #include 
>  #include 
> -#include 
> -#include 
> -#include 
>  #include 
>  #include 
>  #include 
> @@ -117,7 +114,6 @@ struct ds1307 {
>  #define HAS_ALARM1   /* bit 1 == irq claimed */
>   struct i2c_client   *client;
>   struct rtc_device   *rtc;
> - int wakeirq;
>   s32 (*read_block_data)(const struct i2c_client *client, u8 command,
>  u8 length, u8 *values);
>   s32 (*write_block_data)(const struct i2c_client *client, u8 command,
> @@ -1146,8 +1142,6 @@ read_rtc:
>   }
>  
>   if (want_irq) {
> - struct device_node *node = client->dev.of_node;
> -
>   err = devm_request_threaded_irq(>dev,
>   client->irq, NULL, irq_handler,
>   IRQF_SHARED | IRQF_ONESHOT,
> @@ -1155,34 +1149,13 @@ read_rtc:
>   if (err) {
>   client->irq = 0;
>   dev_err(>dev, "unable to request IRQ!\n");
> - goto no_irq;
> - }
> -
> - set_bit(HAS_ALARM, >flags);
> - dev_dbg(>dev, "got IRQ %d\n", client->irq);
> -
> - /* Currently supported by OF code only! */
> - if (!node)
> - goto no_irq;
> -
> - err = of_irq_get(node, 1);
> - if (err <= 0) {
> - if (err == -EPROBE_DEFER)
> - goto exit;
> - goto no_irq;
> - }
> - ds1307->wakeirq = err;
> + } else {
>  
> - err = dev_pm_set_dedicated_wake_irq(>dev,
> - ds1307->wakeirq);
> - if (err) {
> - dev_err(>dev, "unable to setup wakeIRQ %d!\n",
> - err);
> - goto exit;
> + set_bit(HAS_ALARM, >flags);
> + dev_dbg(>dev, "got IRQ %d\n", client->irq);
>   }
>   }
>  
> -no_irq:
>   if (chip->nvram_size) {
>  
>   ds1307->nvram = devm_kzalloc(>dev,
> @@ -1226,9 +1199,6 @@ static int ds1307_remove(struct i2c_client *client)
>  {
>   struct ds1307 *ds1307 = i2c_get_clientdata(client);
>  
> - if (ds1307->wakeirq)
> - dev_pm_clear_wake_irq(>dev);
> -
>   if (test_and_clear_bit(HAS_NVRAM, >flags))
>   sysfs_remove_bin_file(>dev.kobj, ds1307->nvram);
>  
> -- 
> 2.6.2
> 
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[PATCH 2/2] [media] include/media: move platform driver headers to a separate dir

[Mauro Carvalho Chehab]

Let's not mix headers used by the core with those headers that
are needed by some specific platform drivers.

This patch was made via this script:

mkdir include/media/platform
for i in include/media/*.h; do n=`basename $i`;  (for j in $(git grep 
-l $n); do dirname $j; done)|sort|uniq|grep -ve '^.$' > list; num=$(wc -l 
list|cut -d' ' -f1); if [ $num == 1 ]; then if [ "`grep platform list`" != "" 
]; then git mv $i include/media/platform; fi; fi; done
git mv include/media/exynos* include/media/s5p* include/media/omap* 
include/media/soc_* include/media/sh_include/media/platform/
for i in $(find include/media/ -type f); do n=`basename $i`; git grep 
-l $n; done|sort|uniq >files && (echo "for i in \$(cat files); do cat \$i | 
\\"; cd include/media; for j in rc/ i2c/ platform/ common_drv/; do for i in 
$(ls $j); do echo "perl -ne 's,(include 
[\\\"\\<]media/)($i)([\\\"\\>]),\1$j\2\3,; print \$_' |\\"; done; done; echo 
"cat > a && mv a \$i; done") >script && . ./script

Signed-off-by: Mauro Carvalho Chehab 

 rename include/media/{ => platform}/exynos-fimc.h (100%)
 rename include/media/{ => platform}/mmp-camera.h (100%)
 rename include/media/{ => platform}/omap1_camera.h (100%)
 rename include/media/{ => platform}/omap4iss.h (100%)
 rename include/media/{ => platform}/s3c_camif.h (100%)
 rename include/media/{ => platform}/s5p_hdmi.h (100%)
 rename include/media/{ => platform}/sh_mobile_ceu.h (100%)
 rename include/media/{ => platform}/sh_mobile_csi2.h (100%)
 rename include/media/{ => platform}/sh_vou.h (100%)
 rename include/media/{ => platform}/sii9234.h (100%)
 rename include/media/{ => platform}/soc_camera.h (100%)
 rename include/media/{ => platform}/soc_camera_platform.h (98%)
 rename include/media/{ => platform}/soc_mediabus.h (100%)

diff --git a/arch/arm/mach-imx/mach-imx27_visstrim_m10.c 
b/arch/arm/mach-imx/mach-imx27_visstrim_m10.c
index ede2bdbb5dd5..99bd64c69a4f 100644
--- a/arch/arm/mach-imx/mach-imx27_visstrim_m10.c
+++ b/arch/arm/mach-imx/mach-imx27_visstrim_m10.c
@@ -33,7 +33,7 @@
 #include 
 #include 
 #include 
-#include 
+#include 
 #include 
 #include 
 #include 
diff --git a/arch/arm/mach-imx/mach-mx27_3ds.c 
b/arch/arm/mach-imx/mach-mx27_3ds.c
index 9ef4640f3660..74d073fd4fa6 100644
--- a/arch/arm/mach-imx/mach-mx27_3ds.c
+++ b/arch/arm/mach-imx/mach-mx27_3ds.c
@@ -31,7 +31,7 @@
 #include 
 #include 
 
-#include 
+#include 
 
 #include 
 #include 
diff --git a/arch/arm/mach-imx/mach-mx31_3ds.c 
b/arch/arm/mach-imx/mach-mx31_3ds.c
index 65a0dc06a97c..5e1b9c335103 100644
--- a/arch/arm/mach-imx/mach-mx31_3ds.c
+++ b/arch/arm/mach-imx/mach-mx31_3ds.c
@@ -28,7 +28,7 @@
 #include 
 #include 
 
-#include 
+#include 
 
 #include 
 #include 
diff --git a/arch/arm/mach-imx/mach-mx35_3ds.c 
b/arch/arm/mach-imx/mach-mx35_3ds.c
index 7e315f00648d..355b9521f7f0 100644
--- a/arch/arm/mach-imx/mach-mx35_3ds.c
+++ b/arch/arm/mach-imx/mach-mx35_3ds.c
@@ -45,7 +45,7 @@
 
 #include 
 
-#include 
+#include 
 
 #include "3ds_debugboard.h"
 #include "common.h"
diff --git a/arch/arm/mach-imx/mach-pcm037.c b/arch/arm/mach-imx/mach-pcm037.c
index 6d879417db49..02cc07b0a687 100644
--- a/arch/arm/mach-imx/mach-pcm037.c
+++ b/arch/arm/mach-imx/mach-pcm037.c
@@ -35,7 +35,7 @@
 #include 
 #include 
 
-#include 
+#include 
 
 #include 
 #include 
diff --git a/arch/arm/mach-imx/mx31moboard-marxbot.c 
b/arch/arm/mach-imx/mx31moboard-marxbot.c
index 2e895a82a6eb..79ae360a9c8f 100644
--- a/arch/arm/mach-imx/mx31moboard-marxbot.c
+++ b/arch/arm/mach-imx/mx31moboard-marxbot.c
@@ -24,7 +24,7 @@
 
 #include 
 
-#include 
+#include 
 
 #include "common.h"
 #include "devices-imx31.h"
diff --git a/arch/arm/mach-imx/mx31moboard-smartbot.c 
b/arch/arm/mach-imx/mx31moboard-smartbot.c
index 89fc35a64448..00bd100df69a 100644
--- a/arch/arm/mach-imx/mx31moboard-smartbot.c
+++ b/arch/arm/mach-imx/mx31moboard-smartbot.c
@@ -23,7 +23,7 @@
 #include 
 #include 
 
-#include 
+#include 
 
 #include "board-mx31moboard.h"
 #include "common.h"
diff --git a/arch/arm/mach-omap1/board-ams-delta.c 
b/arch/arm/mach-omap1/board-ams-delta.c
index a95499ea8706..7adef38f27c2 100644
--- a/arch/arm/mach-omap1/board-ams-delta.c
+++ b/arch/arm/mach-omap1/board-ams-delta.c
@@ -28,7 +28,7 @@
 #include 
 #include 
 
-#include 
+#include 
 
 #include 
 #include 
diff --git a/arch/arm/mach-omap1/include/mach/camera.h 
b/arch/arm/mach-omap1/include/mach/camera.h
index 847d00f0bb0a..0df5ebf85de6 100644
--- a/arch/arm/mach-omap1/include/mach/camera.h
+++ b/arch/arm/mach-omap1/include/mach/camera.h
@@ -1,7 +1,7 @@
 #ifndef __ASM_ARCH_CAMERA_H_
 #define __ASM_ARCH_CAMERA_H_
 
-#include 
+#include 
 
 void omap1_camera_init(void *);
 
diff --git a/arch/arm/mach-pxa/em-x270.c b/arch/arm/mach-pxa/em-x270.c
index 9d7072b04045..ae645794ffd0 100644
--- a/arch/arm/mach-pxa/em-x270.c
+++ b/arch/arm/mach-pxa/em-x270.c
@@ -34,7 +34,7 @@
 #include 
 #include 
 
-#include 
+#include 
 
 #include 
 #include 
diff 

Re: [PATCH 0/6] ARM: OMAP2+: dts: cm-t335: initial support

[Uri Mashiach]

Gentle ping

On 27/10/15 14:14, Uri Mashiach wrote:

Add basic support for CompuLab cm-t335 module based on AM335X SoC.

CM-T335 is a tiny computer-on-module (CoM) / system-on-module (SoM)
The module is built around the Texas Instruments Sitara AM3352/4
system-on-chip.

The CPU is supplemented with up-to 512MB DDR3 and up-to 1GB of on-board
NAND storage, WiFi connected to SPI, Bluetooth, Analog audio, Gigabit
Ethernet, CAN bus.

Ilya Ledvich (6):
   ARM: OMAP2+: dts: cm-t335: add initial support
   ARM: OMAP2+: dts: cm-t335: add basic support for I2C
   ARM: OMAP2+: dts: cm-t335: add support for NAND flash
   ARM: OMAP2+: dts: cm-t335: add support for MMC
   ARM: OMAP2+: dts: cm-t335: add support for network device
   ARM: OMAP2+: dts: cm-t335: add support for PWM backlight

  .../devicetree/bindings/arm/omap/omap.txt  |   3 +
  arch/arm/boot/dts/Makefile |   7 +-
  arch/arm/boot/dts/am335x-cm-t335.dts   | 347 +
  3 files changed, 354 insertions(+), 3 deletions(-)
  create mode 100644 arch/arm/boot/dts/am335x-cm-t335.dts


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Re: [PATCH 1/6] ARM: OMAP2+: dts: cm-t335: add initial support

[Uri Mashiach]

Gentle ping

On 27/10/15 14:14, Uri Mashiach wrote:

From: Ilya Ledvich 

Add basic support for CompuLab cm-t335 module based on AM335X SoC.

CM-T335 is a tiny computer-on-module (CoM) / system-on-module (SoM)
The module is built around the Texas Instruments Sitara AM3352/4
system-on-chip.

The CPU is supplemented with up-to 512MB DDR3 and up-to 1GB of on-board
NAND storage, WiFi connected to SPI, Bluetooth, Analog audio, Gigabit
Ethernet, CAN bus.

Current patch adds support:
UART0 and GPIO LED

Detailed description can be found at the module site:
http://www.compulab.co.il/products/computer-on-modules/cm-t335/

Acked-by: Igor Grinberg 
Signed-off-by: Ilya Ledvich 
[uri.mashi...@compulab.co.il: the default RAM amount reduced to
128MB to support also the minimal module configuration]
Signed-off-by: Uri Mashiach 
---
  .../devicetree/bindings/arm/omap/omap.txt  |  3 ++
  arch/arm/boot/dts/Makefile |  7 +--
  arch/arm/boot/dts/am335x-cm-t335.dts   | 62 ++
  3 files changed, 69 insertions(+), 3 deletions(-)
  create mode 100644 arch/arm/boot/dts/am335x-cm-t335.dts

diff --git a/Documentation/devicetree/bindings/arm/omap/omap.txt 
b/Documentation/devicetree/bindings/arm/omap/omap.txt
index 9f4e513..2154f97 100644
--- a/Documentation/devicetree/bindings/arm/omap/omap.txt
+++ b/Documentation/devicetree/bindings/arm/omap/omap.txt
@@ -138,6 +138,9 @@ Boards:
  - AM335X phyBOARD-WEGA: Single Board Computer dev kit
compatible = "phytec,am335x-wega", "phytec,am335x-phycore-som", "ti,am33xx"

+- AM335X CM-T335 : System On Module, built around the Sitara AM3352/4
+  compatible = "compulab,cm-t335", "ti,am33xx"
+
  - OMAP5 EVM : Evaluation Module
compatible = "ti,omap5-evm", "ti,omap5"

diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile
index bb8fa02..0e011dc 100644
--- a/arch/arm/boot/dts/Makefile
+++ b/arch/arm/boot/dts/Makefile
@@ -446,13 +446,14 @@ dtb-$(CONFIG_SOC_AM33XX) += \
am335x-base0033.dtb \
am335x-bone.dtb \
am335x-boneblack.dtb \
-   am335x-sl50.dtb \
+   am335x-chiliboard.dtb \
+   am335x-cm-t335.dtb \
am335x-evm.dtb \
am335x-evmsk.dtb \
+   am335x-lxm.dtb \
am335x-nano.dtb \
am335x-pepper.dtb \
-   am335x-lxm.dtb \
-   am335x-chiliboard.dtb \
+   am335x-sl50.dtb \
am335x-wega-rdk.dtb
  dtb-$(CONFIG_ARCH_OMAP4) += \
omap4-duovero-parlor.dtb \
diff --git a/arch/arm/boot/dts/am335x-cm-t335.dts 
b/arch/arm/boot/dts/am335x-cm-t335.dts
new file mode 100644
index 000..197d5ce
--- /dev/null
+++ b/arch/arm/boot/dts/am335x-cm-t335.dts
@@ -0,0 +1,62 @@
+/*
+ * am335x-cm-t335.dts - Device Tree file for Compulab CM-T335
+ *
+ * Copyright (C) 2014 - 2015 CompuLab Ltd. - http://www.compulab.co.il/
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+
+/dts-v1/;
+
+#include "am33xx.dtsi"
+
+/ {
+   model = "CompuLab CM-T335";
+   compatible = "compulab,cm-t335", "ti,am33xx";
+
+   memory {
+   device_type = "memory";
+   reg = <0x8000 0x800>; /* 128 MB */
+   };
+
+   leds {
+   compatible = "gpio-leds";
+   pinctrl-names = "default";
+   pinctrl-0 = <_led_pins>;
+   led@0 {
+   label = "cm_t335:green";
+   gpios = < 0 GPIO_ACTIVE_LOW>;   /* gpio2_0 */
+   linux,default-trigger = "heartbeat";
+   };
+   };
+};
+
+_pinmux {
+   pinctrl-names = "default";
+   pinctrl-0 = <>;
+
+   gpio_led_pins: pinmux_gpio_led_pins {
+   pinctrl-single,pins = <
+   0x88 (PIN_OUTPUT | MUX_MODE7)   /* gpmc_csn3.gpio2_0 */
+   >;
+   };
+
+   uart0_pins: pinmux_uart0_pins {
+   pinctrl-single,pins = <
+   /* uart0_rxd.uart0_rxd */
+   0x170 (PIN_INPUT_PULLUP | MUX_MODE0)
+   /* uart0_txd.uart0_txd */
+   0x174 (PIN_OUTPUT_PULLDOWN | MUX_MODE0)
+   >;
+   };
+};
+
+ {
+   pinctrl-names = "default";
+   pinctrl-0 = <_pins>;
+
+   status = "okay";
+};
+


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Re: [PATCH 3/6] ARM: OMAP2+: dts: cm-t335: add support for NAND flash

[Uri Mashiach]

Gentle ping

On 27/10/15 14:14, Uri Mashiach wrote:

From: Ilya Ledvich 

Add pinmux configuration for NAND specific GPMC pins.
Add description for GPMC controller. Add child node for NAND flash
including CM-T335 specific partition table to GPMC node.
Enable error-location module (ELM).

Acked-by: Igor Grinberg 
Signed-off-by: Ilya Ledvich 
Signed-off-by: Uri Mashiach 
---
  arch/arm/boot/dts/am335x-cm-t335.dts | 106 +++
  1 file changed, 106 insertions(+)

diff --git a/arch/arm/boot/dts/am335x-cm-t335.dts 
b/arch/arm/boot/dts/am335x-cm-t335.dts
index 39df3d2..9d6117a 100644
--- a/arch/arm/boot/dts/am335x-cm-t335.dts
+++ b/arch/arm/boot/dts/am335x-cm-t335.dts
@@ -61,6 +61,41 @@
>;
};

+   nandflash_pins: pinmux_nandflash_pins {
+   pinctrl-single,pins = <
+   /* gpmc_ad0.gpmc_ad0 */
+   0x0 (PIN_INPUT_PULLUP | MUX_MODE0)
+   /* gpmc_ad1.gpmc_ad1 */
+   0x4 (PIN_INPUT_PULLUP | MUX_MODE0)
+   /* gpmc_ad2.gpmc_ad2 */
+   0x8 (PIN_INPUT_PULLUP | MUX_MODE0)
+   /* gpmc_ad3.gpmc_ad3 */
+   0xc (PIN_INPUT_PULLUP | MUX_MODE0)
+   /* gpmc_ad4.gpmc_ad4 */
+   0x10 (PIN_INPUT_PULLUP | MUX_MODE0)
+   /* gpmc_ad5.gpmc_ad5 */
+   0x14 (PIN_INPUT_PULLUP | MUX_MODE0)
+   /* gpmc_ad6.gpmc_ad6 */
+   0x18 (PIN_INPUT_PULLUP | MUX_MODE0)
+   /* gpmc_ad7.gpmc_ad7 */
+   0x1c (PIN_INPUT_PULLUP | MUX_MODE0)
+   /* gpmc_wait0.gpmc_wait0 */
+   0x70 (PIN_INPUT_PULLUP | MUX_MODE0)
+   /* gpmc_wpn.gpio0_30 */
+   0x74 (PIN_INPUT_PULLUP | MUX_MODE7)
+   /* gpmc_csn0.gpmc_csn0  */
+   0x7c (PIN_OUTPUT | MUX_MODE0)
+   /* gpmc_advn_ale.gpmc_advn_ale */
+   0x90 (PIN_OUTPUT | MUX_MODE0)
+   /* gpmc_oen_ren.gpmc_oen_ren */
+   0x94 (PIN_OUTPUT | MUX_MODE0)
+   /* gpmc_wen.gpmc_wen */
+   0x98 (PIN_OUTPUT | MUX_MODE0)
+   /* gpmc_be0n_cle.gpmc_be0n_cle */
+   0x9c (PIN_OUTPUT | MUX_MODE0)
+   >;
+   };
+
uart0_pins: pinmux_uart0_pins {
pinctrl-single,pins = <
/* uart0_rxd.uart0_rxd */
@@ -97,3 +132,74 @@
};
  };

+ {
+   status = "okay";
+   pinctrl-names = "default";
+   pinctrl-0 = <_pins>;
+   ranges = <0 0 0x0800 0x1000>; /* CS0: NAND */
+   nand@0,0 {
+   reg = <0 0 0>; /* CS0, offset 0 */
+   ti,nand-ecc-opt = "bch8";
+   ti,elm-id = <>;
+   nand-bus-width = <8>;
+   gpmc,device-width = <1>;
+   gpmc,sync-clk-ps = <0>;
+   gpmc,cs-on-ns = <0>;
+   gpmc,cs-rd-off-ns = <44>;
+   gpmc,cs-wr-off-ns = <44>;
+   gpmc,adv-on-ns = <6>;
+   gpmc,adv-rd-off-ns = <34>;
+   gpmc,adv-wr-off-ns = <44>;
+   gpmc,we-on-ns = <0>;
+   gpmc,we-off-ns = <40>;
+   gpmc,oe-on-ns = <0>;
+   gpmc,oe-off-ns = <54>;
+   gpmc,access-ns = <64>;
+   gpmc,rd-cycle-ns = <82>;
+   gpmc,wr-cycle-ns = <82>;
+   gpmc,wait-on-read = "true";
+   gpmc,wait-on-write = "true";
+   gpmc,bus-turnaround-ns = <0>;
+   gpmc,cycle2cycle-delay-ns = <0>;
+   gpmc,clk-activation-ns = <0>;
+   gpmc,wait-monitoring-ns = <0>;
+   gpmc,wr-access-ns = <40>;
+   gpmc,wr-data-mux-bus-ns = <0>;
+   /* MTD partition table */
+   #address-cells = <1>;
+   #size-cells = <1>;
+   partition@0 {
+   label = "spl";
+   reg = <0x 0x0020>;
+   };
+   partition@1 {
+   label = "uboot";
+   reg = <0x0020 0x0010>;
+   };
+   partition@2 {
+   label = "uboot environment";
+   reg = <0x0030 0x0010>;
+   };
+   partition@3 {
+   label = "dtb";
+   reg = <0x0040 0x0010>;
+   };
+   partition@4 {
+   label = "splash";
+   reg = <0x0050 0x0040>;
+   };
+   partition@5 {
+   label = "linux";
+ 

Re: [PATCH 4/6] ARM: OMAP2+: dts: cm-t335: add support for MMC

[Uri Mashiach]

Gentle ping

On 27/10/15 14:14, Uri Mashiach wrote:

From: Ilya Ledvich 

Add pinmux configuration for MMC0 pins.
Add fixed regulator 'vmmc_fixed'.
Enable MMC0 in 4-bit mode.

Acked-by: Igor Grinberg 
Signed-off-by: Ilya Ledvich 
Signed-off-by: Uri Mashiach 
---
  arch/arm/boot/dts/am335x-cm-t335.dts | 33 +
  1 file changed, 33 insertions(+)

diff --git a/arch/arm/boot/dts/am335x-cm-t335.dts 
b/arch/arm/boot/dts/am335x-cm-t335.dts
index 9d6117a..976c330 100644
--- a/arch/arm/boot/dts/am335x-cm-t335.dts
+++ b/arch/arm/boot/dts/am335x-cm-t335.dts
@@ -31,6 +31,14 @@
linux,default-trigger = "heartbeat";
};
};
+
+   /* regulator for mmc */
+   vmmc_fixed: fixedregulator@0 {
+   compatible = "regulator-fixed";
+   regulator-name = "vmmc_fixed";
+   regulator-min-microvolt = <330>;
+   regulator-max-microvolt = <330>;
+   };
  };

  _pinmux {
@@ -104,6 +112,23 @@
0x174 (PIN_OUTPUT_PULLDOWN | MUX_MODE0)
>;
};
+
+   mmc1_pins: pinmux_mmc1_pins {
+   pinctrl-single,pins = <
+   /* mmc0_dat3.mmc0_dat3 */
+   0xf0 (PIN_INPUT_PULLUP | MUX_MODE0)
+   /* mmc0_dat2.mmc0_dat2 */
+   0xf4 (PIN_INPUT_PULLUP | MUX_MODE0)
+   /* mmc0_dat1.mmc0_dat1 */
+   0xf8 (PIN_INPUT_PULLUP | MUX_MODE0)
+   /* mmc0_dat0.mmc0_dat0 */
+   0xfc (PIN_INPUT_PULLUP | MUX_MODE0)
+   /* mmc0_clk.mmc0_clk */
+   0x100 (PIN_INPUT_PULLUP | MUX_MODE0)
+   /* mmc0_cmd.mmc0_cmd */
+   0x104 (PIN_INPUT_PULLUP | MUX_MODE0)
+   >;
+   };
  };

   {
@@ -203,3 +228,11 @@
status = "okay";
  };

+ {
+   status = "okay";
+   vmmc-supply = <_fixed>;
+   bus-width = <4>;
+   pinctrl-names = "default";
+   pinctrl-0 = <_pins>;
+};
+


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[PATCH] rtc: ds1307: fix kernel splat due to wakeup irq handling

[Felipe Balbi]

Since commit 3fffd1283927 ("i2c: allow specifying
separate wakeup interrupt in device tree") we have
automatic wakeup irq support for i2c devices. That
commit missed the fact that rtc-1307 had its own
wakeup irq handling and ended up introducing a
kernel splat for at least Beagle x15 boards.

Fix that by reverting original commit _and_ passing
correct interrupt names on DTS so i2c-core can
choose correct IRQ as wakeup.

Now that we have automatic wakeirq support, we can
revert the original commit which did it manually.

Fixes the following warning:

[   10.346582] WARNING: CPU: 1 PID: 263 at 
linux/drivers/base/power/wakeirq.c:43 dev_pm_attach_wake_irq+0xbc/0xd4()
[   10.359244] rtc-ds1307 2-006f: wake irq already initialized

Cc: Tony Lindgren 
Cc: Nishanth Menon 
Signed-off-by: Felipe Balbi 
---
 arch/arm/boot/dts/am57xx-beagle-x15.dts |  1 +
 drivers/rtc/rtc-ds1307.c| 36 +++--
 2 files changed, 4 insertions(+), 33 deletions(-)

diff --git a/arch/arm/boot/dts/am57xx-beagle-x15.dts 
b/arch/arm/boot/dts/am57xx-beagle-x15.dts
index d9ba6b879fc1..00352e761b8c 100644
--- a/arch/arm/boot/dts/am57xx-beagle-x15.dts
+++ b/arch/arm/boot/dts/am57xx-beagle-x15.dts
@@ -604,6 +604,7 @@
reg = <0x6f>;
interrupts-extended = <_mpu GIC_SPI 2 
IRQ_TYPE_EDGE_RISING>,
  <_pmx_core 0x424>;
+   interrupt-names = "irq", "wakeup";
 
pinctrl-names = "default";
pinctrl-0 = <_pins_default>;
diff --git a/drivers/rtc/rtc-ds1307.c b/drivers/rtc/rtc-ds1307.c
index 188006c55ce0..325836818826 100644
--- a/drivers/rtc/rtc-ds1307.c
+++ b/drivers/rtc/rtc-ds1307.c
@@ -15,9 +15,6 @@
 #include 
 #include 
 #include 
-#include 
-#include 
-#include 
 #include 
 #include 
 #include 
@@ -117,7 +114,6 @@ struct ds1307 {
 #define HAS_ALARM  1   /* bit 1 == irq claimed */
struct i2c_client   *client;
struct rtc_device   *rtc;
-   int wakeirq;
s32 (*read_block_data)(const struct i2c_client *client, u8 command,
   u8 length, u8 *values);
s32 (*write_block_data)(const struct i2c_client *client, u8 command,
@@ -1146,8 +1142,6 @@ read_rtc:
}
 
if (want_irq) {
-   struct device_node *node = client->dev.of_node;
-
err = devm_request_threaded_irq(>dev,
client->irq, NULL, irq_handler,
IRQF_SHARED | IRQF_ONESHOT,
@@ -1155,34 +1149,13 @@ read_rtc:
if (err) {
client->irq = 0;
dev_err(>dev, "unable to request IRQ!\n");
-   goto no_irq;
-   }
-
-   set_bit(HAS_ALARM, >flags);
-   dev_dbg(>dev, "got IRQ %d\n", client->irq);
-
-   /* Currently supported by OF code only! */
-   if (!node)
-   goto no_irq;
-
-   err = of_irq_get(node, 1);
-   if (err <= 0) {
-   if (err == -EPROBE_DEFER)
-   goto exit;
-   goto no_irq;
-   }
-   ds1307->wakeirq = err;
+   } else {
 
-   err = dev_pm_set_dedicated_wake_irq(>dev,
-   ds1307->wakeirq);
-   if (err) {
-   dev_err(>dev, "unable to setup wakeIRQ %d!\n",
-   err);
-   goto exit;
+   set_bit(HAS_ALARM, >flags);
+   dev_dbg(>dev, "got IRQ %d\n", client->irq);
}
}
 
-no_irq:
if (chip->nvram_size) {
 
ds1307->nvram = devm_kzalloc(>dev,
@@ -1226,9 +1199,6 @@ static int ds1307_remove(struct i2c_client *client)
 {
struct ds1307 *ds1307 = i2c_get_clientdata(client);
 
-   if (ds1307->wakeirq)
-   dev_pm_clear_wake_irq(>dev);
-
if (test_and_clear_bit(HAS_NVRAM, >flags))
sysfs_remove_bin_file(>dev.kobj, ds1307->nvram);
 
-- 
2.6.2

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[PATCH 4/4] dmaengine: omap-dma: Handle cases when the channel is polled for completion

[Peter Ujfalusi]

When a DMA client driver decides that it is not providing callback for
completion of a transfer (and/or does not set the DMA_PREP_INTERRUPT) but
it will poll the status of the transfer (in case of short memcpy for
example) we will not get interrupt for the completion of the transfer and
will not mark the transaction as done.
Check the channel enable bit in the CCR when the status is queried and if
the channel is no longer active, we call the omap_dma_callback() to handle
the transfer completion.

Signed-off-by: Peter Ujfalusi 
---
 drivers/dma/omap-dma.c | 6 ++
 1 file changed, 6 insertions(+)

diff --git a/drivers/dma/omap-dma.c b/drivers/dma/omap-dma.c
index 4e4642f561f5..f86827ac0c8a 100644
--- a/drivers/dma/omap-dma.c
+++ b/drivers/dma/omap-dma.c
@@ -673,8 +673,14 @@ static enum dma_status omap_dma_tx_status(struct dma_chan 
*chan,
struct omap_chan *c = to_omap_dma_chan(chan);
struct virt_dma_desc *vd;
enum dma_status ret;
+   uint32_t ccr;
unsigned long flags;
 
+   ccr = omap_dma_chan_read(c, CCR);
+   /* The channel is no longer active, handle the completion right away */
+   if (!(ccr & CCR_ENABLE))
+   omap_dma_callback(c->dma_ch, 0, c);
+
ret = dma_cookie_status(chan, cookie, txstate);
if (ret == DMA_COMPLETE || !txstate)
return ret;
-- 
2.6.2

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[PATCH 3/4] dmaengine: omap-dma: Remove tasklet to start the transfers

[Peter Ujfalusi]

The use of tasklet to actually start the DMA transfer slightly decreases the
DMA throughput since it adds small scheduling delay when the transfer is
started. In normal use, even with high I/O load the tasklet would start
one transaction at a time, however running the DMAtest for memcpy on all
available channels will cause the tasklet to start about 15 transfers.
The performance numbers on OMAP4 PandaBoard-es (test_buf_size = 6553):
With the tasklet:
dmatest: dma0chan30-copy: summary 5000 tests, 0 failures 186 iops 593 KB/s (0)
dmatest: dma0chan8-copy0: summary 5000 tests, 0 failures 184 iops 584 KB/s (0)
dmatest: dma0chan13-copy: summary 5000 tests, 0 failures 184 iops 585 KB/s (0)
dmatest: dma0chan12-copy: summary 5000 tests, 0 failures 184 iops 585 KB/s (0)
dmatest: dma0chan7-copy0: summary 5000 tests, 0 failures 183 iops 581 KB/s (0)

With this patch (no tasklet):
dmatest: dma0chan4-copy0: summary 5000 tests, 0 failures 199 iops 644 KB/s (0)
dmatest: dma0chan5-copy0: summary 5000 tests, 0 failures 199 iops 645 KB/s (0)
dmatest: dma0chan6-copy0: summary 5000 tests, 0 failures 199 iops 637 KB/s (0)
dmatest: dma0chan24-copy: summary 5000 tests, 0 failures 199 iops 638 KB/s (0)
dmatest: dma0chan16-copy: summary 5000 tests, 0 failures 199 iops 638 KB/s (0)

Signed-off-by: Peter Ujfalusi 
---
 drivers/dma/omap-dma.c | 59 ++
 1 file changed, 2 insertions(+), 57 deletions(-)

diff --git a/drivers/dma/omap-dma.c b/drivers/dma/omap-dma.c
index 4afc2c18d451..4e4642f561f5 100644
--- a/drivers/dma/omap-dma.c
+++ b/drivers/dma/omap-dma.c
@@ -28,8 +28,6 @@
 struct omap_dmadev {
struct dma_device ddev;
spinlock_t lock;
-   struct tasklet_struct task;
-   struct list_head pending;
void __iomem *base;
const struct omap_dma_reg *reg_map;
struct omap_system_dma_plat_info *plat;
@@ -42,7 +40,6 @@ struct omap_dmadev {
 
 struct omap_chan {
struct virt_dma_chan vc;
-   struct list_head node;
void __iomem *channel_base;
const struct omap_dma_reg *reg_map;
uint32_t ccr;
@@ -454,33 +451,6 @@ static void omap_dma_callback(int ch, u16 status, void 
*data)
spin_unlock_irqrestore(>vc.lock, flags);
 }
 
-/*
- * This callback schedules all pending channels.  We could be more
- * clever here by postponing allocation of the real DMA channels to
- * this point, and freeing them when our virtual channel becomes idle.
- *
- * We would then need to deal with 'all channels in-use'
- */
-static void omap_dma_sched(unsigned long data)
-{
-   struct omap_dmadev *d = (struct omap_dmadev *)data;
-   LIST_HEAD(head);
-
-   spin_lock_irq(>lock);
-   list_splice_tail_init(>pending, );
-   spin_unlock_irq(>lock);
-
-   while (!list_empty()) {
-   struct omap_chan *c = list_first_entry(,
-   struct omap_chan, node);
-
-   spin_lock_irq(>vc.lock);
-   list_del_init(>node);
-   omap_dma_start_desc(c);
-   spin_unlock_irq(>vc.lock);
-   }
-}
-
 static irqreturn_t omap_dma_irq(int irq, void *devid)
 {
struct omap_dmadev *od = devid;
@@ -739,22 +709,8 @@ static void omap_dma_issue_pending(struct dma_chan *chan)
unsigned long flags;
 
spin_lock_irqsave(>vc.lock, flags);
-   if (vchan_issue_pending(>vc) && !c->desc) {
-   /*
-* c->cyclic is used only by audio and in this case the DMA need
-* to be started without delay.
-*/
-   if (!c->cyclic) {
-   struct omap_dmadev *d = to_omap_dma_dev(chan->device);
-   spin_lock(>lock);
-   if (list_empty(>node))
-   list_add_tail(>node, >pending);
-   spin_unlock(>lock);
-   tasklet_schedule(>task);
-   } else {
-   omap_dma_start_desc(c);
-   }
-   }
+   if (vchan_issue_pending(>vc) && !c->desc)
+   omap_dma_start_desc(c);
spin_unlock_irqrestore(>vc.lock, flags);
 }
 
@@ -1017,17 +973,11 @@ static int omap_dma_slave_config(struct dma_chan *chan, 
struct dma_slave_config
 static int omap_dma_terminate_all(struct dma_chan *chan)
 {
struct omap_chan *c = to_omap_dma_chan(chan);
-   struct omap_dmadev *d = to_omap_dma_dev(c->vc.chan.device);
unsigned long flags;
LIST_HEAD(head);
 
spin_lock_irqsave(>vc.lock, flags);
 
-   /* Prevent this channel being scheduled */
-   spin_lock(>lock);
-   list_del_init(>node);
-   spin_unlock(>lock);
-
/*
 * Stop DMA activity: we assume the callback will not be called
 * after omap_dma_stop() returns (even if it does, it will see
@@ -1101,14 +1051,12 @@ static int omap_dma_chan_init(struct omap_dmadev *od)
c->reg_map = od->reg_map;

[PATCH 2/4] dmaengine: omap-dma: Clean up the prep_slave_sg sg list walk code

[Peter Ujfalusi]

The for_each_sg() macro's last parameter is inteded to be used as counter.
We can use 'i' instead of 'j' within the loop for indexes.

Signed-off-by: Peter Ujfalusi 
---
 drivers/dma/omap-dma.c | 11 +--
 1 file changed, 5 insertions(+), 6 deletions(-)

diff --git a/drivers/dma/omap-dma.c b/drivers/dma/omap-dma.c
index 8ed39ce24d46..4afc2c18d451 100644
--- a/drivers/dma/omap-dma.c
+++ b/drivers/dma/omap-dma.c
@@ -768,7 +768,7 @@ static struct dma_async_tx_descriptor 
*omap_dma_prep_slave_sg(
struct scatterlist *sgent;
struct omap_desc *d;
dma_addr_t dev_addr;
-   unsigned i, j = 0, es, en, frame_bytes;
+   unsigned i, es, en, frame_bytes;
u32 burst;
 
if (dir == DMA_DEV_TO_MEM) {
@@ -845,13 +845,12 @@ static struct dma_async_tx_descriptor 
*omap_dma_prep_slave_sg(
en = burst;
frame_bytes = es_bytes[es] * en;
for_each_sg(sgl, sgent, sglen, i) {
-   d->sg[j].addr = sg_dma_address(sgent);
-   d->sg[j].en = en;
-   d->sg[j].fn = sg_dma_len(sgent) / frame_bytes;
-   j++;
+   d->sg[i].addr = sg_dma_address(sgent);
+   d->sg[i].en = en;
+   d->sg[i].fn = sg_dma_len(sgent) / frame_bytes;
}
 
-   d->sglen = j;
+   d->sglen = sglen;
 
return vchan_tx_prep(>vc, >vd, tx_flags);
 }
-- 
2.6.2

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[PATCH 0/4] dmaengine: omap-dma: transfer start and short memcpy improvement

[Peter Ujfalusi]

Hi,

The first two patch is trivial fix.
The third (remove the tasklet use for starting the transfer):
I had been wondering about this for a while and now I was able to spend some
time to look at this in more detail.
In 'normal' operation I have never seen the tasklet to start more then one
transfer even when pushing I/O based workloads on the board. However when I run
the DMAtest module I can see that the tasklet executes about 15 transfers.
When the tasklet use has been removed, everything worked as well as before but
the throughput of MMC/SD and memcpy increased slightly:

dd if=/dev/mmcblk0 of=/dev/null bs=64k count=24000
~16.5 MB/s -> ~16.6 MB/s

echo 6553 > /sys/module/dmatest/parameters/test_buf_size
echo 2000 > /sys/module/dmatest/parameters/timeout
echo 5000 > /sys/module/dmatest/parameters/iterations
~585 KB/s -> ~638 KB/s

It worth mentioning that _with_ the tasklet starting the transfers I managed to
hit a situation once when for some reason the memcpy tests were started to time
out. This happend with memcpy, iozone, dd and grep -R blabla /usr/ running at
the same time.

The last patch is to correct the behaviour of omap-dma when short memcpy is used
by a client and the client is not using completion, but polling for the end of
the transfer.

Regards,
Peter
---
Peter Ujfalusi (4):
  dmaengine: omap-dma: Correct status reporting for memcpy
  dmaengine: omap-dma: Clean up the prep_slave_sg sg list walk code
  dmaengine: omap-dma: Remove tasklet to start the transfers
  dmaengine: omap-dma: Handle cases when the channel is polled for
completion

 drivers/dma/omap-dma.c | 78 +-
 1 file changed, 14 insertions(+), 64 deletions(-)

-- 
2.6.2

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Re: [PATCH v3 1/5] spi: introduce mmap read support for spi flash devices

[Vignesh R]

Hi Brian,

On 11/12/2015 12:54 AM, Brian Norris wrote:
> In addition to my other comments:
> 

[...]

>> +int (*spi_mtd_mmap_read)(struct  spi_device *spi,
>> + loff_t from, size_t len,
>> + size_t *retlen, u_char *buf,
>> + u8 read_opcode, u8 addr_width,
>> + u8 dummy_bytes);
> 
> This is seeming to be a longer and longer list of arguments. I know MTD
> has a bad habit of long argument lists (which then cause a ton of
> unnecessary churn when things need changed in the API), but perhaps we
> can limit the damage to the SPI layer. Perhaps this deserves a struct to
> encapsulate all the flash read arguments? Like:
> 
> struct spi_flash_read_message {
>   loff_t from;
>   size_t len;
>   size_t *retlen;
>   void *buf;
>   u8 read_opcode;
>   u8 addr_width;
>   u8 dummy_bits;
>   // additional fields to describe rx_nbits for opcode/addr/data
> };
> 
> struct spi_master {
>   ...
>   int (*spi_flash_read)(struct spi_device *spi,
> struct spi_flash_message *msg);
> };


Yeah.. I think struct encapsulation helps, this can also be used to pass
sg lists for dma in future. I will rework the series with your
suggestion to include nbits for opcode/addr/data.
Also, will add validation logic (similar to __spi_validate()) to check
whether master supports dual/quad mode for opcode/addr/data. I am
planning to add this validation code to spi_flash_read_validate(in place
of spi_mmap_read_supported())
Thanks!


-- 
Regards
Vignesh
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[PATCH v4 0/3] ARM: OMAP2+ McASP(3) support for DRA7xx family

[Peter Ujfalusi]

Hi Tony,

Changes since v3:
- rebased on mainline's HEAD
- Added Tested-by from Felipe
- Added Acked-by from Paul for the hwmod patches

Changes since v2:
- DTS patch added which is needed because of the clock handling changes

Felip Balbi reported that linux-next is broken right now since the DTS part of
the earlier series has been applied, but we do not have the mcasp hwmod in the
kernel:
...
[0.181029] platform 48468000.mcasp: Cannot lookup hwmod 'mcasp3'
...
[6.121072] davinci-mcasp 48468000.mcasp: _od_fail_runtime_resume: FIXME: 
missing hwmod/omap_dev info
[6.130790] [ cut here ]
[6.135643] WARNING: CPU: 0 PID: 244 at drivers/bus/omap_l3_noc.c:147 
l3_interrupt_handler+0x220/0x34c()
[6.145576] 4400.ocp:L3 Custom Error: MASTER MPU TARGET L4_PER2_P3 
(Read): Data Access in User mode during Functional access
...

This is the followup series for the hwmod changes needed to get audio working
on DRA7xx family based boards.
The DTS patches has been applied by Tony from the original series:
http://www.spinics.net/lists/linux-omap/msg121473.html

I have addressed your comments in the hwmod data and did some research also
regarding to the use of ahclkx as fclk in the original submission.
It turned out that McASP _needs_ all clocks to be enabled (fclk, iclk and
ahclkx/r) to be able to access registers. The original patch where we handled
the ahclkx as fclk worked, because the fclk clock got enabled in the HW w/o
any SW interaction.
All in all, the McASP found in DRA7 needs all clocks to be enabled.
To satisfy this I have introduced a new flag to hwmod, which means that the
listed optional clocks need to be handled alongside with the fclk clock.

Regards,
Peter
---
Peter Ujfalusi (3):
  ARM: DTS: dra7: Fix McASP3 node regarding to clocks
  ARM: OMAP2+: hwmod: Add hwmod flag for HWMOD_OPT_CLKS_NEEDED
  ARM: OMAP: DRA7: hwmod: Add data for McASP3

 arch/arm/boot/dts/dra7.dtsi   |  4 +-
 arch/arm/mach-omap2/omap_hwmod.c  | 66 +--
 arch/arm/mach-omap2/omap_hwmod.h  |  3 ++
 arch/arm/mach-omap2/omap_hwmod_7xx_data.c | 56 ++
 4 files changed, 97 insertions(+), 32 deletions(-)

-- 
2.6.2

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[PATCH v4 3/3] ARM: OMAP: DRA7: hwmod: Add data for McASP3

[Peter Ujfalusi]

McASP3 is used by default on DRA7x based boards for audio.

Signed-off-by: Peter Ujfalusi 
Acked-by: Paul Walmsley 
Tested-by: Felipe Balbi 
---
 arch/arm/mach-omap2/omap_hwmod_7xx_data.c | 56 +++
 1 file changed, 56 insertions(+)

diff --git a/arch/arm/mach-omap2/omap_hwmod_7xx_data.c 
b/arch/arm/mach-omap2/omap_hwmod_7xx_data.c
index 51d1ecb384bd..ee4e04434a94 100644
--- a/arch/arm/mach-omap2/omap_hwmod_7xx_data.c
+++ b/arch/arm/mach-omap2/omap_hwmod_7xx_data.c
@@ -1298,6 +1298,44 @@ static struct omap_hwmod dra7xx_mcspi4_hwmod = {
 };
 
 /*
+ * 'mcasp' class
+ *
+ */
+static struct omap_hwmod_class_sysconfig dra7xx_mcasp_sysc = {
+   .sysc_offs  = 0x0004,
+   .sysc_flags = SYSC_HAS_SIDLEMODE,
+   .idlemodes  = (SIDLE_FORCE | SIDLE_NO | SIDLE_SMART),
+   .sysc_fields= _hwmod_sysc_type3,
+};
+
+static struct omap_hwmod_class dra7xx_mcasp_hwmod_class = {
+   .name   = "mcasp",
+   .sysc   = _mcasp_sysc,
+};
+
+/* mcasp3 */
+static struct omap_hwmod_opt_clk mcasp3_opt_clks[] = {
+   { .role = "ahclkx", .clk = "mcasp3_ahclkx_mux" },
+};
+
+static struct omap_hwmod dra7xx_mcasp3_hwmod = {
+   .name   = "mcasp3",
+   .class  = _mcasp_hwmod_class,
+   .clkdm_name = "l4per2_clkdm",
+   .main_clk   = "mcasp3_aux_gfclk_mux",
+   .flags  = HWMOD_OPT_CLKS_NEEDED,
+   .prcm = {
+   .omap4 = {
+   .clkctrl_offs = DRA7XX_CM_L4PER2_MCASP3_CLKCTRL_OFFSET,
+   .context_offs = DRA7XX_RM_L4PER2_MCASP3_CONTEXT_OFFSET,
+   .modulemode   = MODULEMODE_SWCTRL,
+   },
+   },
+   .opt_clks   = mcasp3_opt_clks,
+   .opt_clks_cnt   = ARRAY_SIZE(mcasp3_opt_clks),
+};
+
+/*
  * 'mmc' class
  *
  */
@@ -2566,6 +2604,22 @@ static struct omap_hwmod_ocp_if dra7xx_l3_main_1__hdmi = 
{
.user   = OCP_USER_MPU | OCP_USER_SDMA,
 };
 
+/* l4_per2 -> mcasp3 */
+static struct omap_hwmod_ocp_if dra7xx_l4_per2__mcasp3 = {
+   .master = _l4_per2_hwmod,
+   .slave  = _mcasp3_hwmod,
+   .clk= "l4_root_clk_div",
+   .user   = OCP_USER_MPU | OCP_USER_SDMA,
+};
+
+/* l3_main_1 -> mcasp3 */
+static struct omap_hwmod_ocp_if dra7xx_l3_main_1__mcasp3 = {
+   .master = _l3_main_1_hwmod,
+   .slave  = _mcasp3_hwmod,
+   .clk= "l3_iclk_div",
+   .user   = OCP_USER_MPU | OCP_USER_SDMA,
+};
+
 /* l4_per1 -> elm */
 static struct omap_hwmod_ocp_if dra7xx_l4_per1__elm = {
.master = _l4_per1_hwmod,
@@ -3308,6 +3362,8 @@ static struct omap_hwmod_ocp_if *dra7xx_hwmod_ocp_ifs[] 
__initdata = {
_l4_wkup__dcan1,
_l4_per2__dcan2,
_l4_per2__cpgmac0,
+   _l4_per2__mcasp3,
+   _l3_main_1__mcasp3,
_gmac__mdio,
_l4_cfg__dma_system,
_l3_main_1__dss,
-- 
2.6.2

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[PATCH v4 2/3] ARM: OMAP2+: hwmod: Add hwmod flag for HWMOD_OPT_CLKS_NEEDED

[Peter Ujfalusi]

Some module needs more than one functional clock in order to be accessible,
like the McASPs found in DRA7xx family.
This flag will indicate that the opt_clks need to be handled at the same
time as the main_clk for the given hwmod, ensuring that all needed clocks
are enabled before we try to access the module's address space.

Signed-off-by: Peter Ujfalusi 
Acked-by: Paul Walmsley 
Tested-by: Felipe Balbi 
---
 arch/arm/mach-omap2/omap_hwmod.c | 66 ++--
 arch/arm/mach-omap2/omap_hwmod.h |  3 ++
 2 files changed, 39 insertions(+), 30 deletions(-)

diff --git a/arch/arm/mach-omap2/omap_hwmod.c b/arch/arm/mach-omap2/omap_hwmod.c
index cc8a987149e2..48495ad82aba 100644
--- a/arch/arm/mach-omap2/omap_hwmod.c
+++ b/arch/arm/mach-omap2/omap_hwmod.c
@@ -890,6 +890,36 @@ static int _init_opt_clks(struct omap_hwmod *oh)
return ret;
 }
 
+static void _enable_optional_clocks(struct omap_hwmod *oh)
+{
+   struct omap_hwmod_opt_clk *oc;
+   int i;
+
+   pr_debug("omap_hwmod: %s: enabling optional clocks\n", oh->name);
+
+   for (i = oh->opt_clks_cnt, oc = oh->opt_clks; i > 0; i--, oc++)
+   if (oc->_clk) {
+   pr_debug("omap_hwmod: enable %s:%s\n", oc->role,
+__clk_get_name(oc->_clk));
+   clk_enable(oc->_clk);
+   }
+}
+
+static void _disable_optional_clocks(struct omap_hwmod *oh)
+{
+   struct omap_hwmod_opt_clk *oc;
+   int i;
+
+   pr_debug("omap_hwmod: %s: disabling optional clocks\n", oh->name);
+
+   for (i = oh->opt_clks_cnt, oc = oh->opt_clks; i > 0; i--, oc++)
+   if (oc->_clk) {
+   pr_debug("omap_hwmod: disable %s:%s\n", oc->role,
+__clk_get_name(oc->_clk));
+   clk_disable(oc->_clk);
+   }
+}
+
 /**
  * _enable_clocks - enable hwmod main clock and interface clocks
  * @oh: struct omap_hwmod *
@@ -917,6 +947,9 @@ static int _enable_clocks(struct omap_hwmod *oh)
clk_enable(os->_clk);
}
 
+   if (oh->flags & HWMOD_OPT_CLKS_NEEDED)
+   _enable_optional_clocks(oh);
+
/* The opt clocks are controlled by the device driver. */
 
return 0;
@@ -948,41 +981,14 @@ static int _disable_clocks(struct omap_hwmod *oh)
clk_disable(os->_clk);
}
 
+   if (oh->flags & HWMOD_OPT_CLKS_NEEDED)
+   _disable_optional_clocks(oh);
+
/* The opt clocks are controlled by the device driver. */
 
return 0;
 }
 
-static void _enable_optional_clocks(struct omap_hwmod *oh)
-{
-   struct omap_hwmod_opt_clk *oc;
-   int i;
-
-   pr_debug("omap_hwmod: %s: enabling optional clocks\n", oh->name);
-
-   for (i = oh->opt_clks_cnt, oc = oh->opt_clks; i > 0; i--, oc++)
-   if (oc->_clk) {
-   pr_debug("omap_hwmod: enable %s:%s\n", oc->role,
-__clk_get_name(oc->_clk));
-   clk_enable(oc->_clk);
-   }
-}
-
-static void _disable_optional_clocks(struct omap_hwmod *oh)
-{
-   struct omap_hwmod_opt_clk *oc;
-   int i;
-
-   pr_debug("omap_hwmod: %s: disabling optional clocks\n", oh->name);
-
-   for (i = oh->opt_clks_cnt, oc = oh->opt_clks; i > 0; i--, oc++)
-   if (oc->_clk) {
-   pr_debug("omap_hwmod: disable %s:%s\n", oc->role,
-__clk_get_name(oc->_clk));
-   clk_disable(oc->_clk);
-   }
-}
-
 /**
  * _omap4_enable_module - enable CLKCTRL modulemode on OMAP4
  * @oh: struct omap_hwmod *
diff --git a/arch/arm/mach-omap2/omap_hwmod.h b/arch/arm/mach-omap2/omap_hwmod.h
index ca6df1a73475..76bce11c85a4 100644
--- a/arch/arm/mach-omap2/omap_hwmod.h
+++ b/arch/arm/mach-omap2/omap_hwmod.h
@@ -523,6 +523,8 @@ struct omap_hwmod_omap4_prcm {
  * HWMOD_RECONFIG_IO_CHAIN: omap_hwmod code needs to reconfigure wake-up 
  * events by calling _reconfigure_io_chain() when a device is enabled
  * or idled.
+ * HWMOD_OPT_CLKS_NEEDED: The optional clocks are needed for the module to
+ * operate and they need to be handled at the same time as the main_clk.
  */
 #define HWMOD_SWSUP_SIDLE  (1 << 0)
 #define HWMOD_SWSUP_MSTANDBY   (1 << 1)
@@ -538,6 +540,7 @@ struct omap_hwmod_omap4_prcm {
 #define HWMOD_FORCE_MSTANDBY   (1 << 11)
 #define HWMOD_SWSUP_SIDLE_ACT  (1 << 12)
 #define HWMOD_RECONFIG_IO_CHAIN(1 << 13)
+#define HWMOD_OPT_CLKS_NEEDED  (1 << 14)
 
 /*
  * omap_hwmod._int_flags definitions
-- 
2.6.2

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[PATCH v4 1/3] ARM: DTS: dra7: Fix McASP3 node regarding to clocks

[Peter Ujfalusi]

McASP node needs to list all mandatory clocks: gfclk and ahclkx

Signed-off-by: Peter Ujfalusi 
Tested-by: Felipe Balbi 
---
 arch/arm/boot/dts/dra7.dtsi | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/arch/arm/boot/dts/dra7.dtsi b/arch/arm/boot/dts/dra7.dtsi
index bc672fb91466..fe99231cbde5 100644
--- a/arch/arm/boot/dts/dra7.dtsi
+++ b/arch/arm/boot/dts/dra7.dtsi
@@ -1459,8 +1459,8 @@
interrupt-names = "tx", "rx";
dmas = <_xbar 133>, <_xbar 132>;
dma-names = "tx", "rx";
-   clocks = <_ahclkx_mux>;
-   clock-names = "fck";
+   clocks = <_aux_gfclk_mux>, <_ahclkx_mux>;
+   clock-names = "fck", "ahclkx";
status = "disabled";
};
 
-- 
2.6.2

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Re: [PATCH v3 1/5] spi: introduce mmap read support for spi flash devices

[Brian Norris]

In addition to my other comments:

On Tue, Nov 10, 2015 at 10:59:55AM +0530, Vignesh R wrote:
> In addition to providing direct access to SPI bus, some spi controller
> hardwares (like ti-qspi) provide special memory mapped port
> to accesses SPI flash devices in order to increase read performance.
> This means the controller can automatically send the SPI signals
> required to read data from the SPI flash device.
> For this, spi controller needs to know flash specific information like
> read command to use, dummy bytes and address width. Once these settings
> are populated in hardware registers, any read accesses to flash's memory
> map region(SoC specific) through memcpy (or mem-to mem DMA copy) will be
> handled by controller hardware. The hardware will automatically generate
> SPI signals required to read data from flash and present it to CPU/DMA.
> 
> Introduce spi_mtd_mmap_read() interface to support memory mapped read
> over SPI flash devices. SPI master drivers can implement this callback to
> support memory mapped read interfaces. m25p80 flash driver and other
> flash drivers can call this to request memory mapped read. The interface
> should only be used MTD flashes and cannot be used with other SPI devices.
> 
> Signed-off-by: Vignesh R 
> ---
...
> diff --git a/include/linux/spi/spi.h b/include/linux/spi/spi.h
> index cce80e6dc7d1..2f2c431b8917 100644
> --- a/include/linux/spi/spi.h
> +++ b/include/linux/spi/spi.h
> @@ -361,6 +361,11 @@ static inline void spi_unregister_driver(struct 
> spi_driver *sdrv)
>   * @handle_err: the subsystem calls the driver to handle an error that occurs
>   *   in the generic implementation of transfer_one_message().
>   * @unprepare_message: undo any work done by prepare_message().
> + * @spi_mtd_mmap_read: some spi-controller hardwares provide memory.
> + * Flash drivers (like m25p80) can request memory
> + * mapped read via this method. This interface
> + * should only be used by mtd flashes and cannot be
> + * used by other spi devices.
>   * @cs_gpios: Array of GPIOs to use as chip select lines; one per CS
>   *   number. Any individual value may be -ENOENT for CS lines that
>   *   are not GPIOs (driven by the SPI controller itself).
> @@ -507,6 +512,11 @@ struct spi_master {
>  struct spi_message *message);
>   int (*unprepare_message)(struct spi_master *master,
>struct spi_message *message);
> + int (*spi_mtd_mmap_read)(struct  spi_device *spi,
> +  loff_t from, size_t len,
> +  size_t *retlen, u_char *buf,
> +  u8 read_opcode, u8 addr_width,
> +  u8 dummy_bytes);

This is seeming to be a longer and longer list of arguments. I know MTD
has a bad habit of long argument lists (which then cause a ton of
unnecessary churn when things need changed in the API), but perhaps we
can limit the damage to the SPI layer. Perhaps this deserves a struct to
encapsulate all the flash read arguments? Like:

struct spi_flash_read_message {
loff_t from;
size_t len;
size_t *retlen;
void *buf;
u8 read_opcode;
u8 addr_width;
u8 dummy_bits;
// additional fields to describe rx_nbits for opcode/addr/data
};

struct spi_master {
...
int (*spi_flash_read)(struct spi_device *spi,
  struct spi_flash_message *msg);
};

>  
>   /*
>* These hooks are for drivers that use a generic implementation

...

Brian
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Re: [PATCH] ARM: OMAP: DRA7: hwmod: Add data for McASP3

[Paul Walmsley]

On Wed, 11 Nov 2015, Peter Ujfalusi wrote:

> On 11/11/2015 07:07 PM, Felipe Balbi wrote:
> > From: Peter Ujfalusi 
> > 
> > McASP3 is used by default on DRA7x based boards for audio.
> 
> While this patch works, it is not the correct one(s) to apply.
> https://lkml.org/lkml/2015/10/30/91
> is the series which should have been applied to 4.4.
> Paul acked the series, but for some reason it missed the initial ARM pull for 
> 4.4

It missed it because I was late getting my patches out for 4.4...


- Paul
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Re: [PATCH v3 0/3] ARM: OMAP2+ McASP(3) support for DRA7xx family

[Felipe Balbi]

Hi,

Peter Ujfalusi  writes:
> Hi Paul, Tony,
>
> Changes since v2:
> - DTS patch added which is needed because of the clock handling changes
>
> Felip Balbi reported that linux-next is broken right now since the DTS part of
> the earlier series has been applied, but we do not have the mcasp hwmod in the
> kernel:
> ...
> [0.181029] platform 48468000.mcasp: Cannot lookup hwmod 'mcasp3'
> ...
> [6.121072] davinci-mcasp 48468000.mcasp: _od_fail_runtime_resume: FIXME: 
> missing hwmod/omap_dev info
> [6.130790] [ cut here ]
> [6.135643] WARNING: CPU: 0 PID: 244 at drivers/bus/omap_l3_noc.c:147 
> l3_interrupt_handler+0x220/0x34c()
> [6.145576] 4400.ocp:L3 Custom Error: MASTER MPU TARGET L4_PER2_P3 
> (Read): Data Access in User mode during Functional access
> ...
>
> This is the followup series for the hwmod changes needed to get audio working
> on DRA7xx family based boards.
> The DTS patches has been applied by Tony from the original series:
> http://www.spinics.net/lists/linux-omap/msg121473.html
>
> I have addressed your comments in the hwmod data and did some research also
> regarding to the use of ahclkx as fclk in the original submission.
> It turned out that McASP _needs_ all clocks to be enabled (fclk, iclk and
> ahclkx/r) to be able to access registers. The original patch where we handled
> the ahclkx as fclk worked, because the fclk clock got enabled in the HW w/o
> any SW interaction.
> All in all, the McASP found in DRA7 needs all clocks to be enabled.
> To satisfy this I have introduced a new flag to hwmod, which means that the
> listed optional clocks need to be handled alongside with the fclk clock.
>
> Regards,
> Peter
> ---
> Peter Ujfalusi (3):
>   ARM: DTS: dra7: Fix McASP3 node regarding to clocks
>   ARM: OMAP2+: hwmod: Add hwmod flag for HWMOD_OPT_CLKS_NEEDED
>   ARM: OMAP: DRA7: hwmod: Add data for McASP3

I have tested these patches with today's HEAD + rtc 1307 fix. Boots fine
and I can't see the splat I was seeing with beagle x15.

Tested-by: Felipe Balbi 

logs: http://hastebin.com/ololizojat

-- 
balbi


signature.asc
Description: PGP signature

Re: [PATCH] ARM: OMAP: DRA7: hwmod: Add data for McASP3

[Peter Ujfalusi]

Felipe,

On 11/11/2015 07:07 PM, Felipe Balbi wrote:
> From: Peter Ujfalusi 
> 
> McASP3 is used by default on DRA7x based boards for audio.

While this patch works, it is not the correct one(s) to apply.
https://lkml.org/lkml/2015/10/30/91
is the series which should have been applied to 4.4.
Paul acked the series, but for some reason it missed the initial ARM pull for 
4.4

-- 
Péter

> 
> This fixes following error with Beagle x15:
> 
> [0.402190] platform 48468000.mcasp: Cannot lookup hwmod 'mcasp3'
> 
> which is followed by a splat:
> 
> [   11.207663] Unhandled fault: imprecise external abort (0x1406) at 
> 0x
> [   11.207670] [ cut here ]
> [   11.207683] WARNING: CPU: 0 PID: 272 at 
> /home/balbi/workspace/linux/drivers/bus/omap_l3_noc.c:147 
> l3_interrupt_handler+0x220/0x34c()
> [   11.207688] 4400.ocp:L3 Custom Error: MASTER MPU TARGET L4_PER2_P3 
> (Read): Data Access in User mode during Functional access
> [   11.207742] Modules linked in: snd_soc_simple_card(+) omapdss leds_gpio 
> led_class gpio_fan extcon_usb_gpio cpufreq_dt omap_wdt phy_omap_usb2 
> snd_soc_davinci_mcasp snd_soc_edma snd_soc_omap snd_soc_tlv320aic3x rtc_omap 
> snd_soc_core ti_soc_thermal dwc3_omap snd_pcm_dmaengine snd_pcm extcon_palmas 
> snd_timer extcon snd rtc_palmas rtc_ds1307 tmp102 palmas_pwrbutton 
> thermal_sys soundcore hwmon autofs4
> [   11.207748] CPU: 0 PID: 272 Comm: systemd-udevd Not tainted 
> 4.3.0-11482-g3d26f1f5fc82-dirty #27
> [   11.207751] Hardware name: Generic DRA74X (Flattened Device Tree)
> [   11.207765] [] (unwind_backtrace) from [] 
> (show_stack+0x10/0x14)
> [   11.207772] [] (show_stack) from [] 
> (dump_stack+0x84/0x9c)
> [   11.207783] [] (dump_stack) from [] 
> (warn_slowpath_common+0x78/0xb4)
> [   11.207790] [] (warn_slowpath_common) from [] 
> (warn_slowpath_fmt+0x30/0x40)
> [   11.207798] [] (warn_slowpath_fmt) from [] 
> (l3_interrupt_handler+0x220/0x34c)
> [   11.207805] [] (l3_interrupt_handler) from [] 
> (handle_irq_event_percpu+0x44/0x1f0)
> [   11.207811] [] (handle_irq_event_percpu) from [] 
> (handle_irq_event+0x38/0x5c)
> [   11.207818] [] (handle_irq_event) from [] 
> (handle_fasteoi_irq+0xcc/0x1b0)
> [   11.207824] [] (handle_fasteoi_irq) from [] 
> (generic_handle_irq+0x20/0x34)
> [   11.207829] [] (generic_handle_irq) from [] 
> (__handle_domain_irq+0x64/0xe0)
> [   11.207835] [] (__handle_domain_irq) from [] 
> (gic_handle_irq+0x40/0x8c)
> [   11.207842] [] (gic_handle_irq) from [] 
> (__irq_usr+0x54/0x80)
> [   11.207846] Exception stack(0xed143fb0 to 0xed143ff8)
> [   11.207851] 3fa0: 7f69b370 7f69b368 
> 0370 
> [   11.207857] 3fc0: b6ddb4e0 7f69b370 0016 7f69b308 be8db278 be8db2a0 
> 7f68b024 0001
> [   11.207863] 3fe0: b6ddb4e0 be8db180 b6d46a47 b6d46a50 6030 
> [   11.207866] ---[ end trace 7d8de48d1bc8fbac ]---
> 
> Signed-off-by: Peter Ujfalusi 
> Signed-off-by: Felipe Balbi 
> ---
>  arch/arm/mach-omap2/omap_hwmod_7xx_data.c | 41 
> +++
>  1 file changed, 41 insertions(+)
> 
> diff --git a/arch/arm/mach-omap2/omap_hwmod_7xx_data.c 
> b/arch/arm/mach-omap2/omap_hwmod_7xx_data.c
> index 51d1ecb384bd..b730c582a1f7 100644
> --- a/arch/arm/mach-omap2/omap_hwmod_7xx_data.c
> +++ b/arch/arm/mach-omap2/omap_hwmod_7xx_data.c
> @@ -1298,6 +1298,38 @@ static struct omap_hwmod dra7xx_mcspi4_hwmod = {
>  };
>  
>  /*
> + * 'mcasp' class
> + *
> + */
> +static struct omap_hwmod_class_sysconfig dra7xx_mcasp_sysc = {
> + .sysc_offs  = 0x0004,
> + .sysc_flags = SYSC_HAS_SIDLEMODE,
> + .idlemodes  = (SIDLE_FORCE | SIDLE_NO | SIDLE_SMART),
> + .sysc_fields= _hwmod_sysc_type3,
> +};
> +
> +static struct omap_hwmod_class dra7xx_mcasp_hwmod_class = {
> + .name   = "mcasp",
> + .sysc   = _mcasp_sysc,
> +};
> +
> +/* mcasp3 */
> +static struct omap_hwmod dra7xx_mcasp3_hwmod = {
> + .name   = "mcasp3",
> + .class  = _mcasp_hwmod_class,
> + .clkdm_name = "l4per2_clkdm",
> + .main_clk   = "mcasp3_ahclkx_mux",
> + .flags  = HWMOD_SWSUP_SIDLE,
> + .prcm = {
> + .omap4 = {
> + .clkctrl_offs = DRA7XX_CM_L4PER2_MCASP3_CLKCTRL_OFFSET,
> + .context_offs = DRA7XX_RM_L4PER2_MCASP3_CONTEXT_OFFSET,
> + .modulemode   = MODULEMODE_SWCTRL,
> + },
> + },
> +};
> +
> +/*
>   * 'mmc' class
>   *
>   */
> @@ -2566,6 +2598,14 @@ static struct omap_hwmod_ocp_if dra7xx_l3_main_1__hdmi 
> = {
>   .user   = OCP_USER_MPU | OCP_USER_SDMA,
>  };
>  
> +/* l4_per2 -> mcasp3 */
> +static struct omap_hwmod_ocp_if dra7xx_l4_per2__mcasp3 = {
> + .master = _l4_per2_hwmod,
> + .slave  = _mcasp3_hwmod,
> + .clk= "l3_iclk_div",
> + .user   = OCP_USER_MPU | OCP_USER_SDMA,
> +};
> +
>  

Re: [PATCH 5/5] arm: boot: store ATAGs structure into DT "/chosen/linux,atags" entry

[Frank Rowand]

Adding devicetree list.

Thread starts at
http://lists.infradead.org/pipermail/linux-arm-kernel/2015-July/354459.html

On 11/5/2015 8:17 AM, Tony Lindgren wrote:
> * Pali Rohár  [151105 03:41]:
>> On Tuesday 13 October 2015 16:37:46 Pali Rohár wrote:
>>> On Monday 12 October 2015 13:45:09 Tony Lindgren wrote:
 * Pali Rohár  [151012 13:29]:
> On Monday 12 October 2015 22:16:40 Tony Lindgren wrote:
>>
>> Pali, any news on posting an updated series with the comments
>> addressed in this thread? It seems that we all pretty much agree
>> what needs to be done.

I'm not real happy with the concept of patches 4 and 5 in this series.
My concern is that those two patches are using the FDT as a transport
mechanism for a binary blob (the atags object).

Patches 1 and 2 do follow the spirit of atags_to_fdt() since an
atags kernel already may set system_rev from an atag.

-Frank


>
> Tony, I'm not really sure what to do. Just wrap 4 and 5 patches into 
> CONFIG_KEXEC? Or something more?

 Well for most part your patches are fine, I think there were some
 minor comments on the series.

 For the CONFIG_KEXEC dependency, we should just keep the existing
 behavior and keep /proc/atags behind CONFIG_KEXEC. That's all
 I believe :)

 Regards,

 Tony


>>>
>>> Ok. I will add CONFIG_KEXEC into atag patches.
>>>
>>> And there is missing documentation for these two new DT properties
>>> (marked as TODO in commit messages). Where to put them?
>>>
>>
>> Tony (or somebody else) ^^^
> 
> How about Documentation/devicetree/bindings/arm/atags.txt?
> 
> Regards,
> 
> Tony
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Re: [PATCH] ARM: OMAP: DRA7: hwmod: Add data for McASP3

[Felipe Balbi]

Hi,

Peter Ujfalusi  writes:
> Felipe,
>
> On 11/11/2015 07:07 PM, Felipe Balbi wrote:
>> From: Peter Ujfalusi 
>> 
>> McASP3 is used by default on DRA7x based boards for audio.
>
> While this patch works, it is not the correct one(s) to apply.
> https://lkml.org/lkml/2015/10/30/91
> is the series which should have been applied to 4.4.
>
> Paul acked the series, but for some reason it missed the initial ARM
> pull for 4.4

okay, cool. Hopefully Tony will apply shortly.

-- 
balbi


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Description: PGP signature

Re: [PATCH 2/2] [media] include/media: move platform driver headers to a separate dir

[Arnd Bergmann]

On Wednesday 11 November 2015 15:14:48 Mauro Carvalho Chehab wrote:
>  rename include/media/{ => platform}/exynos-fimc.h (100%)
>  rename include/media/{ => platform}/mmp-camera.h (100%)
>  rename include/media/{ => platform}/omap1_camera.h (100%)
>  rename include/media/{ => platform}/omap4iss.h (100%)
>  rename include/media/{ => platform}/s3c_camif.h (100%)
>  rename include/media/{ => platform}/s5p_hdmi.h (100%)
>  rename include/media/{ => platform}/sh_mobile_ceu.h (100%)
>  rename include/media/{ => platform}/sh_mobile_csi2.h (100%)
>  rename include/media/{ => platform}/sh_vou.h (100%)
>  rename include/media/{ => platform}/sii9234.h (100%)
>  rename include/media/{ => platform}/soc_camera.h (100%)
>  rename include/media/{ => platform}/soc_camera_platform.h (98%)
>  rename include/media/{ => platform}/soc_mediabus.h (100%)

This still seems to be a mix of various things. Some of these are interfaces
between drivers, while others declare a foo_platform_data structure that
is used to interface between platform code and the driver.

I think the latter should go into include/linux/platform_data/media/*.h instead.

Arnd
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Re: [PATCH] ARM: OMAP: DRA7: hwmod: Add data for McASP3

[Tony Lindgren]

* Paul Walmsley  [15 12:23]:
> On Wed, 11 Nov 2015, Peter Ujfalusi wrote:
> 
> > On 11/11/2015 07:07 PM, Felipe Balbi wrote:
> > > From: Peter Ujfalusi 
> > > 
> > > McASP3 is used by default on DRA7x based boards for audio.
> > 
> > While this patch works, it is not the correct one(s) to apply.
> > https://lkml.org/lkml/2015/10/30/91
> > is the series which should have been applied to 4.4.
> > Paul acked the series, but for some reason it missed the initial ARM pull 
> > for 4.4
> 
> It missed it because I was late getting my patches out for 4.4...

OK applying all three as fixes with your ack like you requested
in the original thread.

Tony
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Re: [BISECTED] v4.3-rc5: OMAP1 boot hang

[Aaro Koskinen]

Hi,

Any suggestions how to debug this further? This happens also with v4.3
final. Is the CPU_SW_DOMAIN_PAN supposed to work with this CPU?

I tried to disable various drivers (e.g. NAND, USB) and it still
hangs... And it seems always at the same printk time stamp (roughly at
25 seconds).

A.

On Tue, Oct 13, 2015 at 10:30:46AM +0300, Aaro Koskinen wrote:
> Hi,
> 
> Amstrad E3 / OMAP1 boot hangs, and I bisected it to
> a5e090acbf545c0a3b04080f8a488b17ec41fe02 ("ARM: software-based
> priviledged-no-access support").
> 
> Below is the boot log. Disabling CPU_SW_DOMAIN_PAN helps.
> 
> Uncompressing Linux... done, booting the kernel.
> [0.00] Booting Linux on physical CPU 0x0
> [0.00] Initializing cgroup subsys cpu
> [0.00] Linux version 4.3.0-rc5-e3-los_df2ad+ (aaro@amd-fx-6350) (gcc 
> version 5.2.0 (GCC) ) #1 Tue Oct 13 10:08:05 EEST 2015
> [0.00] CPU: ARM925T [54029252] revision 2 (ARMv4T), cr=317f
> [0.00] CPU: VIVT data cache, VIVT instruction cache
> [0.00] Machine: Amstrad E3 (Delta)
> [0.00] Ignoring memory below PHYS_OFFSET: 0x0200-0x1000
> [0.00] Memory policy: Data cache writethrough
> [0.00] On node 0 totalpages: 8192
> [0.00] free_area_init_node: node 0, pgdat c0427018, node_mem_map 
> c1fb7000
> [0.00]   Normal zone: 64 pages used for memmap
> [0.00]   Normal zone: 0 pages reserved
> [0.00]   Normal zone: 8192 pages, LIFO batch:0
> [0.00] OMAP1510
> [0.00]  revision 2 handled as 15xx id: bc058c9b93111a16
> [0.00] Clocks: ARM_SYSST: 0x1000 DPLL_CTL: 0x2cb3 ARM_CKCTL: 0x250e
> [0.00] Clocking rate (xtal/DPLL1/MPU): 12.0/150.0/150.0 MHz
> [0.00] pcpu-alloc: s0 r0 d32768 u32768 alloc=1*32768
> [0.00] pcpu-alloc: [0] 0 
> [0.00] Built 1 zonelists in Zone order, mobility grouping on.  Total 
> pages: 8128
> [0.00] Kernel command line: mem=32M console=tty 
> console=ttyS0,115200n8 root=/dev/ram0 initrd=0x11c0,2894948 
> initcall_debug=1 loglevel=9
> [0.00] PID hash table entries: 128 (order: -3, 512 bytes)
> [0.00] Dentry cache hash table entries: 4096 (order: 2, 16384 bytes)
> [0.00] Inode-cache hash table entries: 2048 (order: 1, 8192 bytes)
> [0.00] Memory: 25136K/32768K available (3074K kernel code, 141K 
> rwdata, 864K rodata, 140K init, 212K bss, 7632K reserved, 0K cma-reserved)
> [0.00] Virtual kernel memory layout:
> [0.00] vector  : 0x - 0x1000   (   4 kB)
> [0.00] fixmap  : 0xffc0 - 0xfff0   (3072 kB)
> [0.00] vmalloc : 0xc280 - 0xff00   ( 968 MB)
> [0.00] lowmem  : 0xc000 - 0xc200   (  32 MB)
> [0.00] modules : 0xbf00 - 0xc000   (  16 MB)
> [0.00]   .text : 0xc0008000 - 0xc03e0ec4   (3940 kB)
> [0.00]   .init : 0xc03e1000 - 0xc0404000   ( 140 kB)
> [0.00]   .data : 0xc0404000 - 0xc04277e0   ( 142 kB)
> [0.00].bss : 0xc04277e0 - 0xc045c9c0   ( 213 kB)
> [0.00] SLUB: HWalign=32, Order=0-3, MinObjects=0, CPUs=1, Nodes=1
> [0.00] NR_IRQS:16 nr_irqs:16 16
> [0.00] Total of 64 interrupts in 2 interrupt banks
> [0.000131] sched_clock: 32 bits at 6MHz, resolution 166ns, wraps every 
> 357913940908ns
> [0.000382] clocksource: mpu_timer2: mask: 0x max_cycles: 
> 0x, max_idle_ns: 318543407797 ns
> [0.001561] Console: colour dummy device 80x30
> [0.009527] console [tty0] enabled
> [0.010230] Calibrating delay loop... 74.13 BogoMIPS (lpj=370688)
> [0.100420] pid_max: default: 32768 minimum: 301
> [0.101672] Mount-cache hash table entries: 1024 (order: 0, 4096 bytes)
> [0.102202] Mountpoint-cache hash table entries: 1024 (order: 0, 4096 
> bytes)
> [0.108589] CPU: Testing write buffer coherency: ok
> [0.111741] calling  init_static_idmap+0x0/0x11c @ 1
> [0.112570] Setting up static identity map for 0x10008400 - 0x1000842c
> [0.113178] initcall init_static_idmap+0x0/0x11c returned 0 after 0 usecs
> [0.113812] calling  spawn_ksoftirqd+0x0/0x30 @ 1
> [0.115210] initcall spawn_ksoftirqd+0x0/0x30 returned 0 after 0 usecs
> [0.115820] calling  init_workqueues+0x0/0x2ec @ 1
> [0.120426] initcall init_workqueues+0x0/0x2ec returned 0 after 9765 usecs
> [0.121133] calling  rand_initialize+0x0/0x34 @ 1
> [0.122426] initcall rand_initialize+0x0/0x34 returned 0 after 0 usecs
> [0.126229] devtmpfs: initialized
> [0.136417] calling  ipc_ns_init+0x0/0x44 @ 1
> [0.136959] initcall ipc_ns_init+0x0/0x44 returned 0 after 0 usecs
> [0.137461] calling  init_mmap_min_addr+0x0/0x2c @ 1
> [0.137893] initcall init_mmap_min_addr+0x0/0x2c returned 0 after 0 usecs
> [0.138440] calling  net_ns_init+0x0/0x1c8 @ 1
> [0.139019] initcall net_ns_init+0x0/0x1c8 returned 0 after 0 usecs
> [0.140507] calling  

Re: [PATCH v3 0/3] ARM: OMAP2+ McASP(3) support for DRA7xx family

[Tony Lindgren]

* Paul Walmsley  [151030 09:11]:
> Hi Péter
> 
> On Fri, 30 Oct 2015, Peter Ujfalusi wrote:
> 
> > Changes since v2:
> > - DTS patch added which is needed because of the clock handling changes
> > 
> > Felip Balbi reported that linux-next is broken right now since the DTS part 
> > of
> > the earlier series has been applied, but we do not have the mcasp hwmod in 
> > the
> > kernel:
> > ...
> > [0.181029] platform 48468000.mcasp: Cannot lookup hwmod 'mcasp3'
> > ...
> > [6.121072] davinci-mcasp 48468000.mcasp: _od_fail_runtime_resume: 
> > FIXME: missing hwmod/omap_dev info
> > [6.130790] [ cut here ]
> > [6.135643] WARNING: CPU: 0 PID: 244 at drivers/bus/omap_l3_noc.c:147 
> > l3_interrupt_handler+0x220/0x34c()
> > [6.145576] 4400.ocp:L3 Custom Error: MASTER MPU TARGET L4_PER2_P3 
> > (Read): Data Access in User mode during Functional access
> > ...
> > 
> > This is the followup series for the hwmod changes needed to get audio 
> > working
> > on DRA7xx family based boards.
> > The DTS patches has been applied by Tony from the original series:
> > http://www.spinics.net/lists/linux-omap/msg121473.html
> > 
> > I have addressed your comments in the hwmod data and did some research also
> > regarding to the use of ahclkx as fclk in the original submission.
> > It turned out that McASP _needs_ all clocks to be enabled (fclk, iclk and
> > ahclkx/r) to be able to access registers. The original patch where we 
> > handled
> > the ahclkx as fclk worked, because the fclk clock got enabled in the HW w/o
> > any SW interaction.
> > All in all, the McASP found in DRA7 needs all clocks to be enabled.
> > To satisfy this I have introduced a new flag to hwmod, which means that the
> > listed optional clocks need to be handled alongside with the fclk clock.
> 
> Thanks.  I'm happy with your series and appreciate the indepth 
> investigation.  As you probably saw last week, we've hit the limit for 
> v4.4-rc1:
> 
> http://marc.info/?l=linux-omap=144564929721826=2
> 
> This is why I haven't done anything with this series at this time.  
> Unfortunately I don't have a DRA7xx board, so I can't do any testing.  
> But if this series fixes a problem with DRA7xx in linux-next, we should 
> definitely merge it.
> 
> Tony, if you want to take this now, you can either take it with my ack, or 
> I can send a pull request.  Or, if you'd prefer to take it for v4.4-rc2, 
> I can send a pull request after v4.4-rc1.

OK I'll add your ack to the hwmod patches and apply all theree patches into
omap-for-v4.4/fixes as it fixes the splat on beagle x15 Felipe reported.

Regards,

Tony

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Re: [PATCH v3 3/3] ARM: OMAP: DRA7: hwmod: Add data for McASP3

[Tony Lindgren]

Peter,

* Peter Ujfalusi  [151030 00:55]:
> McASP3 is used by default on DRA7x based boards for audio.

Looks like this one no longer applies cleanly. Can you please
rebase and test against current mainline?

Regards,

Tony

> Signed-off-by: Peter Ujfalusi 
> ---
>  arch/arm/mach-omap2/omap_hwmod_7xx_data.c | 56 
> +++
>  1 file changed, 56 insertions(+)
> 
> diff --git a/arch/arm/mach-omap2/omap_hwmod_7xx_data.c 
> b/arch/arm/mach-omap2/omap_hwmod_7xx_data.c
> index 562247bced49..d798ebe218b2 100644
> --- a/arch/arm/mach-omap2/omap_hwmod_7xx_data.c
> +++ b/arch/arm/mach-omap2/omap_hwmod_7xx_data.c
> @@ -1298,6 +1298,44 @@ static struct omap_hwmod dra7xx_mcspi4_hwmod = {
>  };
>  
>  /*
> + * 'mcasp' class
> + *
> + */
> +static struct omap_hwmod_class_sysconfig dra7xx_mcasp_sysc = {
> + .sysc_offs  = 0x0004,
> + .sysc_flags = SYSC_HAS_SIDLEMODE,
> + .idlemodes  = (SIDLE_FORCE | SIDLE_NO | SIDLE_SMART),
> + .sysc_fields= _hwmod_sysc_type3,
> +};
> +
> +static struct omap_hwmod_class dra7xx_mcasp_hwmod_class = {
> + .name   = "mcasp",
> + .sysc   = _mcasp_sysc,
> +};
> +
> +/* mcasp3 */
> +static struct omap_hwmod_opt_clk mcasp3_opt_clks[] = {
> + { .role = "ahclkx", .clk = "mcasp3_ahclkx_mux" },
> +};
> +
> +static struct omap_hwmod dra7xx_mcasp3_hwmod = {
> + .name   = "mcasp3",
> + .class  = _mcasp_hwmod_class,
> + .clkdm_name = "l4per2_clkdm",
> + .main_clk   = "mcasp3_aux_gfclk_mux",
> + .flags  = HWMOD_OPT_CLKS_NEEDED,
> + .prcm = {
> + .omap4 = {
> + .clkctrl_offs = DRA7XX_CM_L4PER2_MCASP3_CLKCTRL_OFFSET,
> + .context_offs = DRA7XX_RM_L4PER2_MCASP3_CONTEXT_OFFSET,
> + .modulemode   = MODULEMODE_SWCTRL,
> + },
> + },
> + .opt_clks   = mcasp3_opt_clks,
> + .opt_clks_cnt   = ARRAY_SIZE(mcasp3_opt_clks),
> +};
> +
> +/*
>   * 'mmc' class
>   *
>   */
> @@ -2566,6 +2604,22 @@ static struct omap_hwmod_ocp_if dra7xx_l3_main_1__hdmi 
> = {
>   .user   = OCP_USER_MPU | OCP_USER_SDMA,
>  };
>  
> +/* l4_per2 -> mcasp3 */
> +static struct omap_hwmod_ocp_if dra7xx_l4_per2__mcasp3 = {
> + .master = _l4_per2_hwmod,
> + .slave  = _mcasp3_hwmod,
> + .clk= "l4_root_clk_div",
> + .user   = OCP_USER_MPU | OCP_USER_SDMA,
> +};
> +
> +/* l3_main_1 -> mcasp3 */
> +static struct omap_hwmod_ocp_if dra7xx_l3_main_1__mcasp3 = {
> + .master = _l3_main_1_hwmod,
> + .slave  = _mcasp3_hwmod,
> + .clk= "l3_iclk_div",
> + .user   = OCP_USER_MPU | OCP_USER_SDMA,
> +};
> +
>  static struct omap_hwmod_addr_space dra7xx_elm_addrs[] = {
>   {
>   .pa_start   = 0x48078000,
> @@ -3338,6 +3392,8 @@ static struct omap_hwmod_ocp_if *dra7xx_hwmod_ocp_ifs[] 
> __initdata = {
>   _l4_wkup__dcan1,
>   _l4_per2__dcan2,
>   _l4_per2__cpgmac0,
> + _l4_per2__mcasp3,
> + _l3_main_1__mcasp3,
>   _gmac__mdio,
>   _l4_cfg__dma_system,
>   _l3_main_1__dss,
> -- 
> 2.6.1
> 
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Re: [PATCH] ARM: OMAP: DRA7: hwmod: Add data for McASP3

[Tony Lindgren]

* Tony Lindgren  [15 13:41]:
> * Paul Walmsley  [15 12:23]:
> > On Wed, 11 Nov 2015, Peter Ujfalusi wrote:
> > 
> > > On 11/11/2015 07:07 PM, Felipe Balbi wrote:
> > > > From: Peter Ujfalusi 
> > > > 
> > > > McASP3 is used by default on DRA7x based boards for audio.
> > > 
> > > While this patch works, it is not the correct one(s) to apply.
> > > https://lkml.org/lkml/2015/10/30/91
> > > is the series which should have been applied to 4.4.
> > > Paul acked the series, but for some reason it missed the initial ARM pull 
> > > for 4.4
> > 
> > It missed it because I was late getting my patches out for 4.4...
> 
> OK applying all three as fixes with your ack like you requested
> in the original thread.

Except one of them no longer applies cleanly against the current
mainline. So waiting until Peter rebases until applying anything.

Regards,

Tony
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Re: [PATCH v3 0/3] ARM: OMAP2+ McASP(3) support for DRA7xx family

[Peter Ujfalusi]

Tony,

On 10/30/2015 06:11 PM, Paul Walmsley wrote:
> Hi Péter
> 
> On Fri, 30 Oct 2015, Peter Ujfalusi wrote:
> 
>> Changes since v2:
>> - DTS patch added which is needed because of the clock handling changes
>>
>> Felip Balbi reported that linux-next is broken right now since the DTS part 
>> of
>> the earlier series has been applied, but we do not have the mcasp hwmod in 
>> the
>> kernel:
>> ...
>> [0.181029] platform 48468000.mcasp: Cannot lookup hwmod 'mcasp3'
>> ...
>> [6.121072] davinci-mcasp 48468000.mcasp: _od_fail_runtime_resume: FIXME: 
>> missing hwmod/omap_dev info
>> [6.130790] [ cut here ]
>> [6.135643] WARNING: CPU: 0 PID: 244 at drivers/bus/omap_l3_noc.c:147 
>> l3_interrupt_handler+0x220/0x34c()
>> [6.145576] 4400.ocp:L3 Custom Error: MASTER MPU TARGET L4_PER2_P3 
>> (Read): Data Access in User mode during Functional access
>> ...
>>
>> This is the followup series for the hwmod changes needed to get audio working
>> on DRA7xx family based boards.
>> The DTS patches has been applied by Tony from the original series:
>> http://www.spinics.net/lists/linux-omap/msg121473.html
>>
>> I have addressed your comments in the hwmod data and did some research also
>> regarding to the use of ahclkx as fclk in the original submission.
>> It turned out that McASP _needs_ all clocks to be enabled (fclk, iclk and
>> ahclkx/r) to be able to access registers. The original patch where we handled
>> the ahclkx as fclk worked, because the fclk clock got enabled in the HW w/o
>> any SW interaction.
>> All in all, the McASP found in DRA7 needs all clocks to be enabled.
>> To satisfy this I have introduced a new flag to hwmod, which means that the
>> listed optional clocks need to be handled alongside with the fclk clock.
> 
> Thanks.  I'm happy with your series and appreciate the indepth 
> investigation.  As you probably saw last week, we've hit the limit for 
> v4.4-rc1:
> 
> http://marc.info/?l=linux-omap=144564929721826=2
> 
> This is why I haven't done anything with this series at this time.  
> Unfortunately I don't have a DRA7xx board, so I can't do any testing.  
> But if this series fixes a problem with DRA7xx in linux-next, we should 
> definitely merge it.
> 
> Tony, if you want to take this now, you can either take it with my ack, or 
> I can send a pull request.  Or, if you'd prefer to take it for v4.4-rc2, 
> I can send a pull request after v4.4-rc1.

The ARM soc changes for 4.4 are now pulled in to mainline, including the
DRA7/72/X15 audio related DTS changes, but this three patch is not. This means
that dra7-evm, dra72-evm and bealge-x15 will not boot from mainline.
Is there a way to push these patches as soon as possible?

Thanks,
Péter
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