Re: need help to configure IRQ on gpio 139 pandaboard using device tree
Hi Nishant, I've configured the device tree as you told me. Now, my device tree code is that: diff --git a/arch/arm/boot/dts/omap4-panda-es.dts b/arch/arm/boot/dts/omap4-panda-es.dts index 816d1c9..5644260 100644 --- a/arch/arm/boot/dts/omap4-panda-es.dts +++ b/arch/arm/boot/dts/omap4-panda-es.dts @@ -41,6 +41,12 @@ 0xb6 (PIN_OUTPUT | MUX_MODE3)/* gpio_110 */ ; }; + +lsm6db0_pins: lsm6db0_pins { +pinctrl-single,pins = +0xfc (PIN_INPUT | MUX_MODE3) /* mcspi1_cs2.gpio_139 */ +; +}; }; led_wkgpio_pins { @@ -49,6 +55,22 @@ ; }; +i2c4 { +pinctrl-names = default; +pinctrl-0 = i2c4_pins; + +clock-frequency = 40; + +lsm6db0@03 { +pinctrl-names = default; +pinctrl-0 = lsm6db0_pins; +compatible = st,lsm6db0; +reg = 0x03; +interrupts = 139 0x1; +interrupt-parent = lsm6db0_pins; +}; +}; + leds { pinctrl-0 = led_gpio_pins I've also read the documentation file Documentation/devicetree/bindings/interrupt-controller/interrupts.txt but I'm confused about the gpio muxed with mcspi1. Do you think my patch is correct? Thanks, Denis -- To unsubscribe from this list: send the line unsubscribe linux-omap in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
Re: need help to configure IRQ on gpio 139 pandaboard using device tree
Maybe, this is more correctly but still doesn't work... From 9f6e524fa86834c3ab9a5f710021620a103019b2 Mon Sep 17 00:00:00 2001 From: Denis Ciocca denis.cio...@st.com Date: Thu, 12 Dec 2013 14:52:39 +0100 Subject: [PATCH] device tree --- arch/arm/boot/dts/omap4-panda-es.dts | 22 ++ 1 file changed, 22 insertions(+) diff --git a/arch/arm/boot/dts/omap4-panda-es.dts b/arch/arm/boot/dts/omap4-panda-es.dts index 816d1c9..82c3eb7 100644 --- a/arch/arm/boot/dts/omap4-panda-es.dts +++ b/arch/arm/boot/dts/omap4-panda-es.dts @@ -41,6 +41,12 @@ 0xb6 (PIN_OUTPUT | MUX_MODE3)/* gpio_110 */ ; }; + +lsm6db0_pins: lsm6db0_pins { +pinctrl-single,pins = +0xf6 (PIN_INPUT | MUX_MODE3) /* mcspi1_simo.gpio_136 */ +; +}; }; led_wkgpio_pins { @@ -49,6 +55,22 @@ ; }; +i2c4 { +pinctrl-names = default; +pinctrl-0 = i2c4_pins; + +clock-frequency = 40; + +lsm6db0@03 { +pinctrl-names = default; +pinctrl-0 = lsm6db0_pins; +compatible = st,lsm6db0; +reg = 0x03; +interrupts = mcspi1 136 IRQ_TYPE_LEVEL_HIGH; +interrupt-parent = mcspi1; +}; +}; + leds { pinctrl-0 = led_gpio_pins -- 1.7.9.5 No one can help me? Thanks, Denis -- To unsubscribe from this list: send the line unsubscribe linux-omap in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
Re: need help to configure IRQ on gpio 139 pandaboard using device tree
why is mcspi1 your interrupt parent when you did a padconf for GPIO? you want GPIO136, so you need the right gpio block as the interrupt parent and map interrupts in the correct map. see [1] for an example (omap2). Oh my god! Now I've understand how device tree works...I'm sorry Nishanth but the dt it's new for me...ok I'm using gpio5 and now it works! +interrupt-parent = gpio5; + interrupts = 8 IRQ_TYPE_LEVEL_HIGH; /* gpio line 136 */ Thank you very much for your patience...;) BR, Denis-- To unsubscribe from this list: send the line unsubscribe linux-omap in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
need help to configure IRQ on gpio 139 pandaboard using device tree
Hi everybody, I'm trying to configure an IRQ on pandaboard using device tree but I'm not able to understand how I can do it. I want to configure the the gpio_139 pin and without device tree my command was: OMAP4_MUX(MCSPI1_SIMO, OMAP_MUX_MODE3 | OMAP_PIN_INPUT_PULLUP), I need to associate it to a i2c device, declared in this way: i2c4 { pinctrl-names = default; pinctrl-0 = i2c4_pins; clock-frequency = 40; lsm303d@03 { compatible = st,lsm303d; reg = 0x03; }; }; and it works, but I don't know how I can set the interrupt using: interrupts = GIC_SPI 119 IRQ_TYPE_LEVEL_HIGH; /* example */ Thanks, Denis-- To unsubscribe from this list: send the line unsubscribe linux-omap in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
Re: need help to configure IRQ on gpio 139 pandaboard using device tree
Hi Nishant, Thank you very much for your suggestions! Now I understand how it works...(I hope) :D BUT, now I've checked the client-irq in an i2c driver and the value is still 0... What I have to check? Thanks, Denis On 12/11/2013 04:39 PM, menon.nisha...@gmail.com wrote: On Wed, Dec 11, 2013 at 8:28 AM, Denis CIOCCA denis.cio...@st.com wrote: Hi everybody, I'm trying to configure an IRQ on pandaboard using device tree but I'm not able to understand how I can do it. I want to configure the the gpio_139 pin and without device tree my command was: OMAP4_MUX(MCSPI1_SIMO, OMAP_MUX_MODE3 | OMAP_PIN_INPUT_PULLUP), I need to associate it to a i2c device, declared in this way: here is how you'd figure it out in dt world ;) - it might be a little simpler or harder depending on which end of the development world one is from... (gmail might be screwing up my formatting a little.. so apologies before hand. http://pastebin.mozilla.org/3755622 is a copy if you need one.. anyways, step 1: from trm, you get to know that the pin is part of core SYSCTRL_PADCONF_CORE as it states for register instance in the trm. step 2: you compute the offset step 3: you define the pinctrl dt node step 4: you'd provide the device using it reference - rather trivial ;) diff --git a/arch/arm/boot/dts/omap4-panda-es.dts b/arch/arm/boot/dts/omap4-panda-es.dts index 56c4354..8f8d36c 100644 --- a/arch/arm/boot/dts/omap4-panda-es.dts +++ b/arch/arm/boot/dts/omap4-panda-es.dts @@ -41,6 +41,25 @@ 0xb6 (PIN_OUTPUT | MUX_MODE3) /* gpio_110 */ ; }; + + lsm303d_pins: lsm303d_pins { + pinctrl-single,pins = + /* + * Example for 4460 device: + * from arch/arm/boot/dts/omap4.dtsi: + * omap4_pmx_core: reg = 0x4a100040 + * the base address -- ^^ + * + * Now, the offset is computed as following: + * Download TRM: http://www.ti.com/lit/ug/swpu235aa/swpu235aa.pdf + * Searching in TRM for MCSPI1_SIMO (page 4145), you see: + * 32 bit register 0x4a100134, it is on the higher 16 bits + * 0x4a100134(SOMI) + 2 (SIMO) = 0x4a100136 + * offset hence is = 0x4a100136 - 0x4a100040 = 0xF6 + */ + 0xF6 (PIN_INPUT_PULLUP | MUX_MODE3) /* mcspi1_somi.gpio_139 */ + ; + }; }; led_wkgpio_pins { @@ -62,3 +81,16 @@ gpios = gpio1 8 GPIO_ACTIVE_HIGH; }; }; +i2c4 { + pinctrl-names = default; + pinctrl-0 = i2c4_pins; + + clock-frequency = 40; + + lsm303d@03 { + pinctrl-names = default; + pinctrl-0 = lsm303d_pins; + compatible = st,lsm303d; + reg = 0x03; + }; +}; -- To unsubscribe from this list: send the line unsubscribe linux-omap in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html