Re: [PATCH v7 00/12] omap3: pm: TWL4030 power scripts and workaround for TWL errata 27
On Mon, Feb 21, 2011 at 12:25:01PM +0530, ext Manuel, Lesly Arackal wrote: Hi Jean, On Fri, Feb 18, 2011 at 10:57 PM, Jean Pihet jean.pi...@newoldbits.com wrote: On Fri, Feb 18, 2011 at 6:08 PM, Lesly A M lesl...@ti.com wrote: Patch series for TWL4030 power scripts and workaround for TWL errata 27. Changes for implementing TWL4030 power scripts recommended by hardware team. Introduced a new TWL4030 power script file, which can be used by different OMAP3 board with the power companion chip TWL4030. Updated the changes for TWL4030 errata 27 28, modified the TWL4030 power script and voltage controller setuptime. Workaround for TWL4030 errata 27 28 is required for Si version less than or equal to TWL5030 ES1.1. TWL4030 script changes rebased on Kevin's PM tree in pm branch. Changes in v7: changes to fix Nishanth Menon's comments i) Added the TWL4030 Errata 27 fix split the first patch in v6 i) fix for twl4030 script load ii) correct the warning print during script loading Added new patch files i) pmic_info struct cleanup ii) changing sys_off signal polarity Updated the change logs This changes are tested on OMAP3430 OMAP3630 SDP with off mode enabled in suspend path. Tested with suspend/resume script, which will test system suspend in a loop. Tested for more than 1000 iterations. Good to see the TWL scripts back in the mainline kernel! Are the scripts compatible with the OMAP3 Beagleboard? I would like to test the changes on that board. I have not tested on Beagleboard. I think Beagleboard is using different PM IC TPS. If its equivalent to TRITON then this script should work on it. As far as I know they are equivalent. I don't know if the errata need to be applied though. Maybe someone from TI can comment? Cheers, Peter. -- To unsubscribe from this list: send the line unsubscribe linux-omap in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
Re: [PATCH v4 2/7] OMAP3: PM: Erratum i581 support: dll kick strategy
On Mon, Dec 20, 2010 at 11:23:27AM +0100, ext Jean Pihet wrote: On Sat, Dec 18, 2010 at 11:53 PM, Nishanth Menon n...@ti.com wrote: From: Peter 'p2' De Schrijver peter.de-schrij...@nokia.com Erratum i581 impacts OMAP3 platforms. PRCM DPLL control FSM removes SDRC_IDLEREQ before DPLL3 locks causing the DPLL not to be locked at times. IMPORTANT: *) This is not a complete workaround implementation as recommended by the silicon erratum. this is a support logic for detecting lockups and attempting to recover where possible and is known to provide stability in multiple platforms. *) This code is mostly important for inactive and retention. The ROM code waits for the maximum dll lock time when resuming from off mode. So for off mode this code isn't really needed. This should eventually get refactored as part of cleanups to sleep34xx.S Cc: Kevin Hilman khil...@deeprootsystems.com Cc: Tony Lindgren t...@atomide.com Signed-off-by: Peter 'p2' De Schrijver peter.de-schrij...@nokia.com --- (no change done, posting for completeness of the series) v2: https://patchwork.kernel.org/patch/365252/ typo correction- erratum, support, added comment from Peter from the thread to commit message v1: http://marc.info/?l=linux-omapm=129013172525234w=2 arch/arm/mach-omap2/sleep34xx.S | 52 +++--- 1 files changed, 47 insertions(+), 5 deletions(-) diff --git a/arch/arm/mach-omap2/sleep34xx.S b/arch/arm/mach-omap2/sleep34xx.S index 2c20fcf..3fbd1e5 100644 --- a/arch/arm/mach-omap2/sleep34xx.S +++ b/arch/arm/mach-omap2/sleep34xx.S @@ -42,6 +42,7 @@ OMAP3430_PM_PREPWSTST) #define PM_PWSTCTRL_MPU_P OMAP3430_PRM_BASE + MPU_MOD + OMAP2_PM_PWSTCTRL #define CM_IDLEST1_CORE_V OMAP34XX_CM_REGADDR(CORE_MOD, CM_IDLEST1) +#define CM_IDLEST_CKGEN_V OMAP34XX_CM_REGADDR(PLL_MOD, CM_IDLEST) #define SRAM_BASE_P 0x4020 #define CONTROL_STAT 0x480022F0 #define SCRATCHPAD_MEM_OFFS 0x310 /* Move this as correct place is @@ -554,31 +555,67 @@ skip_l2_inval: /* Make sure SDRC accesses are ok */ wait_sdrc_ok: + +/* DPLL3 must be locked before accessing the SDRC. Maybe the HW ensures this. */ + ldr r4, cm_idlest_ckgen +wait_dpll3_lock: + ldr r5, [r4] + tst r5, #1 + beq wait_dpll3_lock + ldr r4, cm_idlest1_core +wait_sdrc_ready: ldr r5, [r4] - and r5, r5, #0x2 - cmp r5, #0 - bne wait_sdrc_ok + tst r5, #0x2 + bne wait_sdrc_ready + /* allow DLL powerdown upon hw idle req */ ldr r4, sdrc_power ldr r5, [r4] bic r5, r5, #0x40 str r5, [r4] -wait_dll_lock: +is_dll_in_lock_mode: + /* Is dll in lock mode? */ ldr r4, sdrc_dlla_ctrl ldr r5, [r4] tst r5, #0x4 bxne lr /* wait till dll locks */ - ldr r4, sdrc_dlla_status +wait_dll_lock_timed: + ldr r4, wait_dll_lock_counter + add r4, r4, #1 + str r4, wait_dll_lock_counter + ldr r4, sdrc_dlla_status + mov r6, #8 /* Wait 20uS for lock */ +wait_dll_lock: + subs r6, r6, #0x1 + beq kick_dll It would be good to have more comments on the code flow here: - what are wait_dll_lock_counter and kick_counter used for? For debugging and statistics. So you can find out how many times a 'kick' was needed. - what is the timing based on? Why 20uS for the wait time? This is the maximum lock time of the dll according to TI for OMAP3430. - jumping back and forth to kick_dll and wait_dll_lock_timed is confusing. ldr r5, [r4] and r5, r5, #0x4 cmp r5, #0x4 bne wait_dll_lock bx lr + /* disable/reenable DLL if not locked */ +kick_dll: + ldr r4, sdrc_dlla_ctrl + ldr r5, [r4] + mov r6, r5 + bic r6, #(13) /* disable dll */ + str r6, [r4] + dsb + orr r6, r6, #(13) /* enable dll */ + str r6, [r4] + dsb + ldr r4, kick_counter + add r4, r4, #1 + str r4, kick_counter + b wait_dll_lock_timed + cm_idlest1_core: .word CM_IDLEST1_CORE_V +cm_idlest_ckgen: + .word CM_IDLEST_CKGEN_V sdrc_dlla_status: .word SDRC_DLLA_STATUS_V sdrc_dlla_ctrl: @@ -615,5 +652,10 @@ control_stat: .word CONTROL_STAT kernel_flush: .word v7_flush_dcache_all + /* these 2 words need to be at the end !!! */ +kick_counter: + .word 0 +wait_dll_lock_counter: + .word 0 Why do they need to be at the end? Also, at the end
Re: Inventra Highspeed Dual Role Controller on TI OMAP 3503
that's no official documentation. It's better to check device's datasheet when you have such questions. Besides, imagine the pain it would be to patch that Kconfig entry everytime we have a new release of an OMAP processor. Maybe it would be better to say something like: available on many OMAP processors instead of mentioning each and every one of them. It would be even better if the availability could be discovered at runtime. Cheers, Peter. -- To unsubscribe from this list: send the line unsubscribe linux-omap in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
Re: [PATCH 02/13] OMAP3: PM: Errata i581 suppport: dll kick strategy
On Wed, Nov 24, 2010 at 05:51:50PM +0100, ext Sripathy, Vishwanath wrote: Nishant, On Fri, Nov 19, 2010 at 7:24 AM, Nishanth Menon n...@ti.com wrote: From: Peter 'p2' De Schrijver peter.de-schrij...@nokia.com Errata i581 impacts OMAP3 platforms. PRCM DPLL control FSM removes SDRC_IDLEREQ before DPLL3 locks causing the DPLL not to be locked at times. IMPORTANT: this is not a complete workaround implementation as recommended by the silicon errata. this is a support logic for detecting lockups and attempting to recover where possible and is known to provide stability in multiple platforms. How does this WA work when Core enters off mode? SRAM contents are lost when Core enters off. So how this code is copied to SRAM upon wakeup? Where is this code placed when Core entered off mode? This code is mostly important for inactive and retention. The ROM code waits for the maximum dll lock time when resuming from off mode. So for off mode this code isn't really needed. Cheers, Peter. -- To unsubscribe from this list: send the line unsubscribe linux-omap in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
Re: [PATCH 1/2] OMAP3 PM: move omap3 sleep to ddr
On Fri, Nov 19, 2010 at 05:14:15PM +0100, ext Derrick, David wrote: -Original Message- From: Jean Pihet [mailto:jean.pi...@newoldbits.com] Sent: Friday, November 19, 2010 9:37 AM On Thu, Nov 18, 2010 at 7:34 PM, Jean Pihet jean.pi...@newoldbits.com wrote: On Thu, Nov 18, 2010 at 7:27 PM, Tony Lindgren t...@atomide.com wrote: * Jean Pihet jean.pi...@newoldbits.com [101118 10:06]: On Thu, Nov 18, 2010 at 6:52 PM, Tony Lindgren t...@atomide.com wrote: About the DPLL lock: 1) wait_sdrc_ok is only called when back from the non-OFF modes, 2) I checked that when running wait_sdrc_ok the CORE is already out of idle and the DPLL is already locked. Note: l-o code has no support for the voltages OFF and the external clocks OFF. What to conclude from 1) and 2)? In my test setup ot looks like wait_sdrc_ok is of no use, but I agree this a premature conclusion. Yeah we should figure out in which cases wait_sdrc_ok is needed. BTW, are you sure you're hitting core idle in your tests? Yes it is OK from the console messages and the counters values in /debug/pm_debug/count. Let me confirm asap with the PRCM registers dump. Here is what I experimented: 1) added a cache flush (v7_flush_kern_cache_all) just before WFI, in all cases, 2) checked the real state entered in low power mode from the console messages, the output of /debug/pm_debug/count and PRCM registers dump 2) is OK, which means that the RET and OFF modes are correctly hit. Can I conclude from 1) that the wake-up code is not running from the cache in RETention? [Derrick, David] To add some context to the wait_sdrc_ok function and why it was added: wait_sdrc_ok was added because the DLL takes 500 L3 clock cycles to lock. So you do not want to go back to DDR before DLL is locked. Also, we found some times DLL never locked so we introduced the DLL kick procedure to force it to lock. The root cause for the DLL not locking has been found though and a workaround implemented. So it should work now :) That still leaves the 500 L3 cycle delay though. Cheers, Peter. -- To unsubscribe from this list: send the line unsubscribe linux-omap in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
Re: [PATCH 1/2] OMAP3 PM: move omap3 sleep to ddr
On Mon, Nov 22, 2010 at 05:03:59PM +0100, ext Kevin Hilman wrote: Peter 'p2' De Schrijver peter.de-schrij...@nokia.com writes: On Fri, Nov 19, 2010 at 05:14:15PM +0100, ext Derrick, David wrote: -Original Message- From: Jean Pihet [mailto:jean.pi...@newoldbits.com] Sent: Friday, November 19, 2010 9:37 AM On Thu, Nov 18, 2010 at 7:34 PM, Jean Pihet jean.pi...@newoldbits.com wrote: On Thu, Nov 18, 2010 at 7:27 PM, Tony Lindgren t...@atomide.com wrote: * Jean Pihet jean.pi...@newoldbits.com [101118 10:06]: On Thu, Nov 18, 2010 at 6:52 PM, Tony Lindgren t...@atomide.com wrote: About the DPLL lock: 1) wait_sdrc_ok is only called when back from the non-OFF modes, 2) I checked that when running wait_sdrc_ok the CORE is already out of idle and the DPLL is already locked. Note: l-o code has no support for the voltages OFF and the external clocks OFF. What to conclude from 1) and 2)? In my test setup ot looks like wait_sdrc_ok is of no use, but I agree this a premature conclusion. Yeah we should figure out in which cases wait_sdrc_ok is needed. BTW, are you sure you're hitting core idle in your tests? Yes it is OK from the console messages and the counters values in /debug/pm_debug/count. Let me confirm asap with the PRCM registers dump. Here is what I experimented: 1) added a cache flush (v7_flush_kern_cache_all) just before WFI, in all cases, 2) checked the real state entered in low power mode from the console messages, the output of /debug/pm_debug/count and PRCM registers dump 2) is OK, which means that the RET and OFF modes are correctly hit. Can I conclude from 1) that the wake-up code is not running from the cache in RETention? [Derrick, David] To add some context to the wait_sdrc_ok function and why it was added: wait_sdrc_ok was added because the DLL takes 500 L3 clock cycles to lock. So you do not want to go back to DDR before DLL is locked. Also, we found some times DLL never locked so we introduced the DLL kick procedure to force it to lock. The root cause for the DLL not locking has been found though and a workaround implemented. So it should work now :) Is the workaround for this reflected in Nishanth's series? No. It seems not. The workaround needs VDD2 voltage scaling which seems to be missing now from l-o ? Cheers, Peter. -- To unsubscribe from this list: send the line unsubscribe linux-omap in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
Re: [PATCH 01/13] OMAP3: PM: Update clean_l2 to use v7_flush_dcache_all
On Fri, Nov 19, 2010 at 10:46:19AM +0100, ext Jean Pihet wrote: On Fri, Nov 19, 2010 at 2:54 AM, Nishanth Menon n...@ti.com wrote: From: Richard Woodruff r-woodru...@ti.com Analysis in TI kernel with ETM showed that using cache mapped flush in kernel instead of SO mapped flush cost drops by 65% (3.39mS down to 1.17mS) for clean_l2 which is used during sleep sequences. Overall: - speed up - unfortunately there isn't a good alternative flush method today - code reduction and less maintenance and potential bug in unmaintained code This also fixes the bug with the clean_l2 function usage. Reported-by: Tony Lindgren t...@atomide.com [...@ti.com: ported rkw's proposal to 2.6.37-rc2] Signed-off-by: Nishanth Menon n...@ti.com Signed-off-by: Richard Woodruff r-woodru...@ti.com --- Side note: just dcache needs to be flushed based on inputs from TI internal team arch/arm/mach-omap2/sleep34xx.S | 79 ++ 1 files changed, 13 insertions(+), 66 deletions(-) diff --git a/arch/arm/mach-omap2/sleep34xx.S b/arch/arm/mach-omap2/sleep34xx.S index 2fb205a..8f207b2 100644 --- a/arch/arm/mach-omap2/sleep34xx.S +++ b/arch/arm/mach-omap2/sleep34xx.S @@ -520,72 +520,17 @@ clean_caches: cmp r9, #1 /* Check whether L2 inval is required or not*/ bne skip_l2_inval clean_l2: - /* read clidr */ - mrc p15, 1, r0, c0, c0, 1 - /* extract loc from clidr */ - ands r3, r0, #0x700 - /* left align loc bit field */ - mov r3, r3, lsr #23 - /* if loc is 0, then no need to clean */ - beq finished - /* start clean at cache level 0 */ - mov r10, #0 -loop1: - /* work out 3x current cache level */ - add r2, r10, r10, lsr #1 - /* extract cache type bits from clidr*/ - mov r1, r0, lsr r2 - /* mask of the bits for current cache only */ - and r1, r1, #7 - /* see what cache we have at this level */ - cmp r1, #2 - /* skip if no cache, or just i-cache */ - blt skip - /* select current cache level in cssr */ - mcr p15, 2, r10, c0, c0, 0 - /* isb to sych the new cssrcsidr */ - isb - /* read the new csidr */ - mrc p15, 1, r1, c0, c0, 0 - /* extract the length of the cache lines */ - and r2, r1, #7 - /* add 4 (line length offset) */ - add r2, r2, #4 - ldr r4, assoc_mask - /* find maximum number on the way size */ - ands r4, r4, r1, lsr #3 - /* find bit position of way size increment */ - clz r5, r4 - ldr r7, numset_mask - /* extract max number of the index size*/ - ands r7, r7, r1, lsr #13 -loop2: - mov r9, r4 - /* create working copy of max way size*/ -loop3: - /* factor way and cache number into r11 */ - orr r11, r10, r9, lsl r5 - /* factor index number into r11 */ - orr r11, r11, r7, lsl r2 - /*clean invalidate by set/way */ - mcr p15, 0, r11, c7, c10, 2 - /* decrement the way*/ - subs r9, r9, #1 - bge loop3 - /*decrement the index */ - subs r7, r7, #1 - bge loop2 -skip: - add r10, r10, #2 - /* increment cache number */ - cmp r3, r10 - bgt loop1 -finished: - /*swith back to cache level 0 */ - mov r10, #0 - /* select current cache level in cssr */ - mcr p15, 2, r10, c0, c0, 0 - isb + /* + * jump out to kernel flush routine + * - resue that code is better Typo: 'reuse' + * - it executes in a cached space so is faster than refetch per-block + * - should be faster and will change with kernel + * - 'might' have to copy address, load and jump to it + */ + ldr r1, kernel_flush + mov lr, pc + bx r1 It is simpler and more efficient to use: bl v7_flush_dcache_all This doesn't work from SRAM though, because the linker will generate a PC relative branch which is wrong if the code is moved to SRAM at runtime. So the original version needs to stay :) Cheers, Peter. -- To unsubscribe from this list: send the line unsubscribe linux-omap in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
Re: BeagleBoard not resuming from uart with latest pm-core ?
On Wed, Nov 10, 2010 at 06:32:53PM +0100, ext Kevin Hilman wrote: Jean Pihet jean.pi...@newoldbits.com writes: l-o is currently broken wrt to suspend and idle. Solutions are being worked on for the moment. Kevin, are there solutions available yet? The solution to your previous problem (ensuring runtime PM transitions work during system PM) is included in my pm-core branch, but is not yet the final solution. I've been disussing this issue with the runtime PM maintainers for a final solution. Until then, I will carry this in pm-core. The other problem that I'm aware of so far I've only seen on boards with UART2 console (beagle, Overo, n900.) The printk messages that warn of N900 uses UART3 as its console... UART2 is bluetooth iirc. CHeers, Peter. -- To unsubscribe from this list: send the line unsubscribe linux-omap in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
Re: [PATCH] twl4030 reboot workaround
On Wed, Jul 28, 2010 at 11:41:32AM +0200, Rapeli Mikko (EXT-Ixonos/Oulu) wrote: From: Mikko Rapeli ext-mikko.rap...@nokia.com Original patch: http://marc.info/?l=linux-omapm=126522625032441w=2 Removes TWL4030 sleep script prior to rebooting, only on OMAP3. This is necessary since DPLL3 reset causes SYS_OFFMODE pin to go low, resulting in the sleep script being executed on TWL4030. This usually results in VDD1 VDD2 voltage collapse while ROM code is executing, followed by an MPU Watch Dog reset or worse, an irrecoverable hang. Original patch resulted in a crash due to sleeping i2c calls late in the reboot sequence. Here's how to trigger the crash: # cat /dev/urandom /foo sync(); reboot(LINUX_REBOOT_CMD_RESTART2); Kernel trace from 2.6.32: Unable to handle kernel NULL pointer dereference at virtual address pgd = c0004000 [] *pgd= Internal error: Oops: 805 [#2] PREEMPT ... [c00b3210] (exit_mmap+0x1d4/0x1f8) from [c006069c] (mmput+0x34/0x110) [c006069c] (mmput+0x34/0x110) from [c0064a90] (exit_mm+0x140/0x180) [c0064a90] (exit_mm+0x140/0x180) from [c00668ec] (do_exit+0x5d8/0x6ac) [c00668ec] (do_exit+0x5d8/0x6ac) from [c0035858] (die+0x2d4/0x2e0) [c0035858] (die+0x2d4/0x2e0) from [c0035904] (baddataabort+0x0/0x50) [c0035904] (baddataabort+0x0/0x50) from [c0274ff4] (i2c_transfer+0xec/0x104) [c0274ff4] (i2c_transfer+0xec/0x104) from [0001] (0x1) Fix is to move reboot preparations into a reboot notifier. And what if we get an OMAP3 watchdog reset ? In this case there is no software to remove the script... Cheers, Peter. -- To unsubscribe from this list: send the line unsubscribe linux-omap in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
Re: [PATCH v5 3/5] omap3: pm: Generic TRITON power scripts forOMAP3 based boards
Hi, Hi Peter, The RES_TYPE field is same for all messages. The resource which can go to low-power mode with clk_req sig de-asserting is configured as RES_TYPE2 = '2'. And the resource which can go to low-power mode with sys_off sig de-asserting is configured as RES_TYPE2 = '1'. The RES_TYPE2 is '2' for P3 wakeup and the msg will applicable for Resource which have their TYPE2 field configured '2' (RES_VINTANA1, RES_VINTANA2, RES_VINTDIG, VIO, RES_CLKEN, RES_HFCLKOUT). RES_TYPE2 = '1' for P1_P2 wakeup. (Applicable for res: RES_VPLL1, RES_VDD1, RES_VDD2, RES_REGEN, RES_NRES_PWRON, RES_SYSEN) Ok. But why not just assign the resources to the appropriate groups ? Eg. assign VIO to P3 and assign VPLL1 to P1_P2 ? Then you only need one message type. Also, why are you using RES_TYPE2 instead of RES_TYPE ? Cheers, Peter. -- goa is a state of mind -- To unsubscribe from this list: send the line unsubscribe linux-omap in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
Re: [PATCH v5 1/5] omap3: pm: fix for twl4030 script load
Hi, Hi Eduardo, The load_twl4030_script() is called from twl4030_power_init() which is again called from twl_probe(), and this is getting called before omap3_idle_init(). So the scripts are loaded before the cpuidle is initialized. Then I don't think the system will hit sys_off before loading the scripts. Regards, Lesly Hi, I agree that in our usecase the problem can probably never happen. But what if NSLEEP2 would be controlled by some external component (Ie. not OMAP) ? I don't think we can be sure that the sleep script will not be executed while the wakeup script is not yet loaded (assuming they would be loaded in the wrong order). Note that loading the script also sets the address in the corresponding TWL4030 register. So I think this safeguard is still useful. Thanks, Peter. -- To unsubscribe from this list: send the line unsubscribe linux-omap in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
FYI: DLL workaround patch for 3630
Hi,
As promised, in attachment my work around for the DLL lock issue for
3630. The patch also disables off mode for 3430 as the workaround for
this chip is slightly different. This patch is posted for informational
purposes only.
Thanks,
Peter.
--
goa is a state of mind
From 3749c16b10892e6cdfd7370f4c483ecac734f577 Mon Sep 17 00:00:00 2001
From: Peter 'p2' De Schrijver peter.de-schrij...@nokia.com
Date: Thu, 25 Mar 2010 15:04:15 +0200
Subject: [PATCH] OMAP3 PM workaround for 3630 dll locking issue
Signed-off-by: Peter 'p2' De Schrijver peter.de-schrij...@nokia.com
---
arch/arm/mach-omap2/cpuidle34xx.c | 10 +++-
arch/arm/mach-omap2/pm34xx.c | 78 +++-
2 files changed, 137 insertions(+), 5 deletions(-)
diff --git a/arch/arm/mach-omap2/cpuidle34xx.c b/arch/arm/mach-omap2/cpuidle34xx.c
index 1cb64c1..30599ae 100644
--- a/arch/arm/mach-omap2/cpuidle34xx.c
+++ b/arch/arm/mach-omap2/cpuidle34xx.c
@@ -223,13 +223,17 @@ static int omap3_enter_idle_bm(struct cpuidle_device *dev,
else
per_state = saved_per_state;
+
+ dss_state = pwrdm_read_pwrst(dss_pd);
+ if (dss_state == PWRDM_POWER_ON)
+ new_core_state = PWRDM_POWER_INACTIVE;
+
/*
* If we are attempting CORE off, check if any other
* powerdomains are at retention or higher. CORE off causes
* chipwide reset which would reset these domains also.
*/
if (new_core_state == PWRDM_POWER_OFF) {
- dss_state = pwrdm_read_pwrst(dss_pd);
iva2_state = pwrdm_read_pwrst(iva2_pd);
sgx_state = pwrdm_read_pwrst(sgx_pd);
usb_state = pwrdm_read_pwrst(usb_pd);
@@ -472,6 +476,10 @@ int __init omap3_idle_init(void)
omap_init_power_states();
cpuidle_register_driver(omap3_idle_driver);
+ /* Disable off mode on 3430 */
+ if (!cpu_is_omap3630())
+ omap3_power_states[OMAP3_STATE_C7].valid = 0;
+
dev = per_cpu(omap3_idle_dev, smp_processor_id());
for (i = OMAP3_STATE_C1; i OMAP3_MAX_STATES; i++) {
diff --git a/arch/arm/mach-omap2/pm34xx.c b/arch/arm/mach-omap2/pm34xx.c
index d75eb54..6b62f10 100644
--- a/arch/arm/mach-omap2/pm34xx.c
+++ b/arch/arm/mach-omap2/pm34xx.c
@@ -42,6 +42,7 @@
#include plat/usb.h
#include plat/resource.h
+#include plat/opp_twl_tps.h
#include asm/tlbflush.h
@@ -54,6 +55,8 @@
#include pm.h
#include sdrc.h
#include omap3-opp.h
+#include smartreflex.h
+#include clock34xx.h
static int regset_save_on_suspend;
@@ -92,6 +95,9 @@ static struct powerdomain *mpu_pwrdm, *neon_pwrdm;
static struct powerdomain *core_pwrdm, *per_pwrdm;
static int secure_ram_save_status;
static int secure_ram_saved;
+static struct clk *dpll3_clk;
+static struct omap_opp *vdd2_opp50, *vdd2_opp100;
+static u8 vdd2_opp50_vsel, vdd2_opp100_vsel;
static struct prm_setup_vc prm_setup = {
.clksetup = 0xff,
@@ -370,6 +376,7 @@ void omap_sram_idle(void)
int core_next_state = PWRDM_POWER_ON;
int core_prev_state, per_prev_state;
u32 sdrc_pwr = 0;
+ int prev_dpll3_div = 0;
if (!_omap_sram_idle)
return;
@@ -405,9 +412,10 @@ void omap_sram_idle(void)
omap3_save_neon_context();
}
- /* PER */
per_next_state = omap3_pwrdm_read_next_pwrst(per_pwrdm);
core_next_state = omap3_pwrdm_read_next_pwrst(core_pwrdm);
+
+ /* PER */
if (per_next_state PWRDM_POWER_ON) {
omap2_gpio_prepare_for_idle(per_next_state);
if (per_next_state == PWRDM_POWER_OFF)
@@ -462,6 +470,27 @@ void omap_sram_idle(void)
if (regset_save_on_suspend)
pm_dbg_regset_save(1);
+ if (core_next_state PWRDM_POWER_INACTIVE cpu_is_omap3630()) {
+ u32 clksel1_pll, v;
+
+ clksel1_pll = cm_read_mod_reg(PLL_MOD, OMAP3430_CM_CLKSEL1_PLL);
+ prev_dpll3_div = clksel1_pll 28;
+
+ if (prev_dpll3_div == 1)
+ omap3_core_dpll_m2_set_rate(dpll3_clk,
+ opp_get_freq(vdd2_opp50) * 2);
+ else
+ sr_voltagescale_vcbypass(ID_VDD(2), ID_VDD(2),
+ vdd2_opp100_vsel, vdd2_opp50_vsel);
+
+ /* enable DPLL3 autoidle */
+ v = cm_read_mod_reg(PLL_MOD, CM_AUTOIDLE);
+ v |= 1;
+ cm_write_mod_reg(v, PLL_MOD, CM_AUTOIDLE);
+ }
+
+ memcpy(save_sdrc_counters, _sdrc_counters, sizeof(save_sdrc_counters));
+
/*
* omap3_arm_context is the location where ARM registers
* get saved. The restore path then reads from this
@@ -483,6 +512,42 @@ void omap_sram_idle(void)
if (pwrdm_read_prev_pwrst(mpu_pwrdm) == PWRDM_POWER_OFF)
restore_table_entry();
+ if (core_next_state PWRDM_POWER_INACTIVE cpu_is_omap3630()) {
+ if (pwrdm_read_prev_pwrst(core_pwrdm) == PWRDM_POWER_OFF) {
+ u32 clksel1_pll;
+
+ /* ROM code restored the scratchpad settings. So DPLL3
+ * autoidle is disabled and L3 clock is back to the
+ * value before entering this function. This means we
+ * only have to lower the voltage if L3 runs at OPP50
+ */
+
+ clksel1_pll = cm_read_mod_reg(PLL_MOD,
+ OMAP3430_CM_CLKSEL1_PLL);
+ if ((clksel1_pll 28) == 2) {
+/* restore VDD2 OPP2 voltage */
+sr_voltagescale_vcbypass(ID_VDD(2), ID_VDD(2),
+ vdd2_opp50_vsel,
+ vdd2_opp100_vsel
Re: [PATCH] OMAP3 PM export chip IDCODE, Production ID and Die ID
On Tue, Oct 13, 2009 at 09:51:30PM +0200, ext Kevin Hilman wrote: On Tue, Oct 13, 2009 at 12:48 PM, Tony Lindgren t...@atomide.com wrote: * Kevin Hilman khil...@deeprootsystems.com [091013 12:09]: Peter 'p2' De Schrijver peter.de-schrij...@nokia.com writes: From: De-Schrijver Peter (Nokia-D/Helsinki) peter.de-schrij...@nokia.com This patch exports the OMAP3 IDCODE, Production ID and Die ID to userspace via sysfs. This can be used to track down silicon specific issues. The info is exported via sysfs because it should be possible to include this in corematic dumps. Signed-off-by: Peter 'p2' De Schrijver peter.de-schrij...@nokia.com Please export these via debugfs. I don't think we want to export unique chip identifiers by default. Right, which is why I suggested using debugfs, which is something that probably wouldn't be enabled/exported on default production kernels. Which is why I do not want it in debugfs as we log this info in crash reports on devices which might not have debugfs enabled. Cheers, Peter. -- goa is a state of mind -- To unsubscribe from this list: send the line unsubscribe linux-omap in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
[PATCH] OMAP3 PM Add sysfs entry for EFuse values
This patch exports the smartreflex efuse values for all 5 OPPs via
sysfs. This can be useful to track down silicon specific problems.
Signed-off-by: Peter 'p2' De Schrijver peter.de-schrij...@nokia.com
---
arch/arm/mach-omap2/smartreflex.c | 22 ++
1 files changed, 22 insertions(+), 0 deletions(-)
diff --git a/arch/arm/mach-omap2/smartreflex.c
b/arch/arm/mach-omap2/smartreflex.c
index 9fa033d..3c506d1 100644
--- a/arch/arm/mach-omap2/smartreflex.c
+++ b/arch/arm/mach-omap2/smartreflex.c
@@ -759,7 +759,24 @@ static struct kobj_attribute sr_vdd2_autocomp = {
.store = omap_sr_vdd2_autocomp_store,
};
+static ssize_t omap_sr_opp1_efuse_show(struct kobject *kobj,
+ struct kobj_attribute *attr,
+ char *buf)
+{
+ return sprintf(buf, %08x\n%08x\n%08x\n%08x\n%08x\n, sr1.opp1_nvalue,
+ sr1.opp2_nvalue,
+ sr1.opp3_nvalue,
+ sr1.opp4_nvalue,
+ sr1.opp5_nvalue);
+}
+static struct kobj_attribute sr_efuse = {
+ .attr = {
+ .name = Efuse,
+ .mode = 0444,
+ },
+ .show = omap_sr_opp1_efuse_show,
+};
static int __init omap3_sr_init(void)
{
@@ -807,6 +824,11 @@ static int __init omap3_sr_init(void)
if (ret)
printk(KERN_ERR sysfs_create_file failed: %d\n, ret);
+ ret = sysfs_create_file(power_kobj, sr_efuse.attr);
+ if (ret)
+ printk(KERN_ERR sysfs_create_file failed for OPP data: %d\n,
+ ret);
+
return 0;
}
--
1.6.2.4
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[PATCH] OMAP3 PM export chip IDCODE, Production ID and Die ID
From: De-Schrijver Peter (Nokia-D/Helsinki) peter.de-schrij...@nokia.com
This patch exports the OMAP3 IDCODE, Production ID and Die ID to userspace via
sysfs. This can be used to track down silicon specific issues. The info is
exported via sysfs because it should be possible to include this in corematic
dumps.
Signed-off-by: Peter 'p2' De Schrijver peter.de-schrij...@nokia.com
---
arch/arm/mach-omap2/id.c | 36
1 files changed, 36 insertions(+), 0 deletions(-)
diff --git a/arch/arm/mach-omap2/id.c b/arch/arm/mach-omap2/id.c
index 2c5e0a3..97670e2 100644
--- a/arch/arm/mach-omap2/id.c
+++ b/arch/arm/mach-omap2/id.c
@@ -70,6 +70,10 @@ EXPORT_SYMBOL(omap_type);
/**/
#define OMAP_TAP_IDCODE0x0204
+#define OMAP_TAP_PROD_ID_0 0x0208
+#define OMAP_TAP_PROD_ID_1 0x020c
+#define OMAP_TAP_PROD_ID_2 0x0210
+#define OMAP_TAP_PROD_ID_3 0x0214
#define OMAP_TAP_DIE_ID_0 0x0218
#define OMAP_TAP_DIE_ID_1 0x021C
#define OMAP_TAP_DIE_ID_2 0x0220
@@ -77,6 +81,10 @@ EXPORT_SYMBOL(omap_type);
#define read_tap_reg(reg) __raw_readl(tap_base + (reg))
+static ssize_t idcode_show(struct kobject *, struct kobj_attribute *, char *);
+static struct kobj_attribute idcode_attr = __ATTR(idcode, 0444, idcode_show,
+ NULL);
+
struct omap_id {
u16 hawkeye;/* Silicon type (Hawkeye id) */
u8 dev;/* Device type from production_id reg */
@@ -96,6 +104,23 @@ static struct omap_id omap_ids[] __initdata = {
static void __iomem *tap_base;
static u16 tap_prod_id;
+static ssize_t idcode_show(struct kobject *kobj, struct kobj_attribute *attr,
+ char *buf)
+{
+ return sprintf(buf, IDCODE: %08x\nProduction ID: %08x %08x %08x %08x\n
+ Die ID: %08x %08x %08x %08x\n,
+ read_tap_reg(OMAP_TAP_IDCODE),
+ read_tap_reg(OMAP_TAP_PROD_ID_0),
+ read_tap_reg(OMAP_TAP_PROD_ID_1),
+ read_tap_reg(OMAP_TAP_PROD_ID_2),
+ read_tap_reg(OMAP_TAP_PROD_ID_3),
+ read_tap_reg(OMAP_TAP_DIE_ID_0),
+ read_tap_reg(OMAP_TAP_DIE_ID_1),
+ read_tap_reg(OMAP_TAP_DIE_ID_2),
+ read_tap_reg(OMAP_TAP_DIE_ID_3));
+
+}
+
void __init omap24xx_check_revision(void)
{
int i, j;
@@ -259,3 +284,14 @@ void __init omap2_set_globals_tap(struct omap_globals
*omap2_globals)
else
tap_prod_id = 0x0208;
}
+
+void __init export_omapid(void)
+{
+ int error;
+
+ error = sysfs_create_file(power_kobj, idcode_attr.attr);
+ if (error)
+ printk(KERN_ERR sysfs_create_file failed: %d\n, error);
+}
+
+late_initcall(export_omapid);
--
1.6.2.4
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[PATCH] OMAP3 PM restore observability settings after off mode
This patch restores the observability settings after resuming from off mode.
Signed-off-by: Peter 'p2' De Schrijver peter.de-schrij...@nokia.com
---
arch/arm/mach-omap2/debobs.c |9 +
arch/arm/mach-omap2/pm34xx.c |4
arch/arm/plat-omap/include/mach/debobs.h |1 +
3 files changed, 14 insertions(+), 0 deletions(-)
diff --git a/arch/arm/mach-omap2/debobs.c b/arch/arm/mach-omap2/debobs.c
index 4fbabef..d25b9a2 100644
--- a/arch/arm/mach-omap2/debobs.c
+++ b/arch/arm/mach-omap2/debobs.c
@@ -190,6 +190,15 @@ static inline int __init _new_debobs_pad(struct debobs_pad
*pad, char *name,
/* Public functions */
+void debobs_restore(void)
+{
+ struct debobs_pad *p = debobs_pads[0];
+ int i;
+
+ for (i = 0; i NUM_OF_DEBOBS_PADS; i++, p++)
+ debobs_set(p-core_obs, p-core_obs.value);
+}
+
void debug_gpio_set(unsigned gpio, int value)
{
if (!debobs_initialized)
diff --git a/arch/arm/mach-omap2/pm34xx.c b/arch/arm/mach-omap2/pm34xx.c
index 553fe02..20c7ea2 100644
--- a/arch/arm/mach-omap2/pm34xx.c
+++ b/arch/arm/mach-omap2/pm34xx.c
@@ -42,6 +42,7 @@
#include mach/dma.h
#include mach/gpmc.h
#include mach/dma.h
+#include mach/debobs.h
#include asm/tlbflush.h
#include cm.h
@@ -124,6 +125,9 @@ static void omap3_core_restore_context(void)
/* Restore the interrupt controller context */
omap3_intc_restore_context();
omap_dma_global_context_restore();
+ /* restore debobs context */
+ debobs_restore();
+
}
static void omap3_save_secure_ram_context(u32 target_mpu_state)
diff --git a/arch/arm/plat-omap/include/mach/debobs.h
b/arch/arm/plat-omap/include/mach/debobs.h
index 67f765d..1e04bcd 100644
--- a/arch/arm/plat-omap/include/mach/debobs.h
+++ b/arch/arm/plat-omap/include/mach/debobs.h
@@ -3,5 +3,6 @@
void debug_gpio_set(unsigned gpio, int value);
int debug_gpio_get(unsigned gpio);
+void debobs_restore(void);
#endif
--
1.6.2.4
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Re: [PATCH] Fix the size of twl4030 script
On Thu, May 14, 2009 at 01:40:14AM +0200, ext Tony Lindgren wrote: * Kim Kyuwon chamm...@gmail.com [090506 18:36]: Hi All, I sent this patch about 1 month ago. Can anybody check I'm sending correct patch? Peter, care to ack? Any news on sending the scripts part of twl driver upstream? Regards, Ack. No news on sending this upstream yet. Too busy resolving other problems now :( Cheers, Peter. -- goa is a state of mind -- To unsubscribe from this list: send the line unsubscribe linux-omap in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
Re: [PATCH] twl4030: Add some error checking to twl4030 init
Hi, Whitespace-fixed version and passed through checkpatch.pl Check for return values of i2c read/write operations and size of scripts being uploaded to TWL4030 Signed-off-by: Amit Kucheria amit.kuche...@verdurent.com Acked-by: Peter De Schrijver peter.de-schrij...@nokia.com -- goa is a state of mind -- To unsubscribe from this list: send the line unsubscribe linux-omap in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
[PATCH] TWL4030: add function to send PB messages
This patch moves sending of powerbus messages to a separate function. It also
makes sure I2C access to the powerbus is enabled.
Signed-off-by: Peter 'p2' De Schrijver peter.de-schrij...@nokia.com
---
drivers/regulator/twl4030-regulator.c | 72 +---
1 files changed, 65 insertions(+), 7 deletions(-)
diff --git a/drivers/regulator/twl4030-regulator.c
b/drivers/regulator/twl4030-regulator.c
index 472c35a..df9a94b 100644
--- a/drivers/regulator/twl4030-regulator.c
+++ b/drivers/regulator/twl4030-regulator.c
@@ -16,6 +16,7 @@
#include linux/regulator/driver.h
#include linux/regulator/machine.h
#include linux/i2c/twl4030.h
+#include linux/delay.h
/*
@@ -81,6 +82,69 @@ twl4030reg_write(struct twlreg_info *info, unsigned offset,
u8 value)
value, info-base + offset);
}
+static int twl4030_wait_pb_ready(void)
+{
+
+ u8 pb_status;
+ int status, timeout = 10;
+
+ do {
+ status = twl4030_i2c_read_u8(TWL4030_MODULE_PM_MASTER,
+ pb_status, 0x14);
+ if (status 0)
+ return status;
+
+ if (!(pb_status 1))
+ return 0;
+
+ mdelay(1);
+ timeout--;
+
+ } while (timeout);
+
+ return -ETIMEDOUT;
+}
+
+static int twl4030_send_pb_msg(unsigned msg)
+{
+
+ u8 pb_state;
+ int status;
+
+ /* save powerbus configuration */
+ status = twl4030_i2c_read_u8(TWL4030_MODULE_PM_MASTER,
+ pb_state, 0x14);
+ if (status 0)
+ return status;
+
+ /* Enable I2C access to powerbus */
+ status = twl4030_i2c_write_u8(TWL4030_MODULE_PM_MASTER,
+ pb_state | (11));
+ if (status 0)
+ return status;
+
+ status = twl4030_wait_pb_ready();
+ if (status 0)
+ return status;
+
+ status = twl4030_i2c_write_u8(TWL4030_MODULE_PM_MASTER, msg 8,
+ 0x15 /* PB_WORD_MSB */);
+ if (status 0)
+ return status;
+
+ status = twl4030_i2c_write_u8(TWL4030_MODULE_PM_MASTER, msg 0xff,
+ 0x16 /* PB_WORD_LSB */);
+ if (status 0)
+ return status;
+
+ status = twl4030_wait_pb_ready();
+ if (status 0)
+ return status;
+
+ /* Restore powerbus configuration */
+ return twl4030_i2c_write_u8(TWL4030_MODULE_PM_MASTER, pb_state, 0x14);
+}
+
/*--*/
/* generic power resource operations, which work on all regulators */
@@ -177,13 +241,7 @@ static int twl4030reg_set_mode(struct regulator_dev *rdev,
unsigned mode)
if (!(status (P3_GRP | P2_GRP | P1_GRP)))
return -EACCES;
- status = twl4030_i2c_write_u8(TWL4030_MODULE_PM_MASTER,
- message 8, 0x15 /* PB_WORD_MSB */ );
- if (status = 0)
- return status;
-
- return twl4030_i2c_write_u8(TWL4030_MODULE_PM_MASTER,
- message, 0x16 /* PB_WORD_LSB */ );
+ return twl4030_send_pb_msg(message);
}
/*--*/
--
1.5.6.3
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[PATCH] TWL4030: Make sure the regulator is active after calling twl4030reg_enable
This patch makes sure a regulator is active when enabled. After a warm reboot,
only adding
a regulator to a power group is not enough to activate it.
Signed-off-by: Peter 'p2' De Schrijver peter.de-schrij...@nokia.com
---
drivers/regulator/twl4030-regulator.c | 11 +--
1 files changed, 9 insertions(+), 2 deletions(-)
diff --git a/drivers/regulator/twl4030-regulator.c
b/drivers/regulator/twl4030-regulator.c
index df9a94b..80a4e10 100644
--- a/drivers/regulator/twl4030-regulator.c
+++ b/drivers/regulator/twl4030-regulator.c
@@ -177,14 +177,21 @@ static int twl4030reg_is_enabled(struct regulator_dev
*rdev)
static int twl4030reg_enable(struct regulator_dev *rdev)
{
struct twlreg_info *info = rdev_get_drvdata(rdev);
- int grp;
+ int grp, status;
+ unsignedmessage;
grp = twl4030reg_read(info, VREG_GRP);
if (grp 0)
return grp;
grp |= P1_GRP;
- return twl4030reg_write(info, VREG_GRP, grp);
+ status = twl4030reg_write(info, VREG_GRP, grp);
+ if (status 0)
+ return status;
+
+ message = MSG_SINGULAR(DEV_GRP_P1, info-id, RES_STATE_ACTIVE);
+
+ return twl4030_send_pb_msg(message);
}
static int twl4030reg_disable(struct regulator_dev *rdev)
--
1.5.6.3
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[PATCH] TWL4030: Make sure the regulator is active after calling twl4030reg_enable
This patch makes sure a regulator is active when enabled. After a warm reboot,
only adding
a regulator to a power group is not enough to activate it.
Signed-off-by: Peter 'p2' De Schrijver peter.de-schrij...@nokia.com
---
drivers/regulator/twl4030-regulator.c | 11 +--
1 files changed, 9 insertions(+), 2 deletions(-)
diff --git a/drivers/regulator/twl4030-regulator.c
b/drivers/regulator/twl4030-regulator.c
index df9a94b..80a4e10 100644
--- a/drivers/regulator/twl4030-regulator.c
+++ b/drivers/regulator/twl4030-regulator.c
@@ -177,14 +177,21 @@ static int twl4030reg_is_enabled(struct regulator_dev
*rdev)
static int twl4030reg_enable(struct regulator_dev *rdev)
{
struct twlreg_info *info = rdev_get_drvdata(rdev);
- int grp;
+ int grp, status;
+ unsignedmessage;
grp = twl4030reg_read(info, VREG_GRP);
if (grp 0)
return grp;
grp |= P1_GRP;
- return twl4030reg_write(info, VREG_GRP, grp);
+ status = twl4030reg_write(info, VREG_GRP, grp);
+ if (status 0)
+ return status;
+
+ message = MSG_SINGULAR(DEV_GRP_P1, info-id, RES_STATE_ACTIVE);
+
+ return twl4030_send_pb_msg(message);
}
static int twl4030reg_disable(struct regulator_dev *rdev)
--
1.5.6.3
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[PATCH] TWL4030: add function to send PB messages
And now with fix to make it compile.
This patch moves sending of powerbus messages to a separate function. It also
makes sure I2C access to the powerbus is enabled.
Signed-off-by: Peter 'p2' De Schrijver peter.de-schrij...@nokia.com
---
drivers/regulator/twl4030-regulator.c | 72 +---
1 files changed, 65 insertions(+), 7 deletions(-)
diff --git a/drivers/regulator/twl4030-regulator.c
b/drivers/regulator/twl4030-regulator.c
index 472c35a..df9a94b 100644
--- a/drivers/regulator/twl4030-regulator.c
+++ b/drivers/regulator/twl4030-regulator.c
@@ -16,6 +16,7 @@
#include linux/regulator/driver.h
#include linux/regulator/machine.h
#include linux/i2c/twl4030.h
+#include linux/delay.h
/*
@@ -81,6 +82,69 @@ twl4030reg_write(struct twlreg_info *info, unsigned offset,
u8 value)
value, info-base + offset);
}
+static int twl4030_wait_pb_ready(void)
+{
+
+ u8 pb_status;
+ int status, timeout = 10;
+
+ do {
+ status = twl4030_i2c_read_u8(TWL4030_MODULE_PM_MASTER,
+ pb_status, 0x14);
+ if (status 0)
+ return status;
+
+ if (!(pb_status 1))
+ return 0;
+
+ mdelay(1);
+ timeout--;
+
+ } while (timeout);
+
+ return -ETIMEDOUT;
+}
+
+static int twl4030_send_pb_msg(unsigned msg)
+{
+
+ u8 pb_state;
+ int status;
+
+ /* save powerbus configuration */
+ status = twl4030_i2c_read_u8(TWL4030_MODULE_PM_MASTER,
+ pb_state, 0x14);
+ if (status 0)
+ return status;
+
+ /* Enable I2C access to powerbus */
+ status = twl4030_i2c_write_u8(TWL4030_MODULE_PM_MASTER,
+ pb_state | (11), 0x14);
+ if (status 0)
+ return status;
+
+ status = twl4030_wait_pb_ready();
+ if (status 0)
+ return status;
+
+ status = twl4030_i2c_write_u8(TWL4030_MODULE_PM_MASTER, msg 8,
+ 0x15 /* PB_WORD_MSB */);
+ if (status 0)
+ return status;
+
+ status = twl4030_i2c_write_u8(TWL4030_MODULE_PM_MASTER, msg 0xff,
+ 0x16 /* PB_WORD_LSB */);
+ if (status 0)
+ return status;
+
+ status = twl4030_wait_pb_ready();
+ if (status 0)
+ return status;
+
+ /* Restore powerbus configuration */
+ return twl4030_i2c_write_u8(TWL4030_MODULE_PM_MASTER, pb_state, 0x14);
+}
+
/*--*/
/* generic power resource operations, which work on all regulators */
@@ -177,13 +241,7 @@ static int twl4030reg_set_mode(struct regulator_dev *rdev,
unsigned mode)
if (!(status (P3_GRP | P2_GRP | P1_GRP)))
return -EACCES;
- status = twl4030_i2c_write_u8(TWL4030_MODULE_PM_MASTER,
- message 8, 0x15 /* PB_WORD_MSB */ );
- if (status = 0)
- return status;
-
- return twl4030_i2c_write_u8(TWL4030_MODULE_PM_MASTER,
- message, 0x16 /* PB_WORD_LSB */ );
+ return twl4030_send_pb_msg(message);
}
/*--*/
--
1.5.6.3
--
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[PATCH 1/1] Activate VDD1, VDD2 and VPLL1 at startup
This patch activates VDD1, VDD2 and VPLL1 when booting. This is necessary because these resources are in warm reset state after a reboot. This means their voltage levels cannot be modified so DVFS and smartreflex don't work. Signed-off-by: Peter 'p2' De Schrijver peter.de-schrij...@nokia.com --- drivers/regulator/twl4030-regulator.c | 18 +- 1 files changed, 17 insertions(+), 1 deletions(-) diff --git a/drivers/regulator/twl4030-regulator.c b/drivers/regulator/twl4030-regulator.c index 80a4e10..ab2a726 100644 --- a/drivers/regulator/twl4030-regulator.c +++ b/drivers/regulator/twl4030-regulator.c @@ -506,6 +506,22 @@ static int twl4030reg_probe(struct platform_device *pdev) } platform_set_drvdata(pdev, rdev); + /* VDD1, VDD2 and VPLL1 are left in warm reset state after a reboot. +* We need to put them back to active state for DVFS and smartreflex. +*/ + + if (twl4030_send_pb_msg(MSG_SINGULAR(DEV_GRP_P1, RES_VDD1, + RES_STATE_ACTIVE)) 0) + pr_err(Unable to activate VDD1\n); + + if (twl4030_send_pb_msg(MSG_SINGULAR(DEV_GRP_P1, RES_VDD2, + RES_STATE_ACTIVE)) 0) + pr_err(Unable to activate VDD2\n); + + if (twl4030_send_pb_msg(MSG_SINGULAR(DEV_GRP_P1, RES_VPLL1, + RES_STATE_ACTIVE)) 0) + pr_err(Unable to activate VPLL1\n); + /* NOTE: many regulators support short-circuit IRQs (presentable * as REGULATOR_OVER_CURRENT notifications?) configured via: * - SC_CONFIG -- 1.5.6.3 -- To unsubscribe from this list: send the line unsubscribe linux-omap in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
[PATCH] OMAP: Make sure all resources used by the gpio-switch IRQ handler are initialized before use.
Initialize the workqueue and timer used by the gpio-switch IRQ handler before
we register the IRQ handler itself.
Signed-off-by: Peter 'p2' De Schrijver peter.de-schrij...@nokia.com
---
arch/arm/plat-omap/gpio-switch.c | 13 +++--
1 files changed, 7 insertions(+), 6 deletions(-)
diff --git a/arch/arm/plat-omap/gpio-switch.c b/arch/arm/plat-omap/gpio-switch.c
index e9041af..d88b6de 100644
--- a/arch/arm/plat-omap/gpio-switch.c
+++ b/arch/arm/plat-omap/gpio-switch.c
@@ -318,6 +318,13 @@ static int __init new_switch(struct gpio_switch *sw)
else
trigger = IRQF_TRIGGER_RISING;
}
+
+ INIT_WORK(sw-work, gpio_sw_handler);
+ init_timer(sw-timer);
+
+ sw-timer.function = gpio_sw_timer;
+ sw-timer.data = (unsigned long)sw;
+
r = request_irq(gpio_to_irq(sw-gpio), gpio_sw_irq_handler,
IRQF_SHARED | trigger, sw-name, sw);
if (r 0) {
@@ -328,12 +335,6 @@ static int __init new_switch(struct gpio_switch *sw)
return r;
}
- INIT_WORK(sw-work, gpio_sw_handler);
- init_timer(sw-timer);
-
- sw-timer.function = gpio_sw_timer;
- sw-timer.data = (unsigned long)sw;
-
list_add(sw-node, gpio_switches);
return 0;
--
1.5.6.3
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[PATCH] Add new lower-latency C1 state
This patch introduces a new C state which allows MPU to go to WFI but keeps
the core domain active. This offers a much better wakeup latency (3us vs
10s of us for the current C1) at the cost of a higher power consumption.
Signed-off-by: Peter 'p2' De Schrijver peter.de-schrij...@nokia.com
---
arch/arm/mach-omap2/cpuidle34xx.c | 121 -
1 files changed, 78 insertions(+), 43 deletions(-)
diff --git a/arch/arm/mach-omap2/cpuidle34xx.c
b/arch/arm/mach-omap2/cpuidle34xx.c
index 62fbb2e..7da2fd8 100644
--- a/arch/arm/mach-omap2/cpuidle34xx.c
+++ b/arch/arm/mach-omap2/cpuidle34xx.c
@@ -26,6 +26,7 @@
#include mach/pm.h
#include mach/prcm.h
#include mach/powerdomain.h
+#include mach/clockdomain.h
#include mach/control.h
#include mach/serial.h
@@ -33,13 +34,14 @@
#ifdef CONFIG_CPU_IDLE
-#define OMAP3_MAX_STATES 7
+#define OMAP3_MAX_STATES 8
#define OMAP3_STATE_C1 1 /* C1 - MPU WFI + Core active */
-#define OMAP3_STATE_C2 2 /* C2 - MPU CSWR + Core active */
-#define OMAP3_STATE_C3 3 /* C3 - MPU OFF + Core active */
-#define OMAP3_STATE_C4 4 /* C4 - MPU RET + Core RET */
-#define OMAP3_STATE_C5 5 /* C5 - MPU OFF + Core RET */
-#define OMAP3_STATE_C6 6 /* C6 - MPU OFF + Core OFF */
+#define OMAP3_STATE_C2 2 /* C2 - MPU WFI + Core inactive */
+#define OMAP3_STATE_C3 3 /* C2 - MPU CSWR + Core inactive */
+#define OMAP3_STATE_C4 4 /* C3 - MPU OFF + Core iactive */
+#define OMAP3_STATE_C5 5 /* C4 - MPU RET + Core RET */
+#define OMAP3_STATE_C6 6 /* C5 - MPU OFF + Core RET */
+#define OMAP3_STATE_C7 7 /* C6 - MPU OFF + Core OFF */
struct omap3_processor_cx {
u8 valid;
@@ -63,6 +65,18 @@ static int omap3_idle_bm_check(void)
return 0;
}
+static int _cpuidle_allow_idle(struct powerdomain *pwrdm,
+ struct clockdomain *clkdm)
+{
+ omap2_clkdm_allow_idle(clkdm);
+}
+
+static int _cpuidle_deny_idle(struct powerdomain *pwrdm,
+ struct clockdomain *clkdm)
+{
+ omap2_clkdm_deny_idle(clkdm);
+}
+
/**
* omap3_enter_idle - Programs OMAP3 to enter the specified state
* @dev: cpuidle device
@@ -99,9 +113,19 @@ static int omap3_enter_idle(struct cpuidle_device *dev,
if (omap_irq_pending())
goto return_sleep_time;
+ if (cx-type == OMAP3_STATE_C1) {
+ pwrdm_for_each_clkdm(mpu_pd, _cpuidle_deny_idle);
+ pwrdm_for_each_clkdm(core_pd, _cpuidle_deny_idle);
+ }
+
/* Execute ARM wfi */
omap_sram_idle();
+ if (cx-type == OMAP3_STATE_C1) {
+ pwrdm_for_each_clkdm(mpu_pd, _cpuidle_allow_idle);
+ pwrdm_for_each_clkdm(core_pd, _cpuidle_allow_idle);
+ }
+
return_sleep_time:
getnstimeofday(ts_postidle);
ts_idle = timespec_sub(ts_postidle, ts_preidle);
@@ -140,79 +164,90 @@ DEFINE_PER_CPU(struct cpuidle_device, omap3_idle_dev);
/* omap3_init_power_states - Initialises the OMAP3 specific C states.
*
* Below is the desciption of each C state.
- * C1 . MPU WFI + Core active
- * C2 . MPU CSWR + Core active
- * C3 . MPU OFF + Core active
- * C4 . MPU CSWR + Core CSWR
- * C5 . MPU OFF + Core CSWR
- * C6 . MPU OFF + Core OFF
+ * C1 . MPU WFI + Core active
+ * C2 . MPU WFI + Core inactive
+ * C3 . MPU CSWR + Core inactive
+ * C4 . MPU OFF + Core inactive
+ * C5 . MPU CSWR + Core CSWR
+ * C6 . MPU OFF + Core CSWR
+ * C7 . MPU OFF + Core OFF
*/
void omap_init_power_states(void)
{
/* C1 . MPU WFI + Core active */
omap3_power_states[OMAP3_STATE_C1].valid = 1;
omap3_power_states[OMAP3_STATE_C1].type = OMAP3_STATE_C1;
- omap3_power_states[OMAP3_STATE_C1].sleep_latency = 10;
- omap3_power_states[OMAP3_STATE_C1].wakeup_latency = 10;
- omap3_power_states[OMAP3_STATE_C1].threshold = 30;
+ omap3_power_states[OMAP3_STATE_C1].sleep_latency = 2;
+ omap3_power_states[OMAP3_STATE_C1].wakeup_latency = 2;
+ omap3_power_states[OMAP3_STATE_C1].threshold = 5;
omap3_power_states[OMAP3_STATE_C1].mpu_state = PWRDM_POWER_ON;
omap3_power_states[OMAP3_STATE_C1].core_state = PWRDM_POWER_ON;
omap3_power_states[OMAP3_STATE_C1].flags = CPUIDLE_FLAG_TIME_VALID;
- /* C2 . MPU CSWR + Core active */
+ /* C2 . MPU WFI + Core inactive */
omap3_power_states[OMAP3_STATE_C2].valid = 1;
omap3_power_states[OMAP3_STATE_C2].type = OMAP3_STATE_C2;
- omap3_power_states[OMAP3_STATE_C2].sleep_latency = 50;
- omap3_power_states[OMAP3_STATE_C2].wakeup_latency = 50;
- omap3_power_states[OMAP3_STATE_C2].threshold = 300;
- omap3_power_states[OMAP3_STATE_C2].mpu_state = PWRDM_POWER_RET;
+ omap3_power_states[OMAP3_STATE_C2].sleep_latency = 10;
+ omap3_power_states[OMAP3_STATE_C2].wakeup_latency = 10;
+ omap3_power_states[OMAP3_STATE_C2].threshold = 30;
+ omap3_power_states[OMAP3_STATE_C2].mpu_state
[PATCH 0/1] Group and resource assignments for TWL4030
This patch introduces support for board specific group assignments of TWL4030 resources. The resource type and type2 fields can also be specified. Peter 'p2' De Schrijver (1): Group and resource assignments for TWL4030 drivers/mfd/twl4030-power.c | 96 ++- include/linux/i2c/twl4030.h | 41 ++- 2 files changed, 135 insertions(+), 2 deletions(-) -- To unsubscribe from this list: send the line unsubscribe linux-omap in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
[PATCH 1/1] Group and resource assignments for TWL4030
Signed-off-by: Peter 'p2' De Schrijver peter.de-schrij...@nokia.com
---
drivers/mfd/twl4030-power.c | 96 ++-
include/linux/i2c/twl4030.h | 41 ++-
2 files changed, 135 insertions(+), 2 deletions(-)
diff --git a/drivers/mfd/twl4030-power.c b/drivers/mfd/twl4030-power.c
index d9d1655..f1d416c 100644
--- a/drivers/mfd/twl4030-power.c
+++ b/drivers/mfd/twl4030-power.c
@@ -38,6 +38,8 @@ static u8 triton_next_free_address = 0x2b;
#define PHY_TO_OFF_PM_MASTER(p)(p - 0x36)
#define PHY_TO_OFF_PM_RECEIVER(p) (p - 0x5b)
+#define NUM_OF_RESOURCES 28
+
/* resource - hfclk */
#define R_HFCLKOUT_DEV_GRP PHY_TO_OFF_PM_RECEIVER(0xe6)
@@ -66,6 +68,42 @@ static u8 triton_next_free_address = 0x2b;
#define KEY_1 0xC0
#define KEY_2 0x0C
+/* resource configuration registers */
+
+#define DEVGROUP_OFFSET0
+#define TYPE_OFFSET1
+
+static int res_config_addrs[] = {
+ [RES_VAUX1] = 0x17,
+ [RES_VAUX2] = 0x1b,
+ [RES_VAUX3] = 0x1f,
+ [RES_VAUX4] = 0x23,
+ [RES_VMMC1] = 0x27,
+ [RES_VMMC2] = 0x2b,
+ [RES_VPLL1] = 0x2f,
+ [RES_VPLL2] = 0x33,
+ [RES_VSIM] = 0x37,
+ [RES_VDAC] = 0x3b,
+ [RES_VINTANA1] = 0x3f,
+ [RES_VINTANA2] = 0x43,
+ [RES_VINTDIG] = 0x47,
+ [RES_VIO] = 0x4b,
+ [RES_VDD1] = 0x55,
+ [RES_VDD2] = 0x63,
+ [RES_VUSB_1v5] = 0x71,
+ [RES_VUSB_1v8] = 0x74,
+ [RES_VUSB_3v1] = 0x77,
+ [RES_VUSBCP] = 0x7a,
+ [RES_REGEN] = 0x7f,
+ [RES_NRES_PWRON] = 0x82,
+ [RES_CLKEN] = 0x85,
+ [RES_SYSEN] = 0x88,
+ [RES_HFCLKOUT] = 0x8b,
+ [RES_32KCLKOUT] = 0x8e,
+ [RES_RESET] = 0x91,
+ [RES_Main_Ref] = 0x94,
+};
+
static int __init twl4030_write_script_byte(u8 address, u8 byte)
{
int err;
@@ -219,6 +257,53 @@ static int __init config_warmreset_sequence(u8 address)
return err;
}
+void twl4030_configure_resource(struct twl4030_resconfig *rconfig)
+{
+ int rconfig_addr;
+ u8 type;
+
+ if (rconfig-resource NUM_OF_RESOURCES) {
+ printk(KERN_ERR
+ TWL4030 Resource %d does not exist\n,
+ rconfig-resource);
+ return;
+ }
+
+ rconfig_addr = res_config_addrs[rconfig-resource];
+
+ /* Set resource group */
+
+ if (rconfig-devgroup = 0)
+ twl4030_i2c_write_u8(TWL4030_MODULE_PM_RECEIVER,
+ rconfig-devgroup 5,
+ rconfig_addr + DEVGROUP_OFFSET);
+
+ /* Set resource types */
+
+ if (twl4030_i2c_read_u8(TWL4030_MODULE_PM_RECEIVER,
+ type,
+ rconfig_addr + TYPE_OFFSET) 0) {
+ printk(KERN_ERR
+ TWL4030 Resource %d type could not read\n,
+ rconfig-resource);
+ return;
+ }
+
+ if (rconfig-type = 0) {
+ type = ~7;
+ type |= rconfig-type;
+ }
+
+ if (rconfig-type2 = 0) {
+ type = ~(3 3);
+ type |= rconfig-type2 3;
+ }
+
+ twl4030_i2c_write_u8(TWL4030_MODULE_PM_RECEIVER,
+ type, rconfig_addr + TYPE_OFFSET);
+
+}
+
static int __init load_triton_script(struct twl4030_script *tscript)
{
u8 address = triton_next_free_address;
@@ -249,6 +334,7 @@ void __init twl4030_power_init(struct twl4030_power_data
*triton2_scripts)
{
int err = 0;
int i;
+ struct twl4030_resconfig *resconfig;
err = twl4030_i2c_write_u8(TWL4030_MODULE_PM_MASTER, KEY_1,
R_PROTECT_KEY);
@@ -258,12 +344,20 @@ void __init twl4030_power_init(struct twl4030_power_data
*triton2_scripts)
printk(KERN_ERR
TWL4030 Unable to unlock registers\n);
- for (i = 0; i triton2_scripts-size; i++) {
+ for (i = 0; i triton2_scripts-scripts_size; i++) {
err = load_triton_script(triton2_scripts-scripts[i]);
if (err)
break;
}
+ resconfig = triton2_scripts-resource_config;
+ if (resconfig) {
+ while (resconfig-resource) {
+ twl4030_configure_resource(resconfig);
+ resconfig++;
+ }
+ }
+
if (twl4030_i2c_write_u8(TWL4030_MODULE_PM_MASTER, 0, R_PROTECT_KEY))
printk(KERN_ERR
TWL4030 Unable to relock registers\n);
diff --git a/include/linux/i2c/twl4030.h b/include/linux/i2c/twl4030.h
index 17bd400..efa7af1 100644
--- a/include/linux/i2c/twl4030.h
+++ b/include/linux/i2c/twl4030.h
@@ -243,6 +243,37 @@ int twl4030_i2c_read(u8 mod_no, u8 *value, u8 reg,
unsigned num_bytes
[PATCH] Add new lower-latency C1 state take #2
This patch introduces a new C state which allows MPU to go to WFI but keeps
the core domain active. This offers a much better wakeup latency (3us vs
10s of us for the current C1) at the cost of a higher power consumption.
Fixed the comments.
Signed-off-by: Peter 'p2' De Schrijver peter.de-schrij...@nokia.com
---
arch/arm/mach-omap2/cpuidle34xx.c | 121 -
1 files changed, 78 insertions(+), 43 deletions(-)
diff --git a/arch/arm/mach-omap2/cpuidle34xx.c
b/arch/arm/mach-omap2/cpuidle34xx.c
index 62fbb2e..7da2fd8 100644
--- a/arch/arm/mach-omap2/cpuidle34xx.c
+++ b/arch/arm/mach-omap2/cpuidle34xx.c
@@ -26,6 +26,7 @@
#include mach/pm.h
#include mach/prcm.h
#include mach/powerdomain.h
+#include mach/clockdomain.h
#include mach/control.h
#include mach/serial.h
@@ -33,13 +34,14 @@
#ifdef CONFIG_CPU_IDLE
-#define OMAP3_MAX_STATES 7
+#define OMAP3_MAX_STATES 8
#define OMAP3_STATE_C1 1 /* C1 - MPU WFI + Core active */
-#define OMAP3_STATE_C2 2 /* C2 - MPU CSWR + Core active */
-#define OMAP3_STATE_C3 3 /* C3 - MPU OFF + Core active */
-#define OMAP3_STATE_C4 4 /* C4 - MPU RET + Core RET */
-#define OMAP3_STATE_C5 5 /* C5 - MPU OFF + Core RET */
-#define OMAP3_STATE_C6 6 /* C6 - MPU OFF + Core OFF */
+#define OMAP3_STATE_C2 2 /* C2 - MPU WFI + Core inactive */
+#define OMAP3_STATE_C3 3 /* C3 - MPU CSWR + Core inactive */
+#define OMAP3_STATE_C4 4 /* C4 - MPU OFF + Core iactive */
+#define OMAP3_STATE_C5 5 /* C5 - MPU RET + Core RET */
+#define OMAP3_STATE_C6 6 /* C6 - MPU OFF + Core RET */
+#define OMAP3_STATE_C7 7 /* C7 - MPU OFF + Core OFF */
struct omap3_processor_cx {
u8 valid;
@@ -63,6 +65,18 @@ static int omap3_idle_bm_check(void)
return 0;
}
+static int _cpuidle_allow_idle(struct powerdomain *pwrdm,
+ struct clockdomain *clkdm)
+{
+ omap2_clkdm_allow_idle(clkdm);
+}
+
+static int _cpuidle_deny_idle(struct powerdomain *pwrdm,
+ struct clockdomain *clkdm)
+{
+ omap2_clkdm_deny_idle(clkdm);
+}
+
/**
* omap3_enter_idle - Programs OMAP3 to enter the specified state
* @dev: cpuidle device
@@ -99,9 +113,19 @@ static int omap3_enter_idle(struct cpuidle_device *dev,
if (omap_irq_pending())
goto return_sleep_time;
+ if (cx-type == OMAP3_STATE_C1) {
+ pwrdm_for_each_clkdm(mpu_pd, _cpuidle_deny_idle);
+ pwrdm_for_each_clkdm(core_pd, _cpuidle_deny_idle);
+ }
+
/* Execute ARM wfi */
omap_sram_idle();
+ if (cx-type == OMAP3_STATE_C1) {
+ pwrdm_for_each_clkdm(mpu_pd, _cpuidle_allow_idle);
+ pwrdm_for_each_clkdm(core_pd, _cpuidle_allow_idle);
+ }
+
return_sleep_time:
getnstimeofday(ts_postidle);
ts_idle = timespec_sub(ts_postidle, ts_preidle);
@@ -140,79 +164,90 @@ DEFINE_PER_CPU(struct cpuidle_device, omap3_idle_dev);
/* omap3_init_power_states - Initialises the OMAP3 specific C states.
*
* Below is the desciption of each C state.
- * C1 . MPU WFI + Core active
- * C2 . MPU CSWR + Core active
- * C3 . MPU OFF + Core active
- * C4 . MPU CSWR + Core CSWR
- * C5 . MPU OFF + Core CSWR
- * C6 . MPU OFF + Core OFF
+ * C1 . MPU WFI + Core active
+ * C2 . MPU WFI + Core inactive
+ * C3 . MPU CSWR + Core inactive
+ * C4 . MPU OFF + Core inactive
+ * C5 . MPU CSWR + Core CSWR
+ * C6 . MPU OFF + Core CSWR
+ * C7 . MPU OFF + Core OFF
*/
void omap_init_power_states(void)
{
/* C1 . MPU WFI + Core active */
omap3_power_states[OMAP3_STATE_C1].valid = 1;
omap3_power_states[OMAP3_STATE_C1].type = OMAP3_STATE_C1;
- omap3_power_states[OMAP3_STATE_C1].sleep_latency = 10;
- omap3_power_states[OMAP3_STATE_C1].wakeup_latency = 10;
- omap3_power_states[OMAP3_STATE_C1].threshold = 30;
+ omap3_power_states[OMAP3_STATE_C1].sleep_latency = 2;
+ omap3_power_states[OMAP3_STATE_C1].wakeup_latency = 2;
+ omap3_power_states[OMAP3_STATE_C1].threshold = 5;
omap3_power_states[OMAP3_STATE_C1].mpu_state = PWRDM_POWER_ON;
omap3_power_states[OMAP3_STATE_C1].core_state = PWRDM_POWER_ON;
omap3_power_states[OMAP3_STATE_C1].flags = CPUIDLE_FLAG_TIME_VALID;
- /* C2 . MPU CSWR + Core active */
+ /* C2 . MPU WFI + Core inactive */
omap3_power_states[OMAP3_STATE_C2].valid = 1;
omap3_power_states[OMAP3_STATE_C2].type = OMAP3_STATE_C2;
- omap3_power_states[OMAP3_STATE_C2].sleep_latency = 50;
- omap3_power_states[OMAP3_STATE_C2].wakeup_latency = 50;
- omap3_power_states[OMAP3_STATE_C2].threshold = 300;
- omap3_power_states[OMAP3_STATE_C2].mpu_state = PWRDM_POWER_RET;
+ omap3_power_states[OMAP3_STATE_C2].sleep_latency = 10;
+ omap3_power_states[OMAP3_STATE_C2].wakeup_latency = 10;
+ omap3_power_states[OMAP3_STATE_C2].threshold = 30;
+ omap3_power_states[OMAP3_STATE_C2
[PATCH] Add new C state
This patch introduces a new C state which allows MPU to go to WFI but keeps
the core domain active. This offers a much better wakeup latency (3us vs
10s of us for the current C1) at the cost of a higher power consumption.
Signed-off-by: Peter 'p2' De Schrijver peter.de-schrij...@nokia.com
---
arch/arm/mach-omap2/cpuidle34xx.c | 119 +++-
1 files changed, 76 insertions(+), 43 deletions(-)
diff --git a/arch/arm/mach-omap2/cpuidle34xx.c
b/arch/arm/mach-omap2/cpuidle34xx.c
index 62fbb2e..5565aa7 100644
--- a/arch/arm/mach-omap2/cpuidle34xx.c
+++ b/arch/arm/mach-omap2/cpuidle34xx.c
@@ -26,6 +26,7 @@
#include mach/pm.h
#include mach/prcm.h
#include mach/powerdomain.h
+#include mach/clockdomain.h
#include mach/control.h
#include mach/serial.h
@@ -33,13 +34,14 @@
#ifdef CONFIG_CPU_IDLE
-#define OMAP3_MAX_STATES 7
+#define OMAP3_MAX_STATES 8
#define OMAP3_STATE_C1 1 /* C1 - MPU WFI + Core active */
-#define OMAP3_STATE_C2 2 /* C2 - MPU CSWR + Core active */
-#define OMAP3_STATE_C3 3 /* C3 - MPU OFF + Core active */
-#define OMAP3_STATE_C4 4 /* C4 - MPU RET + Core RET */
-#define OMAP3_STATE_C5 5 /* C5 - MPU OFF + Core RET */
-#define OMAP3_STATE_C6 6 /* C6 - MPU OFF + Core OFF */
+#define OMAP3_STATE_C2 2 /* C2 - MPU WFI + Core inactive */
+#define OMAP3_STATE_C3 3 /* C2 - MPU CSWR + Core inactive */
+#define OMAP3_STATE_C4 4 /* C3 - MPU OFF + Core iactive */
+#define OMAP3_STATE_C5 5 /* C4 - MPU RET + Core RET */
+#define OMAP3_STATE_C6 6 /* C5 - MPU OFF + Core RET */
+#define OMAP3_STATE_C7 7 /* C6 - MPU OFF + Core OFF */
struct omap3_processor_cx {
u8 valid;
@@ -63,6 +65,16 @@ static int omap3_idle_bm_check(void)
return 0;
}
+static int _cpuidle_allow_idle(struct powerdomain *pwrdm, struct clockdomain
*clkdm)
+{
+ omap2_clkdm_allow_idle(clkdm);
+}
+
+static int _cpuidle_deny_idle(struct powerdomain *pwrdm, struct clockdomain
*clkdm)
+{
+ omap2_clkdm_deny_idle(clkdm);
+}
+
/**
* omap3_enter_idle - Programs OMAP3 to enter the specified state
* @dev: cpuidle device
@@ -99,9 +111,19 @@ static int omap3_enter_idle(struct cpuidle_device *dev,
if (omap_irq_pending())
goto return_sleep_time;
+ if (cx-type == OMAP3_STATE_C1) {
+ pwrdm_for_each_clkdm(mpu_pd, _cpuidle_deny_idle);
+ pwrdm_for_each_clkdm(core_pd, _cpuidle_deny_idle);
+ }
+
/* Execute ARM wfi */
omap_sram_idle();
+ if (cx-type == OMAP3_STATE_C1) {
+ pwrdm_for_each_clkdm(mpu_pd, _cpuidle_allow_idle);
+ pwrdm_for_each_clkdm(core_pd, _cpuidle_allow_idle);
+ }
+
return_sleep_time:
getnstimeofday(ts_postidle);
ts_idle = timespec_sub(ts_postidle, ts_preidle);
@@ -140,79 +162,90 @@ DEFINE_PER_CPU(struct cpuidle_device, omap3_idle_dev);
/* omap3_init_power_states - Initialises the OMAP3 specific C states.
*
* Below is the desciption of each C state.
- * C1 . MPU WFI + Core active
- * C2 . MPU CSWR + Core active
- * C3 . MPU OFF + Core active
- * C4 . MPU CSWR + Core CSWR
- * C5 . MPU OFF + Core CSWR
- * C6 . MPU OFF + Core OFF
+ * C1 . MPU WFI + Core active
+ * C2 . MPU WFI + Core inactive
+ * C3 . MPU CSWR + Core inactive
+ * C4 . MPU OFF + Core inactive
+ * C5 . MPU CSWR + Core CSWR
+ * C6 . MPU OFF + Core CSWR
+ * C7 . MPU OFF + Core OFF
*/
void omap_init_power_states(void)
{
/* C1 . MPU WFI + Core active */
omap3_power_states[OMAP3_STATE_C1].valid = 1;
omap3_power_states[OMAP3_STATE_C1].type = OMAP3_STATE_C1;
- omap3_power_states[OMAP3_STATE_C1].sleep_latency = 10;
- omap3_power_states[OMAP3_STATE_C1].wakeup_latency = 10;
- omap3_power_states[OMAP3_STATE_C1].threshold = 30;
+ omap3_power_states[OMAP3_STATE_C1].sleep_latency = 2;
+ omap3_power_states[OMAP3_STATE_C1].wakeup_latency = 2;
+ omap3_power_states[OMAP3_STATE_C1].threshold = 5;
omap3_power_states[OMAP3_STATE_C1].mpu_state = PWRDM_POWER_ON;
omap3_power_states[OMAP3_STATE_C1].core_state = PWRDM_POWER_ON;
omap3_power_states[OMAP3_STATE_C1].flags = CPUIDLE_FLAG_TIME_VALID;
- /* C2 . MPU CSWR + Core active */
+ /* C2 . MPU WFI + Core inactive */
omap3_power_states[OMAP3_STATE_C2].valid = 1;
omap3_power_states[OMAP3_STATE_C2].type = OMAP3_STATE_C2;
- omap3_power_states[OMAP3_STATE_C2].sleep_latency = 50;
- omap3_power_states[OMAP3_STATE_C2].wakeup_latency = 50;
- omap3_power_states[OMAP3_STATE_C2].threshold = 300;
- omap3_power_states[OMAP3_STATE_C2].mpu_state = PWRDM_POWER_RET;
+ omap3_power_states[OMAP3_STATE_C2].sleep_latency = 10;
+ omap3_power_states[OMAP3_STATE_C2].wakeup_latency = 10;
+ omap3_power_states[OMAP3_STATE_C2].threshold = 30;
+ omap3_power_states[OMAP3_STATE_C2].mpu_state = PWRDM_POWER_ON;
omap3_power_states[OMAP3_STATE_C2].core_state
[PATCH] Remove fclk check for cpuidle
This patch removes the check to see if some functional clocks are still
enabled before entering sleep.
Signed-off-by: Peter 'p2' De Schrijver peter.de-schrij...@nokia.com
---
arch/arm/mach-omap2/pm34xx.c | 46 --
1 files changed, 0 insertions(+), 46 deletions(-)
diff --git a/arch/arm/mach-omap2/pm34xx.c b/arch/arm/mach-omap2/pm34xx.c
index e12ff2a..008a4d2 100644
--- a/arch/arm/mach-omap2/pm34xx.c
+++ b/arch/arm/mach-omap2/pm34xx.c
@@ -453,58 +453,12 @@ void omap_sram_idle(void)
omap2_clkdm_allow_idle(mpu_pwrdm-pwrdm_clkdms[0]);
}
-/*
- * Check if functional clocks are enabled before entering
- * sleep. This function could be behind CONFIG_PM_DEBUG
- * when all drivers are configuring their sysconfig registers
- * properly and using their clocks properly.
- */
-static int omap3_fclks_active(void)
-{
- u32 fck_core1 = 0, fck_core3 = 0, fck_sgx = 0, fck_dss = 0,
- fck_cam = 0, fck_per = 0, fck_usbhost = 0;
-
- fck_core1 = cm_read_mod_reg(CORE_MOD,
- CM_FCLKEN1);
- if (omap_rev() OMAP3430_REV_ES1_0) {
- fck_core3 = cm_read_mod_reg(CORE_MOD,
- OMAP3430ES2_CM_FCLKEN3);
- fck_sgx = cm_read_mod_reg(OMAP3430ES2_SGX_MOD,
- CM_FCLKEN);
- fck_usbhost = cm_read_mod_reg(OMAP3430ES2_USBHOST_MOD,
- CM_FCLKEN);
- } else
- fck_sgx = cm_read_mod_reg(GFX_MOD,
- OMAP3430ES2_CM_FCLKEN3);
- fck_dss = cm_read_mod_reg(OMAP3430_DSS_MOD,
- CM_FCLKEN);
- fck_cam = cm_read_mod_reg(OMAP3430_CAM_MOD,
- CM_FCLKEN);
- fck_per = cm_read_mod_reg(OMAP3430_PER_MOD,
- CM_FCLKEN);
-
- /* Ignore UART clocks. These are handled by UART core (serial.c) */
- fck_core1 = ~(OMAP3430_EN_UART1 | OMAP3430_EN_UART2);
- fck_per = ~OMAP3430_EN_UART3;
-
- /* Ignore GPIO clocks. Handled by GPIO prepare-idle hooks */
- fck_per = ~(OMAP3430_EN_GPIO2 | OMAP3430_EN_GPIO3 |
-OMAP3430_EN_GPIO4 | OMAP3430_EN_GPIO5 | OMAP3430_EN_GPIO6);
-
- if (fck_core1 | fck_core3 | fck_sgx | fck_dss |
- fck_cam | fck_per | fck_usbhost)
- return 1;
- return 0;
-}
-
int omap3_can_sleep(void)
{
if (!enable_dyn_sleep)
return 0;
if (!omap_uart_can_sleep())
return 0;
- if (omap3_fclks_active())
- return 0;
if (atomic_read(sleep_block) 0)
return 0;
return 1;
--
1.5.6.3
--
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Re: [PATCH 0/1] Group and resource assignments for TWL4030
On Wed, Mar 04, 2009 at 12:38:16AM +0100, ext David Brownell wrote: On Friday 27 February 2009, Tony Lindgren wrote: * Peter 'p2' De Schrijver peter.de-schrij...@nokia.com [090215 08:49]: On Fri, Feb 13, 2009 at 09:55:21PM +0100, ext David Brownell wrote: On Tuesday 10 February 2009, Peter 'p2' De Schrijver wrote: This patch introduces support for board specific group assignments of TWL4030 resources. The resource type and type2 fields can also be specified. Do we have any real examples yet of needing to assign resources to anything other than P1 (processor)? Yes. On our custom hardware we use it to assign CLKEN to P3. P3 roughly translating to system running, with no regard to whether ARM(s) or DSP are active, yes? Depends on the board. We use P3 to control the system oscillator. The SYSCLK_REQ output of OMAP3 is wired to the CLKREQ input on the TWL4030. OMAP3 will disable SYSCLK_REQ when the system clock is no longer necessary. (Eg, when going to chip retention). This obviously only works if CLKEN is only in P3. (Otherwise it won't be turned off as P1 is still active). A similar setup is used on the TI SDP3430 board. Cheers, Peter. -- goa is a state of mind -- To unsubscribe from this list: send the line unsubscribe linux-omap in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
Re: [PATCH 0/1] OMAP3 PM Add C0 state
On Mon, Feb 23, 2009 at 07:24:24PM +0100, ext Kevin Hilman wrote: Peter 'p2' De Schrijver peter.de-schrij...@nokia.com writes: This patch introduces a new C state C0 which keeps both core and mpu powerdomains in ON state. This gives us low latency at a cost of higher power consumption. I don't like the name 'C0' for an idle-state. In ACPI terms, C0 is an active state, not an idle state. I know this is not an ACPI system, but since we're using ACPI names, we should be consistent. Is there a real benefit to having an additional state here? Shouldn't we just make these changes or C1? C1 has a too high wakeup latency (10s of us) for some cases, but C0 (which has a 3us wakeup latency) keeps core on which implies little powersavings. So I think we need both. Cheers, Peter. -- goa is a state of mind -- To unsubscribe from this list: send the line unsubscribe linux-omap in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
[PATCH 1/1] OMAP3 PM Add C0 state
Signed-off-by: Peter 'p2' De Schrijver peter.de-schrij...@nokia.com
---
arch/arm/mach-omap2/cpuidle34xx.c | 53 ++---
1 files changed, 43 insertions(+), 10 deletions(-)
diff --git a/arch/arm/mach-omap2/cpuidle34xx.c
b/arch/arm/mach-omap2/cpuidle34xx.c
index 62fbb2e..0b5fd52 100644
--- a/arch/arm/mach-omap2/cpuidle34xx.c
+++ b/arch/arm/mach-omap2/cpuidle34xx.c
@@ -26,6 +26,7 @@
#include mach/pm.h
#include mach/prcm.h
#include mach/powerdomain.h
+#include mach/clockdomain.h
#include mach/control.h
#include mach/serial.h
@@ -34,9 +35,10 @@
#ifdef CONFIG_CPU_IDLE
#define OMAP3_MAX_STATES 7
-#define OMAP3_STATE_C1 1 /* C1 - MPU WFI + Core active */
-#define OMAP3_STATE_C2 2 /* C2 - MPU CSWR + Core active */
-#define OMAP3_STATE_C3 3 /* C3 - MPU OFF + Core active */
+#define OMAP3_STATE_C0 0 /* C0 - MPU WFI + Core active */
+#define OMAP3_STATE_C1 1 /* C1 - MPU WFI + Core inactive */
+#define OMAP3_STATE_C2 2 /* C2 - MPU CSWR + Core inactive */
+#define OMAP3_STATE_C3 3 /* C3 - MPU OFF + Core inactive */
#define OMAP3_STATE_C4 4 /* C4 - MPU RET + Core RET */
#define OMAP3_STATE_C5 5 /* C5 - MPU OFF + Core RET */
#define OMAP3_STATE_C6 6 /* C6 - MPU OFF + Core OFF */
@@ -63,6 +65,16 @@ static int omap3_idle_bm_check(void)
return 0;
}
+static int _cpuidle_allow_idle(struct powerdomain *pwrdm, struct clockdomain
*clkdm)
+{
+ omap2_clkdm_allow_idle(clkdm);
+}
+
+static int _cpuidle_deny_idle(struct powerdomain *pwrdm, struct clockdomain
*clkdm)
+{
+ omap2_clkdm_deny_idle(clkdm);
+}
+
/**
* omap3_enter_idle - Programs OMAP3 to enter the specified state
* @dev: cpuidle device
@@ -99,9 +111,19 @@ static int omap3_enter_idle(struct cpuidle_device *dev,
if (omap_irq_pending())
goto return_sleep_time;
+ if (cx-type == OMAP3_STATE_C0) {
+ pwrdm_for_each_clkdm(mpu_pd, _cpuidle_deny_idle);
+ pwrdm_for_each_clkdm(core_pd, _cpuidle_deny_idle);
+ }
+
/* Execute ARM wfi */
omap_sram_idle();
+ if (cx-type == OMAP3_STATE_C0) {
+ pwrdm_for_each_clkdm(mpu_pd, _cpuidle_allow_idle);
+ pwrdm_for_each_clkdm(core_pd, _cpuidle_allow_idle);
+ }
+
return_sleep_time:
getnstimeofday(ts_postidle);
ts_idle = timespec_sub(ts_postidle, ts_preidle);
@@ -140,16 +162,27 @@ DEFINE_PER_CPU(struct cpuidle_device, omap3_idle_dev);
/* omap3_init_power_states - Initialises the OMAP3 specific C states.
*
* Below is the desciption of each C state.
- * C1 . MPU WFI + Core active
- * C2 . MPU CSWR + Core active
- * C3 . MPU OFF + Core active
+ * C0 . MPU WFI + Core active
+ * C1 . MPU WFI + Core inactive
+ * C2 . MPU CSWR + Core inactive
+ * C3 . MPU OFF + Core inactive
* C4 . MPU CSWR + Core CSWR
* C5 . MPU OFF + Core CSWR
* C6 . MPU OFF + Core OFF
*/
void omap_init_power_states(void)
{
- /* C1 . MPU WFI + Core active */
+ /* C0 . MPU WFI + Core active */
+ omap3_power_states[OMAP3_STATE_C0].valid = 1;
+ omap3_power_states[OMAP3_STATE_C0].type = OMAP3_STATE_C0;
+ omap3_power_states[OMAP3_STATE_C0].sleep_latency = 2;
+ omap3_power_states[OMAP3_STATE_C0].wakeup_latency = 2;
+ omap3_power_states[OMAP3_STATE_C0].threshold = 5;
+ omap3_power_states[OMAP3_STATE_C0].mpu_state = PWRDM_POWER_ON;
+ omap3_power_states[OMAP3_STATE_C0].core_state = PWRDM_POWER_ON;
+ omap3_power_states[OMAP3_STATE_C0].flags = CPUIDLE_FLAG_TIME_VALID;
+
+ /* C1 . MPU WFI + Core inactive */
omap3_power_states[OMAP3_STATE_C1].valid = 1;
omap3_power_states[OMAP3_STATE_C1].type = OMAP3_STATE_C1;
omap3_power_states[OMAP3_STATE_C1].sleep_latency = 10;
@@ -159,7 +192,7 @@ void omap_init_power_states(void)
omap3_power_states[OMAP3_STATE_C1].core_state = PWRDM_POWER_ON;
omap3_power_states[OMAP3_STATE_C1].flags = CPUIDLE_FLAG_TIME_VALID;
- /* C2 . MPU CSWR + Core active */
+ /* C2 . MPU CSWR + Core inactive */
omap3_power_states[OMAP3_STATE_C2].valid = 1;
omap3_power_states[OMAP3_STATE_C2].type = OMAP3_STATE_C2;
omap3_power_states[OMAP3_STATE_C2].sleep_latency = 50;
@@ -170,7 +203,7 @@ void omap_init_power_states(void)
omap3_power_states[OMAP3_STATE_C2].flags = CPUIDLE_FLAG_TIME_VALID |
CPUIDLE_FLAG_CHECK_BM;
- /* C3 . MPU OFF + Core active */
+ /* C3 . MPU OFF + Core inactive */
omap3_power_states[OMAP3_STATE_C3].valid = 1;
omap3_power_states[OMAP3_STATE_C3].type = OMAP3_STATE_C3;
omap3_power_states[OMAP3_STATE_C3].sleep_latency = 1500;
@@ -244,7 +277,7 @@ int omap3_idle_init(void)
dev = per_cpu(omap3_idle_dev, smp_processor_id());
- for (i = 1; i OMAP3_MAX_STATES; i++) {
+ for (i = 0; i OMAP3_MAX_STATES; i++) {
cx = omap3_power_states[i
[PATCH 0/1] OMAP3 PM Add C0 state
This patch introduces a new C state C0 which keeps both core and mpu powerdomains in ON state. This gives us low latency at a cost of higher power consumption. Peter 'p2' De Schrijver (1): OMAP3 PM Add C0 state arch/arm/mach-omap2/cpuidle34xx.c | 53 ++--- 1 files changed, 43 insertions(+), 10 deletions(-) -- To unsubscribe from this list: send the line unsubscribe linux-omap in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
Re: [PATCH 0/1] Group and resource assignments for TWL4030
On Fri, Feb 13, 2009 at 09:55:21PM +0100, ext David Brownell wrote: On Tuesday 10 February 2009, Peter 'p2' De Schrijver wrote: This patch introduces support for board specific group assignments of TWL4030 resources. The resource type and type2 fields can also be specified. Do we have any real examples yet of needing to assign resources to anything other than P1 (processor)? Yes. On our custom hardware we use it to assign CLKEN to P3. Cheers, Peter. -- goa is a state of mind -- To unsubscribe from this list: send the line unsubscribe linux-omap in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
Re: [PATCH 1/1] per board prm timings
Hi Kevin, Peter, I like this approach much better than what we currently have. Pushing to PM branch. The next thing I would like to see is all the register value defines removed from prm-regbits-34xx.h. That header is supposed to be for the bitfield definitions, not for values. True. If this patch goes in, there is no need for the register value defines in prm-regbits-34xx.h any more. Cheers, Peter. -- goa is a state of mind -- To unsubscribe from this list: send the line unsubscribe linux-omap in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
[PATCH 0/1] Group and resource assignments for TWL4030
This patch introduces support for board specific group assignments of TWL4030 resources. The resource type and type2 fields can also be specified. Peter 'p2' De Schrijver (1): Group and resource assignments for TWL4030 drivers/mfd/twl4030-power.c | 95 ++- include/linux/i2c/twl4030.h | 41 ++- 2 files changed, 134 insertions(+), 2 deletions(-) -- To unsubscribe from this list: send the line unsubscribe linux-omap in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
[PATCH 1/1] Group and resource assignments for TWL4030
Signed-off-by: Peter 'p2' De Schrijver peter.de-schrij...@nokia.com
---
drivers/mfd/twl4030-power.c | 95 ++-
include/linux/i2c/twl4030.h | 41 ++-
2 files changed, 134 insertions(+), 2 deletions(-)
diff --git a/drivers/mfd/twl4030-power.c b/drivers/mfd/twl4030-power.c
index d9d1655..c558127 100644
--- a/drivers/mfd/twl4030-power.c
+++ b/drivers/mfd/twl4030-power.c
@@ -38,6 +38,8 @@ static u8 triton_next_free_address = 0x2b;
#define PHY_TO_OFF_PM_MASTER(p)(p - 0x36)
#define PHY_TO_OFF_PM_RECEIVER(p) (p - 0x5b)
+#define NUM_OF_RESOURCES 28
+
/* resource - hfclk */
#define R_HFCLKOUT_DEV_GRP PHY_TO_OFF_PM_RECEIVER(0xe6)
@@ -66,6 +68,42 @@ static u8 triton_next_free_address = 0x2b;
#define KEY_1 0xC0
#define KEY_2 0x0C
+/* resource configuration registers */
+
+#define DEVGROUP_OFFSET0
+#define TYPE_OFFSET1
+
+static int __initdata res_config_addrs[] = {
+ [1] = 0x17,
+ [2] = 0x1b,
+ [3] = 0x1f,
+ [4] = 0x23,
+ [5] = 0x27,
+ [6] = 0x2b,
+ [7] = 0x2f,
+ [8] = 0x33,
+ [9] = 0x37,
+ [10] = 0x3b,
+ [11] = 0x3f,
+ [12] = 0x43,
+ [13] = 0x47,
+ [14] = 0x4b,
+ [15] = 0x55,
+ [16] = 0x63,
+ [17] = 0x71,
+ [18] = 0x74,
+ [19] = 0x77,
+ [20] = 0x7a,
+ [21] = 0x7f,
+ [22] = 0x82,
+ [23] = 0x85,
+ [24] = 0x88,
+ [25] = 0x8b,
+ [26] = 0x8e,
+ [27] = 0x91,
+ [28] = 0x94,
+};
+
static int __init twl4030_write_script_byte(u8 address, u8 byte)
{
int err;
@@ -245,10 +283,57 @@ static int __init load_triton_script(struct
twl4030_script *tscript)
return err;
}
+static void __init twl4030_configure_resource(struct twl4030_resconfig
*rconfig)
+{
+ int rconfig_addr;
+ u8 type;
+
+ if (rconfig-resource NUM_OF_RESOURCES) {
+ printk(KERN_ERR
+ TWL4030 Resource %d does not exist\n,
+ rconfig-resource);
+ return;
+ }
+
+ rconfig_addr = res_config_addrs[rconfig-resource];
+
+ /* Set resource group */
+
+ if (rconfig-devgroup = 0)
+ twl4030_i2c_write_u8(TWL4030_MODULE_PM_RECEIVER,
+ rconfig-devgroup 5,
+ rconfig_addr + DEVGROUP_OFFSET);
+
+ /* Set resource types */
+
+ if (twl4030_i2c_read_u8(TWL4030_MODULE_PM_RECEIVER,
+ type,
+ rconfig_addr + TYPE_OFFSET) 0) {
+ printk(KERN_ERR
+ TWL4030 Resource %d type could not read\n,
+ rconfig-resource);
+ return;
+ }
+
+ if (rconfig-type = 0) {
+ type = ~7;
+ type |= rconfig-type;
+ }
+
+ if (rconfig-type2 = 0) {
+ type = ~(3 3);
+ type |= rconfig-type2 3;
+ }
+
+ twl4030_i2c_write_u8(TWL4030_MODULE_PM_RECEIVER,
+ type, rconfig_addr + TYPE_OFFSET);
+}
+
void __init twl4030_power_init(struct twl4030_power_data *triton2_scripts)
{
int err = 0;
int i;
+ struct twl4030_resconfig *resconfig;
err = twl4030_i2c_write_u8(TWL4030_MODULE_PM_MASTER, KEY_1,
R_PROTECT_KEY);
@@ -258,12 +343,20 @@ void __init twl4030_power_init(struct twl4030_power_data
*triton2_scripts)
printk(KERN_ERR
TWL4030 Unable to unlock registers\n);
- for (i = 0; i triton2_scripts-size; i++) {
+ for (i = 0; i triton2_scripts-scripts_size; i++) {
err = load_triton_script(triton2_scripts-scripts[i]);
if (err)
break;
}
+ resconfig = triton2_scripts-resource_config;
+ if (resconfig) {
+ while (resconfig-resource) {
+ twl4030_configure_resource(resconfig);
+ resconfig++;
+ }
+ }
+
if (twl4030_i2c_write_u8(TWL4030_MODULE_PM_MASTER, 0, R_PROTECT_KEY))
printk(KERN_ERR
TWL4030 Unable to relock registers\n);
diff --git a/include/linux/i2c/twl4030.h b/include/linux/i2c/twl4030.h
index 93d483d..e6ce1cd 100644
--- a/include/linux/i2c/twl4030.h
+++ b/include/linux/i2c/twl4030.h
@@ -243,6 +243,37 @@ int twl4030_i2c_read(u8 mod_no, u8 *value, u8 reg,
unsigned num_bytes);
#define RES_STATE_SLEEP0x8
#define RES_STATE_OFF 0x0
+/* Power resources */
+
+#define RES_VAUX1 1
+#define RES_VAUX2 2
+#define RES_VAUX3 3
+#define RES_VAUX4 4
+#define RES_VMMC1 5
+#define RES_VMMC2 6
+#define RES_VPLL1
[PATCH 0/1] Board specific prm timings
This is an updated version which removes a useless printk. This patch allows for boardspecific prm timings such as voltage and clock setup delays. By default it will use the very conservative timings which were used previously. Peter 'p2' De Schrijver (1): per board prm timings arch/arm/mach-omap2/pm.h |9 + arch/arm/mach-omap2/pm34xx.c | 31 +-- 2 files changed, 34 insertions(+), 6 deletions(-) -- To unsubscribe from this list: send the line unsubscribe linux-omap in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
[PATCH 1/1] per board prm timings
API definition to set prm setup times.
Signed-off-by: Peter 'p2' De Schrijver peter.de-schrij...@nokia.com
---
arch/arm/mach-omap2/pm.h |9 +
arch/arm/mach-omap2/pm34xx.c | 31 +--
2 files changed, 34 insertions(+), 6 deletions(-)
diff --git a/arch/arm/mach-omap2/pm.h b/arch/arm/mach-omap2/pm.h
index 451f247..d79ea07 100644
--- a/arch/arm/mach-omap2/pm.h
+++ b/arch/arm/mach-omap2/pm.h
@@ -33,9 +33,18 @@ extern void *omap3_secure_ram_storage;
extern void omap2_block_sleep(void);
extern void omap2_allow_sleep(void);
#ifdef CONFIG_ARCH_OMAP3
+struct prm_setup_times {
+ u16 clksetup;
+ u16 voltsetup_time1;
+ u16 voltsetup_time2;
+ u16 voltoffset;
+ u16 voltsetup2;
+};
+
extern void omap3_pm_off_mode_enable(int);
extern int omap3_pm_get_suspend_state(struct powerdomain *pwrdm);
extern int omap3_pm_set_suspend_state(struct powerdomain *pwrdm, int state);
+extern void omap3_set_prm_setup_times(struct prm_setup_times *setup_times);
#else
#define omap3_pm_off_mode_enable(int) do {} while (0);
#define omap3_pm_get_suspend_state(pwrdm) do {} while (0);
diff --git a/arch/arm/mach-omap2/pm34xx.c b/arch/arm/mach-omap2/pm34xx.c
index 44189a0..06aa382 100644
--- a/arch/arm/mach-omap2/pm34xx.c
+++ b/arch/arm/mach-omap2/pm34xx.c
@@ -85,6 +85,14 @@ static struct powerdomain *mpu_pwrdm, *neon_pwrdm;
static struct powerdomain *core_pwrdm, *per_pwrdm;
static struct powerdomain *cam_pwrdm;
+static struct prm_setup_times prm_setup = {
+ .clksetup = 0xff,
+ .voltsetup_time1 = 0xfff,
+ .voltsetup_time2 = 0xfff,
+ .voltoffset = 0xff,
+ .voltsetup2 = 0xff,
+};
+
static inline void omap3_per_save_context(void)
{
omap3_gpio_save_context();
@@ -880,6 +888,15 @@ int omap3_pm_set_suspend_state(struct powerdomain *pwrdm,
int state)
return -EINVAL;
}
+void omap3_set_prm_setup_times(struct prm_setup_times *setup_times)
+{
+ prm_setup.clksetup = setup_times-clksetup;
+ prm_setup.voltsetup_time1 = setup_times-voltsetup_time1;
+ prm_setup.voltsetup_time2 = setup_times-voltsetup_time2;
+ prm_setup.voltoffset = setup_times-voltoffset;
+ prm_setup.voltsetup2 = setup_times-voltsetup2;
+}
+
static int __init pwrdms_setup(struct powerdomain *pwrdm, void *unused)
{
struct power_state *pwrst;
@@ -1015,6 +1032,7 @@ err2:
static void __init configure_vc(void)
{
+
prm_write_mod_reg((R_SRI2C_SLAVE_ADDR OMAP3430_SMPS_SA1_SHIFT) |
(R_SRI2C_SLAVE_ADDR OMAP3430_SMPS_SA0_SHIFT),
OMAP3430_GR_MOD, OMAP3_PRM_VC_SMPS_SA_OFFSET);
@@ -1044,21 +1062,22 @@ static void __init configure_vc(void)
OMAP3430_GR_MOD,
OMAP3_PRM_VC_I2C_CFG_OFFSET);
- /* Setup voltctrl and other setup times */
+ /* Setup value for voltctrl */
prm_write_mod_reg(OMAP3430_AUTO_RET,
OMAP3430_GR_MOD, OMAP3_PRM_VOLTCTRL_OFFSET);
- prm_write_mod_reg(OMAP3430_CLKSETUP_DURATION, OMAP3430_GR_MOD,
+ /* Write setup times */
+ prm_write_mod_reg(prm_setup.clksetup, OMAP3430_GR_MOD,
OMAP3_PRM_CLKSETUP_OFFSET);
- prm_write_mod_reg((OMAP3430_VOLTSETUP_TIME2
+ prm_write_mod_reg((prm_setup.voltsetup_time2
OMAP3430_SETUP_TIME2_SHIFT) |
- (OMAP3430_VOLTSETUP_TIME1
+ (prm_setup.voltsetup_time1
OMAP3430_SETUP_TIME1_SHIFT),
OMAP3430_GR_MOD, OMAP3_PRM_VOLTSETUP1_OFFSET);
- prm_write_mod_reg(OMAP3430_VOLTOFFSET_DURATION, OMAP3430_GR_MOD,
+ prm_write_mod_reg(prm_setup.voltoffset, OMAP3430_GR_MOD,
OMAP3_PRM_VOLTOFFSET_OFFSET);
- prm_write_mod_reg(OMAP3430_VOLTSETUP2_DURATION, OMAP3430_GR_MOD,
+ prm_write_mod_reg(prm_setup.voltsetup2, OMAP3430_GR_MOD,
OMAP3_PRM_VOLTSETUP2_OFFSET);
}
--
1.5.6.3
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[PATCH 1/1] per board prm timings
API definition to set prm setup times
Signed-off-by: Peter 'p2' De Schrijver peter.de-schrij...@nokia.com
---
arch/arm/mach-omap2/pm.h |9 +
arch/arm/mach-omap2/pm34xx.c | 39 +--
2 files changed, 42 insertions(+), 6 deletions(-)
diff --git a/arch/arm/mach-omap2/pm.h b/arch/arm/mach-omap2/pm.h
index 451f247..d79ea07 100644
--- a/arch/arm/mach-omap2/pm.h
+++ b/arch/arm/mach-omap2/pm.h
@@ -33,9 +33,18 @@ extern void *omap3_secure_ram_storage;
extern void omap2_block_sleep(void);
extern void omap2_allow_sleep(void);
#ifdef CONFIG_ARCH_OMAP3
+struct prm_setup_times {
+ u16 clksetup;
+ u16 voltsetup_time1;
+ u16 voltsetup_time2;
+ u16 voltoffset;
+ u16 voltsetup2;
+};
+
extern void omap3_pm_off_mode_enable(int);
extern int omap3_pm_get_suspend_state(struct powerdomain *pwrdm);
extern int omap3_pm_set_suspend_state(struct powerdomain *pwrdm, int state);
+extern void omap3_set_prm_setup_times(struct prm_setup_times *setup_times);
#else
#define omap3_pm_off_mode_enable(int) do {} while (0);
#define omap3_pm_get_suspend_state(pwrdm) do {} while (0);
diff --git a/arch/arm/mach-omap2/pm34xx.c b/arch/arm/mach-omap2/pm34xx.c
index 44189a0..f531638 100644
--- a/arch/arm/mach-omap2/pm34xx.c
+++ b/arch/arm/mach-omap2/pm34xx.c
@@ -85,6 +85,14 @@ static struct powerdomain *mpu_pwrdm, *neon_pwrdm;
static struct powerdomain *core_pwrdm, *per_pwrdm;
static struct powerdomain *cam_pwrdm;
+static struct prm_setup_times prm_setup = {
+ .clksetup = 0xff,
+ .voltsetup_time1 = 0xfff,
+ .voltsetup_time2 = 0xfff,
+ .voltoffset = 0xff,
+ .voltsetup2 = 0xff,
+};
+
static inline void omap3_per_save_context(void)
{
omap3_gpio_save_context();
@@ -880,6 +888,23 @@ int omap3_pm_set_suspend_state(struct powerdomain *pwrdm,
int state)
return -EINVAL;
}
+void omap3_set_prm_setup_times(struct prm_setup_times *setup_times)
+{
+ prm_setup.clksetup = setup_times-clksetup;
+ prm_setup.voltsetup_time1 = setup_times-voltsetup_time1;
+ prm_setup.voltsetup_time2 = setup_times-voltsetup_time2;
+ prm_setup.voltoffset = setup_times-voltoffset;
+ prm_setup.voltsetup2 = setup_times-voltsetup2;
+
+ printk(omap3_set_prm_setup_times %04x, %04x, %04x, %04x, %04x\n,
+ prm_setup.clksetup,
+ prm_setup.voltsetup_time1,
+ prm_setup.voltsetup_time2,
+ prm_setup.voltoffset,
+ prm_setup.voltsetup2);
+
+}
+
static int __init pwrdms_setup(struct powerdomain *pwrdm, void *unused)
{
struct power_state *pwrst;
@@ -1015,6 +1040,7 @@ err2:
static void __init configure_vc(void)
{
+
prm_write_mod_reg((R_SRI2C_SLAVE_ADDR OMAP3430_SMPS_SA1_SHIFT) |
(R_SRI2C_SLAVE_ADDR OMAP3430_SMPS_SA0_SHIFT),
OMAP3430_GR_MOD, OMAP3_PRM_VC_SMPS_SA_OFFSET);
@@ -1044,21 +1070,22 @@ static void __init configure_vc(void)
OMAP3430_GR_MOD,
OMAP3_PRM_VC_I2C_CFG_OFFSET);
- /* Setup voltctrl and other setup times */
+ /* Setup value for voltctrl */
prm_write_mod_reg(OMAP3430_AUTO_RET,
OMAP3430_GR_MOD, OMAP3_PRM_VOLTCTRL_OFFSET);
- prm_write_mod_reg(OMAP3430_CLKSETUP_DURATION, OMAP3430_GR_MOD,
+ /* Write setup times */
+ prm_write_mod_reg(prm_setup.clksetup, OMAP3430_GR_MOD,
OMAP3_PRM_CLKSETUP_OFFSET);
- prm_write_mod_reg((OMAP3430_VOLTSETUP_TIME2
+ prm_write_mod_reg((prm_setup.voltsetup_time2
OMAP3430_SETUP_TIME2_SHIFT) |
- (OMAP3430_VOLTSETUP_TIME1
+ (prm_setup.voltsetup_time1
OMAP3430_SETUP_TIME1_SHIFT),
OMAP3430_GR_MOD, OMAP3_PRM_VOLTSETUP1_OFFSET);
- prm_write_mod_reg(OMAP3430_VOLTOFFSET_DURATION, OMAP3430_GR_MOD,
+ prm_write_mod_reg(prm_setup.voltoffset, OMAP3430_GR_MOD,
OMAP3_PRM_VOLTOFFSET_OFFSET);
- prm_write_mod_reg(OMAP3430_VOLTSETUP2_DURATION, OMAP3430_GR_MOD,
+ prm_write_mod_reg(prm_setup.voltsetup2, OMAP3430_GR_MOD,
OMAP3_PRM_VOLTSETUP2_OFFSET);
}
--
1.5.6.3
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Re: [PATCH 0/1] Do a warm reboot instead of a cold reboot
Hi Jouni, De-Schrijver Peter (Nokia-D/Helsinki) peter.de-schrij...@nokia.com writes: This patch makes arch_reset do a warm reboot instead of a cold reboot. This is necessary because otherwise the system does not reboot reliably when disabling CLKEN in retention. Note : Unfortuately this breaks retention :( IVA2, PER and CORE don't go to retention after reboot. I'm not sure if fixing the problem this way makes sense currently. This will mean that after reboot OMAP modules are not reset. This will cause excactly this kind of problems. If we had that code for reset all the modules on boot, situation might be different. How about resetting also twl4030 in case of reboot. E.g. remove all the scripts from the twl4030? Even then we should be using warm reboot. The fact cold reboot works has been more luck then anything else. How hard is it to fix the module reset on boot ? And what does a OMAP watchdog reboot do ? Cheers, Peter. -- goa is a state of mind -- To unsubscribe from this list: send the line unsubscribe linux-omap in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
Re: new PM branch available
Hi Kevin, Hi Peter, Peter 'p2' De Schrijver peter.de-schrij...@nokia.com writes: A first guess: this sounds like CONFIG_OMAP_RESET_CLOCKS=y is missing from your .config. The MPU/NEON going active but not RET is an indication to me that some fclk is active so that the fclk check in omap3_can_sleep() fails, so a WFI is never attempted. That's shy Ok. I did enable CONFIG_OMAP_RESET_CLOCKS. But with your config file only PER and CORE did not go to retention. One difference is that I did not enable smartreflex, but as B5 (and B4) are using OMAP3s without proper efuse values, smartreflex shouldn't matter I assume ? I upgrade my u-boot to the latest version, and then PER went to retention as well. The only way to get core to retention was to force idle USBOTG and disable the USBOTG driver. Dynamic retention seems to work only once the system has been in static retention once. Static off mode seems to work, but resume from off kills the UART. The system seems to run though, at least LED0 flickers as usual when the system runs. Sometimes it hangs and I have seen one reboot. Which rootfs are you using, I'm using debian, so maybe something keeps the CPU busy. Are you using NAND or MMC to store your rootfs ? I'm using rootfs on MMC and have tested with busybox-only, debian and OE rootfs. With debian and OE, I usually boot a minimal rootfs, before a full userland comes up. With debian, I changed my /etc/init.d/rcS to start initlevel 1 instead of 'S'. Ok. I tried with both the small OE ramdisk image and rather minimal debian install. I didn't see a difference in behaviour between both. And which u-boot are you using ? I'm using the u-boot from Steve Sakoman's tree[1]. That helped a lot in my initial Beagle testing, but I think the kernel should reset the IVA and D2D now which is the domains that I was having problems with before, so I think that the out of the box u-boot should work fine. I upgraded to this u-boot and it resolved at least one issue. Cheers, Peter. -- goa is a state of mind -- To unsubscribe from this list: send the line unsubscribe linux-omap in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
[PATCH 0/1] Do a warm reboot instead of a cold reboot
This patch makes arch_reset do a warm reboot instead of a cold reboot. This is necessary because otherwise the system does not reboot reliably when disabling CLKEN in retention. Note : Unfortuately this breaks retention :( IVA2, PER and CORE don't go to retention after reboot. Peter 'p2' De Schrijver (1): Do a soft reboot instead of a cold boot arch/arm/mach-omap2/prcm.c |2 +- 1 files changed, 1 insertions(+), 1 deletions(-) -- To unsubscribe from this list: send the line unsubscribe linux-omap in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
[PATCH 1/1] Do a warm reboot instead of a cold boot
This patch makes omap_prcm_arch_reset do a warm reboot instead of a cold boot Signed-off-by: Peter 'p2' De Schrijver peter.de-schrij...@nokia.com --- arch/arm/mach-omap2/prcm.c |2 +- 1 files changed, 1 insertions(+), 1 deletions(-) diff --git a/arch/arm/mach-omap2/prcm.c b/arch/arm/mach-omap2/prcm.c index c64b668..b405e01 100644 --- a/arch/arm/mach-omap2/prcm.c +++ b/arch/arm/mach-omap2/prcm.c @@ -135,7 +135,7 @@ void omap_prcm_arch_reset(char mode) else WARN_ON(1); - prm_set_mod_reg_bits(OMAP_RST_DPLL3, prcm_offs, RM_RSTCTRL); + prm_set_mod_reg_bits(OMAP_RST_GS, prcm_offs, RM_RSTCTRL); } static inline u32 __omap_prcm_read(void __iomem *base, s16 module, u16 reg) -- 1.5.6.3 -- To unsubscribe from this list: send the line unsubscribe linux-omap in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
Re: new PM branch available
Hi Kevin, Hello, The latest PM branch is now available[1]. I've done basic testing of retention and off-mode (suspend and dynamic idle) on Beagle and custom HW. My SDP has something still keeping CORE active that others have not seen, but I have yet to debug. Any other reports from SDP testing would be appreciated. Notable changes/updates - rebased on latest clock updates and fixes from Paul - clockfw pre- and post- notifiers - DVFS for VDD2 I tried it on a beagleboard last night, but couldn't get even static retention to work. Some domains (core, per, dss) stay on, but even mpu and neon don't go to retention. They only go to inactive. So could you send your .config file ? Which rootfs are you using, I'm using debian, so maybe something keeps the CPU busy. Are you using NAND or MMC to store your rootfs ? Which beagle HW rev do you have ? I'm testing on a B5 board. And which u-boot are you using ? Thanks, Peter. -- goa is a state of mind -- To unsubscribe from this list: send the line unsubscribe linux-omap in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
[PATCH] Wait for SDRC ready iso a blind delay
This patch improves the wakeup SRAM code polling the SDRC to become ready
instead of just waiting for a fixed amount of time.
Now with signoff :)
Signed-off-by: Peter 'p2' De Schrijver peter.de-schrij...@nokia.com
---
arch/arm/mach-omap2/sleep34xx.S | 51 +--
1 files changed, 38 insertions(+), 13 deletions(-)
diff --git a/arch/arm/mach-omap2/sleep34xx.S b/arch/arm/mach-omap2/sleep34xx.S
index 0c33e30..33ee85b 100644
--- a/arch/arm/mach-omap2/sleep34xx.S
+++ b/arch/arm/mach-omap2/sleep34xx.S
@@ -30,6 +30,7 @@
#include mach/pm.h
#include mach/control.h
+#include cm.h
#include prm.h
#include sdrc.h
@@ -38,6 +39,8 @@
#define PM_PREPWSTST_CORE_P0x48306AE8
#define PM_PREPWSTST_MPU_V OMAP34XX_PRM_REGADDR(MPU_MOD, \
OMAP3430_PM_PREPWSTST)
+#define CM_IDLEST1_CORE_V OMAP34XX_CM_REGADDR(CORE_MOD, CM_IDLEST1)
+
/*
* This is the physical address of the register as specified
* by the _P. To be used while the MMU is still disabled.
@@ -57,6 +60,8 @@
#define SDRC_MR_1_P(OMAP343X_SDRC_BASE + SDRC_MR_1)
#define SDRC_EMR2_1_P (OMAP343X_SDRC_BASE + SDRC_EMR2_1)
#define SDRC_MANUAL_1_P(OMAP343X_SDRC_BASE + SDRC_MANUAL_1)
+#define SDRC_DLLA_STATUS_V OMAP34XX_SDRC_REGADDR(SDRC_DLLA_STATUS)
+#define SDRC_DLLA_CTRL_V OMAP34XX_SDRC_REGADDR(SDRC_DLLA_CTRL)
.text
/* Function call to get the restore pointer for resume from OFF */
@@ -192,7 +197,7 @@ loop:
nop
nop
nop
- bl i_dll_wait
+ bl wait_sdrc_ok
ldmfd sp!, {r0-r12, pc} @ restore regs and return
restore_es3:
@@ -651,21 +656,41 @@ skip_l2_inval:
nop
nop
nop
- bl i_dll_wait
+ bl wait_sdrc_ok
/* restore regs and return */
ldmfd sp!, {r0-r12, pc}
-i_dll_wait:
- ldr r4, clk_stabilize_delay
-
-i_dll_delay:
- subsr4, r4, #0x1
- bne i_dll_delay
- ldr r4, sdrc_power
- ldr r5, [r4]
- bic r5, r5, #0x40
- str r5, [r4]
- bx lr
+/* Make sure SDRC accesses are ok */
+wait_sdrc_ok:
+ldr r4, cm_idlest1_core
+ldr r5, [r4]
+and r5, r5, #0x2
+cmp r5, #0
+bne wait_sdrc_ok
+ldr r4, sdrc_power
+ldr r5, [r4]
+bic r5, r5, #0x40
+str r5, [r4]
+wait_dll_lock:
+/* Is dll in lock mode? */
+ldr r4, sdrc_dlla_ctrl
+ldr r5, [r4]
+tst r5, #0x4
+bxnelr
+/* wait till dll locks */
+ldr r4, sdrc_dlla_status
+ldr r5, [r4]
+and r5, r5, #0x4
+cmp r5, #0x4
+bne wait_dll_lock
+bx lr
+
+cm_idlest1_core:
+ .word CM_IDLEST1_CORE_V
+sdrc_dlla_status:
+ .word SDRC_DLLA_STATUS_V
+sdrc_dlla_ctrl:
+ .word SDRC_DLLA_CTRL_V
pm_prepwstst_core:
.word PM_PREPWSTST_CORE_V
pm_prepwstst_core_p:
--
1.5.6.3
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[PATCH] Wait for SDRC ready iso a blind delay
This patch improves the wakeup SRAM code polling the SDRC to become ready
instead of just waiting for a fixed amount of time.
---
arch/arm/mach-omap2/sleep34xx.S | 50 --
1 files changed, 37 insertions(+), 13 deletions(-)
diff --git a/arch/arm/mach-omap2/sleep34xx.S b/arch/arm/mach-omap2/sleep34xx.S
index 0c33e30..d29c180 100644
--- a/arch/arm/mach-omap2/sleep34xx.S
+++ b/arch/arm/mach-omap2/sleep34xx.S
@@ -38,6 +38,8 @@
#define PM_PREPWSTST_CORE_P0x48306AE8
#define PM_PREPWSTST_MPU_V OMAP34XX_PRM_REGADDR(MPU_MOD, \
OMAP3430_PM_PREPWSTST)
+#define CM_IDLEST1_CORE_V IO_ADDRESS(OMAP3430_CM_BASE + 0x220)
+
/*
* This is the physical address of the register as specified
* by the _P. To be used while the MMU is still disabled.
@@ -57,6 +59,8 @@
#define SDRC_MR_1_P(OMAP343X_SDRC_BASE + SDRC_MR_1)
#define SDRC_EMR2_1_P (OMAP343X_SDRC_BASE + SDRC_EMR2_1)
#define SDRC_MANUAL_1_P(OMAP343X_SDRC_BASE + SDRC_MANUAL_1)
+#define SDRC_DLLA_STATUS_V OMAP34XX_SDRC_REGADDR(SDRC_DLLA_STATUS)
+#define SDRC_DLLA_CTRL_V OMAP34XX_SDRC_REGADDR(SDRC_DLLA_CTRL)
.text
/* Function call to get the restore pointer for resume from OFF */
@@ -192,7 +196,7 @@ loop:
nop
nop
nop
- bl i_dll_wait
+ bl wait_sdrc_ok
ldmfd sp!, {r0-r12, pc} @ restore regs and return
restore_es3:
@@ -651,21 +655,41 @@ skip_l2_inval:
nop
nop
nop
- bl i_dll_wait
+ bl wait_sdrc_ok
/* restore regs and return */
ldmfd sp!, {r0-r12, pc}
-i_dll_wait:
- ldr r4, clk_stabilize_delay
-
-i_dll_delay:
- subsr4, r4, #0x1
- bne i_dll_delay
- ldr r4, sdrc_power
- ldr r5, [r4]
- bic r5, r5, #0x40
- str r5, [r4]
- bx lr
+/* Make sure SDRC accesses are ok */
+wait_sdrc_ok:
+ldr r4, cm_idlest1_core
+ldr r5, [r4]
+and r5, r5, #0x2
+cmp r5, #0
+bne wait_sdrc_ok
+ldr r4, sdrc_power
+ldr r5, [r4]
+bic r5, r5, #0x40
+str r5, [r4]
+wait_dll_lock:
+/* Is dll in lock mode? */
+ldr r4, sdrc_dlla_ctrl
+ldr r5, [r4]
+tst r5, #0x4
+bxnelr
+/* wait till dll locks */
+ldr r4, sdrc_dlla_status
+ldr r5, [r4]
+and r5, r5, #0x4
+cmp r5, #0x4
+bne wait_dll_lock
+bx lr
+
+cm_idlest1_core:
+ .word CM_IDLEST1_CORE_V
+sdrc_dlla_status:
+ .word SDRC_DLLA_STATUS_V
+sdrc_dlla_ctrl:
+ .word SDRC_DLLA_CTRL_V
pm_prepwstst_core:
.word PM_PREPWSTST_CORE_V
pm_prepwstst_core_p:
--
1.5.6.3
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[PATCH] Don't scale voltage in C1 state
This patch prevents VDD1 and VDD2 to go to the lowest OPP when entering C1. It improves wakeup latency from 600us to about 50us. Now with signoff :) Signed-off-by: Peter 'p2' De Schrijver peter.de-schrij...@nokia.com --- arch/arm/mach-omap2/pm34xx.c |2 +- 1 files changed, 1 insertions(+), 1 deletions(-) diff --git a/arch/arm/mach-omap2/pm34xx.c b/arch/arm/mach-omap2/pm34xx.c index b0b2188..87ef55e 100644 --- a/arch/arm/mach-omap2/pm34xx.c +++ b/arch/arm/mach-omap2/pm34xx.c @@ -1052,7 +1052,7 @@ static void __init configure_vc(void) OMAP3_PRM_VC_I2C_CFG_OFFSET); /* Setup voltctrl and other setup times */ - prm_write_mod_reg(OMAP3430_AUTO_RET | OMAP3430_AUTO_SLEEP, + prm_write_mod_reg(OMAP3430_AUTO_RET, OMAP3430_GR_MOD, OMAP3_PRM_VOLTCTRL_OFFSET); prm_write_mod_reg(OMAP3430_CLKSETUP_DURATION, OMAP3430_GR_MOD, -- 1.5.6.3 -- To unsubscribe from this list: send the line unsubscribe linux-omap in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
Re: [PATCH 1/1] Save sram context after changing MPU, DSP or core clocks
On Fri, Dec 05, 2008 at 11:49:03AM +0200, Kristo Tero (Nokia-D/Tampere) wrote: Hi Peter, This patch causes linker error without CONFIG_PM option, should add #ifdef:s around the call to omap3_save_scratchpad_contents(); That looks a bit ugly though :( Cheers, Peter -- goa is a state of mind -- To unsubscribe from this list: send the line unsubscribe linux-omap in the body of a message to [EMAIL PROTECTED] More majordomo info at http://vger.kernel.org/majordomo-info.html
[PATCH 1/2] Fix omap_getspeed.
Signed-off-by: Peter 'p2' De Schrijver [EMAIL PROTECTED]
---
arch/arm/mach-omap2/clock34xx.c |1 +
arch/arm/plat-omap/cpu-omap.c |6 ++
2 files changed, 7 insertions(+), 0 deletions(-)
diff --git a/arch/arm/mach-omap2/clock34xx.c b/arch/arm/mach-omap2/clock34xx.c
index f771b56..da27e49 100644
--- a/arch/arm/mach-omap2/clock34xx.c
+++ b/arch/arm/mach-omap2/clock34xx.c
@@ -938,6 +938,7 @@ static int omap3_select_table_rate(struct clk *clk,
unsigned long rate)
if (clk == virt_vdd1_prcm_set) {
curr_mpu_speed = curr_vdd1_prcm_set-rate;
+ clk-rate = prcm_vdd-rate;
clk_set_rate(dpll1_clk, prcm_vdd-rate);
clk_set_rate(dpll2_clk, dsp_opps[index].rate);
curr_vdd1_prcm_set = prcm_vdd;
diff --git a/arch/arm/plat-omap/cpu-omap.c b/arch/arm/plat-omap/cpu-omap.c
index ae0817d..0a7ce46 100644
--- a/arch/arm/plat-omap/cpu-omap.c
+++ b/arch/arm/plat-omap/cpu-omap.c
@@ -146,6 +146,12 @@ static int __init omap_cpu_init(struct cpufreq_policy
*policy)
VERY_HI_RATE) / 1000;
}
+ clk_set_rate(mpu_clk, policy-cpuinfo.max_freq * 1000);
+
+ policy-min = policy-cpuinfo.min_freq;
+ policy-max = policy-cpuinfo.max_freq;
+ policy-cur = omap_getspeed(0);
+
/* FIXME: what's the actual transition time? */
policy-cpuinfo.transition_latency = 10 * 1000 * 1000;
return 0;
--
1.5.6.3
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[PATCH 0/2] Bug fixes for DVFS
The following patchset fixes some smaal bugs in cpufreq for OMAP3. The first patch fixes omap_getspeed to return meaningful values. The second patch makes sure the omap cpufreq driver is initialized after the cpufreq frameworks and governors are initialized. Peter 'p2' De Schrijver (2): Fix omap_getspeed. Make sure omap cpufreq driver initializes after cpufreq framework and governors arch/arm/mach-omap2/clock34xx.c |1 + arch/arm/plat-omap/cpu-omap.c |8 +++- 2 files changed, 8 insertions(+), 1 deletions(-) -- To unsubscribe from this list: send the line unsubscribe linux-omap in the body of a message to [EMAIL PROTECTED] More majordomo info at http://vger.kernel.org/majordomo-info.html
[PATCH 1/1] Debobs control macro fix
Signed-off-by: Peter 'p2' De Schrijver [EMAIL PROTECTED] --- arch/arm/plat-omap/include/mach/control.h |2 +- 1 files changed, 1 insertions(+), 1 deletions(-) diff --git a/arch/arm/plat-omap/include/mach/control.h b/arch/arm/plat-omap/include/mach/control.h index 9b06365..759fb71 100644 --- a/arch/arm/plat-omap/include/mach/control.h +++ b/arch/arm/plat-omap/include/mach/control.h @@ -152,7 +152,7 @@ #define OMAP343X_CONTROL_IVA2_BOOTADDR (OMAP2_CONTROL_GENERAL + 0x0190) #define OMAP343X_CONTROL_IVA2_BOOTMOD (OMAP2_CONTROL_GENERAL + 0x0194) #define OMAP343X_CONTROL_DEBOBS(i) (OMAP2_CONTROL_GENERAL + 0x01B0 \ - + ((i) 1) * 4 + (!(i) 1) * 2) + + ((i) 1) * 4 + (!(i 1)) * 2) #define OMAP343X_CONTROL_PROG_IO0 (OMAP2_CONTROL_GENERAL + 0x01D4) #define OMAP343X_CONTROL_PROG_IO1 (OMAP2_CONTROL_GENERAL + 0x01D8) #define OMAP343X_CONTROL_DSS_DPLL_SPREADING(OMAP2_CONTROL_GENERAL + 0x01E0) -- 1.5.6.3 -- To unsubscribe from this list: send the line unsubscribe linux-omap in the body of a message to [EMAIL PROTECTED] More majordomo info at http://vger.kernel.org/majordomo-info.html
[PATCH 1/1] Save sram context after changing MPU, DSP or core clocks
Signed-off-by: Peter 'p2' De Schrijver [EMAIL PROTECTED] --- arch/arm/mach-omap2/clock34xx.c |3 +++ 1 files changed, 3 insertions(+), 0 deletions(-) diff --git a/arch/arm/mach-omap2/clock34xx.c b/arch/arm/mach-omap2/clock34xx.c index d97d5a9..962ce56 100644 --- a/arch/arm/mach-omap2/clock34xx.c +++ b/arch/arm/mach-omap2/clock34xx.c @@ -911,6 +911,9 @@ printk(%s set to %luHz intended rate %luHz\n,dpll2_clk-name,clk_get_rate(dpll clk_set_rate(dpll3_clk, prcm_vdd-rate); curr_vdd2_prcm_set = prcm_vdd; } + + omap3_save_scratchpad_contents(); + return 0; } -- 1.5.6.3 -- To unsubscribe from this list: send the line unsubscribe linux-omap in the body of a message to [EMAIL PROTECTED] More majordomo info at http://vger.kernel.org/majordomo-info.html
[PATCH 0/1] Save sram context after changing MPU, DSP or core clocks
This patch saves the sram context again after a MPU,DSP or core clock frequency change. This is necessary so the rom code can restore the correct DPLL settings when resuming from off mode. Thanks to Rajendra Nayak for suggesting the problem and coming up with the same fix at about the same time. Peter 'p2' De Schrijver (1): Save sram context after changing MPU, DSP or core clocks arch/arm/mach-omap2/clock34xx.c |3 +++ 1 files changed, 3 insertions(+), 0 deletions(-) -- To unsubscribe from this list: send the line unsubscribe linux-omap in the body of a message to [EMAIL PROTECTED] More majordomo info at http://vger.kernel.org/majordomo-info.html
[PATCH] Wait until DPLL1 is relocked.
This patch causes _omap3_noncore_dpll_lock to wait for clocks marked as
WAIT_READY to be ready before continuing. This is necessary for MPU/DSP
DVFS to work correctly.
Cheers,
Peter.
---
arch/arm/mach-omap2/clock34xx.c | 19 ---
arch/arm/mach-omap2/clock34xx.h |2 +-
2 files changed, 9 insertions(+), 12 deletions(-)
diff --git a/arch/arm/mach-omap2/clock34xx.c b/arch/arm/mach-omap2/clock34xx.c
index 634278a..f700139 100644
--- a/arch/arm/mach-omap2/clock34xx.c
+++ b/arch/arm/mach-omap2/clock34xx.c
@@ -185,7 +187,7 @@ static u16 _omap3_dpll_compute_freqsel(struct clk *clk, u8
n)
static int _omap3_noncore_dpll_lock(struct clk *clk)
{
u8 ai;
- int r;
+ int r = 0;
if (clk == dpll3_ck)
return -EINVAL;
@@ -196,15 +198,16 @@ static int _omap3_noncore_dpll_lock(struct clk *clk)
_omap3_dpll_write_clken(clk, DPLL_LOCKED);
+ if (!ai || (clk-flags WAIT_READY))
+ r = _omap3_wait_dpll_status(clk, 1);
+
if (ai) {
/*
* If no downstream clocks are enabled, CM_IDLEST bit
* may never become active, so don't wait for DPLL to lock.
*/
- r = 0;
omap3_dpll_allow_idle(clk);
} else {
- r = _omap3_wait_dpll_status(clk, 1);
omap3_dpll_deny_idle(clk);
};
diff --git a/arch/arm/mach-omap2/clock34xx.h b/arch/arm/mach-omap2/clock34xx.h
index f3eda8a..8a2bd85 100644
--- a/arch/arm/mach-omap2/clock34xx.h
+++ b/arch/arm/mach-omap2/clock34xx.h
@@ -305,7 +305,7 @@ static struct clk dpll1_ck = {
.parent = sys_ck,
.prcm_mod = MPU_MOD,
.dpll_data = dpll1_dd,
- .flags = CLOCK_IN_OMAP343X | RATE_PROPAGATES | ALWAYS_ENABLED,
+ .flags = CLOCK_IN_OMAP343X | RATE_PROPAGATES | ALWAYS_ENABLED
| WAIT_READY,
.round_rate = omap2_dpll_round_rate,
.set_rate = omap3_noncore_dpll_set_rate,
.clkdm = { .name = dpll1_clkdm },
--
1.5.6.3
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[Resending PATCH] Wait until DPLL1 is relocked. Re
I forgot the signoff. Fixed now.
This patch causes _omap3_noncore_dpll_lock to wait for clocks marked as
WAIT_READY to be ready before continuing. This is necessary for MPU/DSP
DVFS to work correctly.
Cheers,
Peter.
Signed-off-by: Peter 'p2' De Schrijver [EMAIL PROTECTED]
---
arch/arm/mach-omap2/clock34xx.c | 19 ---
arch/arm/mach-omap2/clock34xx.h |2 +-
2 files changed, 9 insertions(+), 12 deletions(-)
diff --git a/arch/arm/mach-omap2/clock34xx.c b/arch/arm/mach-omap2/clock34xx.c
index 634278a..f700139 100644
--- a/arch/arm/mach-omap2/clock34xx.c
+++ b/arch/arm/mach-omap2/clock34xx.c
@@ -122,8 +122,10 @@ static int _omap3_wait_dpll_status(struct clk *clk, u8
state)
}
if (i == MAX_DPLL_WAIT_TRIES) {
- printk(KERN_ERR clock: %s failed transition to '%s'\n,
- clk-name, (state) ? locked : bypassed);
+ printk(KERN_DEBUG clock: %s failed transition to '%s'\n,
+ clk-name, (state) ? locked : bypassed);
+ pr_debug(clock: %s m: %d n: %d\n,
+ clk-name, clk-dpll_data-last_rounded_m,
clk-dpll_data-last_rounded_n);
} else {
pr_debug(clock: %s transition to '%s' in %d loops\n,
clk-name, (state) ? locked : bypassed, i);
@@ -185,7 +187,7 @@ static u16 _omap3_dpll_compute_freqsel(struct clk *clk, u8
n)
static int _omap3_noncore_dpll_lock(struct clk *clk)
{
u8 ai;
- int r;
+ int r = 0;
if (clk == dpll3_ck)
return -EINVAL;
@@ -196,15 +198,16 @@ static int _omap3_noncore_dpll_lock(struct clk *clk)
_omap3_dpll_write_clken(clk, DPLL_LOCKED);
+ if (!ai || (clk-flags WAIT_READY))
+ r = _omap3_wait_dpll_status(clk, 1);
+
if (ai) {
/*
* If no downstream clocks are enabled, CM_IDLEST bit
* may never become active, so don't wait for DPLL to lock.
*/
- r = 0;
omap3_dpll_allow_idle(clk);
} else {
- r = _omap3_wait_dpll_status(clk, 1);
omap3_dpll_deny_idle(clk);
};
@@ -406,12 +409,6 @@ static int omap3_noncore_dpll_program(struct clk *clk, u16
m, u8 n, u16 freqsel)
_omap3_noncore_dpll_lock(clk);
- /* fix somehow */
-
- udelay(230);
-
-//pr_err(omap2_get_dpll_rate: %u\n,omap2_get_dpll_rate(clk));
-
return 0;
}
diff --git a/arch/arm/mach-omap2/clock34xx.h b/arch/arm/mach-omap2/clock34xx.h
index f3eda8a..8a2bd85 100644
--- a/arch/arm/mach-omap2/clock34xx.h
+++ b/arch/arm/mach-omap2/clock34xx.h
@@ -305,7 +305,7 @@ static struct clk dpll1_ck = {
.parent = sys_ck,
.prcm_mod = MPU_MOD,
.dpll_data = dpll1_dd,
- .flags = CLOCK_IN_OMAP343X | RATE_PROPAGATES | ALWAYS_ENABLED,
+ .flags = CLOCK_IN_OMAP343X | RATE_PROPAGATES | ALWAYS_ENABLED
| WAIT_READY,
.round_rate = omap2_dpll_round_rate,
.set_rate = omap3_noncore_dpll_set_rate,
.clkdm = { .name = dpll1_clkdm },
--
1.5.6.3
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Re: [PATCH 0/6] Integrate the twl4030 power code into new twl4030 mfd
On Mon, Oct 20, 2008 at 02:02:16AM -0700, ext David Brownell wrote: On Monday 20 October 2008, Peter 'p2' De Schrijver wrote: This patchset integrates the twl4030 power code into the new twl4030 mfd framework. The scripts will be moved to the board specific data. Peter 'p2' De Schrijver (6): Add defines and data types for twl4030. Move existing TWL4030 code to drivers/mfd Hook twl4030 power code into twl4030 core. 3430sdp and ldp use custom twl4030 power scripts. Generic twl4030 power script for 3430 based boards. omap3 evm, beagle and overo use the generic twl4030 script Seems OK to me ... any reason this shouldn't go to mainline? I don't see any reason. Cheers, Peter. -- goa is a state of mind -- To unsubscribe from this list: send the line unsubscribe linux-omap in the body of a message to [EMAIL PROTECTED] More majordomo info at http://vger.kernel.org/majordomo-info.html
[PATCH 5/6] Generic twl4030 power script for 3430 based boards.
This is a generic twl4030 power script for 3430 based boards. It handles
sleep and wakeup events. In case of a sleep event it will first put the
Reset and Control (RC) resources to sleep and then put the voltage regulators
to sleep. In case of a wakeup event, the system clock will be started first,
then the voltage regulators will be woken up and finally the RC resources will
be woken up.
Signed-off-by: Peter 'p2' De Schrijver [EMAIL PROTECTED]
---
arch/arm/mach-omap2/twl4030-generic-scripts.c | 78 +
arch/arm/mach-omap2/twl4030-generic-scripts.h |8 +++
2 files changed, 86 insertions(+), 0 deletions(-)
create mode 100644 arch/arm/mach-omap2/twl4030-generic-scripts.c
create mode 100644 arch/arm/mach-omap2/twl4030-generic-scripts.h
diff --git a/arch/arm/mach-omap2/twl4030-generic-scripts.c
b/arch/arm/mach-omap2/twl4030-generic-scripts.c
new file mode 100644
index 000..f41c9ef
--- /dev/null
+++ b/arch/arm/mach-omap2/twl4030-generic-scripts.c
@@ -0,0 +1,78 @@
+/*
+ * arch/arm/mach-omap2/twl4030-generic-scripts.c
+ *
+ * Generic power control scripts for TWL4030
+ *
+ * Copyright (C) 2008 Nokia Corporation
+ * Copyright (C) 2006 Texas Instruments, Inc
+ *
+ * Written by Kalle Jokiniemi
+ * Peter De Schrijver [EMAIL PROTECTED]
+ *
+ * This file is subject to the terms and conditions of the GNU General
+ * Public License. See the file COPYING in the main directory of this
+ * archive for more details.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
+ */
+
+#include linux/kernel.h
+#include linux/device.h
+#include linux/init.h
+#include linux/i2c/twl4030.h
+
+/*
+ * This script instructs twl4030 to first put the Reset and Control (RC)
+ * resources to sleep and then all the other resources.
+ */
+
+static struct twl4030_ins sleep_on_seq[] __initdata = {
+ {MSG_BROADCAST(DEV_GRP_NULL, RES_GRP_RC, RES_TYPE_ALL, RES_TYPE2_R0,
+ RES_STATE_SLEEP), 4},
+ {MSG_BROADCAST(DEV_GRP_NULL, RES_GRP_ALL, RES_TYPE_ALL, RES_TYPE2_R0,
+ RES_STATE_SLEEP), 4},
+};
+
+static struct twl4030_script sleep_on_script __initdata = {
+ .script = sleep_on_seq,
+ .size = ARRAY_SIZE(sleep_on_seq),
+ .flags = TRITON_SLEEP_SCRIPT,
+};
+
+/*
+ * This script instructs twl4030 to first enable CLKEN, then wakeup the
+ * regulators and then all other resources.
+ */
+
+static struct twl4030_ins wakeup_seq[] __initdata = {
+ {MSG_SINGULAR(DEV_GRP_NULL, 0x17, RES_STATE_ACTIVE), 0x30},
+ {MSG_BROADCAST(DEV_GRP_NULL, RES_GRP_PP_PR, RES_TYPE_ALL, RES_TYPE2_R0,
+ RES_STATE_ACTIVE), 0x37},
+ {MSG_BROADCAST(DEV_GRP_NULL, RES_GRP_ALL, RES_TYPE_ALL, RES_TYPE2_R0,
+ RES_STATE_ACTIVE), 0x2},
+};
+
+static struct twl4030_script wakeup_script __initdata = {
+ .script = wakeup_seq,
+ .size = ARRAY_SIZE(wakeup_seq),
+ .flags = TRITON_WAKEUP12_SCRIPT | TRITON_WAKEUP3_SCRIPT,
+};
+
+static struct twl4030_script *twl4030_scripts[] __initdata = {
+ sleep_on_script,
+ wakeup_script,
+};
+
+struct twl4030_power_data generic3430_t2scripts_data __initdata = {
+ .scripts= twl4030_scripts,
+ .size = ARRAY_SIZE(twl4030_scripts),
+};
+
+
diff --git a/arch/arm/mach-omap2/twl4030-generic-scripts.h
b/arch/arm/mach-omap2/twl4030-generic-scripts.h
new file mode 100644
index 000..64d8d3f
--- /dev/null
+++ b/arch/arm/mach-omap2/twl4030-generic-scripts.h
@@ -0,0 +1,8 @@
+#ifndef __TWL4030_GENERIC_SCRIPTS_H
+#define __TWL4030_GENERIC_SCRIPTS_H
+
+#include linux/i2c/twl4030.h
+
+extern struct twl4030_power_data generic3430_t2scripts_data;
+
+#endif
--
1.5.6.3
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[PATCH 3/6] Hook twl4030 power code into twl4030 core.
This patch makes twl4030 core call the power code in case the scripts are
present in the platform data.
Signed-off-by: Peter 'p2' De Schrijver [EMAIL PROTECTED]
---
drivers/mfd/Kconfig|9 +
drivers/mfd/Makefile |1 +
drivers/mfd/twl4030-core.c | 11 +++
3 files changed, 21 insertions(+), 0 deletions(-)
diff --git a/drivers/mfd/Kconfig b/drivers/mfd/Kconfig
index e643f6b..91c0417 100644
--- a/drivers/mfd/Kconfig
+++ b/drivers/mfd/Kconfig
@@ -64,6 +64,15 @@ config TWL4030_CORE
high speed USB OTG transceiver, an audio codec (on most
versions) and many other features.
+config TWL4030_POWER
+ bool Support power sequencing scripts on TWL4030/TPS659x0
+ depends on TWL4030_CORE
+ help
+ Say yes here if you want to use the power sequencing scripts on
+ the TWL4030/TPS659x0. These scripts control which regulators or
+ oscillators are switched off or on or reset when a sleep, wakeup
+ or warm reset event occurs.
+
config MFD_TMIO
bool
default n
diff --git a/drivers/mfd/Makefile b/drivers/mfd/Makefile
index 92531f0..baa15bd 100644
--- a/drivers/mfd/Makefile
+++ b/drivers/mfd/Makefile
@@ -13,6 +13,7 @@ obj-$(CONFIG_MFD_TC6387XB)+= tc6387xb.o
obj-$(CONFIG_MFD_TC6393XB) += tc6393xb.o
obj-$(CONFIG_TWL4030_CORE) += twl4030-core.o twl4030-irq.o
+obj-$(CONFIG_TWL4030_POWER)+= twl4030-power.o
obj-$(CONFIG_MFD_CORE) += mfd-core.o
diff --git a/drivers/mfd/twl4030-core.c b/drivers/mfd/twl4030-core.c
index dd843c4..3fc54bf 100644
--- a/drivers/mfd/twl4030-core.c
+++ b/drivers/mfd/twl4030-core.c
@@ -77,6 +77,12 @@
#define twl_has_madc() false
#endif
+#ifdef CONFIG_TWL4030_POWER
+#define twl_has_power()true
+#else
+#define twl_has_power()false
+#endif
+
#if defined(CONFIG_RTC_DRV_TWL4030) || defined(CONFIG_RTC_DRV_TWL4030_MODULE)
#define twl_has_rtc() true
#else
@@ -209,6 +215,8 @@ static struct twl4030mapping
twl4030_map[TWL4030_MODULE_LAST + 1] = {
{ 3, TWL4030_BASEADD_SECURED_REG },
};
+extern void twl4030_power_init(struct twl4030_power_data *triton2_scripts);
+
/*--*/
/* Exported Functions */
@@ -514,6 +522,9 @@ static int add_children(struct twl4030_platform_data *pdata)
}
}
+ if (twl_has_power() pdata-power)
+ twl4030_power_init(pdata-power);
+
if (twl_has_rtc()) {
twl = twl4030_modules[3];
--
1.5.6.3
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[PATCH 0/6] Integrate the twl4030 power code into new twl4030 mfd
This patchset integrates the twl4030 power code into the new twl4030 mfd framework. The scripts will be moved to the board specific data. Peter 'p2' De Schrijver (6): Add defines and data types for twl4030. Move existing TWL4030 code to drivers/mfd Hook twl4030 power code into twl4030 core. 3430sdp and ldp use custom twl4030 power scripts. Generic twl4030 power script for 3430 based boards. omap3 evm, beagle and overo use the generic twl4030 script arch/arm/mach-omap2/Makefile |9 +- arch/arm/mach-omap2/board-3430sdp.c | 84 ++ arch/arm/mach-omap2/board-ldp.c | 84 ++ arch/arm/mach-omap2/board-omap3beagle.c |4 +- arch/arm/mach-omap2/board-omap3evm.c |4 +- arch/arm/mach-omap2/board-overo.c |4 +- arch/arm/mach-omap2/twl4030-generic-scripts.c | 78 ++ arch/arm/mach-omap2/twl4030-generic-scripts.h |8 + drivers/i2c/chips/Makefile|1 - drivers/i2c/chips/twl4030-power.c | 343 - drivers/mfd/Kconfig |9 + drivers/mfd/Makefile |1 + drivers/mfd/twl4030-core.c| 11 + drivers/mfd/twl4030-power.c | 270 +++ include/linux/i2c/twl4030.h | 64 + 15 files changed, 621 insertions(+), 353 deletions(-) create mode 100644 arch/arm/mach-omap2/twl4030-generic-scripts.c create mode 100644 arch/arm/mach-omap2/twl4030-generic-scripts.h delete mode 100644 drivers/i2c/chips/twl4030-power.c create mode 100644 drivers/mfd/twl4030-power.c -- To unsubscribe from this list: send the line unsubscribe linux-omap in the body of a message to [EMAIL PROTECTED] More majordomo info at http://vger.kernel.org/majordomo-info.html
[PATCH 1/6] Add defines and data types for twl4030.
This patch adds a bunch of data types and defines to handle the twl4030 power
sequence scripts.
Signed-off-by: Peter 'p2' De Schrijver [EMAIL PROTECTED]
---
include/linux/i2c/twl4030.h | 64 +++
1 files changed, 64 insertions(+), 0 deletions(-)
diff --git a/include/linux/i2c/twl4030.h b/include/linux/i2c/twl4030.h
index fb604dc..517e605 100644
--- a/include/linux/i2c/twl4030.h
+++ b/include/linux/i2c/twl4030.h
@@ -270,6 +270,69 @@ struct twl4030_usb_data {
enum twl4030_usb_mode usb_mode;
};
+struct twl4030_ins {
+ u16 pmb_message;
+ u8 delay;
+};
+
+struct twl4030_script {
+ struct twl4030_ins *script;
+ unsigned size;
+ u8 flags;
+};
+#define TRITON_WRST_SCRIPT (10)
+#define TRITON_WAKEUP12_SCRIPT (11)
+#define TRITON_WAKEUP3_SCRIPT (12)
+#define TRITON_SLEEP_SCRIPT(13)
+
+struct twl4030_power_data {
+ struct twl4030_script **scripts;
+ unsigned size;
+};
+
+/* Power bus message definitions */
+
+#define DEV_GRP_NULL 0x0
+#define DEV_GRP_P1 0x1
+#define DEV_GRP_P2 0x2
+#define DEV_GRP_P3 0x4
+
+#define RES_GRP_RES0x0
+#define RES_GRP_PP 0x1
+#define RES_GRP_RC 0x2
+#define RES_GRP_PP_RC 0x3
+#define RES_GRP_PR 0x4
+#define RES_GRP_PP_PR 0x5
+#define RES_GRP_RC_PR 0x6
+#define RES_GRP_ALL0x7
+
+#define RES_TYPE2_R0 0x0
+
+#define RES_TYPE_ALL 0x7
+
+#define RES_STATE_WRST 0xF
+#define RES_STATE_ACTIVE 0xE
+#define RES_STATE_SLEEP0x8
+#define RES_STATE_OFF 0x0
+
+/*
+* Power Bus Message Format
+*
+* Broadcast Message (16 Bits)
+* DEV_GRP[15:13] MT[12] RES_GRP[11:9] RES_TYPE2[8:7] RES_TYPE[6:4]
+* RES_STATE[3:0]
+*
+* Singular Message (16 Bits)
+* DEV_GRP[15:13] MT[12] RES_ID[11:4] RES_STATE[3:0]
+*
+*/
+
+#define MSG_BROADCAST(devgrp, grp, type, type2, state) \
+ (devgrp 13 | 1 12 | grp 9 | type2 7 | type 4 | state)
+
+#define MSG_SINGULAR(devgrp, id, state) \
+ (devgrp 13 | 0 12 | id 4 | state)
+
struct twl4030_platform_data {
unsignedirq_base, irq_end;
struct twl4030_bci_platform_data*bci;
@@ -277,6 +340,7 @@ struct twl4030_platform_data {
struct twl4030_madc_platform_data *madc;
struct twl4030_keypad_data *keypad;
struct twl4030_usb_data *usb;
+ struct twl4030_power_data *power;
/* REVISIT more to come ... _nothing_ should be hard-wired */
};
--
1.5.6.3
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[PATCH 4/6] 3430sdp and ldp use custom twl4030 power scripts.
The TI 3430dsp and ldp boards have a custom power script to handle sleep and
off modes.
Signed-off-by: Peter 'p2' De Schrijver [EMAIL PROTECTED]
---
arch/arm/mach-omap2/board-3430sdp.c | 84 +++
arch/arm/mach-omap2/board-ldp.c | 84 +++
2 files changed, 168 insertions(+), 0 deletions(-)
diff --git a/arch/arm/mach-omap2/board-3430sdp.c
b/arch/arm/mach-omap2/board-3430sdp.c
index 56f28ae..bb591bb 100644
--- a/arch/arm/mach-omap2/board-3430sdp.c
+++ b/arch/arm/mach-omap2/board-3430sdp.c
@@ -47,6 +47,8 @@
#include sdram-qimonda-hyb18m512160af-6.h
+#define CONFIG_DISABLE_HFCLK 1
+
#defineSDP3430_SMC91X_CS 3
#define ENABLE_VAUX3_DEDICATED 0x03
@@ -329,6 +331,87 @@ static struct twl4030_madc_platform_data sdp3430_madc_data
= {
.irq_line = 1,
};
+
+static struct twl4030_ins __initdata sleep_on_seq[] = {
+/*
+ * Turn off VDD1 and VDD2.
+ */
+ {MSG_SINGULAR(DEV_GRP_P1, 0xf, RES_STATE_OFF), 4},
+ {MSG_SINGULAR(DEV_GRP_P1, 0x10, RES_STATE_OFF), 2},
+#ifdef CONFIG_DISABLE_HFCLK
+/*
+ * And also turn off the OMAP3 PLLs and the sysclk output.
+ */
+ {MSG_SINGULAR(DEV_GRP_P1, 0x7, RES_STATE_OFF), 3},
+ {MSG_SINGULAR(DEV_GRP_P1, 0x19, RES_STATE_OFF), 3},
+#endif
+};
+
+static struct twl4030_script sleep_on_script __initdata = {
+ .script = sleep_on_seq,
+ .size = ARRAY_SIZE(sleep_on_seq),
+ .flags = TRITON_SLEEP_SCRIPT,
+};
+
+static struct twl4030_ins wakeup_seq[] __initdata = {
+#ifndef CONFIG_DISABLE_HFCLK
+/*
+ * Wakeup VDD1 and VDD2.
+ */
+ {MSG_SINGULAR(DEV_GRP_P1, 0xf, RES_STATE_ACTIVE), 4},
+ {MSG_SINGULAR(DEV_GRP_P1, 0x10, RES_STATE_ACTIVE), 2},
+#else
+/*
+ * Reenable the OMAP3 PLLs.
+ * Wakeup VDD1 and VDD2.
+ * Reenable sysclk output.
+ */
+ {MSG_SINGULAR(DEV_GRP_P1, 0x7, RES_STATE_ACTIVE), 0x30},
+ {MSG_SINGULAR(DEV_GRP_P1, 0xf, RES_STATE_ACTIVE), 0x30},
+ {MSG_SINGULAR(DEV_GRP_P1, 0x10, RES_STATE_ACTIVE), 0x37},
+ {MSG_SINGULAR(DEV_GRP_P1, 0x19, RES_STATE_ACTIVE), 3},
+#endif /* #ifndef CONFIG_DISABLE_HFCLK */
+};
+
+static struct twl4030_script wakeup_script __initdata = {
+ .script = wakeup_seq,
+ .size = ARRAY_SIZE(wakeup_seq),
+ .flags = TRITON_WAKEUP12_SCRIPT | TRITON_WAKEUP3_SCRIPT,
+};
+
+static struct twl4030_ins wrst_seq[] __initdata = {
+/*
+ * Reset twl4030.
+ * Reset VDD1 regulator.
+ * Reset VDD2 regulator.
+ * Reset VPLL1 regulator.
+ * Enable sysclk output.
+ * Reenable twl4030.
+ */
+ {MSG_SINGULAR(DEV_GRP_NULL, 0x1b, RES_STATE_OFF), 2},
+ {MSG_SINGULAR(DEV_GRP_P1, 0xf, RES_STATE_WRST), 15},
+ {MSG_SINGULAR(DEV_GRP_P1, 0x10, RES_STATE_WRST), 15},
+ {MSG_SINGULAR(DEV_GRP_P1, 0x7, RES_STATE_WRST), 0x60},
+ {MSG_SINGULAR(DEV_GRP_P1, 0x19, RES_STATE_ACTIVE), 2},
+ {MSG_SINGULAR(DEV_GRP_NULL, 0x1b, RES_STATE_ACTIVE), 2},
+};
+static struct twl4030_script wrst_script __initdata = {
+ .script = wrst_seq,
+ .size = ARRAY_SIZE(wakeup_seq),
+ .flags = TRITON_WRST_SCRIPT,
+};
+
+static struct twl4030_script *twl4030_scripts[] __initdata = {
+ sleep_on_script,
+ wakeup_script,
+ wrst_script,
+};
+
+static struct twl4030_power_data sdp3430_t2scripts_data __initdata = {
+ .scripts= twl4030_scripts,
+ .size = ARRAY_SIZE(twl4030_scripts),
+};
+
static struct twl4030_platform_data sdp3430_twldata = {
.irq_base = TWL4030_IRQ_BASE,
.irq_end= TWL4030_IRQ_END,
@@ -338,6 +421,7 @@ static struct twl4030_platform_data sdp3430_twldata = {
.gpio = sdp3430_gpio_data,
.madc = sdp3430_madc_data,
.keypad = sdp3430_kp_data,
+ .power = sdp3430_t2scripts_data,
.usb= sdp3430_usb_data,
};
diff --git a/arch/arm/mach-omap2/board-ldp.c b/arch/arm/mach-omap2/board-ldp.c
index 92710c3..d4d4e90 100644
--- a/arch/arm/mach-omap2/board-ldp.c
+++ b/arch/arm/mach-omap2/board-ldp.c
@@ -41,6 +41,8 @@
#include asm/delay.h
#include mach/control.h
+#define CONFIG_DISABLE_HFCLK 1
+
#define ENABLE_VAUX1_DEDICATED 0x03
#define ENABLE_VAUX1_DEV_GRP 0x20
@@ -195,6 +197,87 @@ static int ldp_batt_table[] = {
4040, 3910, 3790, 3670, 3550
};
+static struct twl4030_ins __initdata sleep_on_seq[] = {
+/*
+ * Turn off VDD1 and VDD2.
+ */
+ {MSG_SINGULAR(DEV_GRP_P1, 0xf, RES_STATE_OFF), 4},
+ {MSG_SINGULAR(DEV_GRP_P1, 0x10, RES_STATE_OFF), 2},
+#ifdef CONFIG_DISABLE_HFCLK
+/*
+ * And also turn off the OMAP3 PLLs and the sysclk output.
+ */
+ {MSG_SINGULAR(DEV_GRP_P1, 0x7, RES_STATE_OFF), 3},
+ {MSG_SINGULAR(DEV_GRP_P1, 0x19, RES_STATE_OFF), 3},
+#endif
+};
+
+static struct twl4030_script sleep_on_script __initdata = {
+ .script = sleep_on_seq,
+ .size = ARRAY_SIZE(sleep_on_seq),
+ .flags = TRITON_SLEEP_SCRIPT,
+};
+
+static struct twl4030_ins wakeup_seq
Re: [PATCH 5/6] Generic twl4030 power script for 3430 based boards.
On Thu, Oct 16, 2008 at 04:09:47PM -0700, ext David Brownell wrote: On Wednesday 15 October 2008, Peter 'p2' De Schrijver wrote: --- /dev/null +++ b/arch/arm/mach-omap2/twl4030-generic-scripts.h @@ -0,0 +1,8 @@ +#ifndef __TWL4030_GENERIC_SCRIPTS_H +#define __TWL4030_GENERIC_SCRIPTS_H + +#include linux/i2c/twl4030.h + +extern struct twl4030_power_data generic3430_t2scripts_data; + +#endif I'd still put this decl into arch/arm/mach-omap2/pm.h, which is already a bit of a grab-bag of PM hooks. As you noted, having a header for a single declaration isn't the Best Way. In retrospect I don't think that's such a good idea either. pm.h contains prototypes related to OMAP2/3 powermanagement. Even though twl4030 plays some role in powermanagement, it's more at the system level then at the OMAP chip level. Ie. from an OMAP point of view nothing has to be switched off. But from a system point of view, it does save some power to switch things off. So I don't feel it belongs there. Cheers, Peter. -- goa is a state of mind -- To unsubscribe from this list: send the line unsubscribe linux-omap in the body of a message to [EMAIL PROTECTED] More majordomo info at http://vger.kernel.org/majordomo-info.html
[PATCH 0/6] Integrate the twl4030 power code into new twl4030 mfd
This patchset integrates the twl4030 power code into the new twl4030 mfd framework. The scripts will be moved to the board specific data. Peter 'p2' De Schrijver (6): Add defines and data types for twl4030. Move existing TWL4030 code to drivers/mfd Hook twl4030 power code into twl4030 core. 3430sdp and ldp use custom twl4030 power scripts. Generic twl4030 power script for 3430 based boards. omap3 evm, beagle and overo use the generic twl4030 script arch/arm/mach-omap2/Makefile |9 +- arch/arm/mach-omap2/board-3430sdp.c | 84 ++ arch/arm/mach-omap2/board-ldp.c | 84 ++ arch/arm/mach-omap2/board-omap3beagle.c |4 +- arch/arm/mach-omap2/board-omap3evm.c |4 +- arch/arm/mach-omap2/board-overo.c |4 +- arch/arm/mach-omap2/twl4030-generic-scripts.c | 78 ++ arch/arm/mach-omap2/twl4030-generic-scripts.h |8 + drivers/i2c/chips/Makefile|2 +- drivers/i2c/chips/twl4030-power.c | 343 - drivers/mfd/Kconfig |9 + drivers/mfd/Makefile |1 + drivers/mfd/twl4030-core.c| 11 + drivers/mfd/twl4030-power.c | 270 +++ include/linux/i2c/twl4030.h | 64 + 15 files changed, 622 insertions(+), 353 deletions(-) create mode 100644 arch/arm/mach-omap2/twl4030-generic-scripts.c create mode 100644 arch/arm/mach-omap2/twl4030-generic-scripts.h delete mode 100644 drivers/i2c/chips/twl4030-power.c create mode 100644 drivers/mfd/twl4030-power.c -- To unsubscribe from this list: send the line unsubscribe linux-omap in the body of a message to [EMAIL PROTECTED] More majordomo info at http://vger.kernel.org/majordomo-info.html
[PATCH 5/6] Generic twl4030 power script for 3430 based boards.
This is a generic twl4030 power script for 3430 based boards. It handles
sleep and wakeup events. In case of a sleep event it will first put the
Reset and Control (RC) resources to sleep and then put the voltage regulators
to sleep. In case of a wakeup event, the system clock will be started first,
then the voltage regulators will be woken up and finally the RC resources will
be woken up.
Signed-off-by: Peter 'p2' De Schrijver [EMAIL PROTECTED]
---
arch/arm/mach-omap2/twl4030-generic-scripts.c | 78 +
arch/arm/mach-omap2/twl4030-generic-scripts.h |8 +++
2 files changed, 86 insertions(+), 0 deletions(-)
create mode 100644 arch/arm/mach-omap2/twl4030-generic-scripts.c
create mode 100644 arch/arm/mach-omap2/twl4030-generic-scripts.h
diff --git a/arch/arm/mach-omap2/twl4030-generic-scripts.c
b/arch/arm/mach-omap2/twl4030-generic-scripts.c
new file mode 100644
index 000..f41c9ef
--- /dev/null
+++ b/arch/arm/mach-omap2/twl4030-generic-scripts.c
@@ -0,0 +1,78 @@
+/*
+ * arch/arm/mach-omap2/twl4030-generic-scripts.c
+ *
+ * Generic power control scripts for TWL4030
+ *
+ * Copyright (C) 2008 Nokia Corporation
+ * Copyright (C) 2006 Texas Instruments, Inc
+ *
+ * Written by Kalle Jokiniemi
+ * Peter De Schrijver [EMAIL PROTECTED]
+ *
+ * This file is subject to the terms and conditions of the GNU General
+ * Public License. See the file COPYING in the main directory of this
+ * archive for more details.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
+ */
+
+#include linux/kernel.h
+#include linux/device.h
+#include linux/init.h
+#include linux/i2c/twl4030.h
+
+/*
+ * This script instructs twl4030 to first put the Reset and Control (RC)
+ * resources to sleep and then all the other resources.
+ */
+
+static struct twl4030_ins sleep_on_seq[] __initdata = {
+ {MSG_BROADCAST(DEV_GRP_NULL, RES_GRP_RC, RES_TYPE_ALL, RES_TYPE2_R0,
+ RES_STATE_SLEEP), 4},
+ {MSG_BROADCAST(DEV_GRP_NULL, RES_GRP_ALL, RES_TYPE_ALL, RES_TYPE2_R0,
+ RES_STATE_SLEEP), 4},
+};
+
+static struct twl4030_script sleep_on_script __initdata = {
+ .script = sleep_on_seq,
+ .size = ARRAY_SIZE(sleep_on_seq),
+ .flags = TRITON_SLEEP_SCRIPT,
+};
+
+/*
+ * This script instructs twl4030 to first enable CLKEN, then wakeup the
+ * regulators and then all other resources.
+ */
+
+static struct twl4030_ins wakeup_seq[] __initdata = {
+ {MSG_SINGULAR(DEV_GRP_NULL, 0x17, RES_STATE_ACTIVE), 0x30},
+ {MSG_BROADCAST(DEV_GRP_NULL, RES_GRP_PP_PR, RES_TYPE_ALL, RES_TYPE2_R0,
+ RES_STATE_ACTIVE), 0x37},
+ {MSG_BROADCAST(DEV_GRP_NULL, RES_GRP_ALL, RES_TYPE_ALL, RES_TYPE2_R0,
+ RES_STATE_ACTIVE), 0x2},
+};
+
+static struct twl4030_script wakeup_script __initdata = {
+ .script = wakeup_seq,
+ .size = ARRAY_SIZE(wakeup_seq),
+ .flags = TRITON_WAKEUP12_SCRIPT | TRITON_WAKEUP3_SCRIPT,
+};
+
+static struct twl4030_script *twl4030_scripts[] __initdata = {
+ sleep_on_script,
+ wakeup_script,
+};
+
+struct twl4030_power_data generic3430_t2scripts_data __initdata = {
+ .scripts= twl4030_scripts,
+ .size = ARRAY_SIZE(twl4030_scripts),
+};
+
+
diff --git a/arch/arm/mach-omap2/twl4030-generic-scripts.h
b/arch/arm/mach-omap2/twl4030-generic-scripts.h
new file mode 100644
index 000..64d8d3f
--- /dev/null
+++ b/arch/arm/mach-omap2/twl4030-generic-scripts.h
@@ -0,0 +1,8 @@
+#ifndef __TWL4030_GENERIC_SCRIPTS_H
+#define __TWL4030_GENERIC_SCRIPTS_H
+
+#include linux/i2c/twl4030.h
+
+extern struct twl4030_power_data generic3430_t2scripts_data;
+
+#endif
--
1.5.6.3
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[PATCH 3/6] Hook twl4030 power code into twl4030 core.
This patch makes twl4030 core call the power code in case the scripts are
present in the platform data.
Signed-off-by: Peter 'p2' De Schrijver [EMAIL PROTECTED]
---
drivers/mfd/Kconfig|9 +
drivers/mfd/Makefile |1 +
drivers/mfd/twl4030-core.c | 11 +++
3 files changed, 21 insertions(+), 0 deletions(-)
diff --git a/drivers/mfd/Kconfig b/drivers/mfd/Kconfig
index e643f6b..91c0417 100644
--- a/drivers/mfd/Kconfig
+++ b/drivers/mfd/Kconfig
@@ -64,6 +64,15 @@ config TWL4030_CORE
high speed USB OTG transceiver, an audio codec (on most
versions) and many other features.
+config TWL4030_POWER
+ bool Support power sequencing scripts on TWL4030/TPS659x0
+ depends on TWL4030_CORE
+ help
+ Say yes here if you want to use the power sequencing scripts on
+ the TWL4030/TPS659x0. These scripts control which regulators or
+ oscillators are switched off or on or reset when a sleep, wakeup
+ or warm reset event occurs.
+
config MFD_TMIO
bool
default n
diff --git a/drivers/mfd/Makefile b/drivers/mfd/Makefile
index 5650e7b..08c5dfe 100644
--- a/drivers/mfd/Makefile
+++ b/drivers/mfd/Makefile
@@ -13,6 +13,7 @@ obj-$(CONFIG_MFD_TC6387XB)+= tc6387xb.o
obj-$(CONFIG_MFD_TC6393XB) += tc6393xb.o
obj-$(CONFIG_TWL4030_CORE) += twl4030-core.o
+obj-$(CONFIG_TWL4030_POWER)+= twl4030-power.o
obj-$(CONFIG_MFD_CORE) += mfd-core.o
diff --git a/drivers/mfd/twl4030-core.c b/drivers/mfd/twl4030-core.c
index fd9a016..7a5c9d0 100644
--- a/drivers/mfd/twl4030-core.c
+++ b/drivers/mfd/twl4030-core.c
@@ -81,6 +81,12 @@
#define twl_has_madc() false
#endif
+#ifdef CONFIG_TWL4030_POWER
+#define twl_has_power()true
+#else
+#define twl_has_power()false
+#endif
+
#if defined(CONFIG_RTC_DRV_TWL4030) || defined(CONFIG_RTC_DRV_TWL4030_MODULE)
#define twl_has_rtc() true
#else
@@ -106,6 +112,8 @@ static inline void activate_irq(int irq)
#endif
}
+extern void twl4030_power_init(struct twl4030_power_data *triton2_scripts);
+
/* Primary Interrupt Handler on TWL4030 Registers */
/* Register Definitions */
@@ -794,6 +802,9 @@ static int add_children(struct twl4030_platform_data *pdata)
}
}
+ if (twl_has_power() pdata-power)
+ twl4030_power_init(pdata-power);
+
if (twl_has_rtc()) {
twl = twl4030_modules[3];
--
1.5.6.3
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[PATCH 6/6] omap3 evm, beagle and overo use the generic twl4030 script
Make omap3 evm, beagle and overo use the generic twl4030 script.
Signed-off-by: Peter 'p2' De Schrijver [EMAIL PROTECTED]
---
arch/arm/mach-omap2/Makefile|9 ++---
arch/arm/mach-omap2/board-omap3beagle.c |4 ++--
arch/arm/mach-omap2/board-omap3evm.c|4 ++--
arch/arm/mach-omap2/board-overo.c |4 ++--
4 files changed, 12 insertions(+), 9 deletions(-)
diff --git a/arch/arm/mach-omap2/Makefile b/arch/arm/mach-omap2/Makefile
index 33de217..ed0cd7a 100644
--- a/arch/arm/mach-omap2/Makefile
+++ b/arch/arm/mach-omap2/Makefile
@@ -58,10 +58,12 @@ obj-$(CONFIG_MACH_OMAP_3430SDP) +=
board-3430sdp.o \
obj-$(CONFIG_MACH_OMAP3EVM)+= board-omap3evm.o \
hsmmc.o \
usb-musb.o usb-ehci.o \
- board-omap3evm-flash.o
+ board-omap3evm-flash.o \
+ twl4030-generic-scripts.o
obj-$(CONFIG_MACH_OMAP3_BEAGLE)+= board-omap3beagle.o \
usb-musb.o usb-ehci.o \
- hsmmc.o
+ hsmmc.o \
+ twl4030-generic-scripts.o
obj-$(CONFIG_MACH_OMAP_LDP)+= board-ldp.o \
hsmmc.o \
usb-musb.o
@@ -77,7 +79,8 @@ obj-$(CONFIG_MACH_NOKIA_N810) += board-n810.o
obj-$(CONFIG_MACH_OVERO) += board-overo.o \
hsmmc.o \
usb-musb.o \
- usb-ehci.o
+ usb-ehci.o \
+ twl4030-generic-scripts.o
# TUSB 6010 chips
obj-$(CONFIG_MACH_OMAP2_TUSB6010) += usb-tusb6010.o
diff --git a/arch/arm/mach-omap2/board-omap3beagle.c
b/arch/arm/mach-omap2/board-omap3beagle.c
index 19702c7..cc9506b 100644
--- a/arch/arm/mach-omap2/board-omap3beagle.c
+++ b/arch/arm/mach-omap2/board-omap3beagle.c
@@ -24,8 +24,6 @@
#include linux/input.h
#include linux/gpio_keys.h
-#include linux/i2c/twl4030.h
-
#include linux/mtd/mtd.h
#include linux/mtd/partitions.h
#include linux/mtd/nand.h
@@ -45,6 +43,7 @@
#include mach/nand.h
#include mach/mux.h
+#include twl4030-generic-scripts.h
#define GPMC_CS0_BASE 0x60
#define GPMC_CS_SIZE 0x30
@@ -149,6 +148,7 @@ static struct twl4030_platform_data beagle_twldata = {
/* platform_data for children goes here */
.usb= beagle_usb_data,
.gpio = beagle_gpio_data,
+ .power = generic3430_t2scripts_data,
};
static struct i2c_board_info __initdata beagle_i2c_boardinfo[] = {
diff --git a/arch/arm/mach-omap2/board-omap3evm.c
b/arch/arm/mach-omap2/board-omap3evm.c
index 3538067..a72772f 100644
--- a/arch/arm/mach-omap2/board-omap3evm.c
+++ b/arch/arm/mach-omap2/board-omap3evm.c
@@ -20,8 +20,6 @@
#include linux/clk.h
#include linux/input.h
-#include linux/i2c/twl4030.h
-
#include linux/spi/spi.h
#include linux/spi/ads7846.h
#include linux/i2c/twl4030.h
@@ -41,6 +39,7 @@
#include mach/mcspi.h
#include sdram-micron-mt46h32m32lf-6.h
+#include twl4030-generic-scripts.h
static struct resource omap3evm_smc911x_resources[] = {
[0] = {
@@ -139,6 +138,7 @@ static struct twl4030_platform_data omap3evm_twldata = {
.keypad = omap3evm_kp_data,
.madc = omap3evm_madc_data,
.usb= omap3evm_usb_data,
+ .power = generic3430_t2scripts_data,
.gpio = omap3evm_gpio_data,
};
diff --git a/arch/arm/mach-omap2/board-overo.c
b/arch/arm/mach-omap2/board-overo.c
index 4e2781a..b0e5cec 100644
--- a/arch/arm/mach-omap2/board-overo.c
+++ b/arch/arm/mach-omap2/board-overo.c
@@ -27,8 +27,6 @@
#include linux/kernel.h
#include linux/platform_device.h
-#include linux/i2c/twl4030.h
-
#include linux/mtd/mtd.h
#include linux/mtd/nand.h
#include linux/mtd/partitions.h
@@ -50,6 +48,7 @@
#include mach/usb-musb.h
#include sdram-micron-mt46h32m32lf-6.h
+#include twl4030-generic-scripts.h
#define NAND_BLOCK_SIZE SZ_128K
#define GPMC_CS0_BASE 0x60
@@ -160,6 +159,7 @@ static struct twl4030_platform_data overo_twldata = {
.irq_end= TWL4030_IRQ_END,
.gpio = overo_gpio_data,
.usb= overo_usb_data,
+ .power = generic3430_t2scripts_data,
};
static struct i2c_board_info __initdata overo_i2c_boardinfo[] = {
--
1.5.6.3
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[PATCH 4/6] 3430sdp and ldp use custom twl4030 power scripts.
The TI 3430dsp and ldp boards have a custom power script to handle sleep and
off modes.
Signed-off-by: Peter 'p2' De Schrijver [EMAIL PROTECTED]
---
arch/arm/mach-omap2/board-3430sdp.c | 84 +++
arch/arm/mach-omap2/board-ldp.c | 84 +++
2 files changed, 168 insertions(+), 0 deletions(-)
diff --git a/arch/arm/mach-omap2/board-3430sdp.c
b/arch/arm/mach-omap2/board-3430sdp.c
index 56f28ae..bb591bb 100644
--- a/arch/arm/mach-omap2/board-3430sdp.c
+++ b/arch/arm/mach-omap2/board-3430sdp.c
@@ -47,6 +47,8 @@
#include sdram-qimonda-hyb18m512160af-6.h
+#define CONFIG_DISABLE_HFCLK 1
+
#defineSDP3430_SMC91X_CS 3
#define ENABLE_VAUX3_DEDICATED 0x03
@@ -329,6 +331,87 @@ static struct twl4030_madc_platform_data sdp3430_madc_data
= {
.irq_line = 1,
};
+
+static struct twl4030_ins __initdata sleep_on_seq[] = {
+/*
+ * Turn off VDD1 and VDD2.
+ */
+ {MSG_SINGULAR(DEV_GRP_P1, 0xf, RES_STATE_OFF), 4},
+ {MSG_SINGULAR(DEV_GRP_P1, 0x10, RES_STATE_OFF), 2},
+#ifdef CONFIG_DISABLE_HFCLK
+/*
+ * And also turn off the OMAP3 PLLs and the sysclk output.
+ */
+ {MSG_SINGULAR(DEV_GRP_P1, 0x7, RES_STATE_OFF), 3},
+ {MSG_SINGULAR(DEV_GRP_P1, 0x19, RES_STATE_OFF), 3},
+#endif
+};
+
+static struct twl4030_script sleep_on_script __initdata = {
+ .script = sleep_on_seq,
+ .size = ARRAY_SIZE(sleep_on_seq),
+ .flags = TRITON_SLEEP_SCRIPT,
+};
+
+static struct twl4030_ins wakeup_seq[] __initdata = {
+#ifndef CONFIG_DISABLE_HFCLK
+/*
+ * Wakeup VDD1 and VDD2.
+ */
+ {MSG_SINGULAR(DEV_GRP_P1, 0xf, RES_STATE_ACTIVE), 4},
+ {MSG_SINGULAR(DEV_GRP_P1, 0x10, RES_STATE_ACTIVE), 2},
+#else
+/*
+ * Reenable the OMAP3 PLLs.
+ * Wakeup VDD1 and VDD2.
+ * Reenable sysclk output.
+ */
+ {MSG_SINGULAR(DEV_GRP_P1, 0x7, RES_STATE_ACTIVE), 0x30},
+ {MSG_SINGULAR(DEV_GRP_P1, 0xf, RES_STATE_ACTIVE), 0x30},
+ {MSG_SINGULAR(DEV_GRP_P1, 0x10, RES_STATE_ACTIVE), 0x37},
+ {MSG_SINGULAR(DEV_GRP_P1, 0x19, RES_STATE_ACTIVE), 3},
+#endif /* #ifndef CONFIG_DISABLE_HFCLK */
+};
+
+static struct twl4030_script wakeup_script __initdata = {
+ .script = wakeup_seq,
+ .size = ARRAY_SIZE(wakeup_seq),
+ .flags = TRITON_WAKEUP12_SCRIPT | TRITON_WAKEUP3_SCRIPT,
+};
+
+static struct twl4030_ins wrst_seq[] __initdata = {
+/*
+ * Reset twl4030.
+ * Reset VDD1 regulator.
+ * Reset VDD2 regulator.
+ * Reset VPLL1 regulator.
+ * Enable sysclk output.
+ * Reenable twl4030.
+ */
+ {MSG_SINGULAR(DEV_GRP_NULL, 0x1b, RES_STATE_OFF), 2},
+ {MSG_SINGULAR(DEV_GRP_P1, 0xf, RES_STATE_WRST), 15},
+ {MSG_SINGULAR(DEV_GRP_P1, 0x10, RES_STATE_WRST), 15},
+ {MSG_SINGULAR(DEV_GRP_P1, 0x7, RES_STATE_WRST), 0x60},
+ {MSG_SINGULAR(DEV_GRP_P1, 0x19, RES_STATE_ACTIVE), 2},
+ {MSG_SINGULAR(DEV_GRP_NULL, 0x1b, RES_STATE_ACTIVE), 2},
+};
+static struct twl4030_script wrst_script __initdata = {
+ .script = wrst_seq,
+ .size = ARRAY_SIZE(wakeup_seq),
+ .flags = TRITON_WRST_SCRIPT,
+};
+
+static struct twl4030_script *twl4030_scripts[] __initdata = {
+ sleep_on_script,
+ wakeup_script,
+ wrst_script,
+};
+
+static struct twl4030_power_data sdp3430_t2scripts_data __initdata = {
+ .scripts= twl4030_scripts,
+ .size = ARRAY_SIZE(twl4030_scripts),
+};
+
static struct twl4030_platform_data sdp3430_twldata = {
.irq_base = TWL4030_IRQ_BASE,
.irq_end= TWL4030_IRQ_END,
@@ -338,6 +421,7 @@ static struct twl4030_platform_data sdp3430_twldata = {
.gpio = sdp3430_gpio_data,
.madc = sdp3430_madc_data,
.keypad = sdp3430_kp_data,
+ .power = sdp3430_t2scripts_data,
.usb= sdp3430_usb_data,
};
diff --git a/arch/arm/mach-omap2/board-ldp.c b/arch/arm/mach-omap2/board-ldp.c
index 92710c3..d4d4e90 100644
--- a/arch/arm/mach-omap2/board-ldp.c
+++ b/arch/arm/mach-omap2/board-ldp.c
@@ -41,6 +41,8 @@
#include asm/delay.h
#include mach/control.h
+#define CONFIG_DISABLE_HFCLK 1
+
#define ENABLE_VAUX1_DEDICATED 0x03
#define ENABLE_VAUX1_DEV_GRP 0x20
@@ -195,6 +197,87 @@ static int ldp_batt_table[] = {
4040, 3910, 3790, 3670, 3550
};
+static struct twl4030_ins __initdata sleep_on_seq[] = {
+/*
+ * Turn off VDD1 and VDD2.
+ */
+ {MSG_SINGULAR(DEV_GRP_P1, 0xf, RES_STATE_OFF), 4},
+ {MSG_SINGULAR(DEV_GRP_P1, 0x10, RES_STATE_OFF), 2},
+#ifdef CONFIG_DISABLE_HFCLK
+/*
+ * And also turn off the OMAP3 PLLs and the sysclk output.
+ */
+ {MSG_SINGULAR(DEV_GRP_P1, 0x7, RES_STATE_OFF), 3},
+ {MSG_SINGULAR(DEV_GRP_P1, 0x19, RES_STATE_OFF), 3},
+#endif
+};
+
+static struct twl4030_script sleep_on_script __initdata = {
+ .script = sleep_on_seq,
+ .size = ARRAY_SIZE(sleep_on_seq),
+ .flags = TRITON_SLEEP_SCRIPT,
+};
+
+static struct twl4030_ins wakeup_seq
[PATCH 2/6] Move existing TWL4030 code to drivers/mfd
This patches moves the twl4030 power sequencer code to drivers/mfd and updates the code for the new twl4030 framework. The code handles downloading the scripts provided by the board configuration and configuring the chip to call the relevant script for each event (processor group 1 and 2 sleep, processor group 3 sleep, wakeup or warm reset). Signed-off-by: Peter 'p2' De Schrijver [EMAIL PROTECTED] --- drivers/i2c/chips/Makefile|2 +- drivers/i2c/chips/twl4030-power.c | 343 - drivers/mfd/twl4030-power.c | 270 + 3 files changed, 271 insertions(+), 344 deletions(-) delete mode 100644 drivers/i2c/chips/twl4030-power.c create mode 100644 drivers/mfd/twl4030-power.c diff --git a/drivers/i2c/chips/Makefile b/drivers/i2c/chips/Makefile index ba41a57..7e0fdfa 100644 --- a/drivers/i2c/chips/Makefile +++ b/drivers/i2c/chips/Makefile @@ -24,7 +24,7 @@ obj-$(CONFIG_GPIOEXPANDER_OMAP) += gpio_expander_omap.o obj-$(CONFIG_MENELAUS) += menelaus.o obj-$(CONFIG_SENSORS_TSL2550) += tsl2550.o obj-$(CONFIG_SENSORS_TSL2563) += tsl2563.o -obj-$(CONFIG_TWL4030_CORE) += twl4030-pwrirq.o twl4030-power.o +obj-$(CONFIG_TWL4030_CORE) += twl4030-pwrirq.o obj-$(CONFIG_TWL4030_USB) += twl4030-usb.o obj-$(CONFIG_TWL4030_POWEROFF) += twl4030-poweroff.o obj-$(CONFIG_TWL4030_PWRBUTTON)+= twl4030-pwrbutton.o diff --git a/drivers/i2c/chips/twl4030-power.c b/drivers/i2c/chips/twl4030-power.c deleted file mode 100644 index cb325b0..000 --- a/drivers/i2c/chips/twl4030-power.c +++ /dev/null @@ -1,343 +0,0 @@ -/* - * linux/drivers/i2c/chips/twl4030-power.c - * - * Handle TWL4030 Power initialization - * - * Copyright (C) 2008 Nokia Corporation - * Copyright (C) 2006 Texas Instruments, Inc - * - * Written by Kalle Jokiniemi - * Peter De Schrijver [EMAIL PROTECTED] - * - * This file is subject to the terms and conditions of the GNU General - * Public License. See the file COPYING in the main directory of this - * archive for more details. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA - */ - -#include linux/module.h -#include linux/pm.h -#include linux/i2c/twl4030.h - -#include asm/mach-types.h - -#define PWR_P1_SW_EVENTS 0x10 -#define PWR_DEVOFF (10) - -#define PHY_TO_OFF_PM_MASTER(p)(p - 0x36) -#define PHY_TO_OFF_PM_RECIEVER(p) (p - 0x5b) - -/* resource - hfclk */ -#define R_HFCLKOUT_DEV_GRP PHY_TO_OFF_PM_RECIEVER(0xe6) - -/* PM events */ -#define R_P1_SW_EVENTS PHY_TO_OFF_PM_MASTER(0x46) -#define R_P2_SW_EVENTS PHY_TO_OFF_PM_MASTER(0x47) -#define R_P3_SW_EVENTS PHY_TO_OFF_PM_MASTER(0x48) -#define R_CFG_P1_TRANSITIONPHY_TO_OFF_PM_MASTER(0x36) -#define R_CFG_P2_TRANSITIONPHY_TO_OFF_PM_MASTER(0x37) -#define R_CFG_P3_TRANSITIONPHY_TO_OFF_PM_MASTER(0x38) - -#define LVL_WAKEUP 0x08 - -#define ENABLE_WARMRESET (14) - -/* sequence script */ - -#define END_OF_SCRIPT 0x3f - -#define R_SEQ_ADD_A2S PHY_TO_OFF_PM_MASTER(0x55) -#define R_SEQ_ADD_SA12 PHY_TO_OFF_PM_MASTER(0x56) -#defineR_SEQ_ADD_S2A3 PHY_TO_OFF_PM_MASTER(0x57) -#defineR_SEQ_ADD_WARM PHY_TO_OFF_PM_MASTER(0x58) -#define R_MEMORY_ADDRESS PHY_TO_OFF_PM_MASTER(0x59) -#define R_MEMORY_DATA PHY_TO_OFF_PM_MASTER(0x5a) - -/* Power bus message definitions */ - -#define DEV_GRP_NULL 0x0 -#define DEV_GRP_P1 0x1 -#define DEV_GRP_P2 0x2 -#define DEV_GRP_P3 0x4 - -#define RES_GRP_RES0x0 -#define RES_GRP_PP 0x1 -#define RES_GRP_RC 0x2 -#define RES_GRP_PP_RC 0x3 -#define RES_GRP_PR 0x4 -#define RES_GRP_PP_PR 0x5 -#define RES_GRP_RC_PR 0x6 -#define RES_GRP_ALL0x7 - -#define RES_TYPE2_R0 0x0 - -#define RES_TYPE_ALL 0x7 - -#define RES_STATE_WRST 0xF -#define RES_STATE_ACTIVE 0xE -#define RES_STATE_SLEEP0x8 -#define RES_STATE_OFF 0x0 - -/* -* Power Bus Message Format -* -* Broadcast Message (16 Bits) -* DEV_GRP[15:13] MT[12] RES_GRP[11:9] RES_TYPE2[8:7] RES_TYPE[6:4] -* RES_STATE[3:0] -* -* Singular Message (16 Bits) -* DEV_GRP[15:13] MT[12] RES_ID[11:4] RES_STATE[3:0] -* -*/ - -#define MSG_BROADCAST(devgrp, grp, type, type2, state) \ - (devgrp 13 | 1 12 | grp 9 | type2 7 | type 4 | state) - -#define MSG_SINGULAR(devgrp, id, state) \ - (devgrp 13 | 0 12 | id 4
Re: [PATCH 3/3] Hook into powerdomain code
On Tue, Oct 14, 2008 at 01:55:07PM -0600, ext Paul Walmsley wrote:
On Tue, 14 Oct 2008, Peter 'p2' De Schrijver wrote:
@@ -179,9 +183,12 @@ void pwrdm_init(struct powerdomain **pwrdm_list)
{
struct powerdomain **p = NULL;
- if (pwrdm_list)
- for (p = pwrdm_list; *p; p++)
+ if (pwrdm_list) {
+ for (p = pwrdm_list; *p; p++) {
pwrdm_register(*p);
+ _pwrdm_setup(*p);
perhaps I am going blind - could you point me at where _pwrdm_setup() is
defined?
Hmm. This seems to be a change which should have been in the normal pm
counters patch. Somehow it didn't get there. I will send an updated
version of that patch.
Cheers,
Peter.
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[PATCH 1/2] PM counter infrastructure.
This patch provides the infrastructure to count how many times a powerdomain
entered a given power state (on, inactive, retention, off). A number of
functions are provided which will be called by the chip specific powerdomain
and clockdomain code whenever a transition might have happened.
Signed-off-by: Peter 'p2' De Schrijver [EMAIL PROTECTED]
---
arch/arm/mach-omap2/powerdomain.c | 101 -
arch/arm/plat-omap/include/mach/powerdomain.h |7 ++
2 files changed, 106 insertions(+), 2 deletions(-)
diff --git a/arch/arm/mach-omap2/powerdomain.c
b/arch/arm/mach-omap2/powerdomain.c
index 73e2971..3a9e151 100644
--- a/arch/arm/mach-omap2/powerdomain.c
+++ b/arch/arm/mach-omap2/powerdomain.c
@@ -35,6 +35,11 @@
#include mach/powerdomain.h
#include mach/clockdomain.h
+enum {
+ PWRDM_STATE_NOW = 0,
+ PWRDM_STATE_PREV,
+};
+
/* pwrdm_list contains all registered struct powerdomains */
static LIST_HEAD(pwrdm_list);
@@ -102,6 +107,63 @@ static struct powerdomain *_pwrdm_deps_lookup(struct
powerdomain *pwrdm,
return pd-pwrdm;
}
+static int _pwrdm_state_switch(struct powerdomain *pwrdm, int flag)
+{
+
+ int prev;
+ int state;
+
+ if (pwrdm == NULL)
+ return -EINVAL;
+
+ state = pwrdm_read_pwrst(pwrdm);
+
+ switch (flag) {
+ case PWRDM_STATE_NOW:
+ prev = pwrdm-state;
+ break;
+ case PWRDM_STATE_PREV:
+ prev = pwrdm_read_prev_pwrst(pwrdm);
+ if (pwrdm-state != prev)
+ pwrdm-state_counter[prev]++;
+ break;
+ default:
+ return -EINVAL;
+ }
+
+ if (state != prev)
+ pwrdm-state_counter[state]++;
+
+ pwrdm-state = state;
+
+ return 0;
+}
+
+static int _pwrdm_pre_transition_cb(struct powerdomain *pwrdm)
+{
+ pwrdm_clear_all_prev_pwrst(pwrdm);
+ _pwrdm_state_switch(pwrdm, PWRDM_STATE_NOW);
+ return 0;
+}
+
+static int _pwrdm_post_transition_cb(struct powerdomain *pwrdm)
+{
+ _pwrdm_state_switch(pwrdm, PWRDM_STATE_PREV);
+ return 0;
+}
+
+static __init void _pwrdm_setup(struct powerdomain *pwrdm)
+{
+ int i;
+
+ for (i = 0; i 4; i++)
+ pwrdm-state_counter[i] = 0;
+
+ pwrdm_wait_transition(pwrdm);
+ pwrdm-state = pwrdm_read_pwrst(pwrdm);
+ pwrdm-state_counter[pwrdm-state] = 1;
+
+}
/* Public functions */
@@ -117,9 +179,12 @@ void pwrdm_init(struct powerdomain **pwrdm_list)
{
struct powerdomain **p = NULL;
- if (pwrdm_list)
- for (p = pwrdm_list; *p; p++)
+ if (pwrdm_list) {
+ for (p = pwrdm_list; *p; p++) {
pwrdm_register(*p);
+ _pwrdm_setup(*p);
+ }
+ }
}
/**
@@ -1110,4 +1175,36 @@ int pwrdm_wait_transition(struct powerdomain *pwrdm)
return 0;
}
+int pwrdm_state_switch(struct powerdomain *pwrdm)
+{
+ return _pwrdm_state_switch(pwrdm, PWRDM_STATE_NOW);
+}
+
+int pwrdm_clkdm_state_switch(struct clockdomain *clkdm)
+{
+ if (clkdm != NULL clkdm-pwrdm.ptr != NULL) {
+ pwrdm_wait_transition(clkdm-pwrdm.ptr);
+ return pwrdm_state_switch(clkdm-pwrdm.ptr);
+ }
+
+ return -EINVAL;
+}
+int pwrdm_clk_state_switch(struct clk *clk)
+{
+ if (clk != NULL clk-clkdm.ptr != NULL)
+ return pwrdm_clkdm_state_switch(clk-clkdm.ptr);
+ return -EINVAL;
+}
+
+int pwrdm_pre_transition(void)
+{
+ pwrdm_for_each(_pwrdm_pre_transition_cb);
+ return 0;
+}
+
+int pwrdm_post_transition(void)
+{
+ pwrdm_for_each(_pwrdm_post_transition_cb);
+ return 0;
+}
diff --git a/arch/arm/plat-omap/include/mach/powerdomain.h
b/arch/arm/plat-omap/include/mach/powerdomain.h
index 69c9e67..52663fc 100644
--- a/arch/arm/plat-omap/include/mach/powerdomain.h
+++ b/arch/arm/plat-omap/include/mach/powerdomain.h
@@ -117,6 +117,8 @@ struct powerdomain {
struct list_head node;
+ int state;
+ unsigned state_counter[4];
};
@@ -164,4 +166,9 @@ bool pwrdm_has_hdwr_sar(struct powerdomain *pwrdm);
int pwrdm_wait_transition(struct powerdomain *pwrdm);
+int pwrdm_state_switch(struct powerdomain *pwrdm);
+int pwrdm_clkdm_state_switch(struct clockdomain *clkdm);
+int pwrdm_pre_transition(void);
+int pwrdm_post_transition(void);
+
#endif
--
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[PATCH 0/2] PM counters
This patch introduces counters for the various PM states in OMAP3. Peter 'p2' De Schrijver (2): PM counter infrastructure. Hook into PM counters arch/arm/mach-omap2/clock.c |2 + arch/arm/mach-omap2/clockdomain.c |4 + arch/arm/mach-omap2/pm34xx.c |6 ++ arch/arm/mach-omap2/powerdomain.c | 101 - arch/arm/plat-omap/include/mach/powerdomain.h |7 ++ 5 files changed, 118 insertions(+), 2 deletions(-) -- To unsubscribe from this list: send the line unsubscribe linux-omap in the body of a message to [EMAIL PROTECTED] More majordomo info at http://vger.kernel.org/majordomo-info.html
[PATCH 2/2] Hook into PM counters
This patch modifies the clock, clockdomain and OMAP3 specific powerdomain
code to call the PM counter infrastructure whenever one or more powerdomains
might have changed state.
Signed-off-by: Peter 'p2' De Schrijver [EMAIL PROTECTED]
---
arch/arm/mach-omap2/clock.c |2 ++
arch/arm/mach-omap2/clockdomain.c |4
arch/arm/mach-omap2/pm34xx.c |6 ++
3 files changed, 12 insertions(+), 0 deletions(-)
diff --git a/arch/arm/mach-omap2/clock.c b/arch/arm/mach-omap2/clock.c
index c3af24e..dbbc7c8 100644
--- a/arch/arm/mach-omap2/clock.c
+++ b/arch/arm/mach-omap2/clock.c
@@ -1013,5 +1013,7 @@ void omap2_clk_disable_unused(struct clk *clk)
printk(KERN_INFO Disabling unused clock \%s\\n, clk-name);
_omap2_clk_disable(clk);
+ if (clk-clkdm.ptr != NULL)
+ pwrdm_clkdm_state_switch(clk-clkdm.ptr);
}
#endif
diff --git a/arch/arm/mach-omap2/clockdomain.c
b/arch/arm/mach-omap2/clockdomain.c
index fa62f14..5249fe8 100644
--- a/arch/arm/mach-omap2/clockdomain.c
+++ b/arch/arm/mach-omap2/clockdomain.c
@@ -567,6 +567,8 @@ int omap2_clkdm_clk_enable(struct clockdomain *clkdm,
struct clk *clk)
else
omap2_clkdm_wakeup(clkdm);
+ pwrdm_clkdm_state_switch(clkdm);
+
return 0;
}
@@ -618,6 +620,8 @@ int omap2_clkdm_clk_disable(struct clockdomain *clkdm,
struct clk *clk)
else
omap2_clkdm_sleep(clkdm);
+ pwrdm_clkdm_state_switch(clkdm);
+
return 0;
}
diff --git a/arch/arm/mach-omap2/pm34xx.c b/arch/arm/mach-omap2/pm34xx.c
index a828db6..1fbb690 100644
--- a/arch/arm/mach-omap2/pm34xx.c
+++ b/arch/arm/mach-omap2/pm34xx.c
@@ -170,6 +170,8 @@ static void omap_sram_idle(void)
disable_smartreflex(SR1);
disable_smartreflex(SR2);
+ pwrdm_pre_transition();
+
omap2_gpio_prepare_for_retention();
_omap_sram_idle(NULL, save_state);
@@ -179,6 +181,9 @@ static void omap_sram_idle(void)
/* Enable smartreflex after WFI */
enable_smartreflex(SR1);
enable_smartreflex(SR2);
+
+ pwrdm_post_transition();
+
}
/*
@@ -260,6 +265,7 @@ static int set_pwrdm_state(struct powerdomain *pwrdm, u32
state)
if (sleep_switch) {
omap2_clkdm_allow_idle(pwrdm-pwrdm_clkdms[0]);
pwrdm_wait_transition(pwrdm);
+ pwrdm_state_switch(pwrdm);
}
err:
--
1.5.6.3
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[PATCH 1/3] Add closures to clkdm_for_each and pwrdm_for_each.
First add some infrastructure to easily iterate over clock and power domains.
Signed-off-by: Peter 'p2' De Schrijver [EMAIL PROTECTED]
---
arch/arm/mach-omap2/clockdomain.c |5 +++--
arch/arm/mach-omap2/pm34xx.c |8
arch/arm/plat-omap/include/mach/clockdomain.h |3 ++-
arch/arm/plat-omap/include/mach/powerdomain.h |3 ++-
4 files changed, 11 insertions(+), 8 deletions(-)
diff --git a/arch/arm/mach-omap2/clockdomain.c
b/arch/arm/mach-omap2/clockdomain.c
index 5249fe8..b0b5885 100644
--- a/arch/arm/mach-omap2/clockdomain.c
+++ b/arch/arm/mach-omap2/clockdomain.c
@@ -295,7 +295,8 @@ struct clockdomain *clkdm_lookup(const char *name)
* anything else to indicate failure; or -EINVAL if the function pointer
* is null.
*/
-int clkdm_for_each(int (*fn)(struct clockdomain *clkdm))
+int clkdm_for_each(int (*fn)(struct clockdomain *clkdm, void *user),
+ void *user)
{
struct clockdomain *clkdm;
int ret = 0;
@@ -305,7 +306,7 @@ int clkdm_for_each(int (*fn)(struct clockdomain *clkdm))
mutex_lock(clkdm_mutex);
list_for_each_entry(clkdm, clkdm_list, node) {
- ret = (*fn)(clkdm);
+ ret = (*fn)(clkdm, user);
if (ret)
break;
}
diff --git a/arch/arm/mach-omap2/pm34xx.c b/arch/arm/mach-omap2/pm34xx.c
index 1fbb690..be69839 100644
--- a/arch/arm/mach-omap2/pm34xx.c
+++ b/arch/arm/mach-omap2/pm34xx.c
@@ -518,7 +518,7 @@ static void __init prcm_setup_regs(void)
OCP_MOD, OMAP2_PRM_IRQENABLE_MPU_OFFSET);
}
-static int __init pwrdms_setup(struct powerdomain *pwrdm)
+static int __init pwrdms_setup(struct powerdomain *pwrdm, void *unused)
{
struct power_state *pwrst;
@@ -538,7 +538,7 @@ static int __init pwrdms_setup(struct powerdomain *pwrdm)
return set_pwrdm_state(pwrst-pwrdm, pwrst-next_state);
}
-static int __init clkdms_setup(struct clockdomain *clkdm)
+static int __init clkdms_setup(struct clockdomain *clkdm, void *unused)
{
omap2_clkdm_allow_idle(clkdm);
return 0;
@@ -564,13 +564,13 @@ int __init omap3_pm_init(void)
goto err1;
}
- ret = pwrdm_for_each(pwrdms_setup);
+ ret = pwrdm_for_each(pwrdms_setup, NULL);
if (ret) {
printk(KERN_ERR Failed to setup powerdomains\n);
goto err2;
}
- (void) clkdm_for_each(clkdms_setup);
+ (void) clkdm_for_each(clkdms_setup, NULL);
mpu_pwrdm = pwrdm_lookup(mpu_pwrdm);
if (mpu_pwrdm == NULL) {
diff --git a/arch/arm/plat-omap/include/mach/clockdomain.h
b/arch/arm/plat-omap/include/mach/clockdomain.h
index b9d0dd2..99ebd88 100644
--- a/arch/arm/plat-omap/include/mach/clockdomain.h
+++ b/arch/arm/plat-omap/include/mach/clockdomain.h
@@ -95,7 +95,8 @@ int clkdm_register(struct clockdomain *clkdm);
int clkdm_unregister(struct clockdomain *clkdm);
struct clockdomain *clkdm_lookup(const char *name);
-int clkdm_for_each(int (*fn)(struct clockdomain *clkdm));
+int clkdm_for_each(int (*fn)(struct clockdomain *clkdm, void *user),
+ void *user);
struct powerdomain *clkdm_get_pwrdm(struct clockdomain *clkdm);
void omap2_clkdm_allow_idle(struct clockdomain *clkdm);
diff --git a/arch/arm/plat-omap/include/mach/powerdomain.h
b/arch/arm/plat-omap/include/mach/powerdomain.h
index 52663fc..de03f3d 100644
--- a/arch/arm/plat-omap/include/mach/powerdomain.h
+++ b/arch/arm/plat-omap/include/mach/powerdomain.h
@@ -128,7 +128,8 @@ int pwrdm_register(struct powerdomain *pwrdm);
int pwrdm_unregister(struct powerdomain *pwrdm);
struct powerdomain *pwrdm_lookup(const char *name);
-int pwrdm_for_each(int (*fn)(struct powerdomain *pwrdm));
+int pwrdm_for_each(int (*fn)(struct powerdomain *pwrdm, void *user),
+ void *user);
int pwrdm_add_clkdm(struct powerdomain *pwrdm, struct clockdomain *clkdm);
int pwrdm_del_clkdm(struct powerdomain *pwrdm, struct clockdomain *clkdm);
--
1.5.6.3
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[PATCH 2/3] Add pm-debug counters
This patch provides the debugfs entries and a function which will be called
by the PM code to register the time spent per domain per state. Also some
new fields are added to the powerdomain struct to keep the time information.
Signed-off-by: Peter 'p2' De Schrijver [EMAIL PROTECTED]
---
arch/arm/mach-omap2/pm-debug.c| 175 +
arch/arm/mach-omap2/pm.h |2 +
arch/arm/plat-omap/include/mach/powerdomain.h |5 +
3 files changed, 182 insertions(+), 0 deletions(-)
diff --git a/arch/arm/mach-omap2/pm-debug.c b/arch/arm/mach-omap2/pm-debug.c
index 0b5c044..4ba6cec 100644
--- a/arch/arm/mach-omap2/pm-debug.c
+++ b/arch/arm/mach-omap2/pm-debug.c
@@ -29,6 +29,8 @@
#include mach/clock.h
#include mach/board.h
+#include mach/powerdomain.h
+#include mach/clockdomain.h
#include prm.h
#include cm.h
@@ -288,4 +290,177 @@ void omap2_pm_dump(int mode, int resume, unsigned int us)
printk(%-20s: 0x%08x\n, regs[i].name, regs[i].val);
}
+#ifdef CONFIG_DEBUG_FS
+#include linux/debugfs.h
+#include linux/seq_file.h
+
+struct dentry *pm_dbg_dir;
+
+static int pm_dbg_init_done;
+
+enum {
+ DEBUG_FILE_COUNTERS = 0,
+ DEBUG_FILE_TIMERS,
+};
+
+static const char pwrdm_state_names[][4] = {
+ OFF,
+ RET,
+ INA,
+ ON
+};
+
+void pm_dbg_update_time(struct powerdomain *pwrdm, int prev)
+{
+ s64 t;
+ struct timespec now;
+
+ if (!pm_dbg_init_done)
+ return ;
+
+ /* Update timer for previous state */
+ getnstimeofday(now);
+ t = timespec_to_ns(now);
+
+ pwrdm-state_timer[prev] += t - pwrdm-timer;
+
+ pwrdm-timer = t;
+}
+
+static int clkdm_dbg_show_counter(struct clockdomain *clkdm, void *user)
+{
+ struct seq_file *s = (struct seq_file *)user;
+
+ if (strcmp(clkdm-name, emu_clkdm) == 0 ||
+ strcmp(clkdm-name, wkup_clkdm) == 0)
+ return 0;
+
+ seq_printf(s, %s-%s (%d), clkdm-name,
+ clkdm-pwrdm.ptr-name,
+ atomic_read(clkdm-usecount));
+ seq_printf(s, \n);
+
+ return 0;
+}
+
+static int pwrdm_dbg_show_counter(struct powerdomain *pwrdm, void *user)
+{
+ struct seq_file *s = (struct seq_file *)user;
+ int i;
+
+ if (strcmp(pwrdm-name, emu_pwrdm) == 0 ||
+ strcmp(pwrdm-name, wkup_pwrdm) == 0)
+ return 0;
+
+ if (pwrdm-state != pwrdm_read_pwrst(pwrdm))
+ printk(KERN_ERR pwrdm state mismatch(%s) %d != %d\n,
+ pwrdm-name, pwrdm-state, pwrdm_read_pwrst(pwrdm));
+
+ seq_printf(s, %s (%s), pwrdm-name,
+ pwrdm_state_names[pwrdm-state]);
+ for (i = 0; i 4; i++)
+ seq_printf(s, ,%s:%d, pwrdm_state_names[i],
+ pwrdm-state_counter[i]);
+
+ seq_printf(s, \n);
+
+ return 0;
+}
+
+static int pwrdm_dbg_show_timer(struct powerdomain *pwrdm, void *user)
+{
+ struct seq_file *s = (struct seq_file *)user;
+ int i;
+
+ if (strcmp(pwrdm-name, emu_pwrdm) == 0 ||
+ strcmp(pwrdm-name, wkup_pwrdm) == 0)
+ return 0;
+
+ pwrdm_state_switch(pwrdm);
+
+ seq_printf(s, %s (%s), pwrdm-name,
+ pwrdm_state_names[pwrdm-state]);
+
+ for (i = 0; i 4; i++)
+ seq_printf(s, ,%s:%lld, pwrdm_state_names[i],
+ pwrdm-state_timer[i]);
+
+ seq_printf(s, \n);
+
+ return 0;
+}
+
+static void pm_dbg_show_counters(struct seq_file *s, void *unused)
+{
+ pwrdm_for_each(pwrdm_dbg_show_counter, s);
+ clkdm_for_each(clkdm_dbg_show_counter, s);
+}
+
+static void pm_dbg_show_timers(struct seq_file *s, void *unused)
+{
+ pwrdm_for_each(pwrdm_dbg_show_timer, s);
+}
+
+static int pm_dbg_open(struct inode *inode, struct file *file)
+{
+ switch ((int)inode-i_private) {
+ case DEBUG_FILE_COUNTERS:
+ return single_open(file, pm_dbg_show_counters,
+ inode-i_private);
+ case DEBUG_FILE_TIMERS:
+ default:
+ return single_open(file, pm_dbg_show_timers,
+ inode-i_private);
+ };
+}
+
+static const struct file_operations debug_fops = {
+ .open = pm_dbg_open,
+ .read = seq_read,
+ .llseek = seq_lseek,
+ .release= single_release,
+};
+
+static int __init pwrdms_setup(struct powerdomain *pwrdm, void *unused)
+{
+ int i;
+ s64 t;
+ struct timespec now;
+
+ getnstimeofday(now);
+ t = timespec_to_ns(now);
+
+ for (i = 0; i 4; i++)
+ pwrdm-state_timer[i] = 0;
+
+ pwrdm-timer = t;
+
+ return 0;
+}
+
+static int __init pm_dbg_init(void)
+{
+ struct dentry *d;
+
+ printk(KERN_INFO pm_dbg_init()\n);
+
+ d = debugfs_create_dir(pm_debug, NULL);
+ if (IS_ERR(d
[PATCH 0/3] debugfs entries for PM counters
This patchset adds 2 debugfs entries for power management counters. pm_debug/count indicates how many times each powerdomain entered each state (On, Inactive, Retention, Off). pm_debug/time indicates how much time each powerdomain spent per state. Peter 'p2' De Schrijver (3): Add closures to clkdm_for_each and pwrdm_for_each. Add pm-debug counters Hook into powerdomain code arch/arm/mach-omap2/clockdomain.c |5 +- arch/arm/mach-omap2/pm-debug.c| 175 + arch/arm/mach-omap2/pm.h |2 + arch/arm/mach-omap2/pm34xx.c |8 +- arch/arm/mach-omap2/powerdomain.c | 17 ++- arch/arm/plat-omap/include/mach/clockdomain.h |3 +- arch/arm/plat-omap/include/mach/powerdomain.h |8 +- 7 files changed, 204 insertions(+), 14 deletions(-) -- To unsubscribe from this list: send the line unsubscribe linux-omap in the body of a message to [EMAIL PROTECTED] More majordomo info at http://vger.kernel.org/majordomo-info.html
[PATCH 3/3] Hook into powerdomain code
Make the powerdomain code call the new hook for updating the time.
Also implement the updated pwrdm_for_each.
Signed-off-by: Peter 'p2' De Schrijver [EMAIL PROTECTED]
---
arch/arm/mach-omap2/powerdomain.c | 17 +++--
1 files changed, 11 insertions(+), 6 deletions(-)
diff --git a/arch/arm/mach-omap2/powerdomain.c
b/arch/arm/mach-omap2/powerdomain.c
index 3a9e151..0334609 100644
--- a/arch/arm/mach-omap2/powerdomain.c
+++ b/arch/arm/mach-omap2/powerdomain.c
@@ -35,6 +35,8 @@
#include mach/powerdomain.h
#include mach/clockdomain.h
+#include pm.h
+
enum {
PWRDM_STATE_NOW = 0,
PWRDM_STATE_PREV,
@@ -134,19 +136,21 @@ static int _pwrdm_state_switch(struct powerdomain *pwrdm,
int flag)
if (state != prev)
pwrdm-state_counter[state]++;
+ pm_dbg_update_time(pwrdm, prev);
+
pwrdm-state = state;
return 0;
}
-static int _pwrdm_pre_transition_cb(struct powerdomain *pwrdm)
+static int _pwrdm_pre_transition_cb(struct powerdomain *pwrdm, void *unused)
{
pwrdm_clear_all_prev_pwrst(pwrdm);
_pwrdm_state_switch(pwrdm, PWRDM_STATE_NOW);
return 0;
}
-static int _pwrdm_post_transition_cb(struct powerdomain *pwrdm)
+static int _pwrdm_post_transition_cb(struct powerdomain *pwrdm, void *unused)
{
_pwrdm_state_switch(pwrdm, PWRDM_STATE_PREV);
return 0;
@@ -282,7 +286,8 @@ struct powerdomain *pwrdm_lookup(const char *name)
* anything else to indicate failure; or -EINVAL if the function
* pointer is null.
*/
-int pwrdm_for_each(int (*fn)(struct powerdomain *pwrdm))
+int pwrdm_for_each(int (*fn)(struct powerdomain *pwrdm, void *user),
+ void *user)
{
struct powerdomain *temp_pwrdm;
unsigned long flags;
@@ -293,7 +298,7 @@ int pwrdm_for_each(int (*fn)(struct powerdomain *pwrdm))
read_lock_irqsave(pwrdm_rwlock, flags);
list_for_each_entry(temp_pwrdm, pwrdm_list, node) {
- ret = (*fn)(temp_pwrdm);
+ ret = (*fn)(temp_pwrdm, user);
if (ret)
break;
}
@@ -1198,13 +1203,13 @@ int pwrdm_clk_state_switch(struct clk *clk)
int pwrdm_pre_transition(void)
{
- pwrdm_for_each(_pwrdm_pre_transition_cb);
+ pwrdm_for_each(_pwrdm_pre_transition_cb, NULL);
return 0;
}
int pwrdm_post_transition(void)
{
- pwrdm_for_each(_pwrdm_post_transition_cb);
+ pwrdm_for_each(_pwrdm_post_transition_cb, NULL);
return 0;
}
--
1.5.6.3
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[PATCH 3/3] Hook into powerdomain code
Make the powerdomain code call the new hook for updating the time.
Also implement the updated pwrdm_for_each.
Signed-off-by: Peter 'p2' De Schrijver [EMAIL PROTECTED]
---
arch/arm/mach-omap2/powerdomain.c | 24
1 files changed, 16 insertions(+), 8 deletions(-)
diff --git a/arch/arm/mach-omap2/powerdomain.c
b/arch/arm/mach-omap2/powerdomain.c
index 349b7ab..0334609 100644
--- a/arch/arm/mach-omap2/powerdomain.c
+++ b/arch/arm/mach-omap2/powerdomain.c
@@ -35,6 +35,8 @@
#include mach/powerdomain.h
#include mach/clockdomain.h
+#include pm.h
+
enum {
PWRDM_STATE_NOW = 0,
PWRDM_STATE_PREV,
@@ -134,19 +136,21 @@ static int _pwrdm_state_switch(struct powerdomain *pwrdm,
int flag)
if (state != prev)
pwrdm-state_counter[state]++;
+ pm_dbg_update_time(pwrdm, prev);
+
pwrdm-state = state;
return 0;
}
-static int _pwrdm_pre_transition_cb(struct powerdomain *pwrdm)
+static int _pwrdm_pre_transition_cb(struct powerdomain *pwrdm, void *unused)
{
pwrdm_clear_all_prev_pwrst(pwrdm);
_pwrdm_state_switch(pwrdm, PWRDM_STATE_NOW);
return 0;
}
-static int _pwrdm_post_transition_cb(struct powerdomain *pwrdm)
+static int _pwrdm_post_transition_cb(struct powerdomain *pwrdm, void *unused)
{
_pwrdm_state_switch(pwrdm, PWRDM_STATE_PREV);
return 0;
@@ -179,9 +183,12 @@ void pwrdm_init(struct powerdomain **pwrdm_list)
{
struct powerdomain **p = NULL;
- if (pwrdm_list)
- for (p = pwrdm_list; *p; p++)
+ if (pwrdm_list) {
+ for (p = pwrdm_list; *p; p++) {
pwrdm_register(*p);
+ _pwrdm_setup(*p);
+ }
+ }
}
/**
@@ -279,7 +286,8 @@ struct powerdomain *pwrdm_lookup(const char *name)
* anything else to indicate failure; or -EINVAL if the function
* pointer is null.
*/
-int pwrdm_for_each(int (*fn)(struct powerdomain *pwrdm))
+int pwrdm_for_each(int (*fn)(struct powerdomain *pwrdm, void *user),
+ void *user)
{
struct powerdomain *temp_pwrdm;
unsigned long flags;
@@ -290,7 +298,7 @@ int pwrdm_for_each(int (*fn)(struct powerdomain *pwrdm))
read_lock_irqsave(pwrdm_rwlock, flags);
list_for_each_entry(temp_pwrdm, pwrdm_list, node) {
- ret = (*fn)(temp_pwrdm);
+ ret = (*fn)(temp_pwrdm, user);
if (ret)
break;
}
@@ -1195,13 +1203,13 @@ int pwrdm_clk_state_switch(struct clk *clk)
int pwrdm_pre_transition(void)
{
- pwrdm_for_each(_pwrdm_pre_transition_cb);
+ pwrdm_for_each(_pwrdm_pre_transition_cb, NULL);
return 0;
}
int pwrdm_post_transition(void)
{
- pwrdm_for_each(_pwrdm_post_transition_cb);
+ pwrdm_for_each(_pwrdm_post_transition_cb, NULL);
return 0;
}
--
1.5.6.3
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[PATCH 1/3] Add closures to clkdm_for_each and pwrdm_for_each.
First add some infrastructure to easily iterate over clock and power domains.
Also add extra fields to the powerdomain struct to keep the time info.
Signed-off-by: Peter 'p2' De Schrijver [EMAIL PROTECTED]
---
arch/arm/mach-omap2/clockdomain.c |5 +++--
arch/arm/mach-omap2/pm34xx.c |8
arch/arm/plat-omap/include/mach/clockdomain.h |3 ++-
arch/arm/plat-omap/include/mach/powerdomain.h |8 +++-
4 files changed, 16 insertions(+), 8 deletions(-)
diff --git a/arch/arm/mach-omap2/clockdomain.c
b/arch/arm/mach-omap2/clockdomain.c
index 5249fe8..b0b5885 100644
--- a/arch/arm/mach-omap2/clockdomain.c
+++ b/arch/arm/mach-omap2/clockdomain.c
@@ -295,7 +295,8 @@ struct clockdomain *clkdm_lookup(const char *name)
* anything else to indicate failure; or -EINVAL if the function pointer
* is null.
*/
-int clkdm_for_each(int (*fn)(struct clockdomain *clkdm))
+int clkdm_for_each(int (*fn)(struct clockdomain *clkdm, void *user),
+ void *user)
{
struct clockdomain *clkdm;
int ret = 0;
@@ -305,7 +306,7 @@ int clkdm_for_each(int (*fn)(struct clockdomain *clkdm))
mutex_lock(clkdm_mutex);
list_for_each_entry(clkdm, clkdm_list, node) {
- ret = (*fn)(clkdm);
+ ret = (*fn)(clkdm, user);
if (ret)
break;
}
diff --git a/arch/arm/mach-omap2/pm34xx.c b/arch/arm/mach-omap2/pm34xx.c
index 1fbb690..be69839 100644
--- a/arch/arm/mach-omap2/pm34xx.c
+++ b/arch/arm/mach-omap2/pm34xx.c
@@ -518,7 +518,7 @@ static void __init prcm_setup_regs(void)
OCP_MOD, OMAP2_PRM_IRQENABLE_MPU_OFFSET);
}
-static int __init pwrdms_setup(struct powerdomain *pwrdm)
+static int __init pwrdms_setup(struct powerdomain *pwrdm, void *unused)
{
struct power_state *pwrst;
@@ -538,7 +538,7 @@ static int __init pwrdms_setup(struct powerdomain *pwrdm)
return set_pwrdm_state(pwrst-pwrdm, pwrst-next_state);
}
-static int __init clkdms_setup(struct clockdomain *clkdm)
+static int __init clkdms_setup(struct clockdomain *clkdm, void *unused)
{
omap2_clkdm_allow_idle(clkdm);
return 0;
@@ -564,13 +564,13 @@ int __init omap3_pm_init(void)
goto err1;
}
- ret = pwrdm_for_each(pwrdms_setup);
+ ret = pwrdm_for_each(pwrdms_setup, NULL);
if (ret) {
printk(KERN_ERR Failed to setup powerdomains\n);
goto err2;
}
- (void) clkdm_for_each(clkdms_setup);
+ (void) clkdm_for_each(clkdms_setup, NULL);
mpu_pwrdm = pwrdm_lookup(mpu_pwrdm);
if (mpu_pwrdm == NULL) {
diff --git a/arch/arm/plat-omap/include/mach/clockdomain.h
b/arch/arm/plat-omap/include/mach/clockdomain.h
index b9d0dd2..99ebd88 100644
--- a/arch/arm/plat-omap/include/mach/clockdomain.h
+++ b/arch/arm/plat-omap/include/mach/clockdomain.h
@@ -95,7 +95,8 @@ int clkdm_register(struct clockdomain *clkdm);
int clkdm_unregister(struct clockdomain *clkdm);
struct clockdomain *clkdm_lookup(const char *name);
-int clkdm_for_each(int (*fn)(struct clockdomain *clkdm));
+int clkdm_for_each(int (*fn)(struct clockdomain *clkdm, void *user),
+ void *user);
struct powerdomain *clkdm_get_pwrdm(struct clockdomain *clkdm);
void omap2_clkdm_allow_idle(struct clockdomain *clkdm);
diff --git a/arch/arm/plat-omap/include/mach/powerdomain.h
b/arch/arm/plat-omap/include/mach/powerdomain.h
index 52663fc..6271d85 100644
--- a/arch/arm/plat-omap/include/mach/powerdomain.h
+++ b/arch/arm/plat-omap/include/mach/powerdomain.h
@@ -119,6 +119,11 @@ struct powerdomain {
int state;
unsigned state_counter[4];
+
+#ifdef CONFIG_PM_DEBUG
+ s64 timer;
+ s64 state_timer[4];
+#endif
};
@@ -128,7 +133,8 @@ int pwrdm_register(struct powerdomain *pwrdm);
int pwrdm_unregister(struct powerdomain *pwrdm);
struct powerdomain *pwrdm_lookup(const char *name);
-int pwrdm_for_each(int (*fn)(struct powerdomain *pwrdm));
+int pwrdm_for_each(int (*fn)(struct powerdomain *pwrdm, void *user),
+ void *user);
int pwrdm_add_clkdm(struct powerdomain *pwrdm, struct clockdomain *clkdm);
int pwrdm_del_clkdm(struct powerdomain *pwrdm, struct clockdomain *clkdm);
--
1.5.6.3
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[PATCH 0/3] debugfs entries for PM counters
This patchset adds 2 debugfs entries for power management counters. pm_debug/count indicates how many times each powerdomain entered each state (On, Inactive, Retention, Off). pm_debug/time indicates how much time each powerdomain spent per state. Peter 'p2' De Schrijver (3): Add closures to clkdm_for_each. Add pm-debug counters Hook into powerdomain code arch/arm/mach-omap2/clockdomain.c |5 +- arch/arm/mach-omap2/pm-debug.c| 175 + arch/arm/mach-omap2/pm.h |2 + arch/arm/mach-omap2/pm34xx.c |8 +- arch/arm/mach-omap2/powerdomain.c | 24 +++- arch/arm/plat-omap/include/mach/clockdomain.h |3 +- arch/arm/plat-omap/include/mach/powerdomain.h |8 +- 7 files changed, 209 insertions(+), 16 deletions(-) -- To unsubscribe from this list: send the line unsubscribe linux-omap in the body of a message to [EMAIL PROTECTED] More majordomo info at http://vger.kernel.org/majordomo-info.html
Re: [PATCH 7/7] omap3 evm, beagle and overo use the generic twl4030 script
On Fri, Oct 10, 2008 at 10:50:29AM -0700, ext David Brownell wrote: On Friday 10 October 2008, Peter 'p2' De Schrijver wrote: +extern struct twl4030_power_data generic3430_t2scripts_data; Such extern decls should as a rule be in header files... In this case the rule is appropriate, since you've got the same decl in three different places. That's about two times more often than I'm comfortable making exceptions to such a rule ... :) Please suggest an appropriate header file. I couldn't find one and creating a header file for a single extern declaration ? Cheers, Peter. -- goa is a state of mind -- To unsubscribe from this list: send the line unsubscribe linux-omap in the body of a message to [EMAIL PROTECTED] More majordomo info at http://vger.kernel.org/majordomo-info.html
[PATCH 0/7] Integrate the twl4030 power code into new twl4030 mfd
This patchset integrates the twl4030 power code into the new twl4030 mfd framework. The scripts will be moved to the board specific data. Peter 'p2' De Schrijver (7): Remove existing twl4030 power script code. Add defines and data types for twl4030. Twl4030 power code updated for new twl4030 core Hook twl4030 power code into twl4030 core. 3430sdp and ldp use custom twl4030 power scripts. Generic twl4030 power script for 3430 based boards. omap3 evm, beagle and overo use the generic twl4030 script arch/arm/mach-omap2/Makefile |9 +- arch/arm/mach-omap2/board-3430sdp.c | 84 ++ arch/arm/mach-omap2/board-ldp.c | 84 ++ arch/arm/mach-omap2/board-omap3beagle.c |4 +- arch/arm/mach-omap2/board-omap3evm.c |4 +- arch/arm/mach-omap2/board-overo.c |4 +- arch/arm/mach-omap2/twl4030-generic-scripts.c | 78 ++ arch/arm/mach-omap2/twl4030-generic-scripts.h |8 + drivers/i2c/chips/Makefile|2 +- drivers/i2c/chips/twl4030-power.c | 343 - drivers/mfd/Kconfig |7 + drivers/mfd/Makefile |1 + drivers/mfd/twl4030-core.c| 11 + drivers/mfd/twl4030-power.c | 270 +++ include/linux/i2c/twl4030.h | 64 + 15 files changed, 620 insertions(+), 353 deletions(-) create mode 100644 arch/arm/mach-omap2/twl4030-generic-scripts.c create mode 100644 arch/arm/mach-omap2/twl4030-generic-scripts.h delete mode 100644 drivers/i2c/chips/twl4030-power.c create mode 100644 drivers/mfd/twl4030-power.c -- To unsubscribe from this list: send the line unsubscribe linux-omap in the body of a message to [EMAIL PROTECTED] More majordomo info at http://vger.kernel.org/majordomo-info.html
[PATCH 2/7] Add defines and data types for twl4030.
This patch adds a bunch of data types and defines to handle the twl4030 power
sequence scripts.
Signed-off-by: Peter 'p2' De Schrijver [EMAIL PROTECTED]
---
include/linux/i2c/twl4030.h | 64 +++
1 files changed, 64 insertions(+), 0 deletions(-)
diff --git a/include/linux/i2c/twl4030.h b/include/linux/i2c/twl4030.h
index cdb4531..7dc4ee1 100644
--- a/include/linux/i2c/twl4030.h
+++ b/include/linux/i2c/twl4030.h
@@ -264,6 +264,69 @@ struct twl4030_usb_data {
enum twl4030_usb_mode usb_mode;
};
+struct twl4030_ins {
+ u16 pmb_message;
+ u8 delay;
+};
+
+struct twl4030_script {
+ struct twl4030_ins *script;
+ unsigned size;
+ u8 flags;
+};
+#define TRITON_WRST_SCRIPT (10)
+#define TRITON_WAKEUP12_SCRIPT (11)
+#define TRITON_WAKEUP3_SCRIPT (12)
+#define TRITON_SLEEP_SCRIPT(13)
+
+struct twl4030_power_data {
+ struct twl4030_script **scripts;
+ unsigned size;
+};
+
+/* Power bus message definitions */
+
+#define DEV_GRP_NULL 0x0
+#define DEV_GRP_P1 0x1
+#define DEV_GRP_P2 0x2
+#define DEV_GRP_P3 0x4
+
+#define RES_GRP_RES0x0
+#define RES_GRP_PP 0x1
+#define RES_GRP_RC 0x2
+#define RES_GRP_PP_RC 0x3
+#define RES_GRP_PR 0x4
+#define RES_GRP_PP_PR 0x5
+#define RES_GRP_RC_PR 0x6
+#define RES_GRP_ALL0x7
+
+#define RES_TYPE2_R0 0x0
+
+#define RES_TYPE_ALL 0x7
+
+#define RES_STATE_WRST 0xF
+#define RES_STATE_ACTIVE 0xE
+#define RES_STATE_SLEEP0x8
+#define RES_STATE_OFF 0x0
+
+/*
+* Power Bus Message Format
+*
+* Broadcast Message (16 Bits)
+* DEV_GRP[15:13] MT[12] RES_GRP[11:9] RES_TYPE2[8:7] RES_TYPE[6:4]
+* RES_STATE[3:0]
+*
+* Singular Message (16 Bits)
+* DEV_GRP[15:13] MT[12] RES_ID[11:4] RES_STATE[3:0]
+*
+*/
+
+#define MSG_BROADCAST(devgrp, grp, type, type2, state) \
+ (devgrp 13 | 1 12 | grp 9 | type2 7 | type 4 | state)
+
+#define MSG_SINGULAR(devgrp, id, state) \
+ (devgrp 13 | 0 12 | id 4 | state)
+
struct twl4030_platform_data {
unsignedirq_base, irq_end;
struct twl4030_bci_platform_data*bci;
@@ -271,6 +334,7 @@ struct twl4030_platform_data {
struct twl4030_madc_platform_data *madc;
struct twl4030_keypad_data *keypad;
struct twl4030_usb_data *usb;
+ struct twl4030_power_data *power;
/* REVISIT more to come ... _nothing_ should be hard-wired */
};
--
1.5.6.3
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[PATCH 3/7] Twl4030 power code updated for new twl4030 core
This patch adds the twl4030 power handling. It downloads the scripts provided
by the board configuration to the twl4030 and configures the chip to call
the relevant script for each event (processor group 1 and 2 sleep,
processor group 3 sleep, wakeup or warm reset).
Signed-off-by: Peter 'p2' De Schrijver [EMAIL PROTECTED]
---
drivers/mfd/twl4030-power.c | 270 +++
1 files changed, 270 insertions(+), 0 deletions(-)
create mode 100644 drivers/mfd/twl4030-power.c
diff --git a/drivers/mfd/twl4030-power.c b/drivers/mfd/twl4030-power.c
new file mode 100644
index 000..d9d1655
--- /dev/null
+++ b/drivers/mfd/twl4030-power.c
@@ -0,0 +1,270 @@
+/*
+ * linux/drivers/i2c/chips/twl4030-power.c
+ *
+ * Handle TWL4030 Power initialization
+ *
+ * Copyright (C) 2008 Nokia Corporation
+ * Copyright (C) 2006 Texas Instruments, Inc
+ *
+ * Written by Kalle Jokiniemi
+ * Peter De Schrijver [EMAIL PROTECTED]
+ *
+ * This file is subject to the terms and conditions of the GNU General
+ * Public License. See the file COPYING in the main directory of this
+ * archive for more details.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
+ */
+
+#include linux/module.h
+#include linux/pm.h
+#include linux/i2c/twl4030.h
+#include linux/platform_device.h
+
+#include asm/mach-types.h
+
+static u8 triton_next_free_address = 0x2b;
+
+#define PWR_P1_SW_EVENTS 0x10
+#define PWR_DEVOFF (10)
+
+#define PHY_TO_OFF_PM_MASTER(p)(p - 0x36)
+#define PHY_TO_OFF_PM_RECEIVER(p) (p - 0x5b)
+
+/* resource - hfclk */
+#define R_HFCLKOUT_DEV_GRP PHY_TO_OFF_PM_RECEIVER(0xe6)
+
+/* PM events */
+#define R_P1_SW_EVENTS PHY_TO_OFF_PM_MASTER(0x46)
+#define R_P2_SW_EVENTS PHY_TO_OFF_PM_MASTER(0x47)
+#define R_P3_SW_EVENTS PHY_TO_OFF_PM_MASTER(0x48)
+#define R_CFG_P1_TRANSITIONPHY_TO_OFF_PM_MASTER(0x36)
+#define R_CFG_P2_TRANSITIONPHY_TO_OFF_PM_MASTER(0x37)
+#define R_CFG_P3_TRANSITIONPHY_TO_OFF_PM_MASTER(0x38)
+
+#define LVL_WAKEUP 0x08
+
+#define ENABLE_WARMRESET (14)
+
+#define END_OF_SCRIPT 0x3f
+
+#define R_SEQ_ADD_A2S PHY_TO_OFF_PM_MASTER(0x55)
+#define R_SEQ_ADD_SA12 PHY_TO_OFF_PM_MASTER(0x56)
+#defineR_SEQ_ADD_S2A3 PHY_TO_OFF_PM_MASTER(0x57)
+#defineR_SEQ_ADD_WARM PHY_TO_OFF_PM_MASTER(0x58)
+#define R_MEMORY_ADDRESS PHY_TO_OFF_PM_MASTER(0x59)
+#define R_MEMORY_DATA PHY_TO_OFF_PM_MASTER(0x5a)
+
+#define R_PROTECT_KEY 0x0E
+#define KEY_1 0xC0
+#define KEY_2 0x0C
+
+static int __init twl4030_write_script_byte(u8 address, u8 byte)
+{
+ int err;
+
+ err = twl4030_i2c_write_u8(TWL4030_MODULE_PM_MASTER, address,
+ R_MEMORY_ADDRESS);
+ err |= twl4030_i2c_write_u8(TWL4030_MODULE_PM_MASTER, byte,
+ R_MEMORY_DATA);
+
+ return err;
+}
+
+static int __init twl4030_write_script_ins(u8 address, u16 pmb_message,
+ u8 delay, u8 next)
+{
+ int err = 0;
+
+ address *= 4;
+ err |= twl4030_write_script_byte(address++, pmb_message 8);
+ err |= twl4030_write_script_byte(address++, pmb_message 0xff);
+ err |= twl4030_write_script_byte(address++, delay);
+ err |= twl4030_write_script_byte(address++, next);
+
+ return err;
+}
+
+static int __init twl4030_write_script(u8 address, struct twl4030_ins *script,
+ int len)
+{
+ int err = 0;
+
+ for (; len; len--, address++, script++) {
+ if (len == 1)
+ err |= twl4030_write_script_ins(address,
+ script-pmb_message,
+ script-delay,
+ END_OF_SCRIPT);
+ else
+ err |= twl4030_write_script_ins(address,
+ script-pmb_message,
+ script-delay,
+ address + 1);
+ }
+
+ return err;
+}
+
+static int __init config_wakeup3_sequence(u8 address)
+{
+
+ int err = 0;
+
+ /* Set SLEEP to ACTIVE SEQ address for P3 */
+ err |= twl4030_i2c_write_u8(TWL4030_MODULE_PM_MASTER, address,
+ R_SEQ_ADD_S2A3
[PATCH 5/7] 3430sdp and ldp use custom twl4030 power scripts.
The TI 3430dsp and ldp boards have a custom power script to handle sleep and
off modes.
Signed-off-by: Peter 'p2' De Schrijver [EMAIL PROTECTED]
---
arch/arm/mach-omap2/board-3430sdp.c | 84 +++
arch/arm/mach-omap2/board-ldp.c | 84 +++
2 files changed, 168 insertions(+), 0 deletions(-)
diff --git a/arch/arm/mach-omap2/board-3430sdp.c
b/arch/arm/mach-omap2/board-3430sdp.c
index 56f28ae..bb591bb 100644
--- a/arch/arm/mach-omap2/board-3430sdp.c
+++ b/arch/arm/mach-omap2/board-3430sdp.c
@@ -47,6 +47,8 @@
#include sdram-qimonda-hyb18m512160af-6.h
+#define CONFIG_DISABLE_HFCLK 1
+
#defineSDP3430_SMC91X_CS 3
#define ENABLE_VAUX3_DEDICATED 0x03
@@ -329,6 +331,87 @@ static struct twl4030_madc_platform_data sdp3430_madc_data
= {
.irq_line = 1,
};
+
+static struct twl4030_ins __initdata sleep_on_seq[] = {
+/*
+ * Turn off VDD1 and VDD2.
+ */
+ {MSG_SINGULAR(DEV_GRP_P1, 0xf, RES_STATE_OFF), 4},
+ {MSG_SINGULAR(DEV_GRP_P1, 0x10, RES_STATE_OFF), 2},
+#ifdef CONFIG_DISABLE_HFCLK
+/*
+ * And also turn off the OMAP3 PLLs and the sysclk output.
+ */
+ {MSG_SINGULAR(DEV_GRP_P1, 0x7, RES_STATE_OFF), 3},
+ {MSG_SINGULAR(DEV_GRP_P1, 0x19, RES_STATE_OFF), 3},
+#endif
+};
+
+static struct twl4030_script sleep_on_script __initdata = {
+ .script = sleep_on_seq,
+ .size = ARRAY_SIZE(sleep_on_seq),
+ .flags = TRITON_SLEEP_SCRIPT,
+};
+
+static struct twl4030_ins wakeup_seq[] __initdata = {
+#ifndef CONFIG_DISABLE_HFCLK
+/*
+ * Wakeup VDD1 and VDD2.
+ */
+ {MSG_SINGULAR(DEV_GRP_P1, 0xf, RES_STATE_ACTIVE), 4},
+ {MSG_SINGULAR(DEV_GRP_P1, 0x10, RES_STATE_ACTIVE), 2},
+#else
+/*
+ * Reenable the OMAP3 PLLs.
+ * Wakeup VDD1 and VDD2.
+ * Reenable sysclk output.
+ */
+ {MSG_SINGULAR(DEV_GRP_P1, 0x7, RES_STATE_ACTIVE), 0x30},
+ {MSG_SINGULAR(DEV_GRP_P1, 0xf, RES_STATE_ACTIVE), 0x30},
+ {MSG_SINGULAR(DEV_GRP_P1, 0x10, RES_STATE_ACTIVE), 0x37},
+ {MSG_SINGULAR(DEV_GRP_P1, 0x19, RES_STATE_ACTIVE), 3},
+#endif /* #ifndef CONFIG_DISABLE_HFCLK */
+};
+
+static struct twl4030_script wakeup_script __initdata = {
+ .script = wakeup_seq,
+ .size = ARRAY_SIZE(wakeup_seq),
+ .flags = TRITON_WAKEUP12_SCRIPT | TRITON_WAKEUP3_SCRIPT,
+};
+
+static struct twl4030_ins wrst_seq[] __initdata = {
+/*
+ * Reset twl4030.
+ * Reset VDD1 regulator.
+ * Reset VDD2 regulator.
+ * Reset VPLL1 regulator.
+ * Enable sysclk output.
+ * Reenable twl4030.
+ */
+ {MSG_SINGULAR(DEV_GRP_NULL, 0x1b, RES_STATE_OFF), 2},
+ {MSG_SINGULAR(DEV_GRP_P1, 0xf, RES_STATE_WRST), 15},
+ {MSG_SINGULAR(DEV_GRP_P1, 0x10, RES_STATE_WRST), 15},
+ {MSG_SINGULAR(DEV_GRP_P1, 0x7, RES_STATE_WRST), 0x60},
+ {MSG_SINGULAR(DEV_GRP_P1, 0x19, RES_STATE_ACTIVE), 2},
+ {MSG_SINGULAR(DEV_GRP_NULL, 0x1b, RES_STATE_ACTIVE), 2},
+};
+static struct twl4030_script wrst_script __initdata = {
+ .script = wrst_seq,
+ .size = ARRAY_SIZE(wakeup_seq),
+ .flags = TRITON_WRST_SCRIPT,
+};
+
+static struct twl4030_script *twl4030_scripts[] __initdata = {
+ sleep_on_script,
+ wakeup_script,
+ wrst_script,
+};
+
+static struct twl4030_power_data sdp3430_t2scripts_data __initdata = {
+ .scripts= twl4030_scripts,
+ .size = ARRAY_SIZE(twl4030_scripts),
+};
+
static struct twl4030_platform_data sdp3430_twldata = {
.irq_base = TWL4030_IRQ_BASE,
.irq_end= TWL4030_IRQ_END,
@@ -338,6 +421,7 @@ static struct twl4030_platform_data sdp3430_twldata = {
.gpio = sdp3430_gpio_data,
.madc = sdp3430_madc_data,
.keypad = sdp3430_kp_data,
+ .power = sdp3430_t2scripts_data,
.usb= sdp3430_usb_data,
};
diff --git a/arch/arm/mach-omap2/board-ldp.c b/arch/arm/mach-omap2/board-ldp.c
index 92710c3..d4d4e90 100644
--- a/arch/arm/mach-omap2/board-ldp.c
+++ b/arch/arm/mach-omap2/board-ldp.c
@@ -41,6 +41,8 @@
#include asm/delay.h
#include mach/control.h
+#define CONFIG_DISABLE_HFCLK 1
+
#define ENABLE_VAUX1_DEDICATED 0x03
#define ENABLE_VAUX1_DEV_GRP 0x20
@@ -195,6 +197,87 @@ static int ldp_batt_table[] = {
4040, 3910, 3790, 3670, 3550
};
+static struct twl4030_ins __initdata sleep_on_seq[] = {
+/*
+ * Turn off VDD1 and VDD2.
+ */
+ {MSG_SINGULAR(DEV_GRP_P1, 0xf, RES_STATE_OFF), 4},
+ {MSG_SINGULAR(DEV_GRP_P1, 0x10, RES_STATE_OFF), 2},
+#ifdef CONFIG_DISABLE_HFCLK
+/*
+ * And also turn off the OMAP3 PLLs and the sysclk output.
+ */
+ {MSG_SINGULAR(DEV_GRP_P1, 0x7, RES_STATE_OFF), 3},
+ {MSG_SINGULAR(DEV_GRP_P1, 0x19, RES_STATE_OFF), 3},
+#endif
+};
+
+static struct twl4030_script sleep_on_script __initdata = {
+ .script = sleep_on_seq,
+ .size = ARRAY_SIZE(sleep_on_seq),
+ .flags = TRITON_SLEEP_SCRIPT,
+};
+
+static struct twl4030_ins wakeup_seq
[PATCH 7/7] omap3 evm, beagle and overo use the generic twl4030 script
Make omap3 evm, beagle and overo use the generic twl4030 script.
Signed-off-by: Peter 'p2' De Schrijver [EMAIL PROTECTED]
---
arch/arm/mach-omap2/Makefile|9 ++---
arch/arm/mach-omap2/board-omap3beagle.c |4 ++--
arch/arm/mach-omap2/board-omap3evm.c|4 ++--
arch/arm/mach-omap2/board-overo.c |4 ++--
4 files changed, 12 insertions(+), 9 deletions(-)
diff --git a/arch/arm/mach-omap2/Makefile b/arch/arm/mach-omap2/Makefile
index 33de217..ed0cd7a 100644
--- a/arch/arm/mach-omap2/Makefile
+++ b/arch/arm/mach-omap2/Makefile
@@ -58,10 +58,12 @@ obj-$(CONFIG_MACH_OMAP_3430SDP) +=
board-3430sdp.o \
obj-$(CONFIG_MACH_OMAP3EVM)+= board-omap3evm.o \
hsmmc.o \
usb-musb.o usb-ehci.o \
- board-omap3evm-flash.o
+ board-omap3evm-flash.o \
+ twl4030-generic-scripts.o
obj-$(CONFIG_MACH_OMAP3_BEAGLE)+= board-omap3beagle.o \
usb-musb.o usb-ehci.o \
- hsmmc.o
+ hsmmc.o \
+ twl4030-generic-scripts.o
obj-$(CONFIG_MACH_OMAP_LDP)+= board-ldp.o \
hsmmc.o \
usb-musb.o
@@ -77,7 +79,8 @@ obj-$(CONFIG_MACH_NOKIA_N810) += board-n810.o
obj-$(CONFIG_MACH_OVERO) += board-overo.o \
hsmmc.o \
usb-musb.o \
- usb-ehci.o
+ usb-ehci.o \
+ twl4030-generic-scripts.o
# TUSB 6010 chips
obj-$(CONFIG_MACH_OMAP2_TUSB6010) += usb-tusb6010.o
diff --git a/arch/arm/mach-omap2/board-omap3beagle.c
b/arch/arm/mach-omap2/board-omap3beagle.c
index 19702c7..cc9506b 100644
--- a/arch/arm/mach-omap2/board-omap3beagle.c
+++ b/arch/arm/mach-omap2/board-omap3beagle.c
@@ -24,8 +24,6 @@
#include linux/input.h
#include linux/gpio_keys.h
-#include linux/i2c/twl4030.h
-
#include linux/mtd/mtd.h
#include linux/mtd/partitions.h
#include linux/mtd/nand.h
@@ -45,6 +43,7 @@
#include mach/nand.h
#include mach/mux.h
+#include twl4030-generic-scripts.h
#define GPMC_CS0_BASE 0x60
#define GPMC_CS_SIZE 0x30
@@ -149,6 +148,7 @@ static struct twl4030_platform_data beagle_twldata = {
/* platform_data for children goes here */
.usb= beagle_usb_data,
.gpio = beagle_gpio_data,
+ .power = generic3430_t2scripts_data,
};
static struct i2c_board_info __initdata beagle_i2c_boardinfo[] = {
diff --git a/arch/arm/mach-omap2/board-omap3evm.c
b/arch/arm/mach-omap2/board-omap3evm.c
index 3538067..a72772f 100644
--- a/arch/arm/mach-omap2/board-omap3evm.c
+++ b/arch/arm/mach-omap2/board-omap3evm.c
@@ -20,8 +20,6 @@
#include linux/clk.h
#include linux/input.h
-#include linux/i2c/twl4030.h
-
#include linux/spi/spi.h
#include linux/spi/ads7846.h
#include linux/i2c/twl4030.h
@@ -41,6 +39,7 @@
#include mach/mcspi.h
#include sdram-micron-mt46h32m32lf-6.h
+#include twl4030-generic-scripts.h
static struct resource omap3evm_smc911x_resources[] = {
[0] = {
@@ -139,6 +138,7 @@ static struct twl4030_platform_data omap3evm_twldata = {
.keypad = omap3evm_kp_data,
.madc = omap3evm_madc_data,
.usb= omap3evm_usb_data,
+ .power = generic3430_t2scripts_data,
.gpio = omap3evm_gpio_data,
};
diff --git a/arch/arm/mach-omap2/board-overo.c
b/arch/arm/mach-omap2/board-overo.c
index 4e2781a..b0e5cec 100644
--- a/arch/arm/mach-omap2/board-overo.c
+++ b/arch/arm/mach-omap2/board-overo.c
@@ -27,8 +27,6 @@
#include linux/kernel.h
#include linux/platform_device.h
-#include linux/i2c/twl4030.h
-
#include linux/mtd/mtd.h
#include linux/mtd/nand.h
#include linux/mtd/partitions.h
@@ -50,6 +48,7 @@
#include mach/usb-musb.h
#include sdram-micron-mt46h32m32lf-6.h
+#include twl4030-generic-scripts.h
#define NAND_BLOCK_SIZE SZ_128K
#define GPMC_CS0_BASE 0x60
@@ -160,6 +159,7 @@ static struct twl4030_platform_data overo_twldata = {
.irq_end= TWL4030_IRQ_END,
.gpio = overo_gpio_data,
.usb= overo_usb_data,
+ .power = generic3430_t2scripts_data,
};
static struct i2c_board_info __initdata overo_i2c_boardinfo[] = {
--
1.5.6.3
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[PATCH 4/7] Hook twl4030 power code into twl4030 core.
This patch makes twl4030 core call the power code in case the scripts are
present in the platform data.
Signed-off-by: Peter 'p2' De Schrijver [EMAIL PROTECTED]
---
drivers/mfd/Kconfig|7 +++
drivers/mfd/Makefile |1 +
drivers/mfd/twl4030-core.c | 11 +++
3 files changed, 19 insertions(+), 0 deletions(-)
diff --git a/drivers/mfd/Kconfig b/drivers/mfd/Kconfig
index e643f6b..f3a5f63 100644
--- a/drivers/mfd/Kconfig
+++ b/drivers/mfd/Kconfig
@@ -64,6 +64,13 @@ config TWL4030_CORE
high speed USB OTG transceiver, an audio codec (on most
versions) and many other features.
+config TWL4030_POWER
+ bool Support power sequencing scripts on TWL4030/TPS659x0
+ depends on TWL4030_CORE=y
+ help
+ Say yes here if you want to use the power management features of
+ the TWL4030/TPS659x0.
+
config MFD_TMIO
bool
default n
diff --git a/drivers/mfd/Makefile b/drivers/mfd/Makefile
index 5650e7b..08c5dfe 100644
--- a/drivers/mfd/Makefile
+++ b/drivers/mfd/Makefile
@@ -13,6 +13,7 @@ obj-$(CONFIG_MFD_TC6387XB)+= tc6387xb.o
obj-$(CONFIG_MFD_TC6393XB) += tc6393xb.o
obj-$(CONFIG_TWL4030_CORE) += twl4030-core.o
+obj-$(CONFIG_TWL4030_POWER)+= twl4030-power.o
obj-$(CONFIG_MFD_CORE) += mfd-core.o
diff --git a/drivers/mfd/twl4030-core.c b/drivers/mfd/twl4030-core.c
index fd9a016..7a5c9d0 100644
--- a/drivers/mfd/twl4030-core.c
+++ b/drivers/mfd/twl4030-core.c
@@ -81,6 +81,12 @@
#define twl_has_madc() false
#endif
+#ifdef CONFIG_TWL4030_POWER
+#define twl_has_power()true
+#else
+#define twl_has_power()false
+#endif
+
#if defined(CONFIG_RTC_DRV_TWL4030) || defined(CONFIG_RTC_DRV_TWL4030_MODULE)
#define twl_has_rtc() true
#else
@@ -106,6 +112,8 @@ static inline void activate_irq(int irq)
#endif
}
+extern void twl4030_power_init(struct twl4030_power_data *triton2_scripts);
+
/* Primary Interrupt Handler on TWL4030 Registers */
/* Register Definitions */
@@ -794,6 +802,9 @@ static int add_children(struct twl4030_platform_data *pdata)
}
}
+ if (twl_has_power() pdata-power)
+ twl4030_power_init(pdata-power);
+
if (twl_has_rtc()) {
twl = twl4030_modules[3];
--
1.5.6.3
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[PATCH 6/7] Generic twl4030 power script for 3430 based boards.
This is a generic twl4030 power script for 3430 based boards. It handles
sleep and wakeup events. In case of a sleep event it will first put the
Reset and Control (RC) resources to sleep and then put the voltage regulators
to sleep. In case of a wakeup event, the system clock will be started first,
then the voltage regulators will be woken up and finally the RC resources will
be woken up.
Signed-off-by: Peter 'p2' De Schrijver [EMAIL PROTECTED]
---
arch/arm/mach-omap2/twl4030-generic-scripts.c | 78 +
arch/arm/mach-omap2/twl4030-generic-scripts.h |8 +++
2 files changed, 86 insertions(+), 0 deletions(-)
create mode 100644 arch/arm/mach-omap2/twl4030-generic-scripts.c
create mode 100644 arch/arm/mach-omap2/twl4030-generic-scripts.h
diff --git a/arch/arm/mach-omap2/twl4030-generic-scripts.c
b/arch/arm/mach-omap2/twl4030-generic-scripts.c
new file mode 100644
index 000..f41c9ef
--- /dev/null
+++ b/arch/arm/mach-omap2/twl4030-generic-scripts.c
@@ -0,0 +1,78 @@
+/*
+ * arch/arm/mach-omap2/twl4030-generic-scripts.c
+ *
+ * Generic power control scripts for TWL4030
+ *
+ * Copyright (C) 2008 Nokia Corporation
+ * Copyright (C) 2006 Texas Instruments, Inc
+ *
+ * Written by Kalle Jokiniemi
+ * Peter De Schrijver [EMAIL PROTECTED]
+ *
+ * This file is subject to the terms and conditions of the GNU General
+ * Public License. See the file COPYING in the main directory of this
+ * archive for more details.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
+ */
+
+#include linux/kernel.h
+#include linux/device.h
+#include linux/init.h
+#include linux/i2c/twl4030.h
+
+/*
+ * This script instructs twl4030 to first put the Reset and Control (RC)
+ * resources to sleep and then all the other resources.
+ */
+
+static struct twl4030_ins sleep_on_seq[] __initdata = {
+ {MSG_BROADCAST(DEV_GRP_NULL, RES_GRP_RC, RES_TYPE_ALL, RES_TYPE2_R0,
+ RES_STATE_SLEEP), 4},
+ {MSG_BROADCAST(DEV_GRP_NULL, RES_GRP_ALL, RES_TYPE_ALL, RES_TYPE2_R0,
+ RES_STATE_SLEEP), 4},
+};
+
+static struct twl4030_script sleep_on_script __initdata = {
+ .script = sleep_on_seq,
+ .size = ARRAY_SIZE(sleep_on_seq),
+ .flags = TRITON_SLEEP_SCRIPT,
+};
+
+/*
+ * This script instructs twl4030 to first enable CLKEN, then wakeup the
+ * regulators and then all other resources.
+ */
+
+static struct twl4030_ins wakeup_seq[] __initdata = {
+ {MSG_SINGULAR(DEV_GRP_NULL, 0x17, RES_STATE_ACTIVE), 0x30},
+ {MSG_BROADCAST(DEV_GRP_NULL, RES_GRP_PP_PR, RES_TYPE_ALL, RES_TYPE2_R0,
+ RES_STATE_ACTIVE), 0x37},
+ {MSG_BROADCAST(DEV_GRP_NULL, RES_GRP_ALL, RES_TYPE_ALL, RES_TYPE2_R0,
+ RES_STATE_ACTIVE), 0x2},
+};
+
+static struct twl4030_script wakeup_script __initdata = {
+ .script = wakeup_seq,
+ .size = ARRAY_SIZE(wakeup_seq),
+ .flags = TRITON_WAKEUP12_SCRIPT | TRITON_WAKEUP3_SCRIPT,
+};
+
+static struct twl4030_script *twl4030_scripts[] __initdata = {
+ sleep_on_script,
+ wakeup_script,
+};
+
+struct twl4030_power_data generic3430_t2scripts_data __initdata = {
+ .scripts= twl4030_scripts,
+ .size = ARRAY_SIZE(twl4030_scripts),
+};
+
+
diff --git a/arch/arm/mach-omap2/twl4030-generic-scripts.h
b/arch/arm/mach-omap2/twl4030-generic-scripts.h
new file mode 100644
index 000..64d8d3f
--- /dev/null
+++ b/arch/arm/mach-omap2/twl4030-generic-scripts.h
@@ -0,0 +1,8 @@
+#ifndef __TWL4030_GENERIC_SCRIPTS_H
+#define __TWL4030_GENERIC_SCRIPTS_H
+
+#include linux/i2c/twl4030.h
+
+extern struct twl4030_power_data generic3430_t2scripts_data;
+
+#endif
--
1.5.6.3
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[PATCH 1/7] Remove existing twl4030 power script code.
First we remove the existing twl4030 power sequencer code.
Signed-off-by: Peter 'p2' De Schrijver [EMAIL PROTECTED]
---
drivers/i2c/chips/Makefile|2 +-
drivers/i2c/chips/twl4030-power.c | 343 -
2 files changed, 1 insertions(+), 344 deletions(-)
delete mode 100644 drivers/i2c/chips/twl4030-power.c
diff --git a/drivers/i2c/chips/Makefile b/drivers/i2c/chips/Makefile
index ba41a57..7e0fdfa 100644
--- a/drivers/i2c/chips/Makefile
+++ b/drivers/i2c/chips/Makefile
@@ -24,7 +24,7 @@ obj-$(CONFIG_GPIOEXPANDER_OMAP) += gpio_expander_omap.o
obj-$(CONFIG_MENELAUS) += menelaus.o
obj-$(CONFIG_SENSORS_TSL2550) += tsl2550.o
obj-$(CONFIG_SENSORS_TSL2563) += tsl2563.o
-obj-$(CONFIG_TWL4030_CORE) += twl4030-pwrirq.o twl4030-power.o
+obj-$(CONFIG_TWL4030_CORE) += twl4030-pwrirq.o
obj-$(CONFIG_TWL4030_USB) += twl4030-usb.o
obj-$(CONFIG_TWL4030_POWEROFF) += twl4030-poweroff.o
obj-$(CONFIG_TWL4030_PWRBUTTON)+= twl4030-pwrbutton.o
diff --git a/drivers/i2c/chips/twl4030-power.c
b/drivers/i2c/chips/twl4030-power.c
deleted file mode 100644
index cb325b0..000
--- a/drivers/i2c/chips/twl4030-power.c
+++ /dev/null
@@ -1,343 +0,0 @@
-/*
- * linux/drivers/i2c/chips/twl4030-power.c
- *
- * Handle TWL4030 Power initialization
- *
- * Copyright (C) 2008 Nokia Corporation
- * Copyright (C) 2006 Texas Instruments, Inc
- *
- * Written by Kalle Jokiniemi
- * Peter De Schrijver [EMAIL PROTECTED]
- *
- * This file is subject to the terms and conditions of the GNU General
- * Public License. See the file COPYING in the main directory of this
- * archive for more details.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
- */
-
-#include linux/module.h
-#include linux/pm.h
-#include linux/i2c/twl4030.h
-
-#include asm/mach-types.h
-
-#define PWR_P1_SW_EVENTS 0x10
-#define PWR_DEVOFF (10)
-
-#define PHY_TO_OFF_PM_MASTER(p)(p - 0x36)
-#define PHY_TO_OFF_PM_RECIEVER(p) (p - 0x5b)
-
-/* resource - hfclk */
-#define R_HFCLKOUT_DEV_GRP PHY_TO_OFF_PM_RECIEVER(0xe6)
-
-/* PM events */
-#define R_P1_SW_EVENTS PHY_TO_OFF_PM_MASTER(0x46)
-#define R_P2_SW_EVENTS PHY_TO_OFF_PM_MASTER(0x47)
-#define R_P3_SW_EVENTS PHY_TO_OFF_PM_MASTER(0x48)
-#define R_CFG_P1_TRANSITIONPHY_TO_OFF_PM_MASTER(0x36)
-#define R_CFG_P2_TRANSITIONPHY_TO_OFF_PM_MASTER(0x37)
-#define R_CFG_P3_TRANSITIONPHY_TO_OFF_PM_MASTER(0x38)
-
-#define LVL_WAKEUP 0x08
-
-#define ENABLE_WARMRESET (14)
-
-/* sequence script */
-
-#define END_OF_SCRIPT 0x3f
-
-#define R_SEQ_ADD_A2S PHY_TO_OFF_PM_MASTER(0x55)
-#define R_SEQ_ADD_SA12 PHY_TO_OFF_PM_MASTER(0x56)
-#defineR_SEQ_ADD_S2A3 PHY_TO_OFF_PM_MASTER(0x57)
-#defineR_SEQ_ADD_WARM PHY_TO_OFF_PM_MASTER(0x58)
-#define R_MEMORY_ADDRESS PHY_TO_OFF_PM_MASTER(0x59)
-#define R_MEMORY_DATA PHY_TO_OFF_PM_MASTER(0x5a)
-
-/* Power bus message definitions */
-
-#define DEV_GRP_NULL 0x0
-#define DEV_GRP_P1 0x1
-#define DEV_GRP_P2 0x2
-#define DEV_GRP_P3 0x4
-
-#define RES_GRP_RES0x0
-#define RES_GRP_PP 0x1
-#define RES_GRP_RC 0x2
-#define RES_GRP_PP_RC 0x3
-#define RES_GRP_PR 0x4
-#define RES_GRP_PP_PR 0x5
-#define RES_GRP_RC_PR 0x6
-#define RES_GRP_ALL0x7
-
-#define RES_TYPE2_R0 0x0
-
-#define RES_TYPE_ALL 0x7
-
-#define RES_STATE_WRST 0xF
-#define RES_STATE_ACTIVE 0xE
-#define RES_STATE_SLEEP0x8
-#define RES_STATE_OFF 0x0
-
-/*
-* Power Bus Message Format
-*
-* Broadcast Message (16 Bits)
-* DEV_GRP[15:13] MT[12] RES_GRP[11:9] RES_TYPE2[8:7] RES_TYPE[6:4]
-* RES_STATE[3:0]
-*
-* Singular Message (16 Bits)
-* DEV_GRP[15:13] MT[12] RES_ID[11:4] RES_STATE[3:0]
-*
-*/
-
-#define MSG_BROADCAST(devgrp, grp, type, type2, state) \
- (devgrp 13 | 1 12 | grp 9 | type2 7 | type 4 | state)
-
-#define MSG_SINGULAR(devgrp, id, state) \
- (devgrp 13 | 0 12 | id 4 | state)
-
-#define R_PROTECT_KEY 0x0E
-#define KEY_1 0xC0
-#define KEY_2 0x0C
-
-struct triton_ins {
- u16 pmb_message;
- u8 delay;
-};
-
-
-#define CONFIG_DISABLE_HFCLK 1
-
-#if defined(CONFIG_MACH_OMAP_3430SDP) || defined(CONFIG_MACH_OMAP_3430LABRADOR)
-
-struct triton_ins sleep_on_seq[] __initdata = {
- {MSG_SINGULAR(DEV_GRP_P1, 0xf
[PATCH 3/7] Twl4030 power code updated for new twl4030 core
This patch adds the twl4030 power handling. It downloads the scripts provided
by the board configuration to the twl4030 and configures the chip to call
the relevant script for each event (processor group 1 and 2 sleep,
processor group 3 sleep, wakeup or warm reset).
Signed-off-by: Peter 'p2' De Schrijver [EMAIL PROTECTED]
---
drivers/mfd/twl4030-power.c | 270 +++
1 files changed, 270 insertions(+), 0 deletions(-)
create mode 100644 drivers/mfd/twl4030-power.c
diff --git a/drivers/mfd/twl4030-power.c b/drivers/mfd/twl4030-power.c
new file mode 100644
index 000..bdeac36
--- /dev/null
+++ b/drivers/mfd/twl4030-power.c
@@ -0,0 +1,270 @@
+/*
+ * linux/drivers/i2c/chips/twl4030-power.c
+ *
+ * Handle TWL4030 Power initialization
+ *
+ * Copyright (C) 2008 Nokia Corporation
+ * Copyright (C) 2006 Texas Instruments, Inc
+ *
+ * Written by Kalle Jokiniemi
+ * Peter De Schrijver [EMAIL PROTECTED]
+ *
+ * This file is subject to the terms and conditions of the GNU General
+ * Public License. See the file COPYING in the main directory of this
+ * archive for more details.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
+ */
+
+#include linux/module.h
+#include linux/pm.h
+#include linux/i2c/twl4030.h
+#include linux/platform_device.h
+
+#include asm/mach-types.h
+
+static u8 triton_next_free_address = 0x2b;
+
+#define PWR_P1_SW_EVENTS 0x10
+#define PWR_DEVOFF (10)
+
+#define PHY_TO_OFF_PM_MASTER(p)(p - 0x36)
+#define PHY_TO_OFF_PM_RECEIVER(p) (p - 0x5b)
+
+/* resource - hfclk */
+#define R_HFCLKOUT_DEV_GRP PHY_TO_OFF_PM_RECEIVER(0xe6)
+
+/* PM events */
+#define R_P1_SW_EVENTS PHY_TO_OFF_PM_MASTER(0x46)
+#define R_P2_SW_EVENTS PHY_TO_OFF_PM_MASTER(0x47)
+#define R_P3_SW_EVENTS PHY_TO_OFF_PM_MASTER(0x48)
+#define R_CFG_P1_TRANSITIONPHY_TO_OFF_PM_MASTER(0x36)
+#define R_CFG_P2_TRANSITIONPHY_TO_OFF_PM_MASTER(0x37)
+#define R_CFG_P3_TRANSITIONPHY_TO_OFF_PM_MASTER(0x38)
+
+#define LVL_WAKEUP 0x08
+
+#define ENABLE_WARMRESET (14)
+
+#define END_OF_SCRIPT 0x3f
+
+#define R_SEQ_ADD_A2S PHY_TO_OFF_PM_MASTER(0x55)
+#define R_SEQ_ADD_SA12 PHY_TO_OFF_PM_MASTER(0x56)
+#defineR_SEQ_ADD_S2A3 PHY_TO_OFF_PM_MASTER(0x57)
+#defineR_SEQ_ADD_WARM PHY_TO_OFF_PM_MASTER(0x58)
+#define R_MEMORY_ADDRESS PHY_TO_OFF_PM_MASTER(0x59)
+#define R_MEMORY_DATA PHY_TO_OFF_PM_MASTER(0x5a)
+
+#define R_PROTECT_KEY 0x0E
+#define KEY_1 0xC0
+#define KEY_2 0x0C
+
+static int __init twl4030_write_script_byte(u8 address, u8 byte)
+{
+ int err;
+
+ err = twl4030_i2c_write_u8(TWL4030_MODULE_PM_MASTER, address,
+ R_MEMORY_ADDRESS);
+ err |= twl4030_i2c_write_u8(TWL4030_MODULE_PM_MASTER, byte,
+ R_MEMORY_DATA);
+
+ return err;
+}
+
+static int __init twl4030_write_script_ins(u8 address, u16 pmb_message,
+ u8 delay, u8 next)
+{
+ int err = 0;
+
+ address *= 4;
+ err |= twl4030_write_script_byte(address++, pmb_message 8);
+ err |= twl4030_write_script_byte(address++, pmb_message 0xff);
+ err |= twl4030_write_script_byte(address++, delay);
+ err |= twl4030_write_script_byte(address++, next);
+
+ return err;
+}
+
+static int __init twl4030_write_script(u8 address, struct twl4030_ins *script,
+ int len)
+{
+ int err = 0;
+
+ for (; len; len--, address++, script++) {
+ if (len == 1)
+ err |= twl4030_write_script_ins(address,
+ script-pmb_message,
+ script-delay,
+ END_OF_SCRIPT);
+ else
+ err |= twl4030_write_script_ins(address,
+ script-pmb_message,
+ script-delay,
+ address + 1);
+ }
+
+ return err;
+}
+
+static int __init config_wakeup3_sequence(u8 address)
+{
+
+ int err = 0;
+
+ /* Set SLEEP to ACTIVE SEQ address for P3 */
+ err |= twl4030_i2c_write_u8(TWL4030_MODULE_PM_MASTER, address,
+ R_SEQ_ADD_S2A3
[PATCH 7/7] omap3 evm, beagle and overo use the generic twl4030 script
Make omap3 evm, beagle and overo use the generic twl4030 script.
Signed-off-by: Peter 'p2' De Schrijver [EMAIL PROTECTED]
---
arch/arm/mach-omap2/Makefile|9 ++---
arch/arm/mach-omap2/board-omap3beagle.c |3 +++
arch/arm/mach-omap2/board-omap3evm.c|3 +++
arch/arm/mach-omap2/board-overo.c |3 +++
4 files changed, 15 insertions(+), 3 deletions(-)
diff --git a/arch/arm/mach-omap2/Makefile b/arch/arm/mach-omap2/Makefile
index 33de217..ed0cd7a 100644
--- a/arch/arm/mach-omap2/Makefile
+++ b/arch/arm/mach-omap2/Makefile
@@ -58,10 +58,12 @@ obj-$(CONFIG_MACH_OMAP_3430SDP) +=
board-3430sdp.o \
obj-$(CONFIG_MACH_OMAP3EVM)+= board-omap3evm.o \
hsmmc.o \
usb-musb.o usb-ehci.o \
- board-omap3evm-flash.o
+ board-omap3evm-flash.o \
+ twl4030-generic-scripts.o
obj-$(CONFIG_MACH_OMAP3_BEAGLE)+= board-omap3beagle.o \
usb-musb.o usb-ehci.o \
- hsmmc.o
+ hsmmc.o \
+ twl4030-generic-scripts.o
obj-$(CONFIG_MACH_OMAP_LDP)+= board-ldp.o \
hsmmc.o \
usb-musb.o
@@ -77,7 +79,8 @@ obj-$(CONFIG_MACH_NOKIA_N810) += board-n810.o
obj-$(CONFIG_MACH_OVERO) += board-overo.o \
hsmmc.o \
usb-musb.o \
- usb-ehci.o
+ usb-ehci.o \
+ twl4030-generic-scripts.o
# TUSB 6010 chips
obj-$(CONFIG_MACH_OMAP2_TUSB6010) += usb-tusb6010.o
diff --git a/arch/arm/mach-omap2/board-omap3beagle.c
b/arch/arm/mach-omap2/board-omap3beagle.c
index 19702c7..1579a5e 100644
--- a/arch/arm/mach-omap2/board-omap3beagle.c
+++ b/arch/arm/mach-omap2/board-omap3beagle.c
@@ -51,6 +51,8 @@
#define NAND_BLOCK_SIZESZ_128K
+extern struct twl4030_power_data generic3430_t2scripts_data;
+
static struct mtd_partition omap3beagle_nand_partitions[] = {
/* All the partition sizes are listed in terms of NAND block size */
{
@@ -149,6 +151,7 @@ static struct twl4030_platform_data beagle_twldata = {
/* platform_data for children goes here */
.usb= beagle_usb_data,
.gpio = beagle_gpio_data,
+ .power = generic3430_t2scripts_data,
};
static struct i2c_board_info __initdata beagle_i2c_boardinfo[] = {
diff --git a/arch/arm/mach-omap2/board-omap3evm.c
b/arch/arm/mach-omap2/board-omap3evm.c
index 3538067..dd7d1b7 100644
--- a/arch/arm/mach-omap2/board-omap3evm.c
+++ b/arch/arm/mach-omap2/board-omap3evm.c
@@ -42,6 +42,8 @@
#include sdram-micron-mt46h32m32lf-6.h
+extern struct twl4030_power_data generic3430_t2scripts_data;
+
static struct resource omap3evm_smc911x_resources[] = {
[0] = {
.start = OMAP3EVM_ETHR_START,
@@ -139,6 +141,7 @@ static struct twl4030_platform_data omap3evm_twldata = {
.keypad = omap3evm_kp_data,
.madc = omap3evm_madc_data,
.usb= omap3evm_usb_data,
+ .power = generic3430_t2scripts_data,
.gpio = omap3evm_gpio_data,
};
diff --git a/arch/arm/mach-omap2/board-overo.c
b/arch/arm/mach-omap2/board-overo.c
index 4e2781a..4d2203f 100644
--- a/arch/arm/mach-omap2/board-overo.c
+++ b/arch/arm/mach-omap2/board-overo.c
@@ -55,6 +55,8 @@
#define GPMC_CS0_BASE 0x60
#define GPMC_CS_SIZE 0x30
+extern struct twl4030_power_data generic3430_t2scripts_data;
+
static struct mtd_partition overo_nand_partitions[] = {
{
.name = xloader,
@@ -160,6 +162,7 @@ static struct twl4030_platform_data overo_twldata = {
.irq_end= TWL4030_IRQ_END,
.gpio = overo_gpio_data,
.usb= overo_usb_data,
+ .power = generic3430_t2scripts_data,
};
static struct i2c_board_info __initdata overo_i2c_boardinfo[] = {
--
1.5.6.3
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[PATCH 6/7] Generic twl4030 power script for 3430 based boards.
This is a generic twl4030 power script for 3430 based boards. It handles
sleep and wakeup events. In case of a sleep event it will first put the
Reset and Control (RC) resources to sleep and then put the voltage regulators
to sleep. In case of a wakeup event, the system clock will be started first,
then the voltage regulators will be woken up and finally the RC resources will
be woken up.
Signed-off-by: Peter 'p2' De Schrijver [EMAIL PROTECTED]
---
arch/arm/mach-omap2/twl4030-generic-scripts.c | 78 +
1 files changed, 78 insertions(+), 0 deletions(-)
create mode 100644 arch/arm/mach-omap2/twl4030-generic-scripts.c
diff --git a/arch/arm/mach-omap2/twl4030-generic-scripts.c
b/arch/arm/mach-omap2/twl4030-generic-scripts.c
new file mode 100644
index 000..f41c9ef
--- /dev/null
+++ b/arch/arm/mach-omap2/twl4030-generic-scripts.c
@@ -0,0 +1,78 @@
+/*
+ * arch/arm/mach-omap2/twl4030-generic-scripts.c
+ *
+ * Generic power control scripts for TWL4030
+ *
+ * Copyright (C) 2008 Nokia Corporation
+ * Copyright (C) 2006 Texas Instruments, Inc
+ *
+ * Written by Kalle Jokiniemi
+ * Peter De Schrijver [EMAIL PROTECTED]
+ *
+ * This file is subject to the terms and conditions of the GNU General
+ * Public License. See the file COPYING in the main directory of this
+ * archive for more details.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
+ */
+
+#include linux/kernel.h
+#include linux/device.h
+#include linux/init.h
+#include linux/i2c/twl4030.h
+
+/*
+ * This script instructs twl4030 to first put the Reset and Control (RC)
+ * resources to sleep and then all the other resources.
+ */
+
+static struct twl4030_ins sleep_on_seq[] __initdata = {
+ {MSG_BROADCAST(DEV_GRP_NULL, RES_GRP_RC, RES_TYPE_ALL, RES_TYPE2_R0,
+ RES_STATE_SLEEP), 4},
+ {MSG_BROADCAST(DEV_GRP_NULL, RES_GRP_ALL, RES_TYPE_ALL, RES_TYPE2_R0,
+ RES_STATE_SLEEP), 4},
+};
+
+static struct twl4030_script sleep_on_script __initdata = {
+ .script = sleep_on_seq,
+ .size = ARRAY_SIZE(sleep_on_seq),
+ .flags = TRITON_SLEEP_SCRIPT,
+};
+
+/*
+ * This script instructs twl4030 to first enable CLKEN, then wakeup the
+ * regulators and then all other resources.
+ */
+
+static struct twl4030_ins wakeup_seq[] __initdata = {
+ {MSG_SINGULAR(DEV_GRP_NULL, 0x17, RES_STATE_ACTIVE), 0x30},
+ {MSG_BROADCAST(DEV_GRP_NULL, RES_GRP_PP_PR, RES_TYPE_ALL, RES_TYPE2_R0,
+ RES_STATE_ACTIVE), 0x37},
+ {MSG_BROADCAST(DEV_GRP_NULL, RES_GRP_ALL, RES_TYPE_ALL, RES_TYPE2_R0,
+ RES_STATE_ACTIVE), 0x2},
+};
+
+static struct twl4030_script wakeup_script __initdata = {
+ .script = wakeup_seq,
+ .size = ARRAY_SIZE(wakeup_seq),
+ .flags = TRITON_WAKEUP12_SCRIPT | TRITON_WAKEUP3_SCRIPT,
+};
+
+static struct twl4030_script *twl4030_scripts[] __initdata = {
+ sleep_on_script,
+ wakeup_script,
+};
+
+struct twl4030_power_data generic3430_t2scripts_data __initdata = {
+ .scripts= twl4030_scripts,
+ .size = ARRAY_SIZE(twl4030_scripts),
+};
+
+
--
1.5.6.3
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[PATCH 2/7] Add defines and data types for twl4030.
This patch adds a bunch of data types and defines to handle the twl4030 power
sequence scripts.
Signed-off-by: Peter 'p2' De Schrijver [EMAIL PROTECTED]
---
include/linux/i2c/twl4030.h | 64 +++
1 files changed, 64 insertions(+), 0 deletions(-)
diff --git a/include/linux/i2c/twl4030.h b/include/linux/i2c/twl4030.h
index cdb4531..7dc4ee1 100644
--- a/include/linux/i2c/twl4030.h
+++ b/include/linux/i2c/twl4030.h
@@ -264,6 +264,69 @@ struct twl4030_usb_data {
enum twl4030_usb_mode usb_mode;
};
+struct twl4030_ins {
+ u16 pmb_message;
+ u8 delay;
+};
+
+struct twl4030_script {
+ struct twl4030_ins *script;
+ unsigned size;
+ u8 flags;
+};
+#define TRITON_WRST_SCRIPT (10)
+#define TRITON_WAKEUP12_SCRIPT (11)
+#define TRITON_WAKEUP3_SCRIPT (12)
+#define TRITON_SLEEP_SCRIPT(13)
+
+struct twl4030_power_data {
+ struct twl4030_script **scripts;
+ unsigned size;
+};
+
+/* Power bus message definitions */
+
+#define DEV_GRP_NULL 0x0
+#define DEV_GRP_P1 0x1
+#define DEV_GRP_P2 0x2
+#define DEV_GRP_P3 0x4
+
+#define RES_GRP_RES0x0
+#define RES_GRP_PP 0x1
+#define RES_GRP_RC 0x2
+#define RES_GRP_PP_RC 0x3
+#define RES_GRP_PR 0x4
+#define RES_GRP_PP_PR 0x5
+#define RES_GRP_RC_PR 0x6
+#define RES_GRP_ALL0x7
+
+#define RES_TYPE2_R0 0x0
+
+#define RES_TYPE_ALL 0x7
+
+#define RES_STATE_WRST 0xF
+#define RES_STATE_ACTIVE 0xE
+#define RES_STATE_SLEEP0x8
+#define RES_STATE_OFF 0x0
+
+/*
+* Power Bus Message Format
+*
+* Broadcast Message (16 Bits)
+* DEV_GRP[15:13] MT[12] RES_GRP[11:9] RES_TYPE2[8:7] RES_TYPE[6:4]
+* RES_STATE[3:0]
+*
+* Singular Message (16 Bits)
+* DEV_GRP[15:13] MT[12] RES_ID[11:4] RES_STATE[3:0]
+*
+*/
+
+#define MSG_BROADCAST(devgrp, grp, type, type2, state) \
+ (devgrp 13 | 1 12 | grp 9 | type2 7 | type 4 | state)
+
+#define MSG_SINGULAR(devgrp, id, state) \
+ (devgrp 13 | 0 12 | id 4 | state)
+
struct twl4030_platform_data {
unsignedirq_base, irq_end;
struct twl4030_bci_platform_data*bci;
@@ -271,6 +334,7 @@ struct twl4030_platform_data {
struct twl4030_madc_platform_data *madc;
struct twl4030_keypad_data *keypad;
struct twl4030_usb_data *usb;
+ struct twl4030_power_data *power;
/* REVISIT more to come ... _nothing_ should be hard-wired */
};
--
1.5.6.3
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[PATCH 4/7] Hook twl4030 power code into twl4030 core.
This patch makes twl4030 core call the power code in case the scripts are
present in the platform data.
Signed-off-by: Peter 'p2' De Schrijver [EMAIL PROTECTED]
---
drivers/mfd/twl4030-core.c | 11 +++
1 files changed, 11 insertions(+), 0 deletions(-)
diff --git a/drivers/mfd/twl4030-core.c b/drivers/mfd/twl4030-core.c
index fd9a016..7a5c9d0 100644
--- a/drivers/mfd/twl4030-core.c
+++ b/drivers/mfd/twl4030-core.c
@@ -81,6 +81,12 @@
#define twl_has_madc() false
#endif
+#ifdef CONFIG_TWL4030_POWER
+#define twl_has_power()true
+#else
+#define twl_has_power()false
+#endif
+
#if defined(CONFIG_RTC_DRV_TWL4030) || defined(CONFIG_RTC_DRV_TWL4030_MODULE)
#define twl_has_rtc() true
#else
@@ -106,6 +112,8 @@ static inline void activate_irq(int irq)
#endif
}
+extern void twl4030_power_init(struct twl4030_power_data *triton2_scripts);
+
/* Primary Interrupt Handler on TWL4030 Registers */
/* Register Definitions */
@@ -794,6 +802,9 @@ static int add_children(struct twl4030_platform_data *pdata)
}
}
+ if (twl_has_power() pdata-power)
+ twl4030_power_init(pdata-power);
+
if (twl_has_rtc()) {
twl = twl4030_modules[3];
--
1.5.6.3
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[PATCH 1/7] Remove existing twl4030 power script code.
First we remove the existing twl4030 power sequencer code.
Signed-off-by: Peter 'p2' De Schrijver [EMAIL PROTECTED]
---
drivers/i2c/chips/twl4030-power.c | 343 -
1 files changed, 0 insertions(+), 343 deletions(-)
delete mode 100644 drivers/i2c/chips/twl4030-power.c
diff --git a/drivers/i2c/chips/twl4030-power.c
b/drivers/i2c/chips/twl4030-power.c
deleted file mode 100644
index cb325b0..000
--- a/drivers/i2c/chips/twl4030-power.c
+++ /dev/null
@@ -1,343 +0,0 @@
-/*
- * linux/drivers/i2c/chips/twl4030-power.c
- *
- * Handle TWL4030 Power initialization
- *
- * Copyright (C) 2008 Nokia Corporation
- * Copyright (C) 2006 Texas Instruments, Inc
- *
- * Written by Kalle Jokiniemi
- * Peter De Schrijver [EMAIL PROTECTED]
- *
- * This file is subject to the terms and conditions of the GNU General
- * Public License. See the file COPYING in the main directory of this
- * archive for more details.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
- */
-
-#include linux/module.h
-#include linux/pm.h
-#include linux/i2c/twl4030.h
-
-#include asm/mach-types.h
-
-#define PWR_P1_SW_EVENTS 0x10
-#define PWR_DEVOFF (10)
-
-#define PHY_TO_OFF_PM_MASTER(p)(p - 0x36)
-#define PHY_TO_OFF_PM_RECIEVER(p) (p - 0x5b)
-
-/* resource - hfclk */
-#define R_HFCLKOUT_DEV_GRP PHY_TO_OFF_PM_RECIEVER(0xe6)
-
-/* PM events */
-#define R_P1_SW_EVENTS PHY_TO_OFF_PM_MASTER(0x46)
-#define R_P2_SW_EVENTS PHY_TO_OFF_PM_MASTER(0x47)
-#define R_P3_SW_EVENTS PHY_TO_OFF_PM_MASTER(0x48)
-#define R_CFG_P1_TRANSITIONPHY_TO_OFF_PM_MASTER(0x36)
-#define R_CFG_P2_TRANSITIONPHY_TO_OFF_PM_MASTER(0x37)
-#define R_CFG_P3_TRANSITIONPHY_TO_OFF_PM_MASTER(0x38)
-
-#define LVL_WAKEUP 0x08
-
-#define ENABLE_WARMRESET (14)
-
-/* sequence script */
-
-#define END_OF_SCRIPT 0x3f
-
-#define R_SEQ_ADD_A2S PHY_TO_OFF_PM_MASTER(0x55)
-#define R_SEQ_ADD_SA12 PHY_TO_OFF_PM_MASTER(0x56)
-#defineR_SEQ_ADD_S2A3 PHY_TO_OFF_PM_MASTER(0x57)
-#defineR_SEQ_ADD_WARM PHY_TO_OFF_PM_MASTER(0x58)
-#define R_MEMORY_ADDRESS PHY_TO_OFF_PM_MASTER(0x59)
-#define R_MEMORY_DATA PHY_TO_OFF_PM_MASTER(0x5a)
-
-/* Power bus message definitions */
-
-#define DEV_GRP_NULL 0x0
-#define DEV_GRP_P1 0x1
-#define DEV_GRP_P2 0x2
-#define DEV_GRP_P3 0x4
-
-#define RES_GRP_RES0x0
-#define RES_GRP_PP 0x1
-#define RES_GRP_RC 0x2
-#define RES_GRP_PP_RC 0x3
-#define RES_GRP_PR 0x4
-#define RES_GRP_PP_PR 0x5
-#define RES_GRP_RC_PR 0x6
-#define RES_GRP_ALL0x7
-
-#define RES_TYPE2_R0 0x0
-
-#define RES_TYPE_ALL 0x7
-
-#define RES_STATE_WRST 0xF
-#define RES_STATE_ACTIVE 0xE
-#define RES_STATE_SLEEP0x8
-#define RES_STATE_OFF 0x0
-
-/*
-* Power Bus Message Format
-*
-* Broadcast Message (16 Bits)
-* DEV_GRP[15:13] MT[12] RES_GRP[11:9] RES_TYPE2[8:7] RES_TYPE[6:4]
-* RES_STATE[3:0]
-*
-* Singular Message (16 Bits)
-* DEV_GRP[15:13] MT[12] RES_ID[11:4] RES_STATE[3:0]
-*
-*/
-
-#define MSG_BROADCAST(devgrp, grp, type, type2, state) \
- (devgrp 13 | 1 12 | grp 9 | type2 7 | type 4 | state)
-
-#define MSG_SINGULAR(devgrp, id, state) \
- (devgrp 13 | 0 12 | id 4 | state)
-
-#define R_PROTECT_KEY 0x0E
-#define KEY_1 0xC0
-#define KEY_2 0x0C
-
-struct triton_ins {
- u16 pmb_message;
- u8 delay;
-};
-
-
-#define CONFIG_DISABLE_HFCLK 1
-
-#if defined(CONFIG_MACH_OMAP_3430SDP) || defined(CONFIG_MACH_OMAP_3430LABRADOR)
-
-struct triton_ins sleep_on_seq[] __initdata = {
- {MSG_SINGULAR(DEV_GRP_P1, 0xf, RES_STATE_OFF), 4},
- {MSG_SINGULAR(DEV_GRP_P1, 0x10, RES_STATE_OFF), 2},
-#ifdef CONFIG_DISABLE_HFCLK
- {MSG_SINGULAR(DEV_GRP_P1, 0x7, RES_STATE_OFF), 3},
- {MSG_SINGULAR(DEV_GRP_P1, 0x19, RES_STATE_OFF), 3},
-#endif /* #ifdef CONFIG_DISABLE_HFCLK */
-};
-
-struct triton_ins sleep_off_seq[] __initdata = {
-#ifndef CONFIG_DISABLE_HFCLK
- {MSG_SINGULAR(DEV_GRP_P1, 0xf, RES_STATE_ACTIVE), 4},
- {MSG_SINGULAR(DEV_GRP_P1, 0x10, RES_STATE_ACTIVE), 2},
-#else
- {MSG_SINGULAR(DEV_GRP_P1, 0x7, RES_STATE_ACTIVE), 0x30},
- {MSG_SINGULAR(DEV_GRP_P1, 0xf, RES_STATE_ACTIVE), 0x30},
- {MSG_SINGULAR(DEV_GRP_P1, 0x10, RES_STATE_ACTIVE), 0x37},
- {MSG_SINGULAR(DEV_GRP_P1
[PATCH 0/7] Integrate the twl4030 power code into new twl4030 mfd
This patchset integrates the twl4030 power code into the new twl4030 mfd framework. The scripts will be moved to the board specific data. Peter 'p2' De Schrijver (7): Remove existing twl4030 power script code. Add defines and data types for twl4030. Twl4030 power code updated for new twl4030 core Hook twl4030 power code into twl4030 core. 3430sdp and ldp use custom twl4030 power scripts. Generic twl4030 power script for 3430 based boards. omap3 evm beagle and overo use the generic twl4030 script arch/arm/mach-omap2/Makefile |9 +- arch/arm/mach-omap2/board-3430sdp.c | 61 + arch/arm/mach-omap2/board-ldp.c | 62 + arch/arm/mach-omap2/board-omap3beagle.c |3 + arch/arm/mach-omap2/board-omap3evm.c |3 + arch/arm/mach-omap2/board-overo.c |3 + arch/arm/mach-omap2/twl4030-generic-scripts.c | 78 ++ drivers/i2c/chips/twl4030-power.c | 343 - drivers/mfd/twl4030-core.c| 11 + drivers/mfd/twl4030-power.c | 270 +++ include/linux/i2c/twl4030.h | 64 + 11 files changed, 561 insertions(+), 346 deletions(-) create mode 100644 arch/arm/mach-omap2/twl4030-generic-scripts.c delete mode 100644 drivers/i2c/chips/twl4030-power.c create mode 100644 drivers/mfd/twl4030-power.c -- To unsubscribe from this list: send the line unsubscribe linux-omap in the body of a message to [EMAIL PROTECTED] More majordomo info at http://vger.kernel.org/majordomo-info.html
[PATCH 5/7] 3430sdp and ldp use custom twl4030 power scripts.
The TI 3430dsp and ldp boards have a custom power script.
Signed-off-by: Peter 'p2' De Schrijver [EMAIL PROTECTED]
---
arch/arm/mach-omap2/board-3430sdp.c | 61 ++
arch/arm/mach-omap2/board-ldp.c | 62 +++
2 files changed, 123 insertions(+), 0 deletions(-)
diff --git a/arch/arm/mach-omap2/board-3430sdp.c
b/arch/arm/mach-omap2/board-3430sdp.c
index 56f28ae..93347d2 100644
--- a/arch/arm/mach-omap2/board-3430sdp.c
+++ b/arch/arm/mach-omap2/board-3430sdp.c
@@ -47,6 +47,8 @@
#include sdram-qimonda-hyb18m512160af-6.h
+#define CONFIG_DISABLE_HFCLK 1
+
#defineSDP3430_SMC91X_CS 3
#define ENABLE_VAUX3_DEDICATED 0x03
@@ -329,6 +331,64 @@ static struct twl4030_madc_platform_data sdp3430_madc_data
= {
.irq_line = 1,
};
+static struct twl4030_ins __initdata sleep_on_seq[] = {
+ {MSG_SINGULAR(DEV_GRP_P1, 0xf, RES_STATE_OFF), 4},
+ {MSG_SINGULAR(DEV_GRP_P1, 0x10, RES_STATE_OFF), 2},
+#ifdef CONFIG_DISABLE_HFCLK
+ {MSG_SINGULAR(DEV_GRP_P1, 0x7, RES_STATE_OFF), 3},
+ {MSG_SINGULAR(DEV_GRP_P1, 0x19, RES_STATE_OFF), 3},
+#endif
+};
+
+static struct twl4030_script sleep_on_script __initdata = {
+ .script = sleep_on_seq,
+ .size = ARRAY_SIZE(sleep_on_seq),
+ .flags = TRITON_SLEEP_SCRIPT,
+};
+
+static struct twl4030_ins wakeup_seq[] __initdata = {
+#ifndef CONFIG_DISABLE_HFCLK
+ {MSG_SINGULAR(DEV_GRP_P1, 0xf, RES_STATE_ACTIVE), 4},
+ {MSG_SINGULAR(DEV_GRP_P1, 0x10, RES_STATE_ACTIVE), 2},
+#else
+ {MSG_SINGULAR(DEV_GRP_P1, 0x7, RES_STATE_ACTIVE), 0x30},
+ {MSG_SINGULAR(DEV_GRP_P1, 0xf, RES_STATE_ACTIVE), 0x30},
+ {MSG_SINGULAR(DEV_GRP_P1, 0x10, RES_STATE_ACTIVE), 0x37},
+ {MSG_SINGULAR(DEV_GRP_P1, 0x19, RES_STATE_ACTIVE), 3},
+#endif /* #ifndef CONFIG_DISABLE_HFCLK */
+};
+
+static struct twl4030_script wakeup_script __initdata = {
+ .script = wakeup_seq,
+ .size = ARRAY_SIZE(wakeup_seq),
+ .flags = TRITON_WAKEUP12_SCRIPT | TRITON_WAKEUP3_SCRIPT,
+};
+
+static struct twl4030_ins wrst_seq[] __initdata = {
+ {MSG_SINGULAR(DEV_GRP_NULL, 0x1b, RES_STATE_OFF), 2},
+ {MSG_SINGULAR(DEV_GRP_P1, 0xf, RES_STATE_WRST), 15},
+ {MSG_SINGULAR(DEV_GRP_P1, 0x10, RES_STATE_WRST), 15},
+ {MSG_SINGULAR(DEV_GRP_P1, 0x7, RES_STATE_WRST), 0x60},
+ {MSG_SINGULAR(DEV_GRP_P1, 0x19, RES_STATE_ACTIVE), 2},
+ {MSG_SINGULAR(DEV_GRP_NULL, 0x1b, RES_STATE_ACTIVE), 2},
+};
+static struct twl4030_script wrst_script __initdata = {
+ .script = wrst_seq,
+ .size = ARRAY_SIZE(wakeup_seq),
+ .flags = TRITON_WRST_SCRIPT,
+};
+
+static struct twl4030_script *twl4030_scripts[] __initdata = {
+ sleep_on_script,
+ wakeup_script,
+ wrst_script,
+};
+
+static struct twl4030_power_data sdp3430_t2scripts_data __initdata = {
+ .scripts= twl4030_scripts,
+ .size = ARRAY_SIZE(twl4030_scripts),
+};
+
static struct twl4030_platform_data sdp3430_twldata = {
.irq_base = TWL4030_IRQ_BASE,
.irq_end= TWL4030_IRQ_END,
@@ -338,6 +398,7 @@ static struct twl4030_platform_data sdp3430_twldata = {
.gpio = sdp3430_gpio_data,
.madc = sdp3430_madc_data,
.keypad = sdp3430_kp_data,
+ .power = sdp3430_t2scripts_data,
.usb= sdp3430_usb_data,
};
diff --git a/arch/arm/mach-omap2/board-ldp.c b/arch/arm/mach-omap2/board-ldp.c
index 92710c3..498a786 100644
--- a/arch/arm/mach-omap2/board-ldp.c
+++ b/arch/arm/mach-omap2/board-ldp.c
@@ -41,6 +41,8 @@
#include asm/delay.h
#include mach/control.h
+#define CONFIG_DISABLE_HFCLK 1
+
#define ENABLE_VAUX1_DEDICATED 0x03
#define ENABLE_VAUX1_DEV_GRP 0x20
@@ -195,6 +197,65 @@ static int ldp_batt_table[] = {
4040, 3910, 3790, 3670, 3550
};
+static struct twl4030_ins __initdata sleep_on_seq[] = {
+ {MSG_SINGULAR(DEV_GRP_P1, 0xf, RES_STATE_OFF), 4},
+ {MSG_SINGULAR(DEV_GRP_P1, 0x10, RES_STATE_OFF), 2},
+#ifdef CONFIG_DISABLE_HFCLK
+ {MSG_SINGULAR(DEV_GRP_P1, 0x7, RES_STATE_OFF), 3},
+ {MSG_SINGULAR(DEV_GRP_P1, 0x19, RES_STATE_OFF), 3},
+#endif
+};
+
+static struct twl4030_script sleep_on_script __initdata = {
+ .script = sleep_on_seq,
+ .size = ARRAY_SIZE(sleep_on_seq),
+ .flags = TRITON_SLEEP_SCRIPT,
+};
+
+static struct twl4030_ins wakeup_seq[] __initdata = {
+#ifndef CONFIG_DISABLE_HFCLK
+ {MSG_SINGULAR(DEV_GRP_P1, 0xf, RES_STATE_ACTIVE), 4},
+ {MSG_SINGULAR(DEV_GRP_P1, 0x10, RES_STATE_ACTIVE), 2},
+#else
+ {MSG_SINGULAR(DEV_GRP_P1, 0x7, RES_STATE_ACTIVE), 0x30},
+ {MSG_SINGULAR(DEV_GRP_P1, 0xf, RES_STATE_ACTIVE), 0x30},
+ {MSG_SINGULAR(DEV_GRP_P1, 0x10, RES_STATE_ACTIVE), 0x37},
+ {MSG_SINGULAR(DEV_GRP_P1, 0x19, RES_STATE_ACTIVE), 3},
+#endif /* #ifndef CONFIG_DISABLE_HFCLK */
+};
+
+static struct twl4030_script
Re: [PATCH 2/3] Adapt twl4030 power code to new twl4030 code
Hi David,
Your set of patches seems to have discarded support for quite
a few platforms. I don't quite know the details of what these
PM scripts are doing ... could they be misbehaving on Beagle,
so that they explain why reboot on RC8 fails?
It might. At least the warmreset script might cause problems on Beagle.
I'm not familiar enough with beagle to know for sure.
+static int __init twl4030_power_probe(struct platform_device *pdev)
Pretty much everything here is init code, which is fine;
I like seeing smaller runtime images. But:
@@ -340,4 +271,17 @@ static int __init twl4030_power_init(void)
}
+static struct platform_driver twl4030_power = {
+ .probe = twl4030_power_probe,
+ .driver = {
+ .name = twl4030_power,
+ .owner = THIS_MODULE,
+ },
+};
+
+static int __init twl4030_power_init(void)
+{
+ return platform_driver_register(twl4030_power);
... in that case, why not platform_driver_probe(), so there's
not even a whiff of a notion that this driver remain init is
done?
That's correct. The 'driver' basically loads the scripts in the twl4030 and
that's it. The hw will then execute the scripts when necessary.
And I can't help but wonder why this isn't just part of
the twl4030-core code, without even a platform device/driver.
If you think all this script loading stuff can go into twl4030-core, I
can make a patch to move it there.
I didn't move it to drivers/mfd because it seemed almost all
SDP-specific. But to the extent that it's something generic
and part of the core, maybe that's where it should be.
Not necessarily part of the same file.
It's not SDP specific, but it is OMAP specific I think. At least I can't
see use cases outside OMAP2/3.
Cheers,
Peter.
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[PATCH 3/3] Add twl4030 power platform device
Signed-off-by: Peter 'p2' De Schrijver [EMAIL PROTECTED]
---
drivers/i2c/chips/twl4030-core.c | 41 ++
1 files changed, 41 insertions(+), 0 deletions(-)
diff --git a/drivers/i2c/chips/twl4030-core.c b/drivers/i2c/chips/twl4030-core.c
index 9debab4..42d9e4f 100644
--- a/drivers/i2c/chips/twl4030-core.c
+++ b/drivers/i2c/chips/twl4030-core.c
@@ -70,6 +70,12 @@
#define twl_has_madc() false
#endif
+#ifdef CONFIG_TWL4030_POWER
+#define twl_has_power()true
+#else
+#define twl_has_power()false
+#endif
+
#if defined(CONFIG_RTC_DRV_TWL4030) || defined(CONFIG_RTC_DRV_TWL4030_MODULE)
#define twl_has_rtc() true
#else
@@ -838,6 +844,41 @@ static int add_children(struct twl4030_platform_data
*pdata)
}
}
+ if (twl_has_power() pdata-power) {
+ twl = twl4030_modules[TWL4030_SLAVENUM_NUM3];
+
+ pdev = platform_device_alloc(twl4030_power, -1);
+ if (!pdev) {
+ pr_debug(%s: can't alloc power dev\n, DRIVER_NAME);
+ status = -ENOMEM;
+ goto err;
+ }
+
+ if (status == 0) {
+ pdev-dev.parent = twl-client-dev;
+ status = platform_device_add_data(pdev, pdata-power,
+ sizeof(*pdata-power));
+ if (status 0) {
+ platform_device_put(pdev);
+ dev_dbg(twl-client-dev,
+ can't add power data, %d\n,
+ status);
+ goto err;
+ }
+ }
+
+ if (status == 0)
+ status = platform_device_add(pdev);
+
+ if (status 0) {
+ platform_device_put(pdev);
+ dev_dbg(twl-client-dev,
+ can't create power dev, %d\n,
+ status);
+ goto err;
+ }
+ }
+
if (twl_has_rtc()) {
twl = twl4030_modules[TWL4030_SLAVENUM_NUM3];
--
1.5.6.3
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