[PATCH 2/5] arm: keystone: remove boilerplate code and use USE_PM_CLK_RUNTIME_OPS
USE_PM_CLK_RUNTIME_OPS is introduced so we don't repeat the same code
to do runtime_suspend and runtime_resume across users of PM clocks.
Use it to remove the boilerplate code.
Signed-off-by: Rajendra Nayak rna...@codeaurora.org
Reviewed-by: Kevin Hilman khil...@linaro.org
Acked-by: Santosh Shilimkar ssant...@kernel.org
Acked-by: Geert Uytterhoeven geert+rene...@glider.be
---
arch/arm/mach-keystone/pm_domain.c | 33 +
1 file changed, 1 insertion(+), 32 deletions(-)
diff --git a/arch/arm/mach-keystone/pm_domain.c
b/arch/arm/mach-keystone/pm_domain.c
index 41bebfd..edea697 100644
--- a/arch/arm/mach-keystone/pm_domain.c
+++ b/arch/arm/mach-keystone/pm_domain.c
@@ -19,40 +19,9 @@
#include linux/clk-provider.h
#include linux/of.h
-#ifdef CONFIG_PM
-static int keystone_pm_runtime_suspend(struct device *dev)
-{
- int ret;
-
- dev_dbg(dev, %s\n, __func__);
-
- ret = pm_generic_runtime_suspend(dev);
- if (ret)
- return ret;
-
- ret = pm_clk_suspend(dev);
- if (ret) {
- pm_generic_runtime_resume(dev);
- return ret;
- }
-
- return 0;
-}
-
-static int keystone_pm_runtime_resume(struct device *dev)
-{
- dev_dbg(dev, %s\n, __func__);
-
- pm_clk_resume(dev);
-
- return pm_generic_runtime_resume(dev);
-}
-#endif
-
static struct dev_pm_domain keystone_pm_domain = {
.ops = {
- SET_RUNTIME_PM_OPS(keystone_pm_runtime_suspend,
- keystone_pm_runtime_resume, NULL)
+ USE_PM_CLK_RUNTIME_OPS
USE_PLATFORM_PM_SLEEP_OPS
},
};
--
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[PATCH 0/5] PM / clock_ops: provide default runtime ops and cleanup users
Most users of PM clocks do the exact same thing in runtime callbacks. Provide default callbacks and cleanup the existing users (keystone/davinci /omap1/sh) Rajendra Nayak (5): PM / clock_ops: Provide default runtime ops to users arm: keystone: remove boilerplate code and use USE_PM_CLK_RUNTIME_OPS arm: omap1: remove boilerplate code and use USE_PM_CLK_RUNTIME_OPS arm: davinci: remove boilerplate code and use USE_PM_CLK_RUNTIME_OPS drivers: sh: remove boilerplate code and use USE_PM_CLK_RUNTIME_OPS arch/arm/mach-davinci/pm_domain.c | 32 +- arch/arm/mach-keystone/pm_domain.c | 33 +- arch/arm/mach-omap1/pm_bus.c | 37 ++ drivers/base/power/clock_ops.c | 38 ++ drivers/sh/pm_runtime.c| 47 ++ include/linux/pm_clock.h | 10 6 files changed, 54 insertions(+), 143 deletions(-) -- QUALCOMM INDIA, on behalf of Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum, hosted by The Linux Foundation -- To unsubscribe from this list: send the line unsubscribe linux-omap in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
[PATCH 3/5] arm: omap1: remove boilerplate code and use USE_PM_CLK_RUNTIME_OPS
USE_PM_CLK_RUNTIME_OPS is introduced so we don't repeat the same code
to do runtime_suspend and runtime_resume across users of PM clocks.
Use it to remove the boilerplate code.
Signed-off-by: Rajendra Nayak rna...@codeaurora.org
Reviewed-by: Kevin Hilman khil...@linaro.org
Acked-by: Santosh Shilimkar ssant...@kernel.org
Acked-by: Geert Uytterhoeven geert+rene...@glider.be
---
arch/arm/mach-omap1/pm_bus.c | 37 ++---
1 file changed, 2 insertions(+), 35 deletions(-)
diff --git a/arch/arm/mach-omap1/pm_bus.c b/arch/arm/mach-omap1/pm_bus.c
index c40e209..667c163 100644
--- a/arch/arm/mach-omap1/pm_bus.c
+++ b/arch/arm/mach-omap1/pm_bus.c
@@ -21,48 +21,15 @@
#include soc.h
-#ifdef CONFIG_PM
-static int omap1_pm_runtime_suspend(struct device *dev)
-{
- int ret;
-
- dev_dbg(dev, %s\n, __func__);
-
- ret = pm_generic_runtime_suspend(dev);
- if (ret)
- return ret;
-
- ret = pm_clk_suspend(dev);
- if (ret) {
- pm_generic_runtime_resume(dev);
- return ret;
- }
-
- return 0;
-}
-
-static int omap1_pm_runtime_resume(struct device *dev)
-{
- dev_dbg(dev, %s\n, __func__);
-
- pm_clk_resume(dev);
- return pm_generic_runtime_resume(dev);
-}
-
static struct dev_pm_domain default_pm_domain = {
.ops = {
- .runtime_suspend = omap1_pm_runtime_suspend,
- .runtime_resume = omap1_pm_runtime_resume,
+ USE_PM_CLK_RUNTIME_OPS
USE_PLATFORM_PM_SLEEP_OPS
},
};
-#define OMAP1_PM_DOMAIN (default_pm_domain)
-#else
-#define OMAP1_PM_DOMAIN NULL
-#endif /* CONFIG_PM */
static struct pm_clk_notifier_block platform_bus_notifier = {
- .pm_domain = OMAP1_PM_DOMAIN,
+ .pm_domain = default_pm_domain,
.con_ids = { ick, fck, NULL, },
};
--
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[PATCH 5/5] drivers: sh: remove boilerplate code and use USE_PM_CLK_RUNTIME_OPS
USE_PM_CLK_RUNTIME_OPS is introduced so we don't repeat the same code
to do runtime_suspend and runtime_resume across users of PM clocks.
Use it to remove the boilerplate code.
Signed-off-by: Rajendra Nayak rna...@codeaurora.org
Reviewed-by: Kevin Hilman khil...@linaro.org
Acked-by: Santosh Shilimkar ssant...@kernel.org
Acked-by: Geert Uytterhoeven geert+rene...@glider.be
---
drivers/sh/pm_runtime.c | 47 ++-
1 file changed, 2 insertions(+), 45 deletions(-)
diff --git a/drivers/sh/pm_runtime.c b/drivers/sh/pm_runtime.c
index cd4c293..e0fd1e0 100644
--- a/drivers/sh/pm_runtime.c
+++ b/drivers/sh/pm_runtime.c
@@ -20,58 +20,15 @@
#include linux/bitmap.h
#include linux/slab.h
-#ifdef CONFIG_PM
-static int sh_pm_runtime_suspend(struct device *dev)
-{
- int ret;
-
- ret = pm_generic_runtime_suspend(dev);
- if (ret) {
- dev_err(dev, failed to suspend device\n);
- return ret;
- }
-
- ret = pm_clk_suspend(dev);
- if (ret) {
- dev_err(dev, failed to suspend clock\n);
- pm_generic_runtime_resume(dev);
- return ret;
- }
-
- return 0;
-}
-
-static int sh_pm_runtime_resume(struct device *dev)
-{
- int ret;
-
- ret = pm_clk_resume(dev);
- if (ret) {
- dev_err(dev, failed to resume clock\n);
- return ret;
- }
-
- return pm_generic_runtime_resume(dev);
-}
-
static struct dev_pm_domain default_pm_domain = {
.ops = {
- .runtime_suspend = sh_pm_runtime_suspend,
- .runtime_resume = sh_pm_runtime_resume,
+ USE_PM_CLK_RUNTIME_OPS
USE_PLATFORM_PM_SLEEP_OPS
},
};
-#define DEFAULT_PM_DOMAIN_PTR (default_pm_domain)
-
-#else
-
-#define DEFAULT_PM_DOMAIN_PTR NULL
-
-#endif /* CONFIG_PM */
-
static struct pm_clk_notifier_block platform_bus_notifier = {
- .pm_domain = DEFAULT_PM_DOMAIN_PTR,
+ .pm_domain = default_pm_domain,
.con_ids = { NULL, },
};
--
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[PATCH 4/5] arm: davinci: remove boilerplate code and use USE_PM_CLK_RUNTIME_OPS
USE_PM_CLK_RUNTIME_OPS is introduced so we don't repeat the same code
to do runtime_suspend and runtime_resume across users of PM clocks.
Use it to remove the boilerplate code.
Signed-off-by: Rajendra Nayak rna...@codeaurora.org
Reviewed-by: Kevin Hilman khil...@linaro.org
Acked-by: Santosh Shilimkar ssant...@kernel.org
Acked-by: Geert Uytterhoeven geert+rene...@glider.be
---
arch/arm/mach-davinci/pm_domain.c | 32 +---
1 file changed, 1 insertion(+), 31 deletions(-)
diff --git a/arch/arm/mach-davinci/pm_domain.c
b/arch/arm/mach-davinci/pm_domain.c
index 641edc3..78eac2c 100644
--- a/arch/arm/mach-davinci/pm_domain.c
+++ b/arch/arm/mach-davinci/pm_domain.c
@@ -14,39 +14,9 @@
#include linux/pm_clock.h
#include linux/platform_device.h
-#ifdef CONFIG_PM
-static int davinci_pm_runtime_suspend(struct device *dev)
-{
- int ret;
-
- dev_dbg(dev, %s\n, __func__);
-
- ret = pm_generic_runtime_suspend(dev);
- if (ret)
- return ret;
-
- ret = pm_clk_suspend(dev);
- if (ret) {
- pm_generic_runtime_resume(dev);
- return ret;
- }
-
- return 0;
-}
-
-static int davinci_pm_runtime_resume(struct device *dev)
-{
- dev_dbg(dev, %s\n, __func__);
-
- pm_clk_resume(dev);
- return pm_generic_runtime_resume(dev);
-}
-#endif
-
static struct dev_pm_domain davinci_pm_domain = {
.ops = {
- SET_RUNTIME_PM_OPS(davinci_pm_runtime_suspend,
- davinci_pm_runtime_resume, NULL)
+ USE_PM_CLK_RUNTIME_OPS
USE_PLATFORM_PM_SLEEP_OPS
},
};
--
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[PATCH 1/5] PM / clock_ops: Provide default runtime ops to users
Most users of PM clocks do the extact same things in the runtime
suspend/resume callbacks. Provide them USE_PM_CLK_RUNTIME_OPS so
as to avoid/remove boilerplate code.
Signed-off-by: Rajendra Nayak rna...@codeaurora.org
Reviewed-by: Kevin Hilman khil...@linaro.org
Acked-by: Santosh Shilimkar ssant...@kernel.org
Acked-by: Geert Uytterhoeven geert+rene...@glider.be
---
drivers/base/power/clock_ops.c | 38 ++
include/linux/pm_clock.h | 10 ++
2 files changed, 48 insertions(+)
diff --git a/drivers/base/power/clock_ops.c b/drivers/base/power/clock_ops.c
index 7fdd017..8abea66 100644
--- a/drivers/base/power/clock_ops.c
+++ b/drivers/base/power/clock_ops.c
@@ -15,6 +15,7 @@
#include linux/clkdev.h
#include linux/slab.h
#include linux/err.h
+#include linux/pm_runtime.h
#ifdef CONFIG_PM
@@ -367,6 +368,43 @@ static int pm_clk_notify(struct notifier_block *nb,
return 0;
}
+int pm_clk_runtime_suspend(struct device *dev)
+{
+ int ret;
+
+ dev_dbg(dev, %s\n, __func__);
+
+ ret = pm_generic_runtime_suspend(dev);
+ if (ret) {
+ dev_err(dev, failed to suspend device\n);
+ return ret;
+ }
+
+ ret = pm_clk_suspend(dev);
+ if (ret) {
+ dev_err(dev, failed to suspend clock\n);
+ pm_generic_runtime_resume(dev);
+ return ret;
+ }
+
+ return 0;
+}
+
+int pm_clk_runtime_resume(struct device *dev)
+{
+ int ret;
+
+ dev_dbg(dev, %s\n, __func__);
+
+ ret = pm_clk_resume(dev);
+ if (ret) {
+ dev_err(dev, failed to resume clock\n);
+ return ret;
+ }
+
+ return pm_generic_runtime_resume(dev);
+}
+
#else /* !CONFIG_PM */
/**
diff --git a/include/linux/pm_clock.h b/include/linux/pm_clock.h
index 0b00396..25266c6 100644
--- a/include/linux/pm_clock.h
+++ b/include/linux/pm_clock.h
@@ -20,6 +20,16 @@ struct pm_clk_notifier_block {
struct clk;
+#ifdef CONFIG_PM
+extern int pm_clk_runtime_suspend(struct device *dev);
+extern int pm_clk_runtime_resume(struct device *dev);
+#define USE_PM_CLK_RUNTIME_OPS \
+ .runtime_suspend = pm_clk_runtime_suspend, \
+ .runtime_resume = pm_clk_runtime_resume,
+#else
+#define USE_PM_CLK_RUNTIME_OPS
+#endif
+
#ifdef CONFIG_PM_CLK
static inline bool pm_clk_no_clocks(struct device *dev)
{
--
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Re: [RFC 0/5] PM / clock_ops: provide default runtime ops and cleanup users
On Tue, Apr 21, 2015 at 1:25 AM, santosh shilimkar
santosh.shilim...@oracle.com wrote:
On 4/20/2015 4:21 PM, Kevin Hilman wrote:
Rajendra Nayak rna...@codeaurora.org writes:
Most users of PM clocks do the exact same thing in runtime callbacks.
Probably because they were all copied from mach-davinci. ;)
Yep. ;-)
If you're interested in the history, I did some digging last year:
http://lists.infradead.org/pipermail/linux-arm-kernel/2014-March/242352.html
Provide default callbacks and cleanup the existing users
(keystone/davinci/omap1/sh)
Very nice cleanup, Thanks!
Note that the new code always has a dev_pm_domain, while the old code had
it
conditionally on CONFIG_PM.
Right, but since USE_PM_CLK_RUNTIME_OPS is actually a nop with
!CONFIG_PM, we don't really need the checks anymore.
I don't think that matters much, as we seem to be having more and more
systems that rely on CONFIG_PM=y...
For the series:
Reviewed-by: Kevin Hilman khil...@linaro.org
Acked-by: Santosh Shilimkar ssant...@kernel.org
Looks good to me, and works fine on (pre-Clock Domain) r8a7791/koelsch
and r8a7740/armadillo-legacy (with PM Domains, but still relying on the
drivers/sh/pm_runtime.c hack for devices in the C5 always on domain).
This code is no longer used in multiplatform kernels on shmobile boards
with real PM Domains.
Acked-by: Geert Uytterhoeven geert+rene...@glider.be
Thanks,
Rajendra
Gr{oetje,eeting}s,
Geert
--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 --
ge...@linux-m68k.org
In personal conversations with technical people, I call myself a hacker.
But
when I'm talking to journalists I just say programmer or something like
that.
-- Linus Torvalds
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[RFC 0/5] PM / clock_ops: provide default runtime ops and cleanup users
Most users of PM clocks do the exact same thing in runtime callbacks. Provide default callbacks and cleanup the existing users (keystone/davinci/omap1/sh) Rajendra Nayak (5): PM / clock_ops: Provide default runtime ops to users arm: keystone: remove boilerplate code and use USE_PM_CLK_RUNTIME_OPS arm: omap1: remove boilerplate code and use USE_PM_CLK_RUNTIME_OPS arm: davinci: remove boilerplate code and use USE_PM_CLK_RUNTIME_OPS drivers: sh: remove boilerplate code and use USE_PM_CLK_RUNTIME_OPS arch/arm/mach-davinci/pm_domain.c | 32 +- arch/arm/mach-keystone/pm_domain.c | 33 +- arch/arm/mach-omap1/pm_bus.c | 37 ++ drivers/base/power/clock_ops.c | 38 ++ drivers/sh/pm_runtime.c| 47 ++ include/linux/pm_clock.h | 10 6 files changed, 54 insertions(+), 143 deletions(-) -- QUALCOMM INDIA, on behalf of Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum, hosted by The Linux Foundation -- To unsubscribe from this list: send the line unsubscribe linux-omap in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
[RFC 1/5] PM / clock_ops: Provide default runtime ops to users
Most users of PM clocks do the extact same things in the runtime
suspend/resume callbacks. Provide them USE_PM_CLK_RUNTIME_OPS so
as to avoid/remove boilerplate code.
Signed-off-by: Rajendra Nayak rna...@codeaurora.org
---
drivers/base/power/clock_ops.c | 38 ++
include/linux/pm_clock.h | 10 ++
2 files changed, 48 insertions(+)
diff --git a/drivers/base/power/clock_ops.c b/drivers/base/power/clock_ops.c
index 7fdd017..8abea66 100644
--- a/drivers/base/power/clock_ops.c
+++ b/drivers/base/power/clock_ops.c
@@ -15,6 +15,7 @@
#include linux/clkdev.h
#include linux/slab.h
#include linux/err.h
+#include linux/pm_runtime.h
#ifdef CONFIG_PM
@@ -367,6 +368,43 @@ static int pm_clk_notify(struct notifier_block *nb,
return 0;
}
+int pm_clk_runtime_suspend(struct device *dev)
+{
+ int ret;
+
+ dev_dbg(dev, %s\n, __func__);
+
+ ret = pm_generic_runtime_suspend(dev);
+ if (ret) {
+ dev_err(dev, failed to suspend device\n);
+ return ret;
+ }
+
+ ret = pm_clk_suspend(dev);
+ if (ret) {
+ dev_err(dev, failed to suspend clock\n);
+ pm_generic_runtime_resume(dev);
+ return ret;
+ }
+
+ return 0;
+}
+
+int pm_clk_runtime_resume(struct device *dev)
+{
+ int ret;
+
+ dev_dbg(dev, %s\n, __func__);
+
+ ret = pm_clk_resume(dev);
+ if (ret) {
+ dev_err(dev, failed to resume clock\n);
+ return ret;
+ }
+
+ return pm_generic_runtime_resume(dev);
+}
+
#else /* !CONFIG_PM */
/**
diff --git a/include/linux/pm_clock.h b/include/linux/pm_clock.h
index 0b00396..25266c6 100644
--- a/include/linux/pm_clock.h
+++ b/include/linux/pm_clock.h
@@ -20,6 +20,16 @@ struct pm_clk_notifier_block {
struct clk;
+#ifdef CONFIG_PM
+extern int pm_clk_runtime_suspend(struct device *dev);
+extern int pm_clk_runtime_resume(struct device *dev);
+#define USE_PM_CLK_RUNTIME_OPS \
+ .runtime_suspend = pm_clk_runtime_suspend, \
+ .runtime_resume = pm_clk_runtime_resume,
+#else
+#define USE_PM_CLK_RUNTIME_OPS
+#endif
+
#ifdef CONFIG_PM_CLK
static inline bool pm_clk_no_clocks(struct device *dev)
{
--
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[RFC 2/5] arm: keystone: remove boilerplate code and use USE_PM_CLK_RUNTIME_OPS
USE_PM_CLK_RUNTIME_OPS is introduced so we don't repeat the same code
to do runtime_suspend and runtime_resume across users of PM clocks.
Use it to remove the boilerplate code.
Signed-off-by: Rajendra Nayak rna...@codeaurora.org
---
arch/arm/mach-keystone/pm_domain.c | 33 +
1 file changed, 1 insertion(+), 32 deletions(-)
diff --git a/arch/arm/mach-keystone/pm_domain.c
b/arch/arm/mach-keystone/pm_domain.c
index 41bebfd..edea697 100644
--- a/arch/arm/mach-keystone/pm_domain.c
+++ b/arch/arm/mach-keystone/pm_domain.c
@@ -19,40 +19,9 @@
#include linux/clk-provider.h
#include linux/of.h
-#ifdef CONFIG_PM
-static int keystone_pm_runtime_suspend(struct device *dev)
-{
- int ret;
-
- dev_dbg(dev, %s\n, __func__);
-
- ret = pm_generic_runtime_suspend(dev);
- if (ret)
- return ret;
-
- ret = pm_clk_suspend(dev);
- if (ret) {
- pm_generic_runtime_resume(dev);
- return ret;
- }
-
- return 0;
-}
-
-static int keystone_pm_runtime_resume(struct device *dev)
-{
- dev_dbg(dev, %s\n, __func__);
-
- pm_clk_resume(dev);
-
- return pm_generic_runtime_resume(dev);
-}
-#endif
-
static struct dev_pm_domain keystone_pm_domain = {
.ops = {
- SET_RUNTIME_PM_OPS(keystone_pm_runtime_suspend,
- keystone_pm_runtime_resume, NULL)
+ USE_PM_CLK_RUNTIME_OPS
USE_PLATFORM_PM_SLEEP_OPS
},
};
--
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[RFC 5/5] drivers: sh: remove boilerplate code and use USE_PM_CLK_RUNTIME_OPS
USE_PM_CLK_RUNTIME_OPS is introduced so we don't repeat the same code
to do runtime_suspend and runtime_resume across users of PM clocks.
Use it to remove the boilerplate code.
Signed-off-by: Rajendra Nayak rna...@codeaurora.org
---
drivers/sh/pm_runtime.c | 47 ++-
1 file changed, 2 insertions(+), 45 deletions(-)
diff --git a/drivers/sh/pm_runtime.c b/drivers/sh/pm_runtime.c
index cd4c293..e0fd1e0 100644
--- a/drivers/sh/pm_runtime.c
+++ b/drivers/sh/pm_runtime.c
@@ -20,58 +20,15 @@
#include linux/bitmap.h
#include linux/slab.h
-#ifdef CONFIG_PM
-static int sh_pm_runtime_suspend(struct device *dev)
-{
- int ret;
-
- ret = pm_generic_runtime_suspend(dev);
- if (ret) {
- dev_err(dev, failed to suspend device\n);
- return ret;
- }
-
- ret = pm_clk_suspend(dev);
- if (ret) {
- dev_err(dev, failed to suspend clock\n);
- pm_generic_runtime_resume(dev);
- return ret;
- }
-
- return 0;
-}
-
-static int sh_pm_runtime_resume(struct device *dev)
-{
- int ret;
-
- ret = pm_clk_resume(dev);
- if (ret) {
- dev_err(dev, failed to resume clock\n);
- return ret;
- }
-
- return pm_generic_runtime_resume(dev);
-}
-
static struct dev_pm_domain default_pm_domain = {
.ops = {
- .runtime_suspend = sh_pm_runtime_suspend,
- .runtime_resume = sh_pm_runtime_resume,
+ USE_PM_CLK_RUNTIME_OPS
USE_PLATFORM_PM_SLEEP_OPS
},
};
-#define DEFAULT_PM_DOMAIN_PTR (default_pm_domain)
-
-#else
-
-#define DEFAULT_PM_DOMAIN_PTR NULL
-
-#endif /* CONFIG_PM */
-
static struct pm_clk_notifier_block platform_bus_notifier = {
- .pm_domain = DEFAULT_PM_DOMAIN_PTR,
+ .pm_domain = default_pm_domain,
.con_ids = { NULL, },
};
--
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[RFC 3/5] arm: omap1: remove boilerplate code and use USE_PM_CLK_RUNTIME_OPS
USE_PM_CLK_RUNTIME_OPS is introduced so we don't repeat the same code
to do runtime_suspend and runtime_resume across users of PM clocks.
Use it to remove the boilerplate code.
Signed-off-by: Rajendra Nayak rna...@codeaurora.org
---
arch/arm/mach-omap1/pm_bus.c | 37 ++---
1 file changed, 2 insertions(+), 35 deletions(-)
diff --git a/arch/arm/mach-omap1/pm_bus.c b/arch/arm/mach-omap1/pm_bus.c
index c40e209..667c163 100644
--- a/arch/arm/mach-omap1/pm_bus.c
+++ b/arch/arm/mach-omap1/pm_bus.c
@@ -21,48 +21,15 @@
#include soc.h
-#ifdef CONFIG_PM
-static int omap1_pm_runtime_suspend(struct device *dev)
-{
- int ret;
-
- dev_dbg(dev, %s\n, __func__);
-
- ret = pm_generic_runtime_suspend(dev);
- if (ret)
- return ret;
-
- ret = pm_clk_suspend(dev);
- if (ret) {
- pm_generic_runtime_resume(dev);
- return ret;
- }
-
- return 0;
-}
-
-static int omap1_pm_runtime_resume(struct device *dev)
-{
- dev_dbg(dev, %s\n, __func__);
-
- pm_clk_resume(dev);
- return pm_generic_runtime_resume(dev);
-}
-
static struct dev_pm_domain default_pm_domain = {
.ops = {
- .runtime_suspend = omap1_pm_runtime_suspend,
- .runtime_resume = omap1_pm_runtime_resume,
+ USE_PM_CLK_RUNTIME_OPS
USE_PLATFORM_PM_SLEEP_OPS
},
};
-#define OMAP1_PM_DOMAIN (default_pm_domain)
-#else
-#define OMAP1_PM_DOMAIN NULL
-#endif /* CONFIG_PM */
static struct pm_clk_notifier_block platform_bus_notifier = {
- .pm_domain = OMAP1_PM_DOMAIN,
+ .pm_domain = default_pm_domain,
.con_ids = { ick, fck, NULL, },
};
--
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[RFC 4/5] arm: davinci: remove boilerplate code and use USE_PM_CLK_RUNTIME_OPS
USE_PM_CLK_RUNTIME_OPS is introduced so we don't repeat the same code
to do runtime_suspend and runtime_resume across users of PM clocks.
Use it to remove the boilerplate code.
Signed-off-by: Rajendra Nayak rna...@codeaurora.org
---
arch/arm/mach-davinci/pm_domain.c | 32 +---
1 file changed, 1 insertion(+), 31 deletions(-)
diff --git a/arch/arm/mach-davinci/pm_domain.c
b/arch/arm/mach-davinci/pm_domain.c
index 641edc3..78eac2c 100644
--- a/arch/arm/mach-davinci/pm_domain.c
+++ b/arch/arm/mach-davinci/pm_domain.c
@@ -14,39 +14,9 @@
#include linux/pm_clock.h
#include linux/platform_device.h
-#ifdef CONFIG_PM
-static int davinci_pm_runtime_suspend(struct device *dev)
-{
- int ret;
-
- dev_dbg(dev, %s\n, __func__);
-
- ret = pm_generic_runtime_suspend(dev);
- if (ret)
- return ret;
-
- ret = pm_clk_suspend(dev);
- if (ret) {
- pm_generic_runtime_resume(dev);
- return ret;
- }
-
- return 0;
-}
-
-static int davinci_pm_runtime_resume(struct device *dev)
-{
- dev_dbg(dev, %s\n, __func__);
-
- pm_clk_resume(dev);
- return pm_generic_runtime_resume(dev);
-}
-#endif
-
static struct dev_pm_domain davinci_pm_domain = {
.ops = {
- SET_RUNTIME_PM_OPS(davinci_pm_runtime_suspend,
- davinci_pm_runtime_resume, NULL)
+ USE_PM_CLK_RUNTIME_OPS
USE_PLATFORM_PM_SLEEP_OPS
},
};
--
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Re: [PATCH v2] arm: dra7xx: Add hwmod data for pcie1 and pcie2 subsystems
On Wednesday 09 July 2014 02:32 PM, Kishon Vijay Abraham I wrote:
Added hwmod data for pcie1 and pcie2 subsystem present in DRA7xx SOC.
Cc: Tony Lindgren t...@atomide.com
Cc: Russell King li...@arm.linux.org.uk
Cc: Paul Walmsley p...@pwsan.com
Signed-off-by: Kishon Vijay Abraham I kis...@ti.com
Tested-by: Kishon Vijay Abraham I kis...@ti.com
---
Changes from v1:
* changed the clock domain to pcie_clkdm
* Added PCIe as a slave port for l3_main.
Looks good to me,
Reviewed-by: Rajendra Nayak rna...@ti.com
Boot log for dra7xx can be found at http://paste.ubuntu.com/7769402/
arch/arm/mach-omap2/omap_hwmod_7xx_data.c | 73
+
1 file changed, 73 insertions(+)
diff --git a/arch/arm/mach-omap2/omap_hwmod_7xx_data.c
b/arch/arm/mach-omap2/omap_hwmod_7xx_data.c
index 6ff40a6..2f37ca8 100644
--- a/arch/arm/mach-omap2/omap_hwmod_7xx_data.c
+++ b/arch/arm/mach-omap2/omap_hwmod_7xx_data.c
@@ -1290,6 +1290,43 @@ static struct omap_hwmod dra7xx_ocp2scp3_hwmod = {
};
/*
+ * 'PCIE' class
+ *
+ */
+
+static struct omap_hwmod_class dra7xx_pcie_hwmod_class = {
+ .name = pcie,
+};
+
+/* pcie1 */
+static struct omap_hwmod dra7xx_pcie1_hwmod = {
+ .name = pcie1,
+ .class = dra7xx_pcie_hwmod_class,
+ .clkdm_name = pcie_clkdm,
+ .main_clk = l4_root_clk_div,
+ .prcm = {
+ .omap4 = {
+ .clkctrl_offs = DRA7XX_CM_PCIE_CLKSTCTRL_OFFSET,
+ .modulemode = MODULEMODE_SWCTRL,
+ },
+ },
+};
+
+/* pcie2 */
+static struct omap_hwmod dra7xx_pcie2_hwmod = {
+ .name = pcie2,
+ .class = dra7xx_pcie_hwmod_class,
+ .clkdm_name = pcie_clkdm,
+ .main_clk = l4_root_clk_div,
+ .prcm = {
+ .omap4 = {
+ .clkctrl_offs = DRA7XX_CM_PCIE_CLKSTCTRL_OFFSET,
+ .modulemode = MODULEMODE_SWCTRL,
+ },
+ },
+};
+
+/*
* 'PCIE PHY' class
*
*/
@@ -2448,6 +2485,38 @@ static struct omap_hwmod_ocp_if
dra7xx_l4_cfg__ocp2scp1 = {
.user = OCP_USER_MPU | OCP_USER_SDMA,
};
+/* l3_main_1 - pcie1 */
+static struct omap_hwmod_ocp_if dra7xx_l3_main_1__pcie1 = {
+ .master = dra7xx_l3_main_1_hwmod,
+ .slave = dra7xx_pcie1_hwmod,
+ .clk= l3_iclk_div,
+ .user = OCP_USER_MPU | OCP_USER_SDMA,
+};
+
+/* l4_cfg - pcie1 */
+static struct omap_hwmod_ocp_if dra7xx_l4_cfg__pcie1 = {
+ .master = dra7xx_l4_cfg_hwmod,
+ .slave = dra7xx_pcie1_hwmod,
+ .clk= l4_root_clk_div,
+ .user = OCP_USER_MPU | OCP_USER_SDMA,
+};
+
+/* l3_main_1 - pcie2 */
+static struct omap_hwmod_ocp_if dra7xx_l3_main_1__pcie2 = {
+ .master = dra7xx_l3_main_1_hwmod,
+ .slave = dra7xx_pcie2_hwmod,
+ .clk= l3_iclk_div,
+ .user = OCP_USER_MPU | OCP_USER_SDMA,
+};
+
+/* l4_cfg - pcie2 */
+static struct omap_hwmod_ocp_if dra7xx_l4_cfg__pcie2 = {
+ .master = dra7xx_l4_cfg_hwmod,
+ .slave = dra7xx_pcie2_hwmod,
+ .clk= l4_root_clk_div,
+ .user = OCP_USER_MPU | OCP_USER_SDMA,
+};
+
/* l4_cfg - pcie1 phy */
static struct omap_hwmod_ocp_if dra7xx_l4_cfg__pcie1_phy = {
.master = dra7xx_l4_cfg_hwmod,
@@ -2813,6 +2882,10 @@ static struct omap_hwmod_ocp_if
*dra7xx_hwmod_ocp_ifs[] __initdata = {
dra7xx_l4_cfg__mpu,
dra7xx_l4_cfg__ocp2scp1,
dra7xx_l4_cfg__ocp2scp3,
+ dra7xx_l3_main_1__pcie1,
+ dra7xx_l4_cfg__pcie1,
+ dra7xx_l3_main_1__pcie2,
+ dra7xx_l4_cfg__pcie2,
dra7xx_l4_cfg__pcie1_phy,
dra7xx_l4_cfg__pcie2_phy,
dra7xx_l3_main_1__qspi,
--
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Re: [PATCH 1/2] arm: dra7xx: Add hwmod data for pcie1 phy and pcie2 phy
On Wednesday 25 June 2014 11:32 PM, Kishon Vijay Abraham I wrote:
Added hwmod data for pcie1 and pcie2 phy present in DRA7xx SOC.
Also added the missing CLKCTRL OFFSET macro and CONTEXT OFFSET macro
for pcie1 phy and pcie2 phy.
Cc: Tony Lindgren t...@atomide.com
Cc: Russell King li...@arm.linux.org.uk
Cc: Paul Walmsley p...@pwsan.com
Signed-off-by: Kishon Vijay Abraham I kis...@ti.com
Tested-by: Kishon Vijay Abraham I kis...@ti.com
Looks good to me, feel free to add
Reviewed-by: Rajendra Nayak rna...@ti.com
---
Please find the bootlog with these hwmod patches
http://paste.ubuntu.com/7701601/
arch/arm/mach-omap2/cm2_7xx.h |4 ++
arch/arm/mach-omap2/omap_hwmod_7xx_data.c | 57
+
arch/arm/mach-omap2/prm7xx.h |4 ++
3 files changed, 65 insertions(+)
diff --git a/arch/arm/mach-omap2/cm2_7xx.h b/arch/arm/mach-omap2/cm2_7xx.h
index 9ad7594..e966e3a 100644
--- a/arch/arm/mach-omap2/cm2_7xx.h
+++ b/arch/arm/mach-omap2/cm2_7xx.h
@@ -357,6 +357,10 @@
#define DRA7XX_CM_L3INIT_SATA_CLKCTRL
DRA7XX_CM_CORE_REGADDR(DRA7XX_CM_CORE_L3INIT_INST, 0x0088)
#define DRA7XX_CM_PCIE_CLKSTCTRL_OFFSET 0x00a0
#define DRA7XX_CM_PCIE_STATICDEP_OFFSET 0x00a4
+#define DRA7XX_CM_L3INIT_PCIESS1_CLKCTRL_OFFSET 0x00b0
+#define DRA7XX_CM_L3INIT_PCIESS1_CLKCTRL
DRA7XX_CM_CORE_REGADDR(DRA7XX_CM_CORE_L3INIT_INST, 0x00b0)
+#define DRA7XX_CM_L3INIT_PCIESS2_CLKCTRL_OFFSET 0x00b8
+#define DRA7XX_CM_L3INIT_PCIESS2_CLKCTRL
DRA7XX_CM_CORE_REGADDR(DRA7XX_CM_CORE_L3INIT_INST, 0x00b8)
#define DRA7XX_CM_GMAC_CLKSTCTRL_OFFSET 0x00c0
#define DRA7XX_CM_GMAC_STATICDEP_OFFSET 0x00c4
#define DRA7XX_CM_GMAC_DYNAMICDEP_OFFSET 0x00c8
diff --git a/arch/arm/mach-omap2/omap_hwmod_7xx_data.c
b/arch/arm/mach-omap2/omap_hwmod_7xx_data.c
index 3deb76e..6ff40a6 100644
--- a/arch/arm/mach-omap2/omap_hwmod_7xx_data.c
+++ b/arch/arm/mach-omap2/omap_hwmod_7xx_data.c
@@ -1290,6 +1290,45 @@ static struct omap_hwmod dra7xx_ocp2scp3_hwmod = {
};
/*
+ * 'PCIE PHY' class
+ *
+ */
+
+static struct omap_hwmod_class dra7xx_pcie_phy_hwmod_class = {
+ .name = pcie-phy,
+};
+
+/* pcie1 phy */
+static struct omap_hwmod dra7xx_pcie1_phy_hwmod = {
+ .name = pcie1-phy,
+ .class = dra7xx_pcie_phy_hwmod_class,
+ .clkdm_name = l3init_clkdm,
+ .main_clk = l4_root_clk_div,
+ .prcm = {
+ .omap4 = {
+ .clkctrl_offs = DRA7XX_CM_L3INIT_PCIESS1_CLKCTRL_OFFSET,
+ .context_offs = DRA7XX_RM_L3INIT_PCIESS1_CONTEXT_OFFSET,
+ .modulemode = MODULEMODE_SWCTRL,
+ },
+ },
+};
+
+/* pcie2 phy */
+static struct omap_hwmod dra7xx_pcie2_phy_hwmod = {
+ .name = pcie2-phy,
+ .class = dra7xx_pcie_phy_hwmod_class,
+ .clkdm_name = l3init_clkdm,
+ .main_clk = l4_root_clk_div,
+ .prcm = {
+ .omap4 = {
+ .clkctrl_offs = DRA7XX_CM_L3INIT_PCIESS2_CLKCTRL_OFFSET,
+ .context_offs = DRA7XX_RM_L3INIT_PCIESS2_CONTEXT_OFFSET,
+ .modulemode = MODULEMODE_SWCTRL,
+ },
+ },
+};
+
+/*
* 'qspi' class
*
*/
@@ -2409,6 +2448,22 @@ static struct omap_hwmod_ocp_if
dra7xx_l4_cfg__ocp2scp1 = {
.user = OCP_USER_MPU | OCP_USER_SDMA,
};
+/* l4_cfg - pcie1 phy */
+static struct omap_hwmod_ocp_if dra7xx_l4_cfg__pcie1_phy = {
+ .master = dra7xx_l4_cfg_hwmod,
+ .slave = dra7xx_pcie1_phy_hwmod,
+ .clk= l4_root_clk_div,
+ .user = OCP_USER_MPU | OCP_USER_SDMA,
+};
+
+/* l4_cfg - pcie2 phy */
+static struct omap_hwmod_ocp_if dra7xx_l4_cfg__pcie2_phy = {
+ .master = dra7xx_l4_cfg_hwmod,
+ .slave = dra7xx_pcie2_phy_hwmod,
+ .clk= l4_root_clk_div,
+ .user = OCP_USER_MPU | OCP_USER_SDMA,
+};
+
static struct omap_hwmod_addr_space dra7xx_qspi_addrs[] = {
{
.pa_start = 0x4b30,
@@ -2758,6 +2813,8 @@ static struct omap_hwmod_ocp_if *dra7xx_hwmod_ocp_ifs[]
__initdata = {
dra7xx_l4_cfg__mpu,
dra7xx_l4_cfg__ocp2scp1,
dra7xx_l4_cfg__ocp2scp3,
+ dra7xx_l4_cfg__pcie1_phy,
+ dra7xx_l4_cfg__pcie2_phy,
dra7xx_l3_main_1__qspi,
dra7xx_l4_cfg__sata,
dra7xx_l4_cfg__smartreflex_core,
diff --git a/arch/arm/mach-omap2/prm7xx.h b/arch/arm/mach-omap2/prm7xx.h
index d92a840..4bb50fbf 100644
--- a/arch/arm/mach-omap2/prm7xx.h
+++ b/arch/arm/mach-omap2/prm7xx.h
@@ -374,6 +374,10 @@
#define DRA7XX_RM_L3INIT_IEEE1500_2_OCP_CONTEXT_OFFSET
Re: [PATCH 2/2] arm: dra7xx: Add hwmod data for pcie1 and pcie2 subsystems
On Wednesday 25 June 2014 11:32 PM, Kishon Vijay Abraham I wrote:
Added hwmod data for pcie1 and pcie2 subsystem present in DRA7xx SOC.
Cc: Tony Lindgren t...@atomide.com
Cc: Russell King li...@arm.linux.org.uk
Cc: Paul Walmsley p...@pwsan.com
Signed-off-by: Kishon Vijay Abraham I kis...@ti.com
Tested-by: Kishon Vijay Abraham I kis...@ti.com
---
Please find the bootlog with these hwmod patches
http://paste.ubuntu.com/7701601/
arch/arm/mach-omap2/omap_hwmod_7xx_data.c | 55
+
1 file changed, 55 insertions(+)
diff --git a/arch/arm/mach-omap2/omap_hwmod_7xx_data.c
b/arch/arm/mach-omap2/omap_hwmod_7xx_data.c
index 6ff40a6..934aa9d 100644
--- a/arch/arm/mach-omap2/omap_hwmod_7xx_data.c
+++ b/arch/arm/mach-omap2/omap_hwmod_7xx_data.c
@@ -1290,6 +1290,43 @@ static struct omap_hwmod dra7xx_ocp2scp3_hwmod = {
};
/*
+ * 'PCIE' class
+ *
+ */
+
+static struct omap_hwmod_class dra7xx_pcie_hwmod_class = {
+ .name = pcie,
+};
+
+/* pcie1 */
+static struct omap_hwmod dra7xx_pcie1_hwmod = {
+ .name = pcie1,
+ .class = dra7xx_pcie_hwmod_class,
+ .clkdm_name = l3init_clkdm,
The TRM tells me it belongs to 'pcie_clkdm' instead. Can you please recheck?
+ .main_clk = l4_root_clk_div,
+ .prcm = {
+ .omap4 = {
+ .clkctrl_offs = DRA7XX_CM_PCIE_CLKSTCTRL_OFFSET,
+ .modulemode = MODULEMODE_SWCTRL,
+ },
+ },
+};
+
+/* pcie2 */
+static struct omap_hwmod dra7xx_pcie2_hwmod = {
+ .name = pcie2,
+ .class = dra7xx_pcie_hwmod_class,
+ .clkdm_name = l3init_clkdm,
+ .main_clk = l4_root_clk_div,
+ .prcm = {
+ .omap4 = {
+ .clkctrl_offs = DRA7XX_CM_PCIE_CLKSTCTRL_OFFSET,
+ .modulemode = MODULEMODE_SWCTRL,
+ },
+ },
+};
+
+/*
* 'PCIE PHY' class
*
*/
@@ -2448,6 +2485,22 @@ static struct omap_hwmod_ocp_if
dra7xx_l4_cfg__ocp2scp1 = {
.user = OCP_USER_MPU | OCP_USER_SDMA,
};
+/* l4_cfg - pcie1 */
There seems to be a slave port on l3_init as well which seems to be missing?
Refer to 'Figure 24-157. PCIe Controllers Integration' of TRM version P.
regards,
Rajendra
+static struct omap_hwmod_ocp_if dra7xx_l4_cfg__pcie1 = {
+ .master = dra7xx_l4_cfg_hwmod,
+ .slave = dra7xx_pcie1_hwmod,
+ .clk= l4_root_clk_div,
+ .user = OCP_USER_MPU | OCP_USER_SDMA,
+};
+
+/* l4_cfg - pcie2 */
+static struct omap_hwmod_ocp_if dra7xx_l4_cfg__pcie2 = {
+ .master = dra7xx_l4_cfg_hwmod,
+ .slave = dra7xx_pcie2_hwmod,
+ .clk= l4_root_clk_div,
+ .user = OCP_USER_MPU | OCP_USER_SDMA,
+};
+
/* l4_cfg - pcie1 phy */
static struct omap_hwmod_ocp_if dra7xx_l4_cfg__pcie1_phy = {
.master = dra7xx_l4_cfg_hwmod,
@@ -2813,6 +2866,8 @@ static struct omap_hwmod_ocp_if *dra7xx_hwmod_ocp_ifs[]
__initdata = {
dra7xx_l4_cfg__mpu,
dra7xx_l4_cfg__ocp2scp1,
dra7xx_l4_cfg__ocp2scp3,
+ dra7xx_l4_cfg__pcie1,
+ dra7xx_l4_cfg__pcie2,
dra7xx_l4_cfg__pcie1_phy,
dra7xx_l4_cfg__pcie2_phy,
dra7xx_l3_main_1__qspi,
--
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Re: [PATCH v2 1/2] ARM: DRA7: hwmod: Add OCP2SCP3 module
On Thursday 19 June 2014 01:20 AM, Roger Quadros wrote:
This module is needed for the SATA and PCIe PHYs.
Signed-off-by: Roger Quadros rog...@ti.com
Tested-by: Roger Quadros rog...@ti.com
Reviewed-by: Rajendra Nayak rna...@ti.com
---
v2:
- added .main_clk to hwmod.
- moved interface structure to the right place.
arch/arm/mach-omap2/omap_hwmod_7xx_data.c | 24
1 file changed, 24 insertions(+)
diff --git a/arch/arm/mach-omap2/omap_hwmod_7xx_data.c
b/arch/arm/mach-omap2/omap_hwmod_7xx_data.c
index 20b4398..c9daee4 100644
--- a/arch/arm/mach-omap2/omap_hwmod_7xx_data.c
+++ b/arch/arm/mach-omap2/omap_hwmod_7xx_data.c
@@ -1215,6 +1215,21 @@ static struct omap_hwmod dra7xx_ocp2scp1_hwmod = {
},
};
+/* ocp2scp3 */
+static struct omap_hwmod dra7xx_ocp2scp3_hwmod = {
+ .name = ocp2scp3,
+ .class = dra7xx_ocp2scp_hwmod_class,
+ .clkdm_name = l3init_clkdm,
+ .main_clk = l4_root_clk_div,
+ .prcm = {
+ .omap4 = {
+ .clkctrl_offs =
DRA7XX_CM_L3INIT_OCP2SCP3_CLKCTRL_OFFSET,
+ .context_offs =
DRA7XX_RM_L3INIT_OCP2SCP3_CONTEXT_OFFSET,
+ .modulemode = MODULEMODE_HWCTRL,
+ },
+ },
+};
+
/*
* 'qspi' class
*
@@ -2326,6 +2341,14 @@ static struct omap_hwmod_ocp_if
dra7xx_l4_cfg__ocp2scp1 = {
.user = OCP_USER_MPU | OCP_USER_SDMA,
};
+/* l4_cfg - ocp2scp3 */
+static struct omap_hwmod_ocp_if dra7xx_l4_cfg__ocp2scp3 = {
+ .master = dra7xx_l4_cfg_hwmod,
+ .slave = dra7xx_ocp2scp3_hwmod,
+ .clk= l4_root_clk_div,
+ .user = OCP_USER_MPU | OCP_USER_SDMA,
+};
+
static struct omap_hwmod_addr_space dra7xx_qspi_addrs[] = {
{
.pa_start = 0x4b30,
@@ -2672,6 +2695,7 @@ static struct omap_hwmod_ocp_if *dra7xx_hwmod_ocp_ifs[]
__initdata = {
dra7xx_l4_per1__mmc4,
dra7xx_l4_cfg__mpu,
dra7xx_l4_cfg__ocp2scp1,
+ dra7xx_l4_cfg__ocp2scp3,
dra7xx_l3_main_1__qspi,
dra7xx_l4_cfg__sata,
dra7xx_l4_cfg__smartreflex_core,
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Re: [PATCH 2/2] ARM: DRA7: hwmod: Fixup SATA hwmod
On Wednesday 18 June 2014 05:46 PM, Roger Quadros wrote:
Get rid of optional clock as that is now managed by the
AHCI platform driver.
The optional clock info in hwmod is actually unused for a lot of
other modules too.
http://www.spinics.net/lists/arm-kernel/msg333025.html
Correct .mpu_rt_idx to 1 as the module register space (SYSCONFIG..)
is passed as the second memory resource in the device tree.
Signed-off-by: Roger Quadros rog...@ti.com
Tested-by: Roger Quadros rog...@ti.com
Reviewed-by: Rajendra Nayak rna...@ti.com
---
arch/arm/mach-omap2/omap_hwmod_7xx_data.c | 6 +-
1 file changed, 1 insertion(+), 5 deletions(-)
diff --git a/arch/arm/mach-omap2/omap_hwmod_7xx_data.c
b/arch/arm/mach-omap2/omap_hwmod_7xx_data.c
index cedef6b..bc42eab 100644
--- a/arch/arm/mach-omap2/omap_hwmod_7xx_data.c
+++ b/arch/arm/mach-omap2/omap_hwmod_7xx_data.c
@@ -1292,9 +1292,6 @@ static struct omap_hwmod_class dra7xx_sata_hwmod_class
= {
};
/* sata */
-static struct omap_hwmod_opt_clk sata_opt_clks[] = {
- { .role = ref_clk, .clk = sata_ref_clk },
-};
static struct omap_hwmod dra7xx_sata_hwmod = {
.name = sata,
@@ -1302,6 +1299,7 @@ static struct omap_hwmod dra7xx_sata_hwmod = {
.clkdm_name = l3init_clkdm,
.flags = HWMOD_SWSUP_SIDLE | HWMOD_SWSUP_MSTANDBY,
.main_clk = func_48m_fclk,
+ .mpu_rt_idx = 1,
.prcm = {
.omap4 = {
.clkctrl_offs = DRA7XX_CM_L3INIT_SATA_CLKCTRL_OFFSET,
@@ -1309,8 +1307,6 @@ static struct omap_hwmod dra7xx_sata_hwmod = {
.modulemode = MODULEMODE_SWCTRL,
},
},
- .opt_clks = sata_opt_clks,
- .opt_clks_cnt = ARRAY_SIZE(sata_opt_clks),
};
/*
--
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Re: [PATCH] arm: dts: dra7xx-clocks: Fix the l3 and l4 clock rates
On Tuesday 27 May 2014 02:25 PM, Rajendra Nayak wrote:
Without the patch:
/debug/.../dpll_core_x2_ck/dpll_core_h12x2_ck # cat clk_rate
53200
/debug/.../dpll_core_x2_ck/dpll_core_h12x2_ck/l3_iclk_div # cat clk_rate
53200
/debug/.../dpll_core_x2_ck/dpll_core_h12x2_ck/l3_iclk_div/l4_root_clk_div #
cat clk_rate
53200
With the patch:
/debug/.../dpll_core_x2_ck/dpll_core_h12x2_ck # cat clk_rate
53200
/debug/.../dpll_core_x2_ck/dpll_core_h12x2_ck/l3_iclk_div # cat clk_rate
26600
/debug/.../dpll_core_x2_ck/dpll_core_h12x2_ck/l3_iclk_div/l4_root_clk_div #
cat clk_rate
13300
The l3 clock derived from core DPLL is actually a divider clock,
with the default divider set to 2. l4 then derived from l3 is a fixed factor
clock, but the fixed divider is 2 and not 1. Which means the l3 clock is
half of core DPLLs h12x2 and l4 is half of l3 (as seen with this patch)
Tero, this seems like is yet to be picked up. You see any issues with this that
needs to be
addressed?
regards,
Rajendra
Signed-off-by: Rajendra Nayak rna...@ti.com
---
arch/arm/boot/dts/dra7xx-clocks.dtsi | 10 ++
1 file changed, 6 insertions(+), 4 deletions(-)
diff --git a/arch/arm/boot/dts/dra7xx-clocks.dtsi
b/arch/arm/boot/dts/dra7xx-clocks.dtsi
index cfb8fc7..a14c99b 100644
--- a/arch/arm/boot/dts/dra7xx-clocks.dtsi
+++ b/arch/arm/boot/dts/dra7xx-clocks.dtsi
@@ -673,10 +673,12 @@
l3_iclk_div: l3_iclk_div {
#clock-cells = 0;
- compatible = fixed-factor-clock;
+ compatible = ti,divider-clock;
+ ti,max-div = 2;
+ ti,bit-shift = 4;
+ reg = 0x0100;
clocks = dpll_core_h12x2_ck;
- clock-mult = 1;
- clock-div = 1;
+ ti,index-power-of-two;
};
l4_root_clk_div: l4_root_clk_div {
@@ -684,7 +686,7 @@
compatible = fixed-factor-clock;
clocks = l3_iclk_div;
clock-mult = 1;
- clock-div = 1;
+ clock-div = 2;
};
video1_clk2_div: video1_clk2_div {
--
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Re: [PATCH] ARM: DRA7: hwmod: add entry for RTCSS
On Friday 09 May 2014 06:07 PM, Sekhar Nori wrote:
From: Lokesh Vutla lokeshvu...@ti.com
RTCSS on DRA7 provides a precise real-time clock.
Add hwmod entry for this IP.
Signed-off-by: Lokesh Vutla lokeshvu...@ti.com
Signed-off-by: Sekhar Nori nsek...@ti.com
Reviewed-by: Rajendra Nayak rna...@ti.com
---
Applies to linux-next of 5th May.
Might need a repost with rebase on the latest mainline.
arch/arm/mach-omap2/omap_hwmod_7xx_data.c | 41
+
1 file changed, 41 insertions(+)
diff --git a/arch/arm/mach-omap2/omap_hwmod_7xx_data.c
b/arch/arm/mach-omap2/omap_hwmod_7xx_data.c
index 810c205..402ffc7 100644
--- a/arch/arm/mach-omap2/omap_hwmod_7xx_data.c
+++ b/arch/arm/mach-omap2/omap_hwmod_7xx_data.c
@@ -1249,6 +1249,38 @@ static struct omap_hwmod dra7xx_qspi_hwmod = {
};
/*
+ * 'rtcss' class
+ *
+ */
+static struct omap_hwmod_class_sysconfig dra7xx_rtcss_sysc = {
+ .sysc_offs = 0x0078,
+ .sysc_flags = SYSC_HAS_SIDLEMODE,
+ .idlemodes = (SIDLE_FORCE | SIDLE_NO | SIDLE_SMART |
+SIDLE_SMART_WKUP),
+ .sysc_fields= omap_hwmod_sysc_type3,
+};
+
+static struct omap_hwmod_class dra7xx_rtcss_hwmod_class = {
+ .name = rtcss,
+ .sysc = dra7xx_rtcss_sysc,
+};
+
+/* rtcss */
+static struct omap_hwmod dra7xx_rtcss_hwmod = {
+ .name = rtcss,
+ .class = dra7xx_rtcss_hwmod_class,
+ .clkdm_name = rtc_clkdm,
+ .main_clk = sys_32k_ck,
+ .prcm = {
+ .omap4 = {
+ .clkctrl_offs = DRA7XX_CM_RTC_RTCSS_CLKCTRL_OFFSET,
+ .context_offs = DRA7XX_RM_RTC_RTCSS_CONTEXT_OFFSET,
+ .modulemode = MODULEMODE_SWCTRL,
+ },
+ },
+};
+
+/*
* 'sata' class
*
*/
@@ -2354,6 +2386,14 @@ static struct omap_hwmod_ocp_if dra7xx_l3_main_1__qspi
= {
.user = OCP_USER_MPU | OCP_USER_SDMA,
};
+/* l4_per3 - rtcss */
+static struct omap_hwmod_ocp_if dra7xx_l4_per3__rtcss = {
+ .master = dra7xx_l4_per3_hwmod,
+ .slave = dra7xx_rtcss_hwmod,
+ .clk= l4_root_clk_div,
+ .user = OCP_USER_MPU | OCP_USER_SDMA,
+};
+
static struct omap_hwmod_addr_space dra7xx_sata_addrs[] = {
{
.name = sysc,
@@ -2683,6 +2723,7 @@ static struct omap_hwmod_ocp_if *dra7xx_hwmod_ocp_ifs[]
__initdata = {
dra7xx_l4_cfg__mpu,
dra7xx_l4_cfg__ocp2scp1,
dra7xx_l3_main_1__qspi,
+ dra7xx_l4_per3__rtcss,
dra7xx_l4_cfg__sata,
dra7xx_l4_cfg__smartreflex_core,
dra7xx_l4_cfg__smartreflex_mpu,
--
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Re: [PATCH v4 3/4] ARM: DRA7: hwmod: Add ocp2scp3 and sata hwmods
On Wednesday 18 June 2014 01:32 PM, Roger Quadros wrote:
On 04/23/2014 08:35 PM, Roger Quadros wrote:
From: Nikhil Devshatwar nikhil...@ti.com
Add hwmods for ocp2scp3 and sata modules.
From what I see this is actually adding the ocp2scp3 data and fixing up some
of the sata data which is already added and erroneous.
It would help if this is split up and the changelog explains whats fixed up for
sata and why. Like for instance I see the opt clock data being removed but no
mention of why.
[Roger Q] Clean up.
CC: Benoit Cousson bcous...@baylibre.com
CC: Paul Walmsley p...@pwsan.com
Signed-off-by: Balaji T K balaj...@ti.com
Signed-off-by: Nikhil Devshatwar nikhil...@ti.com
Signed-off-by: Roger Quadros rog...@ti.com
Tested-by: Roger Quadros rog...@ti.com
against 3.16-rc1, no dependency patches needed.
Nishant/Rajendra,
Could you please review this? We need this for 3.16 SATA support and
Paul won't take this in without your reviewed-by tag. Thanks.
cheers,
-roger
---
arch/arm/mach-omap2/omap_hwmod_7xx_data.c | 31
++-
1 file changed, 26 insertions(+), 5 deletions(-)
diff --git a/arch/arm/mach-omap2/omap_hwmod_7xx_data.c
b/arch/arm/mach-omap2/omap_hwmod_7xx_data.c
index 810c205..b02a4ab 100644
--- a/arch/arm/mach-omap2/omap_hwmod_7xx_data.c
+++ b/arch/arm/mach-omap2/omap_hwmod_7xx_data.c
@@ -1215,6 +1215,30 @@ static struct omap_hwmod dra7xx_ocp2scp1_hwmod = {
},
};
+/* ocp2scp3 */
+static struct omap_hwmod dra7xx_ocp2scp3_hwmod;
+
+/* l4_cfg - ocp2scp3 */
+static struct omap_hwmod_ocp_if dra7xx_l4_cfg__ocp2scp3 = {
+.master = dra7xx_l4_cfg_hwmod,
+.slave = dra7xx_ocp2scp3_hwmod,
+.clk= l4_root_clk_div,
+.user = OCP_USER_MPU | OCP_USER_SDMA,
+};
All hwmod data files are organized in a certain way with all the hwmod/IP block
info on top
and Interface structs at the bottom. Can we follow the same for ocp2scp3? It
helps with better
readability.
+
+static struct omap_hwmod dra7xx_ocp2scp3_hwmod = {
+.name = ocp2scp3,
+.class = dra7xx_ocp2scp_hwmod_class,
+.clkdm_name = l3init_clkdm,
No main_clk?
regards,
Rajendra
+.prcm = {
+.omap4 = {
+.clkctrl_offs =
DRA7XX_CM_L3INIT_OCP2SCP3_CLKCTRL_OFFSET,
+.context_offs =
DRA7XX_RM_L3INIT_OCP2SCP3_CONTEXT_OFFSET,
+.modulemode = MODULEMODE_HWCTRL,
+},
+},
+};
+
/*
* 'qspi' class
*
@@ -1268,9 +1292,6 @@ static struct omap_hwmod_class dra7xx_sata_hwmod_class
= {
};
/* sata */
-static struct omap_hwmod_opt_clk sata_opt_clks[] = {
-{ .role = ref_clk, .clk = sata_ref_clk },
-};
static struct omap_hwmod dra7xx_sata_hwmod = {
.name = sata,
@@ -1278,6 +1299,7 @@ static struct omap_hwmod dra7xx_sata_hwmod = {
.clkdm_name = l3init_clkdm,
.flags = HWMOD_SWSUP_SIDLE | HWMOD_SWSUP_MSTANDBY,
.main_clk = func_48m_fclk,
+.mpu_rt_idx = 1,
.prcm = {
.omap4 = {
.clkctrl_offs = DRA7XX_CM_L3INIT_SATA_CLKCTRL_OFFSET,
@@ -1285,8 +1307,6 @@ static struct omap_hwmod dra7xx_sata_hwmod = {
.modulemode = MODULEMODE_SWCTRL,
},
},
-.opt_clks = sata_opt_clks,
-.opt_clks_cnt = ARRAY_SIZE(sata_opt_clks),
};
/*
@@ -2682,6 +2702,7 @@ static struct omap_hwmod_ocp_if
*dra7xx_hwmod_ocp_ifs[] __initdata = {
dra7xx_l4_per1__mmc4,
dra7xx_l4_cfg__mpu,
dra7xx_l4_cfg__ocp2scp1,
+dra7xx_l4_cfg__ocp2scp3,
dra7xx_l3_main_1__qspi,
dra7xx_l4_cfg__sata,
dra7xx_l4_cfg__smartreflex_core,
--
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Re: [PATCH v3 5/7] ARM: DRA7: hwmod: Add SYSCONFIG for usb_otg_ss
On Wednesday 18 June 2014 04:40 PM, Roger Quadros wrote:
+ Nishant and Rajendra for review.
On 05/05/2014 12:54 PM, Roger Quadros wrote:
Add the sysconfig class bits for the Super Speed USB
controllers
CC: Paul Walmsley p...@pwsan.com
Signed-off-by: Roger Quadros rog...@ti.com
verified against TRM version vP, looks good to me.
Reviewed-by: Rajendra Nayak rna...@ti.com
---
arch/arm/mach-omap2/omap_hwmod_7xx_data.c | 12
1 file changed, 12 insertions(+)
diff --git a/arch/arm/mach-omap2/omap_hwmod_7xx_data.c
b/arch/arm/mach-omap2/omap_hwmod_7xx_data.c
index 810c205..067d322 100644
--- a/arch/arm/mach-omap2/omap_hwmod_7xx_data.c
+++ b/arch/arm/mach-omap2/omap_hwmod_7xx_data.c
@@ -1731,8 +1731,20 @@ static struct omap_hwmod dra7xx_uart6_hwmod = {
*
*/
+static struct omap_hwmod_class_sysconfig dra7xx_usb_otg_ss_sysc = {
+.rev_offs = 0x,
+.sysc_offs = 0x0010,
+.sysc_flags = (SYSC_HAS_DMADISABLE | SYSC_HAS_MIDLEMODE |
+ SYSC_HAS_SIDLEMODE),
+.idlemodes = (SIDLE_FORCE | SIDLE_NO | SIDLE_SMART |
+ SIDLE_SMART_WKUP | MSTANDBY_FORCE | MSTANDBY_NO |
+ MSTANDBY_SMART | MSTANDBY_SMART_WKUP),
+.sysc_fields= omap_hwmod_sysc_type2,
+};
+
static struct omap_hwmod_class dra7xx_usb_otg_ss_hwmod_class = {
.name = usb_otg_ss,
+.sysc = dra7xx_usb_otg_ss_sysc,
};
/* usb_otg_ss1 */
--
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Re: [PATCH 1/2] ARM: DRA7: hwmod: Add OCP2SCP3 module
On Wednesday 18 June 2014 05:46 PM, Roger Quadros wrote:
This module is needed for the SATA and PCIe PHYs.
Signed-off-by: Roger Quadros rog...@ti.com
Tested-by: Roger Quadros rog...@ti.com
---
arch/arm/mach-omap2/omap_hwmod_7xx_data.c | 25 +
1 file changed, 25 insertions(+)
diff --git a/arch/arm/mach-omap2/omap_hwmod_7xx_data.c
b/arch/arm/mach-omap2/omap_hwmod_7xx_data.c
index 20b4398..cedef6b 100644
--- a/arch/arm/mach-omap2/omap_hwmod_7xx_data.c
+++ b/arch/arm/mach-omap2/omap_hwmod_7xx_data.c
@@ -1215,6 +1215,30 @@ static struct omap_hwmod dra7xx_ocp2scp1_hwmod = {
},
};
+/* ocp2scp3 */
+static struct omap_hwmod dra7xx_ocp2scp3_hwmod;
+
+/* l4_cfg - ocp2scp3 */
+static struct omap_hwmod_ocp_if dra7xx_l4_cfg__ocp2scp3 = {
+ .master = dra7xx_l4_cfg_hwmod,
+ .slave = dra7xx_ocp2scp3_hwmod,
+ .clk= l4_root_clk_div,
+ .user = OCP_USER_MPU | OCP_USER_SDMA,
+};
is it not possible to move this down in the file where all interface
structs are defined?
+
+static struct omap_hwmod dra7xx_ocp2scp3_hwmod = {
+ .name = ocp2scp3,
+ .class = dra7xx_ocp2scp_hwmod_class,
+ .clkdm_name = l3init_clkdm,
+ .prcm = {
+ .omap4 = {
+ .clkctrl_offs =
DRA7XX_CM_L3INIT_OCP2SCP3_CLKCTRL_OFFSET,
+ .context_offs =
DRA7XX_RM_L3INIT_OCP2SCP3_CONTEXT_OFFSET,
+ .modulemode = MODULEMODE_HWCTRL,
+ },
+ },
+};
+
/*
* 'qspi' class
*
@@ -2672,6 +2696,7 @@ static struct omap_hwmod_ocp_if *dra7xx_hwmod_ocp_ifs[]
__initdata = {
dra7xx_l4_per1__mmc4,
dra7xx_l4_cfg__mpu,
dra7xx_l4_cfg__ocp2scp1,
+ dra7xx_l4_cfg__ocp2scp3,
dra7xx_l3_main_1__qspi,
dra7xx_l4_cfg__sata,
dra7xx_l4_cfg__smartreflex_core,
--
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[PATCH] arm: dts: dra7xx-clocks: Fix the l3 and l4 clock rates
Without the patch:
/debug/.../dpll_core_x2_ck/dpll_core_h12x2_ck # cat clk_rate
53200
/debug/.../dpll_core_x2_ck/dpll_core_h12x2_ck/l3_iclk_div # cat clk_rate
53200
/debug/.../dpll_core_x2_ck/dpll_core_h12x2_ck/l3_iclk_div/l4_root_clk_div # cat
clk_rate
53200
With the patch:
/debug/.../dpll_core_x2_ck/dpll_core_h12x2_ck # cat clk_rate
53200
/debug/.../dpll_core_x2_ck/dpll_core_h12x2_ck/l3_iclk_div # cat clk_rate
26600
/debug/.../dpll_core_x2_ck/dpll_core_h12x2_ck/l3_iclk_div/l4_root_clk_div # cat
clk_rate
13300
The l3 clock derived from core DPLL is actually a divider clock,
with the default divider set to 2. l4 then derived from l3 is a fixed factor
clock, but the fixed divider is 2 and not 1. Which means the l3 clock is
half of core DPLLs h12x2 and l4 is half of l3 (as seen with this patch)
Signed-off-by: Rajendra Nayak rna...@ti.com
---
arch/arm/boot/dts/dra7xx-clocks.dtsi | 10 ++
1 file changed, 6 insertions(+), 4 deletions(-)
diff --git a/arch/arm/boot/dts/dra7xx-clocks.dtsi
b/arch/arm/boot/dts/dra7xx-clocks.dtsi
index cfb8fc7..a14c99b 100644
--- a/arch/arm/boot/dts/dra7xx-clocks.dtsi
+++ b/arch/arm/boot/dts/dra7xx-clocks.dtsi
@@ -673,10 +673,12 @@
l3_iclk_div: l3_iclk_div {
#clock-cells = 0;
- compatible = fixed-factor-clock;
+ compatible = ti,divider-clock;
+ ti,max-div = 2;
+ ti,bit-shift = 4;
+ reg = 0x0100;
clocks = dpll_core_h12x2_ck;
- clock-mult = 1;
- clock-div = 1;
+ ti,index-power-of-two;
};
l4_root_clk_div: l4_root_clk_div {
@@ -684,7 +686,7 @@
compatible = fixed-factor-clock;
clocks = l3_iclk_div;
clock-mult = 1;
- clock-div = 1;
+ clock-div = 2;
};
video1_clk2_div: video1_clk2_div {
--
1.7.9.5
--
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Re: [RFC 1/2] ARM: OMAP2+: hwmod: Add refcounting for modulemode shared by multiple hwmods
On Monday 26 May 2014 04:14 PM, Archit Taneja wrote:
Generally, IP blocks/modules within a clock domain each have their own
CM_x_CLKCTRL register, each having it's own MODULEMODE field to manage the
module.
DSS clockdoain, however, has multiple modules in it, but only one register
named CM_DSS_DSS_CLKCTRL, which contains one MODULEMODE register field.
Until now, we defined '.prcm.omap4.modulemode' only for the top level DSS
hwmod(dss_core) and didn't define it for other DSS hwmods(like dss_dispc,
dss_dsi1 and so on). This made the omapdss driver work as the top level DSS
platform device and the rest had a parent-child relationship. This ensured
that
the parent hwmod(dss_core) is enabled if any of the children hwmods are
enabled while using omapdss.
This method, however, doesn't work when each hwmod is enabled individually.
This happens early in boot in omap_hwmod_setup_all, where each hwmod is
enabled,
and then reset and idled. All the 'children' DSS hwmods fail to enable and
reset, since they don't enable modulemode.
The way to make such modules work both during initialization and when used by
pm runtime API in the driver would be to add refcounting for
enabling/disabling
the modulemode field.
We add a new flag bit for the flag in omap_hwmod_omap4_prcm, which tells
omap_hwmod that this hwmod uses a modulemode field shared by other hwmods.
We create a struct called 'modulemode_shared'. The hwmod data file should
define
a static instance of this struct. Each hwmod that uses this modulemode field
should hold a pointer to this instance.
omap_hwmod's soc enable_module and disable_module ops set the MODULEMODE
reigster bits only when the first module using it is enabled, or the last
module
using it is disabled. We serialize accesses to the struct with a spinlock.
Signed-off-by: Archit Taneja arc...@ti.com
---
arch/arm/mach-omap2/omap_hwmod.c | 123
+--
arch/arm/mach-omap2/omap_hwmod.h | 38 +---
2 files changed, 133 insertions(+), 28 deletions(-)
diff --git a/arch/arm/mach-omap2/omap_hwmod.c
b/arch/arm/mach-omap2/omap_hwmod.c
index 66c60fe..b42718d 100644
--- a/arch/arm/mach-omap2/omap_hwmod.c
+++ b/arch/arm/mach-omap2/omap_hwmod.c
@@ -973,17 +973,33 @@ static void _disable_optional_clocks(struct omap_hwmod
*oh)
*/
static void _omap4_enable_module(struct omap_hwmod *oh)
{
+ unsigned long flags;
+ struct modulemode_shared *mmode = NULL;
+ bool enable = true;
+
if (!oh-clkdm || !oh-prcm.omap4.modulemode)
return;
pr_debug(omap_hwmod: %s: %s: %d\n,
oh-name, __func__, oh-prcm.omap4.modulemode);
- omap4_cminst_module_enable(oh-prcm.omap4.modulemode,
-oh-clkdm-prcm_partition,
-oh-clkdm-cm_inst,
-oh-clkdm-clkdm_offs,
-oh-prcm.omap4.clkctrl_offs);
+ if (oh-prcm.omap4.flags HWMOD_OMAP4_MODULEMODE_SHARED) {
+ mmode = oh-prcm.omap4.modulemode_ref;
+
+ spin_lock_irqsave(mmode-lock, flags);
+
+ enable = mmode-refcnt++ == 0;
+ }
+
+ if (enable)
+ omap4_cminst_module_enable(oh-prcm.omap4.modulemode,
+oh-clkdm-prcm_partition,
+oh-clkdm-cm_inst,
+oh-clkdm-clkdm_offs,
+oh-prcm.omap4.clkctrl_offs);
+
+ if (mmode)
+ spin_unlock_irqrestore(mmode-lock, flags);
}
/**
@@ -995,15 +1011,32 @@ static void _omap4_enable_module(struct omap_hwmod *oh)
*/
static void _am33xx_enable_module(struct omap_hwmod *oh)
{
+ unsigned long flags;
+ struct modulemode_shared *mmode = NULL;
+ bool enable = true;
+
if (!oh-clkdm || !oh-prcm.omap4.modulemode)
return;
pr_debug(omap_hwmod: %s: %s: %d\n,
oh-name, __func__, oh-prcm.omap4.modulemode);
- am33xx_cm_module_enable(oh-prcm.omap4.modulemode, oh-clkdm-cm_inst,
- oh-clkdm-clkdm_offs,
- oh-prcm.omap4.clkctrl_offs);
+ if (oh-prcm.omap4.flags HWMOD_OMAP4_MODULEMODE_SHARED) {
+ mmode = oh-prcm.omap4.modulemode_ref;
+
+ spin_lock_irqsave(mmode-lock, flags);
+
+ enable = mmode-refcnt++ == 0;
+ }
+
+ if (enable)
+ am33xx_cm_module_enable(oh-prcm.omap4.modulemode,
+ oh-clkdm-cm_inst,
+ oh-clkdm-clkdm_offs,
+ oh-prcm.omap4.clkctrl_offs);
+
+ if (mmode)
+ spin_unlock_irqrestore(mmode-lock, flags);
}
/**
@@ -1846,6 +1879,9 @@ static bool _are_any_hardreset_lines_asserted(struct
omap_hwmod *oh)
Re: [PATCH] ARM: DRA752: add detection of SoC information
On Monday 19 May 2014 08:57 PM, Nishanth Menon wrote:
Currently the files in /sys/devices/soc0/ show no information about
DRA7. Few userspace programs do depend on this information to make SoC
specific support. So update logic to detect the relevant information and
provide to userspace.
Signed-off-by: Nishanth Menon n...@ti.com
---
based on v3.15-rc5
Test log: http://slexy.org/view/s2FDZatq6f
arch/arm/mach-omap2/id.c | 37 +
arch/arm/mach-omap2/io.c |1 +
arch/arm/mach-omap2/soc.h |5 +
3 files changed, 43 insertions(+)
diff --git a/arch/arm/mach-omap2/id.c b/arch/arm/mach-omap2/id.c
index 157412e..71bf216 100644
--- a/arch/arm/mach-omap2/id.c
+++ b/arch/arm/mach-omap2/id.c
@@ -628,6 +628,41 @@ void __init omap5xxx_check_revision(void)
pr_info(%s %s\n, soc_name, soc_rev);
}
+void __init dra7xxx_check_revision(void)
+{
+ u32 idcode;
+ u16 hawkeye;
+ u8 rev;
+
+ idcode = read_tap_reg(OMAP_TAP_IDCODE);
+ hawkeye = (idcode 12) 0x;
+ rev = (idcode 28) 0xff;
+ switch (hawkeye) {
+ case 0xb990:
+ switch (rev) {
+ case 0:
+ omap_revision = DRA752_REV_ES1_0;
+ break;
+ case 1:
+ default:
+ omap_revision = DRA752_REV_ES1_1;
+ }
+ break;
So we are back to checking revisions based on idcode register then?
This patch was posted almost a year back and was shot down by you
included saying we need to use dt compatibles for it.
https://www.mail-archive.com/linux-omap@vger.kernel.org/msg93136.html
+
+ default:
+ /* Unknown default to latest silicon rev as default*/
+ pr_warn(%s: unknown idcode=0x%08x (hawkeye=0x%08x,rev=0x%d)\n,
+ __func__, idcode, hawkeye, rev);
+ omap_revision = DRA752_REV_ES1_1;
+ }
+
+ sprintf(soc_name, DRA%03x, omap_rev() 16);
+ sprintf(soc_rev, ES%d.%d, (omap_rev() 12) 0xf,
+ (omap_rev() 8) 0xf);
+
+ pr_info(%s %s\n, soc_name, soc_rev);
+}
+
/*
* Set up things for map_io and processor detection later on. Gets called
* pretty much first thing from board init. For multi-omap, this gets
@@ -669,6 +704,8 @@ static const char * __init omap_get_family(void)
return kasprintf(GFP_KERNEL, OMAP5);
else if (soc_is_am43xx())
return kasprintf(GFP_KERNEL, AM43xx);
+ else if (soc_is_dra7xx())
+ return kasprintf(GFP_KERNEL, DRA7);
else
return kasprintf(GFP_KERNEL, Unknown);
}
diff --git a/arch/arm/mach-omap2/io.c b/arch/arm/mach-omap2/io.c
index f14f9ac..4ec3b4a 100644
--- a/arch/arm/mach-omap2/io.c
+++ b/arch/arm/mach-omap2/io.c
@@ -693,6 +693,7 @@ void __init dra7xx_init_early(void)
omap_prm_base_init();
omap_cm_base_init();
omap44xx_prm_init();
+ dra7xxx_check_revision();
dra7xx_powerdomains_init();
dra7xx_clockdomains_init();
dra7xx_hwmod_init();
diff --git a/arch/arm/mach-omap2/soc.h b/arch/arm/mach-omap2/soc.h
index 30abcc8..de2a34c 100644
--- a/arch/arm/mach-omap2/soc.h
+++ b/arch/arm/mach-omap2/soc.h
@@ -459,10 +459,15 @@ IS_OMAP_TYPE(3430, 0x3430)
#define OMAP5430_REV_ES2_0 (OMAP54XX_CLASS | (0x30 16) | (0x20 8))
#define OMAP5432_REV_ES2_0 (OMAP54XX_CLASS | (0x32 16) | (0x20 8))
+#define DRA7XX_CLASS 0x0700
+#define DRA752_REV_ES1_0 (DRA7XX_CLASS | (0x52 16) | (0x10 8))
+#define DRA752_REV_ES1_1 (DRA7XX_CLASS | (0x52 16) | (0x11 8))
+
void omap2xxx_check_revision(void);
void omap3xxx_check_revision(void);
void omap4xxx_check_revision(void);
void omap5xxx_check_revision(void);
+void dra7xxx_check_revision(void);
void omap3xxx_check_features(void);
void ti81xx_check_features(void);
void am33xx_check_features(void);
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[RFC] ARM: OMAP2+: hwmod: Cleanup unused optional clock information
Some modules need their optional clocks to be enabled in order to complete
the ocp softreset. This is what hwmod uses optional clock information
for. While these modules are limited (GPIO and DSS) there are others which have
this data in hwmod but it seems to be completely unused. Get rid of all opt_clks
for all such instances.
The modules (like GPIO and DSS) which do have this need to handle optional
clocks during a ocp softreset are marked with a flag
'HWMOD_CONTROL_OPT_CLKS_IN_RESET'
so its easy to identify the ones which don't have this requirement.
Signed-off-by: Rajendra Nayak rna...@ti.com
---
I have only sanity tested this on a couple boards. Need to test on all
affected platforms.
arch/arm/mach-omap2/omap_hwmod_2420_data.c |9 --
arch/arm/mach-omap2/omap_hwmod_2430_data.c | 15
arch/arm/mach-omap2/omap_hwmod_2xxx_ipblock_data.c |6 --
arch/arm/mach-omap2/omap_hwmod_33xx_data.c |7 --
arch/arm/mach-omap2/omap_hwmod_44xx_data.c | 87
arch/arm/mach-omap2/omap_hwmod_54xx_data.c | 39 -
arch/arm/mach-omap2/omap_hwmod_7xx_data.c | 55 -
7 files changed, 218 deletions(-)
diff --git a/arch/arm/mach-omap2/omap_hwmod_2420_data.c
b/arch/arm/mach-omap2/omap_hwmod_2420_data.c
index 2f15979..25e2266 100644
--- a/arch/arm/mach-omap2/omap_hwmod_2420_data.c
+++ b/arch/arm/mach-omap2/omap_hwmod_2420_data.c
@@ -200,11 +200,6 @@ static struct omap_hwmod_class omap2420_mcbsp_hwmod_class
= {
.name = mcbsp,
};
-static struct omap_hwmod_opt_clk mcbsp_opt_clks[] = {
- { .role = pad_fck, .clk = mcbsp_clks },
- { .role = prcm_fck, .clk = func_96m_ck },
-};
-
/* mcbsp1 */
static struct omap_hwmod omap2420_mcbsp1_hwmod = {
.name = mcbsp1,
@@ -219,8 +214,6 @@ static struct omap_hwmod omap2420_mcbsp1_hwmod = {
.idlest_idle_bit = OMAP24XX_ST_MCBSP1_SHIFT,
},
},
- .opt_clks = mcbsp_opt_clks,
- .opt_clks_cnt = ARRAY_SIZE(mcbsp_opt_clks),
};
/* mcbsp2 */
@@ -237,8 +230,6 @@ static struct omap_hwmod omap2420_mcbsp2_hwmod = {
.idlest_idle_bit = OMAP24XX_ST_MCBSP2_SHIFT,
},
},
- .opt_clks = mcbsp_opt_clks,
- .opt_clks_cnt = ARRAY_SIZE(mcbsp_opt_clks),
};
static struct omap_hwmod_class_sysconfig omap2420_msdi_sysc = {
diff --git a/arch/arm/mach-omap2/omap_hwmod_2430_data.c
b/arch/arm/mach-omap2/omap_hwmod_2430_data.c
index 6d1b609..d755bf0 100644
--- a/arch/arm/mach-omap2/omap_hwmod_2430_data.c
+++ b/arch/arm/mach-omap2/omap_hwmod_2430_data.c
@@ -268,11 +268,6 @@ static struct omap_hwmod_class omap2430_mcbsp_hwmod_class
= {
.rev = MCBSP_CONFIG_TYPE2,
};
-static struct omap_hwmod_opt_clk mcbsp_opt_clks[] = {
- { .role = pad_fck, .clk = mcbsp_clks },
- { .role = prcm_fck, .clk = func_96m_ck },
-};
-
/* mcbsp1 */
static struct omap_hwmod omap2430_mcbsp1_hwmod = {
.name = mcbsp1,
@@ -287,8 +282,6 @@ static struct omap_hwmod omap2430_mcbsp1_hwmod = {
.idlest_idle_bit = OMAP24XX_ST_MCBSP1_SHIFT,
},
},
- .opt_clks = mcbsp_opt_clks,
- .opt_clks_cnt = ARRAY_SIZE(mcbsp_opt_clks),
};
/* mcbsp2 */
@@ -305,8 +298,6 @@ static struct omap_hwmod omap2430_mcbsp2_hwmod = {
.idlest_idle_bit = OMAP24XX_ST_MCBSP2_SHIFT,
},
},
- .opt_clks = mcbsp_opt_clks,
- .opt_clks_cnt = ARRAY_SIZE(mcbsp_opt_clks),
};
/* mcbsp3 */
@@ -323,8 +314,6 @@ static struct omap_hwmod omap2430_mcbsp3_hwmod = {
.idlest_idle_bit = OMAP2430_ST_MCBSP3_SHIFT,
},
},
- .opt_clks = mcbsp_opt_clks,
- .opt_clks_cnt = ARRAY_SIZE(mcbsp_opt_clks),
};
/* mcbsp4 */
@@ -341,8 +330,6 @@ static struct omap_hwmod omap2430_mcbsp4_hwmod = {
.idlest_idle_bit = OMAP2430_ST_MCBSP4_SHIFT,
},
},
- .opt_clks = mcbsp_opt_clks,
- .opt_clks_cnt = ARRAY_SIZE(mcbsp_opt_clks),
};
/* mcbsp5 */
@@ -359,8 +346,6 @@ static struct omap_hwmod omap2430_mcbsp5_hwmod = {
.idlest_idle_bit = OMAP2430_ST_MCBSP5_SHIFT,
},
},
- .opt_clks = mcbsp_opt_clks,
- .opt_clks_cnt = ARRAY_SIZE(mcbsp_opt_clks),
};
/* MMC/SD/SDIO common */
diff --git a/arch/arm/mach-omap2/omap_hwmod_2xxx_ipblock_data.c
b/arch/arm/mach-omap2/omap_hwmod_2xxx_ipblock_data.c
index 8821b9d..a33a2d7 100644
--- a/arch/arm/mach-omap2/omap_hwmod_2xxx_ipblock_data.c
+++ b/arch/arm/mach-omap2/omap_hwmod_2xxx_ipblock_data.c
@@ -584,10 +584,6 @@ struct omap_hwmod omap2xxx_dss_dispc_hwmod = {
.dev_attr = omap2_3_dss_dispc_dev_attr,
};
-static struct omap_hwmod_opt_clk dss_rfbi_opt_clks[] = {
- { .role = ick, .clk = dss_ick },
-};
-
struct
Re: [PATCH 00/11] ARM: OMAP: OMAP5 AM43x DSS
On Tuesday 20 May 2014 11:01 AM, Archit Taneja wrote: Hi, On Friday 16 May 2014 01:44 PM, Tomi Valkeinen wrote: On 12/05/14 18:48, Tony Lindgren wrote: Also, I'm wondering why we still have .clk and .opt_clks entries in the hwmod data for am43xx and omap5 which are both device tree based with all the clocks coming from .dts files? I think they are needed for the omap_device/hwmod stuff to work. Only omapdss driver knows about the clocks defined in the .dts files, and the omap_device/hwmod code still needs to do the reset and maybe some other tasks that require the clocks. We're already populating the hwmod data from dts entries, that's done by omap_device_build_from_dt. Why aren't we doing that for dt defined clocks? I'd rather not start adding new data that will then just be removed, that's what people call pointless extra churn. I don't know why. I have to say I'm not 100% sure if that's done or not, but at least I can't find where it's done. The reason why clocks are needed from hwmod data is because we still don't populate hwmod fields like main_clk and opt_clock from DT clocks. The reason why this isn't done yet is because we currently haven't figured out a clean way to tell hwmod what clock is the main_clk, and what clocks are optional clocks. One of the proposed methods was to assume the clock named to be fck as main_clk, and the remaining clocks as optional clocks for hwmod. That method wasn't agreed upon, this looks like the thread which discusses this: http://marc.info/?l=linux-arm-kernelm=138928084823142w=2 So I started to look through this again and I realized most of the opt clock information is actually unused within hwmod and does not even need to be there. I just proposed an RFC here to clean some of that [1] The only modules which do need this seem to be gpio and dss (though we still need to check if all the newer platforms need this, or this is one of those things just carried forward because some old platform had an issue with gpio and dss ocp reset) As far as DSS is concerned, this is used within the custom reset function (not within hwmod) in display.c in mach-omap2/ Its just that the current code relies on hwmod structures, which can very easily now extract this from DT instead. That just leaves gpio, which should be the only clock information that will have to exist in hwmod till we figure out how to move it to DT. All the main_clks from hwmod can very easily to moved to DT as already proposed using something like 'fck' to identify them. [1] http://marc.info/?l=linux-omapm=140057445618162w=2 Archit -- To unsubscribe from this list: send the line unsubscribe linux-omap in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
Re: [PATCH 01/11] ARM: AM43xx: hwmod: add DSS hwmod data
On Friday 09 May 2014 05:26 PM, Tomi Valkeinen wrote:
From: Sathya Prakash M R sath...@ti.com
Add DSS hwmod data for AM43xx.
Signed-off-by: Sathya Prakash M R sath...@ti.com
Signed-off-by: Tomi Valkeinen tomi.valkei...@ti.com
---
arch/arm/mach-omap2/omap_hwmod_43xx_data.c | 104
+
arch/arm/mach-omap2/prcm43xx.h | 1 +
2 files changed, 105 insertions(+)
diff --git a/arch/arm/mach-omap2/omap_hwmod_43xx_data.c
b/arch/arm/mach-omap2/omap_hwmod_43xx_data.c
index 5c2cc8083fdd..8c14db2e1e47 100644
--- a/arch/arm/mach-omap2/omap_hwmod_43xx_data.c
+++ b/arch/arm/mach-omap2/omap_hwmod_43xx_data.c
@@ -19,6 +19,8 @@
#include omap_hwmod.h
#include omap_hwmod_33xx_43xx_common_data.h
#include prcm43xx.h
+#include omap_hwmod_common_data.h
+
/* IP blocks */
static struct omap_hwmod am43xx_l4_hs_hwmod = {
@@ -415,6 +417,76 @@ static struct omap_hwmod am43xx_qspi_hwmod = {
},
};
+/* Display sub system - DSS */
+
+static struct omap_hwmod_dma_info am43xx_dss_sdma_chs[] = {
+ { .name = dispc, .dma_req = 5 },
+ { .dma_req = -1 },
+};
the dma info needs to come in from DT. Besides these are edma
request lines and not sdma.
+
+struct omap_dss_dispc_dev_attr am43xx_dss_dispc_dev_attr = {
+ .manager_count = 1,
+ .has_framedonetv_irq= 0
+};
+
+
[]..
+
/* Interfaces */
static struct omap_hwmod_ocp_if am43xx_l3_main__l4_hs = {
.master = am33xx_l3_main_hwmod,
@@ -654,6 +726,34 @@ static struct omap_hwmod_ocp_if am43xx_l3_s__qspi = {
.user = OCP_USER_MPU | OCP_USER_SDMA,
};
+static struct omap_hwmod_ocp_if am43xx_dss__l3_main = {
+ .master = am43xx_dss_core_hwmod,
+ .slave = am33xx_l3_main_hwmod,
+ .clk= disp_clk,
Isn't l3_gclk that clocks the l3 OCP master port?
regards,
Rajendra
+ .user = OCP_USER_MPU | OCP_USER_SDMA,
+};
+
+static struct omap_hwmod_ocp_if am43xx_l4_ls__dss = {
+ .master = am33xx_l4_ls_hwmod,
+ .slave = am43xx_dss_core_hwmod,
+ .clk= l4ls_gclk,
+ .user = OCP_USER_MPU | OCP_USER_SDMA,
+};
+
+static struct omap_hwmod_ocp_if am43xx_l4_ls__dss_dispc = {
+ .master = am33xx_l4_ls_hwmod,
+ .slave = am43xx_dss_dispc_hwmod,
+ .clk= l4ls_gclk,
+ .user = OCP_USER_MPU | OCP_USER_SDMA,
+};
+
+static struct omap_hwmod_ocp_if am43xx_l4_ls__dss_rfbi = {
+ .master = am33xx_l4_ls_hwmod,
+ .slave = am43xx_dss_rfbi_hwmod,
+ .clk= l4ls_gclk,
+ .user = OCP_USER_MPU | OCP_USER_SDMA,
+};
+
static struct omap_hwmod_ocp_if *am43xx_hwmod_ocp_ifs[] __initdata = {
am33xx_l4_wkup__synctimer,
am43xx_l4_ls__timer8,
@@ -748,6 +848,10 @@ static struct omap_hwmod_ocp_if *am43xx_hwmod_ocp_ifs[]
__initdata = {
am43xx_l4_ls__ocp2scp1,
am43xx_l3_s__usbotgss0,
am43xx_l3_s__usbotgss1,
+ am43xx_dss__l3_main,
+ am43xx_l4_ls__dss,
+ am43xx_l4_ls__dss_dispc,
+ am43xx_l4_ls__dss_rfbi,
NULL,
};
diff --git a/arch/arm/mach-omap2/prcm43xx.h b/arch/arm/mach-omap2/prcm43xx.h
index 7785be984edd..ad7b3e9977f8 100644
--- a/arch/arm/mach-omap2/prcm43xx.h
+++ b/arch/arm/mach-omap2/prcm43xx.h
@@ -142,5 +142,6 @@
#define AM43XX_CM_PER_USBPHYOCP2SCP0_CLKCTRL_OFFSET 0x05B8
#define AM43XX_CM_PER_USB_OTG_SS1_CLKCTRL_OFFSET0x0268
#define AM43XX_CM_PER_USBPHYOCP2SCP1_CLKCTRL_OFFSET 0x05C0
+#define AM43XX_CM_PER_DSS_CLKCTRL_OFFSET 0x0a20
#endif
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Re: [PATCH 01/11] ARM: AM43xx: hwmod: add DSS hwmod data
On Monday 19 May 2014 03:42 PM, Tomi Valkeinen wrote:
On 19/05/14 12:24, Rajendra Nayak wrote:
On Friday 09 May 2014 05:26 PM, Tomi Valkeinen wrote:
From: Sathya Prakash M R sath...@ti.com
Add DSS hwmod data for AM43xx.
Signed-off-by: Sathya Prakash M R sath...@ti.com
Signed-off-by: Tomi Valkeinen tomi.valkei...@ti.com
---
arch/arm/mach-omap2/omap_hwmod_43xx_data.c | 104
+
arch/arm/mach-omap2/prcm43xx.h | 1 +
2 files changed, 105 insertions(+)
diff --git a/arch/arm/mach-omap2/omap_hwmod_43xx_data.c
b/arch/arm/mach-omap2/omap_hwmod_43xx_data.c
index 5c2cc8083fdd..8c14db2e1e47 100644
--- a/arch/arm/mach-omap2/omap_hwmod_43xx_data.c
+++ b/arch/arm/mach-omap2/omap_hwmod_43xx_data.c
@@ -19,6 +19,8 @@
#include omap_hwmod.h
#include omap_hwmod_33xx_43xx_common_data.h
#include prcm43xx.h
+#include omap_hwmod_common_data.h
+
/* IP blocks */
static struct omap_hwmod am43xx_l4_hs_hwmod = {
@@ -415,6 +417,76 @@ static struct omap_hwmod am43xx_qspi_hwmod = {
},
};
+/* Display sub system - DSS */
+
+static struct omap_hwmod_dma_info am43xx_dss_sdma_chs[] = {
+ { .name = dispc, .dma_req = 5 },
+ { .dma_req = -1 },
+};
the dma info needs to come in from DT. Besides these are edma
request lines and not sdma.
Right, the sdma information is not needed anymore.
+
+struct omap_dss_dispc_dev_attr am43xx_dss_dispc_dev_attr = {
+ .manager_count = 1,
+ .has_framedonetv_irq= 0
+};
+
+
[]..
+
/* Interfaces */
static struct omap_hwmod_ocp_if am43xx_l3_main__l4_hs = {
.master = am33xx_l3_main_hwmod,
@@ -654,6 +726,34 @@ static struct omap_hwmod_ocp_if am43xx_l3_s__qspi = {
.user = OCP_USER_MPU | OCP_USER_SDMA,
};
+static struct omap_hwmod_ocp_if am43xx_dss__l3_main = {
+ .master = am43xx_dss_core_hwmod,
+ .slave = am33xx_l3_main_hwmod,
+ .clk= disp_clk,
Isn't l3_gclk that clocks the l3 OCP master port?
Hmm, possibly... dispc_clk looks a bit odd there. It's been very
difficult to figure out things like that, with the not-so-good am43xx
documentation.
The documentation mentions L3 Fast Interconnect and LCDL3OCPIFCLK
related to DSS's OCP master, but searching for those in the TRM doesn't
reveal much.
Would the l3_gclk match the L3 Fast Interconnect and l3s_gclk match
the L3 Slow Interconnect.
Yeah, thats what it looks like to me. l3_gclk is the 200Mhz clock derived from
core-m4 post divider and l3s_gclk/l4ls_gclk are half of that at 100Mhz, derived
using a fixed divider of 2.
regards,
Rajendra
Tomi
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Re: [PATCH 01/11] ARM: AM43xx: hwmod: add DSS hwmod data
On Monday 19 May 2014 04:40 PM, Tomi Valkeinen wrote:
On 19/05/14 13:28, Rajendra Nayak wrote:
Yeah, thats what it looks like to me. l3_gclk is the 200Mhz clock derived
from
core-m4 post divider and l3s_gclk/l4ls_gclk are half of that at 100Mhz,
derived
using a fixed divider of 2.
Here's an updated patch, with the sdma entry removed and the ocp clock
changed to l3_gclk.
From bfaf0fafb21c698c86640764c1aa62d6fc73992a Mon Sep 17 00:00:00 2001
From: Sathya Prakash M R sath...@ti.com
Date: Mon, 24 Mar 2014 16:31:53 +0530
Subject: [PATCH] ARM: AM43xx: hwmod: add DSS hwmod data
Add DSS hwmod data for AM43xx.
Signed-off-by: Sathya Prakash M R sath...@ti.com
Signed-off-by: Tomi Valkeinen tomi.valkei...@ti.com
Looks good to me, feel free to add
Acked-by: Rajendra Nayak rna...@ti.com
---
arch/arm/mach-omap2/omap_hwmod_43xx_data.c | 98
++
arch/arm/mach-omap2/prcm43xx.h | 1 +
2 files changed, 99 insertions(+)
diff --git a/arch/arm/mach-omap2/omap_hwmod_43xx_data.c
b/arch/arm/mach-omap2/omap_hwmod_43xx_data.c
index 5c2cc8083fdd..d2a7b6dc36f2 100644
--- a/arch/arm/mach-omap2/omap_hwmod_43xx_data.c
+++ b/arch/arm/mach-omap2/omap_hwmod_43xx_data.c
@@ -19,6 +19,8 @@
#include omap_hwmod.h
#include omap_hwmod_33xx_43xx_common_data.h
#include prcm43xx.h
+#include omap_hwmod_common_data.h
+
/* IP blocks */
static struct omap_hwmod am43xx_l4_hs_hwmod = {
@@ -415,6 +417,70 @@ static struct omap_hwmod am43xx_qspi_hwmod = {
},
};
+/* Display sub system - DSS */
+
+struct omap_dss_dispc_dev_attr am43xx_dss_dispc_dev_attr = {
+ .manager_count = 1,
+ .has_framedonetv_irq= 0
+};
+
+
+static struct omap_hwmod_class_sysconfig am43xx_dispc_sysc = {
+ .rev_offs = 0x,
+ .sysc_offs = 0x0010,
+ .syss_offs = 0x0014,
+ .sysc_flags = (SYSC_HAS_SIDLEMODE | SYSC_HAS_MIDLEMODE),
+ .idlemodes = (SIDLE_FORCE | SIDLE_NO | SIDLE_SMART),
+ .sysc_fields= omap_hwmod_sysc_type1,
+};
+
+static struct omap_hwmod_class am43xx_dispc_hwmod_class = {
+ .name = dispc,
+ .sysc = am43xx_dispc_sysc,
+};
+
+static struct omap_hwmod am43xx_dss_core_hwmod = {
+ .name = dss_core,
+ .class = omap2_dss_hwmod_class,
+ .clkdm_name = dss_clkdm,
+ .main_clk = disp_clk,
+ .prcm = {
+ .omap4 = {
+ .clkctrl_offs = AM43XX_CM_PER_DSS_CLKCTRL_OFFSET,
+ .modulemode = MODULEMODE_SWCTRL,
+ },
+ },
+};
+
+/* display controller -dispc*/
+
+static struct omap_hwmod am43xx_dss_dispc_hwmod = {
+ .name = dss_dispc,
+ .class = am43xx_dispc_hwmod_class,
+ .clkdm_name = dss_clkdm,
+ .main_clk = disp_clk,
+ .prcm = {
+ .omap4 = {
+ .clkctrl_offs = AM43XX_CM_PER_DSS_CLKCTRL_OFFSET,
+ },
+ },
+ .dev_attr = am43xx_dss_dispc_dev_attr,
+};
+
+/*RFBI*/
+
+static struct omap_hwmod am43xx_dss_rfbi_hwmod = {
+ .name = dss_rfbi,
+ .class = omap2_rfbi_hwmod_class,
+ .clkdm_name = dss_clkdm,
+ .main_clk = disp_clk,
+ .prcm = {
+ .omap4 = {
+ .clkctrl_offs = AM43XX_CM_PER_DSS_CLKCTRL_OFFSET,
+ },
+ },
+};
+
/* Interfaces */
static struct omap_hwmod_ocp_if am43xx_l3_main__l4_hs = {
.master = am33xx_l3_main_hwmod,
@@ -654,6 +720,34 @@ static struct omap_hwmod_ocp_if am43xx_l3_s__qspi = {
.user = OCP_USER_MPU | OCP_USER_SDMA,
};
+static struct omap_hwmod_ocp_if am43xx_dss__l3_main = {
+ .master = am43xx_dss_core_hwmod,
+ .slave = am33xx_l3_main_hwmod,
+ .clk= l3_gclk,
+ .user = OCP_USER_MPU | OCP_USER_SDMA,
+};
+
+static struct omap_hwmod_ocp_if am43xx_l4_ls__dss = {
+ .master = am33xx_l4_ls_hwmod,
+ .slave = am43xx_dss_core_hwmod,
+ .clk= l4ls_gclk,
+ .user = OCP_USER_MPU | OCP_USER_SDMA,
+};
+
+static struct omap_hwmod_ocp_if am43xx_l4_ls__dss_dispc = {
+ .master = am33xx_l4_ls_hwmod,
+ .slave = am43xx_dss_dispc_hwmod,
+ .clk= l4ls_gclk,
+ .user = OCP_USER_MPU | OCP_USER_SDMA,
+};
+
+static struct omap_hwmod_ocp_if am43xx_l4_ls__dss_rfbi = {
+ .master = am33xx_l4_ls_hwmod,
+ .slave = am43xx_dss_rfbi_hwmod,
+ .clk= l4ls_gclk,
+ .user = OCP_USER_MPU | OCP_USER_SDMA,
+};
+
static struct omap_hwmod_ocp_if *am43xx_hwmod_ocp_ifs[] __initdata = {
am33xx_l4_wkup__synctimer,
am43xx_l4_ls__timer8,
@@ -748,6 +842,10 @@ static struct omap_hwmod_ocp_if *am43xx_hwmod_ocp_ifs[]
__initdata = {
am43xx_l4_ls__ocp2scp1
Re: [PATCH 0/2] OMAP2+: optional clock handling fixes
On Thursday 08 May 2014 05:38 AM, Paul Walmsley wrote: Hi Rajendra, On Wed, 23 Apr 2014, Rajendra Nayak wrote: The patches fix some opt clock handling in gpio and in hwmod. Rajendra Nayak (2): gpio: omap: prepare and unprepare the debounce clock ARM: OMAP2+: hwmod: Don't leave the optional clocks in clk_prepare()ed state arch/arm/mach-omap2/omap_hwmod.c | 13 ++--- drivers/gpio/gpio-omap.c | 10 +- 2 files changed, 7 insertions(+), 16 deletions(-) Can these patches be merged separately? Looks to me that the two options are either to: A. to merge them together, or B. to merge patch 1 first, then patch 2 Thats right. Or will things break if only patch 1 is merged? Things will break if only patch 2 is merged as gpios clk_enable() request would fail. Merging only patch 1 has no issues. If we merge them together, I'd say the best situation would be to take them through the OMAP tree, since the changes are all OMAP-specific. In that case we'll want an ack for the first patch from the GPIO maintainers, Linus Walleij linus.wall...@linaro.org and Alexandre Courbot gnu...@gmail.com. Otherwise the path of least resistance would be (B) - you can get patch 1 merged via the GPIO tree. The GPIO maintainers can then provide a stable branch for us to base our changes on, or we can wait until the change reaches Linus. Then we can subsequently merge patch 2 via the OMAP side. Thoughts? I am fine either way. I will check with Linus W. what he prefers. Thanks. regards, Rajendra - Paul -- To unsubscribe from this list: send the line unsubscribe linux-omap in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
Re: [PATCH 1/2] gpio: omap: prepare and unprepare the debounce clock
On Wednesday 23 April 2014 11:41 AM, Rajendra Nayak wrote:
Replace the clk_enable()s with a clk_prepare_enable() and
the clk_disables()s with a clk_disable_unprepare()
This never showed issues due to the OMAP platform code (hwmod)
leaving these clocks in clk_prepare()ed state by default.
Reported-by: Kishon Vijay Abraham I kis...@ti.com
Signed-off-by: Rajendra Nayak rna...@ti.com
Cc: linux-g...@vger.kernel.org
Cc: Santosh Shilimkar santosh.shilim...@ti.com
Cc: Kevin Hilman khil...@deeprootsystems.com
Linus,
Do you mind picking this fix up via the GPIO tree? Alternatively you could
Ack this if you are fine and we can take both Patch 1/2 and Patch 2/2 from this
series via the OMAP tree.
Patch 2/2 has a dependency on Patch 1/2 and they need to go in in that order
else
gpio would break. More discussions are here [1].
Let us know what you think. Thanks.
regards,
Rajendra
[1] http://www.mail-archive.com/linux-gpio@vger.kernel.org/msg02801.html
---
drivers/gpio/gpio-omap.c | 10 +-
1 file changed, 5 insertions(+), 5 deletions(-)
diff --git a/drivers/gpio/gpio-omap.c b/drivers/gpio/gpio-omap.c
index 19b886c..78bc5a4 100644
--- a/drivers/gpio/gpio-omap.c
+++ b/drivers/gpio/gpio-omap.c
@@ -180,7 +180,7 @@ static inline void _gpio_rmw(void __iomem *base, u32 reg,
u32 mask, bool set)
static inline void _gpio_dbck_enable(struct gpio_bank *bank)
{
if (bank-dbck_enable_mask !bank-dbck_enabled) {
- clk_enable(bank-dbck);
+ clk_prepare_enable(bank-dbck);
bank-dbck_enabled = true;
writel_relaxed(bank-dbck_enable_mask,
@@ -198,7 +198,7 @@ static inline void _gpio_dbck_disable(struct gpio_bank
*bank)
*/
writel_relaxed(0, bank-base + bank-regs-debounce_en);
- clk_disable(bank-dbck);
+ clk_disable_unprepare(bank-dbck);
bank-dbck_enabled = false;
}
}
@@ -231,7 +231,7 @@ static void _set_gpio_debounce(struct gpio_bank *bank,
unsigned gpio,
l = GPIO_BIT(bank, gpio);
- clk_enable(bank-dbck);
+ clk_prepare_enable(bank-dbck);
reg = bank-base + bank-regs-debounce;
writel_relaxed(debounce, reg);
@@ -245,7 +245,7 @@ static void _set_gpio_debounce(struct gpio_bank *bank,
unsigned gpio,
bank-dbck_enable_mask = val;
writel_relaxed(val, reg);
- clk_disable(bank-dbck);
+ clk_disable_unprepare(bank-dbck);
/*
* Enable debounce clock per module.
* This call is mandatory because in omap_gpio_request() when
@@ -290,7 +290,7 @@ static void _clear_gpio_debounce(struct gpio_bank *bank,
unsigned gpio)
bank-context.debounce = 0;
writel_relaxed(bank-context.debounce, bank-base +
bank-regs-debounce);
- clk_disable(bank-dbck);
+ clk_disable_unprepare(bank-dbck);
bank-dbck_enabled = false;
}
}
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Re: [PATCH 1/2] gpio: omap: prepare and unprepare the debounce clock
On Thursday 08 May 2014 02:56 PM, Javier Martinez Canillas wrote:
Hello Rajendra,
On Thu, May 8, 2014 at 9:06 AM, Rajendra Nayak rna...@ti.com wrote:
On Wednesday 23 April 2014 11:41 AM, Rajendra Nayak wrote:
Replace the clk_enable()s with a clk_prepare_enable() and
the clk_disables()s with a clk_disable_unprepare()
This never showed issues due to the OMAP platform code (hwmod)
leaving these clocks in clk_prepare()ed state by default.
Reported-by: Kishon Vijay Abraham I kis...@ti.com
Signed-off-by: Rajendra Nayak rna...@ti.com
Cc: linux-g...@vger.kernel.org
Cc: Santosh Shilimkar santosh.shilim...@ti.com
Cc: Kevin Hilman khil...@deeprootsystems.com
Linus,
Do you mind picking this fix up via the GPIO tree? Alternatively you could
Ack this if you are fine and we can take both Patch 1/2 and Patch 2/2 from
this
series via the OMAP tree.
Patch 2/2 has a dependency on Patch 1/2 and they need to go in in that order
else
gpio would break. More discussions are here [1].
Let us know what you think. Thanks.
I wonder if that is really the case. Your Patch 2/2 removes the call
to clk_prepare on _init_opt_clks() but it also replaces
clk_{enable,disable} with clk_prepare_enable()/clk_disable_unprepare()
on _enable_optional_clocks() and _disable_optional_clocks()
respectively.
Right, the difference being, by the time hwmod is done enabling/disabling
the opt clocks, without patch 2/2, the prepare count is 1, with patch 2/2
prepare count is 0.
And GPIO banks are reset by hwmod on init which as far as I know
happen very early before the GPIO OMAP driver is even probed so by the
time clk_enable() is called on the GPIO driver the clock will already
be prepared by _enable_optional_clocks(). I tested linux-gpio/devel
and unprepared by _disable_optional_clocks()?
branch + only your Patch 2/2 and the GPIOs were working correctly on a
OMAP3 board.
Did gpio_debounce() ever get called for any of the gpios?
So I think that there isn't a strict dependency between these two
patches or am I missing something?
In fact now that I think about it I wonder what's the functional
change of your Patch 2/2 since hwmod is still calling clk_prepare()
before the driver. If the clocks should actually be controlled by the
I don't understand why you say 'before the driver'. Hwmod needs to control
optional clocks for some devices in order to do a ocp reset. So it does
touch these optional clocks, but if you look at the code it subsequently
also disables (and unprepares with patch 2/2) these clocks before returning
the control to the driver.
drivers like you said then I think that we should remove
_{enable,disable}_optional_clocks() completely and let the drivers do
the clock prepare and enable like is made on your Patch 1/2 for the
GPIO driver.
What do you think about it?
Best regards,
Javier
regards,
Rajendra
[1] http://www.mail-archive.com/linux-gpio@vger.kernel.org/msg02801.html
---
drivers/gpio/gpio-omap.c | 10 +-
1 file changed, 5 insertions(+), 5 deletions(-)
diff --git a/drivers/gpio/gpio-omap.c b/drivers/gpio/gpio-omap.c
index 19b886c..78bc5a4 100644
--- a/drivers/gpio/gpio-omap.c
+++ b/drivers/gpio/gpio-omap.c
@@ -180,7 +180,7 @@ static inline void _gpio_rmw(void __iomem *base, u32
reg, u32 mask, bool set)
static inline void _gpio_dbck_enable(struct gpio_bank *bank)
{
if (bank-dbck_enable_mask !bank-dbck_enabled) {
- clk_enable(bank-dbck);
+ clk_prepare_enable(bank-dbck);
bank-dbck_enabled = true;
writel_relaxed(bank-dbck_enable_mask,
@@ -198,7 +198,7 @@ static inline void _gpio_dbck_disable(struct gpio_bank
*bank)
*/
writel_relaxed(0, bank-base + bank-regs-debounce_en);
- clk_disable(bank-dbck);
+ clk_disable_unprepare(bank-dbck);
bank-dbck_enabled = false;
}
}
@@ -231,7 +231,7 @@ static void _set_gpio_debounce(struct gpio_bank *bank,
unsigned gpio,
l = GPIO_BIT(bank, gpio);
- clk_enable(bank-dbck);
+ clk_prepare_enable(bank-dbck);
reg = bank-base + bank-regs-debounce;
writel_relaxed(debounce, reg);
@@ -245,7 +245,7 @@ static void _set_gpio_debounce(struct gpio_bank *bank,
unsigned gpio,
bank-dbck_enable_mask = val;
writel_relaxed(val, reg);
- clk_disable(bank-dbck);
+ clk_disable_unprepare(bank-dbck);
/*
* Enable debounce clock per module.
* This call is mandatory because in omap_gpio_request() when
@@ -290,7 +290,7 @@ static void _clear_gpio_debounce(struct gpio_bank
*bank, unsigned gpio)
bank-context.debounce = 0;
writel_relaxed(bank-context.debounce, bank-base +
bank-regs-debounce);
- clk_disable(bank-dbck);
+ clk_disable_unprepare(bank-dbck);
bank-dbck_enabled = false
Re: [PATCH 1/2] gpio: omap: prepare and unprepare the debounce clock
On Thursday 08 May 2014 05:34 PM, Javier Martinez Canillas wrote:
Hello Rajendra,
On Thu, May 8, 2014 at 1:10 PM, Rajendra Nayak rna...@ti.com wrote:
On Thursday 08 May 2014 02:56 PM, Javier Martinez Canillas wrote:
Hello Rajendra,
On Thu, May 8, 2014 at 9:06 AM, Rajendra Nayak rna...@ti.com wrote:
On Wednesday 23 April 2014 11:41 AM, Rajendra Nayak wrote:
Replace the clk_enable()s with a clk_prepare_enable() and
the clk_disables()s with a clk_disable_unprepare()
This never showed issues due to the OMAP platform code (hwmod)
leaving these clocks in clk_prepare()ed state by default.
Reported-by: Kishon Vijay Abraham I kis...@ti.com
Signed-off-by: Rajendra Nayak rna...@ti.com
Cc: linux-g...@vger.kernel.org
Cc: Santosh Shilimkar santosh.shilim...@ti.com
Cc: Kevin Hilman khil...@deeprootsystems.com
Linus,
Do you mind picking this fix up via the GPIO tree? Alternatively you could
Ack this if you are fine and we can take both Patch 1/2 and Patch 2/2 from
this
series via the OMAP tree.
Patch 2/2 has a dependency on Patch 1/2 and they need to go in in that
order else
gpio would break. More discussions are here [1].
Let us know what you think. Thanks.
I wonder if that is really the case. Your Patch 2/2 removes the call
to clk_prepare on _init_opt_clks() but it also replaces
clk_{enable,disable} with clk_prepare_enable()/clk_disable_unprepare()
on _enable_optional_clocks() and _disable_optional_clocks()
respectively.
Right, the difference being, by the time hwmod is done enabling/disabling
the opt clocks, without patch 2/2, the prepare count is 1, with patch 2/2
prepare count is 0.
Ok, got it now.
And GPIO banks are reset by hwmod on init which as far as I know
happen very early before the GPIO OMAP driver is even probed so by the
time clk_enable() is called on the GPIO driver the clock will already
be prepared by _enable_optional_clocks(). I tested linux-gpio/devel
and unprepared by _disable_optional_clocks()?
I see that _disable_optional_clocks() is called as well so the clock
is left unprepared as you said.
branch + only your Patch 2/2 and the GPIOs were working correctly on a
OMAP3 board.
Did gpio_debounce() ever get called for any of the gpios?
I don't see gpio_debounce() to be called indeed.
omap_gpio_runtime_resume() is executed and calls
_gpio_dbck_enable(bank) but clk_enable(bank-dbck) is not called since
bank-dbck_enable_mask is 0, that was my confusion since I thought
that clk_enable() was called.
Now I understand the dependency between the two patches.
So I think that there isn't a strict dependency between these two
patches or am I missing something?
In fact now that I think about it I wonder what's the functional
change of your Patch 2/2 since hwmod is still calling clk_prepare()
before the driver. If the clocks should actually be controlled by the
I don't understand why you say 'before the driver'. Hwmod needs to control
optional clocks for some devices in order to do a ocp reset. So it does
touch these optional clocks, but if you look at the code it subsequently
also disables (and unprepares with patch 2/2) these clocks before returning
the control to the driver.
Right, it was just me getting confused by the interaction between
hwmod and the GPIO driver. Thanks a lot for the explanation and sorry
for the noise.
No issues, thanks for the review and ack.
Feel free to add my:
Acked-by: Javier Martinez Canillas jav...@dowhile0.org
Best regards,
Javier
drivers like you said then I think that we should remove
_{enable,disable}_optional_clocks() completely and let the drivers do
the clock prepare and enable like is made on your Patch 1/2 for the
GPIO driver.
What do you think about it?
Best regards,
Javier
regards,
Rajendra
[1] http://www.mail-archive.com/linux-gpio@vger.kernel.org/msg02801.html
---
drivers/gpio/gpio-omap.c | 10 +-
1 file changed, 5 insertions(+), 5 deletions(-)
diff --git a/drivers/gpio/gpio-omap.c b/drivers/gpio/gpio-omap.c
index 19b886c..78bc5a4 100644
--- a/drivers/gpio/gpio-omap.c
+++ b/drivers/gpio/gpio-omap.c
@@ -180,7 +180,7 @@ static inline void _gpio_rmw(void __iomem *base, u32
reg, u32 mask, bool set)
static inline void _gpio_dbck_enable(struct gpio_bank *bank)
{
if (bank-dbck_enable_mask !bank-dbck_enabled) {
- clk_enable(bank-dbck);
+ clk_prepare_enable(bank-dbck);
bank-dbck_enabled = true;
writel_relaxed(bank-dbck_enable_mask,
@@ -198,7 +198,7 @@ static inline void _gpio_dbck_disable(struct
gpio_bank *bank)
*/
writel_relaxed(0, bank-base + bank-regs-debounce_en);
- clk_disable(bank-dbck);
+ clk_disable_unprepare(bank-dbck);
bank-dbck_enabled = false;
}
}
@@ -231,7 +231,7 @@ static void _set_gpio_debounce(struct gpio_bank
*bank, unsigned gpio,
l = GPIO_BIT(bank
Re: [PATCH v4 5/5] ARM: DRA7: Add support for soc_is_dra74x() and soc_is_dra72x() varients
On Tuesday 06 May 2014 09:58 PM, Tony Lindgren wrote: * Rajendra Nayak rna...@ti.com [140429 04:22]: On Tuesday 29 April 2014 04:48 PM, Arnd Bergmann wrote: On Tuesday 29 April 2014 16:35:13 Rajendra Nayak wrote: @@ -393,7 +395,12 @@ IS_OMAP_TYPE(3430, 0x3430) #if defined(CONFIG_SOC_DRA7XX) #undef soc_is_dra7xx +#undef soc_is_dra74x +#undef soc_is_dra72x #define soc_is_dra7xx()(of_machine_is_compatible(ti,dra7)) +#define soc_is_dra74x()(of_machine_is_compatible(ti,dra74)) +#define soc_is_dra72x()(of_machine_is_compatible(ti,dra72)) + You shouldn't normally have to define these. Why are they needed? Maybe it's better to wait for a user to show up, and then we can decide whether we actually want to have them this way, or if there is a better solution for the particular use case. Normally, we'd want to make run-time decisions based on properties of the nodes a driver is working on, not the global machine compatible string. Yeah, actually this can be dropped. There is no user for it now. OK applying all but the last patch into omap-for-v3.16/dt branch, it seems there's no need to separate out the fixes in this case. Thanks Tony. Regards, Tony -- To unsubscribe from this list: send the line unsubscribe linux-omap in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
Re: [PATCH v4 0/5] ARM: DRA7: Add support for DRA72x devices
On Tuesday 29 April 2014 04:35 PM, Rajendra Nayak wrote: changes in v4: -1- used full SoC names in compatibles eg ti,dra742 and ti,dra722 -2- Created a seperate patch for replacing __initdata with __initconst changes in v3: Removed wildcards from compatible strings and duplicates from .dt_compat strings as suggested by Arnd DRA72x devices are single core Cortex A15 devices belonging to the DRA7 family (Similar to the DRA74x devices which are dual core Cortex A15 based) The patches (based off 3.15-rc3) add minimal DT/kernel modifications to add boot support on DRA722 device reusing all the kernel data for DRA742 device. Tony, Can this series be pulled in for 3.16? Patch 2/5 and 4/5 are acked by Arnd. Patch 5/5 can be dropped since there are no users for soc_is_dra7**() at the moment. Rajendra Nayak (5): ARM: dts: dra7-evm: Remove the wrong and undocumented compatible ARM: dts: Add support for DRA72x family of devices ARM: OMAP2+: Replace all __initdata with __initconst for const init ARM: OMAP2+: Add machine entry for dra72x devices ARM: DRA7: Add support for soc_is_dra74x() and soc_is_dra72x() varients .../devicetree/bindings/arm/omap/omap.txt | 12 -- arch/arm/boot/dts/Makefile |3 +- arch/arm/boot/dts/dra7-evm.dts |6 +-- arch/arm/boot/dts/dra7.dtsi| 27 arch/arm/boot/dts/dra72-evm.dts| 24 +++ arch/arm/boot/dts/dra72x.dtsi | 25 +++ arch/arm/boot/dts/dra74x.dtsi | 41 ++ arch/arm/mach-omap2/board-generic.c| 45 ++-- arch/arm/mach-omap2/soc.h |7 +++ 9 files changed, 142 insertions(+), 48 deletions(-) create mode 100644 arch/arm/boot/dts/dra72-evm.dts create mode 100644 arch/arm/boot/dts/dra72x.dtsi create mode 100644 arch/arm/boot/dts/dra74x.dtsi -- To unsubscribe from this list: send the line unsubscribe linux-omap in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
[PATCH v4 4/5] ARM: OMAP2+: Add machine entry for dra72x devices
The only difference from the dra74x devices is the missing .smp entry.
Signed-off-by: Rajendra Nayak rna...@ti.com
---
arch/arm/mach-omap2/board-generic.c | 25 +
1 file changed, 21 insertions(+), 4 deletions(-)
diff --git a/arch/arm/mach-omap2/board-generic.c
b/arch/arm/mach-omap2/board-generic.c
index 90dbfdf..238ab0a 100644
--- a/arch/arm/mach-omap2/board-generic.c
+++ b/arch/arm/mach-omap2/board-generic.c
@@ -240,13 +240,13 @@ MACHINE_END
#endif
#ifdef CONFIG_SOC_DRA7XX
-static const char *dra7xx_boards_compat[] __initconst = {
- ti,dra7xx,
+static const char *dra74x_boards_compat[] __initconst = {
+ ti,dra742,
ti,dra7,
NULL,
};
-DT_MACHINE_START(DRA7XX_DT, Generic DRA7XX (Flattened Device Tree))
+DT_MACHINE_START(DRA74X_DT, Generic DRA74X (Flattened Device Tree))
.reserve= omap_reserve,
.smp= smp_ops(omap4_smp_ops),
.map_io = omap5_map_io,
@@ -255,7 +255,24 @@ DT_MACHINE_START(DRA7XX_DT, Generic DRA7XX (Flattened
Device Tree))
.init_irq = omap_gic_of_init,
.init_machine = omap_generic_init,
.init_time = omap5_realtime_timer_init,
- .dt_compat = dra7xx_boards_compat,
+ .dt_compat = dra74x_boards_compat,
+ .restart= omap44xx_restart,
+MACHINE_END
+
+static const char *dra72x_boards_compat[] __initconst = {
+ ti,dra722,
+ NULL,
+};
+
+DT_MACHINE_START(DRA72X_DT, Generic DRA72X (Flattened Device Tree))
+ .reserve= omap_reserve,
+ .map_io = omap5_map_io,
+ .init_early = dra7xx_init_early,
+ .init_late = dra7xx_init_late,
+ .init_irq = omap_gic_of_init,
+ .init_machine = omap_generic_init,
+ .init_time = omap5_realtime_timer_init,
+ .dt_compat = dra72x_boards_compat,
.restart= omap44xx_restart,
MACHINE_END
#endif
--
1.7.9.5
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[PATCH v4 3/5] ARM: OMAP2+: Replace all __initdata with __initconst for const init
Use of const init definition must use __initconst so replace
all such instances where __initdata is used.
Signed-off-by: Rajendra Nayak rna...@ti.com
---
arch/arm/mach-omap2/board-generic.c | 22 +++---
1 file changed, 11 insertions(+), 11 deletions(-)
diff --git a/arch/arm/mach-omap2/board-generic.c
b/arch/arm/mach-omap2/board-generic.c
index b8920b6..90dbfdf 100644
--- a/arch/arm/mach-omap2/board-generic.c
+++ b/arch/arm/mach-omap2/board-generic.c
@@ -43,7 +43,7 @@ static void __init omap_generic_init(void)
}
#ifdef CONFIG_SOC_OMAP2420
-static const char *omap242x_boards_compat[] __initdata = {
+static const char *omap242x_boards_compat[] __initconst = {
ti,omap2420,
NULL,
};
@@ -62,7 +62,7 @@ MACHINE_END
#endif
#ifdef CONFIG_SOC_OMAP2430
-static const char *omap243x_boards_compat[] __initdata = {
+static const char *omap243x_boards_compat[] __initconst = {
ti,omap2430,
NULL,
};
@@ -81,7 +81,7 @@ MACHINE_END
#endif
#ifdef CONFIG_ARCH_OMAP3
-static const char *omap3_boards_compat[] __initdata = {
+static const char *omap3_boards_compat[] __initconst = {
ti,omap3430,
ti,omap3,
NULL,
@@ -100,7 +100,7 @@ DT_MACHINE_START(OMAP3_DT, Generic OMAP3 (Flattened Device
Tree))
.restart= omap3xxx_restart,
MACHINE_END
-static const char *omap36xx_boards_compat[] __initdata = {
+static const char *omap36xx_boards_compat[] __initconst = {
ti,omap36xx,
NULL,
};
@@ -118,7 +118,7 @@ DT_MACHINE_START(OMAP36XX_DT, Generic OMAP36xx (Flattened
Device Tree))
.restart= omap3xxx_restart,
MACHINE_END
-static const char *omap3_gp_boards_compat[] __initdata = {
+static const char *omap3_gp_boards_compat[] __initconst = {
ti,omap3-beagle,
timll,omap3-devkit8000,
NULL,
@@ -137,7 +137,7 @@ DT_MACHINE_START(OMAP3_GP_DT, Generic OMAP3-GP (Flattened
Device Tree))
.restart= omap3xxx_restart,
MACHINE_END
-static const char *am3517_boards_compat[] __initdata = {
+static const char *am3517_boards_compat[] __initconst = {
ti,am3517,
NULL,
};
@@ -157,7 +157,7 @@ MACHINE_END
#endif
#ifdef CONFIG_SOC_AM33XX
-static const char *am33xx_boards_compat[] __initdata = {
+static const char *am33xx_boards_compat[] __initconst = {
ti,am33xx,
NULL,
};
@@ -177,7 +177,7 @@ MACHINE_END
#endif
#ifdef CONFIG_ARCH_OMAP4
-static const char *omap4_boards_compat[] __initdata = {
+static const char *omap4_boards_compat[] __initconst = {
ti,omap4460,
ti,omap4430,
ti,omap4,
@@ -199,7 +199,7 @@ MACHINE_END
#endif
#ifdef CONFIG_SOC_OMAP5
-static const char *omap5_boards_compat[] __initdata = {
+static const char *omap5_boards_compat[] __initconst = {
ti,omap5432,
ti,omap5430,
ti,omap5,
@@ -221,7 +221,7 @@ MACHINE_END
#endif
#ifdef CONFIG_SOC_AM43XX
-static const char *am43_boards_compat[] __initdata = {
+static const char *am43_boards_compat[] __initconst = {
ti,am4372,
ti,am43,
NULL,
@@ -240,7 +240,7 @@ MACHINE_END
#endif
#ifdef CONFIG_SOC_DRA7XX
-static const char *dra7xx_boards_compat[] __initdata = {
+static const char *dra7xx_boards_compat[] __initconst = {
ti,dra7xx,
ti,dra7,
NULL,
--
1.7.9.5
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[PATCH v4 5/5] ARM: DRA7: Add support for soc_is_dra74x() and soc_is_dra72x() varients
Use the corresponding compatibles to identify the devices. Signed-off-by: Rajendra Nayak rna...@ti.com --- arch/arm/mach-omap2/soc.h |7 +++ 1 file changed, 7 insertions(+) diff --git a/arch/arm/mach-omap2/soc.h b/arch/arm/mach-omap2/soc.h index 30abcc8..5ff724e 100644 --- a/arch/arm/mach-omap2/soc.h +++ b/arch/arm/mach-omap2/soc.h @@ -245,6 +245,8 @@ IS_AM_SUBCLASS(437x, 0x437) #define soc_is_omap54xx() 0 #define soc_is_omap543x() 0 #define soc_is_dra7xx()0 +#define soc_is_dra74x()0 +#define soc_is_dra72x()0 #if defined(MULTI_OMAP2) # if defined(CONFIG_ARCH_OMAP2) @@ -393,7 +395,12 @@ IS_OMAP_TYPE(3430, 0x3430) #if defined(CONFIG_SOC_DRA7XX) #undef soc_is_dra7xx +#undef soc_is_dra74x +#undef soc_is_dra72x #define soc_is_dra7xx()(of_machine_is_compatible(ti,dra7)) +#define soc_is_dra74x()(of_machine_is_compatible(ti,dra74)) +#define soc_is_dra72x()(of_machine_is_compatible(ti,dra72)) + #endif /* Various silicon revisions for omap2 */ -- 1.7.9.5 -- To unsubscribe from this list: send the line unsubscribe linux-omap in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
[PATCH v4 0/5] ARM: DRA7: Add support for DRA72x devices
changes in v4: -1- used full SoC names in compatibles eg ti,dra742 and ti,dra722 -2- Created a seperate patch for replacing __initdata with __initconst changes in v3: Removed wildcards from compatible strings and duplicates from .dt_compat strings as suggested by Arnd DRA72x devices are single core Cortex A15 devices belonging to the DRA7 family (Similar to the DRA74x devices which are dual core Cortex A15 based) The patches (based off 3.15-rc3) add minimal DT/kernel modifications to add boot support on DRA722 device reusing all the kernel data for DRA742 device. Rajendra Nayak (5): ARM: dts: dra7-evm: Remove the wrong and undocumented compatible ARM: dts: Add support for DRA72x family of devices ARM: OMAP2+: Replace all __initdata with __initconst for const init ARM: OMAP2+: Add machine entry for dra72x devices ARM: DRA7: Add support for soc_is_dra74x() and soc_is_dra72x() varients .../devicetree/bindings/arm/omap/omap.txt | 12 -- arch/arm/boot/dts/Makefile |3 +- arch/arm/boot/dts/dra7-evm.dts |6 +-- arch/arm/boot/dts/dra7.dtsi| 27 arch/arm/boot/dts/dra72-evm.dts| 24 +++ arch/arm/boot/dts/dra72x.dtsi | 25 +++ arch/arm/boot/dts/dra74x.dtsi | 41 ++ arch/arm/mach-omap2/board-generic.c| 45 ++-- arch/arm/mach-omap2/soc.h |7 +++ 9 files changed, 142 insertions(+), 48 deletions(-) create mode 100644 arch/arm/boot/dts/dra72-evm.dts create mode 100644 arch/arm/boot/dts/dra72x.dtsi create mode 100644 arch/arm/boot/dts/dra74x.dtsi -- 1.7.9.5 -- To unsubscribe from this list: send the line unsubscribe linux-omap in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
[PATCH v4 1/5] ARM: dts: dra7-evm: Remove the wrong and undocumented compatible
ti,dra752 is neither documented nor correct, since the device is actually a
dra742 device as rightly documented in dt bindings.
Signed-off-by: Rajendra Nayak rna...@ti.com
Cc: devicet...@vger.kernel.org
---
arch/arm/boot/dts/dra7-evm.dts |2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/arch/arm/boot/dts/dra7-evm.dts b/arch/arm/boot/dts/dra7-evm.dts
index 5babba0..7807429 100644
--- a/arch/arm/boot/dts/dra7-evm.dts
+++ b/arch/arm/boot/dts/dra7-evm.dts
@@ -11,7 +11,7 @@
/ {
model = TI DRA7;
- compatible = ti,dra7-evm, ti,dra752, ti,dra7;
+ compatible = ti,dra7-evm, ti,dra7;
memory {
device_type = memory;
--
1.7.9.5
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[PATCH v4 2/5] ARM: dts: Add support for DRA72x family of devices
DRA722 is part of DRA72x family which are single core cortex A15 devices
with most infrastructure IPs otherwise same as whats on the DRA74x family.
So move the cpu nodes into dra74x.dtsi and dra72x.dtsi respectively.
Also add a minimal dra72-evm dts file.
Signed-off-by: Rajendra Nayak rna...@ti.com
Cc: linux-...@vger.kernel.org
Cc: devicet...@vger.kernel.org
---
.../devicetree/bindings/arm/omap/omap.txt | 12 --
arch/arm/boot/dts/Makefile |3 +-
arch/arm/boot/dts/dra7-evm.dts |6 +--
arch/arm/boot/dts/dra7.dtsi| 27 -
arch/arm/boot/dts/dra72-evm.dts| 24
arch/arm/boot/dts/dra72x.dtsi | 25
arch/arm/boot/dts/dra74x.dtsi | 41
7 files changed, 104 insertions(+), 34 deletions(-)
create mode 100644 arch/arm/boot/dts/dra72-evm.dts
create mode 100644 arch/arm/boot/dts/dra72x.dtsi
create mode 100644 arch/arm/boot/dts/dra74x.dtsi
diff --git a/Documentation/devicetree/bindings/arm/omap/omap.txt
b/Documentation/devicetree/bindings/arm/omap/omap.txt
index 36ede19..3bad259 100644
--- a/Documentation/devicetree/bindings/arm/omap/omap.txt
+++ b/Documentation/devicetree/bindings/arm/omap/omap.txt
@@ -80,7 +80,10 @@ SoCs:
compatible = ti,omap5432, ti,omap5
- DRA742
- compatible = ti,dra7xx, ti,dra7
+ compatible = ti,dra742, ti,dra74, ti,dra7
+
+- DRA722
+ compatible = ti,dra722, ti,dra72, ti,dra7
- AM4372
compatible = ti,am4372, ti,am43
@@ -120,5 +123,8 @@ Boards:
- AM437x GP EVM
compatible = ti,am437x-gp-evm, ti,am4372, ti,am43
-- DRA7 EVM: Software Developement Board for DRA7XX
- compatible = ti,dra7-evm, ti,dra7
+- DRA742 EVM: Software Developement Board for DRA742
+ compatible = ti,dra7-evm, ti,dra742, ti,dra74, ti,dra7
+
+- DRA722 EVM: Software Development Board for DRA722
+ compatible = ti,dra72-evm, ti,dra722, ti,dra72, ti,dra7
diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile
index 35c146f..ff98a97 100644
--- a/arch/arm/boot/dts/Makefile
+++ b/arch/arm/boot/dts/Makefile
@@ -288,7 +288,8 @@ dtb-$(CONFIG_ARCH_OMAP2PLUS) += omap2420-h4.dtb \
am3517_mt_ventoux.dtb \
am43x-epos-evm.dtb \
am437x-gp-evm.dtb \
- dra7-evm.dtb
+ dra7-evm.dtb \
+ dra72-evm.dtb
dtb-$(CONFIG_ARCH_ORION5X) += orion5x-lacie-ethernet-disk-mini-v2.dtb
dtb-$(CONFIG_ARCH_PRIMA2) += prima2-evb.dtb
dtb-$(CONFIG_ARCH_QCOM) += qcom-msm8660-surf.dtb \
diff --git a/arch/arm/boot/dts/dra7-evm.dts b/arch/arm/boot/dts/dra7-evm.dts
index 7807429..39b718a 100644
--- a/arch/arm/boot/dts/dra7-evm.dts
+++ b/arch/arm/boot/dts/dra7-evm.dts
@@ -7,11 +7,11 @@
*/
/dts-v1/;
-#include dra7.dtsi
+#include dra74x.dtsi
/ {
- model = TI DRA7;
- compatible = ti,dra7-evm, ti,dra7;
+ model = TI DRA742;
+ compatible = ti,dra7-evm, ti,dra742, ti,dra74, ti,dra7;
memory {
device_type = memory;
diff --git a/arch/arm/boot/dts/dra7.dtsi b/arch/arm/boot/dts/dra7.dtsi
index 1c0f8e1..e27fec7 100644
--- a/arch/arm/boot/dts/dra7.dtsi
+++ b/arch/arm/boot/dts/dra7.dtsi
@@ -33,33 +33,6 @@
serial5 = uart6;
};
- cpus {
- #address-cells = 1;
- #size-cells = 0;
-
- cpu0: cpu@0 {
- device_type = cpu;
- compatible = arm,cortex-a15;
- reg = 0;
-
- operating-points =
- /* kHzuV */
- 100 106
- 1176000 116
- ;
-
- clocks = dpll_mpu_ck;
- clock-names = cpu;
-
- clock-latency = 30; /* From omap-cpufreq driver */
- };
- cpu@1 {
- device_type = cpu;
- compatible = arm,cortex-a15;
- reg = 1;
- };
- };
-
timer {
compatible = arm,armv7-timer;
interrupts = GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(2) |
IRQ_TYPE_LEVEL_LOW),
diff --git a/arch/arm/boot/dts/dra72-evm.dts b/arch/arm/boot/dts/dra72-evm.dts
new file mode 100644
index 000..5147023
--- /dev/null
+++ b/arch/arm/boot/dts/dra72-evm.dts
@@ -0,0 +1,24 @@
+/*
+ * Copyright (C) 2014 Texas Instruments Incorporated - http://www.ti.com/
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+/dts-v1/;
+
+#include dra72x.dtsi
+
+/ {
+ model = TI DRA722;
+ compatible = ti,dra72-evm, ti,dra722, ti,dra72, ti,dra7;
+
+ memory {
+ device_type = memory;
+ reg = 0x8000 0x4000; /* 1024 MB
Re: [PATCH v4 5/5] ARM: DRA7: Add support for soc_is_dra74x() and soc_is_dra72x() varients
On Tuesday 29 April 2014 04:48 PM, Arnd Bergmann wrote: On Tuesday 29 April 2014 16:35:13 Rajendra Nayak wrote: @@ -393,7 +395,12 @@ IS_OMAP_TYPE(3430, 0x3430) #if defined(CONFIG_SOC_DRA7XX) #undef soc_is_dra7xx +#undef soc_is_dra74x +#undef soc_is_dra72x #define soc_is_dra7xx()(of_machine_is_compatible(ti,dra7)) +#define soc_is_dra74x()(of_machine_is_compatible(ti,dra74)) +#define soc_is_dra72x()(of_machine_is_compatible(ti,dra72)) + You shouldn't normally have to define these. Why are they needed? Maybe it's better to wait for a user to show up, and then we can decide whether we actually want to have them this way, or if there is a better solution for the particular use case. Normally, we'd want to make run-time decisions based on properties of the nodes a driver is working on, not the global machine compatible string. Yeah, actually this can be dropped. There is no user for it now. Arnd -- To unsubscribe from this list: send the line unsubscribe linux-omap in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
Re: [PATCH v3 2/4] ARM: dts: Add support for DRA72x family of devices
On Thursday 24 April 2014 06:43 PM, Arnd Bergmann wrote: On Thursday 24 April 2014, Rajendra Nayak wrote: -- DRA742 - compatible = ti,dra7xx, ti,dra7 +- DRA74x + compatible = ti,dra74, ti,dra7 + +- DRA72x + compatible = ti,dra72, ti,dra7 Actually, what I meant was that you should list the fill name of the SoC, e.g. ti,dra742, not just ti,dra74. Leaving out the 'x' is not going to prevent this from breaking when you have a new dra745 that is incompatible. You can always list more strings, e.g. compatible = ti,dra745, ti,dra742, ti,dra74, ti,dra7; if you have a dra745 product that is fully compatible with dra742, but the important part here is that the first string must be the full name. Okay, I will update the device compatibles to something like this.. DRA742 compatible = ti,dra742, ti,dra74, ti,dra7 DRA722 compatible = ti,dra722, ti,dra72, ti,dra7 And the evm compatibles as DRA742 EVM: Software Developement Board for DRA742 compatible = ti,dra7-evm, ti,dra742, ti,dra74, ti,dra7 DRA722 EVM: Software Development Board for DRA722 compatible = ti,dra72-evm, ti,dra722, ti,dra72, ti,dra7 I was also calling the .dtsi files as dra72x.dtsi and dra74x.dtsi, do you suggest I call them dra742.dtsi and dra722.dtsi instead? Just that if we end up with a dra745 which is fully compatible with dra742, as you mentioned above, we would be using a dra742.dtsi for a dra745 device which could be a little confusing. Arnd -- To unsubscribe from this list: send the line unsubscribe linux-omap in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
Re: [PATCH v3 3/4] ARM: OMAP2+: Add machine entry for dra72x devices
On Thursday 24 April 2014 10:39 PM, Suman Anna wrote:
Hi Rajendra,
On 04/24/2014 05:06 AM, Nayak, Rajendra wrote:
The only difference from the dra74x devices is the missing .smp entry.
While at it, also fix the use of __initdata (across the file) and replace
them
with __initconst as reported by checkpatch
ERROR: Use of const init definition must use __initconst
+static const char *dra72x_boards_compat[] __initdata = {
Since it looks like you are gonna do another respin, care to separate
out the __initdata to __initconst change for existing ones into a
different patch, and limit this patch to just what the patch subject says.
Sure, I will, if that helps.
regards
Suman
Signed-off-by: Rajendra Nayak rna...@ti.com
---
arch/arm/mach-omap2/board-generic.c | 45
---
1 file changed, 31 insertions(+), 14 deletions(-)
diff --git a/arch/arm/mach-omap2/board-generic.c
b/arch/arm/mach-omap2/board-generic.c
index b8920b6..dabb9f6 100644
--- a/arch/arm/mach-omap2/board-generic.c
+++ b/arch/arm/mach-omap2/board-generic.c
@@ -43,7 +43,7 @@ static void __init omap_generic_init(void)
}
#ifdef CONFIG_SOC_OMAP2420
-static const char *omap242x_boards_compat[] __initdata = {
+static const char *omap242x_boards_compat[] __initconst = {
ti,omap2420,
NULL,
};
@@ -62,7 +62,7 @@ MACHINE_END
#endif
#ifdef CONFIG_SOC_OMAP2430
-static const char *omap243x_boards_compat[] __initdata = {
+static const char *omap243x_boards_compat[] __initconst = {
ti,omap2430,
NULL,
};
@@ -81,7 +81,7 @@ MACHINE_END
#endif
#ifdef CONFIG_ARCH_OMAP3
-static const char *omap3_boards_compat[] __initdata = {
+static const char *omap3_boards_compat[] __initconst = {
ti,omap3430,
ti,omap3,
NULL,
@@ -100,7 +100,7 @@ DT_MACHINE_START(OMAP3_DT, Generic OMAP3 (Flattened
Device Tree))
.restart= omap3xxx_restart,
MACHINE_END
-static const char *omap36xx_boards_compat[] __initdata = {
+static const char *omap36xx_boards_compat[] __initconst = {
ti,omap36xx,
NULL,
};
@@ -118,7 +118,7 @@ DT_MACHINE_START(OMAP36XX_DT, Generic OMAP36xx
(Flattened Device Tree))
.restart= omap3xxx_restart,
MACHINE_END
-static const char *omap3_gp_boards_compat[] __initdata = {
+static const char *omap3_gp_boards_compat[] __initconst = {
ti,omap3-beagle,
timll,omap3-devkit8000,
NULL,
@@ -137,7 +137,7 @@ DT_MACHINE_START(OMAP3_GP_DT, Generic OMAP3-GP
(Flattened Device Tree))
.restart= omap3xxx_restart,
MACHINE_END
-static const char *am3517_boards_compat[] __initdata = {
+static const char *am3517_boards_compat[] __initconst = {
ti,am3517,
NULL,
};
@@ -157,7 +157,7 @@ MACHINE_END
#endif
#ifdef CONFIG_SOC_AM33XX
-static const char *am33xx_boards_compat[] __initdata = {
+static const char *am33xx_boards_compat[] __initconst = {
ti,am33xx,
NULL,
};
@@ -177,7 +177,7 @@ MACHINE_END
#endif
#ifdef CONFIG_ARCH_OMAP4
-static const char *omap4_boards_compat[] __initdata = {
+static const char *omap4_boards_compat[] __initconst = {
ti,omap4460,
ti,omap4430,
ti,omap4,
@@ -199,7 +199,7 @@ MACHINE_END
#endif
#ifdef CONFIG_SOC_OMAP5
-static const char *omap5_boards_compat[] __initdata = {
+static const char *omap5_boards_compat[] __initconst = {
ti,omap5432,
ti,omap5430,
ti,omap5,
@@ -221,7 +221,7 @@ MACHINE_END
#endif
#ifdef CONFIG_SOC_AM43XX
-static const char *am43_boards_compat[] __initdata = {
+static const char *am43_boards_compat[] __initconst = {
ti,am4372,
ti,am43,
NULL,
@@ -240,13 +240,13 @@ MACHINE_END
#endif
#ifdef CONFIG_SOC_DRA7XX
-static const char *dra7xx_boards_compat[] __initdata = {
-ti,dra7xx,
+static const char *dra74x_boards_compat[] __initconst = {
+ti,dra74,
ti,dra7,
NULL,
};
-DT_MACHINE_START(DRA7XX_DT, Generic DRA7XX (Flattened Device Tree))
+DT_MACHINE_START(DRA74X_DT, Generic DRA74X (Flattened Device Tree))
.reserve= omap_reserve,
.smp= smp_ops(omap4_smp_ops),
.map_io = omap5_map_io,
@@ -255,7 +255,24 @@ DT_MACHINE_START(DRA7XX_DT, Generic DRA7XX (Flattened
Device Tree))
.init_irq = omap_gic_of_init,
.init_machine = omap_generic_init,
.init_time = omap5_realtime_timer_init,
-.dt_compat = dra7xx_boards_compat,
+.dt_compat = dra74x_boards_compat,
+.restart= omap44xx_restart,
+MACHINE_END
+
+static const char *dra72x_boards_compat[] __initconst = {
+ti,dra72,
+NULL,
+};
+
+DT_MACHINE_START(DRA72_DT, Generic DRA72X (Flattened Device Tree))
+.reserve= omap_reserve,
+.map_io = omap5_map_io,
+.init_early = dra7xx_init_early,
+.init_late = dra7xx_init_late,
+.init_irq = omap_gic_of_init
Re: [PATCH v3 2/4] ARM: dts: Add support for DRA72x family of devices
On Monday 28 April 2014 02:20 PM, Arnd Bergmann wrote: On Monday 28 April 2014 11:39:22 Rajendra Nayak wrote: DRA742 EVM: Software Developement Board for DRA742 compatible = ti,dra7-evm, ti,dra742, ti,dra74, ti,dra7 DRA722 EVM: Software Development Board for DRA722 compatible = ti,dra72-evm, ti,dra722, ti,dra72, ti,dra7 I was also calling the .dtsi files as dra72x.dtsi and dra74x.dtsi, do you suggest I call them dra742.dtsi and dra722.dtsi instead? Just that if we end up with a dra745 which is fully compatible with dra742, as you mentioned above, we would be using a dra742.dtsi for a dra745 device which could be a little confusing. For the file names, wildcards are ok. Alternatively you could have a dra745.dtsi that does nothing but include dra752.dtsi and override the compatible string (if there is one to start with). Okay, thanks. Arnd -- To unsubscribe from this list: send the line unsubscribe linux-omap in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
[PATCH v3 4/4] ARM: DRA7: Add support for soc_is_dra74x() and soc_is_dra72x() varients
Use the corresponding compatibles to identify the devices. Signed-off-by: Rajendra Nayak rna...@ti.com --- arch/arm/mach-omap2/soc.h |7 +++ 1 file changed, 7 insertions(+) diff --git a/arch/arm/mach-omap2/soc.h b/arch/arm/mach-omap2/soc.h index 30abcc8..5ff724e 100644 --- a/arch/arm/mach-omap2/soc.h +++ b/arch/arm/mach-omap2/soc.h @@ -245,6 +245,8 @@ IS_AM_SUBCLASS(437x, 0x437) #define soc_is_omap54xx() 0 #define soc_is_omap543x() 0 #define soc_is_dra7xx()0 +#define soc_is_dra74x()0 +#define soc_is_dra72x()0 #if defined(MULTI_OMAP2) # if defined(CONFIG_ARCH_OMAP2) @@ -393,7 +395,12 @@ IS_OMAP_TYPE(3430, 0x3430) #if defined(CONFIG_SOC_DRA7XX) #undef soc_is_dra7xx +#undef soc_is_dra74x +#undef soc_is_dra72x #define soc_is_dra7xx()(of_machine_is_compatible(ti,dra7)) +#define soc_is_dra74x()(of_machine_is_compatible(ti,dra74)) +#define soc_is_dra72x()(of_machine_is_compatible(ti,dra72)) + #endif /* Various silicon revisions for omap2 */ -- 1.7.9.5 -- To unsubscribe from this list: send the line unsubscribe linux-omap in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
[PATCH v3 3/4] ARM: OMAP2+: Add machine entry for dra72x devices
The only difference from the dra74x devices is the missing .smp entry.
While at it, also fix the use of __initdata (across the file) and replace them
with __initconst as reported by checkpatch
ERROR: Use of const init definition must use __initconst
+static const char *dra72x_boards_compat[] __initdata = {
Signed-off-by: Rajendra Nayak rna...@ti.com
---
arch/arm/mach-omap2/board-generic.c | 45 ---
1 file changed, 31 insertions(+), 14 deletions(-)
diff --git a/arch/arm/mach-omap2/board-generic.c
b/arch/arm/mach-omap2/board-generic.c
index b8920b6..dabb9f6 100644
--- a/arch/arm/mach-omap2/board-generic.c
+++ b/arch/arm/mach-omap2/board-generic.c
@@ -43,7 +43,7 @@ static void __init omap_generic_init(void)
}
#ifdef CONFIG_SOC_OMAP2420
-static const char *omap242x_boards_compat[] __initdata = {
+static const char *omap242x_boards_compat[] __initconst = {
ti,omap2420,
NULL,
};
@@ -62,7 +62,7 @@ MACHINE_END
#endif
#ifdef CONFIG_SOC_OMAP2430
-static const char *omap243x_boards_compat[] __initdata = {
+static const char *omap243x_boards_compat[] __initconst = {
ti,omap2430,
NULL,
};
@@ -81,7 +81,7 @@ MACHINE_END
#endif
#ifdef CONFIG_ARCH_OMAP3
-static const char *omap3_boards_compat[] __initdata = {
+static const char *omap3_boards_compat[] __initconst = {
ti,omap3430,
ti,omap3,
NULL,
@@ -100,7 +100,7 @@ DT_MACHINE_START(OMAP3_DT, Generic OMAP3 (Flattened Device
Tree))
.restart= omap3xxx_restart,
MACHINE_END
-static const char *omap36xx_boards_compat[] __initdata = {
+static const char *omap36xx_boards_compat[] __initconst = {
ti,omap36xx,
NULL,
};
@@ -118,7 +118,7 @@ DT_MACHINE_START(OMAP36XX_DT, Generic OMAP36xx (Flattened
Device Tree))
.restart= omap3xxx_restart,
MACHINE_END
-static const char *omap3_gp_boards_compat[] __initdata = {
+static const char *omap3_gp_boards_compat[] __initconst = {
ti,omap3-beagle,
timll,omap3-devkit8000,
NULL,
@@ -137,7 +137,7 @@ DT_MACHINE_START(OMAP3_GP_DT, Generic OMAP3-GP (Flattened
Device Tree))
.restart= omap3xxx_restart,
MACHINE_END
-static const char *am3517_boards_compat[] __initdata = {
+static const char *am3517_boards_compat[] __initconst = {
ti,am3517,
NULL,
};
@@ -157,7 +157,7 @@ MACHINE_END
#endif
#ifdef CONFIG_SOC_AM33XX
-static const char *am33xx_boards_compat[] __initdata = {
+static const char *am33xx_boards_compat[] __initconst = {
ti,am33xx,
NULL,
};
@@ -177,7 +177,7 @@ MACHINE_END
#endif
#ifdef CONFIG_ARCH_OMAP4
-static const char *omap4_boards_compat[] __initdata = {
+static const char *omap4_boards_compat[] __initconst = {
ti,omap4460,
ti,omap4430,
ti,omap4,
@@ -199,7 +199,7 @@ MACHINE_END
#endif
#ifdef CONFIG_SOC_OMAP5
-static const char *omap5_boards_compat[] __initdata = {
+static const char *omap5_boards_compat[] __initconst = {
ti,omap5432,
ti,omap5430,
ti,omap5,
@@ -221,7 +221,7 @@ MACHINE_END
#endif
#ifdef CONFIG_SOC_AM43XX
-static const char *am43_boards_compat[] __initdata = {
+static const char *am43_boards_compat[] __initconst = {
ti,am4372,
ti,am43,
NULL,
@@ -240,13 +240,13 @@ MACHINE_END
#endif
#ifdef CONFIG_SOC_DRA7XX
-static const char *dra7xx_boards_compat[] __initdata = {
- ti,dra7xx,
+static const char *dra74x_boards_compat[] __initconst = {
+ ti,dra74,
ti,dra7,
NULL,
};
-DT_MACHINE_START(DRA7XX_DT, Generic DRA7XX (Flattened Device Tree))
+DT_MACHINE_START(DRA74X_DT, Generic DRA74X (Flattened Device Tree))
.reserve= omap_reserve,
.smp= smp_ops(omap4_smp_ops),
.map_io = omap5_map_io,
@@ -255,7 +255,24 @@ DT_MACHINE_START(DRA7XX_DT, Generic DRA7XX (Flattened
Device Tree))
.init_irq = omap_gic_of_init,
.init_machine = omap_generic_init,
.init_time = omap5_realtime_timer_init,
- .dt_compat = dra7xx_boards_compat,
+ .dt_compat = dra74x_boards_compat,
+ .restart= omap44xx_restart,
+MACHINE_END
+
+static const char *dra72x_boards_compat[] __initconst = {
+ ti,dra72,
+ NULL,
+};
+
+DT_MACHINE_START(DRA72_DT, Generic DRA72X (Flattened Device Tree))
+ .reserve= omap_reserve,
+ .map_io = omap5_map_io,
+ .init_early = dra7xx_init_early,
+ .init_late = dra7xx_init_late,
+ .init_irq = omap_gic_of_init,
+ .init_machine = omap_generic_init,
+ .init_time = omap5_realtime_timer_init,
+ .dt_compat = dra72x_boards_compat,
.restart= omap44xx_restart,
MACHINE_END
#endif
--
1.7.9.5
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[PATCH v3 2/4] ARM: dts: Add support for DRA72x family of devices
DRA72x is a single core cortex A15 device with most infrastructure IPs otherwise
same as whats on the DRA74x devices.
So move the cpu nodes into dra74x.dtsi and dra72x.dtsi respectively.
Also add a minimal dra72-evm dts file.
Signed-off-by: Rajendra Nayak rna...@ti.com
Cc: linux-...@vger.kernel.org
Cc: devicet...@vger.kernel.org
---
.../devicetree/bindings/arm/omap/omap.txt | 14 +--
arch/arm/boot/dts/Makefile |3 +-
arch/arm/boot/dts/dra7-evm.dts |6 +--
arch/arm/boot/dts/dra7.dtsi| 27 -
arch/arm/boot/dts/dra72-evm.dts| 24
arch/arm/boot/dts/dra72x.dtsi | 25
arch/arm/boot/dts/dra74x.dtsi | 41
7 files changed, 105 insertions(+), 35 deletions(-)
create mode 100644 arch/arm/boot/dts/dra72-evm.dts
create mode 100644 arch/arm/boot/dts/dra72x.dtsi
create mode 100644 arch/arm/boot/dts/dra74x.dtsi
diff --git a/Documentation/devicetree/bindings/arm/omap/omap.txt
b/Documentation/devicetree/bindings/arm/omap/omap.txt
index 36ede19..1bc2338 100644
--- a/Documentation/devicetree/bindings/arm/omap/omap.txt
+++ b/Documentation/devicetree/bindings/arm/omap/omap.txt
@@ -79,8 +79,11 @@ SoCs:
- OMAP5432
compatible = ti,omap5432, ti,omap5
-- DRA742
- compatible = ti,dra7xx, ti,dra7
+- DRA74x
+ compatible = ti,dra74, ti,dra7
+
+- DRA72x
+ compatible = ti,dra72, ti,dra7
- AM4372
compatible = ti,am4372, ti,am43
@@ -120,5 +123,8 @@ Boards:
- AM437x GP EVM
compatible = ti,am437x-gp-evm, ti,am4372, ti,am43
-- DRA7 EVM: Software Developement Board for DRA7XX
- compatible = ti,dra7-evm, ti,dra7
+- DRA74 EVM: Software Developement Board for DRA74x
+ compatible = ti,dra7-evm, ti,dra74, ti,dra7
+
+- DRA72 EVM: Software Development Board for DRA72x
+ compatible = ti,dra72-evm, ti,dra72, ti,dra7
diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile
index 35c146f..ff98a97 100644
--- a/arch/arm/boot/dts/Makefile
+++ b/arch/arm/boot/dts/Makefile
@@ -288,7 +288,8 @@ dtb-$(CONFIG_ARCH_OMAP2PLUS) += omap2420-h4.dtb \
am3517_mt_ventoux.dtb \
am43x-epos-evm.dtb \
am437x-gp-evm.dtb \
- dra7-evm.dtb
+ dra7-evm.dtb \
+ dra72-evm.dtb
dtb-$(CONFIG_ARCH_ORION5X) += orion5x-lacie-ethernet-disk-mini-v2.dtb
dtb-$(CONFIG_ARCH_PRIMA2) += prima2-evb.dtb
dtb-$(CONFIG_ARCH_QCOM) += qcom-msm8660-surf.dtb \
diff --git a/arch/arm/boot/dts/dra7-evm.dts b/arch/arm/boot/dts/dra7-evm.dts
index 7807429..df6a6db 100644
--- a/arch/arm/boot/dts/dra7-evm.dts
+++ b/arch/arm/boot/dts/dra7-evm.dts
@@ -7,11 +7,11 @@
*/
/dts-v1/;
-#include dra7.dtsi
+#include dra74x.dtsi
/ {
- model = TI DRA7;
- compatible = ti,dra7-evm, ti,dra7;
+ model = TI DRA74x;
+ compatible = ti,dra7-evm, ti,dra74, ti,dra7;
memory {
device_type = memory;
diff --git a/arch/arm/boot/dts/dra7.dtsi b/arch/arm/boot/dts/dra7.dtsi
index 1c0f8e1..e27fec7 100644
--- a/arch/arm/boot/dts/dra7.dtsi
+++ b/arch/arm/boot/dts/dra7.dtsi
@@ -33,33 +33,6 @@
serial5 = uart6;
};
- cpus {
- #address-cells = 1;
- #size-cells = 0;
-
- cpu0: cpu@0 {
- device_type = cpu;
- compatible = arm,cortex-a15;
- reg = 0;
-
- operating-points =
- /* kHzuV */
- 100 106
- 1176000 116
- ;
-
- clocks = dpll_mpu_ck;
- clock-names = cpu;
-
- clock-latency = 30; /* From omap-cpufreq driver */
- };
- cpu@1 {
- device_type = cpu;
- compatible = arm,cortex-a15;
- reg = 1;
- };
- };
-
timer {
compatible = arm,armv7-timer;
interrupts = GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(2) |
IRQ_TYPE_LEVEL_LOW),
diff --git a/arch/arm/boot/dts/dra72-evm.dts b/arch/arm/boot/dts/dra72-evm.dts
new file mode 100644
index 000..ead6440
--- /dev/null
+++ b/arch/arm/boot/dts/dra72-evm.dts
@@ -0,0 +1,24 @@
+/*
+ * Copyright (C) 2014 Texas Instruments Incorporated - http://www.ti.com/
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+/dts-v1/;
+
+#include dra72x.dtsi
+
+/ {
+ model = TI DRA72x;
+ compatible = ti,dra72-evm, ti,dra72, ti,dra7;
+
+ memory {
+ device_type = memory;
+ reg = 0x8000 0x4000; /* 1024 MB */
+ };
+};
+
+uart1 {
+ status = okay;
+};
diff --git a/arch/arm/boot
[PATCH v3 1/4] ARM: dts: dra7-evm: Remove the wrong and undocumented compatible
ti,dra752 is neither documented nor correct, since the device is actually a
dra742 device as rightly documented in dt bindings.
Signed-off-by: Rajendra Nayak rna...@ti.com
Cc: devicet...@vger.kernel.org
---
arch/arm/boot/dts/dra7-evm.dts |2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/arch/arm/boot/dts/dra7-evm.dts b/arch/arm/boot/dts/dra7-evm.dts
index 5babba0..7807429 100644
--- a/arch/arm/boot/dts/dra7-evm.dts
+++ b/arch/arm/boot/dts/dra7-evm.dts
@@ -11,7 +11,7 @@
/ {
model = TI DRA7;
- compatible = ti,dra7-evm, ti,dra752, ti,dra7;
+ compatible = ti,dra7-evm, ti,dra7;
memory {
device_type = memory;
--
1.7.9.5
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[PATCH v3 0/4] ARM: DRA7: Add support for DRA72x devices
changes in v3: Removed wildcards from compatible strings and duplicates from .dt_compat strings as suggested by Arnd DRA72x devices are single core Cortex A15 devices belonging to the DRA7 family (Similar to the DRA74x devices which are dual core Cortex A15 based) The patches (based off 3.15-rc2) add minimal DT/kernel modifications to add boot support for DRA72x devices reusing all the kernel data for DRA74x devices. Rajendra Nayak (4): ARM: dts: dra7-evm: Remove the wrong and undocumented compatible ARM: dts: Add support for DRA72x family of devices ARM: OMAP2+: Add machine entry for dra72x devices ARM: DRA7: Add support for soc_is_dra74x() and soc_is_dra72x() varients .../devicetree/bindings/arm/omap/omap.txt | 14 -- arch/arm/boot/dts/Makefile |3 +- arch/arm/boot/dts/dra7-evm.dts |6 +-- arch/arm/boot/dts/dra7.dtsi| 27 arch/arm/boot/dts/dra72-evm.dts| 24 +++ arch/arm/boot/dts/dra72x.dtsi | 25 +++ arch/arm/boot/dts/dra74x.dtsi | 41 ++ arch/arm/mach-omap2/board-generic.c| 45 ++-- arch/arm/mach-omap2/soc.h |7 +++ 9 files changed, 143 insertions(+), 49 deletions(-) create mode 100644 arch/arm/boot/dts/dra72-evm.dts create mode 100644 arch/arm/boot/dts/dra72x.dtsi create mode 100644 arch/arm/boot/dts/dra74x.dtsi -- 1.7.9.5 -- To unsubscribe from this list: send the line unsubscribe linux-omap in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
[PATCH 0/2] OMAP2+: optional clock handling fixes
The patches fix some opt clock handling in gpio and in hwmod. Rajendra Nayak (2): gpio: omap: prepare and unprepare the debounce clock ARM: OMAP2+: hwmod: Don't leave the optional clocks in clk_prepare()ed state arch/arm/mach-omap2/omap_hwmod.c | 13 ++--- drivers/gpio/gpio-omap.c | 10 +- 2 files changed, 7 insertions(+), 16 deletions(-) -- 1.7.9.5 -- To unsubscribe from this list: send the line unsubscribe linux-omap in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
[PATCH 1/2] gpio: omap: prepare and unprepare the debounce clock
Replace the clk_enable()s with a clk_prepare_enable() and
the clk_disables()s with a clk_disable_unprepare()
This never showed issues due to the OMAP platform code (hwmod)
leaving these clocks in clk_prepare()ed state by default.
Reported-by: Kishon Vijay Abraham I kis...@ti.com
Signed-off-by: Rajendra Nayak rna...@ti.com
Cc: linux-g...@vger.kernel.org
Cc: Santosh Shilimkar santosh.shilim...@ti.com
Cc: Kevin Hilman khil...@deeprootsystems.com
---
drivers/gpio/gpio-omap.c | 10 +-
1 file changed, 5 insertions(+), 5 deletions(-)
diff --git a/drivers/gpio/gpio-omap.c b/drivers/gpio/gpio-omap.c
index 19b886c..78bc5a4 100644
--- a/drivers/gpio/gpio-omap.c
+++ b/drivers/gpio/gpio-omap.c
@@ -180,7 +180,7 @@ static inline void _gpio_rmw(void __iomem *base, u32 reg,
u32 mask, bool set)
static inline void _gpio_dbck_enable(struct gpio_bank *bank)
{
if (bank-dbck_enable_mask !bank-dbck_enabled) {
- clk_enable(bank-dbck);
+ clk_prepare_enable(bank-dbck);
bank-dbck_enabled = true;
writel_relaxed(bank-dbck_enable_mask,
@@ -198,7 +198,7 @@ static inline void _gpio_dbck_disable(struct gpio_bank
*bank)
*/
writel_relaxed(0, bank-base + bank-regs-debounce_en);
- clk_disable(bank-dbck);
+ clk_disable_unprepare(bank-dbck);
bank-dbck_enabled = false;
}
}
@@ -231,7 +231,7 @@ static void _set_gpio_debounce(struct gpio_bank *bank,
unsigned gpio,
l = GPIO_BIT(bank, gpio);
- clk_enable(bank-dbck);
+ clk_prepare_enable(bank-dbck);
reg = bank-base + bank-regs-debounce;
writel_relaxed(debounce, reg);
@@ -245,7 +245,7 @@ static void _set_gpio_debounce(struct gpio_bank *bank,
unsigned gpio,
bank-dbck_enable_mask = val;
writel_relaxed(val, reg);
- clk_disable(bank-dbck);
+ clk_disable_unprepare(bank-dbck);
/*
* Enable debounce clock per module.
* This call is mandatory because in omap_gpio_request() when
@@ -290,7 +290,7 @@ static void _clear_gpio_debounce(struct gpio_bank *bank,
unsigned gpio)
bank-context.debounce = 0;
writel_relaxed(bank-context.debounce, bank-base +
bank-regs-debounce);
- clk_disable(bank-dbck);
+ clk_disable_unprepare(bank-dbck);
bank-dbck_enabled = false;
}
}
--
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[PATCH 2/2] ARM: OMAP2+: hwmod: Don't leave the optional clocks in clk_prepare()ed state
At hwmod init, theres no reason why optional clocks should be left in
clk_prepare()ed state as these are actually directly controlled by the
drivers themselves. Let the drivers prepare/unprepare as well as enable/
disable them.
Signed-off-by: Rajendra Nayak rna...@ti.com
Cc: Benoit Cousson bcous...@baylibre.com
---
arch/arm/mach-omap2/omap_hwmod.c | 13 ++---
1 file changed, 2 insertions(+), 11 deletions(-)
diff --git a/arch/arm/mach-omap2/omap_hwmod.c b/arch/arm/mach-omap2/omap_hwmod.c
index 1f33f5d..9e3afc9 100644
--- a/arch/arm/mach-omap2/omap_hwmod.c
+++ b/arch/arm/mach-omap2/omap_hwmod.c
@@ -857,15 +857,6 @@ static int _init_opt_clks(struct omap_hwmod *oh)
continue;
}
oc-_clk = c;
- /*
-* HACK: This needs a re-visit once clk_prepare() is implemented
-* to do something meaningful. Today its just a no-op.
-* If clk_prepare() is used at some point to do things like
-* voltage scaling etc, then this would have to be moved to
-* some point where subsystems like i2c and pmic become
-* available.
-*/
- clk_prepare(oc-_clk);
}
return ret;
@@ -945,7 +936,7 @@ static void _enable_optional_clocks(struct omap_hwmod *oh)
if (oc-_clk) {
pr_debug(omap_hwmod: enable %s:%s\n, oc-role,
__clk_get_name(oc-_clk));
- clk_enable(oc-_clk);
+ clk_prepare_enable(oc-_clk);
}
}
@@ -960,7 +951,7 @@ static void _disable_optional_clocks(struct omap_hwmod *oh)
if (oc-_clk) {
pr_debug(omap_hwmod: disable %s:%s\n, oc-role,
__clk_get_name(oc-_clk));
- clk_disable(oc-_clk);
+ clk_disable_unprepare(oc-_clk);
}
}
--
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Re: [PATCH 1/3] Documentation: dts: OMAP: Fix typos in DRA752 device name
On Friday 14 March 2014 02:50 PM, Rajendra Nayak wrote: DRA752 device is wrongly documented as DRA742 device. Fix the typo. Thanks to Nishanth for pointing out that the device part number is infact DRA742. The compatible sting infact seems to have a typo. I'll fix that up a post a v2 of this series soon. Signed-off-by: Rajendra Nayak rna...@ti.com --- .../devicetree/bindings/arm/omap/omap.txt |4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/Documentation/devicetree/bindings/arm/omap/omap.txt b/Documentation/devicetree/bindings/arm/omap/omap.txt index af9b4a0..0491868 100644 --- a/Documentation/devicetree/bindings/arm/omap/omap.txt +++ b/Documentation/devicetree/bindings/arm/omap/omap.txt @@ -48,7 +48,7 @@ SoC Families: compatible = ti,omap4 - OMAP5 generic - defaults to OMAP5430 compatible = ti,omap5 -- DRA7 generic - defaults to DRA742 +- DRA7 generic - defaults to DRA752 compatible = ti,dra7 - AM43x generic - defaults to AM4372 compatible = ti,am43 @@ -79,7 +79,7 @@ SoCs: - OMAP5432 compatible = ti,omap5432, ti,omap5 -- DRA742 +- DRA752 compatible = ti,dra7xx, ti,dra7 - AM4372 -- To unsubscribe from this list: send the line unsubscribe linux-omap in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
[PATCH v2 0/4] ARM: DRA7: Add support for DRA72x devices
DRA72x devices are single core Cortex A15 devices belonging to the DRA7 family (Similar to the DRA74x devices which are dual core Cortex A15 based) The patches (based off 3.15-rc2) add minimal DT/kernel modifications to add boot support for DRA72x devices reusing all the kernel data for DRA74x devices. Rajendra Nayak (4): ARM: dts: dra7-evm: Remove the wrong and undocumented compatible ARM: dts: Add support for DRA72x family of devices ARM: OMAP2+: Add machine entry for dra72x devices ARM: DRA7: Add support for soc_is_dra74x() and soc_is_dra72x() varients .../devicetree/bindings/arm/omap/omap.txt | 12 +++-- arch/arm/boot/dts/Makefile |3 +- arch/arm/boot/dts/dra7-evm.dts |6 +-- arch/arm/boot/dts/dra7.dtsi| 27 arch/arm/boot/dts/dra72-evm.dts| 24 ++ arch/arm/boot/dts/dra72x.dtsi | 25 +++ arch/arm/boot/dts/dra74x.dtsi | 41 + arch/arm/mach-omap2/board-generic.c| 46 ++-- arch/arm/mach-omap2/soc.h |7 +++ 9 files changed, 144 insertions(+), 47 deletions(-) create mode 100644 arch/arm/boot/dts/dra72-evm.dts create mode 100644 arch/arm/boot/dts/dra72x.dtsi create mode 100644 arch/arm/boot/dts/dra74x.dtsi -- 1.7.9.5 -- To unsubscribe from this list: send the line unsubscribe linux-omap in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
[PATCH v2 1/4] ARM: dts: dra7-evm: Remove the wrong and undocumented compatible
ti,dra752 is neither documented nor correct, since the device is actually a
dra742 device as rightly documented in dt bindings.
Signed-off-by: Rajendra Nayak rna...@ti.com
Cc: devicet...@vger.kernel.org
---
arch/arm/boot/dts/dra7-evm.dts |2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/arch/arm/boot/dts/dra7-evm.dts b/arch/arm/boot/dts/dra7-evm.dts
index 5babba0..7807429 100644
--- a/arch/arm/boot/dts/dra7-evm.dts
+++ b/arch/arm/boot/dts/dra7-evm.dts
@@ -11,7 +11,7 @@
/ {
model = TI DRA7;
- compatible = ti,dra7-evm, ti,dra752, ti,dra7;
+ compatible = ti,dra7-evm, ti,dra7;
memory {
device_type = memory;
--
1.7.9.5
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[PATCH v2 3/4] ARM: OMAP2+: Add machine entry for dra72x devices
The only difference from the dra74x devices is the missing .smp entry.
While at it, also fix the use of __initdata (across the file) and replace them
with __initconst as reported by checkpatch
ERROR: Use of const init definition must use __initconst
+static const char *dra72x_boards_compat[] __initdata = {
Signed-off-by: Rajendra Nayak rna...@ti.com
---
arch/arm/mach-omap2/board-generic.c | 46 +--
1 file changed, 33 insertions(+), 13 deletions(-)
diff --git a/arch/arm/mach-omap2/board-generic.c
b/arch/arm/mach-omap2/board-generic.c
index b8920b6..4d1222d 100644
--- a/arch/arm/mach-omap2/board-generic.c
+++ b/arch/arm/mach-omap2/board-generic.c
@@ -43,7 +43,7 @@ static void __init omap_generic_init(void)
}
#ifdef CONFIG_SOC_OMAP2420
-static const char *omap242x_boards_compat[] __initdata = {
+static const char *omap242x_boards_compat[] __initconst = {
ti,omap2420,
NULL,
};
@@ -62,7 +62,7 @@ MACHINE_END
#endif
#ifdef CONFIG_SOC_OMAP2430
-static const char *omap243x_boards_compat[] __initdata = {
+static const char *omap243x_boards_compat[] __initconst = {
ti,omap2430,
NULL,
};
@@ -81,7 +81,7 @@ MACHINE_END
#endif
#ifdef CONFIG_ARCH_OMAP3
-static const char *omap3_boards_compat[] __initdata = {
+static const char *omap3_boards_compat[] __initconst = {
ti,omap3430,
ti,omap3,
NULL,
@@ -100,7 +100,7 @@ DT_MACHINE_START(OMAP3_DT, Generic OMAP3 (Flattened Device
Tree))
.restart= omap3xxx_restart,
MACHINE_END
-static const char *omap36xx_boards_compat[] __initdata = {
+static const char *omap36xx_boards_compat[] __initconst = {
ti,omap36xx,
NULL,
};
@@ -118,7 +118,7 @@ DT_MACHINE_START(OMAP36XX_DT, Generic OMAP36xx (Flattened
Device Tree))
.restart= omap3xxx_restart,
MACHINE_END
-static const char *omap3_gp_boards_compat[] __initdata = {
+static const char *omap3_gp_boards_compat[] __initconst = {
ti,omap3-beagle,
timll,omap3-devkit8000,
NULL,
@@ -137,7 +137,7 @@ DT_MACHINE_START(OMAP3_GP_DT, Generic OMAP3-GP (Flattened
Device Tree))
.restart= omap3xxx_restart,
MACHINE_END
-static const char *am3517_boards_compat[] __initdata = {
+static const char *am3517_boards_compat[] __initconst = {
ti,am3517,
NULL,
};
@@ -157,7 +157,7 @@ MACHINE_END
#endif
#ifdef CONFIG_SOC_AM33XX
-static const char *am33xx_boards_compat[] __initdata = {
+static const char *am33xx_boards_compat[] __initconst = {
ti,am33xx,
NULL,
};
@@ -177,7 +177,7 @@ MACHINE_END
#endif
#ifdef CONFIG_ARCH_OMAP4
-static const char *omap4_boards_compat[] __initdata = {
+static const char *omap4_boards_compat[] __initconst = {
ti,omap4460,
ti,omap4430,
ti,omap4,
@@ -199,7 +199,7 @@ MACHINE_END
#endif
#ifdef CONFIG_SOC_OMAP5
-static const char *omap5_boards_compat[] __initdata = {
+static const char *omap5_boards_compat[] __initconst = {
ti,omap5432,
ti,omap5430,
ti,omap5,
@@ -221,7 +221,7 @@ MACHINE_END
#endif
#ifdef CONFIG_SOC_AM43XX
-static const char *am43_boards_compat[] __initdata = {
+static const char *am43_boards_compat[] __initconst = {
ti,am4372,
ti,am43,
NULL,
@@ -240,13 +240,14 @@ MACHINE_END
#endif
#ifdef CONFIG_SOC_DRA7XX
-static const char *dra7xx_boards_compat[] __initdata = {
+static const char *dra74x_boards_compat[] __initconst = {
+ ti,dra74x,
ti,dra7xx,
ti,dra7,
NULL,
};
-DT_MACHINE_START(DRA7XX_DT, Generic DRA7XX (Flattened Device Tree))
+DT_MACHINE_START(DRA74X_DT, Generic DRA74X (Flattened Device Tree))
.reserve= omap_reserve,
.smp= smp_ops(omap4_smp_ops),
.map_io = omap5_map_io,
@@ -255,7 +256,26 @@ DT_MACHINE_START(DRA7XX_DT, Generic DRA7XX (Flattened
Device Tree))
.init_irq = omap_gic_of_init,
.init_machine = omap_generic_init,
.init_time = omap5_realtime_timer_init,
- .dt_compat = dra7xx_boards_compat,
+ .dt_compat = dra74x_boards_compat,
+ .restart= omap44xx_restart,
+MACHINE_END
+
+static const char *dra72x_boards_compat[] __initconst = {
+ ti,dra72x,
+ ti,dra7xx,
+ ti,dra7,
+ NULL,
+};
+
+DT_MACHINE_START(DRA72_DT, Generic DRA72X (Flattened Device Tree))
+ .reserve= omap_reserve,
+ .map_io = omap5_map_io,
+ .init_early = dra7xx_init_early,
+ .init_late = dra7xx_init_late,
+ .init_irq = omap_gic_of_init,
+ .init_machine = omap_generic_init,
+ .init_time = omap5_realtime_timer_init,
+ .dt_compat = dra72x_boards_compat,
.restart= omap44xx_restart,
MACHINE_END
#endif
--
1.7.9.5
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[PATCH v2 2/4] ARM: dts: Add support for DRA72x family of devices
DRA72x is a single core cortex A15 device with most infrastructure IPs otherwise
same as whats on the DRA74x devices.
So move the cpu nodes into dra74x.dtsi and dra72x.dtsi respectively.
Also add a minimal dra72-evm dts file.
Signed-off-by: Rajendra Nayak rna...@ti.com
Cc: linux-...@vger.kernel.org
Cc: devicet...@vger.kernel.org
---
.../devicetree/bindings/arm/omap/omap.txt | 12 --
arch/arm/boot/dts/Makefile |3 +-
arch/arm/boot/dts/dra7-evm.dts |6 +--
arch/arm/boot/dts/dra7.dtsi| 27 -
arch/arm/boot/dts/dra72-evm.dts| 24
arch/arm/boot/dts/dra72x.dtsi | 25
arch/arm/boot/dts/dra74x.dtsi | 41
7 files changed, 104 insertions(+), 34 deletions(-)
create mode 100644 arch/arm/boot/dts/dra72-evm.dts
create mode 100644 arch/arm/boot/dts/dra72x.dtsi
create mode 100644 arch/arm/boot/dts/dra74x.dtsi
diff --git a/Documentation/devicetree/bindings/arm/omap/omap.txt
b/Documentation/devicetree/bindings/arm/omap/omap.txt
index 36ede19..88de8e0 100644
--- a/Documentation/devicetree/bindings/arm/omap/omap.txt
+++ b/Documentation/devicetree/bindings/arm/omap/omap.txt
@@ -79,8 +79,11 @@ SoCs:
- OMAP5432
compatible = ti,omap5432, ti,omap5
-- DRA742
- compatible = ti,dra7xx, ti,dra7
+- DRA74x
+ compatible = ti,dra74x, ti,dra7xx, ti,dra7
+
+- DRA72x
+ compatible = ti,dra72x, ti,dra7xx, ti,dra7
- AM4372
compatible = ti,am4372, ti,am43
@@ -121,4 +124,7 @@ Boards:
compatible = ti,am437x-gp-evm, ti,am4372, ti,am43
- DRA7 EVM: Software Developement Board for DRA7XX
- compatible = ti,dra7-evm, ti,dra7
+ compatible = ti,dra7-evm, ti,dra74x, ti,dra7
+
+- DRA72 EVM: Software Development Board for DRA72x
+ compatible = ti,dra72-evm, ti,dra72x, ti,dra7
diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile
index 35c146f..ff98a97 100644
--- a/arch/arm/boot/dts/Makefile
+++ b/arch/arm/boot/dts/Makefile
@@ -288,7 +288,8 @@ dtb-$(CONFIG_ARCH_OMAP2PLUS) += omap2420-h4.dtb \
am3517_mt_ventoux.dtb \
am43x-epos-evm.dtb \
am437x-gp-evm.dtb \
- dra7-evm.dtb
+ dra7-evm.dtb \
+ dra72-evm.dtb
dtb-$(CONFIG_ARCH_ORION5X) += orion5x-lacie-ethernet-disk-mini-v2.dtb
dtb-$(CONFIG_ARCH_PRIMA2) += prima2-evb.dtb
dtb-$(CONFIG_ARCH_QCOM) += qcom-msm8660-surf.dtb \
diff --git a/arch/arm/boot/dts/dra7-evm.dts b/arch/arm/boot/dts/dra7-evm.dts
index 7807429..a07fb30 100644
--- a/arch/arm/boot/dts/dra7-evm.dts
+++ b/arch/arm/boot/dts/dra7-evm.dts
@@ -7,11 +7,11 @@
*/
/dts-v1/;
-#include dra7.dtsi
+#include dra74x.dtsi
/ {
- model = TI DRA7;
- compatible = ti,dra7-evm, ti,dra7;
+ model = TI DRA74x;
+ compatible = ti,dra7-evm, ti,dra74x, ti,dra7;
memory {
device_type = memory;
diff --git a/arch/arm/boot/dts/dra7.dtsi b/arch/arm/boot/dts/dra7.dtsi
index 1c0f8e1..e27fec7 100644
--- a/arch/arm/boot/dts/dra7.dtsi
+++ b/arch/arm/boot/dts/dra7.dtsi
@@ -33,33 +33,6 @@
serial5 = uart6;
};
- cpus {
- #address-cells = 1;
- #size-cells = 0;
-
- cpu0: cpu@0 {
- device_type = cpu;
- compatible = arm,cortex-a15;
- reg = 0;
-
- operating-points =
- /* kHzuV */
- 100 106
- 1176000 116
- ;
-
- clocks = dpll_mpu_ck;
- clock-names = cpu;
-
- clock-latency = 30; /* From omap-cpufreq driver */
- };
- cpu@1 {
- device_type = cpu;
- compatible = arm,cortex-a15;
- reg = 1;
- };
- };
-
timer {
compatible = arm,armv7-timer;
interrupts = GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(2) |
IRQ_TYPE_LEVEL_LOW),
diff --git a/arch/arm/boot/dts/dra72-evm.dts b/arch/arm/boot/dts/dra72-evm.dts
new file mode 100644
index 000..d105e66
--- /dev/null
+++ b/arch/arm/boot/dts/dra72-evm.dts
@@ -0,0 +1,24 @@
+/*
+ * Copyright (C) 2014 Texas Instruments Incorporated - http://www.ti.com/
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+/dts-v1/;
+
+#include dra72x.dtsi
+
+/ {
+ model = TI DRA72x;
+ compatible = ti,dra72-evm, ti,dra72x, ti,dra7;
+
+ memory {
+ device_type = memory;
+ reg = 0x8000 0x4000; /* 1024 MB */
+ };
+};
+
+uart1 {
+ status = okay;
+};
diff --git a/arch/arm/boot/dts/dra72x.dtsi b/arch/arm/boot/dts
[PATCH v2 4/4] ARM: DRA7: Add support for soc_is_dra74x() and soc_is_dra72x() varients
Use the corresponding compatibles to identify the devices. Signed-off-by: Rajendra Nayak rna...@ti.com --- arch/arm/mach-omap2/soc.h |7 +++ 1 file changed, 7 insertions(+) diff --git a/arch/arm/mach-omap2/soc.h b/arch/arm/mach-omap2/soc.h index 30abcc8..b8a4834 100644 --- a/arch/arm/mach-omap2/soc.h +++ b/arch/arm/mach-omap2/soc.h @@ -245,6 +245,8 @@ IS_AM_SUBCLASS(437x, 0x437) #define soc_is_omap54xx() 0 #define soc_is_omap543x() 0 #define soc_is_dra7xx()0 +#define soc_is_dra74x()0 +#define soc_is_dra72x()0 #if defined(MULTI_OMAP2) # if defined(CONFIG_ARCH_OMAP2) @@ -393,7 +395,12 @@ IS_OMAP_TYPE(3430, 0x3430) #if defined(CONFIG_SOC_DRA7XX) #undef soc_is_dra7xx +#undef soc_is_dra74x +#undef soc_is_dra72x #define soc_is_dra7xx()(of_machine_is_compatible(ti,dra7)) +#define soc_is_dra74x()(of_machine_is_compatible(ti,dra74x)) +#define soc_is_dra72x()(of_machine_is_compatible(ti,dra72x)) + #endif /* Various silicon revisions for omap2 */ -- 1.7.9.5 -- To unsubscribe from this list: send the line unsubscribe linux-omap in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
Re: [PATCH v2 3/4] ARM: OMAP2+: Add machine entry for dra72x devices
On Wednesday 23 April 2014 03:21 PM, Arnd Bergmann wrote:
On Wednesday 23 April 2014 14:32:54 Rajendra Nayak wrote:
#ifdef CONFIG_SOC_DRA7XX
-static const char *dra7xx_boards_compat[] __initdata = {
+static const char *dra74x_boards_compat[] __initconst = {
+ ti,dra74x,
ti,dra7xx,
ti,dra7,
NULL,
};
-DT_MACHINE_START(DRA7XX_DT, Generic DRA7XX (Flattened Device Tree))
+DT_MACHINE_START(DRA74X_DT, Generic DRA74X (Flattened Device Tree))
.reserve= omap_reserve,
.smp= smp_ops(omap4_smp_ops),
.map_io = omap5_map_io,
@@ -255,7 +256,26 @@ DT_MACHINE_START(DRA7XX_DT, Generic DRA7XX (Flattened
Device Tree))
.init_irq = omap_gic_of_init,
.init_machine = omap_generic_init,
.init_time = omap5_realtime_timer_init,
- .dt_compat = dra7xx_boards_compat,
+ .dt_compat = dra74x_boards_compat,
+ .restart= omap44xx_restart,
+MACHINE_END
+
+static const char *dra72x_boards_compat[] __initconst = {
+ ti,dra72x,
+ ti,dra7xx,
+ ti,dra7,
+ NULL,
+};
Now you have two lists that both match ti,dra7xx and ti,dra7, which will
cause problems if you have a new machine that doesn't match the more specific
strings.
Note that we intentionally don't allow wildcards in compatible strings
to avoid this situation.
Please remove all strings with an x in them from the dts files and from
the source, and make sure you have no duplication between the lists.
Okay, will fix and repost. thanks.
Arnd
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Re: [PATCH 3/3] ARM: OMAP2+: Add machine entry for dra72x devices
On Saturday 15 March 2014 07:51 AM, Suman Anna wrote:
Hi Rajendra,
On 03/14/2014 04:20 AM, Nayak, Rajendra wrote:
The only difference from the dra75x devices is the missing .smp entry.
Signed-off-by: Rajendra Nayak rna...@ti.com
---
arch/arm/mach-omap2/board-generic.c | 18 ++
1 file changed, 18 insertions(+)
diff --git a/arch/arm/mach-omap2/board-generic.c
b/arch/arm/mach-omap2/board-generic.c
index 8e3daa1..d803d99 100644
--- a/arch/arm/mach-omap2/board-generic.c
+++ b/arch/arm/mach-omap2/board-generic.c
@@ -253,4 +253,22 @@ DT_MACHINE_START(DRA7XX_DT, Generic DRA7XX (Flattened
Device Tree))
.dt_compat= dra7xx_boards_compat,
.restart= omap44xx_restart,
MACHINE_END
+
+static const char *dra72_boards_compat[] __initdata = {
How about using dra72x_ instead of dra72_ and keeping it consistent
at the other places as well?
Sure, I can do that. Thanks.
regards
Suman
+ti,dra72x,
+ti,dra7,
+NULL,
+};
+
+DT_MACHINE_START(DRA72_DT, Generic DRA72 (Flattened Device Tree))
+.reserve= omap_reserve,
+.map_io= omap5_map_io,
+.init_early= dra7xx_init_early,
+.init_late= dra7xx_init_late,
+.init_irq= omap_gic_of_init,
+.init_machine= omap_generic_init,
+.init_time= omap5_realtime_timer_init,
+.dt_compat= dra72_boards_compat,
+.restart= omap44xx_restart,
+MACHINE_END
#endif
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[PATCH] ARM: OMAP2+: hwmod: fix missing braces in _init()
From: Suman Anna s-a...@ti.com
Bug was introduced by commit 'f92d959: ARM: OMAP2+: hwmod:
Extract no-idle and no-reset info from DT'
There were 2 versions of the patch posted which resulted in the above
commit. While v1 [1] had the bug, v2 [2] had it fixed.
However v1 apparently seemed to have been pulled in by mistake
introducing the bug.
Given of_find_property() does return NULL when the node passed is
NULL, it did not introduce any functional issues as such, just the
fact that the second if check was executed unnecessarily.
[1] https://www.mail-archive.com/linux-omap@vger.kernel.org/msg94220.html
[2] http://www.spinics.net/lists/linux-omap/msg98490.html
Cc: Nishanth Menon n...@ti.com
Signed-off-by: Rajendra Nayak rna...@ti.com
Signed-off-by: Suman Anna s-a...@ti.com
Signed-off-by: Lokesh Vutla lokeshvu...@ti.com
---
arch/arm/mach-omap2/omap_hwmod.c |3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/arch/arm/mach-omap2/omap_hwmod.c b/arch/arm/mach-omap2/omap_hwmod.c
index 1f33f5d..66c60fe 100644
--- a/arch/arm/mach-omap2/omap_hwmod.c
+++ b/arch/arm/mach-omap2/omap_hwmod.c
@@ -2546,11 +2546,12 @@ static int __init _init(struct omap_hwmod *oh, void
*data)
return -EINVAL;
}
- if (np)
+ if (np) {
if (of_find_property(np, ti,no-reset-on-init, NULL))
oh-flags |= HWMOD_INIT_NO_RESET;
if (of_find_property(np, ti,no-idle-on-init, NULL))
oh-flags |= HWMOD_INIT_NO_IDLE;
+ }
oh-_state = _HWMOD_STATE_INITIALIZED;
--
1.7.9.5
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[PATCH 1/3] Documentation: dts: OMAP: Fix typos in DRA752 device name
DRA752 device is wrongly documented as DRA742 device. Fix the typo. Signed-off-by: Rajendra Nayak rna...@ti.com --- .../devicetree/bindings/arm/omap/omap.txt |4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/Documentation/devicetree/bindings/arm/omap/omap.txt b/Documentation/devicetree/bindings/arm/omap/omap.txt index af9b4a0..0491868 100644 --- a/Documentation/devicetree/bindings/arm/omap/omap.txt +++ b/Documentation/devicetree/bindings/arm/omap/omap.txt @@ -48,7 +48,7 @@ SoC Families: compatible = ti,omap4 - OMAP5 generic - defaults to OMAP5430 compatible = ti,omap5 -- DRA7 generic - defaults to DRA742 +- DRA7 generic - defaults to DRA752 compatible = ti,dra7 - AM43x generic - defaults to AM4372 compatible = ti,am43 @@ -79,7 +79,7 @@ SoCs: - OMAP5432 compatible = ti,omap5432, ti,omap5 -- DRA742 +- DRA752 compatible = ti,dra7xx, ti,dra7 - AM4372 -- 1.7.9.5 -- To unsubscribe from this list: send the line unsubscribe linux-omap in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
[PATCH 2/3] arm: dts: Add support for DRA72x family of devices
DRA72x is a single core cortex A15 device with most infrastructure IPs otherwise
same as whats on the DRA75x devices.
So move the cpu nodes into dra75x.dtsi and dra72x.dtsi respectively.
Also add a minimal dra72-evm dts file.
Signed-off-by: Rajendra Nayak rna...@ti.com
---
.../devicetree/bindings/arm/omap/omap.txt |6
arch/arm/boot/dts/Makefile |3 +-
arch/arm/boot/dts/dra7-evm.dts |4 +--
arch/arm/boot/dts/dra7.dtsi| 22
arch/arm/boot/dts/dra72-evm.dts| 24 +
arch/arm/boot/dts/dra72x.dtsi | 25 ++
arch/arm/boot/dts/dra75x.dtsi | 36
7 files changed, 95 insertions(+), 25 deletions(-)
create mode 100644 arch/arm/boot/dts/dra72-evm.dts
create mode 100644 arch/arm/boot/dts/dra72x.dtsi
create mode 100644 arch/arm/boot/dts/dra75x.dtsi
diff --git a/Documentation/devicetree/bindings/arm/omap/omap.txt
b/Documentation/devicetree/bindings/arm/omap/omap.txt
index 0491868..a8b1a69 100644
--- a/Documentation/devicetree/bindings/arm/omap/omap.txt
+++ b/Documentation/devicetree/bindings/arm/omap/omap.txt
@@ -82,6 +82,9 @@ SoCs:
- DRA752
compatible = ti,dra7xx, ti,dra7
+- DRA72x
+ compatible = ti,dra72x, ti,dra7
+
- AM4372
compatible = ti,am4372, ti,am43
@@ -116,3 +119,6 @@ Boards:
- DRA7 EVM: Software Developement Board for DRA7XX
compatible = ti,dra7-evm, ti,dra7
+
+- DRA72 EVM: Software Development Board for DRA72x
+ compatible = ti,dra72-evm, ti,dra72x, ti,dra7
diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile
index 0320303..c0231da 100644
--- a/arch/arm/boot/dts/Makefile
+++ b/arch/arm/boot/dts/Makefile
@@ -231,7 +231,8 @@ dtb-$(CONFIG_ARCH_OMAP2PLUS) += omap2420-h4.dtb \
am3517-evm.dtb \
am3517_mt_ventoux.dtb \
am43x-epos-evm.dtb \
- dra7-evm.dtb
+ dra7-evm.dtb \
+ dra72-evm.dtb
dtb-$(CONFIG_ARCH_ORION5X) += orion5x-lacie-ethernet-disk-mini-v2.dtb
dtb-$(CONFIG_ARCH_PRIMA2) += prima2-evb.dtb
dtb-$(CONFIG_ARCH_U8500) += ste-snowball.dtb \
diff --git a/arch/arm/boot/dts/dra7-evm.dts b/arch/arm/boot/dts/dra7-evm.dts
index 5babba0..f344de2 100644
--- a/arch/arm/boot/dts/dra7-evm.dts
+++ b/arch/arm/boot/dts/dra7-evm.dts
@@ -7,10 +7,10 @@
*/
/dts-v1/;
-#include dra7.dtsi
+#include dra75x.dtsi
/ {
- model = TI DRA7;
+ model = TI DRA75x;
compatible = ti,dra7-evm, ti,dra752, ti,dra7;
memory {
diff --git a/arch/arm/boot/dts/dra7.dtsi b/arch/arm/boot/dts/dra7.dtsi
index 1fd75aa..a1da2c71 100644
--- a/arch/arm/boot/dts/dra7.dtsi
+++ b/arch/arm/boot/dts/dra7.dtsi
@@ -33,28 +33,6 @@
serial5 = uart6;
};
- cpus {
- #address-cells = 1;
- #size-cells = 0;
-
- cpu0: cpu@0 {
- device_type = cpu;
- compatible = arm,cortex-a15;
- reg = 0;
-
- operating-points =
- /* kHzuV */
- 100 106
- 1176000 116
- ;
- };
- cpu@1 {
- device_type = cpu;
- compatible = arm,cortex-a15;
- reg = 1;
- };
- };
-
timer {
compatible = arm,armv7-timer;
interrupts = GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(2) |
IRQ_TYPE_LEVEL_LOW),
diff --git a/arch/arm/boot/dts/dra72-evm.dts b/arch/arm/boot/dts/dra72-evm.dts
new file mode 100644
index 000..d105e66
--- /dev/null
+++ b/arch/arm/boot/dts/dra72-evm.dts
@@ -0,0 +1,24 @@
+/*
+ * Copyright (C) 2014 Texas Instruments Incorporated - http://www.ti.com/
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+/dts-v1/;
+
+#include dra72x.dtsi
+
+/ {
+ model = TI DRA72x;
+ compatible = ti,dra72-evm, ti,dra72x, ti,dra7;
+
+ memory {
+ device_type = memory;
+ reg = 0x8000 0x4000; /* 1024 MB */
+ };
+};
+
+uart1 {
+ status = okay;
+};
diff --git a/arch/arm/boot/dts/dra72x.dtsi b/arch/arm/boot/dts/dra72x.dtsi
new file mode 100644
index 000..701e40c
--- /dev/null
+++ b/arch/arm/boot/dts/dra72x.dtsi
@@ -0,0 +1,25 @@
+/*
+ * Copyright (C) 2014 Texas Instruments Incorporated - http://www.ti.com/
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ * Based on omap4.dtsi
+ */
+
+#include dra7.dtsi
+
+/ {
+ compatible = ti,dra72x, ti,dra7xx;
+
+ cpus {
+ #address-cells = 1
[PATCH 0/3] ARM: DRA7: Add support for DRA72x devices
DRA72x devices are single core Cortex A15 devices belonging to the DRA7 family (Similar to the DRA75x devices which are dual core Cortex A15 based) The patches add minimal DT/kernel modifications to add boot support for DRA72x devices resuing all the kernel data for DRA75x devices. Rajendra Nayak (3): Documentation: dts: OMAP: Fix typos in DRA752 device name arm: dts: Add support for DRA72x family of devices ARM: OMAP2+: Add machine entry for dra72x devices .../devicetree/bindings/arm/omap/omap.txt | 10 -- arch/arm/boot/dts/Makefile |3 +- arch/arm/boot/dts/dra7-evm.dts |4 +-- arch/arm/boot/dts/dra7.dtsi| 22 arch/arm/boot/dts/dra72-evm.dts| 24 + arch/arm/boot/dts/dra72x.dtsi | 25 ++ arch/arm/boot/dts/dra75x.dtsi | 36 arch/arm/mach-omap2/board-generic.c| 18 ++ 8 files changed, 115 insertions(+), 27 deletions(-) create mode 100644 arch/arm/boot/dts/dra72-evm.dts create mode 100644 arch/arm/boot/dts/dra72x.dtsi create mode 100644 arch/arm/boot/dts/dra75x.dtsi -- 1.7.9.5 -- To unsubscribe from this list: send the line unsubscribe linux-omap in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
[PATCH 3/3] ARM: OMAP2+: Add machine entry for dra72x devices
The only difference from the dra75x devices is the missing .smp entry.
Signed-off-by: Rajendra Nayak rna...@ti.com
---
arch/arm/mach-omap2/board-generic.c | 18 ++
1 file changed, 18 insertions(+)
diff --git a/arch/arm/mach-omap2/board-generic.c
b/arch/arm/mach-omap2/board-generic.c
index 8e3daa1..d803d99 100644
--- a/arch/arm/mach-omap2/board-generic.c
+++ b/arch/arm/mach-omap2/board-generic.c
@@ -253,4 +253,22 @@ DT_MACHINE_START(DRA7XX_DT, Generic DRA7XX (Flattened
Device Tree))
.dt_compat = dra7xx_boards_compat,
.restart= omap44xx_restart,
MACHINE_END
+
+static const char *dra72_boards_compat[] __initdata = {
+ ti,dra72x,
+ ti,dra7,
+ NULL,
+};
+
+DT_MACHINE_START(DRA72_DT, Generic DRA72 (Flattened Device Tree))
+ .reserve= omap_reserve,
+ .map_io = omap5_map_io,
+ .init_early = dra7xx_init_early,
+ .init_late = dra7xx_init_late,
+ .init_irq = omap_gic_of_init,
+ .init_machine = omap_generic_init,
+ .init_time = omap5_realtime_timer_init,
+ .dt_compat = dra72_boards_compat,
+ .restart= omap44xx_restart,
+MACHINE_END
#endif
--
1.7.9.5
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Re: [PATCH 1/1] ARM: OMAP5: Fix reboot handling
On Monday 17 February 2014 04:45 AM, Vaibhav Bedia wrote: Use the correct register offset for issuing the reset command in OMAP5. Since dev_inst is set dynamically OMAP4 should not be affected by this change. Signed-off-by: Vaibhav Bedia vaibhav.be...@gmail.com Acked-by: Rajendra Nayak rna...@ti.com --- Applies on top of v3.14-rc3 arch/arm/mach-omap2/prminst44xx.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/arch/arm/mach-omap2/prminst44xx.c b/arch/arm/mach-omap2/prminst44xx.c index 6334b96..280f3c5 100644 --- a/arch/arm/mach-omap2/prminst44xx.c +++ b/arch/arm/mach-omap2/prminst44xx.c @@ -183,11 +183,11 @@ void omap4_prminst_global_warm_sw_reset(void) OMAP4_PRM_RSTCTRL_OFFSET); v |= OMAP4430_RST_GLOBAL_WARM_SW_MASK; omap4_prminst_write_inst_reg(v, OMAP4430_PRM_PARTITION, - OMAP4430_PRM_DEVICE_INST, + dev_inst, OMAP4_PRM_RSTCTRL_OFFSET); /* OCP barrier */ v = omap4_prminst_read_inst_reg(OMAP4430_PRM_PARTITION, - OMAP4430_PRM_DEVICE_INST, + dev_inst, OMAP4_PRM_RSTCTRL_OFFSET); } -- To unsubscribe from this list: send the line unsubscribe linux-omap in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
Re: [PATCH V2 4/4] ARM: OMAP2+: AM43x: Use gptimer as clocksource
On Friday 14 February 2014 04:49 AM, Tony Lindgren wrote: * Lokesh Vutla lokeshvu...@ti.com [140207 02:24]: From: Rajendra Nayak rna...@ti.com The SyncTimer in AM43x is clocked using the following two sources: 1) An inaccuarte 32k clock (CLK_32KHZ) derived from PER DPLL, causing system time to go slowly (~10% deviation). 2) external 32KHz RTC clock, which may not always be available on board like in the case of ePOS EVM Use gptimer as clocksource instead, as is done in the case of AM335x (which does not have a SyncTimer). With this, system time keeping works accurately. Hmm doesn't this also mean that PM for any deeper idle states won't work properly? Thats true. This would mean we cannot put the peripheral/core domain down in idle. Suspend however can still work if suspend/resume callbacks are added to the clockevent and clocksource code to shut the non-wakeup domain timer. regards, Rajendra Regards, Tony Signed-off-by: Rajendra Nayak rna...@ti.com Signed-off-by: Lokesh Vutla lokeshvu...@ti.com --- arch/arm/mach-omap2/board-generic.c |2 +- arch/arm/mach-omap2/timer.c |3 ++- 2 files changed, 3 insertions(+), 2 deletions(-) diff --git a/arch/arm/mach-omap2/board-generic.c b/arch/arm/mach-omap2/board-generic.c index 8e3daa1..5679464a 100644 --- a/arch/arm/mach-omap2/board-generic.c +++ b/arch/arm/mach-omap2/board-generic.c @@ -229,7 +229,7 @@ DT_MACHINE_START(AM43_DT, Generic AM43 (Flattened Device Tree)) .init_late = am43xx_init_late, .init_irq = omap_gic_of_init, .init_machine = omap_generic_init, -.init_time = omap3_sync32k_timer_init, +.init_time = omap3_gptimer_timer_init, .dt_compat = am43_boards_compat, MACHINE_END #endif diff --git a/arch/arm/mach-omap2/timer.c b/arch/arm/mach-omap2/timer.c index 74044aa..b62de9f 100644 --- a/arch/arm/mach-omap2/timer.c +++ b/arch/arm/mach-omap2/timer.c @@ -604,7 +604,8 @@ OMAP_SYS_32K_TIMER_INIT(3_secure, 12, secure_32k_fck, ti,timer-secure, 2, timer_sys_ck, NULL); #endif /* CONFIG_ARCH_OMAP3 */ -#if defined(CONFIG_ARCH_OMAP3) || defined(CONFIG_SOC_AM33XX) +#if defined(CONFIG_ARCH_OMAP3) || defined(CONFIG_SOC_AM33XX) || \ +defined(CONFIG_SOC_AM43XX) OMAP_SYS_GP_TIMER_INIT(3, 2, timer_sys_ck, NULL, 1, timer_sys_ck, ti,timer-alwon); #endif -- 1.7.9.5 -- To unsubscribe from this list: send the line unsubscribe linux-omap in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
Re: [RFT/RFC/PATCH 00/31] arm: omap: irq: cleanup INTC driver
[]..
so a bit more work is needed. Maybe also rebase these against
omap-for-v3.14/dt too?
Will do.
Rebased on top of omap-for-v3.14/omap3-board-removal. Patches are on my
k.org tree:
git://git.kernel.org/pub/scm/linux/kernel/git/balbi/usb.git wip/omap-fix-intc
It needs a minor build fix though..
diff --git a/drivers/irqchip/irq-omap-intc.c b/drivers/irqchip/irq-omap-intc.c
index b58c5d5..d03b5a3 100644
--- a/drivers/irqchip/irq-omap-intc.c
+++ b/drivers/irqchip/irq-omap-intc.c
@@ -151,7 +151,7 @@ static void omap_mask_ack_irq(struct irq_data *d)
static void omap_suspend_irq(struct irq_data *d)
{
omap_intc_save_context();
- omap3_intc_prepare_idle();
+ omap_intc_prepare_idle();
/* A pending interrupt would prevent OMAP from entering suspend */
omap_ack_irq(NULL);
regards,
Rajendra
cheers
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Re: [PATCHv11 07/49] clk: divider: add support for low level ops
On Friday 20 December 2013 12:32 AM, Tero Kristo wrote: On 12/19/2013 08:26 PM, Tony Lindgren wrote: * Tero Kristo t-kri...@ti.com [131219 03:26]: Divider clock can now be registered to use low level register access ops. Preferred initialization method is via clock description. This seems to make omap2 not boot for me. No output whatsoever even with DEBUG_LL and earlyprintk. Thats weird... I was kind of afraid something like this might happen though as these patches touch the clock low level routines globally, but I can't see what could be broken... I got hold of a 2430sdp and saw the same behavior, however DEBUG_LL and earlyprintk worked and this is what I see [0.00] Unable to handle kernel NULL pointer dereference at virtual address [0.00] pgd = c0004000 [0.00] [] *pgd= [0.00] Internal error: Oops: 5 [#1] SMP ARM [0.00] Modules linked in: [0.00] CPU: 0 PID: 0 Comm: swapper/0 Not tainted 3.13.0-rc4-00056-ga9fa93e #2 [0.00] task: c07dfcb8 ti: c07d4000 task.ti: c07d4000 [0.00] PC is at clk_mux_get_parent+0x14/0xcc [0.00] LR is at clk_mux_get_parent+0x10/0xcc [0.00] pc : [c044a234]lr : [c044a230]psr: a1d3 [0.00] sp : c07d5f40 ip : fp : [0.00] r10: c07dc880 r9 : 4107b366 r8 : c07f46a4 [0.00] r7 : c0edfa80 r6 : r5 : c07f6810 r4 : 0002 [0.00] r3 : r2 : r1 : c069da67 r0 : 0002 [0.00] Flags: NzCv IRQs off FIQs off Mode SVC_32 ISA ARM Segment kernel [0.00] Control: 00c5387d Table: 80004000 DAC: 0017 [0.00] Process swapper/0 (pid: 0, stack limit = 0xc07d4248) [0.00] Stack: (0xc07d5f40 to 0xc07d6000) [0.00] 5f40: c044a220 0002 c6001f40 c0448e54 c07dfcb8 c0862f7c c07f3600 c07f4368 [0.00] 5f60: c0edfa80 c07b6b80 4107b366 c07dc880 c077edf4 c0531008 c07f4380 [0.00] 5f80: c07f34d4 c077f20c c0878964 c0edfa80 c07b6b80 c0877ac4 c0877640 [0.00] 5fa0: c0edfa80 c0777268 0001 c07792ac c07b5250 c077221c 0002 c076e974 [0.00] 5fc0: c076e57c c07b6b80 00c5387d [0.00] 5fe0: c07dc928 c07b6b7c c07e1474 80004008 8052c544 80008074 [0.00] [c044a234] (clk_mux_get_parent+0x14/0xcc) from [c0448e54] (__clk_init+0xe4/0x3f0) [0.00] [c0448e54] (__clk_init+0xe4/0x3f0) from [c077edf4] (omap_clocks_register+0x24/0x48) [0.00] [c077edf4] (omap_clocks_register+0x24/0x48) from [c077f20c] (omap2430_clk_init+0x4c/0x124) [0.00] [c077f20c] (omap2430_clk_init+0x4c/0x124) from [c0777268] (omap_clk_init+0x28/0x30) [0.00] [c0777268] (omap_clk_init+0x28/0x30) from [c07792ac] (omap2_sync32k_timer_init+0x8/0x58) [0.00] [c07792ac] (omap2_sync32k_timer_init+0x8/0x58) from [c077221c] (time_init+0x1c/0x30) [0.00] [c077221c] (time_init+0x1c/0x30) from [c076e974] (start_kernel+0x1d4/0x360) [0.00] [c076e974] (start_kernel+0x1d4/0x360) from [80008074] (0x80008074) [0.00] Code: e1a05000 e590 ebfff7f5 e595300c (e5933000) [0.00] ---[ end trace 3406ff24bd97382e ]--- [0.00] Kernel panic - not syncing: Attempted to kill the idle task! I'll try and debug further but any quick thoughts on what could be wrong? -Tero -- To unsubscribe from this list: send the line unsubscribe linux-omap in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
Re: [PATCHv11 07/49] clk: divider: add support for low level ops
On Friday 20 December 2013 03:59 PM, Tero Kristo wrote: On 12/20/2013 12:07 PM, Rajendra Nayak wrote: On Friday 20 December 2013 12:32 AM, Tero Kristo wrote: On 12/19/2013 08:26 PM, Tony Lindgren wrote: * Tero Kristo t-kri...@ti.com [131219 03:26]: Divider clock can now be registered to use low level register access ops. Preferred initialization method is via clock description. This seems to make omap2 not boot for me. No output whatsoever even with DEBUG_LL and earlyprintk. Thats weird... I was kind of afraid something like this might happen though as these patches touch the clock low level routines globally, but I can't see what could be broken... I got hold of a 2430sdp and saw the same behavior, however DEBUG_LL and earlyprintk worked and this is what I see [0.00] Unable to handle kernel NULL pointer dereference at virtual address [0.00] pgd = c0004000 [0.00] [] *pgd= [0.00] Internal error: Oops: 5 [#1] SMP ARM [0.00] Modules linked in: [0.00] CPU: 0 PID: 0 Comm: swapper/0 Not tainted 3.13.0-rc4-00056-ga9fa93e #2 [0.00] task: c07dfcb8 ti: c07d4000 task.ti: c07d4000 [0.00] PC is at clk_mux_get_parent+0x14/0xcc [0.00] LR is at clk_mux_get_parent+0x10/0xcc [0.00] pc : [c044a234]lr : [c044a230]psr: a1d3 [0.00] sp : c07d5f40 ip : fp : [0.00] r10: c07dc880 r9 : 4107b366 r8 : c07f46a4 [0.00] r7 : c0edfa80 r6 : r5 : c07f6810 r4 : 0002 [0.00] r3 : r2 : r1 : c069da67 r0 : 0002 [0.00] Flags: NzCv IRQs off FIQs off Mode SVC_32 ISA ARM Segment kernel [0.00] Control: 00c5387d Table: 80004000 DAC: 0017 [0.00] Process swapper/0 (pid: 0, stack limit = 0xc07d4248) [0.00] Stack: (0xc07d5f40 to 0xc07d6000) [0.00] 5f40: c044a220 0002 c6001f40 c0448e54 c07dfcb8 c0862f7c c07f3600 c07f4368 [0.00] 5f60: c0edfa80 c07b6b80 4107b366 c07dc880 c077edf4 c0531008 c07f4380 [0.00] 5f80: c07f34d4 c077f20c c0878964 c0edfa80 c07b6b80 c0877ac4 c0877640 [0.00] 5fa0: c0edfa80 c0777268 0001 c07792ac c07b5250 c077221c 0002 c076e974 [0.00] 5fc0: c076e57c c07b6b80 00c5387d [0.00] 5fe0: c07dc928 c07b6b7c c07e1474 80004008 8052c544 80008074 [0.00] [c044a234] (clk_mux_get_parent+0x14/0xcc) from [c0448e54] (__clk_init+0xe4/0x3f0) [0.00] [c0448e54] (__clk_init+0xe4/0x3f0) from [c077edf4] (omap_clocks_register+0x24/0x48) [0.00] [c077edf4] (omap_clocks_register+0x24/0x48) from [c077f20c] (omap2430_clk_init+0x4c/0x124) [0.00] [c077f20c] (omap2430_clk_init+0x4c/0x124) from [c0777268] (omap_clk_init+0x28/0x30) [0.00] [c0777268] (omap_clk_init+0x28/0x30) from [c07792ac] (omap2_sync32k_timer_init+0x8/0x58) [0.00] [c07792ac] (omap2_sync32k_timer_init+0x8/0x58) from [c077221c] (time_init+0x1c/0x30) [0.00] [c077221c] (time_init+0x1c/0x30) from [c076e974] (start_kernel+0x1d4/0x360) [0.00] [c076e974] (start_kernel+0x1d4/0x360) from [80008074] (0x80008074) [0.00] Code: e1a05000 e590 ebfff7f5 e595300c (e5933000) [0.00] ---[ end trace 3406ff24bd97382e ]--- [0.00] Kernel panic - not syncing: Attempted to kill the idle task! I'll try and debug further but any quick thoughts on what could be wrong? I have a fix for this already and will be posting v12 today. I will just re-post the drivers/clk part of the series though, rest of the patches should be fine. This bug was silly actually, I didn't think of the static clock data initialization through the macros from clk-private.h... This caused the resulting clock structures to have NULL for clk_ll_ops as it bypassed the init function where I set it up. So, I will need to check against NULL every time I do anything with ll_ops. yeah, the crash was indeed when ll_ops was dereferenced despite being NULL. -Tero -- To unsubscribe from this list: send the line unsubscribe linux-omap in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
[PATCH] ARM: DRA7: hwmod: Fix boot crash with DEBUG_LL
With commit '7dedd34: ARM: OMAP2+: hwmod: Fix a crash in _setup_reset() with
DEBUG_LL' we moved from parsing cmdline to identify uart used for earlycon
to using the requsite hwmod CONFIG_DEBUG_OMAPxUARTy FLAGS.
On DRA7 though, we seem to be missing this flag, and atleast on the DRA7 EVM
where we use uart1 for console, boot fails with DEBUG_LL enabled.
Reported-by: Lokesh Vutla lokeshvu...@ti.com
Signed-off-by: Rajendra Nayak rna...@ti.com
---
arch/arm/mach-omap2/omap_hwmod_7xx_data.c |2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/arch/arm/mach-omap2/omap_hwmod_7xx_data.c
b/arch/arm/mach-omap2/omap_hwmod_7xx_data.c
index db32d53..18f333c 100644
--- a/arch/arm/mach-omap2/omap_hwmod_7xx_data.c
+++ b/arch/arm/mach-omap2/omap_hwmod_7xx_data.c
@@ -1637,7 +1637,7 @@ static struct omap_hwmod dra7xx_uart1_hwmod = {
.class = dra7xx_uart_hwmod_class,
.clkdm_name = l4per_clkdm,
.main_clk = uart1_gfclk_mux,
- .flags = HWMOD_SWSUP_SIDLE_ACT,
+ .flags = HWMOD_SWSUP_SIDLE_ACT | DEBUG_OMAP2UART1_FLAGS,
.prcm = {
.omap4 = {
.clkctrl_offs = DRA7XX_CM_L4PER_UART1_CLKCTRL_OFFSET,
--
1.7.9.5
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[PATCH v2 1/3] ARM: OMAP2+: Add support to parse 'main_clk' info from DT
With clocks for OMAP moving to DT, its now possible to pass the 'main_clk'
data for each device from DT instead of having it in hwmod.
Signed-off-by: Rajendra Nayak rna...@ti.com
---
arch/arm/mach-omap2/omap_hwmod.c | 23 +--
1 file changed, 17 insertions(+), 6 deletions(-)
diff --git a/arch/arm/mach-omap2/omap_hwmod.c b/arch/arm/mach-omap2/omap_hwmod.c
index dfa878b..f22 100644
--- a/arch/arm/mach-omap2/omap_hwmod.c
+++ b/arch/arm/mach-omap2/omap_hwmod.c
@@ -730,14 +730,18 @@ static int _del_initiator_dep(struct omap_hwmod *oh,
struct omap_hwmod *init_oh)
* functional clock pointer) if a main_clk is present. Returns 0 on
* success or -EINVAL on error.
*/
-static int _init_main_clk(struct omap_hwmod *oh)
+static int _init_main_clk(struct omap_hwmod *oh, struct device_node *np)
{
int ret = 0;
- if (!oh-main_clk)
+ if (!oh-main_clk !of_get_property(np, clocks, NULL))
return 0;
- oh-_clk = clk_get(NULL, oh-main_clk);
+ if (oh-main_clk)
+ oh-_clk = clk_get(NULL, oh-main_clk);
+ else
+ oh-_clk = of_clk_get_by_name(np, fck);
+
if (IS_ERR(oh-_clk)) {
pr_warning(omap_hwmod: %s: cannot clk_get main_clk %s\n,
oh-name, oh-main_clk);
@@ -1565,19 +1569,26 @@ static int _init_clkdm(struct omap_hwmod *oh)
* Resolves all clock names embedded in the hwmod. Returns 0 on
* success, or a negative error code on failure.
*/
-static int _init_clocks(struct omap_hwmod *oh, void *data)
+static int _init_clocks(struct omap_hwmod *oh, void *data,
+ int index, struct device_node *np)
{
int ret = 0;
if (oh-_state != _HWMOD_STATE_REGISTERED)
return 0;
+ if (index) {
+ pr_warn(omap_hwmod: %s unable to parse clock data from %s\n,
+ oh-name, np-name);
+ np = NULL;
+ }
+
pr_debug(omap_hwmod: %s: looking up clocks\n, oh-name);
if (soc_ops.init_clkdm)
ret |= soc_ops.init_clkdm(oh);
- ret |= _init_main_clk(oh);
+ ret |= _init_main_clk(oh, np);
ret |= _init_interface_clks(oh);
ret |= _init_opt_clks(oh);
@@ -2500,7 +2511,7 @@ static int __init _init(struct omap_hwmod *oh, void *data)
}
}
- r = _init_clocks(oh, NULL);
+ r = _init_clocks(oh, NULL, index, np);
if (r 0) {
WARN(1, omap_hwmod: %s: couldn't init clocks\n, oh-name);
return -EINVAL;
--
1.7.9.5
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[PATCH v2 3/3] ARM: OMAP4: dts: Add main and optional clock data into DT
With support to parse clock data from DT, move all main and optional
clock information from hwmod to DT.
We still retain clocks in hwmod for devices which do not have a DT node.
Signed-off-by: Rajendra Nayak rna...@ti.com
---
arch/arm/boot/dts/omap4.dtsi | 100 +++
arch/arm/mach-omap2/omap_hwmod_44xx_data.c | 122
2 files changed, 100 insertions(+), 122 deletions(-)
diff --git a/arch/arm/boot/dts/omap4.dtsi b/arch/arm/boot/dts/omap4.dtsi
index c2e3993..7eb7920 100644
--- a/arch/arm/boot/dts/omap4.dtsi
+++ b/arch/arm/boot/dts/omap4.dtsi
@@ -139,6 +139,8 @@
compatible = ti,omap-counter32k;
reg = 0x4a304000 0x20;
ti,hwmods = counter_32k;
+ clocks = sys_32k_ck;
+ clock-names = fck;
};
omap4_pmx_core: pinmux@4a100040 {
@@ -172,6 +174,8 @@
#dma-cells = 1;
#dma-channels = 32;
#dma-requests = 127;
+ clocks = l3_div_ck;
+ clock-names = fck;
};
gpio1: gpio@4a31 {
@@ -184,6 +188,8 @@
#gpio-cells = 2;
interrupt-controller;
#interrupt-cells = 2;
+ clocks = l4_wkup_clk_mux_ck, gpio1_dbclk;
+ clock-names = fck, dbclk;
};
gpio2: gpio@48055000 {
@@ -195,6 +201,8 @@
#gpio-cells = 2;
interrupt-controller;
#interrupt-cells = 2;
+ clocks = l4_div_ck, gpio2_dbclk;
+ clock-names = fck, dbclk;
};
gpio3: gpio@48057000 {
@@ -206,6 +214,8 @@
#gpio-cells = 2;
interrupt-controller;
#interrupt-cells = 2;
+ clocks = l4_div_ck, gpio3_dbclk;
+ clock-names = fck, dbclk;
};
gpio4: gpio@48059000 {
@@ -217,6 +227,8 @@
#gpio-cells = 2;
interrupt-controller;
#interrupt-cells = 2;
+ clocks = l4_div_ck, gpio4_dbclk;
+ clock-names = fck, dbclk;
};
gpio5: gpio@4805b000 {
@@ -228,6 +240,8 @@
#gpio-cells = 2;
interrupt-controller;
#interrupt-cells = 2;
+ clocks = l4_div_ck, gpio5_dbclk;
+ clock-names = fck, dbclk;
};
gpio6: gpio@4805d000 {
@@ -239,6 +253,8 @@
#gpio-cells = 2;
interrupt-controller;
#interrupt-cells = 2;
+ clocks = l4_div_ck, gpio6_dbclk;
+ clock-names = fck, dbclk;
};
gpmc: gpmc@5000 {
@@ -259,6 +275,8 @@
interrupts = GIC_SPI 72 IRQ_TYPE_LEVEL_HIGH;
ti,hwmods = uart1;
clock-frequency = 4800;
+ clocks = func_48m_fclk;
+ clock-names = fck;
};
uart2: serial@4806c000 {
@@ -267,6 +285,8 @@
interrupts = GIC_SPI 73 IRQ_TYPE_LEVEL_HIGH;
ti,hwmods = uart2;
clock-frequency = 4800;
+ clocks = func_48m_fclk;
+ clock-names = fck;
};
uart3: serial@4802 {
@@ -275,6 +295,8 @@
interrupts = GIC_SPI 74 IRQ_TYPE_LEVEL_HIGH;
ti,hwmods = uart3;
clock-frequency = 4800;
+ clocks = func_48m_fclk;
+ clock-names = fck;
};
uart4: serial@4806e000 {
@@ -283,6 +305,8 @@
interrupts = GIC_SPI 70 IRQ_TYPE_LEVEL_HIGH;
ti,hwmods = uart4;
clock-frequency = 4800;
+ clocks = func_48m_fclk;
+ clock-names = fck;
};
hwspinlock: spinlock@4a0f6000 {
@@ -298,6 +322,8 @@
#address-cells = 1;
#size-cells = 0;
ti,hwmods = i2c1;
+ clocks = func_96m_fclk;
+ clock-names = fck;
};
i2c2: i2c@48072000 {
@@ -307,6 +333,8 @@
#address-cells = 1;
#size-cells = 0;
ti,hwmods = i2c2;
+ clocks
[PATCH v2 0/3] OMAP2+: hwmod: Add support to parse clock info from DT
v1 of this series was posted a while back [1] but there wasn't much that was concluded if the approach used in the series was acceptable or if there are better alternatives. So I am just doing a repost of these to see if we can conclude this time around. Needless to say, patches are based off Teros omap-clocks-to-dt v10 series [2] and I also pulled in Tonys fix to handle DT nodes with multiple 'ti,hwmod' values [3]. The approach taken in the series *does not* work for cases with multiple 'ti,hwmod' values and hence [3] helps me skip those instances for now. But based on some of the recent discussions on multiple 'ti-hwmod' values [4] it looks like its generally agreed upon that having DT nodes with multiple 'ti-hwmod' property is wrong and that those instances need to be fixed up anyway. [1] http://www.spinics.net/lists/linux-omap/msg95746.html [2] http://www.spinics.net/lists/devicetree/msg13455.html [3] http://www.spinics.net/lists/arm-kernel/msg288036.html [4] http://www.spinics.net/lists/arm-kernel/msg288023.html Rajendra Nayak (3): ARM: OMAP2+: Add support to parse 'main_clk' info from DT ARM: OMAP2+: Add support to parse optional clk info from DT ARM: OMAP4: dts: Add main and optional clock data into DT arch/arm/boot/dts/omap4.dtsi | 100 +++ arch/arm/mach-omap2/omap_hwmod.c | 88 ++-- arch/arm/mach-omap2/omap_hwmod_44xx_data.c | 122 3 files changed, 180 insertions(+), 130 deletions(-) -- 1.7.9.5 -- To unsubscribe from this list: send the line unsubscribe linux-omap in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
[PATCH v2 2/3] ARM: OMAP2+: Add support to parse optional clk info from DT
With clocks for OMAP moving to DT, its now possible to pass all optional clock
data for each device from DT instead of having it in hwmod.
Signed-off-by: Rajendra Nayak rna...@ti.com
---
arch/arm/mach-omap2/omap_hwmod.c | 65 --
1 file changed, 63 insertions(+), 2 deletions(-)
diff --git a/arch/arm/mach-omap2/omap_hwmod.c b/arch/arm/mach-omap2/omap_hwmod.c
index f22..271634f 100644
--- a/arch/arm/mach-omap2/omap_hwmod.c
+++ b/arch/arm/mach-omap2/omap_hwmod.c
@@ -807,6 +807,64 @@ static int _init_interface_clks(struct omap_hwmod *oh)
return ret;
}
+static const char **_parse_opt_clks_dt(struct omap_hwmod *oh,
+ struct device_node *np,
+ int *opt_clks_cnt)
+{
+ int i, clks_cnt;
+ const char *clk_name;
+ const char **opt_clk_names;
+
+ clks_cnt = of_property_count_strings(np, clock-names);
+ if (!clks_cnt)
+ return NULL;
+
+ opt_clk_names = kzalloc(sizeof(char *)*clks_cnt, GFP_KERNEL);
+ if (!opt_clk_names)
+ return NULL;
+
+ for (i = 0; i clks_cnt; i++) {
+ of_property_read_string_index(np, clock-names, i, clk_name);
+ if (!strcmp(clk_name, fck))
+ continue;
+ opt_clks_cnt++;
+ opt_clk_names[i] = clk_name;
+ }
+ return opt_clk_names;
+}
+
+static int _init_opt_clks_dt(struct omap_hwmod *oh, struct device_node *np)
+{
+ struct clk *c;
+ int i, opt_clks_cnt = 0;
+ int ret = 0;
+ const char **opt_clk_names;
+
+ opt_clk_names = _parse_opt_clks_dt(oh, np, opt_clks_cnt);
+ if (!opt_clk_names)
+ return -EINVAL;
+
+ oh-opt_clks = kzalloc(sizeof(struct omap_hwmod_opt_clk *)
+ * opt_clks_cnt, GFP_KERNEL);
+ if (!oh-opt_clks)
+ return -ENOMEM;
+
+ oh-opt_clks_cnt = opt_clks_cnt;
+
+ for (i = 0; i oh-opt_clks_cnt; i++) {
+ c = of_clk_get_by_name(np, opt_clk_names[i]);
+ if (IS_ERR(c)) {
+ pr_warn(omap_hwmod: %s: cannot clk_get opt_clk %s\n,
+ oh-name, opt_clk_names[i]);
+ ret = -EINVAL;
+ }
+ oh-opt_clks[i]._clk = c;
+ oh-opt_clks[i].role = opt_clk_names[i];
+ clk_prepare(oh-opt_clks[i]._clk);
+ }
+ return ret;
+}
+
/**
* _init_opt_clk - get a struct clk * for the the hwmod's optional clocks
* @oh: struct omap_hwmod *
@@ -814,13 +872,16 @@ static int _init_interface_clks(struct omap_hwmod *oh)
* Called from _init_clocks(). Populates the @oh omap_hwmod_opt_clk
* clock pointers. Returns 0 on success or -EINVAL on error.
*/
-static int _init_opt_clks(struct omap_hwmod *oh)
+static int _init_opt_clks(struct omap_hwmod *oh, struct device_node *np)
{
struct omap_hwmod_opt_clk *oc;
struct clk *c;
int i;
int ret = 0;
+ if (of_get_property(np, clocks, NULL))
+ return _init_opt_clks_dt(oh, np);
+
for (i = oh-opt_clks_cnt, oc = oh-opt_clks; i 0; i--, oc++) {
c = clk_get(NULL, oc-clk);
if (IS_ERR(c)) {
@@ -1590,7 +1651,7 @@ static int _init_clocks(struct omap_hwmod *oh, void *data,
ret |= _init_main_clk(oh, np);
ret |= _init_interface_clks(oh);
- ret |= _init_opt_clks(oh);
+ ret |= _init_opt_clks(oh, np);
if (!ret)
oh-_state = _HWMOD_STATE_CLKS_INITED;
--
1.7.9.5
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[PATCH] ARM: OMAP2+: Powerdomain: Fix unchecked dereference of arch_pwrdm
Commit 'cd8abed' ARM: OMAP2+: Powerdomain: Remove the need to always have a voltdm associated to a pwrdm leads to the following Smatch complaint: arch/arm/mach-omap2/powerdomain.c:131 _pwrdm_register() error: we previously assumed 'arch_pwrdm' could be null (see line 105) So, fix the unchecked dereference of arch_pwrdm. Reported-by: Dan Carpenter dan.carpen...@oracle.com Signed-off-by: Rajendra Nayak rna...@ti.com --- arch/arm/mach-omap2/powerdomain.c |3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/arch/arm/mach-omap2/powerdomain.c b/arch/arm/mach-omap2/powerdomain.c index e233dfc..93a2a6e 100644 --- a/arch/arm/mach-omap2/powerdomain.c +++ b/arch/arm/mach-omap2/powerdomain.c @@ -128,7 +128,8 @@ skip_voltdm: for (i = 0; i pwrdm-banks; i++) pwrdm-ret_mem_off_counter[i] = 0; - arch_pwrdm-pwrdm_wait_transition(pwrdm); + if (arch_pwrdm arch_pwrdm-pwrdm_wait_transition) + arch_pwrdm-pwrdm_wait_transition(pwrdm); pwrdm-state = pwrdm_read_pwrst(pwrdm); pwrdm-state_counter[pwrdm-state] = 1; -- 1.7.9.5 -- To unsubscribe from this list: send the line unsubscribe linux-omap in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
Re: [PATCH V3 7/7] ARM: DRA: Enable Crossbar IP support for DRA7XX
On Tuesday 05 November 2013 06:44 PM, Sricharan R wrote:
Enable the crossbar IP support for DRA7xx soc.
Cc: Santosh Shilimkar santosh.shilim...@ti.com
Cc: Rajendra Nayak rna...@ti.com
Cc: Tony Lindgren t...@atomide.com
Signed-off-by: Sricharan R r.sricha...@ti.com
---
arch/arm/mach-omap2/Kconfig|1 +
arch/arm/mach-omap2/omap4-common.c |4
2 files changed, 5 insertions(+)
diff --git a/arch/arm/mach-omap2/Kconfig b/arch/arm/mach-omap2/Kconfig
index b5fb5f7..2086c65 100644
--- a/arch/arm/mach-omap2/Kconfig
+++ b/arch/arm/mach-omap2/Kconfig
@@ -141,6 +141,7 @@ config SOC_DRA7XX
select ARM_GIC
select HAVE_SMP
select COMMON_CLK
+ select IRQ_CROSSBAR
comment OMAP Core Type
depends on ARCH_OMAP2
diff --git a/arch/arm/mach-omap2/omap4-common.c
b/arch/arm/mach-omap2/omap4-common.c
index 5791143..274cbfa 100644
--- a/arch/arm/mach-omap2/omap4-common.c
+++ b/arch/arm/mach-omap2/omap4-common.c
@@ -22,6 +22,7 @@
#include linux/of_platform.h
#include linux/export.h
#include linux/irqchip/arm-gic.h
+#include linux/irqchip/irq-crossbar.h
#include linux/of_address.h
#include linux/reboot.h
@@ -282,9 +283,12 @@ void __init omap_gic_of_init(void)
skip_errata_init:
omap_wakeupgen_init();
+ if (soc_is_dra7xx())
+ crossbar_init();
Its good if this is called irqcrossbar_init() to avoid confusion
with the dma crossbar which also exists in dra7 devices.
irqchip_init();
}
+
#if defined(CONFIG_MMC_OMAP_HS) || defined(CONFIG_MMC_OMAP_HS_MODULE)
static int omap4_twl6030_hsmmc_late_init(struct device *dev)
{
--
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Re: [PATCH V2 0/2] ARM: dts: OMAP2+: add i2c aliases
On Thursday 17 October 2013 01:51 AM, Nishanth Menon wrote: Add i2c aliases for OMAP and AM processor dts nodes to ensure proper i2c ordering. Based on Benoit's for_13/dts branch[1] Changes in V2: - Following Rajendra's suggestion, done for all OMAP and AM series SoCs, where i2c is defined. Thanks Nishanth. Acked-by: Rajendra Nayak rna...@ti.com V1: https://patchwork.kernel.org/patch/3046671/ Nishanth Menon (2): ARM: dts: OMAP3+: Add i2c aliases ARM: dts: AM33xx+: Add i2c aliases arch/arm/boot/dts/am33xx.dtsi |3 +++ arch/arm/boot/dts/am4372.dtsi |3 +++ arch/arm/boot/dts/dra7.dtsi |5 + arch/arm/boot/dts/omap3.dtsi |3 +++ arch/arm/boot/dts/omap4.dtsi |4 arch/arm/boot/dts/omap5.dtsi |5 + 6 files changed, 23 insertions(+) [1] https://git.kernel.org/cgit/linux/kernel/git/bcousson/linux-omap-dt.git/log/?h=for_3.13/dts -- To unsubscribe from this list: send the line unsubscribe linux-omap in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
Re: [PATCH 02/11] ARM: OMAP3: clock: add API to enable/disable autoidle for a single clock
On Monday 21 October 2013 05:56 PM, Mike Turquette wrote:
Quoting Paul Walmsley (2013-10-19 10:16:50)
On Fri, 11 Oct 2013, Tero Kristo wrote:
Some drivers require direct access to the autoidle functionality of the
interface clocks. Added clock APIs for these, so that the drivers do not
need to access CM registers directly.
Signed-off-by: Tero Kristo t-kri...@ti.com
Thanks, queued. Please coordinate with Mike to get
allow_idle/deny_idle-type interfaces into the Common Clock Framework, so
these can be replaced with standard CCF-type allow_idle() deny_idle()
functions. That interface should include use-counting so multiple callers
can use allow_idle() and deny_idle() without stomping on each other.
Where and when are these functions called? IIRC these are only accessed
at boot/init time, though I may be wrong. If they are a boot-time thing
then the .init callback provided in struct clk may be sufficient.
deny_idle() gets called early during clock init to disable all hardware
level idling (during boot) and allow_idle() is called during late init
(after PM init) to allow hardware idling.
Regards,
Mike
- Paul
---
arch/arm/mach-omap2/clock.c | 38 ++
arch/arm/mach-omap2/clock.h |2 ++
2 files changed, 40 insertions(+)
diff --git a/arch/arm/mach-omap2/clock.c b/arch/arm/mach-omap2/clock.c
index 0c38ca9..c7c5d31 100644
--- a/arch/arm/mach-omap2/clock.c
+++ b/arch/arm/mach-omap2/clock.c
@@ -543,6 +543,44 @@ int omap2_clk_disable_autoidle_all(void)
}
/**
+ * omap2_clk_deny_idle - disable autoidle on an OMAP clock
+ * @clk: struct clk * to disable autoidle for
+ *
+ * Disable autoidle on an OMAP clock.
+ */
+int omap2_clk_deny_idle(struct clk *clk)
+{
+ struct clk_hw_omap *c;
+
+ if (__clk_get_flags(clk) CLK_IS_BASIC)
+ return -EINVAL;
+
+ c = to_clk_hw_omap(__clk_get_hw(clk));
+ if (c-ops c-ops-deny_idle)
+ c-ops-deny_idle(c);
+ return 0;
+}
+
+/**
+ * omap2_clk_allow_idle - enable autoidle on an OMAP clock
+ * @clk: struct clk * to enable autoidle for
+ *
+ * Enable autoidle on an OMAP clock.
+ */
+int omap2_clk_allow_idle(struct clk *clk)
+{
+ struct clk_hw_omap *c;
+
+ if (__clk_get_flags(clk) CLK_IS_BASIC)
+ return -EINVAL;
+
+ c = to_clk_hw_omap(__clk_get_hw(clk));
+ if (c-ops c-ops-allow_idle)
+ c-ops-allow_idle(c);
+ return 0;
+}
+
+/**
* omap2_clk_enable_init_clocks - prepare enable a list of clocks
* @clk_names: ptr to an array of strings of clock names to enable
* @num_clocks: number of clock names in @clk_names
diff --git a/arch/arm/mach-omap2/clock.h b/arch/arm/mach-omap2/clock.h
index 7aa32cd..82916cc 100644
--- a/arch/arm/mach-omap2/clock.h
+++ b/arch/arm/mach-omap2/clock.h
@@ -411,6 +411,8 @@ void omap2_clk_dflt_find_idlest(struct clk_hw_omap *clk,
void omap2_init_clk_hw_omap_clocks(struct clk *clk);
int omap2_clk_enable_autoidle_all(void);
int omap2_clk_disable_autoidle_all(void);
+int omap2_clk_allow_idle(struct clk *clk);
+int omap2_clk_deny_idle(struct clk *clk);
void omap2_clk_enable_init_clocks(const char **clk_names, u8 num_clocks);
int omap2_clk_switch_mpurate_at_boot(const char *mpurate_ck_name);
void omap2_clk_print_new_rates(const char *hfclkin_ck_name,
--
1.7.9.5
- Paul
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Re: [PATCH] ARM: dts: OMAP5: Add i2c aliases
On Tuesday 15 October 2013 10:30 PM, Nishanth Menon wrote:
Currently, i2c1 and i2c5 defer probe due to pinctrl dependencies.
This changes the i2c ID each bus is registered with in i2c-dev
interface.
As a result of this, many userspace tools break and there is no
consistent manner to fix the same if the i2c dev interface have no
consistent numbering. Provide alias to allow ordering the i2c devices
correctly.
This looks good Nishanth. Shouldn't we just go ahead and fix these for
all OMAPs/AMxx devices which would have the same problem as OMAP5 ;)
Acked-by: Rajendra Nayak rna...@ti.com
Signed-off-by: Nishanth Menon n...@ti.com
---
arch/arm/boot/dts/omap5.dtsi |5 +
1 file changed, 5 insertions(+)
diff --git a/arch/arm/boot/dts/omap5.dtsi b/arch/arm/boot/dts/omap5.dtsi
index e18ee7e..8970deb 100644
--- a/arch/arm/boot/dts/omap5.dtsi
+++ b/arch/arm/boot/dts/omap5.dtsi
@@ -21,6 +21,11 @@
interrupt-parent = gic;
aliases {
+ i2c0 = i2c1;
+ i2c1 = i2c2;
+ i2c2 = i2c3;
+ i2c3 = i2c4;
+ i2c4 = i2c5;
serial0 = uart1;
serial1 = uart2;
serial2 = uart3;
--
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Re: [PATCH v2 2/5] ARM: dts: omap: Add new bindings for OMAP
On Tuesday 15 October 2013 12:57 PM, Benoit Cousson wrote:
Hi Rajendra,
On 09/10/2013 18:45, Benoit Cousson wrote:
+ A couple of DT maintainers
On 09/10/2013 18:41, Rajendra Nayak wrote:
On Wednesday 09 October 2013 08:43 PM, Benoit Cousson wrote:
Hi Rajendra,
On 09/10/2013 12:11, Rajendra Nayak wrote:
On OMAP we have co-processor IPs, memory controllers,
GPIOs which control regulators and power switches to
PMIC, and SoC internal Bus IPs, some or most of which
should either not be reset or idled or both at init.
(In some cases there are erratas which prevent an IP
from being reset)
Have a way to pass this information from DT.
Did you get some acked-by from the DT maintainers?
Every new bindings must be carefully reviewed now.
Nope, I haven't. The patches are on the list for a couple
of months now.
Let's see if Mark and Rob are OK with that.
OK, I've just applied it after a small change in the subject:
ARM: dts: omap: Add reset/idle on init bindings for OMAP
Is that OK for you?
Yes, sounds good. Thanks Benoit.
Thanks,
Benoit
Thanks,
Benoit
Regards,
Benoit
Update the am33xx/omap4 and omap5 dtsi files with the
new bindings for modules which either should not be
idled. reset or both. A later patch would cleanup the
same information that exists today as part of the hwmod
data files.
Signed-off-by: Rajendra Nayak rna...@ti.com
---
.../devicetree/bindings/arm/omap/omap.txt |3 ++-
arch/arm/boot/dts/am33xx.dtsi |2 ++
arch/arm/boot/dts/omap4.dtsi |3 +++
arch/arm/boot/dts/omap5.dtsi |2 ++
4 files changed, 9 insertions(+), 1 deletion(-)
diff --git a/Documentation/devicetree/bindings/arm/omap/omap.txt
b/Documentation/devicetree/bindings/arm/omap/omap.txt
index 91b7049..808c154 100644
--- a/Documentation/devicetree/bindings/arm/omap/omap.txt
+++ b/Documentation/devicetree/bindings/arm/omap/omap.txt
@@ -21,7 +21,8 @@ Required properties:
Optional properties:
- ti,no_idle_on_suspend: When present, it prevents the PM to idle
the module
during suspend.
-
+- ti,no-reset-on-init: When present, the module should not be reset
at init
+- ti,no-idle-on-init: When present, the module should not be idled
at init
Example:
diff --git a/arch/arm/boot/dts/am33xx.dtsi
b/arch/arm/boot/dts/am33xx.dtsi
index f9c5da9..ec33ea0 100644
--- a/arch/arm/boot/dts/am33xx.dtsi
+++ b/arch/arm/boot/dts/am33xx.dtsi
@@ -607,6 +607,7 @@
reg = 0x44d0 0x4000/* M3 UMEM */
0x44d8 0x2000;/* M3 DMEM */
ti,hwmods = wkup_m3;
+ti,no-reset-on-init;
};
elm: elm@4808 {
@@ -637,6 +638,7 @@
gpmc: gpmc@5000 {
compatible = ti,am3352-gpmc;
ti,hwmods = gpmc;
+ti,no-idle-on-init;
reg = 0x5000 0x2000;
interrupts = 100;
gpmc,num-cs = 7;
diff --git a/arch/arm/boot/dts/omap4.dtsi
b/arch/arm/boot/dts/omap4.dtsi
index 22d9f2b..e8fe797 100644
--- a/arch/arm/boot/dts/omap4.dtsi
+++ b/arch/arm/boot/dts/omap4.dtsi
@@ -214,6 +214,7 @@
gpmc,num-cs = 8;
gpmc,num-waitpins = 4;
ti,hwmods = gpmc;
+ti,no-idle-on-init;
};
uart1: serial@4806a000 {
@@ -492,6 +493,7 @@
reg = 0x4c00 0x100;
interrupts = GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH;
ti,hwmods = emif1;
+ti,no-idle-on-init;
phy-type = 1;
hw-caps-read-idle-ctrl;
hw-caps-ll-interface;
@@ -503,6 +505,7 @@
reg = 0x4d00 0x100;
interrupts = GIC_SPI 111 IRQ_TYPE_LEVEL_HIGH;
ti,hwmods = emif2;
+ti,no-idle-on-init;
phy-type = 1;
hw-caps-read-idle-ctrl;
hw-caps-ll-interface;
diff --git a/arch/arm/boot/dts/omap5.dtsi
b/arch/arm/boot/dts/omap5.dtsi
index 7cdea1b..a9d49df 100644
--- a/arch/arm/boot/dts/omap5.dtsi
+++ b/arch/arm/boot/dts/omap5.dtsi
@@ -607,6 +607,7 @@
emif1: emif@0x4c00 {
compatible= ti,emif-4d5;
ti,hwmods= emif1;
+ti,no-idle-on-init;
phy-type= 2; /* DDR PHY type: Intelli PHY */
reg = 0x4c00 0x400;
interrupts = GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH;
@@ -618,6 +619,7 @@
emif2: emif@0x4d00 {
compatible= ti,emif-4d5;
ti,hwmods= emif2;
+ti,no-idle-on-init;
phy-type= 2; /* DDR PHY type: Intelli PHY */
reg = 0x4d00 0x400;
interrupts = GIC_SPI 111 IRQ_TYPE_LEVEL_HIGH;
--
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Re: [PATCH 3/3] ARM: OMAP2+: Let DT say what devices should not to idled or reset
On Wednesday 09 October 2013 12:54 PM, Paul Walmsley wrote: Hi Benoît, Rajendra, On Tue, 20 Aug 2013, Rajendra Nayak wrote: Now that we have DT bindings to specify which devices on the SoC should not be reset or idled, get rid of the same information existing as part of the hwmod data files and pass this info from DT instead. For GPMC, the HWMOD_INIT_NO_RESET flag seems to be added in hwmod not due to any errata around the GPMC IP, but rather because any timings set by the bootloader are not being correctly programmed by the kernel. This seems like something that needs to be fixed as part of GPMC driver in the kernel, and hence the flag is left as is in hwmod, which can be removed once the driver does what its expected to. Signed-off-by: Rajendra Nayak rna...@ti.com --- arch/arm/boot/dts/am33xx.dtsi |2 ++ arch/arm/boot/dts/omap4.dtsi |3 +++ arch/arm/boot/dts/omap5.dtsi |2 ++ arch/arm/mach-omap2/omap_hwmod_33xx_data.c |4 ++-- arch/arm/mach-omap2/omap_hwmod_44xx_data.c |4 +--- arch/arm/mach-omap2/omap_hwmod_54xx_data.c |2 -- 6 files changed, 10 insertions(+), 7 deletions(-) Looking at this one, maybe the best thing for this patch is for Rajendra to split it into two patches. Benoît can merge the DTS patch first, then I can merge the hwmod side as a cleanup once the first one goes in. That will avoid conflicts from other DTS and hwmod changes going into the tree. Rajendra, when you do the split, please add in the DT documentation part from patch 2. Am going to strip that out from the second patch and just merge the hwmod changes. Sound good? Sure Paul, I'll repost the complete series with proper splits such that its easier for you and Benoit to pick them up independently. - Paul -- To unsubscribe from this list: send the line unsubscribe linux-omap in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
Re: [PATCH 3/3] ARM: OMAP2+: Let DT say what devices should not to idled or reset
On Wednesday 09 October 2013 01:49 PM, Benoit Cousson wrote: Hi Rajendra, On 09/10/2013 09:37, Rajendra Nayak wrote: On Wednesday 09 October 2013 12:54 PM, Paul Walmsley wrote: Hi Benoît, Rajendra, On Tue, 20 Aug 2013, Rajendra Nayak wrote: Now that we have DT bindings to specify which devices on the SoC should not be reset or idled, get rid of the same information existing as part of the hwmod data files and pass this info from DT instead. For GPMC, the HWMOD_INIT_NO_RESET flag seems to be added in hwmod not due to any errata around the GPMC IP, but rather because any timings set by the bootloader are not being correctly programmed by the kernel. This seems like something that needs to be fixed as part of GPMC driver in the kernel, and hence the flag is left as is in hwmod, which can be removed once the driver does what its expected to. Signed-off-by: Rajendra Nayak rna...@ti.com --- arch/arm/boot/dts/am33xx.dtsi |2 ++ arch/arm/boot/dts/omap4.dtsi |3 +++ arch/arm/boot/dts/omap5.dtsi |2 ++ arch/arm/mach-omap2/omap_hwmod_33xx_data.c |4 ++-- arch/arm/mach-omap2/omap_hwmod_44xx_data.c |4 +--- arch/arm/mach-omap2/omap_hwmod_54xx_data.c |2 -- 6 files changed, 10 insertions(+), 7 deletions(-) Looking at this one, maybe the best thing for this patch is for Rajendra to split it into two patches. Benoît can merge the DTS patch first, then I can merge the hwmod side as a cleanup once the first one goes in. That will avoid conflicts from other DTS and hwmod changes going into the tree. Rajendra, when you do the split, please add in the DT documentation part from patch 2. Am going to strip that out from the second patch and just merge the hwmod changes. Sound good? Sure Paul, I'll repost the complete series with proper splits such that its easier for you and Benoit to pick them up independently. If you could do it soon, I'm about to send an early pull request to Tony to avoid the trouble we had last time. I am sending them right-away Benoit. Thanks, Benoit -- To unsubscribe from this list: send the line unsubscribe linux-omap in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
[PATCH v2 0/5] OMAP: Add DT bindings to specify when devices should not be idled or reset
Changes in v2: * Patches are split in such a way that DT and hwmod changes are kept in seperate patches so they can be pulled in by Benoit and Paul seperately. * Binding names are slightly updated to address the concern from Tony and Benoit [1] * Added a patch [5/5] to prevent GPIO reset on AM335x EVM-SK board, which was also the original motivation of this series since the board fails to boot from mainline despite support for AM335x and a am335x-evmsk.dts file existing in mainline for quite a while. We have devices like co-processors, SoC internal busses, memory controllers etc which should not be idled or reset. In some cases erratas around IP blocks prevent them from either being idled or reset. Have a way to pass this information from Device tree, and get rid of similar information that exists as part of the omap_hwmod data files for various DT only OMAP SoCs. Boot tested on OMAP4 panda es, AM335x EVM and AM335x EVM-SK [1] http://www.mail-archive.com/linux-omap@vger.kernel.org/msg94349.html Rajendra Nayak (5): ARM: OMAP2+: hwmod: cleanup HWMOD_INIT_NO_RESET usage ARM: dts: omap: Add new bindings for OMAP ARM: OMAP2+: hwmod: Extract no-idle and no-reset info from DT ARM: OMAP2+: hwmod: Cleanup usage of HWMOD_INIT_NO_RESET and HWMOD_INIT_NO_IDLE ARM: dts: AM335x-evmsk: Do not reset gpio0 .../devicetree/bindings/arm/omap/omap.txt |3 ++- arch/arm/boot/dts/am335x-evmsk.dts |4 arch/arm/boot/dts/am33xx.dtsi |2 ++ arch/arm/boot/dts/omap4.dtsi |3 +++ arch/arm/boot/dts/omap5.dtsi |2 ++ arch/arm/mach-omap2/omap_hwmod.c | 23 ++-- arch/arm/mach-omap2/omap_hwmod_33xx_data.c | 22 +-- arch/arm/mach-omap2/omap_hwmod_44xx_data.c |6 ++--- arch/arm/mach-omap2/omap_hwmod_54xx_data.c |4 +--- 9 files changed, 43 insertions(+), 26 deletions(-) -- 1.7.9.5 -- To unsubscribe from this list: send the line unsubscribe linux-omap in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
[PATCH v2 3/5] ARM: OMAP2+: hwmod: Extract no-idle and no-reset info from DT
Now that we have DT bindings to specify which devices should not
be reset and idled during init, make hwmod extract the information
(and store them in internal flags) from Device tree.
Signed-off-by: Rajendra Nayak rna...@ti.com
---
arch/arm/mach-omap2/omap_hwmod.c | 23 ---
1 file changed, 16 insertions(+), 7 deletions(-)
diff --git a/arch/arm/mach-omap2/omap_hwmod.c b/arch/arm/mach-omap2/omap_hwmod.c
index d9ee0ff..b55923a 100644
--- a/arch/arm/mach-omap2/omap_hwmod.c
+++ b/arch/arm/mach-omap2/omap_hwmod.c
@@ -2363,11 +2363,11 @@ static struct device_node *of_dev_hwmod_lookup(struct
device_node *np,
* are part of the device's address space can be ioremapped properly.
* No return value.
*/
-static void __init _init_mpu_rt_base(struct omap_hwmod *oh, void *data)
+static void __init _init_mpu_rt_base(struct omap_hwmod *oh, void *data,
+struct device_node *np)
{
struct omap_hwmod_addr_space *mem;
void __iomem *va_start = NULL;
- struct device_node *np;
if (!oh)
return;
@@ -2383,12 +2383,10 @@ static void __init _init_mpu_rt_base(struct omap_hwmod
*oh, void *data)
oh-name);
/* Extract the IO space from device tree blob */
- if (!of_have_populated_dt())
+ if (!np)
return;
- np = of_dev_hwmod_lookup(of_find_node_by_name(NULL, ocp), oh);
- if (np)
- va_start = of_iomap(np, oh-mpu_rt_idx);
+ va_start = of_iomap(np, oh-mpu_rt_idx);
} else {
va_start = ioremap(mem-pa_start, mem-pa_end - mem-pa_start);
}
@@ -2420,12 +2418,16 @@ static void __init _init_mpu_rt_base(struct omap_hwmod
*oh, void *data)
static int __init _init(struct omap_hwmod *oh, void *data)
{
int r;
+ struct device_node *np = NULL;
if (oh-_state != _HWMOD_STATE_REGISTERED)
return 0;
+ if (of_have_populated_dt())
+ np = of_dev_hwmod_lookup(of_find_node_by_name(NULL, ocp), oh);
+
if (oh-class-sysc)
- _init_mpu_rt_base(oh, NULL);
+ _init_mpu_rt_base(oh, NULL, np);
r = _init_clocks(oh, NULL);
if (r 0) {
@@ -2433,6 +2435,13 @@ static int __init _init(struct omap_hwmod *oh, void
*data)
return -EINVAL;
}
+ if (np) {
+ if (of_find_property(np, ti,no-reset-on-init, NULL))
+ oh-flags |= HWMOD_INIT_NO_RESET;
+ if (of_find_property(np, ti,no-idle-on-init, NULL))
+ oh-flags |= HWMOD_INIT_NO_IDLE;
+ }
+
oh-_state = _HWMOD_STATE_INITIALIZED;
return 0;
--
1.7.9.5
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[PATCH v2 5/5] ARM: dts: AM335x-evmsk: Do not reset gpio0
Do not reset GPIO0 at boot-up because GPIO0 is used
on AM335x EVM-SK to control VTT regulators on DDR3.
Without this EVM-SK boards fail to boot-up because
of DDR3 corruption.
Signed-off-by: Rajendra Nayak rna...@ti.com
---
arch/arm/boot/dts/am335x-evmsk.dts |4
1 file changed, 4 insertions(+)
diff --git a/arch/arm/boot/dts/am335x-evmsk.dts
b/arch/arm/boot/dts/am335x-evmsk.dts
index 4f339fa..0e44d29 100644
--- a/arch/arm/boot/dts/am335x-evmsk.dts
+++ b/arch/arm/boot/dts/am335x-evmsk.dts
@@ -419,3 +419,7 @@
phy_id = davinci_mdio, 1;
phy-mode = rgmii-txid;
};
+
+gpio0 {
+ ti,no-reset-on-init;
+};
--
1.7.9.5
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[PATCH v2 1/5] ARM: OMAP2+: hwmod: cleanup HWMOD_INIT_NO_RESET usage
For modules/IPs/hwmods which do not have
-1- sys-class-reset()
and
-2- hardreset lines
and
-3- No way to do an ocp reset (no sysc control)
the flag 'HWMOD_INIT_NO_RESET' is not much useful.
Cleanup all such instances across various hwmod data files.
Signed-off-by: Rajendra Nayak rna...@ti.com
---
arch/arm/mach-omap2/omap_hwmod_33xx_data.c | 18 +-
arch/arm/mach-omap2/omap_hwmod_44xx_data.c |6 +++---
arch/arm/mach-omap2/omap_hwmod_54xx_data.c |6 +++---
3 files changed, 15 insertions(+), 15 deletions(-)
diff --git a/arch/arm/mach-omap2/omap_hwmod_33xx_data.c
b/arch/arm/mach-omap2/omap_hwmod_33xx_data.c
index 215894f..2815a91 100644
--- a/arch/arm/mach-omap2/omap_hwmod_33xx_data.c
+++ b/arch/arm/mach-omap2/omap_hwmod_33xx_data.c
@@ -52,7 +52,7 @@ static struct omap_hwmod am33xx_emif_hwmod = {
.name = emif,
.class = am33xx_emif_hwmod_class,
.clkdm_name = l3_clkdm,
- .flags = (HWMOD_INIT_NO_IDLE | HWMOD_INIT_NO_RESET),
+ .flags = HWMOD_INIT_NO_IDLE,
.main_clk = dpll_ddr_m2_div2_ck,
.prcm = {
.omap4 = {
@@ -74,7 +74,7 @@ static struct omap_hwmod am33xx_l3_main_hwmod = {
.name = l3_main,
.class = am33xx_l3_hwmod_class,
.clkdm_name = l3_clkdm,
- .flags = (HWMOD_INIT_NO_IDLE | HWMOD_INIT_NO_RESET),
+ .flags = HWMOD_INIT_NO_IDLE,
.main_clk = l3_gclk,
.prcm = {
.omap4 = {
@@ -96,7 +96,7 @@ static struct omap_hwmod am33xx_l3_instr_hwmod = {
.name = l3_instr,
.class = am33xx_l3_hwmod_class,
.clkdm_name = l3_clkdm,
- .flags = (HWMOD_INIT_NO_IDLE | HWMOD_INIT_NO_RESET),
+ .flags = HWMOD_INIT_NO_IDLE,
.main_clk = l3_gclk,
.prcm = {
.omap4 = {
@@ -119,7 +119,7 @@ static struct omap_hwmod am33xx_l4_ls_hwmod = {
.name = l4_ls,
.class = am33xx_l4_hwmod_class,
.clkdm_name = l4ls_clkdm,
- .flags = (HWMOD_INIT_NO_IDLE | HWMOD_INIT_NO_RESET),
+ .flags = HWMOD_INIT_NO_IDLE,
.main_clk = l4ls_gclk,
.prcm = {
.omap4 = {
@@ -134,7 +134,7 @@ static struct omap_hwmod am33xx_l4_hs_hwmod = {
.name = l4_hs,
.class = am33xx_l4_hwmod_class,
.clkdm_name = l4hs_clkdm,
- .flags = (HWMOD_INIT_NO_IDLE | HWMOD_INIT_NO_RESET),
+ .flags = HWMOD_INIT_NO_IDLE,
.main_clk = l4hs_gclk,
.prcm = {
.omap4 = {
@@ -150,7 +150,7 @@ static struct omap_hwmod am33xx_l4_wkup_hwmod = {
.name = l4_wkup,
.class = am33xx_l4_hwmod_class,
.clkdm_name = l4_wkup_clkdm,
- .flags = (HWMOD_INIT_NO_IDLE | HWMOD_INIT_NO_RESET),
+ .flags = HWMOD_INIT_NO_IDLE,
.prcm = {
.omap4 = {
.clkctrl_offs = AM33XX_CM_WKUP_L4WKUP_CLKCTRL_OFFSET,
@@ -170,7 +170,7 @@ static struct omap_hwmod am33xx_mpu_hwmod = {
.name = mpu,
.class = am33xx_mpu_hwmod_class,
.clkdm_name = mpu_clkdm,
- .flags = (HWMOD_INIT_NO_IDLE | HWMOD_INIT_NO_RESET),
+ .flags = HWMOD_INIT_NO_IDLE,
.main_clk = dpll_mpu_m2_ck,
.prcm = {
.omap4 = {
@@ -450,7 +450,7 @@ static struct omap_hwmod am33xx_ocmcram_hwmod = {
.name = ocmcram,
.class = am33xx_ocmcram_hwmod_class,
.clkdm_name = l3_clkdm,
- .flags = (HWMOD_INIT_NO_IDLE | HWMOD_INIT_NO_RESET),
+ .flags = HWMOD_INIT_NO_IDLE,
.main_clk = l3_gclk,
.prcm = {
.omap4 = {
@@ -532,7 +532,7 @@ static struct omap_hwmod am33xx_control_hwmod = {
.name = control,
.class = am33xx_control_hwmod_class,
.clkdm_name = l4_wkup_clkdm,
- .flags = (HWMOD_INIT_NO_IDLE | HWMOD_INIT_NO_RESET),
+ .flags = HWMOD_INIT_NO_IDLE,
.main_clk = dpll_core_m4_div2_ck,
.prcm = {
.omap4 = {
diff --git a/arch/arm/mach-omap2/omap_hwmod_44xx_data.c
b/arch/arm/mach-omap2/omap_hwmod_44xx_data.c
index 9c3b504..1e5b12c 100644
--- a/arch/arm/mach-omap2/omap_hwmod_44xx_data.c
+++ b/arch/arm/mach-omap2/omap_hwmod_44xx_data.c
@@ -914,7 +914,7 @@ static struct omap_hwmod omap44xx_emif1_hwmod = {
.name = emif1,
.class = omap44xx_emif_hwmod_class,
.clkdm_name = l3_emif_clkdm,
- .flags = HWMOD_INIT_NO_IDLE | HWMOD_INIT_NO_RESET,
+ .flags = HWMOD_INIT_NO_IDLE,
.main_clk
[PATCH v2 2/5] ARM: dts: omap: Add new bindings for OMAP
On OMAP we have co-processor IPs, memory controllers,
GPIOs which control regulators and power switches to
PMIC, and SoC internal Bus IPs, some or most of which
should either not be reset or idled or both at init.
(In some cases there are erratas which prevent an IP
from being reset)
Have a way to pass this information from DT.
Update the am33xx/omap4 and omap5 dtsi files with the
new bindings for modules which either should not be
idled. reset or both. A later patch would cleanup the
same information that exists today as part of the hwmod
data files.
Signed-off-by: Rajendra Nayak rna...@ti.com
---
.../devicetree/bindings/arm/omap/omap.txt |3 ++-
arch/arm/boot/dts/am33xx.dtsi |2 ++
arch/arm/boot/dts/omap4.dtsi |3 +++
arch/arm/boot/dts/omap5.dtsi |2 ++
4 files changed, 9 insertions(+), 1 deletion(-)
diff --git a/Documentation/devicetree/bindings/arm/omap/omap.txt
b/Documentation/devicetree/bindings/arm/omap/omap.txt
index 91b7049..808c154 100644
--- a/Documentation/devicetree/bindings/arm/omap/omap.txt
+++ b/Documentation/devicetree/bindings/arm/omap/omap.txt
@@ -21,7 +21,8 @@ Required properties:
Optional properties:
- ti,no_idle_on_suspend: When present, it prevents the PM to idle the module
during suspend.
-
+- ti,no-reset-on-init: When present, the module should not be reset at init
+- ti,no-idle-on-init: When present, the module should not be idled at init
Example:
diff --git a/arch/arm/boot/dts/am33xx.dtsi b/arch/arm/boot/dts/am33xx.dtsi
index f9c5da9..ec33ea0 100644
--- a/arch/arm/boot/dts/am33xx.dtsi
+++ b/arch/arm/boot/dts/am33xx.dtsi
@@ -607,6 +607,7 @@
reg = 0x44d0 0x4000/* M3 UMEM */
0x44d8 0x2000; /* M3 DMEM */
ti,hwmods = wkup_m3;
+ ti,no-reset-on-init;
};
elm: elm@4808 {
@@ -637,6 +638,7 @@
gpmc: gpmc@5000 {
compatible = ti,am3352-gpmc;
ti,hwmods = gpmc;
+ ti,no-idle-on-init;
reg = 0x5000 0x2000;
interrupts = 100;
gpmc,num-cs = 7;
diff --git a/arch/arm/boot/dts/omap4.dtsi b/arch/arm/boot/dts/omap4.dtsi
index 22d9f2b..e8fe797 100644
--- a/arch/arm/boot/dts/omap4.dtsi
+++ b/arch/arm/boot/dts/omap4.dtsi
@@ -214,6 +214,7 @@
gpmc,num-cs = 8;
gpmc,num-waitpins = 4;
ti,hwmods = gpmc;
+ ti,no-idle-on-init;
};
uart1: serial@4806a000 {
@@ -492,6 +493,7 @@
reg = 0x4c00 0x100;
interrupts = GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH;
ti,hwmods = emif1;
+ ti,no-idle-on-init;
phy-type = 1;
hw-caps-read-idle-ctrl;
hw-caps-ll-interface;
@@ -503,6 +505,7 @@
reg = 0x4d00 0x100;
interrupts = GIC_SPI 111 IRQ_TYPE_LEVEL_HIGH;
ti,hwmods = emif2;
+ ti,no-idle-on-init;
phy-type = 1;
hw-caps-read-idle-ctrl;
hw-caps-ll-interface;
diff --git a/arch/arm/boot/dts/omap5.dtsi b/arch/arm/boot/dts/omap5.dtsi
index 7cdea1b..a9d49df 100644
--- a/arch/arm/boot/dts/omap5.dtsi
+++ b/arch/arm/boot/dts/omap5.dtsi
@@ -607,6 +607,7 @@
emif1: emif@0x4c00 {
compatible = ti,emif-4d5;
ti,hwmods = emif1;
+ ti,no-idle-on-init;
phy-type= 2; /* DDR PHY type: Intelli PHY */
reg = 0x4c00 0x400;
interrupts = GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH;
@@ -618,6 +619,7 @@
emif2: emif@0x4d00 {
compatible = ti,emif-4d5;
ti,hwmods = emif2;
+ ti,no-idle-on-init;
phy-type= 2; /* DDR PHY type: Intelli PHY */
reg = 0x4d00 0x400;
interrupts = GIC_SPI 111 IRQ_TYPE_LEVEL_HIGH;
--
1.7.9.5
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[PATCH v2 4/5] ARM: OMAP2+: hwmod: Cleanup usage of HWMOD_INIT_NO_RESET and HWMOD_INIT_NO_IDLE
With DT bindings to specify which devices should not be idled and reset
at init being in place, and the corresponding dtsi files for am33xx/omap4
and omap5 updated using those bindings, we can now clean up hwmod internal
flags for HWMOD_INIT_NO_RESET and HWMOD_INIT_NO_IDLE which were infact used
to specify the exact same information.
For GPMC, the HWMOD_INIT_NO_RESET flag seems to be added in hwmod not due to
any errata around the GPMC IP, but rather because any timings
set by the bootloader are not being correctly programmed by the kernel.
This seems like something that needs to be fixed as part of GPMC driver
in the kernel, and hence the flag is left as is in hwmod, which can be
removed once the driver does what its expected to.
Signed-off-by: Rajendra Nayak rna...@ti.com
---
arch/arm/mach-omap2/omap_hwmod_33xx_data.c |4 ++--
arch/arm/mach-omap2/omap_hwmod_44xx_data.c |4 +---
arch/arm/mach-omap2/omap_hwmod_54xx_data.c |2 --
3 files changed, 3 insertions(+), 7 deletions(-)
diff --git a/arch/arm/mach-omap2/omap_hwmod_33xx_data.c
b/arch/arm/mach-omap2/omap_hwmod_33xx_data.c
index 2815a91..e8dc72d 100644
--- a/arch/arm/mach-omap2/omap_hwmod_33xx_data.c
+++ b/arch/arm/mach-omap2/omap_hwmod_33xx_data.c
@@ -198,7 +198,7 @@ static struct omap_hwmod am33xx_wkup_m3_hwmod = {
.class = am33xx_wkup_m3_hwmod_class,
.clkdm_name = l4_wkup_aon_clkdm,
/* Keep hardreset asserted */
- .flags = HWMOD_INIT_NO_RESET | HWMOD_NO_IDLEST,
+ .flags = HWMOD_NO_IDLEST,
.main_clk = dpll_core_m4_div2_ck,
.prcm = {
.omap4 = {
@@ -932,7 +932,7 @@ static struct omap_hwmod am33xx_gpmc_hwmod = {
.name = gpmc,
.class = am33xx_gpmc_hwmod_class,
.clkdm_name = l3s_clkdm,
- .flags = (HWMOD_INIT_NO_IDLE | HWMOD_INIT_NO_RESET),
+ .flags = HWMOD_INIT_NO_RESET,
.main_clk = l3s_gclk,
.prcm = {
.omap4 = {
diff --git a/arch/arm/mach-omap2/omap_hwmod_44xx_data.c
b/arch/arm/mach-omap2/omap_hwmod_44xx_data.c
index 1e5b12c..a507a70 100644
--- a/arch/arm/mach-omap2/omap_hwmod_44xx_data.c
+++ b/arch/arm/mach-omap2/omap_hwmod_44xx_data.c
@@ -914,7 +914,6 @@ static struct omap_hwmod omap44xx_emif1_hwmod = {
.name = emif1,
.class = omap44xx_emif_hwmod_class,
.clkdm_name = l3_emif_clkdm,
- .flags = HWMOD_INIT_NO_IDLE,
.main_clk = ddrphy_ck,
.prcm = {
.omap4 = {
@@ -930,7 +929,6 @@ static struct omap_hwmod omap44xx_emif2_hwmod = {
.name = emif2,
.class = omap44xx_emif_hwmod_class,
.clkdm_name = l3_emif_clkdm,
- .flags = HWMOD_INIT_NO_IDLE,
.main_clk = ddrphy_ck,
.prcm = {
.omap4 = {
@@ -1184,7 +1182,7 @@ static struct omap_hwmod omap44xx_gpmc_hwmod = {
* the kernel from the board file or DT data.
* HWMOD_INIT_NO_RESET should be removed ASAP.
*/
- .flags = HWMOD_INIT_NO_IDLE | HWMOD_INIT_NO_RESET,
+ .flags = HWMOD_INIT_NO_RESET,
.prcm = {
.omap4 = {
.clkctrl_offs = OMAP4_CM_L3_2_GPMC_CLKCTRL_OFFSET,
diff --git a/arch/arm/mach-omap2/omap_hwmod_54xx_data.c
b/arch/arm/mach-omap2/omap_hwmod_54xx_data.c
index e3caee1..e47f24d 100644
--- a/arch/arm/mach-omap2/omap_hwmod_54xx_data.c
+++ b/arch/arm/mach-omap2/omap_hwmod_54xx_data.c
@@ -352,7 +352,6 @@ static struct omap_hwmod omap54xx_emif1_hwmod = {
.name = emif1,
.class = omap54xx_emif_hwmod_class,
.clkdm_name = emif_clkdm,
- .flags = HWMOD_INIT_NO_IDLE,
.main_clk = dpll_core_h11x2_ck,
.prcm = {
.omap4 = {
@@ -368,7 +367,6 @@ static struct omap_hwmod omap54xx_emif2_hwmod = {
.name = emif2,
.class = omap54xx_emif_hwmod_class,
.clkdm_name = emif_clkdm,
- .flags = HWMOD_INIT_NO_IDLE,
.main_clk = dpll_core_h11x2_ck,
.prcm = {
.omap4 = {
--
1.7.9.5
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Re: [PATCH v2 2/5] ARM: dts: omap: Add new bindings for OMAP
On Wednesday 09 October 2013 08:43 PM, Benoit Cousson wrote:
Hi Rajendra,
On 09/10/2013 12:11, Rajendra Nayak wrote:
On OMAP we have co-processor IPs, memory controllers,
GPIOs which control regulators and power switches to
PMIC, and SoC internal Bus IPs, some or most of which
should either not be reset or idled or both at init.
(In some cases there are erratas which prevent an IP
from being reset)
Have a way to pass this information from DT.
Did you get some acked-by from the DT maintainers?
Every new bindings must be carefully reviewed now.
Nope, I haven't. The patches are on the list for a couple
of months now.
Regards,
Benoit
Update the am33xx/omap4 and omap5 dtsi files with the
new bindings for modules which either should not be
idled. reset or both. A later patch would cleanup the
same information that exists today as part of the hwmod
data files.
Signed-off-by: Rajendra Nayak rna...@ti.com
---
.../devicetree/bindings/arm/omap/omap.txt |3 ++-
arch/arm/boot/dts/am33xx.dtsi |2 ++
arch/arm/boot/dts/omap4.dtsi |3 +++
arch/arm/boot/dts/omap5.dtsi |2 ++
4 files changed, 9 insertions(+), 1 deletion(-)
diff --git a/Documentation/devicetree/bindings/arm/omap/omap.txt
b/Documentation/devicetree/bindings/arm/omap/omap.txt
index 91b7049..808c154 100644
--- a/Documentation/devicetree/bindings/arm/omap/omap.txt
+++ b/Documentation/devicetree/bindings/arm/omap/omap.txt
@@ -21,7 +21,8 @@ Required properties:
Optional properties:
- ti,no_idle_on_suspend: When present, it prevents the PM to idle the
module
during suspend.
-
+- ti,no-reset-on-init: When present, the module should not be reset at init
+- ti,no-idle-on-init: When present, the module should not be idled at init
Example:
diff --git a/arch/arm/boot/dts/am33xx.dtsi b/arch/arm/boot/dts/am33xx.dtsi
index f9c5da9..ec33ea0 100644
--- a/arch/arm/boot/dts/am33xx.dtsi
+++ b/arch/arm/boot/dts/am33xx.dtsi
@@ -607,6 +607,7 @@
reg = 0x44d0 0x4000/* M3 UMEM */
0x44d8 0x2000;/* M3 DMEM */
ti,hwmods = wkup_m3;
+ti,no-reset-on-init;
};
elm: elm@4808 {
@@ -637,6 +638,7 @@
gpmc: gpmc@5000 {
compatible = ti,am3352-gpmc;
ti,hwmods = gpmc;
+ti,no-idle-on-init;
reg = 0x5000 0x2000;
interrupts = 100;
gpmc,num-cs = 7;
diff --git a/arch/arm/boot/dts/omap4.dtsi b/arch/arm/boot/dts/omap4.dtsi
index 22d9f2b..e8fe797 100644
--- a/arch/arm/boot/dts/omap4.dtsi
+++ b/arch/arm/boot/dts/omap4.dtsi
@@ -214,6 +214,7 @@
gpmc,num-cs = 8;
gpmc,num-waitpins = 4;
ti,hwmods = gpmc;
+ti,no-idle-on-init;
};
uart1: serial@4806a000 {
@@ -492,6 +493,7 @@
reg = 0x4c00 0x100;
interrupts = GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH;
ti,hwmods = emif1;
+ti,no-idle-on-init;
phy-type = 1;
hw-caps-read-idle-ctrl;
hw-caps-ll-interface;
@@ -503,6 +505,7 @@
reg = 0x4d00 0x100;
interrupts = GIC_SPI 111 IRQ_TYPE_LEVEL_HIGH;
ti,hwmods = emif2;
+ti,no-idle-on-init;
phy-type = 1;
hw-caps-read-idle-ctrl;
hw-caps-ll-interface;
diff --git a/arch/arm/boot/dts/omap5.dtsi b/arch/arm/boot/dts/omap5.dtsi
index 7cdea1b..a9d49df 100644
--- a/arch/arm/boot/dts/omap5.dtsi
+++ b/arch/arm/boot/dts/omap5.dtsi
@@ -607,6 +607,7 @@
emif1: emif@0x4c00 {
compatible= ti,emif-4d5;
ti,hwmods= emif1;
+ti,no-idle-on-init;
phy-type= 2; /* DDR PHY type: Intelli PHY */
reg = 0x4c00 0x400;
interrupts = GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH;
@@ -618,6 +619,7 @@
emif2: emif@0x4d00 {
compatible= ti,emif-4d5;
ti,hwmods= emif2;
+ti,no-idle-on-init;
phy-type= 2; /* DDR PHY type: Intelli PHY */
reg = 0x4d00 0x400;
interrupts = GIC_SPI 111 IRQ_TYPE_LEVEL_HIGH;
--
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Re: [PATCH v5 00/11] ARM: OMAP2+: AM43x PRCM basic support
On Tuesday 08 October 2013 11:45 PM, Tony Lindgren wrote: * Rajendra Nayak rna...@ti.com [131003 23:50]: On Tuesday 01 October 2013 12:34 PM, Afzal Mohammed wrote: Hi Paul, Benoit, Tony, This series adds PRCM support (except clock tree) for AM43x SoC's. Please consider this for inclusion in the coming merge window. Patch 02/11 ARM: OMAP2+: hwmod: AM335x/AM43x: move common data may not reach mailing lists due to bigger size, this series is also present @git://gitorious.org/x0148406-public/linux-kernel.git tags/am43x-prcm-v5 Compared to v4, only change is in fixing the powerdomain data. Major changes compared to rfc v3: 1. All register offsets properly taken care for AM43x (with rfc v3, a couple of issues was detected while testing on pre-silicon) 2. There were two patches for common hwmod data movement (one for interconnect and other for ip block data), both were combined to have a cleaner series that is bisectable. 3. Cleaner seperation of common data Major changes compared to v2 (v3 was only an rfc for current approach): 1. omap_hwmod_33xx_43xx_interconnect_data.c has the common interconnect ocp's structs shared between AM335x and AM43x 2. omap_hwmod_33xx_43xx_ipblock_data.c has the common hwmod structs shared between AM335x and AM43x This split and reuse looks much better and readable now. For the complete series, Acked-by: Rajendra Nayak rna...@ti.com Looks good to me too. I'm assuming that Paul will queue this. And let's everybody make note that this will be the _last_ set of hwmod data we'll _ever_ merge as this all should be replaced with device tree + bus driver based approach for future SoCs. But let's get the common clock framework conversion done first, so this can wait until after that. Tony, I hope you meant the 'hwmod replaced with device tree + bus driver based approach' is what can wait until after the common clock framework DT conversion and not the $subject series itself :) regards, Rajendra Acked-by: Tony Lindgren t...@atomide.com -- To unsubscribe from this list: send the line unsubscribe linux-omap in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
Re: [PATCH v5 00/11] ARM: OMAP2+: AM43x PRCM basic support
On Tuesday 01 October 2013 12:34 PM, Afzal Mohammed wrote: Hi Paul, Benoit, Tony, This series adds PRCM support (except clock tree) for AM43x SoC's. Please consider this for inclusion in the coming merge window. Patch 02/11 ARM: OMAP2+: hwmod: AM335x/AM43x: move common data may not reach mailing lists due to bigger size, this series is also present @git://gitorious.org/x0148406-public/linux-kernel.git tags/am43x-prcm-v5 Compared to v4, only change is in fixing the powerdomain data. Major changes compared to rfc v3: 1. All register offsets properly taken care for AM43x (with rfc v3, a couple of issues was detected while testing on pre-silicon) 2. There were two patches for common hwmod data movement (one for interconnect and other for ip block data), both were combined to have a cleaner series that is bisectable. 3. Cleaner seperation of common data Major changes compared to v2 (v3 was only an rfc for current approach): 1. omap_hwmod_33xx_43xx_interconnect_data.c has the common interconnect ocp's structs shared between AM335x and AM43x 2. omap_hwmod_33xx_43xx_ipblock_data.c has the common hwmod structs shared between AM335x and AM43x This split and reuse looks much better and readable now. For the complete series, Acked-by: Rajendra Nayak rna...@ti.com 3. Instances where clock domain or clock topology has changed in the few cases, have separate structures for AM335x and AM43x 4. To handle scenarios where register offsets are different, they are dynamically init-ed in omap_hwmod_33xx_43xx_ipblock_data.c 5. Register offsets for hwmod's that are present either in AM335x or AM43x are updated statically in omap_hwmod_33xx_data.c or omap_hwmod_43xx_data.c as that was cleaner. 6. Remove the change that re-introduces SW_SLEEP for OMAP4, this will be taken care separately. This series has been boot tested on pre-silicon platform with the help of Tero's DT clock tree conversion series. This series has been tested on AM335x-EVM too. Additional details: AM43x reuses most of the IP's from AM335x, as that is the case, much of the AM335x hwmod data is reused. As AM43x PRCM register layout differs from AM335x and is similar to OMAP4, power domain, clock domain hwmod operations are reused from OMAP4. Currently there is no public TRM available for AM43x. Changes based on: v3.12-rc2 Regards Afzal Afzal Mohammed (7): ARM: OMAP2+: hwmod: AM335x/AM43x: move common data ARM: OMAP2+: hwmod: AM335x: runtime register update ARM: OMAP2+: hwmod: AM335x: remove static register offs ARM: OMAP2+: PRCM: AM43x definitions ARM: OMAP2+: hwmod: AM43x support ARM: OMAP2+: hwmod: AM43x operations ARM: OMAP2+: AM43x: PRCM kbuild Ambresh K (3): ARM: OMAP2+: PM: AM43x powerdomain data ARM: OMAP2+: CM: AM43x clockdomain data ARM: OMAP2+: AM43x PRCM init Ankur Kishore (1): ARM: OMAP2+: CM: cm_inst offset s16-u16 arch/arm/mach-omap2/Makefile |9 +- arch/arm/mach-omap2/clockdomain.h |4 +- arch/arm/mach-omap2/clockdomains43xx_data.c| 196 ++ arch/arm/mach-omap2/cm33xx.c | 16 +- arch/arm/mach-omap2/cm33xx.h | 12 +- arch/arm/mach-omap2/cminst44xx.c | 29 +- arch/arm/mach-omap2/cminst44xx.h | 26 +- arch/arm/mach-omap2/io.c |6 + arch/arm/mach-omap2/omap_hwmod.c |8 + arch/arm/mach-omap2/omap_hwmod.h |1 + .../mach-omap2/omap_hwmod_33xx_43xx_common_data.h | 163 ++ .../omap_hwmod_33xx_43xx_interconnect_data.c | 643 +++ .../mach-omap2/omap_hwmod_33xx_43xx_ipblock_data.c | 1456 +++ arch/arm/mach-omap2/omap_hwmod_33xx_data.c | 1966 +--- arch/arm/mach-omap2/omap_hwmod_43xx_data.c | 622 +++ arch/arm/mach-omap2/powerdomain.h |1 + arch/arm/mach-omap2/powerdomains43xx_data.c| 136 ++ arch/arm/mach-omap2/prcm43xx.h | 141 ++ 18 files changed, 3432 insertions(+), 2003 deletions(-) create mode 100644 arch/arm/mach-omap2/clockdomains43xx_data.c create mode 100644 arch/arm/mach-omap2/omap_hwmod_33xx_43xx_common_data.h create mode 100644 arch/arm/mach-omap2/omap_hwmod_33xx_43xx_interconnect_data.c create mode 100644 arch/arm/mach-omap2/omap_hwmod_33xx_43xx_ipblock_data.c create mode 100644 arch/arm/mach-omap2/omap_hwmod_43xx_data.c create mode 100644 arch/arm/mach-omap2/powerdomains43xx_data.c create mode 100644 arch/arm/mach-omap2/prcm43xx.h -- To unsubscribe from this list: send the line unsubscribe linux-omap in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
Re: [PATCH 1/3] crypto: omap-des: Add omap-des driver for OMAP4/AM43xx
[]..
+
+#define pr_fmt(fmt) %s: fmt, __func__
+
+#ifdef DEBUG
+#define prn(num) printk(#num =%d\n, num)
+#define prx(num) printk(#num =%x\n, num)
+#else
+#define prn(num) do { } while (0)
+#define prx(num) do { } while (0)
+#endif
+
+#include linux/err.h
+#include linux/module.h
+#include linux/init.h
+#include linux/errno.h
+#include linux/kernel.h
+#include linux/platform_device.h
+#include linux/scatterlist.h
+#include linux/dma-mapping.h
+#include linux/dmaengine.h
+#include linux/omap-dma.h
+#include linux/pm_runtime.h
+#include linux/of.h
+#include linux/of_device.h
+#include linux/of_address.h
+#include linux/io.h
+#include linux/crypto.h
+#include linux/interrupt.h
+#include crypto/scatterwalk.h
+#include crypto/des.h
+
+#define DST_MAXBURST 2
+
+#define DES_BLOCK_WORDS (DES_BLOCK_SIZE 2)
+
+#define _calc_walked(inout) (dd-inout##_walk.offset -
dd-inout##_sg-offset)
+
+#define DES_REG_KEY(dd, x) ((dd)-pdata-key_ofs - \
+ ((x ^ 0x01) * 0x04))
+
+#define DES_REG_IV(dd, x)((dd)-pdata-iv_ofs + ((x) * 0x04))
+
+#define DES_REG_CTRL(dd) ((dd)-pdata-ctrl_ofs)
+#define DES_REG_CTRL_CBC (1 4)
+#define DES_REG_CTRL_TDES(1 3)
+#define DES_REG_CTRL_DIRECTION (1 2)
+#define DES_REG_CTRL_INPUT_READY (1 1)
+#define DES_REG_CTRL_OUTPUT_READY(1 0)
Why not use bitops like you have done below.
+
+#define DES_REG_DATA_N(dd, x)((dd)-pdata-data_ofs + ((x) *
0x04))
+
+#define DES_REG_REV(dd) ((dd)-pdata-rev_ofs)
+
+#define DES_REG_MASK(dd) ((dd)-pdata-mask_ofs)
+
+#define DES_REG_LENGTH_N(x) (0x24 + ((x) * 0x04))
+
+#define DES_REG_IRQ_STATUS(dd) ((dd)-pdata-irq_status_ofs)
+#define DES_REG_IRQ_ENABLE(dd) ((dd)-pdata-irq_enable_ofs)
+#define DES_REG_IRQ_DATA_INBIT(1)
+#define DES_REG_IRQ_DATA_OUT BIT(2)
+
+#define FLAGS_MODE_MASK 0x000f
+#define FLAGS_ENCRYPTBIT(0)
+#define FLAGS_CBCBIT(1)
+#define FLAGS_INIT BIT(4)
+#define FLAGS_BUSY BIT(6)
+
[]..
+struct omap_des_pdata {
+ struct omap_des_algs_info *algs_info;
+ unsigned intalgs_info_size;
+
+ void(*trigger)(struct omap_des_dev *dd, int length);
Is this really used? How does a DT platform pass function pointers?
+
+ u32 key_ofs;
+ u32 iv_ofs;
+ u32 ctrl_ofs;
+ u32 data_ofs;
+ u32 rev_ofs;
+ u32 mask_ofs;
+ u32 irq_enable_ofs;
+ u32 irq_status_ofs;
+
+ u32 dma_enable_in;
+ u32 dma_enable_out;
+ u32 dma_start;
+
+ u32 major_mask;
+ u32 major_shift;
+ u32 minor_mask;
+ u32 minor_shift;
+};
+
+struct omap_des_dev {
+ struct list_headlist;
+ unsigned long phys_base;
+ void __iomem*io_base;
+ struct omap_des_ctx *ctx;
+ struct device *dev;
+ unsigned long flags;
+ int err;
+
+ /* spinlock used for queues */
+ spinlock_t lock;
+ struct crypto_queue queue;
+
+ struct tasklet_struct done_task;
+ struct tasklet_struct queue_task;
+
+ struct ablkcipher_request *req;
+ /*
+ * total is used by PIO mode for book keeping so introduce
+ * variable total_save as need it to calc page_order
+ */
+ size_t total;
+ size_t total_save;
+
+ struct scatterlist *in_sg;
+ struct scatterlist *out_sg;
+
+ /* Buffers for copying for unaligned cases */
+ struct scatterlist in_sgl;
+ struct scatterlist out_sgl;
+ struct scatterlist *orig_out;
+ int sgs_copied;
+
+ struct scatter_walk in_walk;
+ struct scatter_walk out_walk;
+ int dma_in;
+ struct dma_chan *dma_lch_in;
+ int dma_out;
+ struct dma_chan *dma_lch_out;
+ int in_sg_len;
+ int out_sg_len;
+ int pio_only;
+ const struct omap_des_pdata *pdata;
+};
+
+/* keep registered devices data here */
+static LIST_HEAD(dev_list);
+static DEFINE_SPINLOCK(list_lock);
+
[]..
+
+static int omap_des_crypt_dma_start(struct omap_des_dev *dd)
+{
+ struct crypto_tfm *tfm = crypto_ablkcipher_tfm(
+ crypto_ablkcipher_reqtfm(dd-req));
+ int err;
+
+
Re: [PATCH v2 3/3] ARM: OMAP4+: Remove static iotable mappings for SRAM
On Thursday 29 August 2013 10:50 PM, Kevin Hilman wrote:
Rajendra Nayak rna...@ti.com writes:
In order to handle errata I688, a page of sram was reserved by doing a
static iotable map. Now that we use gen_pool to manage sram, we can
completely remove all of these static mappings and use gen_pool_alloc()
to get the one page of sram space needed to implement errata I688.
Suggested-by: Sekhar Nori nsek...@ti.com
Signed-off-by: Rajendra Nayak rna...@ti.com
[...]
@@ -71,6 +72,21 @@ void omap_bus_sync(void)
}
EXPORT_SYMBOL(omap_bus_sync);
+static int __init omap4_sram_init(void)
+{
+struct device_node *np;
+struct gen_pool *sram_pool;
+
+np = of_find_compatible_node(NULL, NULL, ti,omap4-mpu);
+if (!np)
+pr_warn(%s:Unable to allocate sram needed to handle errata
I688\n,
+ __func__);
+sram_pool = of_get_named_gen_pool(np, sram, 0);
I haven't actually tested this, but if there is no 'sram' property defined...
+sram_sync = (void *)gen_pool_alloc(sram_pool, PAGE_SIZE);
... does this still behave properly?
I guess not :(
of_get_named_gen_pool() ends up returning NULL, but passing NULL to
gen_pool_alloc()
crashes. Will fix with the additional check for non-NULL sram_pool, thanks.
regards,
Rajendra
+return 0;
+}
Kevin
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Re: [PATCH 2/2] ARM: OMAP4+: Move SRAM data to DT
On Wednesday 28 August 2013 03:54 PM, Sekhar Nori wrote:
On Wednesday 28 August 2013 11:53 AM, Rajendra Nayak wrote:
On Tuesday 27 August 2013 04:53 PM, Sekhar Nori wrote:
On Tuesday 27 August 2013 03:41 PM, Rajendra Nayak wrote:
Use drivers/misc/sram.c driver to manage SRAM on all DT only
OMAP platforms (am33xx, am43xx, omap4 and omap5) instead of
the existing private implementation.
Address and size related data is removed from mach-omap2/sram.c
and now passed to drivers/misc/sram.c from DT.
Users can hence use general purpose allocator apis instead of
OMAP private ones to manage and use SRAM.
Currently there are no users on SRAM on these platfoms.
Signed-off-by: Rajendra Nayak rna...@ti.com
Nice getting rid of code.
diff --git a/arch/arm/mach-omap2/sram.h b/arch/arm/mach-omap2/sram.h
index ca7277c..3f83b80 100644
--- a/arch/arm/mach-omap2/sram.h
+++ b/arch/arm/mach-omap2/sram.h
@@ -80,4 +80,3 @@ static inline void omap_push_sram_idle(void) {}
#else
#define OMAP4_SRAM_PA 0x4030
#endif
-#define AM33XX_SRAM_PA0x4030
I guess OMAP4_SRAM_PA is left in the code to take care of errata I688?
right.
How about removing the iotable entry for SRAM on OMAP4 and converting
omap_barriers_init() to use the gen_pool API instead of passing an
incremented address to DT?
Actually we dont really need to alloc and manage any sram pool for handling
the errata. It just needs to know an sram location which it can read and
write
back into (which can be any sram location used/unused).
But there will be a race with other writes to SRAM since omap_bus_sync()
is not atomic context.
Right, I completely overlooked the fact that omap_bus_sync() is also done every
wmb(). I was thinking its needed only just before a wfi.
I will repost a v2 using gen_pool to allocate sram space to handle errata I688
and get rid of all the static mappings.
regards,
Rajendra
Thanks,
Sekhar
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[PATCH v2 2/3] ARM: OMAP4+: Move SRAM data to DT
Use drivers/misc/sram.c driver to manage SRAM on all DT only
OMAP platforms (am33xx, am43xx, omap4 and omap5) instead of
the existing private plat-omap/sram.c
Address and size related data is removed from mach-omap2/sram.c
and now passed to drivers/misc/sram.c from DT.
Users can hence use general purpose allocator apis instead of
OMAP private ones to manage and use SRAM.
Signed-off-by: Rajendra Nayak rna...@ti.com
---
arch/arm/boot/dts/am33xx.dtsi|5 ++---
arch/arm/boot/dts/am4372.dtsi|5 +
arch/arm/boot/dts/omap4.dtsi |5 +
arch/arm/boot/dts/omap5.dtsi |5 +
arch/arm/configs/omap2plus_defconfig |1 +
arch/arm/mach-omap2/sram.c | 26 +-
arch/arm/mach-omap2/sram.h |1 -
7 files changed, 19 insertions(+), 29 deletions(-)
diff --git a/arch/arm/boot/dts/am33xx.dtsi b/arch/arm/boot/dts/am33xx.dtsi
index 38b446b..69cbce9 100644
--- a/arch/arm/boot/dts/am33xx.dtsi
+++ b/arch/arm/boot/dts/am33xx.dtsi
@@ -482,9 +482,8 @@
};
ocmcram: ocmcram@4030 {
- compatible = ti,am3352-ocmcram;
- reg = 0x4030 0x1;
- ti,hwmods = ocmcram;
+ compatible = mmio-sram;
+ reg = 0x4030 0x1; /* 64k */
};
wkup_m3: wkup_m3@44d0 {
diff --git a/arch/arm/boot/dts/am4372.dtsi b/arch/arm/boot/dts/am4372.dtsi
index ddc1df7..5c8cee1 100644
--- a/arch/arm/boot/dts/am4372.dtsi
+++ b/arch/arm/boot/dts/am4372.dtsi
@@ -64,5 +64,10 @@
compatible =
ti,am4372-counter32k,ti,omap-counter32k;
reg = 0x44e86000 0x40;
};
+
+ ocmcram: ocmcram@4030 {
+ compatible = mmio-sram;
+ reg = 0x4030 0x4; /* 256k */
+ };
};
};
diff --git a/arch/arm/boot/dts/omap4.dtsi b/arch/arm/boot/dts/omap4.dtsi
index 22d9f2b..1ba6a77 100644
--- a/arch/arm/boot/dts/omap4.dtsi
+++ b/arch/arm/boot/dts/omap4.dtsi
@@ -126,6 +126,11 @@
pinctrl-single,function-mask = 0x7fff;
};
+ ocmcram: ocmcram@40304000 {
+ compatible = mmio-sram;
+ reg = 0x40304000 0xa000; /* 40k */
+ };
+
sdma: dma-controller@4a056000 {
compatible = ti,omap4430-sdma;
reg = 0x4a056000 0x1000;
diff --git a/arch/arm/boot/dts/omap5.dtsi b/arch/arm/boot/dts/omap5.dtsi
index e643620..461ffd8 100644
--- a/arch/arm/boot/dts/omap5.dtsi
+++ b/arch/arm/boot/dts/omap5.dtsi
@@ -119,6 +119,11 @@
pinctrl-single,function-mask = 0x7fff;
};
+ ocmcram: ocmcram@4030 {
+ compatible = mmio-sram;
+ reg = 0x4030 0x2; /* 128k */
+ };
+
sdma: dma-controller@4a056000 {
compatible = ti,omap4430-sdma;
reg = 0x4a056000 0x1000;
diff --git a/arch/arm/configs/omap2plus_defconfig
b/arch/arm/configs/omap2plus_defconfig
index 5339e6a..5d4c9b8 100644
--- a/arch/arm/configs/omap2plus_defconfig
+++ b/arch/arm/configs/omap2plus_defconfig
@@ -101,6 +101,7 @@ CONFIG_SENSORS_LIS3LV02D=m
CONFIG_SENSORS_TSL2550=m
CONFIG_SENSORS_LIS3_I2C=m
CONFIG_BMP085_I2C=m
+CONFIG_SRAM=y
CONFIG_SCSI=y
CONFIG_BLK_DEV_SD=y
CONFIG_SCSI_MULTI_LUN=y
diff --git a/arch/arm/mach-omap2/sram.c b/arch/arm/mach-omap2/sram.c
index 305fc2b..d5ecb75 100644
--- a/arch/arm/mach-omap2/sram.c
+++ b/arch/arm/mach-omap2/sram.c
@@ -32,12 +32,6 @@
#define OMAP2_SRAM_PUB_PA (OMAP2_SRAM_PA + 0xf800)
#define OMAP3_SRAM_PUB_PA (OMAP3_SRAM_PA + 0x8000)
-#ifdef CONFIG_OMAP4_ERRATA_I688
-#define OMAP4_SRAM_PUB_PA OMAP4_SRAM_PA
-#else
-#define OMAP4_SRAM_PUB_PA (OMAP4_SRAM_PA + 0x4000)
-#endif
-#define OMAP5_SRAM_PA 0x4030
#define SRAM_BOOTLOADER_SZ 0x00
@@ -105,32 +99,14 @@ static void __init omap_detect_sram(void)
} else {
omap_sram_size = 0x8000; /* 32K */
}
- } else if (cpu_is_omap44xx()) {
- omap_sram_start = OMAP4_SRAM_PUB_PA;
- omap_sram_size = 0xa000; /* 40K */
- } else if (soc_is_omap54xx()) {
- omap_sram_start = OMAP5_SRAM_PA;
- omap_sram_size = SZ_128K; /* 128KB */
} else {
omap_sram_start = OMAP2_SRAM_PUB_PA;
omap_sram_size = 0x800; /* 2K */
}
} else {
- if (soc_is_am33xx()) {
- omap_sram_start = AM33XX_SRAM_PA;
- omap_sram_size = 0x1; /* 64K */
- } else
[PATCH v2 1/3] ARM: AM335x: Get rid of unused sram init function
Remove the empty am33xx_sram_init() function.
Signed-off-by: Rajendra Nayak rna...@ti.com
---
arch/arm/mach-omap2/sram.c |7 ---
1 file changed, 7 deletions(-)
diff --git a/arch/arm/mach-omap2/sram.c b/arch/arm/mach-omap2/sram.c
index 4bd0968..305fc2b 100644
--- a/arch/arm/mach-omap2/sram.c
+++ b/arch/arm/mach-omap2/sram.c
@@ -285,11 +285,6 @@ static inline int omap34xx_sram_init(void)
}
#endif /* CONFIG_ARCH_OMAP3 */
-static inline int am33xx_sram_init(void)
-{
- return 0;
-}
-
int __init omap_sram_init(void)
{
omap_detect_sram();
@@ -299,8 +294,6 @@ int __init omap_sram_init(void)
omap242x_sram_init();
else if (cpu_is_omap2430())
omap243x_sram_init();
- else if (soc_is_am33xx())
- am33xx_sram_init();
else if (cpu_is_omap34xx())
omap34xx_sram_init();
--
1.7.9.5
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