Re: [PATCH] ARM: dts: OMAP5: add pmu node

2014-02-12 Thread Benoit Cousson 

Hi Nathan,

On 11/02/2014 21:14, Nathan Lynch wrote:

On 01/29/2014 10:56 AM, Nathan Lynch wrote:

Expose the PMU on OMAP5.

Signed-off-by: Nathan Lynch nathan_ly...@mentor.com


OMAP folks, any issues with this patch?


Yes :-)


Notes:
 Briefly tested with perf on OMAP5 UEVM with next-20140124.

  arch/arm/boot/dts/omap5.dtsi | 6 ++
  1 file changed, 6 insertions(+)

diff --git a/arch/arm/boot/dts/omap5.dtsi b/arch/arm/boot/dts/omap5.dtsi
index a72813a9663e..fbf4661436e2 100644
--- a/arch/arm/boot/dts/omap5.dtsi
+++ b/arch/arm/boot/dts/omap5.dtsi
@@ -76,6 +76,12 @@
 GIC_PPI 10 (GIC_CPU_MASK_RAW(3) | 
IRQ_TYPE_LEVEL_LOW);
};

+   pmu {
+   compatible = arm,cortex-a15-pmu;
+   interrupts = 0 131 4,
+0 132 4;


Could you use the macros instead of hard coded value? You have the 
example just before your modification in the patch itself.


Thanks,
Benoit

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Benoît Cousson
BayLibre
Embedded Linux Technology Lab
www.baylibre.com
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Re: [PATCH] ARM: dts: OMAP5: add pmu node

2014-02-12 Thread Nathan Lynch 
On 02/12/2014 07:00 AM, Benoit Cousson wrote:
 On 01/29/2014 10:56 AM, Nathan Lynch wrote:
 diff --git a/arch/arm/boot/dts/omap5.dtsi b/arch/arm/boot/dts/omap5.dtsi
 index a72813a9663e..fbf4661436e2 100644
 --- a/arch/arm/boot/dts/omap5.dtsi
 +++ b/arch/arm/boot/dts/omap5.dtsi
 @@ -76,6 +76,12 @@
GIC_PPI 10 (GIC_CPU_MASK_RAW(3) |
 IRQ_TYPE_LEVEL_LOW);
   };

 +pmu {
 +compatible = arm,cortex-a15-pmu;
 +interrupts = 0 131 4,
 + 0 132 4;
 
 Could you use the macros instead of hard coded value? You have the
 example just before your modification in the patch itself.

Thanks Benoit.  Sorry for missing that, will fix.

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Re: [PATCH] ARM: dts: OMAP5: add pmu node

2014-02-11 Thread Nathan Lynch 
On 01/29/2014 10:56 AM, Nathan Lynch wrote:
 Expose the PMU on OMAP5.
 
 Signed-off-by: Nathan Lynch nathan_ly...@mentor.com

OMAP folks, any issues with this patch?


 ---
 
 Notes:
 Briefly tested with perf on OMAP5 UEVM with next-20140124.
 
  arch/arm/boot/dts/omap5.dtsi | 6 ++
  1 file changed, 6 insertions(+)
 
 diff --git a/arch/arm/boot/dts/omap5.dtsi b/arch/arm/boot/dts/omap5.dtsi
 index a72813a9663e..fbf4661436e2 100644
 --- a/arch/arm/boot/dts/omap5.dtsi
 +++ b/arch/arm/boot/dts/omap5.dtsi
 @@ -76,6 +76,12 @@
GIC_PPI 10 (GIC_CPU_MASK_RAW(3) | 
 IRQ_TYPE_LEVEL_LOW);
   };
  
 + pmu {
 + compatible = arm,cortex-a15-pmu;
 + interrupts = 0 131 4,
 +  0 132 4;
 + };
 +
   gic: interrupt-controller@48211000 {
   compatible = arm,cortex-a15-gic;
   interrupt-controller;
 

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[PATCH] ARM: dts: OMAP5: add pmu node

2014-01-29 Thread Nathan Lynch 
Expose the PMU on OMAP5.

Signed-off-by: Nathan Lynch nathan_ly...@mentor.com
---

Notes:
Briefly tested with perf on OMAP5 UEVM with next-20140124.

 arch/arm/boot/dts/omap5.dtsi | 6 ++
 1 file changed, 6 insertions(+)

diff --git a/arch/arm/boot/dts/omap5.dtsi b/arch/arm/boot/dts/omap5.dtsi
index a72813a9663e..fbf4661436e2 100644
--- a/arch/arm/boot/dts/omap5.dtsi
+++ b/arch/arm/boot/dts/omap5.dtsi
@@ -76,6 +76,12 @@
 GIC_PPI 10 (GIC_CPU_MASK_RAW(3) | 
IRQ_TYPE_LEVEL_LOW);
};
 
+   pmu {
+   compatible = arm,cortex-a15-pmu;
+   interrupts = 0 131 4,
+0 132 4;
+   };
+
gic: interrupt-controller@48211000 {
compatible = arm,cortex-a15-gic;
interrupt-controller;
-- 
1.8.3.1

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