Re: [PATCH] IRQ: simplify OMAP2 mask_irq/unmask_irq code
* Paul Walmsley <[EMAIL PROTECTED]> [080521 12:15]:
> Hi Tony,
>
> On Wed, 21 May 2008, Tony Lindgren wrote:
>
> > * Paul Walmsley <[EMAIL PROTECTED]> [080520 18:20]:
> > >
> > > Modify mach-omap2/irq.c to simplify the IRQ number-to-IRQ register and
> > > IRQ
> > > number-to-register bit calculations.
> >
> > How about patching Jouni's new omap_irq_pending() for this too?
>
> done - updated patch below.
Thanks, pushing today.
Tony
>
> - Paul
>
>
> [PATCH] IRQ: simplify OMAP2 mask_irq/unmask_irq code
>
> Modify mach-omap2/irq.c to simplify the IRQ number-to-IRQ register and
> IRQ number-to-register bit calculations.
>
> Signed-off-by: Paul Walmsley <[EMAIL PROTECTED]>
> Signed-off-by: Kyungmin Park <[EMAIL PROTECTED]>
> Acked-by: Paul Mundt <[EMAIL PROTECTED]>
>
> size:
>textdata bss dec hex filename
> 3272871 155128 98792 3526791 35d087 vmlinux.3430sdp
> 3272839 155128 98792 3526759 35d067 vmlinux.3430sdp.patched
> ---
>
> arch/arm/mach-omap2/irq.c | 27 ++-
> 1 files changed, 14 insertions(+), 13 deletions(-)
>
>
> diff --git a/arch/arm/mach-omap2/irq.c b/arch/arm/mach-omap2/irq.c
> index f1e1e2e..94d2f93 100644
> --- a/arch/arm/mach-omap2/irq.c
> +++ b/arch/arm/mach-omap2/irq.c
> @@ -28,6 +28,9 @@
> #define INTC_MIR_SET00x008c
> #define INTC_PENDING_IRQ00x0098
>
> +/* Number of IRQ state bits in each MIR register */
> +#define IRQ_BITS_PER_REG 32
> +
> /*
> * OMAP2 has a number of different interrupt controllers, each interrupt
> * controller is identified as its own "bank". Register definitions are
> @@ -68,24 +71,18 @@ static void omap_ack_irq(unsigned int irq)
>
> static void omap_mask_irq(unsigned int irq)
> {
> - int offset = (irq >> 5) << 5;
> + int offset = irq & (~(IRQ_BITS_PER_REG - 1));
>
> - if (irq >= 64)
> - irq %= 64;
> - else if (irq >= 32)
> - irq %= 32;
> + irq &= (IRQ_BITS_PER_REG - 1);
>
> intc_bank_write_reg(1 << irq, &irq_banks[0], INTC_MIR_SET0 + offset);
> }
>
> static void omap_unmask_irq(unsigned int irq)
> {
> - int offset = (irq >> 5) << 5;
> + int offset = irq & (~(IRQ_BITS_PER_REG - 1));
>
> - if (irq >= 64)
> - irq %= 64;
> - else if (irq >= 32)
> - irq %= 32;
> + irq &= (IRQ_BITS_PER_REG - 1);
>
> intc_bank_write_reg(1 << irq, &irq_banks[0], INTC_MIR_CLEAR0 + offset);
> }
> @@ -131,11 +128,15 @@ int omap_irq_pending(void)
> struct omap_irq_bank *bank = irq_banks + i;
> int irq;
>
> - for (irq = 0; irq < bank->nr_irqs; irq += 32)
> - if (intc_bank_read_reg(bank, INTC_PENDING_IRQ0 +
> -((irq >> 5) << 5)))
> + for (irq = 0; irq < bank->nr_irqs; irq += IRQ_BITS_PER_REG) {
> + int offset = irq & (~(IRQ_BITS_PER_REG - 1));
> +
> + if (intc_bank_read_reg(bank, (INTC_PENDING_IRQ0 +
> + offset)))
> return 1;
> + }
> }
> +
> return 0;
> }
>
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Re: [PATCH] IRQ: simplify OMAP2 mask_irq/unmask_irq code
Hi Tony,
On Wed, 21 May 2008, Tony Lindgren wrote:
> * Paul Walmsley <[EMAIL PROTECTED]> [080520 18:20]:
> >
> > Modify mach-omap2/irq.c to simplify the IRQ number-to-IRQ register and IRQ
> > number-to-register bit calculations.
>
> How about patching Jouni's new omap_irq_pending() for this too?
done - updated patch below.
- Paul
[PATCH] IRQ: simplify OMAP2 mask_irq/unmask_irq code
Modify mach-omap2/irq.c to simplify the IRQ number-to-IRQ register and
IRQ number-to-register bit calculations.
Signed-off-by: Paul Walmsley <[EMAIL PROTECTED]>
Signed-off-by: Kyungmin Park <[EMAIL PROTECTED]>
Acked-by: Paul Mundt <[EMAIL PROTECTED]>
size:
textdata bss dec hex filename
3272871 155128 98792 3526791 35d087 vmlinux.3430sdp
3272839 155128 98792 3526759 35d067 vmlinux.3430sdp.patched
---
arch/arm/mach-omap2/irq.c | 27 ++-
1 files changed, 14 insertions(+), 13 deletions(-)
diff --git a/arch/arm/mach-omap2/irq.c b/arch/arm/mach-omap2/irq.c
index f1e1e2e..94d2f93 100644
--- a/arch/arm/mach-omap2/irq.c
+++ b/arch/arm/mach-omap2/irq.c
@@ -28,6 +28,9 @@
#define INTC_MIR_SET0 0x008c
#define INTC_PENDING_IRQ0 0x0098
+/* Number of IRQ state bits in each MIR register */
+#define IRQ_BITS_PER_REG 32
+
/*
* OMAP2 has a number of different interrupt controllers, each interrupt
* controller is identified as its own "bank". Register definitions are
@@ -68,24 +71,18 @@ static void omap_ack_irq(unsigned int irq)
static void omap_mask_irq(unsigned int irq)
{
- int offset = (irq >> 5) << 5;
+ int offset = irq & (~(IRQ_BITS_PER_REG - 1));
- if (irq >= 64)
- irq %= 64;
- else if (irq >= 32)
- irq %= 32;
+ irq &= (IRQ_BITS_PER_REG - 1);
intc_bank_write_reg(1 << irq, &irq_banks[0], INTC_MIR_SET0 + offset);
}
static void omap_unmask_irq(unsigned int irq)
{
- int offset = (irq >> 5) << 5;
+ int offset = irq & (~(IRQ_BITS_PER_REG - 1));
- if (irq >= 64)
- irq %= 64;
- else if (irq >= 32)
- irq %= 32;
+ irq &= (IRQ_BITS_PER_REG - 1);
intc_bank_write_reg(1 << irq, &irq_banks[0], INTC_MIR_CLEAR0 + offset);
}
@@ -131,11 +128,15 @@ int omap_irq_pending(void)
struct omap_irq_bank *bank = irq_banks + i;
int irq;
- for (irq = 0; irq < bank->nr_irqs; irq += 32)
- if (intc_bank_read_reg(bank, INTC_PENDING_IRQ0 +
- ((irq >> 5) << 5)))
+ for (irq = 0; irq < bank->nr_irqs; irq += IRQ_BITS_PER_REG) {
+ int offset = irq & (~(IRQ_BITS_PER_REG - 1));
+
+ if (intc_bank_read_reg(bank, (INTC_PENDING_IRQ0 +
+ offset)))
return 1;
+ }
}
+
return 0;
}
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Re: [PATCH] IRQ: simplify OMAP2 mask_irq/unmask_irq code
Hi,
* Paul Walmsley <[EMAIL PROTECTED]> [080520 18:20]:
>
> Modify mach-omap2/irq.c to simplify the IRQ number-to-IRQ register and IRQ
> number-to-register bit calculations.
How about patching Jouni's new omap_irq_pending() for this too?
Tony
> Signed-off-by: Kyungmin Park <[EMAIL PROTECTED]>
> Signed-off-by: Paul Walmsley <[EMAIL PROTECTED]>
> Acked-by: Paul Mundt <[EMAIL PROTECTED]>
>
> size:
>textdata bss dec hex filename
> 3341347 170992 109008 3621347 3741e3 vmlinux.3430sdp
> 3341315 170992 109008 3621315 3741c3 vmlinux.3430sdp.patched
> ---
>
> arch/arm/mach-omap2/irq.c | 17 +++--
> 1 files changed, 7 insertions(+), 10 deletions(-)
>
>
> diff --git a/arch/arm/mach-omap2/irq.c b/arch/arm/mach-omap2/irq.c
> index ac062ee..9300712 100644
> --- a/arch/arm/mach-omap2/irq.c
> +++ b/arch/arm/mach-omap2/irq.c
> @@ -27,6 +27,9 @@
> #define INTC_MIR_CLEAR0 0x0088
> #define INTC_MIR_SET00x008c
>
> +/* Number of IRQ state bits in each MIR register */
> +#define IRQ_BITS_PER_REG 32
> +
> /*
> * OMAP2 has a number of different interrupt controllers, each interrupt
> * controller is identified as its own "bank". Register definitions are
> @@ -67,24 +70,18 @@ static void omap_ack_irq(unsigned int irq)
>
> static void omap_mask_irq(unsigned int irq)
> {
> - int offset = (irq >> 5) << 5;
> + int offset = irq & (~(IRQ_BITS_PER_REG - 1));
>
> - if (irq >= 64)
> - irq %= 64;
> - else if (irq >= 32)
> - irq %= 32;
> + irq &= (IRQ_BITS_PER_REG - 1);
>
> intc_bank_write_reg(1 << irq, &irq_banks[0], INTC_MIR_SET0 + offset);
> }
>
> static void omap_unmask_irq(unsigned int irq)
> {
> - int offset = (irq >> 5) << 5;
> + int offset = irq & (~(IRQ_BITS_PER_REG - 1));
>
> - if (irq >= 64)
> - irq %= 64;
> - else if (irq >= 32)
> - irq %= 32;
> + irq &= (IRQ_BITS_PER_REG - 1);
>
> intc_bank_write_reg(1 << irq, &irq_banks[0], INTC_MIR_CLEAR0 + offset);
> }
> --
> To unsubscribe from this list: send the line "unsubscribe linux-omap" in
> the body of a message to [EMAIL PROTECTED]
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Re: [PATCH] IRQ: simplify OMAP2 mask_irq/unmask_irq code
Great - thanks everyone for the review, - Paul -- To unsubscribe from this list: send the line "unsubscribe linux-omap" in the body of a message to [EMAIL PROTECTED] More majordomo info at http://vger.kernel.org/majordomo-info.html
[PATCH] IRQ: simplify OMAP2 mask_irq/unmask_irq code
Modify mach-omap2/irq.c to simplify the IRQ number-to-IRQ register and IRQ
number-to-register bit calculations.
Signed-off-by: Kyungmin Park <[EMAIL PROTECTED]>
Signed-off-by: Paul Walmsley <[EMAIL PROTECTED]>
Acked-by: Paul Mundt <[EMAIL PROTECTED]>
size:
textdata bss dec hex filename
3341347 170992 109008 3621347 3741e3 vmlinux.3430sdp
3341315 170992 109008 3621315 3741c3 vmlinux.3430sdp.patched
---
arch/arm/mach-omap2/irq.c | 17 +++--
1 files changed, 7 insertions(+), 10 deletions(-)
diff --git a/arch/arm/mach-omap2/irq.c b/arch/arm/mach-omap2/irq.c
index ac062ee..9300712 100644
--- a/arch/arm/mach-omap2/irq.c
+++ b/arch/arm/mach-omap2/irq.c
@@ -27,6 +27,9 @@
#define INTC_MIR_CLEAR00x0088
#define INTC_MIR_SET0 0x008c
+/* Number of IRQ state bits in each MIR register */
+#define IRQ_BITS_PER_REG 32
+
/*
* OMAP2 has a number of different interrupt controllers, each interrupt
* controller is identified as its own "bank". Register definitions are
@@ -67,24 +70,18 @@ static void omap_ack_irq(unsigned int irq)
static void omap_mask_irq(unsigned int irq)
{
- int offset = (irq >> 5) << 5;
+ int offset = irq & (~(IRQ_BITS_PER_REG - 1));
- if (irq >= 64)
- irq %= 64;
- else if (irq >= 32)
- irq %= 32;
+ irq &= (IRQ_BITS_PER_REG - 1);
intc_bank_write_reg(1 << irq, &irq_banks[0], INTC_MIR_SET0 + offset);
}
static void omap_unmask_irq(unsigned int irq)
{
- int offset = (irq >> 5) << 5;
+ int offset = irq & (~(IRQ_BITS_PER_REG - 1));
- if (irq >= 64)
- irq %= 64;
- else if (irq >= 32)
- irq %= 32;
+ irq &= (IRQ_BITS_PER_REG - 1);
intc_bank_write_reg(1 << irq, &irq_banks[0], INTC_MIR_CLEAR0 + offset);
}
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Re: [PATCH] IRQ: simplify OMAP2 mask_irq/unmask_irq code
On Tue, May 20, 2008 at 06:12:04PM -0600, Paul Walmsley wrote:
> On Wed, 21 May 2008, Kyungmin Park wrote:
> > On Wed, May 21, 2008 at 3:21 AM, Paul Walmsley <[EMAIL PROTECTED]> wrote:
> > >
> > > static void omap_mask_irq(unsigned int irq)
> > > {
> > > - int offset = (irq >> 5) << 5;
> > > + int offset = irq & (~(IRQ_BITS_PER_REG - 1));
> > >
> > > - if (irq >= 64)
> > > - irq %= 64;
> > > - else if (irq >= 32)
> > > - irq %= 32;
> > > + irq %= IRQ_BITS_PER_REG;
> >
> > Is it the right conversion?
> > If the irq is greater then 32 and less then or equal to 64 it's
> > result is different.
> > E.g, If irq is 63 then original irq is 63, but new code is 31
>
> Hmm, in that condition, the result looks the same to me: irq % 32, either
> way?
>
> More practically, if you look at what it does with that irq variable
> afterwards, it seems to be a bug if irq is ever greater than 31:
>
> intc_bank_write_reg(1 << irq, &irq_banks[0], INTC_MIR_CLEAR0 +
> offset);
>
> I think the only case where the new code would work differently than the
> previous code is if irq > 95. But that would be a bug, since the shift
> value would then be > 32, for a 32-bit register.
>
> > And if this code is right, how about to use mask instead of modulo op?
> > irq &= (IRQ_BITS_PER_REG - 1);
>
> Hehe, very good point, that would probably save even more cycles! If you
> agree with the above, perhaps I can convert the code to use that also,
> and add your Signed-off-by also?
>
Kyungmin's idea looks good to me. If you roll the two together, feel free
to add my Acked-by also.
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Re: [PATCH] IRQ: simplify OMAP2 mask_irq/unmask_irq code
On Wed, May 21, 2008 at 9:39 AM, Philip Balister <[EMAIL PROTECTED]> wrote:
> Paul Walmsley wrote:
>>
>> Hello Kyungmin,
>>
>> On Wed, 21 May 2008, Kyungmin Park wrote:
>>
>>> On Wed, May 21, 2008 at 3:21 AM, Paul Walmsley <[EMAIL PROTECTED]> wrote:
static void omap_mask_irq(unsigned int irq)
{
- int offset = (irq >> 5) << 5;
+ int offset = irq & (~(IRQ_BITS_PER_REG - 1));
- if (irq >= 64)
- irq %= 64;
- else if (irq >= 32)
- irq %= 32;
+ irq %= IRQ_BITS_PER_REG;
>>>
>>> Is it the right conversion?
>>> If the irq is greater then 32 and less then or equal to 64 it's
>>> result is different.
>>> E.g, If irq is 63 then original irq is 63, but new code is 31
>>
>> Hmm, in that condition, the result looks the same to me: irq % 32, either
>> way?
>>
>> More practically, if you look at what it does with that irq variable
>> afterwards, it seems to be a bug if irq is ever greater than 31:
>>
>>intc_bank_write_reg(1 << irq, &irq_banks[0], INTC_MIR_CLEAR0 +
>>offset);
>>
>> I think the only case where the new code would work differently than the
>> previous code is if irq > 95. But that would be a bug, since the shift
>> value would then be > 32, for a 32-bit register.
>>
>>> And if this code is right, how about to use mask instead of modulo op?
>>> irq &= (IRQ_BITS_PER_REG - 1);
>>
>> Hehe, very good point, that would probably save even more cycles! If you
>> agree with the above, perhaps I can convert the code to use that also, and
>> add your Signed-off-by also?
>
> On some code where I used % to detect a counter passing multiples of a
> certain number, oprofile revealed that the % operator burned a lot of CPU
> cycles. I suspect this had to do with the counter increasing to very large
> numbers, but ever since, I've tried to avoid the % operator in critical
> paths.
>
Yes, In embedded environment, we should avoid the multiple, divide,
and modulo op as much as possible.
It's best to use the bit operations.
Signed-off-by: Kyungmin Park <[EMAIL PROTECTED]>
BR,
Kyungmin Park
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Re: [PATCH] IRQ: simplify OMAP2 mask_irq/unmask_irq code
Paul Walmsley wrote:
Hello Kyungmin,
On Wed, 21 May 2008, Kyungmin Park wrote:
On Wed, May 21, 2008 at 3:21 AM, Paul Walmsley <[EMAIL PROTECTED]> wrote:
static void omap_mask_irq(unsigned int irq)
{
- int offset = (irq >> 5) << 5;
+ int offset = irq & (~(IRQ_BITS_PER_REG - 1));
- if (irq >= 64)
- irq %= 64;
- else if (irq >= 32)
- irq %= 32;
+ irq %= IRQ_BITS_PER_REG;
Is it the right conversion?
If the irq is greater then 32 and less then or equal to 64 it's
result is different.
E.g, If irq is 63 then original irq is 63, but new code is 31
Hmm, in that condition, the result looks the same to me: irq % 32, either
way?
More practically, if you look at what it does with that irq variable
afterwards, it seems to be a bug if irq is ever greater than 31:
intc_bank_write_reg(1 << irq, &irq_banks[0], INTC_MIR_CLEAR0 +
offset);
I think the only case where the new code would work differently than the
previous code is if irq > 95. But that would be a bug, since the shift
value would then be > 32, for a 32-bit register.
And if this code is right, how about to use mask instead of modulo op?
irq &= (IRQ_BITS_PER_REG - 1);
Hehe, very good point, that would probably save even more cycles! If you
agree with the above, perhaps I can convert the code to use that also,
and add your Signed-off-by also?
On some code where I used % to detect a counter passing multiples of a
certain number, oprofile revealed that the % operator burned a lot of
CPU cycles. I suspect this had to do with the counter increasing to very
large numbers, but ever since, I've tried to avoid the % operator in
critical paths.
Philip
smime.p7s
Description: S/MIME Cryptographic Signature
Re: [PATCH] IRQ: simplify OMAP2 mask_irq/unmask_irq code
Hello Kyungmin,
On Wed, 21 May 2008, Kyungmin Park wrote:
> On Wed, May 21, 2008 at 3:21 AM, Paul Walmsley <[EMAIL PROTECTED]> wrote:
> >
> > static void omap_mask_irq(unsigned int irq)
> > {
> > - int offset = (irq >> 5) << 5;
> > + int offset = irq & (~(IRQ_BITS_PER_REG - 1));
> >
> > - if (irq >= 64)
> > - irq %= 64;
> > - else if (irq >= 32)
> > - irq %= 32;
> > + irq %= IRQ_BITS_PER_REG;
>
> Is it the right conversion?
> If the irq is greater then 32 and less then or equal to 64 it's
> result is different.
> E.g, If irq is 63 then original irq is 63, but new code is 31
Hmm, in that condition, the result looks the same to me: irq % 32, either
way?
More practically, if you look at what it does with that irq variable
afterwards, it seems to be a bug if irq is ever greater than 31:
intc_bank_write_reg(1 << irq, &irq_banks[0], INTC_MIR_CLEAR0 +
offset);
I think the only case where the new code would work differently than the
previous code is if irq > 95. But that would be a bug, since the shift
value would then be > 32, for a 32-bit register.
> And if this code is right, how about to use mask instead of modulo op?
> irq &= (IRQ_BITS_PER_REG - 1);
Hehe, very good point, that would probably save even more cycles! If you
agree with the above, perhaps I can convert the code to use that also,
and add your Signed-off-by also?
- Paul
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Re: [PATCH] IRQ: simplify OMAP2 mask_irq/unmask_irq code
On Wed, May 21, 2008 at 3:21 AM, Paul Walmsley <[EMAIL PROTECTED]> wrote:
>
> Simplify the IRQ register/IRQ register bit calculations in
> mach-omap2/irq.c.
>
> Test-booted on 3430SDP.
>
> Signed-off-by: Paul Walmsley <[EMAIL PROTECTED]>
>
> ---
>
> size:
> textdata bss dec hex filename
> 3341347 170992 109008 3621347 3741e3 vmlinux.3430sdp
> 3341315 170992 109008 3621315 3741c3 vmlinux.3430sdp.patched
>
> ---
>
> arch/arm/mach-omap2/irq.c | 17 +++--
> 1 files changed, 7 insertions(+), 10 deletions(-)
>
>
> diff --git a/arch/arm/mach-omap2/irq.c b/arch/arm/mach-omap2/irq.c
> index ac062ee..f610825 100644
> --- a/arch/arm/mach-omap2/irq.c
> +++ b/arch/arm/mach-omap2/irq.c
> @@ -27,6 +27,9 @@
> #define INTC_MIR_CLEAR00x0088
> #define INTC_MIR_SET0 0x008c
>
> +/* Number of IRQ state bits in each MIR register */
> +#define IRQ_BITS_PER_REG 32
> +
> /*
> * OMAP2 has a number of different interrupt controllers, each interrupt
> * controller is identified as its own "bank". Register definitions are
> @@ -67,24 +70,18 @@ static void omap_ack_irq(unsigned int irq)
>
> static void omap_mask_irq(unsigned int irq)
> {
> - int offset = (irq >> 5) << 5;
> + int offset = irq & (~(IRQ_BITS_PER_REG - 1));
>
> - if (irq >= 64)
> - irq %= 64;
> - else if (irq >= 32)
> - irq %= 32;
> + irq %= IRQ_BITS_PER_REG;
Is it the right conversion?
If the irq is greater then 32 and less then or equal to 64 it's
result is different.
E.g, If irq is 63 then original irq is 63, but new code is 31
And if this code is right, how about to use mask instead of modulo op?
irq &= (IRQ_BITS_PER_REG - 1);
Thank you,
Kyungmin Park
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[PATCH] IRQ: simplify OMAP2 mask_irq/unmask_irq code
Simplify the IRQ register/IRQ register bit calculations in
mach-omap2/irq.c.
Test-booted on 3430SDP.
Signed-off-by: Paul Walmsley <[EMAIL PROTECTED]>
---
size:
textdata bss dec hex filename
3341347 170992 109008 3621347 3741e3 vmlinux.3430sdp
3341315 170992 109008 3621315 3741c3 vmlinux.3430sdp.patched
---
arch/arm/mach-omap2/irq.c | 17 +++--
1 files changed, 7 insertions(+), 10 deletions(-)
diff --git a/arch/arm/mach-omap2/irq.c b/arch/arm/mach-omap2/irq.c
index ac062ee..f610825 100644
--- a/arch/arm/mach-omap2/irq.c
+++ b/arch/arm/mach-omap2/irq.c
@@ -27,6 +27,9 @@
#define INTC_MIR_CLEAR00x0088
#define INTC_MIR_SET0 0x008c
+/* Number of IRQ state bits in each MIR register */
+#define IRQ_BITS_PER_REG 32
+
/*
* OMAP2 has a number of different interrupt controllers, each interrupt
* controller is identified as its own "bank". Register definitions are
@@ -67,24 +70,18 @@ static void omap_ack_irq(unsigned int irq)
static void omap_mask_irq(unsigned int irq)
{
- int offset = (irq >> 5) << 5;
+ int offset = irq & (~(IRQ_BITS_PER_REG - 1));
- if (irq >= 64)
- irq %= 64;
- else if (irq >= 32)
- irq %= 32;
+ irq %= IRQ_BITS_PER_REG;
intc_bank_write_reg(1 << irq, &irq_banks[0], INTC_MIR_SET0 + offset);
}
static void omap_unmask_irq(unsigned int irq)
{
- int offset = (irq >> 5) << 5;
+ int offset = irq & (~(IRQ_BITS_PER_REG - 1));
- if (irq >= 64)
- irq %= 64;
- else if (irq >= 32)
- irq %= 32;
+ irq %= IRQ_BITS_PER_REG;
intc_bank_write_reg(1 << irq, &irq_banks[0], INTC_MIR_CLEAR0 + offset);
}
--
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