Re: [PATCH 02/11] ARM: dts: omap3-igep00x0: Move NAND configuration to a common place.

[Javier Martinez Canillas]

Hello Enric,

On Thu, Nov 6, 2014 at 1:01 PM, Enric Balletbo i Serra
 wrote:
> At this moment all supported boards use same NAND chip, so has more sense
> move the GPMC and NAND configuration to the omap3-igep.dtsi common place.
>
> Signed-off-by: Enric Balletbo i Serra 

Agreed that makes sense to factor out this into the .dtsi

Acked-by: Javier Martinez Canillas 

Best regards,
Javier
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[PATCH 02/11] ARM: dts: omap3-igep00x0: Move NAND configuration to a common place.

[Enric Balletbo i Serra]

At this moment all supported boards use same NAND chip, so has more sense
move the GPMC and NAND configuration to the omap3-igep.dtsi common place.

Signed-off-by: Enric Balletbo i Serra 
---
 arch/arm/boot/dts/omap3-igep.dtsi| 49 ++
 arch/arm/boot/dts/omap3-igep0020.dts | 47 -
 arch/arm/boot/dts/omap3-igep0030.dts | 51 
 3 files changed, 49 insertions(+), 98 deletions(-)

diff --git a/arch/arm/boot/dts/omap3-igep.dtsi 
b/arch/arm/boot/dts/omap3-igep.dtsi
index fb1040d..04a58ab 100644
--- a/arch/arm/boot/dts/omap3-igep.dtsi
+++ b/arch/arm/boot/dts/omap3-igep.dtsi
@@ -128,6 +128,55 @@
};
 };
 
+&gpmc {
+   nand@0,0 {
+   linux,mtd-name= "micron,mt29c4g96maz";
+   reg = <0 0 4>;  /* CS0, offset 0, IO size 4 */
+   nand-bus-width = <16>;
+   gpmc,device-width = <2>;
+   ti,nand-ecc-opt = "bch8";
+
+   gpmc,sync-clk-ps = <0>;
+   gpmc,cs-on-ns = <0>;
+   gpmc,cs-rd-off-ns = <44>;
+   gpmc,cs-wr-off-ns = <44>;
+   gpmc,adv-on-ns = <6>;
+   gpmc,adv-rd-off-ns = <34>;
+   gpmc,adv-wr-off-ns = <44>;
+   gpmc,we-off-ns = <40>;
+   gpmc,oe-off-ns = <54>;
+   gpmc,access-ns = <64>;
+   gpmc,rd-cycle-ns = <82>;
+   gpmc,wr-cycle-ns = <82>;
+   gpmc,wr-access-ns = <40>;
+   gpmc,wr-data-mux-bus-ns = <0>;
+
+   #address-cells = <1>;
+   #size-cells = <1>;
+
+   partition@0 {
+   label = "SPL";
+   reg = <0 0x10>;
+   };
+   partition@8 {
+   label = "U-Boot";
+   reg = <0x10 0x18>;
+   };
+   partition@1c {
+   label = "Environment";
+   reg = <0x28 0x10>;
+   };
+   partition@28 {
+   label = "Kernel";
+   reg = <0x38 0x30>;
+   };
+   partition@78 {
+   label = "Filesystem";
+   reg = <0x68 0x1f98>;
+   };
+   };
+};
+
 &i2c1 {
pinctrl-names = "default";
pinctrl-0 = <&i2c1_pins>;
diff --git a/arch/arm/boot/dts/omap3-igep0020.dts 
b/arch/arm/boot/dts/omap3-igep0020.dts
index 87d77e4..731ab8f 100644
--- a/arch/arm/boot/dts/omap3-igep0020.dts
+++ b/arch/arm/boot/dts/omap3-igep0020.dts
@@ -209,53 +209,6 @@
ranges = <0 0 0x 0x100>,/* CS0: 16MB for NAND */
 <5 0 0x2c00 0x0100>;
 
-   nand@0,0 {
-   linux,mtd-name= "micron,mt29c4g96maz";
-   reg = <0 0 4>;  /* CS0, offset 0, IO size 4 */
-   nand-bus-width = <16>;
-   gpmc,device-width = <2>;
-   ti,nand-ecc-opt = "bch8";
-
-   gpmc,sync-clk-ps = <0>;
-   gpmc,cs-on-ns = <0>;
-   gpmc,cs-rd-off-ns = <44>;
-   gpmc,cs-wr-off-ns = <44>;
-   gpmc,adv-on-ns = <6>;
-   gpmc,adv-rd-off-ns = <34>;
-   gpmc,adv-wr-off-ns = <44>;
-   gpmc,we-off-ns = <40>;
-   gpmc,oe-off-ns = <54>;
-   gpmc,access-ns = <64>;
-   gpmc,rd-cycle-ns = <82>;
-   gpmc,wr-cycle-ns = <82>;
-   gpmc,wr-access-ns = <40>;
-   gpmc,wr-data-mux-bus-ns = <0>;
-
-   #address-cells = <1>;
-   #size-cells = <1>;
-
-   partition@0 {
-   label = "SPL";
-   reg = <0 0x10>;
-   };
-   partition@8 {
-   label = "U-Boot";
-   reg = <0x10 0x18>;
-   };
-   partition@1c {
-   label = "Environment";
-   reg = <0x28 0x10>;
-   };
-   partition@28 {
-   label = "Kernel";
-   reg = <0x38 0x30>;
-   };
-   partition@78 {
-   label = "Filesystem";
-   reg = <0x68 0x1f98>;
-   };
-   };
-
ethernet@gpmc {
pinctrl-names = "default";
pinctrl-0 = <&smsc9221_pins>;
diff --git a/arch/arm/boot/dts/omap3-igep0030.dts 
b/arch/arm/boot/dts/omap3-igep0030.dts
index 2df1396..5862380 100644
--- a/arch/arm/boot/dts/omap3-igep0030.dts
+++ b/arch/arm/boot/dts/omap3-igep0030.dts
@@ -65,57 +65,6 @@
};
 };
 
-&gpmc {
-   ranges = <0 0 0x 0x100>;/* CS0: 16MB for NAND */
-
-   nand@0,0 {
-   linux,mtd-name= "micron,mt29c4g96maz";
-   reg = <0 0