Re: [PATCH 1/1] arm: dts: am43xx-clock: Add qspi clock node.

2015-06-26 Thread Keerthy 



On Wednesday 24 June 2015 11:15 PM, Mugunthan V N wrote:

From: Sourav Poddar sourav.pod...@ti.com

Add clock node for qspi controller driver on am437x.

Cc: Keerthy j-keer...@ti.com
Cc: Tero Kristo t-kri...@ti.com
Signed-off-by: Sourav Poddar sourav.pod...@ti.com
Signed-off-by: Mugunthan V N mugunthan...@ti.com
---
  arch/arm/boot/dts/am4372.dtsi| 2 ++
  arch/arm/boot/dts/am43xx-clocks.dtsi | 8 
  2 files changed, 10 insertions(+)

diff --git a/arch/arm/boot/dts/am4372.dtsi b/arch/arm/boot/dts/am4372.dtsi
index 649e7b9..8ab7831 100644
--- a/arch/arm/boot/dts/am4372.dtsi
+++ b/arch/arm/boot/dts/am4372.dtsi
@@ -903,6 +903,8 @@
#address-cells = 1;
#size-cells = 0;
ti,hwmods = qspi;
+   clocks = qspi_fclk;
+   clock-names = fck;
interrupts = 0 138 0x4;
num-cs = 4;
status = disabled;
diff --git a/arch/arm/boot/dts/am43xx-clocks.dtsi 
b/arch/arm/boot/dts/am43xx-clocks.dtsi
index cc88728..1506585 100644
--- a/arch/arm/boot/dts/am43xx-clocks.dtsi
+++ b/arch/arm/boot/dts/am43xx-clocks.dtsi
@@ -763,4 +763,12 @@
ti,bit-shift = 8;
reg = 0x8a68;
};
+
+   qspi_fclk: qspi_fclk {
+   #clock-cells = 0;
+   compatible = ti,fixed-factor-clock;
+   clocks = dpll_per_m2_div4_ck;


From the clock tree this does not seem to be sourced from dpll_per_m2.
I guess this needs to be changed.

-Keerthy


+   clock-mult = 1;
+   clock-div = 1;
+   };
  };


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Re: [PATCH 1/1] arm: dts: am43xx-clock: Add qspi clock node.

2015-06-26 Thread Roger Quadros 

On 26/06/15 09:20, Keerthy wrote:



On Wednesday 24 June 2015 11:15 PM, Mugunthan V N wrote:

From: Sourav Poddar sourav.pod...@ti.com

Add clock node for qspi controller driver on am437x.

Cc: Keerthy j-keer...@ti.com
Cc: Tero Kristo t-kri...@ti.com
Signed-off-by: Sourav Poddar sourav.pod...@ti.com
Signed-off-by: Mugunthan V N mugunthan...@ti.com
---
  arch/arm/boot/dts/am4372.dtsi| 2 ++
  arch/arm/boot/dts/am43xx-clocks.dtsi | 8 
  2 files changed, 10 insertions(+)

diff --git a/arch/arm/boot/dts/am4372.dtsi
b/arch/arm/boot/dts/am4372.dtsi
index 649e7b9..8ab7831 100644
--- a/arch/arm/boot/dts/am4372.dtsi
+++ b/arch/arm/boot/dts/am4372.dtsi
@@ -903,6 +903,8 @@
  #address-cells = 1;
  #size-cells = 0;
  ti,hwmods = qspi;
+clocks = qspi_fclk;
+clock-names = fck;
  interrupts = 0 138 0x4;
  num-cs = 4;
  status = disabled;
diff --git a/arch/arm/boot/dts/am43xx-clocks.dtsi
b/arch/arm/boot/dts/am43xx-clocks.dtsi
index cc88728..1506585 100644
--- a/arch/arm/boot/dts/am43xx-clocks.dtsi
+++ b/arch/arm/boot/dts/am43xx-clocks.dtsi
@@ -763,4 +763,12 @@
  ti,bit-shift = 8;
  reg = 0x8a68;
  };
+
+qspi_fclk: qspi_fclk {
+#clock-cells = 0;
+compatible = ti,fixed-factor-clock;
+clocks = dpll_per_m2_div4_ck;


 From the clock tree this does not seem to be sourced from dpll_per_m2.
I guess this needs to be changed.


Right. We need to have a mux and divider.

cheers,
-roger




+clock-mult = 1;
+clock-div = 1;
+};
  };


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[PATCH 1/1] arm: dts: am43xx-clock: Add qspi clock node.

2015-06-24 Thread Mugunthan V N 
From: Sourav Poddar sourav.pod...@ti.com

Add clock node for qspi controller driver on am437x.

Cc: Keerthy j-keer...@ti.com
Cc: Tero Kristo t-kri...@ti.com
Signed-off-by: Sourav Poddar sourav.pod...@ti.com
Signed-off-by: Mugunthan V N mugunthan...@ti.com
---
 arch/arm/boot/dts/am4372.dtsi| 2 ++
 arch/arm/boot/dts/am43xx-clocks.dtsi | 8 
 2 files changed, 10 insertions(+)

diff --git a/arch/arm/boot/dts/am4372.dtsi b/arch/arm/boot/dts/am4372.dtsi
index 649e7b9..8ab7831 100644
--- a/arch/arm/boot/dts/am4372.dtsi
+++ b/arch/arm/boot/dts/am4372.dtsi
@@ -903,6 +903,8 @@
#address-cells = 1;
#size-cells = 0;
ti,hwmods = qspi;
+   clocks = qspi_fclk;
+   clock-names = fck;
interrupts = 0 138 0x4;
num-cs = 4;
status = disabled;
diff --git a/arch/arm/boot/dts/am43xx-clocks.dtsi 
b/arch/arm/boot/dts/am43xx-clocks.dtsi
index cc88728..1506585 100644
--- a/arch/arm/boot/dts/am43xx-clocks.dtsi
+++ b/arch/arm/boot/dts/am43xx-clocks.dtsi
@@ -763,4 +763,12 @@
ti,bit-shift = 8;
reg = 0x8a68;
};
+
+   qspi_fclk: qspi_fclk {
+   #clock-cells = 0;
+   compatible = ti,fixed-factor-clock;
+   clocks = dpll_per_m2_div4_ck;
+   clock-mult = 1;
+   clock-div = 1;
+   };
 };
-- 
2.4.2.387.gf86f31a

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