RE: [PATCH 1/4] mtd: nand: omap2: Update nerrors using ecc.strength

[Philip, Avinash]

On Tue, Oct 16, 2012 at 00:26:40, Peter Korsgaard wrote:
  Philip, Avinash avinashphi...@ti.com writes:
 
   Update number of errors using nand ecc strength.
   Also add macro definitions BCH8_ERROR_MAX  BCH4_ERROR_MAX
 
   Signed-off-by: Philip, Avinash avinashphi...@ti.com
   ---
   :100644 100644 5b31386... af511a9... M drivers/mtd/nand/omap2.c
drivers/mtd/nand/omap2.c |   12 
1 files changed, 8 insertions(+), 4 deletions(-)
 
   diff --git a/drivers/mtd/nand/omap2.c b/drivers/mtd/nand/omap2.c
   index 5b31386..af511a9 100644
   --- a/drivers/mtd/nand/omap2.c
   +++ b/drivers/mtd/nand/omap2.c
   @@ -111,6 +111,9 @@
#define   ECCCLEAR0x100
#define   ECC10x1
  
   +#define BCH8_MAX_ERROR8   /* upto 8 bit coorectable */
   +#define BCH4_MAX_ERROR4   /* upto 4 bit correctable */
 
 First 'correctable' misspelled.

I will correct it

 
 I don't personally think these defines improve readability very much
 compared to to just using 4/8, though.

Thought of removing magic numbers  provide information also.

Thanks
Avinash

 
 -- 
 Bye, Peter Korsgaard
 

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Re: [PATCH 1/4] mtd: nand: omap2: Update nerrors using ecc.strength

[Peter Korsgaard]

 Philip, Avinash avinashphi...@ti.com writes:

  Update number of errors using nand ecc strength.
  Also add macro definitions BCH8_ERROR_MAX  BCH4_ERROR_MAX

  Signed-off-by: Philip, Avinash avinashphi...@ti.com
  ---
  :100644 100644 5b31386... af511a9... M   drivers/mtd/nand/omap2.c
   drivers/mtd/nand/omap2.c |   12 
   1 files changed, 8 insertions(+), 4 deletions(-)

  diff --git a/drivers/mtd/nand/omap2.c b/drivers/mtd/nand/omap2.c
  index 5b31386..af511a9 100644
  --- a/drivers/mtd/nand/omap2.c
  +++ b/drivers/mtd/nand/omap2.c
  @@ -111,6 +111,9 @@
   #define ECCCLEAR0x100
   #define ECC10x1
 
  +#define BCH8_MAX_ERROR  8   /* upto 8 bit coorectable */
  +#define BCH4_MAX_ERROR  4   /* upto 4 bit correctable */

First 'correctable' misspelled.

I don't personally think these defines improve readability very much
compared to to just using 4/8, though.

-- 
Bye, Peter Korsgaard
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[PATCH 1/4] mtd: nand: omap2: Update nerrors using ecc.strength

[Philip, Avinash]

Update number of errors using nand ecc strength.
Also add macro definitions BCH8_ERROR_MAX  BCH4_ERROR_MAX

Signed-off-by: Philip, Avinash avinashphi...@ti.com
---
:100644 100644 5b31386... af511a9... M  drivers/mtd/nand/omap2.c
 drivers/mtd/nand/omap2.c |   12 
 1 files changed, 8 insertions(+), 4 deletions(-)

diff --git a/drivers/mtd/nand/omap2.c b/drivers/mtd/nand/omap2.c
index 5b31386..af511a9 100644
--- a/drivers/mtd/nand/omap2.c
+++ b/drivers/mtd/nand/omap2.c
@@ -111,6 +111,9 @@
 #defineECCCLEAR0x100
 #defineECC10x1
 
+#define BCH8_MAX_ERROR 8   /* upto 8 bit coorectable */
+#define BCH4_MAX_ERROR 4   /* upto 4 bit correctable */
+
 /* oob info generated runtime depending on ecc algorithm and layout selected */
 static struct nand_ecclayout omap_oobinfo;
 /* Define some generic bad / good block scan pattern which are used
@@ -1034,7 +1037,7 @@ static void omap3_enable_hwecc_bch(struct mtd_info *mtd, 
int mode)
   mtd);
struct nand_chip *chip = mtd-priv;
 
-   nerrors = (info-nand.ecc.bytes == 13) ? 8 : 4;
+   nerrors = info-nand.ecc.strength;
dev_width = (chip-options  NAND_BUSWIDTH_16) ? 1 : 0;
/*
 * Program GPMC to perform correction on one 512-byte sector at a time.
@@ -1129,13 +1132,14 @@ static int omap3_init_bch(struct mtd_info *mtd, int 
ecc_opt)
struct omap_nand_info *info = container_of(mtd, struct omap_nand_info,
   mtd);
 #ifdef CONFIG_MTD_NAND_OMAP_BCH8
-   const int hw_errors = 8;
+   const int hw_errors = BCH8_MAX_ERROR;
 #else
-   const int hw_errors = 4;
+   const int hw_errors = BCH4_MAX_ERROR;
 #endif
info-bch = NULL;
 
-   max_errors = (ecc_opt == OMAP_ECC_BCH8_CODE_HW) ? 8 : 4;
+   max_errors = (ecc_opt == OMAP_ECC_BCH8_CODE_HW) ?
+   BCH8_MAX_ERROR : BCH4_MAX_ERROR;
if (max_errors != hw_errors) {
pr_err(cannot configure %d-bit BCH ecc, only %d-bit supported,
   max_errors, hw_errors);
-- 
1.7.0.4

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