Re: [PATCH B 06/10] OMAP3 pwrdm: add CORE SAR handling (for USBTLL module)
Russell, On Mon, 23 Feb 2009, Russell King - ARM Linux wrote: On Thu, Feb 05, 2009 at 08:52:17PM -0700, Paul Walmsley wrote: On Sat, 31 Jan 2009, Russell King - ARM Linux wrote: On Thu, Jan 29, 2009 at 02:15:44AM -0700, Paul Walmsley wrote: On Thu, 29 Jan 2009, Paul Walmsley wrote: TLLSAR is not functional till ES3.1 (and beyound). Is it possible to flag it this way? Yes, it's easy in this case. Thanks for the note. I will send along an updated patch for this. N.B. - fixxing this required a separate change to the omap_chip flag system, so I'll send the two necessary patches to the linux-omap mailing list for further testing. I'll hold off on this patch then. The patches that obsolete patch B 06 have lasted a week on linux-o...@vger without any comment, so am passing them along in subsequent E-mails. It seems that the patches don't obsolete this patch, but instead require this patch to be applied first. The motivation was to make your life easier; otherwise several later patches would need to be updated and re-posted. We really really need to get out of this pattern of building fixes on top of bad patches. If a patch is the wrong approach then it is the wrong approach and should be dropped, or it should be merged with the patches which fix stuff up to the new approach. How would you like me to handle patch rewrites when they affect later patches in the series, as this one did? Shall I re-send updates of any later affected patches? - Paul -- To unsubscribe from this list: send the line unsubscribe linux-omap in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
Re: [PATCH B 06/10] OMAP3 pwrdm: add CORE SAR handling (for USBTLL module)
On Thu, Feb 05, 2009 at 08:52:17PM -0700, Paul Walmsley wrote: Hello Russell, On Sat, 31 Jan 2009, Russell King - ARM Linux wrote: On Thu, Jan 29, 2009 at 02:15:44AM -0700, Paul Walmsley wrote: Hi Richard, On Thu, 29 Jan 2009, Paul Walmsley wrote: TLLSAR is not functional till ES3.1 (and beyound). Is it possible to flag it this way? Yes, it's easy in this case. Thanks for the note. I will send along an updated patch for this. N.B. - fixxing this required a separate change to the omap_chip flag system, so I'll send the two necessary patches to the linux-omap mailing list for further testing. I'll hold off on this patch then. The patches that obsolete patch B 06 have lasted a week on linux-o...@vger without any comment, so am passing them along in subsequent E-mails. It seems that the patches don't obsolete this patch, but instead require this patch to be applied first. We really really need to get out of this pattern of building fixes on top of bad patches. If a patch is the wrong approach then it is the wrong approach and should be dropped, or it should be merged with the patches which fix stuff up to the new approach. I'm going to combine B06 with patch 2 and hope things come out right. -- To unsubscribe from this list: send the line unsubscribe linux-omap in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
Re: [PATCH B 06/10] OMAP3 pwrdm: add CORE SAR handling (for USBTLL module)
Hello Russell, On Sat, 31 Jan 2009, Russell King - ARM Linux wrote: On Thu, Jan 29, 2009 at 02:15:44AM -0700, Paul Walmsley wrote: Hi Richard, On Thu, 29 Jan 2009, Paul Walmsley wrote: TLLSAR is not functional till ES3.1 (and beyound). Is it possible to flag it this way? Yes, it's easy in this case. Thanks for the note. I will send along an updated patch for this. N.B. - fixxing this required a separate change to the omap_chip flag system, so I'll send the two necessary patches to the linux-omap mailing list for further testing. I'll hold off on this patch then. The patches that obsolete patch B 06 have lasted a week on linux-o...@vger without any comment, so am passing them along in subsequent E-mails. - Paul -- To unsubscribe from this list: send the line unsubscribe linux-omap in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
Re: [PATCH B 06/10] OMAP3 pwrdm: add CORE SAR handling (for USBTLL module)
On Thu, Jan 29, 2009 at 02:15:44AM -0700, Paul Walmsley wrote: Hi Richard, On Thu, 29 Jan 2009, Paul Walmsley wrote: TLLSAR is not functional till ES3.1 (and beyound). Is it possible to flag it this way? Yes, it's easy in this case. Thanks for the note. I will send along an updated patch for this. N.B. - fixxing this required a separate change to the omap_chip flag system, so I'll send the two necessary patches to the linux-omap mailing list for further testing. I'll hold off on this patch then. -- To unsubscribe from this list: send the line unsubscribe linux-omap in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
RE: [PATCH B 06/10] OMAP3 pwrdm: add CORE SAR handling (for USBTLL module)
Hi Richard, On Thu, 29 Jan 2009, Paul Walmsley wrote: TLLSAR is not functional till ES3.1 (and beyound). Is it possible to flag it this way? Yes, it's easy in this case. Thanks for the note. I will send along an updated patch for this. N.B. - fixxing this required a separate change to the omap_chip flag system, so I'll send the two necessary patches to the linux-omap mailing list for further testing. - Paul -- To unsubscribe from this list: send the line unsubscribe linux-omap in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
[PATCH B 06/10] OMAP3 pwrdm: add CORE SAR handling (for USBTLL module)
34xx TRM Delta G-H notes that the CORE powerdomain has a hardware
save-and-restore (SAR) control bit for the USBTLL module, similar to
the USBHOST powerdomain SAR bit. Split the existing core_34xx struct
powerdomain into two structs, one for ES1 and one for ES2, and add the
PWRDM_HAS_HDWR_SAR flag to the ES2 powerdomain.
Signed-off-by: Paul Walmsley p...@pwsan.com
Signed-off-by: Tony Lindgren t...@atomide.com
---
arch/arm/mach-omap2/powerdomains.h |3 ++-
arch/arm/mach-omap2/powerdomains34xx.h | 23 +--
2 files changed, 23 insertions(+), 3 deletions(-)
diff --git a/arch/arm/mach-omap2/powerdomains.h
b/arch/arm/mach-omap2/powerdomains.h
index 1329443..51623e2 100644
--- a/arch/arm/mach-omap2/powerdomains.h
+++ b/arch/arm/mach-omap2/powerdomains.h
@@ -171,7 +171,8 @@ static struct powerdomain *powerdomains_omap[] __initdata =
{
iva2_pwrdm,
mpu_34xx_pwrdm,
neon_pwrdm,
- core_34xx_pwrdm,
+ core_34xx_es1_pwrdm,
+ core_34xx_es2_pwrdm,
cam_pwrdm,
dss_pwrdm,
per_pwrdm,
diff --git a/arch/arm/mach-omap2/powerdomains34xx.h
b/arch/arm/mach-omap2/powerdomains34xx.h
index 7b63fa0..446a1ed 100644
--- a/arch/arm/mach-omap2/powerdomains34xx.h
+++ b/arch/arm/mach-omap2/powerdomains34xx.h
@@ -200,12 +200,31 @@ static struct powerdomain mpu_34xx_pwrdm = {
};
/* No wkdeps or sleepdeps for 34xx core apparently */
-static struct powerdomain core_34xx_pwrdm = {
+static struct powerdomain core_34xx_es1_pwrdm = {
.name = core_pwrdm,
.prcm_offs= CORE_MOD,
- .omap_chip= OMAP_CHIP_INIT(CHIP_IS_OMAP3430),
+ .omap_chip= OMAP_CHIP_INIT(CHIP_IS_OMAP3430ES1),
+ .pwrsts = PWRSTS_OFF_RET_ON,
+ .dep_bit = OMAP3430_EN_CORE_SHIFT,
+ .banks= 2,
+ .pwrsts_mem_ret = {
+ [0] = PWRSTS_OFF_RET,/* MEM1RETSTATE */
+ [1] = PWRSTS_OFF_RET,/* MEM2RETSTATE */
+ },
+ .pwrsts_mem_on= {
+ [0] = PWRSTS_OFF_RET_ON, /* MEM1ONSTATE */
+ [1] = PWRSTS_OFF_RET_ON, /* MEM2ONSTATE */
+ },
+};
+
+/* No wkdeps or sleepdeps for 34xx core apparently */
+static struct powerdomain core_34xx_es2_pwrdm = {
+ .name = core_pwrdm,
+ .prcm_offs= CORE_MOD,
+ .omap_chip= OMAP_CHIP_INIT(CHIP_IS_OMAP3430ES2),
.pwrsts = PWRSTS_OFF_RET_ON,
.dep_bit = OMAP3430_EN_CORE_SHIFT,
+ .flags= PWRDM_HAS_HDWR_SAR, /* for USBTLL only */
.banks= 2,
.pwrsts_mem_ret = {
[0] = PWRSTS_OFF_RET,/* MEM1RETSTATE */
--
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RE: [PATCH B 06/10] OMAP3 pwrdm: add CORE SAR handling (for USBTLL module)
34xx TRM Delta G-H notes that the CORE powerdomain has a hardware
save-and-restore (SAR) control bit for the USBTLL module, similar to
the USBHOST powerdomain SAR bit. Split the existing core_34xx struct
powerdomain into two structs, one for ES1 and one for ES2, and add the
PWRDM_HAS_HDWR_SAR flag to the ES2 powerdomain.
Signed-off-by: Paul Walmsley p...@pwsan.com
Signed-off-by: Tony Lindgren t...@atomide.com
+
+/* No wkdeps or sleepdeps for 34xx core apparently */
+static struct powerdomain core_34xx_es2_pwrdm = {
+ .name = core_pwrdm,
+ .prcm_offs= CORE_MOD,
+ .omap_chip= OMAP_CHIP_INIT(CHIP_IS_OMAP3430ES2),
.pwrsts = PWRSTS_OFF_RET_ON,
.dep_bit = OMAP3430_EN_CORE_SHIFT,
+ .flags= PWRDM_HAS_HDWR_SAR, /* for USBTLL only */
.banks= 2,
.pwrsts_mem_ret = {
[0] = PWRSTS_OFF_RET,/* MEM1RETSTATE */
TLLSAR is not functional till ES3.1 (and beyound). Is it possible to flag it
this way?
If you try and use it your system will deadlock on 2nd OFF mode transition due
to hardware bug.
Regards,
Richard W.
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RE: [PATCH B 06/10] OMAP3 pwrdm: add CORE SAR handling (for USBTLL module)
Hi Richard,
On Wed, 28 Jan 2009, Woodruff, Richard wrote:
34xx TRM Delta G-H notes that the CORE powerdomain has a hardware
save-and-restore (SAR) control bit for the USBTLL module, similar to
the USBHOST powerdomain SAR bit. Split the existing core_34xx struct
powerdomain into two structs, one for ES1 and one for ES2, and add the
PWRDM_HAS_HDWR_SAR flag to the ES2 powerdomain.
Signed-off-by: Paul Walmsley p...@pwsan.com
Signed-off-by: Tony Lindgren t...@atomide.com
+
+/* No wkdeps or sleepdeps for 34xx core apparently */
+static struct powerdomain core_34xx_es2_pwrdm = {
+ .name = core_pwrdm,
+ .prcm_offs= CORE_MOD,
+ .omap_chip= OMAP_CHIP_INIT(CHIP_IS_OMAP3430ES2),
.pwrsts = PWRSTS_OFF_RET_ON,
.dep_bit = OMAP3430_EN_CORE_SHIFT,
+ .flags= PWRDM_HAS_HDWR_SAR, /* for USBTLL only */
.banks= 2,
.pwrsts_mem_ret = {
[0] = PWRSTS_OFF_RET,/* MEM1RETSTATE */
TLLSAR is not functional till ES3.1 (and beyound). Is it possible to flag it
this way?
Yes, it's easy in this case. Thanks for the note. I will send along an
updated patch for this.
If you try and use it your system will deadlock on 2nd OFF mode transition
due to hardware bug.
- Paul
--
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the body of a message to majord...@vger.kernel.org
More majordomo info at http://vger.kernel.org/majordomo-info.html
