Re: [PATCH v2] ARM: OMAP: Work around hardcoded interrupts

2015-01-19 Thread Tony Lindgren 
* Tony Lindgren t...@atomide.com [150119 12:26]:
 * Nishanth Menon n...@ti.com [150119 12:17]:
  On 10:21-20150117, Marc Zyngier wrote:
   Commit 9a1091ef0017 (irqchip: gic: Support hierarchy irq domain)
  should have been
  Commit 9a1091ef0017 (irqchip: gic: Support hierarchy irq domain)
  
   changed the GIC driver to use a non-legacy IRQ domain on DT
   platforms. This patch assumes that DT-driven systems are getting
   all of their interrupts from device tree.
   
   Turns out that OMAP has quite a few hidden gems, and still uses
   hardcoded interrupts despite having fairly complete DTs.
   
   This patch attempts to work around these by offering a translation
   method that can be called directly from the hwmod code, if present.
   The same hack is sprinkled over PRCM and TWL.
   
   It isn't pretty, but it seems to do the job without having to add
   more hacks to the interrupt controller code.
   
   Tested on OMAP4 (Panda-ES) and OMAP5 (UEVM5432).
   
   Signed-off-by: Marc Zyngier marc.zyng...@arm.com
  
  Other than that, This looks good to me.
  Acked-by: Nishanth Menon n...@ti.com
 
 OK thanks applying into omap-for-v3.19/fixes and will send out a
 pull request later on today after some make randconfig builds.

Looks like we need to now have omap4_pmic_init() wrapped with
ifdef CONFIG_ARCH_OMAP4 to avoid make randconfig errors. I've also
added the missing commit quotes Nishanth mentioned.

Planning to apply the following after some more randconfig build
testing.

Regards,

Tony

8 -
From: Marc Zyngier marc.zyng...@arm.com
Date: Sat, 17 Jan 2015 10:21:08 +
Subject: [PATCH] ARM: OMAP: Work around hardcoded interrupts

Commit 9a1091ef0017 (irqchip: gic: Support hierarchy irq domain)
changed the GIC driver to use a non-legacy IRQ domain on DT
platforms. This patch assumes that DT-driven systems are getting
all of their interrupts from device tree.

Turns out that OMAP has quite a few hidden gems, and still uses
hardcoded interrupts despite having fairly complete DTs.

This patch attempts to work around these by offering a translation
method that can be called directly from the hwmod code, if present.
The same hack is sprinkled over PRCM and TWL.

It isn't pretty, but it seems to do the job without having to add
more hacks to the interrupt controller code.

Tested on OMAP4 (Panda-ES) and OMAP5 (UEVM5432).

Signed-off-by: Marc Zyngier marc.zyng...@arm.com
Acked-by: Nishanth Menon n...@ti.com
[t...@atomide.com: updated to fix make randconfig issue]
Signed-off-by: Tony Lindgren t...@atomide.com

diff --git a/arch/arm/mach-omap2/common.h b/arch/arm/mach-omap2/common.h
index db57741..64e44d6 100644
--- a/arch/arm/mach-omap2/common.h
+++ b/arch/arm/mach-omap2/common.h
@@ -211,6 +211,7 @@ extern struct device *omap2_get_iva_device(void);
 extern struct device *omap2_get_l3_device(void);
 extern struct device *omap4_get_dsp_device(void);
 
+unsigned int omap4_xlate_irq(unsigned int hwirq);
 void omap_gic_of_init(void);
 
 #ifdef CONFIG_CACHE_L2X0
--- a/arch/arm/mach-omap2/omap4-common.c
+++ b/arch/arm/mach-omap2/omap4-common.c
@@ -256,6 +256,38 @@ static int __init omap4_sar_ram_init(void)
 }
 omap_early_initcall(omap4_sar_ram_init);
 
+static struct of_device_id gic_match[] = {
+   { .compatible = arm,cortex-a9-gic, },
+   { .compatible = arm,cortex-a15-gic, },
+   { },
+};
+
+static struct device_node *gic_node;
+
+unsigned int omap4_xlate_irq(unsigned int hwirq)
+{
+   struct of_phandle_args irq_data;
+   unsigned int irq;
+
+   if (!gic_node)
+   gic_node = of_find_matching_node(NULL, gic_match);
+
+   if (WARN_ON(!gic_node))
+   return hwirq;
+
+   irq_data.np = gic_node;
+   irq_data.args_count = 3;
+   irq_data.args[0] = 0;
+   irq_data.args[1] = hwirq - OMAP44XX_IRQ_GIC_START;
+   irq_data.args[2] = IRQ_TYPE_LEVEL_HIGH;
+
+   irq = irq_create_of_mapping(irq_data);
+   if (WARN_ON(!irq))
+   irq = hwirq;
+
+   return irq;
+}
+
 void __init omap_gic_of_init(void)
 {
struct device_node *np;
--- a/arch/arm/mach-omap2/omap_hwmod.c
+++ b/arch/arm/mach-omap2/omap_hwmod.c
@@ -3534,9 +3534,15 @@ int omap_hwmod_fill_resources(struct omap_hwmod *oh, 
struct resource *res)
 
mpu_irqs_cnt = _count_mpu_irqs(oh);
for (i = 0; i  mpu_irqs_cnt; i++) {
+   unsigned int irq;
+
+   if (oh-xlate_irq)
+   irq = oh-xlate_irq((oh-mpu_irqs + i)-irq);
+   else
+   irq = (oh-mpu_irqs + i)-irq;
(res + r)-name = (oh-mpu_irqs + i)-name;
-   (res + r)-start = (oh-mpu_irqs + i)-irq;
-   (res + r)-end = (oh-mpu_irqs + i)-irq;
+   (res + r)-start = irq;
+   (res + r)-end = irq;
(res + r)-flags = IORESOURCE_IRQ;
r++;
}
--- a/arch/arm/mach-omap2/omap_hwmod.h
+++ b/arch/arm/mach-omap2/omap_hwmod.h
@@ -676,6 +676,7 @@

Re: [PATCH v2] ARM: OMAP: Work around hardcoded interrupts

2015-01-19 Thread Nishanth Menon 
On 10:21-20150117, Marc Zyngier wrote:
 Commit 9a1091ef0017 (irqchip: gic: Support hierarchy irq domain)
should have been
Commit 9a1091ef0017 (irqchip: gic: Support hierarchy irq domain)

 changed the GIC driver to use a non-legacy IRQ domain on DT
 platforms. This patch assumes that DT-driven systems are getting
 all of their interrupts from device tree.
 
 Turns out that OMAP has quite a few hidden gems, and still uses
 hardcoded interrupts despite having fairly complete DTs.
 
 This patch attempts to work around these by offering a translation
 method that can be called directly from the hwmod code, if present.
 The same hack is sprinkled over PRCM and TWL.
 
 It isn't pretty, but it seems to do the job without having to add
 more hacks to the interrupt controller code.
 
 Tested on OMAP4 (Panda-ES) and OMAP5 (UEVM5432).
 
 Signed-off-by: Marc Zyngier marc.zyng...@arm.com

Other than that, This looks good to me.
Acked-by: Nishanth Menon n...@ti.com

 ---
 From v1:
 - OMAP4 can either get the PRM interrupt from hwmod or from device tree.
   In the latter case, remove the xlate_irq method.
 
  arch/arm/mach-omap2/common.h   |  1 +
  arch/arm/mach-omap2/omap4-common.c | 32 
 ++
  arch/arm/mach-omap2/omap_hwmod.c   | 10 --
  arch/arm/mach-omap2/omap_hwmod.h   |  1 +
  arch/arm/mach-omap2/omap_hwmod_44xx_data.c |  5 +
  arch/arm/mach-omap2/omap_hwmod_54xx_data.c |  1 +
  arch/arm/mach-omap2/prcm-common.h  |  1 +
  arch/arm/mach-omap2/prm44xx.c  |  5 -
  arch/arm/mach-omap2/prm_common.c   | 14 +++--
  arch/arm/mach-omap2/twl-common.c   |  5 -
  10 files changed, 69 insertions(+), 6 deletions(-)
 
 diff --git a/arch/arm/mach-omap2/common.h b/arch/arm/mach-omap2/common.h
 index 377eea8..b664494 100644
 --- a/arch/arm/mach-omap2/common.h
 +++ b/arch/arm/mach-omap2/common.h
 @@ -211,6 +211,7 @@ extern struct device *omap2_get_iva_device(void);
  extern struct device *omap2_get_l3_device(void);
  extern struct device *omap4_get_dsp_device(void);
  
 +unsigned int omap4_xlate_irq(unsigned int hwirq);
  void omap_gic_of_init(void);
  
  #ifdef CONFIG_CACHE_L2X0
 diff --git a/arch/arm/mach-omap2/omap4-common.c 
 b/arch/arm/mach-omap2/omap4-common.c
 index b7cb44a..cc30e49 100644
 --- a/arch/arm/mach-omap2/omap4-common.c
 +++ b/arch/arm/mach-omap2/omap4-common.c
 @@ -256,6 +256,38 @@ static int __init omap4_sar_ram_init(void)
  }
  omap_early_initcall(omap4_sar_ram_init);
  
 +static struct of_device_id gic_match[] = {
 + { .compatible = arm,cortex-a9-gic, },
 + { .compatible = arm,cortex-a15-gic, },
 + { },
 +};
 +
 +static struct device_node *gic_node;
 +
 +unsigned int omap4_xlate_irq(unsigned int hwirq)
 +{
 + struct of_phandle_args irq_data;
 + unsigned int irq;
 +
 + if (!gic_node)
 + gic_node = of_find_matching_node(NULL, gic_match);
 +
 + if (WARN_ON(!gic_node))
 + return hwirq;
 +
 + irq_data.np = gic_node;
 + irq_data.args_count = 3;
 + irq_data.args[0] = 0;
 + irq_data.args[1] = hwirq - OMAP44XX_IRQ_GIC_START;
 + irq_data.args[2] = IRQ_TYPE_LEVEL_HIGH;
 +
 + irq = irq_create_of_mapping(irq_data);
 + if (WARN_ON(!irq))
 + irq = hwirq;
 +
 + return irq;
 +}
 +
  void __init omap_gic_of_init(void)
  {
   struct device_node *np;
 diff --git a/arch/arm/mach-omap2/omap_hwmod.c 
 b/arch/arm/mach-omap2/omap_hwmod.c
 index cbb908d..9025fff 100644
 --- a/arch/arm/mach-omap2/omap_hwmod.c
 +++ b/arch/arm/mach-omap2/omap_hwmod.c
 @@ -3534,9 +3534,15 @@ int omap_hwmod_fill_resources(struct omap_hwmod *oh, 
 struct resource *res)
  
   mpu_irqs_cnt = _count_mpu_irqs(oh);
   for (i = 0; i  mpu_irqs_cnt; i++) {
 + unsigned int irq;
 +
 + if (oh-xlate_irq)
 + irq = oh-xlate_irq((oh-mpu_irqs + i)-irq);
 + else
 + irq = (oh-mpu_irqs + i)-irq;
   (res + r)-name = (oh-mpu_irqs + i)-name;
 - (res + r)-start = (oh-mpu_irqs + i)-irq;
 - (res + r)-end = (oh-mpu_irqs + i)-irq;
 + (res + r)-start = irq;
 + (res + r)-end = irq;
   (res + r)-flags = IORESOURCE_IRQ;
   r++;
   }
 diff --git a/arch/arm/mach-omap2/omap_hwmod.h 
 b/arch/arm/mach-omap2/omap_hwmod.h
 index 35ca6ef..5b42faf 100644
 --- a/arch/arm/mach-omap2/omap_hwmod.h
 +++ b/arch/arm/mach-omap2/omap_hwmod.h
 @@ -676,6 +676,7 @@ struct omap_hwmod {
   spinlock_t  _lock;
   struct list_headnode;
   struct omap_hwmod_ocp_if*_mpu_port;
 + unsigned int(*xlate_irq)(unsigned int);
   u16 flags;
   u8  mpu_rt_idx;
   u8  response_lat;
 diff --git a/arch/arm/mach-omap2/omap_hwmod_44xx_data.c

Re: [PATCH v2] ARM: OMAP: Work around hardcoded interrupts

2015-01-19 Thread Tony Lindgren 
* Nishanth Menon n...@ti.com [150119 12:17]:
 On 10:21-20150117, Marc Zyngier wrote:
  Commit 9a1091ef0017 (irqchip: gic: Support hierarchy irq domain)
 should have been
 Commit 9a1091ef0017 (irqchip: gic: Support hierarchy irq domain)
 
  changed the GIC driver to use a non-legacy IRQ domain on DT
  platforms. This patch assumes that DT-driven systems are getting
  all of their interrupts from device tree.
  
  Turns out that OMAP has quite a few hidden gems, and still uses
  hardcoded interrupts despite having fairly complete DTs.
  
  This patch attempts to work around these by offering a translation
  method that can be called directly from the hwmod code, if present.
  The same hack is sprinkled over PRCM and TWL.
  
  It isn't pretty, but it seems to do the job without having to add
  more hacks to the interrupt controller code.
  
  Tested on OMAP4 (Panda-ES) and OMAP5 (UEVM5432).
  
  Signed-off-by: Marc Zyngier marc.zyng...@arm.com
 
 Other than that, This looks good to me.
 Acked-by: Nishanth Menon n...@ti.com

OK thanks applying into omap-for-v3.19/fixes and will send out a
pull request later on today after some make randconfig builds.

Regards,

Tony
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[PATCH v2] ARM: OMAP: Work around hardcoded interrupts

2015-01-17 Thread Marc Zyngier 
Commit 9a1091ef0017 (irqchip: gic: Support hierarchy irq domain)
changed the GIC driver to use a non-legacy IRQ domain on DT
platforms. This patch assumes that DT-driven systems are getting
all of their interrupts from device tree.

Turns out that OMAP has quite a few hidden gems, and still uses
hardcoded interrupts despite having fairly complete DTs.

This patch attempts to work around these by offering a translation
method that can be called directly from the hwmod code, if present.
The same hack is sprinkled over PRCM and TWL.

It isn't pretty, but it seems to do the job without having to add
more hacks to the interrupt controller code.

Tested on OMAP4 (Panda-ES) and OMAP5 (UEVM5432).

Signed-off-by: Marc Zyngier marc.zyng...@arm.com
---
From v1:
- OMAP4 can either get the PRM interrupt from hwmod or from device tree.
  In the latter case, remove the xlate_irq method.

 arch/arm/mach-omap2/common.h   |  1 +
 arch/arm/mach-omap2/omap4-common.c | 32 ++
 arch/arm/mach-omap2/omap_hwmod.c   | 10 --
 arch/arm/mach-omap2/omap_hwmod.h   |  1 +
 arch/arm/mach-omap2/omap_hwmod_44xx_data.c |  5 +
 arch/arm/mach-omap2/omap_hwmod_54xx_data.c |  1 +
 arch/arm/mach-omap2/prcm-common.h  |  1 +
 arch/arm/mach-omap2/prm44xx.c  |  5 -
 arch/arm/mach-omap2/prm_common.c   | 14 +++--
 arch/arm/mach-omap2/twl-common.c   |  5 -
 10 files changed, 69 insertions(+), 6 deletions(-)

diff --git a/arch/arm/mach-omap2/common.h b/arch/arm/mach-omap2/common.h
index 377eea8..b664494 100644
--- a/arch/arm/mach-omap2/common.h
+++ b/arch/arm/mach-omap2/common.h
@@ -211,6 +211,7 @@ extern struct device *omap2_get_iva_device(void);
 extern struct device *omap2_get_l3_device(void);
 extern struct device *omap4_get_dsp_device(void);
 
+unsigned int omap4_xlate_irq(unsigned int hwirq);
 void omap_gic_of_init(void);
 
 #ifdef CONFIG_CACHE_L2X0
diff --git a/arch/arm/mach-omap2/omap4-common.c 
b/arch/arm/mach-omap2/omap4-common.c
index b7cb44a..cc30e49 100644
--- a/arch/arm/mach-omap2/omap4-common.c
+++ b/arch/arm/mach-omap2/omap4-common.c
@@ -256,6 +256,38 @@ static int __init omap4_sar_ram_init(void)
 }
 omap_early_initcall(omap4_sar_ram_init);
 
+static struct of_device_id gic_match[] = {
+   { .compatible = arm,cortex-a9-gic, },
+   { .compatible = arm,cortex-a15-gic, },
+   { },
+};
+
+static struct device_node *gic_node;
+
+unsigned int omap4_xlate_irq(unsigned int hwirq)
+{
+   struct of_phandle_args irq_data;
+   unsigned int irq;
+
+   if (!gic_node)
+   gic_node = of_find_matching_node(NULL, gic_match);
+
+   if (WARN_ON(!gic_node))
+   return hwirq;
+
+   irq_data.np = gic_node;
+   irq_data.args_count = 3;
+   irq_data.args[0] = 0;
+   irq_data.args[1] = hwirq - OMAP44XX_IRQ_GIC_START;
+   irq_data.args[2] = IRQ_TYPE_LEVEL_HIGH;
+
+   irq = irq_create_of_mapping(irq_data);
+   if (WARN_ON(!irq))
+   irq = hwirq;
+
+   return irq;
+}
+
 void __init omap_gic_of_init(void)
 {
struct device_node *np;
diff --git a/arch/arm/mach-omap2/omap_hwmod.c b/arch/arm/mach-omap2/omap_hwmod.c
index cbb908d..9025fff 100644
--- a/arch/arm/mach-omap2/omap_hwmod.c
+++ b/arch/arm/mach-omap2/omap_hwmod.c
@@ -3534,9 +3534,15 @@ int omap_hwmod_fill_resources(struct omap_hwmod *oh, 
struct resource *res)
 
mpu_irqs_cnt = _count_mpu_irqs(oh);
for (i = 0; i  mpu_irqs_cnt; i++) {
+   unsigned int irq;
+
+   if (oh-xlate_irq)
+   irq = oh-xlate_irq((oh-mpu_irqs + i)-irq);
+   else
+   irq = (oh-mpu_irqs + i)-irq;
(res + r)-name = (oh-mpu_irqs + i)-name;
-   (res + r)-start = (oh-mpu_irqs + i)-irq;
-   (res + r)-end = (oh-mpu_irqs + i)-irq;
+   (res + r)-start = irq;
+   (res + r)-end = irq;
(res + r)-flags = IORESOURCE_IRQ;
r++;
}
diff --git a/arch/arm/mach-omap2/omap_hwmod.h b/arch/arm/mach-omap2/omap_hwmod.h
index 35ca6ef..5b42faf 100644
--- a/arch/arm/mach-omap2/omap_hwmod.h
+++ b/arch/arm/mach-omap2/omap_hwmod.h
@@ -676,6 +676,7 @@ struct omap_hwmod {
spinlock_t  _lock;
struct list_headnode;
struct omap_hwmod_ocp_if*_mpu_port;
+   unsigned int(*xlate_irq)(unsigned int);
u16 flags;
u8  mpu_rt_idx;
u8  response_lat;
diff --git a/arch/arm/mach-omap2/omap_hwmod_44xx_data.c 
b/arch/arm/mach-omap2/omap_hwmod_44xx_data.c
index c314b3c..f5e68a7 100644
--- a/arch/arm/mach-omap2/omap_hwmod_44xx_data.c
+++ b/arch/arm/mach-omap2/omap_hwmod_44xx_data.c
@@ -479,6 +479,7 @@ static struct omap_hwmod omap44xx_dma_system_hwmod = {
.class  =

Re: [PATCH v2] ARM: OMAP: Work around hardcoded interrupts

2015-01-17 Thread Tony Lindgren 
* Marc Zyngier marc.zyng...@arm.com [150117 02:24]:
 Commit 9a1091ef0017 (irqchip: gic: Support hierarchy irq domain)
 changed the GIC driver to use a non-legacy IRQ domain on DT
 platforms. This patch assumes that DT-driven systems are getting
 all of their interrupts from device tree.
 
 Turns out that OMAP has quite a few hidden gems, and still uses
 hardcoded interrupts despite having fairly complete DTs.
 
 This patch attempts to work around these by offering a translation
 method that can be called directly from the hwmod code, if present.
 The same hack is sprinkled over PRCM and TWL.
 
 It isn't pretty, but it seems to do the job without having to add
 more hacks to the interrupt controller code.
 
 Tested on OMAP4 (Panda-ES) and OMAP5 (UEVM5432).
 
 Signed-off-by: Marc Zyngier marc.zyng...@arm.com
 ---
 From v1:
 - OMAP4 can either get the PRM interrupt from hwmod or from device tree.
   In the latter case, remove the xlate_irq method.

OK looks good to me. Let's wait for Nishanth to run his tests
one more time.

BTW, looks like we already have the omap4 prm interrupt in the
omap4.dtsi file but removing the legacy code would add the
old DT with newer kernel issues to the mixture.. So best
leave that for later clean up patches and keep this fix as is.

Regards,

Tony
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