Re: [PATCH v2 1/2] ARM: dts: dra7: Add CPSW and MDIO module nodes for dra7
On Friday 12 September 2014 02:59 AM, Lennart Sorensen wrote: I have the mac but I don't want to use both ports on the 2 port switch. In fact in our case ethernet1 is a pru_eth interface. Can a board dts override the alias for ethernet1 or is that a syntax error? I don't think I tried that yet. You can override it in board dts file Regards Mugunthan V N -- To unsubscribe from this list: send the line unsubscribe linux-omap in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
Re: [PATCH v2 1/2] ARM: dts: dra7: Add CPSW and MDIO module nodes for dra7
On Thursday 11 September 2014 07:08 AM, Lennart Sorensen wrote:
On Wed, Sep 10, 2014 at 07:07:26PM +0530, Mugunthan V N wrote:
Add CPSW and MDIO related device tree data for DRA7XX and made as status
disabled. Phy-id, pinmux for active and sleep state needs to be added in
board dts files and enable the CPSW device.
Signed-off-by: Mugunthan V N mugunthan...@ti.com
---
arch/arm/boot/dts/dra7.dtsi | 59
+
1 file changed, 59 insertions(+)
diff --git a/arch/arm/boot/dts/dra7.dtsi b/arch/arm/boot/dts/dra7.dtsi
index d678152..8d79321 100644
--- a/arch/arm/boot/dts/dra7.dtsi
+++ b/arch/arm/boot/dts/dra7.dtsi
@@ -34,6 +34,8 @@
serial3 = uart4;
serial4 = uart5;
serial5 = uart6;
+ethernet0 = cpsw_emac0;
+ethernet1 = cpsw_emac1;
};
timer {
@@ -1262,6 +1264,63 @@
ti,irqs-skip = 10 133 139 140;
ti,irqs-safe-map = 0;
};
+
+mac: ethernet@4a10 {
+compatible = ti,cpsw;
+ti,hwmods = gmac;
+cpdma_channels = 8;
+ale_entries = 1024;
+bd_ram_size = 0x2000;
+no_bd_ram = 0;
+rx_descs = 64;
+mac_control = 0x20;
+slaves = 2;
How am I supposed to override this in the board dtb when my board only
uses 1 slave?
slaves = 1;
+active_slave = 0;
+cpts_clock_mult = 0x8000;
+cpts_clock_shift = 29;
+reg = 0x48484000 0x1000
+ 0x48485200 0x2E00;
+#address-cells = 1;
+#size-cells = 1;
+/*
+ * rx_thresh_pend
+ * rx_pend
+ * tx_pend
+ * misc_pend
+ */
+interrupts = GIC_SPI 334 IRQ_TYPE_LEVEL_HIGH,
+ GIC_SPI 335 IRQ_TYPE_LEVEL_HIGH,
+ GIC_SPI 336 IRQ_TYPE_LEVEL_HIGH,
+ GIC_SPI 337 IRQ_TYPE_LEVEL_HIGH;
+ranges;
+status = disabled;
+
+davinci_mdio: mdio@48485000 {
+compatible = ti,davinci_mdio;
+#address-cells = 1;
+#size-cells = 0;
+ti,hwmods = davinci_mdio;
+bus_freq = 100;
+reg = 0x48485000 0x100;
+};
+
+cpsw_emac0: slave@48480200 {
+/* Filled in by U-Boot */
+mac-address = [ 00 00 00 00 00 00 ];
+};
+
+cpsw_emac1: slave@48480300 {
+/* Filled in by U-Boot */
+mac-address = [ 00 00 00 00 00 00 ];
+};
Should I then be setting this to disabled from my board file? Or does
the disabled for the ethernet overall take care of that?
overall disable takes care of this
+phy_sel: cpsw-phy-sel@4a002554 {
+compatible = ti,dra7xx-cpsw-phy-sel;
+reg= 0x4a002554 0x4;
+reg-names = gmii-sel;
+};
I guess the board file would have to disable that too (we won't have a
phy given we are connecting to a switch chip).
Will add disabled in next version.
Regards
Mugunthan V N
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Re: [PATCH v2 1/2] ARM: dts: dra7: Add CPSW and MDIO module nodes for dra7
On Wednesday 10 September 2014 07:20 PM, Nishanth Menon wrote:
On 09/10/2014 08:37 AM, Mugunthan V N wrote:
Add CPSW and MDIO related device tree data for DRA7XX and made as status
disabled. Phy-id, pinmux for active and sleep state needs to be added in
board dts files and enable the CPSW device.
Signed-off-by: Mugunthan V N mugunthan...@ti.com
---
arch/arm/boot/dts/dra7.dtsi | 59
+
1 file changed, 59 insertions(+)
diff --git a/arch/arm/boot/dts/dra7.dtsi b/arch/arm/boot/dts/dra7.dtsi
index d678152..8d79321 100644
--- a/arch/arm/boot/dts/dra7.dtsi
+++ b/arch/arm/boot/dts/dra7.dtsi
@@ -34,6 +34,8 @@
serial3 = uart4;
serial4 = uart5;
serial5 = uart6;
+ethernet0 = cpsw_emac0;
+ethernet1 = cpsw_emac1;
should this rather be in board dts?
This should be here as the MAC address is filled in uboot with ethernet0
and ethernet1, moving this to dts, the ordering of the ethernet can go
for toss when they have other ethernet devices other than cpsw.
};
timer {
@@ -1262,6 +1264,63 @@
ti,irqs-skip = 10 133 139 140;
ti,irqs-safe-map = 0;
};
+
+mac: ethernet@4a10 {
+compatible = ti,cpsw;
+ti,hwmods = gmac;
+cpdma_channels = 8;
+ale_entries = 1024;
+bd_ram_size = 0x2000;
+no_bd_ram = 0;
+rx_descs = 64;
+mac_control = 0x20;
+slaves = 2;
+active_slave = 0;
+cpts_clock_mult = 0x8000;
+cpts_clock_shift = 29;
+reg = 0x48484000 0x1000
+ 0x48485200 0x2E00;
+#address-cells = 1;
+#size-cells = 1;
+/*
+ * rx_thresh_pend
+ * rx_pend
+ * tx_pend
+ * misc_pend
+ */
+interrupts = GIC_SPI 334 IRQ_TYPE_LEVEL_HIGH,
+ GIC_SPI 335 IRQ_TYPE_LEVEL_HIGH,
+ GIC_SPI 336 IRQ_TYPE_LEVEL_HIGH,
+ GIC_SPI 337 IRQ_TYPE_LEVEL_HIGH;
+ranges;
+status = disabled;
+
+davinci_mdio: mdio@48485000 {
+compatible = ti,davinci_mdio;
+#address-cells = 1;
+#size-cells = 0;
+ti,hwmods = davinci_mdio;
+bus_freq = 100;
+reg = 0x48485000 0x100;
+};
+
+cpsw_emac0: slave@48480200 {
+/* Filled in by U-Boot */
+mac-address = [ 00 00 00 00 00 00 ];
should be disabled? what about platforms that do not have both emac ports?
the mac node is already disabled, so platforms which doesn't have emac
should not enable this which in-turn emac node will be disabled.
Regards
Mugunthan V N
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Re: [PATCH v2 1/2] ARM: dts: dra7: Add CPSW and MDIO module nodes for dra7
On Thu, Sep 11, 2014 at 12:02:03PM +0530, Mugunthan V N wrote: slaves = 1; OK, works for me. overall disable takes care of this Although once I enable cpsw I would need to leave the second port disabled I suppose, although perhaps settings slaves to 1 would essentially disable it. Will add disabled in next version. -- Len Sorensen -- To unsubscribe from this list: send the line unsubscribe linux-omap in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
Re: [PATCH v2 1/2] ARM: dts: dra7: Add CPSW and MDIO module nodes for dra7
On Thu, Sep 11, 2014 at 12:07:45PM +0530, Mugunthan V N wrote:
On Wednesday 10 September 2014 07:20 PM, Nishanth Menon wrote:
On 09/10/2014 08:37 AM, Mugunthan V N wrote:
Add CPSW and MDIO related device tree data for DRA7XX and made as status
disabled. Phy-id, pinmux for active and sleep state needs to be added in
board dts files and enable the CPSW device.
Signed-off-by: Mugunthan V N mugunthan...@ti.com
---
arch/arm/boot/dts/dra7.dtsi | 59
+
1 file changed, 59 insertions(+)
diff --git a/arch/arm/boot/dts/dra7.dtsi b/arch/arm/boot/dts/dra7.dtsi
index d678152..8d79321 100644
--- a/arch/arm/boot/dts/dra7.dtsi
+++ b/arch/arm/boot/dts/dra7.dtsi
@@ -34,6 +34,8 @@
serial3 = uart4;
serial4 = uart5;
serial5 = uart6;
+ ethernet0 = cpsw_emac0;
+ ethernet1 = cpsw_emac1;
should this rather be in board dts?
This should be here as the MAC address is filled in uboot with ethernet0
and ethernet1, moving this to dts, the ordering of the ethernet can go
for toss when they have other ethernet devices other than cpsw.
};
timer {
@@ -1262,6 +1264,63 @@
ti,irqs-skip = 10 133 139 140;
ti,irqs-safe-map = 0;
};
+
+ mac: ethernet@4a10 {
+ compatible = ti,cpsw;
+ ti,hwmods = gmac;
+ cpdma_channels = 8;
+ ale_entries = 1024;
+ bd_ram_size = 0x2000;
+ no_bd_ram = 0;
+ rx_descs = 64;
+ mac_control = 0x20;
+ slaves = 2;
+ active_slave = 0;
+ cpts_clock_mult = 0x8000;
+ cpts_clock_shift = 29;
+ reg = 0x48484000 0x1000
+ 0x48485200 0x2E00;
+ #address-cells = 1;
+ #size-cells = 1;
+ /*
+ * rx_thresh_pend
+ * rx_pend
+ * tx_pend
+ * misc_pend
+ */
+ interrupts = GIC_SPI 334 IRQ_TYPE_LEVEL_HIGH,
+ GIC_SPI 335 IRQ_TYPE_LEVEL_HIGH,
+ GIC_SPI 336 IRQ_TYPE_LEVEL_HIGH,
+ GIC_SPI 337 IRQ_TYPE_LEVEL_HIGH;
+ ranges;
+ status = disabled;
+
+ davinci_mdio: mdio@48485000 {
+ compatible = ti,davinci_mdio;
+ #address-cells = 1;
+ #size-cells = 0;
+ ti,hwmods = davinci_mdio;
+ bus_freq = 100;
+ reg = 0x48485000 0x100;
+ };
+
+ cpsw_emac0: slave@48480200 {
+ /* Filled in by U-Boot */
+ mac-address = [ 00 00 00 00 00 00 ];
should be disabled? what about platforms that do not have both emac ports?
the mac node is already disabled, so platforms which doesn't have emac
should not enable this which in-turn emac node will be disabled.
I have the mac but I don't want to use both ports on the 2 port switch.
In fact in our case ethernet1 is a pru_eth interface. Can a board dts
override the alias for ethernet1 or is that a syntax error? I don't
think I tried that yet.
--
Len Sorensen
--
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the body of a message to majord...@vger.kernel.org
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[PATCH v2 1/2] ARM: dts: dra7: Add CPSW and MDIO module nodes for dra7
Add CPSW and MDIO related device tree data for DRA7XX and made as status
disabled. Phy-id, pinmux for active and sleep state needs to be added in
board dts files and enable the CPSW device.
Signed-off-by: Mugunthan V N mugunthan...@ti.com
---
arch/arm/boot/dts/dra7.dtsi | 59 +
1 file changed, 59 insertions(+)
diff --git a/arch/arm/boot/dts/dra7.dtsi b/arch/arm/boot/dts/dra7.dtsi
index d678152..8d79321 100644
--- a/arch/arm/boot/dts/dra7.dtsi
+++ b/arch/arm/boot/dts/dra7.dtsi
@@ -34,6 +34,8 @@
serial3 = uart4;
serial4 = uart5;
serial5 = uart6;
+ ethernet0 = cpsw_emac0;
+ ethernet1 = cpsw_emac1;
};
timer {
@@ -1262,6 +1264,63 @@
ti,irqs-skip = 10 133 139 140;
ti,irqs-safe-map = 0;
};
+
+ mac: ethernet@4a10 {
+ compatible = ti,cpsw;
+ ti,hwmods = gmac;
+ cpdma_channels = 8;
+ ale_entries = 1024;
+ bd_ram_size = 0x2000;
+ no_bd_ram = 0;
+ rx_descs = 64;
+ mac_control = 0x20;
+ slaves = 2;
+ active_slave = 0;
+ cpts_clock_mult = 0x8000;
+ cpts_clock_shift = 29;
+ reg = 0x48484000 0x1000
+ 0x48485200 0x2E00;
+ #address-cells = 1;
+ #size-cells = 1;
+ /*
+* rx_thresh_pend
+* rx_pend
+* tx_pend
+* misc_pend
+*/
+ interrupts = GIC_SPI 334 IRQ_TYPE_LEVEL_HIGH,
+GIC_SPI 335 IRQ_TYPE_LEVEL_HIGH,
+GIC_SPI 336 IRQ_TYPE_LEVEL_HIGH,
+GIC_SPI 337 IRQ_TYPE_LEVEL_HIGH;
+ ranges;
+ status = disabled;
+
+ davinci_mdio: mdio@48485000 {
+ compatible = ti,davinci_mdio;
+ #address-cells = 1;
+ #size-cells = 0;
+ ti,hwmods = davinci_mdio;
+ bus_freq = 100;
+ reg = 0x48485000 0x100;
+ };
+
+ cpsw_emac0: slave@48480200 {
+ /* Filled in by U-Boot */
+ mac-address = [ 00 00 00 00 00 00 ];
+ };
+
+ cpsw_emac1: slave@48480300 {
+ /* Filled in by U-Boot */
+ mac-address = [ 00 00 00 00 00 00 ];
+ };
+
+ phy_sel: cpsw-phy-sel@4a002554 {
+ compatible = ti,dra7xx-cpsw-phy-sel;
+ reg= 0x4a002554 0x4;
+ reg-names = gmii-sel;
+ };
+ };
+
};
};
--
2.1.0
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Re: [PATCH v2 1/2] ARM: dts: dra7: Add CPSW and MDIO module nodes for dra7
On 09/10/2014 08:37 AM, Mugunthan V N wrote:
Add CPSW and MDIO related device tree data for DRA7XX and made as status
disabled. Phy-id, pinmux for active and sleep state needs to be added in
board dts files and enable the CPSW device.
Signed-off-by: Mugunthan V N mugunthan...@ti.com
---
arch/arm/boot/dts/dra7.dtsi | 59
+
1 file changed, 59 insertions(+)
diff --git a/arch/arm/boot/dts/dra7.dtsi b/arch/arm/boot/dts/dra7.dtsi
index d678152..8d79321 100644
--- a/arch/arm/boot/dts/dra7.dtsi
+++ b/arch/arm/boot/dts/dra7.dtsi
@@ -34,6 +34,8 @@
serial3 = uart4;
serial4 = uart5;
serial5 = uart6;
+ ethernet0 = cpsw_emac0;
+ ethernet1 = cpsw_emac1;
should this rather be in board dts?
};
timer {
@@ -1262,6 +1264,63 @@
ti,irqs-skip = 10 133 139 140;
ti,irqs-safe-map = 0;
};
+
+ mac: ethernet@4a10 {
+ compatible = ti,cpsw;
+ ti,hwmods = gmac;
+ cpdma_channels = 8;
+ ale_entries = 1024;
+ bd_ram_size = 0x2000;
+ no_bd_ram = 0;
+ rx_descs = 64;
+ mac_control = 0x20;
+ slaves = 2;
+ active_slave = 0;
+ cpts_clock_mult = 0x8000;
+ cpts_clock_shift = 29;
+ reg = 0x48484000 0x1000
+0x48485200 0x2E00;
+ #address-cells = 1;
+ #size-cells = 1;
+ /*
+ * rx_thresh_pend
+ * rx_pend
+ * tx_pend
+ * misc_pend
+ */
+ interrupts = GIC_SPI 334 IRQ_TYPE_LEVEL_HIGH,
+ GIC_SPI 335 IRQ_TYPE_LEVEL_HIGH,
+ GIC_SPI 336 IRQ_TYPE_LEVEL_HIGH,
+ GIC_SPI 337 IRQ_TYPE_LEVEL_HIGH;
+ ranges;
+ status = disabled;
+
+ davinci_mdio: mdio@48485000 {
+ compatible = ti,davinci_mdio;
+ #address-cells = 1;
+ #size-cells = 0;
+ ti,hwmods = davinci_mdio;
+ bus_freq = 100;
+ reg = 0x48485000 0x100;
+ };
+
+ cpsw_emac0: slave@48480200 {
+ /* Filled in by U-Boot */
+ mac-address = [ 00 00 00 00 00 00 ];
should be disabled? what about platforms that do not have both emac ports?
+ };
+
+ cpsw_emac1: slave@48480300 {
+ /* Filled in by U-Boot */
+ mac-address = [ 00 00 00 00 00 00 ];
should be disabled? what about platforms that do not have both emac ports?
+ };
+
+ phy_sel: cpsw-phy-sel@4a002554 {
+ compatible = ti,dra7xx-cpsw-phy-sel;
+ reg= 0x4a002554 0x4;
+ reg-names = gmii-sel;
+ };
+ };
+
};
};
--
Regards,
Nishanth Menon
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Re: [PATCH v2 1/2] ARM: dts: dra7: Add CPSW and MDIO module nodes for dra7
On Wed, Sep 10, 2014 at 07:07:26PM +0530, Mugunthan V N wrote:
Add CPSW and MDIO related device tree data for DRA7XX and made as status
disabled. Phy-id, pinmux for active and sleep state needs to be added in
board dts files and enable the CPSW device.
Signed-off-by: Mugunthan V N mugunthan...@ti.com
---
arch/arm/boot/dts/dra7.dtsi | 59
+
1 file changed, 59 insertions(+)
diff --git a/arch/arm/boot/dts/dra7.dtsi b/arch/arm/boot/dts/dra7.dtsi
index d678152..8d79321 100644
--- a/arch/arm/boot/dts/dra7.dtsi
+++ b/arch/arm/boot/dts/dra7.dtsi
@@ -34,6 +34,8 @@
serial3 = uart4;
serial4 = uart5;
serial5 = uart6;
+ ethernet0 = cpsw_emac0;
+ ethernet1 = cpsw_emac1;
};
timer {
@@ -1262,6 +1264,63 @@
ti,irqs-skip = 10 133 139 140;
ti,irqs-safe-map = 0;
};
+
+ mac: ethernet@4a10 {
+ compatible = ti,cpsw;
+ ti,hwmods = gmac;
+ cpdma_channels = 8;
+ ale_entries = 1024;
+ bd_ram_size = 0x2000;
+ no_bd_ram = 0;
+ rx_descs = 64;
+ mac_control = 0x20;
+ slaves = 2;
How am I supposed to override this in the board dtb when my board only
uses 1 slave?
+ active_slave = 0;
+ cpts_clock_mult = 0x8000;
+ cpts_clock_shift = 29;
+ reg = 0x48484000 0x1000
+0x48485200 0x2E00;
+ #address-cells = 1;
+ #size-cells = 1;
+ /*
+ * rx_thresh_pend
+ * rx_pend
+ * tx_pend
+ * misc_pend
+ */
+ interrupts = GIC_SPI 334 IRQ_TYPE_LEVEL_HIGH,
+ GIC_SPI 335 IRQ_TYPE_LEVEL_HIGH,
+ GIC_SPI 336 IRQ_TYPE_LEVEL_HIGH,
+ GIC_SPI 337 IRQ_TYPE_LEVEL_HIGH;
+ ranges;
+ status = disabled;
+
+ davinci_mdio: mdio@48485000 {
+ compatible = ti,davinci_mdio;
+ #address-cells = 1;
+ #size-cells = 0;
+ ti,hwmods = davinci_mdio;
+ bus_freq = 100;
+ reg = 0x48485000 0x100;
+ };
+
+ cpsw_emac0: slave@48480200 {
+ /* Filled in by U-Boot */
+ mac-address = [ 00 00 00 00 00 00 ];
+ };
+
+ cpsw_emac1: slave@48480300 {
+ /* Filled in by U-Boot */
+ mac-address = [ 00 00 00 00 00 00 ];
+ };
Should I then be setting this to disabled from my board file? Or does
the disabled for the ethernet overall take care of that?
+ phy_sel: cpsw-phy-sel@4a002554 {
+ compatible = ti,dra7xx-cpsw-phy-sel;
+ reg= 0x4a002554 0x4;
+ reg-names = gmii-sel;
+ };
I guess the board file would have to disable that too (we won't have a
phy given we are connecting to a switch chip).
+ };
+
};
};
--
Len Sorensen
--
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