Re: [PATCH v2 13/13] ARM: OMAP2+: hwmod: AM43x: new w.r.t AM335x
On Friday 02 August 2013 07:08 PM, Afzal Mohammed wrote:
Add hwmod support for IP's that are present in AM43x, but not in
AM335x. AM43x additional ones added here are,
1. synctimer
2. timer8-11
3. ehrpwm3-5
4. spi2-4
5. gpio4-5
Also AM43x pruss interconnect is different asc compared to AM335x.
Update hwmod with the above details and register 'ocpif' if platform
being run is AM43x.
AM43x also has IP's like qspi, hdq1w, vpfe, des, rng, usb, dss. These
are not handled here due to either of following two reasons,
1. To avoid churn; most of them don't have DT bindings, which would
necessitate adding address space in hwmod, which any way would have
to be removed once DT bindings happen with driver support.
2. patches would come in from sources other than the author
Signed-off-by: Afzal Mohammed af...@ti.com
---
arch/arm/mach-omap2/omap_hwmod_33xx_data.c | 366
+++-
1 file changed, 364 insertions(+), 2 deletions(-)
diff --git a/arch/arm/mach-omap2/omap_hwmod_33xx_data.c
b/arch/arm/mach-omap2/omap_hwmod_33xx_data.c
Again for readability, its better to have files structured the way omap2420 and
omap2430 do with the
reuse. Its confusing to have am43xx specific hwmods in am33xx_data file.
index 7897fec..0efafd8 100644
--- a/arch/arm/mach-omap2/omap_hwmod_33xx_data.c
+++ b/arch/arm/mach-omap2/omap_hwmod_33xx_data.c
@@ -1595,6 +1595,228 @@ static struct omap_hwmod am33xx_usbss_hwmod = {
},
};
+static struct omap_hwmod_class_sysconfig am43xx_synctimer_sysc = {
+ .rev_offs = 0x0,
+ .sysc_offs = 0x4,
+ .sysc_flags = SYSC_HAS_SIDLEMODE,
+ .idlemodes = (SIDLE_FORCE | SIDLE_NO),
+ .sysc_fields= omap_hwmod_sysc_type1,
+};
+
+static struct omap_hwmod_class am43xx_synctimer_hwmod_class = {
+ .name = synctimer,
+ .sysc = am43xx_synctimer_sysc,
+};
+
+static struct omap_hwmod am43xx_synctimer_hwmod = {
+ .name = counter_32k,
+ .class = am43xx_synctimer_hwmod_class,
+ .clkdm_name = l4_wkup_aon_clkdm,
+ .flags = HWMOD_SWSUP_SIDLE,
+ .main_clk = synctimer_32kclk,
+ .prcm = {
+ .omap4 = {
+ .clkctrl_offs = AM43XX_CM_WKUP_SYNCTIMER_CLKCTRL_OFFSET,
+ .modulemode = MODULEMODE_SWCTRL,
+ },
+ },
+};
+
+static struct omap_hwmod am43xx_timer8_hwmod = {
+ .name = timer8,
+ .class = am33xx_timer_hwmod_class,
+ .clkdm_name = l4ls_clkdm,
+ .main_clk = timer8_fck,
+ .prcm = {
+ .omap4 = {
+ .clkctrl_offs = AM43XX_CM_PER_TIMER8_CLKCTRL_OFFSET,
+ .modulemode = MODULEMODE_SWCTRL,
+ },
+ },
+};
+
+static struct omap_hwmod am43xx_timer9_hwmod = {
+ .name = timer9,
+ .class = am33xx_timer_hwmod_class,
+ .clkdm_name = l4ls_clkdm,
+ .main_clk = timer9_fck,
+ .prcm = {
+ .omap4 = {
+ .clkctrl_offs = AM43XX_CM_PER_TIMER9_CLKCTRL_OFFSET,
+ .modulemode = MODULEMODE_SWCTRL,
+ },
+ },
+};
+
+static struct omap_hwmod am43xx_timer10_hwmod = {
+ .name = timer10,
+ .class = am33xx_timer_hwmod_class,
+ .clkdm_name = l4ls_clkdm,
+ .main_clk = timer10_fck,
+ .prcm = {
+ .omap4 = {
+ .clkctrl_offs = AM43XX_CM_PER_TIMER10_CLKCTRL_OFFSET,
+ .modulemode = MODULEMODE_SWCTRL,
+ },
+ },
+};
+
+static struct omap_hwmod am43xx_timer11_hwmod = {
+ .name = timer11,
+ .class = am33xx_timer_hwmod_class,
+ .clkdm_name = l4ls_clkdm,
+ .main_clk = timer11_fck,
+ .prcm = {
+ .omap4 = {
+ .clkctrl_offs = AM43XX_CM_PER_TIMER11_CLKCTRL_OFFSET,
+ .modulemode = MODULEMODE_SWCTRL,
+ },
+ },
+};
+
+static struct omap_hwmod am43xx_epwmss3_hwmod = {
+ .name = epwmss3,
+ .class = am33xx_epwmss_hwmod_class,
+ .clkdm_name = l4ls_clkdm,
+ .main_clk = l4ls_gclk,
+ .prcm = {
+ .omap4 = {
+ .clkctrl_offs = AM43XX_CM_PER_EPWMSS3_CLKCTRL_OFFSET,
+ .modulemode = MODULEMODE_SWCTRL,
+ },
+ },
+};
+
+static struct omap_hwmod am43xx_ehrpwm3_hwmod = {
+ .name = ehrpwm3,
+ .class = am33xx_ehrpwm_hwmod_class,
+ .clkdm_name = l4ls_clkdm,
+ .main_clk = l4ls_gclk,
+};
+
+static struct omap_hwmod am43xx_epwmss4_hwmod = {
+ .name = epwmss4,
+ .class = am33xx_epwmss_hwmod_class,
+ .clkdm_name = l4ls_clkdm,
+
[PATCH v2 13/13] ARM: OMAP2+: hwmod: AM43x: new w.r.t AM335x
Add hwmod support for IP's that are present in AM43x, but not in
AM335x. AM43x additional ones added here are,
1. synctimer
2. timer8-11
3. ehrpwm3-5
4. spi2-4
5. gpio4-5
Also AM43x pruss interconnect is different asc compared to AM335x.
Update hwmod with the above details and register 'ocpif' if platform
being run is AM43x.
AM43x also has IP's like qspi, hdq1w, vpfe, des, rng, usb, dss. These
are not handled here due to either of following two reasons,
1. To avoid churn; most of them don't have DT bindings, which would
necessitate adding address space in hwmod, which any way would have
to be removed once DT bindings happen with driver support.
2. patches would come in from sources other than the author
Signed-off-by: Afzal Mohammed af...@ti.com
---
arch/arm/mach-omap2/omap_hwmod_33xx_data.c | 366 +++-
1 file changed, 364 insertions(+), 2 deletions(-)
diff --git a/arch/arm/mach-omap2/omap_hwmod_33xx_data.c
b/arch/arm/mach-omap2/omap_hwmod_33xx_data.c
index 7897fec..0efafd8 100644
--- a/arch/arm/mach-omap2/omap_hwmod_33xx_data.c
+++ b/arch/arm/mach-omap2/omap_hwmod_33xx_data.c
@@ -1595,6 +1595,228 @@ static struct omap_hwmod am33xx_usbss_hwmod = {
},
};
+static struct omap_hwmod_class_sysconfig am43xx_synctimer_sysc = {
+ .rev_offs = 0x0,
+ .sysc_offs = 0x4,
+ .sysc_flags = SYSC_HAS_SIDLEMODE,
+ .idlemodes = (SIDLE_FORCE | SIDLE_NO),
+ .sysc_fields= omap_hwmod_sysc_type1,
+};
+
+static struct omap_hwmod_class am43xx_synctimer_hwmod_class = {
+ .name = synctimer,
+ .sysc = am43xx_synctimer_sysc,
+};
+
+static struct omap_hwmod am43xx_synctimer_hwmod = {
+ .name = counter_32k,
+ .class = am43xx_synctimer_hwmod_class,
+ .clkdm_name = l4_wkup_aon_clkdm,
+ .flags = HWMOD_SWSUP_SIDLE,
+ .main_clk = synctimer_32kclk,
+ .prcm = {
+ .omap4 = {
+ .clkctrl_offs = AM43XX_CM_WKUP_SYNCTIMER_CLKCTRL_OFFSET,
+ .modulemode = MODULEMODE_SWCTRL,
+ },
+ },
+};
+
+static struct omap_hwmod am43xx_timer8_hwmod = {
+ .name = timer8,
+ .class = am33xx_timer_hwmod_class,
+ .clkdm_name = l4ls_clkdm,
+ .main_clk = timer8_fck,
+ .prcm = {
+ .omap4 = {
+ .clkctrl_offs = AM43XX_CM_PER_TIMER8_CLKCTRL_OFFSET,
+ .modulemode = MODULEMODE_SWCTRL,
+ },
+ },
+};
+
+static struct omap_hwmod am43xx_timer9_hwmod = {
+ .name = timer9,
+ .class = am33xx_timer_hwmod_class,
+ .clkdm_name = l4ls_clkdm,
+ .main_clk = timer9_fck,
+ .prcm = {
+ .omap4 = {
+ .clkctrl_offs = AM43XX_CM_PER_TIMER9_CLKCTRL_OFFSET,
+ .modulemode = MODULEMODE_SWCTRL,
+ },
+ },
+};
+
+static struct omap_hwmod am43xx_timer10_hwmod = {
+ .name = timer10,
+ .class = am33xx_timer_hwmod_class,
+ .clkdm_name = l4ls_clkdm,
+ .main_clk = timer10_fck,
+ .prcm = {
+ .omap4 = {
+ .clkctrl_offs = AM43XX_CM_PER_TIMER10_CLKCTRL_OFFSET,
+ .modulemode = MODULEMODE_SWCTRL,
+ },
+ },
+};
+
+static struct omap_hwmod am43xx_timer11_hwmod = {
+ .name = timer11,
+ .class = am33xx_timer_hwmod_class,
+ .clkdm_name = l4ls_clkdm,
+ .main_clk = timer11_fck,
+ .prcm = {
+ .omap4 = {
+ .clkctrl_offs = AM43XX_CM_PER_TIMER11_CLKCTRL_OFFSET,
+ .modulemode = MODULEMODE_SWCTRL,
+ },
+ },
+};
+
+static struct omap_hwmod am43xx_epwmss3_hwmod = {
+ .name = epwmss3,
+ .class = am33xx_epwmss_hwmod_class,
+ .clkdm_name = l4ls_clkdm,
+ .main_clk = l4ls_gclk,
+ .prcm = {
+ .omap4 = {
+ .clkctrl_offs = AM43XX_CM_PER_EPWMSS3_CLKCTRL_OFFSET,
+ .modulemode = MODULEMODE_SWCTRL,
+ },
+ },
+};
+
+static struct omap_hwmod am43xx_ehrpwm3_hwmod = {
+ .name = ehrpwm3,
+ .class = am33xx_ehrpwm_hwmod_class,
+ .clkdm_name = l4ls_clkdm,
+ .main_clk = l4ls_gclk,
+};
+
+static struct omap_hwmod am43xx_epwmss4_hwmod = {
+ .name = epwmss4,
+ .class = am33xx_epwmss_hwmod_class,
+ .clkdm_name = l4ls_clkdm,
+ .main_clk = l4ls_gclk,
+ .prcm = {
+ .omap4 = {
+ .clkctrl_offs = AM43XX_CM_PER_EPWMSS4_CLKCTRL_OFFSET,
+ .modulemode =
