From: Loic Pallardy
Add STEriccson DBX500 PRCM mailbox support.
Change-Id: I36cbef646e26469a9490d46a5e143667aa93d762
Signed-off-by: Loic Pallardy
Signed-off-by: Linus Walleij
---
.../devicetree/bindings/mailbox/dbx500-mailbox.txt | 27 +
drivers/mailbox/Kconfig| 7 +
drivers/mailbox/Makefile | 1 +
drivers/mailbox/mailbox-dbx500.c | 648 +
include/linux/platform_data/mailbox-dbx500.h | 12 +
5 files changed, 695 insertions(+)
create mode 100644 Documentation/devicetree/bindings/mailbox/dbx500-mailbox.txt
create mode 100644 drivers/mailbox/mailbox-dbx500.c
create mode 100644 include/linux/platform_data/mailbox-dbx500.h
diff --git a/Documentation/devicetree/bindings/mailbox/dbx500-mailbox.txt
b/Documentation/devicetree/bindings/mailbox/dbx500-mailbox.txt
new file mode 100644
index 000..7a10e72
--- /dev/null
+++ b/Documentation/devicetree/bindings/mailbox/dbx500-mailbox.txt
@@ -0,0 +1,27 @@
+ST-Ericsson DBx500 PRCM Mailbox Driver
+
+Required properties:
+- compatible : Should be
+ "stericsson,db8500-mailbox" for db8500 and db9500
+ "stericsson,db9540-mailbox" for db9540
+- reg : Physical base address and length of mailbox's
+ registers and shared memory
+- reg-names: Should contain the reg names "prcm-reg" and
+ "prcmu-tcdm"
+- interrupts : contains the IRQ line for the PRCM mailbox
+- interrupt-names : Should contain the interrupt name "irq"
+- legacy-offset: Memory offset in shared mem for legacy
mailboxes
+
+Optional properties:
+- upap-offset : Memory offset in shared mem for upap mailboxes
+
+Examples:
+
+mailbox {
+ compatible = "stericsson,db8500-mailbox";
+ reg = <0x80157000 0x1000>, <0x801B8000 0x2000>;
+ reg-names = "prcm-reg", "prcmu-tcdm";
+ interrupts = <0 47 0x4>;
+ interrupt-names = "irq";
+ legacy-offset = <0xdd4>;
+};
diff --git a/drivers/mailbox/Kconfig b/drivers/mailbox/Kconfig
index c28897d..d352028 100644
--- a/drivers/mailbox/Kconfig
+++ b/drivers/mailbox/Kconfig
@@ -24,6 +24,12 @@ config OMAP2PLUS_MBOX
OMAP2/3; or IPU, IVA HD and DSP in OMAP4. Say Y here if you want
to use OMAP2+ Mailbox framework support.
+config DBX500_MBOX
+ tristate "DBx500 Mailbox driver support"
+ depends on ARCH_U8500
+ help
+ Say Y here if you want to use DBx500 Mailbox driver support for
+ power coprocessor access on Ux500 and Ux540 families
config MBOX_KFIFO_SIZE
int "Mailbox kfifo default buffer size (bytes)"
@@ -35,6 +41,7 @@ config MBOX_KFIFO_SIZE
config MBOX_DATA_SIZE
int "Mailbox associated data max size (bytes)"
+ default 64 if DBX500_MBOX
default 4
help
Specify the default size of mailbox's associated data buffer
diff --git a/drivers/mailbox/Makefile b/drivers/mailbox/Makefile
index 4085b71..c04ce79 100644
--- a/drivers/mailbox/Makefile
+++ b/drivers/mailbox/Makefile
@@ -2,3 +2,4 @@ obj-$(CONFIG_MAILBOX) += mailbox.o
obj-$(CONFIG_OMAP1_MBOX) += mailbox-omap1.o
obj-$(CONFIG_OMAP2PLUS_MBOX) += mailbox-omap2.o
+obj-$(CONFIG_DBX500_MBOX) += mailbox-dbx500.o
diff --git a/drivers/mailbox/mailbox-dbx500.c b/drivers/mailbox/mailbox-dbx500.c
new file mode 100644
index 000..e9d2b0a
--- /dev/null
+++ b/drivers/mailbox/mailbox-dbx500.c
@@ -0,0 +1,648 @@
+/*
+ * Copyright (C) ST-Ericsson SA 2012
+ *
+ * License Terms: GNU General Public License v2
+ * Author: Loic Pallardy for ST-Ericsson
+ * DBX500 PRCM Mailbox driver
+ *
+ */
+
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+
+#include "mailbox_internal.h"
+
+#define MAILBOX_LEGACY 0
+#define MAILBOX_UPAP 1
+
+enum {
+ MAILBOX_BLOCKING,
+ MAILBOX_ATOMIC,
+};
+
+/* CPU mailbox registers */
+#define PRCM_MBOX_CPU_VAL 0x0fc
+#define PRCM_MBOX_CPU_SET 0x100
+#define PRCM_MBOX_CPU_CLR 0x104
+
+#define PRCM_ARM_IT1_CLR 0x48C
+#define PRCM_ARM_IT1_VAL 0x494
+
+#define NUM_MB 8
+#define MBOX_BIT BIT
+#define ALL_MBOX_BITS (MBOX_BIT(NUM_MB) - 1)
+
+/* CPU mailbox shared memory */
+#define PRCM_MBOX_LEGACY_SIZE 0x220
+#define _PRCM_MBOX_HEADER 0x214 /* 16 bytes */
+#define PRCM_MBOX_HEADER_REQ_MB0 (_PRCM_MBOX_HEADER + 0x0)
+#define PRCM_MBOX_HEADER_REQ_MB1 (_PRCM_MBOX_HEADER + 0x1)
+#define PRCM_MBOX_HEADER_REQ_MB2 (_PRCM_MBOX_HEADER + 0x2)
+#define PRCM_MBOX_HEADER_REQ_MB3 (_PRCM_MBOX_HEADER + 0x3)
+#define PRCM_MBOX_HEADER_REQ_MB4 (_PRCM_MBOX_HEADER + 0x4)
+#define PRCM_MBOX_HEADER_REQ_MB5 (_PRCM_MBOX_HEADER + 0x5)
+#define PRCM_MBOX_HEADER_ACK_MB0 (_PRCM_MBOX_HEADER + 0x8)
+
+/* Req Mailboxes */
+#define PRCM_REQ_MB0 0x208 /* 12
