Re: [PATCH v3 2/3] ARM: dts: dra7: Add syscon-pllreset syscon to SATA PHY

2015-08-04 Thread Tony Lindgren
* Roger Quadros rog...@ti.com [150804 01:22]:
 Tony,
 
 On 17/07/15 16:47, Roger Quadros wrote:
  This register is required to be passed to the SATA PHY driver
  to workaround errata i783 (SATA Lockup After SATA DPLL Unlock/Relock).
  
  Signed-off-by: Roger Quadros rog...@ti.com
 
 Can you please Ack or pick this for -fixes.
 Kishon has already picked patch 1 in this series. Thanks.

Best that Kishon takes both then:

Acked-by: Tony Lindgren t...@atomide.com
 
  ---
   arch/arm/boot/dts/dra7.dtsi | 1 +
   1 file changed, 1 insertion(+)
  
  diff --git a/arch/arm/boot/dts/dra7.dtsi b/arch/arm/boot/dts/dra7.dtsi
  index 8f1e25b..4a0718c 100644
  --- a/arch/arm/boot/dts/dra7.dtsi
  +++ b/arch/arm/boot/dts/dra7.dtsi
  @@ -1140,6 +1140,7 @@
  ctrl-module = omap_control_sata;
  clocks = sys_clkin1, sata_ref_clk;
  clock-names = sysclk, refclk;
  +   syscon-pllreset = scm_conf 0x3fc;
  #phy-cells = 0;
  };
   
  
--
To unsubscribe from this list: send the line unsubscribe linux-omap in
the body of a message to majord...@vger.kernel.org
More majordomo info at  http://vger.kernel.org/majordomo-info.html


Re: [PATCH v3 2/3] ARM: dts: dra7: Add syscon-pllreset syscon to SATA PHY

2015-08-04 Thread Roger Quadros
Tony,

On 17/07/15 16:47, Roger Quadros wrote:
 This register is required to be passed to the SATA PHY driver
 to workaround errata i783 (SATA Lockup After SATA DPLL Unlock/Relock).
 
 Signed-off-by: Roger Quadros rog...@ti.com

Can you please Ack or pick this for -fixes.
Kishon has already picked patch 1 in this series. Thanks.

cheers,
-roger

 ---
  arch/arm/boot/dts/dra7.dtsi | 1 +
  1 file changed, 1 insertion(+)
 
 diff --git a/arch/arm/boot/dts/dra7.dtsi b/arch/arm/boot/dts/dra7.dtsi
 index 8f1e25b..4a0718c 100644
 --- a/arch/arm/boot/dts/dra7.dtsi
 +++ b/arch/arm/boot/dts/dra7.dtsi
 @@ -1140,6 +1140,7 @@
   ctrl-module = omap_control_sata;
   clocks = sys_clkin1, sata_ref_clk;
   clock-names = sysclk, refclk;
 + syscon-pllreset = scm_conf 0x3fc;
   #phy-cells = 0;
   };
  
 
--
To unsubscribe from this list: send the line unsubscribe linux-omap in
the body of a message to majord...@vger.kernel.org
More majordomo info at  http://vger.kernel.org/majordomo-info.html


Re: [PATCH v3 2/3] ARM: dts: dra7: Add syscon-pllreset syscon to SATA PHY

2015-08-04 Thread Kishon Vijay Abraham I


On Tuesday 04 August 2015 02:11 PM, Tony Lindgren wrote:
 * Roger Quadros rog...@ti.com [150804 01:22]:
 Tony,

 On 17/07/15 16:47, Roger Quadros wrote:
 This register is required to be passed to the SATA PHY driver
 to workaround errata i783 (SATA Lockup After SATA DPLL Unlock/Relock).

 Signed-off-by: Roger Quadros rog...@ti.com

 Can you please Ack or pick this for -fixes.
 Kishon has already picked patch 1 in this series. Thanks.
 
 Best that Kishon takes both then:
 
 Acked-by: Tony Lindgren t...@atomide.com

merged, thanks.

-Kishon
  
 ---
  arch/arm/boot/dts/dra7.dtsi | 1 +
  1 file changed, 1 insertion(+)

 diff --git a/arch/arm/boot/dts/dra7.dtsi b/arch/arm/boot/dts/dra7.dtsi
 index 8f1e25b..4a0718c 100644
 --- a/arch/arm/boot/dts/dra7.dtsi
 +++ b/arch/arm/boot/dts/dra7.dtsi
 @@ -1140,6 +1140,7 @@
 ctrl-module = omap_control_sata;
 clocks = sys_clkin1, sata_ref_clk;
 clock-names = sysclk, refclk;
 +   syscon-pllreset = scm_conf 0x3fc;
 #phy-cells = 0;
 };
  

--
To unsubscribe from this list: send the line unsubscribe linux-omap in
the body of a message to majord...@vger.kernel.org
More majordomo info at  http://vger.kernel.org/majordomo-info.html


Re: [PATCH v3 2/3] ARM: dts: dra7: Add syscon-pllreset syscon to SATA PHY

2015-07-27 Thread Roger Quadros
On 20/07/15 15:08, Tero Kristo wrote:
 On 07/17/2015 04:47 PM, Roger Quadros wrote:
 This register is required to be passed to the SATA PHY driver
 to workaround errata i783 (SATA Lockup After SATA DPLL Unlock/Relock).

 Signed-off-by: Roger Quadros rog...@ti.com
 ---
   arch/arm/boot/dts/dra7.dtsi | 1 +
   1 file changed, 1 insertion(+)

 diff --git a/arch/arm/boot/dts/dra7.dtsi b/arch/arm/boot/dts/dra7.dtsi
 index 8f1e25b..4a0718c 100644
 --- a/arch/arm/boot/dts/dra7.dtsi
 +++ b/arch/arm/boot/dts/dra7.dtsi
 @@ -1140,6 +1140,7 @@
   ctrl-module = omap_control_sata;
   clocks = sys_clkin1, sata_ref_clk;
   clock-names = sysclk, refclk;
 +syscon-pllreset = scm_conf 0x3fc;
   #phy-cells = 0;
   };


 
 Looks fine to me.
 
 Make sure you use this register via regmap_update_bits only, seeing there is 
 another potential user for the same register.

Yes. Patch 1 is the user using regmap_update_bits.

cheers,
-roger
--
To unsubscribe from this list: send the line unsubscribe linux-omap in
the body of a message to majord...@vger.kernel.org
More majordomo info at  http://vger.kernel.org/majordomo-info.html


Re: [PATCH v3 2/3] ARM: dts: dra7: Add syscon-pllreset syscon to SATA PHY

2015-07-20 Thread Tero Kristo

On 07/17/2015 04:47 PM, Roger Quadros wrote:

This register is required to be passed to the SATA PHY driver
to workaround errata i783 (SATA Lockup After SATA DPLL Unlock/Relock).

Signed-off-by: Roger Quadros rog...@ti.com
---
  arch/arm/boot/dts/dra7.dtsi | 1 +
  1 file changed, 1 insertion(+)

diff --git a/arch/arm/boot/dts/dra7.dtsi b/arch/arm/boot/dts/dra7.dtsi
index 8f1e25b..4a0718c 100644
--- a/arch/arm/boot/dts/dra7.dtsi
+++ b/arch/arm/boot/dts/dra7.dtsi
@@ -1140,6 +1140,7 @@
ctrl-module = omap_control_sata;
clocks = sys_clkin1, sata_ref_clk;
clock-names = sysclk, refclk;
+   syscon-pllreset = scm_conf 0x3fc;
#phy-cells = 0;
};




Looks fine to me.

Make sure you use this register via regmap_update_bits only, seeing 
there is another potential user for the same register.


-Tero
--
To unsubscribe from this list: send the line unsubscribe linux-omap in
the body of a message to majord...@vger.kernel.org
More majordomo info at  http://vger.kernel.org/majordomo-info.html


[PATCH v3 2/3] ARM: dts: dra7: Add syscon-pllreset syscon to SATA PHY

2015-07-17 Thread Roger Quadros
This register is required to be passed to the SATA PHY driver
to workaround errata i783 (SATA Lockup After SATA DPLL Unlock/Relock).

Signed-off-by: Roger Quadros rog...@ti.com
---
 arch/arm/boot/dts/dra7.dtsi | 1 +
 1 file changed, 1 insertion(+)

diff --git a/arch/arm/boot/dts/dra7.dtsi b/arch/arm/boot/dts/dra7.dtsi
index 8f1e25b..4a0718c 100644
--- a/arch/arm/boot/dts/dra7.dtsi
+++ b/arch/arm/boot/dts/dra7.dtsi
@@ -1140,6 +1140,7 @@
ctrl-module = omap_control_sata;
clocks = sys_clkin1, sata_ref_clk;
clock-names = sysclk, refclk;
+   syscon-pllreset = scm_conf 0x3fc;
#phy-cells = 0;
};
 
-- 
2.1.4

--
To unsubscribe from this list: send the line unsubscribe linux-omap in
the body of a message to majord...@vger.kernel.org
More majordomo info at  http://vger.kernel.org/majordomo-info.html