Re: [PATCH v4 07/11] ARM: OMAP2+: CM: AM43x clockdomain data

2013-09-30 Thread Paul Walmsley
Hi

On Thu, 26 Sep 2013, Afzal Mohammed wrote:

 From: Ambresh K ambr...@ti.com
 
 Add the data file to describe clock domains in AM43x SoC.
 OMAP4 clockdomain operations is being reused here.
 
 Signed-off-by: Ambresh K ambr...@ti.com
 Signed-off-by: Afzal Mohammed af...@ti.com
 ---
  arch/arm/mach-omap2/clockdomain.h   |   2 +
  arch/arm/mach-omap2/clockdomains43xx_data.c | 196 
 
  arch/arm/mach-omap2/cminst44xx.c|   9 ++
  3 files changed, 207 insertions(+)
  create mode 100644 arch/arm/mach-omap2/clockdomains43xx_data.c
 

...

 diff --git a/arch/arm/mach-omap2/clockdomains43xx_data.c 
 b/arch/arm/mach-omap2/clockdomains43xx_data.c
 new file mode 100644
 index 000..6d71c60
 --- /dev/null
 +++ b/arch/arm/mach-omap2/clockdomains43xx_data.c
 @@ -0,0 +1,196 @@

...

 +static struct clockdomain l3s_tsc_43xx_clkdm = {
 + .name = l3s_tsc_clkdm,
 + .pwrdm= { .name = wkup_pwrdm },
 + .prcm_partition   = AM43XX_CM_PARTITION,
 + .cm_inst  = AM43XX_CM_WKUP_INST,
 + .clkdm_offs   = AM43XX_CM_WKUP_L3S_TSC_CDOFFS,
 + .flags= CLKDM_CAN_SWSUP,
 +};

The references to wkup_pwrdm on some of these clockdomains don't 
look right to me.  For example, this clockdomain is listed as being in 
AM43XX_CM_WKUP_INST, but its enclosing powerdomain is listed as being in 
AM43XX_PRM_WKUP_INST.  Looks to me like it's best to have two different 
wakeup powerdomains: one CM_WKUP, and one PRM_WKUP.
 

- Paul
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Re: [PATCH v4 07/11] ARM: OMAP2+: CM: AM43x clockdomain data

2013-09-30 Thread Paul Walmsley
On Mon, 30 Sep 2013, Paul Walmsley wrote:

 The references to wkup_pwrdm on some of these clockdomains don't 
 look right to me.  For example, this clockdomain is listed as being in 
 AM43XX_CM_WKUP_INST, but its enclosing powerdomain is listed as being in 
 AM43XX_PRM_WKUP_INST.  Looks to me like it's best to have two different 
 wakeup powerdomains: one CM_WKUP, and one PRM_WKUP.

Looks like the same problem exists with at least the PER powerdomain also.  
Looks to me like that needs to be split into cm_per and prm_per variants?


- Paul
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Re: [PATCH v4 07/11] ARM: OMAP2+: CM: AM43x clockdomain data

2013-09-30 Thread Afzal Mohammed
Hi Paul,

On Monday 30 September 2013 03:01 PM, Paul Walmsley wrote:
 On Thu, 26 Sep 2013, Afzal Mohammed wrote:

 From: Ambresh K ambr...@ti.com

 Add the data file to describe clock domains in AM43x SoC.
 OMAP4 clockdomain operations is being reused here.

 Signed-off-by: Ambresh K ambr...@ti.com
 Signed-off-by: Afzal Mohammed af...@ti.com
 ---
  arch/arm/mach-omap2/clockdomain.h   |   2 +
  arch/arm/mach-omap2/clockdomains43xx_data.c | 196 
 
  arch/arm/mach-omap2/cminst44xx.c|   9 ++
  3 files changed, 207 insertions(+)
  create mode 100644 arch/arm/mach-omap2/clockdomains43xx_data.c

 
 ...
 
 diff --git a/arch/arm/mach-omap2/clockdomains43xx_data.c 
 b/arch/arm/mach-omap2/clockdomains43xx_data.c
 new file mode 100644
 index 000..6d71c60
 --- /dev/null
 +++ b/arch/arm/mach-omap2/clockdomains43xx_data.c
 @@ -0,0 +1,196 @@
 
 ...
 
 +static struct clockdomain l3s_tsc_43xx_clkdm = {
 +.name = l3s_tsc_clkdm,
 +.pwrdm= { .name = wkup_pwrdm },
 +.prcm_partition   = AM43XX_CM_PARTITION,
 +.cm_inst  = AM43XX_CM_WKUP_INST,
 +.clkdm_offs   = AM43XX_CM_WKUP_L3S_TSC_CDOFFS,
 +.flags= CLKDM_CAN_SWSUP,
 +};

 The references to wkup_pwrdm on some of these clockdomains don't 
 look right to me.  For example, this clockdomain is listed as being in 
 AM43XX_CM_WKUP_INST, but its enclosing powerdomain is listed as being in 
 AM43XX_PRM_WKUP_INST.  Looks to me like it's best to have two different 
 wakeup powerdomains: one CM_WKUP, and one PRM_WKUP.

On AM43x, prcm is a single block as in AM335x and is part of wakeup
domain. This is different from OMAP4 that had separate prm and cm
blocks. Script also generated the same output.

Regards
Afzal
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Re: [PATCH v4 07/11] ARM: OMAP2+: CM: AM43x clockdomain data

2013-09-30 Thread Paul Walmsley
Hi

On Mon, 30 Sep 2013, Afzal Mohammed wrote:

  The references to wkup_pwrdm on some of these clockdomains don't 
  look right to me.  For example, this clockdomain is listed as being in 
  AM43XX_CM_WKUP_INST, but its enclosing powerdomain is listed as being in 
  AM43XX_PRM_WKUP_INST.  Looks to me like it's best to have two different 
  wakeup powerdomains: one CM_WKUP, and one PRM_WKUP.
 
 On AM43x, prcm is a single block as in AM335x and is part of wakeup
 domain. This is different from OMAP4 that had separate prm and cm
 blocks. Script also generated the same output.

Why are there two different address offsets for CM_WKUP and PRM_WKUP?  
From another patch in the series:

+#define AM43XX_PRM_WKUP_INST   0x2000

...

+#define AM43XX_CM_WKUP_INST0x2800



- Paul
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Re: [PATCH v4 07/11] ARM: OMAP2+: CM: AM43x clockdomain data

2013-09-30 Thread Afzal Mohammed
Hi Paul,

On Monday 30 September 2013 04:39 PM, Paul Walmsley wrote:
 On Mon, 30 Sep 2013, Afzal Mohammed wrote:

 The references to wkup_pwrdm on some of these clockdomains don't 
 look right to me.  For example, this clockdomain is listed as being in 
 AM43XX_CM_WKUP_INST, but its enclosing powerdomain is listed as being in 
 AM43XX_PRM_WKUP_INST.  Looks to me like it's best to have two different 
 wakeup powerdomains: one CM_WKUP, and one PRM_WKUP.

 On AM43x, prcm is a single block as in AM335x and is part of wakeup
 domain. This is different from OMAP4 that had separate prm and cm
 blocks. Script also generated the same output.

 Why are there two different address offsets for CM_WKUP and PRM_WKUP?  
 From another patch in the series:
 
 +#define AM43XX_PRM_WKUP_INST   0x2000
 
 ...
 
 +#define AM43XX_CM_WKUP_INST0x2800

AM43XX_PRM_WKUP_INST and AM43XX_CM_WKUP_INST are offsets from PRCM_BASE.
We don't have separate base address for PRM  CM. This is similar to as
that in AM335x, where it is 0xD00 and 0x400 respectively (both from same
base) as in prm33xx.h  cm33xx.h.

Please note that AM43XX_PRM_PARTITION and AM43XX_CM_PARTITION both are '1'.

PRCM register details from TRM (not yet public) is mentioned below.

Regards
Afzal


PRCM Functional Registers
The table below shows the base address and address space for the PRCM
module instances.
Table 2. PRCM Instance Summary
ModuleName  BaseAddress Size
OCP_SOCKET_PRM  0x  256 Bytes
PRM_MPU 0x0300  256 Bytes
PRM_GFX 0x0400  256 Bytes
PRM_RTC 0x0500  256 Bytes
PRM_TAMPER  0x0600  256 Bytes
PRM_CEFUSE  0x0700  256 Bytes
PRM_PER 0x0800  6 KBytes
PRM_WKUP0x2000  2 KBytes
CM_WKUP 0x2800  2 KBytes
PRM_DEVICE  0x4000  256 Bytes
CM_DEVICE   0x4100  256 Bytes
CM_DPLL 0x4200  256 Bytes
CM_MPU  0x8300  256 Bytes
CM_GFX  0x8400  256 Bytes
CM_RTC  0x8500  256 Bytes
CM_TAMPER   0x8600  256 Bytes
CM_CEFUSE   0x8700  256 Bytes
CM_PER  0x8800  6 KBytes



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[PATCH v4 07/11] ARM: OMAP2+: CM: AM43x clockdomain data

2013-09-26 Thread Afzal Mohammed
From: Ambresh K ambr...@ti.com

Add the data file to describe clock domains in AM43x SoC.
OMAP4 clockdomain operations is being reused here.

Signed-off-by: Ambresh K ambr...@ti.com
Signed-off-by: Afzal Mohammed af...@ti.com
---
 arch/arm/mach-omap2/clockdomain.h   |   2 +
 arch/arm/mach-omap2/clockdomains43xx_data.c | 196 
 arch/arm/mach-omap2/cminst44xx.c|   9 ++
 3 files changed, 207 insertions(+)
 create mode 100644 arch/arm/mach-omap2/clockdomains43xx_data.c

diff --git a/arch/arm/mach-omap2/clockdomain.h 
b/arch/arm/mach-omap2/clockdomain.h
index 5431b0c..f17f006 100644
--- a/arch/arm/mach-omap2/clockdomain.h
+++ b/arch/arm/mach-omap2/clockdomain.h
@@ -218,6 +218,7 @@ extern void __init am33xx_clockdomains_init(void);
 extern void __init omap44xx_clockdomains_init(void);
 extern void __init omap54xx_clockdomains_init(void);
 extern void __init dra7xx_clockdomains_init(void);
+void am43xx_clockdomains_init(void);
 
 extern void clkdm_add_autodeps(struct clockdomain *clkdm);
 extern void clkdm_del_autodeps(struct clockdomain *clkdm);
@@ -226,6 +227,7 @@ extern struct clkdm_ops omap2_clkdm_operations;
 extern struct clkdm_ops omap3_clkdm_operations;
 extern struct clkdm_ops omap4_clkdm_operations;
 extern struct clkdm_ops am33xx_clkdm_operations;
+extern struct clkdm_ops am43xx_clkdm_operations;
 
 extern struct clkdm_dep gfx_24xx_wkdeps[];
 extern struct clkdm_dep dsp_24xx_wkdeps[];
diff --git a/arch/arm/mach-omap2/clockdomains43xx_data.c 
b/arch/arm/mach-omap2/clockdomains43xx_data.c
new file mode 100644
index 000..6d71c60
--- /dev/null
+++ b/arch/arm/mach-omap2/clockdomains43xx_data.c
@@ -0,0 +1,196 @@
+/*
+ * AM43xx Clock domains framework
+ *
+ * Copyright (C) 2013 Texas Instruments, Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+
+#include linux/kernel.h
+#include linux/io.h
+
+#include clockdomain.h
+#include prcm44xx.h
+#include prcm43xx.h
+
+static struct clockdomain l4_cefuse_43xx_clkdm = {
+   .name = l4_cefuse_clkdm,
+   .pwrdm= { .name = cefuse_pwrdm },
+   .prcm_partition   = AM43XX_CM_PARTITION,
+   .cm_inst  = AM43XX_CM_CEFUSE_INST,
+   .clkdm_offs   = AM43XX_CM_CEFUSE_CEFUSE_CDOFFS,
+   .flags= CLKDM_CAN_SWSUP,
+};
+
+static struct clockdomain mpu_43xx_clkdm = {
+   .name = mpu_clkdm,
+   .pwrdm= { .name = mpu_pwrdm },
+   .prcm_partition   = AM43XX_CM_PARTITION,
+   .cm_inst  = AM43XX_CM_MPU_INST,
+   .clkdm_offs   = AM43XX_CM_MPU_MPU_CDOFFS,
+   .flags= CLKDM_CAN_HWSUP_SWSUP,
+};
+
+static struct clockdomain l4ls_43xx_clkdm = {
+   .name = l4ls_clkdm,
+   .pwrdm= { .name = per_pwrdm },
+   .prcm_partition   = AM43XX_CM_PARTITION,
+   .cm_inst  = AM43XX_CM_PER_INST,
+   .clkdm_offs   = AM43XX_CM_PER_L4LS_CDOFFS,
+   .flags= CLKDM_CAN_SWSUP,
+};
+
+static struct clockdomain tamper_43xx_clkdm = {
+   .name = tamper_clkdm,
+   .pwrdm= { .name = tamper_pwrdm },
+   .prcm_partition   = AM43XX_CM_PARTITION,
+   .cm_inst  = AM43XX_CM_TAMPER_INST,
+   .clkdm_offs   = AM43XX_CM_TAMPER_TAMPER_CDOFFS,
+   .flags= CLKDM_CAN_SWSUP,
+};
+
+static struct clockdomain l4_rtc_43xx_clkdm = {
+   .name = l4_rtc_clkdm,
+   .pwrdm= { .name = rtc_pwrdm },
+   .prcm_partition   = AM43XX_CM_PARTITION,
+   .cm_inst  = AM43XX_CM_RTC_INST,
+   .clkdm_offs   = AM43XX_CM_RTC_RTC_CDOFFS,
+   .flags= CLKDM_CAN_SWSUP,
+};
+
+static struct clockdomain pruss_ocp_43xx_clkdm = {
+   .name = pruss_ocp_clkdm,
+   .pwrdm= { .name = per_pwrdm },
+   .prcm_partition   = AM43XX_CM_PARTITION,
+   .cm_inst  = AM43XX_CM_PER_INST,
+   .clkdm_offs   = AM43XX_CM_PER_ICSS_CDOFFS,
+   .flags= CLKDM_CAN_SWSUP,
+};
+
+static struct clockdomain ocpwp_l3_43xx_clkdm = {
+   .name = ocpwp_l3_clkdm,
+   .pwrdm= { .name = per_pwrdm },
+   .prcm_partition   = AM43XX_CM_PARTITION,
+   .cm_inst  = AM43XX_CM_PER_INST,
+   .clkdm_offs   = AM43XX_CM_PER_OCPWP_L3_CDOFFS,
+   .flags= CLKDM_CAN_SWSUP,
+};
+
+static struct clockdomain l3s_tsc_43xx_clkdm = {
+   .name = l3s_tsc_clkdm,
+   .pwrdm= { .name = wkup_pwrdm },
+   .prcm_partition   = AM43XX_CM_PARTITION,
+   .cm_inst  = AM43XX_CM_WKUP_INST,
+   .clkdm_offs   = AM43XX_CM_WKUP_L3S_TSC_CDOFFS,
+   .flags= CLKDM_CAN_SWSUP,
+};
+
+static struct clockdomain dss_43xx_clkdm = {
+   .name = dss_clkdm,
+   .pwrdm