Re: [PATCHv2 10/19] ARM: OMAP4: PM: Work-around for ROM code BUG of IVAHD/TESLA
Tero Kristo t-kri...@ti.com writes: On Wed, 2012-05-16 at 16:07 -0700, Kevin Hilman wrote: On 05/16/2012 04:05 PM, Kevin Hilman wrote: Tero Kristot-kri...@ti.com writes: From: Santosh Shilimkarsantosh.shilim...@ti.com The ROM BUG is when MPU Domain OFF wake up sequence that can compromise IVA and Tesla execution. At wakeup from MPU OFF on HS device only (not GP device), when restoring the Secure RAM, the ROM Code reconfigures the clocks the same way it is done at Cold Reset. Ouch. The IVAHD Clocks and Power Domain settings are: IVAHD_CM2 IVAHD_CLKCTRL_MODULE_MODE = DISABLE IVAHD_CM2 SL2_CLKCTRL_MODULE_MODE = DISABLE IVAHD_CM2 SL2_CLKSTCTRL_CLKTRCTRL = HW_AUTO IVAHD_PRM IVAHD_PWRSTCTRL_POWERSTATE = OFF The TESLA Clocks and Power Domain settings are: TESLA_CM1 TESLA_CLKCTRL_MODULE_MODE = DISABLE TESLA_CM1 TESLA_CLKSTCTRL_CLKTRCTRL = HW_AUTO TESLA_PRM TESLA_PWRSTCTRL_POWERSTATE = OFF This patch fixes the low power OFF mode code so that the these registers are saved and restore across MPU OFF state. Also because of this limitation, MPU OFF alone is not targeted without device OFF to avoid IVAHD and TESLA execution impact I don't see where this restriction is implemented. And, can this be hooked into cluster PM notifiers. Especially since this only effects a subset of revisions, installing the notifier only on effected revisions also removes any overhead on working revisions. Where would you recommend adding the notifiers to? Just to the same file or...? pm44xx.c? Same file should be ok. Kevin -- To unsubscribe from this list: send the line unsubscribe linux-omap in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
Re: [PATCHv2 10/19] ARM: OMAP4: PM: Work-around for ROM code BUG of IVAHD/TESLA
On Wed, 2012-05-16 at 16:07 -0700, Kevin Hilman wrote: On 05/16/2012 04:05 PM, Kevin Hilman wrote: Tero Kristot-kri...@ti.com writes: From: Santosh Shilimkarsantosh.shilim...@ti.com The ROM BUG is when MPU Domain OFF wake up sequence that can compromise IVA and Tesla execution. At wakeup from MPU OFF on HS device only (not GP device), when restoring the Secure RAM, the ROM Code reconfigures the clocks the same way it is done at Cold Reset. Ouch. The IVAHD Clocks and Power Domain settings are: IVAHD_CM2 IVAHD_CLKCTRL_MODULE_MODE = DISABLE IVAHD_CM2 SL2_CLKCTRL_MODULE_MODE = DISABLE IVAHD_CM2 SL2_CLKSTCTRL_CLKTRCTRL = HW_AUTO IVAHD_PRM IVAHD_PWRSTCTRL_POWERSTATE = OFF The TESLA Clocks and Power Domain settings are: TESLA_CM1 TESLA_CLKCTRL_MODULE_MODE = DISABLE TESLA_CM1 TESLA_CLKSTCTRL_CLKTRCTRL = HW_AUTO TESLA_PRM TESLA_PWRSTCTRL_POWERSTATE = OFF This patch fixes the low power OFF mode code so that the these registers are saved and restore across MPU OFF state. Also because of this limitation, MPU OFF alone is not targeted without device OFF to avoid IVAHD and TESLA execution impact I don't see where this restriction is implemented. And, can this be hooked into cluster PM notifiers. Especially since this only effects a subset of revisions, installing the notifier only on effected revisions also removes any overhead on working revisions. Where would you recommend adding the notifiers to? Just to the same file or...? pm44xx.c? -Tero -- To unsubscribe from this list: send the line unsubscribe linux-omap in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
Re: [PATCHv2 10/19] ARM: OMAP4: PM: Work-around for ROM code BUG of IVAHD/TESLA
On Thu, May 17, 2012 at 4:35 AM, Kevin Hilman khil...@ti.com wrote: Tero Kristo t-kri...@ti.com writes: From: Santosh Shilimkar santosh.shilim...@ti.com The ROM BUG is when MPU Domain OFF wake up sequence that can compromise IVA and Tesla execution. At wakeup from MPU OFF on HS device only (not GP device), when restoring the Secure RAM, the ROM Code reconfigures the clocks the same way it is done at Cold Reset. Ouch. The IVAHD Clocks and Power Domain settings are: IVAHD_CM2 IVAHD_CLKCTRL_MODULE_MODE = DISABLE IVAHD_CM2 SL2_CLKCTRL_MODULE_MODE = DISABLE IVAHD_CM2 SL2_CLKSTCTRL_CLKTRCTRL = HW_AUTO IVAHD_PRM IVAHD_PWRSTCTRL_POWERSTATE = OFF The TESLA Clocks and Power Domain settings are: TESLA_CM1 TESLA_CLKCTRL_MODULE_MODE = DISABLE TESLA_CM1 TESLA_CLKSTCTRL_CLKTRCTRL = HW_AUTO TESLA_PRM TESLA_PWRSTCTRL_POWERSTATE = OFF This patch fixes the low power OFF mode code so that the these registers are saved and restore across MPU OFF state. Also because of this limitation, MPU OFF alone is not targeted without device OFF to avoid IVAHD and TESLA execution impact I don't see where this restriction is implemented. It's handled and the patch is in mainline for some time. We de-scoped MPU OFF from OMAP4430 devices in SW and hardware team de-scoped it in hardware from OMAP4460 onwards. Deepest state on MPUSS cluster is OSWR. commit a57341f780660800e1463eaedb80ed152ad6b5de Author: Santosh Shilimkar santosh.shilim...@ti.com Date: Sat Jul 9 20:42:59 2011 -0600 OMAP4: powerdomain data: Remove unsupported MPU powerdomain state On OMAP4430 devices, because of boot ROM code bug, MPU OFF state can't be attempted independently. When coming out of MPU OFF state, ROM code disables the clocks of IVAHD, TESLA which is not desirable. Hence the MPU OFF state is not usable on OMAP4430 devices. OMAP4460 onwards, MPU OFF state will be descoped completely because the DDR firewall falls in MPU power domain. When the MPU hit OFF state, DDR won't be accessible for other initiators. The deepest state supported is open switch retention (OSWR) just like CORE and PER PD on OMAP4430. So in summary MPU power domain OFF state is not supported on OMAP4 and onwards designs. Thanks to new PRCM design, device off mode can still be achieved with power domains hitting OSWR state. Signed-off-by: Santosh Shilimkar santosh.shilim...@ti.com Signed-off-by: Rajendra Nayak rna...@ti.com [b-cous...@ti.com: Fix changelog typos] Signed-off-by: Benoit Cousson b-cous...@ti.com Signed-off-by: Paul Walmsley p...@pwsan.com - And, can this be hooked into cluster PM notifiers. Not needed. -- To unsubscribe from this list: send the line unsubscribe linux-omap in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
Re: [PATCHv2 10/19] ARM: OMAP4: PM: Work-around for ROM code BUG of IVAHD/TESLA
Shilimkar, Santosh santosh.shilim...@ti.com writes: On Thu, May 17, 2012 at 4:35 AM, Kevin Hilman khil...@ti.com wrote: Tero Kristo t-kri...@ti.com writes: From: Santosh Shilimkar santosh.shilim...@ti.com The ROM BUG is when MPU Domain OFF wake up sequence that can compromise IVA and Tesla execution. At wakeup from MPU OFF on HS device only (not GP device), when restoring the Secure RAM, the ROM Code reconfigures the clocks the same way it is done at Cold Reset. Ouch. The IVAHD Clocks and Power Domain settings are: IVAHD_CM2 IVAHD_CLKCTRL_MODULE_MODE = DISABLE IVAHD_CM2 SL2_CLKCTRL_MODULE_MODE = DISABLE IVAHD_CM2 SL2_CLKSTCTRL_CLKTRCTRL = HW_AUTO IVAHD_PRM IVAHD_PWRSTCTRL_POWERSTATE = OFF The TESLA Clocks and Power Domain settings are: TESLA_CM1 TESLA_CLKCTRL_MODULE_MODE = DISABLE TESLA_CM1 TESLA_CLKSTCTRL_CLKTRCTRL = HW_AUTO TESLA_PRM TESLA_PWRSTCTRL_POWERSTATE = OFF This patch fixes the low power OFF mode code so that the these registers are saved and restore across MPU OFF state. Also because of this limitation, MPU OFF alone is not targeted without device OFF to avoid IVAHD and TESLA execution impact I don't see where this restriction is implemented. It's handled and the patch is in mainline for some time. We de-scoped MPU OFF from OMAP4430 devices in SW and hardware team de-scoped it in hardware from OMAP4460 onwards. Deepest state on MPUSS cluster is OSWR. The question was about the changelog. The changelog makes it sound like the restriction is part of the patch, but it is not. Please update the changlog to clarify that, ideally adding a reference to the commit you mentioned. Kevin -- To unsubscribe from this list: send the line unsubscribe linux-omap in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
Re: [PATCHv2 10/19] ARM: OMAP4: PM: Work-around for ROM code BUG of IVAHD/TESLA
On Thu, May 17, 2012 at 10:15 PM, Kevin Hilman khil...@ti.com wrote: Shilimkar, Santosh santosh.shilim...@ti.com writes: On Thu, May 17, 2012 at 4:35 AM, Kevin Hilman khil...@ti.com wrote: Tero Kristo t-kri...@ti.com writes: From: Santosh Shilimkar santosh.shilim...@ti.com The ROM BUG is when MPU Domain OFF wake up sequence that can compromise IVA and Tesla execution. At wakeup from MPU OFF on HS device only (not GP device), when restoring the Secure RAM, the ROM Code reconfigures the clocks the same way it is done at Cold Reset. Ouch. The IVAHD Clocks and Power Domain settings are: IVAHD_CM2 IVAHD_CLKCTRL_MODULE_MODE = DISABLE IVAHD_CM2 SL2_CLKCTRL_MODULE_MODE = DISABLE IVAHD_CM2 SL2_CLKSTCTRL_CLKTRCTRL = HW_AUTO IVAHD_PRM IVAHD_PWRSTCTRL_POWERSTATE = OFF The TESLA Clocks and Power Domain settings are: TESLA_CM1 TESLA_CLKCTRL_MODULE_MODE = DISABLE TESLA_CM1 TESLA_CLKSTCTRL_CLKTRCTRL = HW_AUTO TESLA_PRM TESLA_PWRSTCTRL_POWERSTATE = OFF This patch fixes the low power OFF mode code so that the these registers are saved and restore across MPU OFF state. Also because of this limitation, MPU OFF alone is not targeted without device OFF to avoid IVAHD and TESLA execution impact I don't see where this restriction is implemented. It's handled and the patch is in mainline for some time. We de-scoped MPU OFF from OMAP4430 devices in SW and hardware team de-scoped it in hardware from OMAP4460 onwards. Deepest state on MPUSS cluster is OSWR. The question was about the changelog. The changelog makes it sound like the restriction is part of the patch, but it is not. Please update the changlog to clarify that, ideally adding a reference to the commit you mentioned. Agree. -- To unsubscribe from this list: send the line unsubscribe linux-omap in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
Re: [PATCHv2 10/19] ARM: OMAP4: PM: Work-around for ROM code BUG of IVAHD/TESLA
Tero Kristo t-kri...@ti.com writes: From: Santosh Shilimkar santosh.shilim...@ti.com The ROM BUG is when MPU Domain OFF wake up sequence that can compromise IVA and Tesla execution. At wakeup from MPU OFF on HS device only (not GP device), when restoring the Secure RAM, the ROM Code reconfigures the clocks the same way it is done at Cold Reset. Ouch. The IVAHD Clocks and Power Domain settings are: IVAHD_CM2 IVAHD_CLKCTRL_MODULE_MODE = DISABLE IVAHD_CM2 SL2_CLKCTRL_MODULE_MODE = DISABLE IVAHD_CM2 SL2_CLKSTCTRL_CLKTRCTRL = HW_AUTO IVAHD_PRM IVAHD_PWRSTCTRL_POWERSTATE = OFF The TESLA Clocks and Power Domain settings are: TESLA_CM1 TESLA_CLKCTRL_MODULE_MODE = DISABLE TESLA_CM1 TESLA_CLKSTCTRL_CLKTRCTRL = HW_AUTO TESLA_PRM TESLA_PWRSTCTRL_POWERSTATE = OFF This patch fixes the low power OFF mode code so that the these registers are saved and restore across MPU OFF state. Also because of this limitation, MPU OFF alone is not targeted without device OFF to avoid IVAHD and TESLA execution impact I don't see where this restriction is implemented. And, can this be hooked into cluster PM notifiers. Kevin -- To unsubscribe from this list: send the line unsubscribe linux-omap in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
Re: [PATCHv2 10/19] ARM: OMAP4: PM: Work-around for ROM code BUG of IVAHD/TESLA
On 05/16/2012 04:05 PM, Kevin Hilman wrote: Tero Kristot-kri...@ti.com writes: From: Santosh Shilimkarsantosh.shilim...@ti.com The ROM BUG is when MPU Domain OFF wake up sequence that can compromise IVA and Tesla execution. At wakeup from MPU OFF on HS device only (not GP device), when restoring the Secure RAM, the ROM Code reconfigures the clocks the same way it is done at Cold Reset. Ouch. The IVAHD Clocks and Power Domain settings are: IVAHD_CM2 IVAHD_CLKCTRL_MODULE_MODE = DISABLE IVAHD_CM2 SL2_CLKCTRL_MODULE_MODE = DISABLE IVAHD_CM2 SL2_CLKSTCTRL_CLKTRCTRL = HW_AUTO IVAHD_PRM IVAHD_PWRSTCTRL_POWERSTATE = OFF The TESLA Clocks and Power Domain settings are: TESLA_CM1 TESLA_CLKCTRL_MODULE_MODE = DISABLE TESLA_CM1 TESLA_CLKSTCTRL_CLKTRCTRL = HW_AUTO TESLA_PRM TESLA_PWRSTCTRL_POWERSTATE = OFF This patch fixes the low power OFF mode code so that the these registers are saved and restore across MPU OFF state. Also because of this limitation, MPU OFF alone is not targeted without device OFF to avoid IVAHD and TESLA execution impact I don't see where this restriction is implemented. And, can this be hooked into cluster PM notifiers. Especially since this only effects a subset of revisions, installing the notifier only on effected revisions also removes any overhead on working revisions. Kevin -- To unsubscribe from this list: send the line unsubscribe linux-omap in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
[PATCHv2 10/19] ARM: OMAP4: PM: Work-around for ROM code BUG of IVAHD/TESLA
From: Santosh Shilimkar santosh.shilim...@ti.com
The ROM BUG is when MPU Domain OFF wake up sequence that can compromise
IVA and Tesla execution.
At wakeup from MPU OFF on HS device only (not GP device), when
restoring the Secure RAM, the ROM Code reconfigures the clocks the
same way it is done at Cold Reset.
The IVAHD Clocks and Power Domain settings are:
IVAHD_CM2 IVAHD_CLKCTRL_MODULE_MODE = DISABLE
IVAHD_CM2 SL2_CLKCTRL_MODULE_MODE = DISABLE
IVAHD_CM2 SL2_CLKSTCTRL_CLKTRCTRL = HW_AUTO
IVAHD_PRM IVAHD_PWRSTCTRL_POWERSTATE = OFF
The TESLA Clocks and Power Domain settings are:
TESLA_CM1 TESLA_CLKCTRL_MODULE_MODE = DISABLE
TESLA_CM1 TESLA_CLKSTCTRL_CLKTRCTRL = HW_AUTO
TESLA_PRM TESLA_PWRSTCTRL_POWERSTATE = OFF
This patch fixes the low power OFF mode code so that the these
registers are saved and restore across MPU OFF state.
Also because of this limitation, MPU OFF alone is not targeted without
device OFF to avoid IVAHD and TESLA execution impact
This erratum impacts only OMAP4430 HS/EMU and is fixed on devices from
OMAP4430 ES2.3 onwards.
Signed-off-by: Rajendra Nayak rna...@ti.com
Signed-off-by: Santosh Shilimkar santosh.shilim...@ti.com
[t-kri...@ti.com: added omap4 pm errata support]
Signed-off-by: Tero Kristo t-kri...@ti.com
---
arch/arm/mach-omap2/omap-mpuss-lowpower.c | 53 +
arch/arm/mach-omap2/pm.h |2 +
arch/arm/mach-omap2/pm44xx.c | 11 ++
3 files changed, 66 insertions(+), 0 deletions(-)
diff --git a/arch/arm/mach-omap2/omap-mpuss-lowpower.c
b/arch/arm/mach-omap2/omap-mpuss-lowpower.c
index 2d994dd..73e45a5 100644
--- a/arch/arm/mach-omap2/omap-mpuss-lowpower.c
+++ b/arch/arm/mach-omap2/omap-mpuss-lowpower.c
@@ -52,6 +52,7 @@
#include plat/omap44xx.h
+#include iomap.h
#include common.h
#include omap4-sar-layout.h
#include pm.h
@@ -76,6 +77,24 @@ static DEFINE_PER_CPU(struct omap4_cpu_pm_info,
omap4_pm_info);
static struct powerdomain *mpuss_pd;
static void __iomem *sar_base;
+struct reg_tuple {
+ void __iomem *addr;
+ u32 val;
+};
+
+static struct reg_tuple tesla_reg[] = {
+ {.addr = OMAP4430_CM_TESLA_CLKSTCTRL},
+ {.addr = OMAP4430_CM_TESLA_TESLA_CLKCTRL},
+ {.addr = OMAP4430_PM_TESLA_PWRSTCTRL},
+};
+
+static struct reg_tuple ivahd_reg[] = {
+ {.addr = OMAP4430_CM_IVAHD_CLKSTCTRL},
+ {.addr = OMAP4430_CM_IVAHD_IVAHD_CLKCTRL},
+ {.addr = OMAP4430_CM_IVAHD_SL2_CLKCTRL},
+ {.addr = OMAP4430_PM_IVAHD_PWRSTCTRL}
+};
+
/*
* Program the wakeup routine address for the CPU0 and CPU1
* used for OFF or DORMANT wakeup.
@@ -215,6 +234,34 @@ static void save_l2x0_context(void)
{}
#endif
+static inline void save_ivahd_tesla_regs(void)
+{
+ int i;
+
+ if (!IS_PM44XX_ERRATUM(PM_OMAP4_ROM_IVAHD_TESLA_ERRATUM))
+ return;
+
+ for (i = 0; i ARRAY_SIZE(tesla_reg); i++)
+ tesla_reg[i].val = __raw_readl(tesla_reg[i].addr);
+
+ for (i = 0; i ARRAY_SIZE(ivahd_reg); i++)
+ ivahd_reg[i].val = __raw_readl(ivahd_reg[i].addr);
+}
+
+static inline void restore_ivahd_tesla_regs(void)
+{
+ int i;
+
+ if (!IS_PM44XX_ERRATUM(PM_OMAP4_ROM_IVAHD_TESLA_ERRATUM))
+ return;
+
+ for (i = 0; i ARRAY_SIZE(tesla_reg); i++)
+ __raw_writel(tesla_reg[i].val, tesla_reg[i].addr);
+
+ for (i = 0; i ARRAY_SIZE(ivahd_reg); i++)
+ __raw_writel(ivahd_reg[i].val, ivahd_reg[i].addr);
+}
+
/**
* omap4_enter_lowpower: OMAP4 MPUSS Low Power Entry Function
* The purpose of this function is to manage low power programming
@@ -273,11 +320,14 @@ int omap4_enter_lowpower(unsigned int cpu, unsigned int
power_state)
omap_sar_overwrite();
omap4_cm_prepare_off();
omap4_dpll_prepare_off();
+ save_ivahd_tesla_regs();
save_state = 3;
} else if ((pwrdm_read_next_pwrst(mpuss_pd) == PWRDM_POWER_RET)
(pwrdm_read_logic_retst(mpuss_pd) == PWRDM_POWER_OFF)) {
+ save_ivahd_tesla_regs();
save_state = 2;
} else if (pwrdm_read_next_pwrst(mpuss_pd) == PWRDM_POWER_OFF) {
+ save_ivahd_tesla_regs();
save_state = 3;
}
@@ -302,6 +352,9 @@ int omap4_enter_lowpower(unsigned int cpu, unsigned int
power_state)
wakeup_cpu = smp_processor_id();
set_cpu_next_pwrst(wakeup_cpu, PWRDM_POWER_ON);
+ if (omap4_mpuss_read_prev_context_state())
+ restore_ivahd_tesla_regs();
+
if (omap4_device_prev_state_off()) {
omap4_dpll_resume_off();
omap4_cm_resume_off();
diff --git a/arch/arm/mach-omap2/pm.h b/arch/arm/mach-omap2/pm.h
index e53ee3c..d2d468e 100644
--- a/arch/arm/mach-omap2/pm.h
+++ b/arch/arm/mach-omap2/pm.h
@@ -130,6 +130,8 @@ extern void enable_omap3630_toggle_l2_on_restore(void);
