Re: [PATCH 5/5] ARM: OMAP3+: DPLL: use determine_rate() and set_rate_and_parent()
On 12/10/2014 09:41 PM, Kevin Hilman wrote: Hi Tero, On Fri, Oct 3, 2014 at 6:57 AM, Tero Kristo t-kri...@ti.com wrote: Currently, DPLLs are hiding the gory details of switching parent within set_rate, which confuses the common clock code and is wrong. Fixed by applying the new determine_rate() and set_rate_and_parent() functionality to any clock-ops previously using the broken approach. This patch also removes the broken legacy code. Signed-off-by: Tero Kristo t-kri...@ti.com This patch arrived in linux-next (as commit 2e1a7b014f9c) and broke the omap2plus_defconfig, non-DT boot for the omap3-beagle-xm. By default, there's no output on the console, but turning on DEBUG_LL, I got the crash below[1]. Reverting this commit on next-20141210 gets things booting again for me. Posted a fix to this problem today to l-o list. -Tero Kevin [1] [0.00] Clocking rate (Crystal/Core/MPU): 26.0/400/600 MHz [0.00] Unable to handle kernel paging request at virtual address 5f737973 [0.00] pgd = c0004000 [0.00] [5f737973] *pgd= [0.00] Internal error: Oops: 5 [#1] SMP ARM [0.00] Modules linked in: [0.00] CPU: 0 PID: 0 Comm: swapper/0 Not tainted 3.18.0-11367-g6791358f417e #85 [0.00] Hardware name: OMAP3 Beagle Board [0.00] task: c08da288 ti: c08ce000 task.ti: c08ce000 [0.00] PC is at strcmp+0x4/0x30 [0.00] LR is at clk_fetch_parent_index+0x80/0xd8 [0.00] pc : [c032f3dc]lr : [c04d81c0]psr: 61d3 [0.00] sp : c08cff20 ip : fp : [0.00] r10: c08ec168 r9 : 5f737973 r8 : 0001 [0.00] r7 : de00d280 r6 : c0770eb4 r5 : de00d284 r4 : [0.00] r3 : 0073 r2 : r1 : 5f737973 r0 : c0770eb5 [0.00] Flags: nZCv IRQs off FIQs off Mode SVC_32 ISA ARM Segment kernel [0.00] Control: 10c5387d Table: 80004019 DAC: 0015 [0.00] Process swapper/0 (pid: 0, stack limit = 0xc08ce240) [0.00] Stack: (0xc08cff20 to 0xc08d) [0.00] ff20: c08ec168 c0770eb4 c08ebbf0 23c34600 07270e00 413fc082 dfeff140 c04d82b0 [0.00] ff40: c08ebbf0 07270e00 c08ec168 c08ec168 07270e00 001a 23c34600 c08ab890 [0.00] ff60: dfeff140 c04d8bfc 34300133 0190 c08ec168 c086ffc8 34300133 0190 [0.00] ff80: c0870318 0258 c09768c4 c09768c4 c09768c4 0001 [0.00] ffa0: c0976480 c08681a8 c086a114 c08aa1e8 c0862684 0002 c085eb08 [0.00] ffc0: c085e670 c08ab890 c0976694 [0.00] ffe0: c08d6968 c08ab88c c08dbc2c 80004059 80008074 [0.00] [c032f3dc] (strcmp) from [c04d81c0] (clk_fetch_parent_index+0x80/0xd8) [0.00] [c04d81c0] (clk_fetch_parent_index) from [c04d82b0] (clk_calc_new_rates+0x98/0x194) [0.00] [c04d82b0] (clk_calc_new_rates) from [c04d8bfc] (clk_set_rate+0x50/0x90) [0.00] [c04d8bfc] (clk_set_rate) from [c086ffc8] (omap3_clk_lock_dpll5+0x1c/0xb4) [0.00] [c086ffc8] (omap3_clk_lock_dpll5) from [c0870318] (omap3xxx_clk_init+0x2b8/0x398) [0.00] [c0870318] (omap3xxx_clk_init) from [c08681a8] (omap_clk_init+0x3c/0x50) [0.00] [c08681a8] (omap_clk_init) from [c086a114] (omap3_secure_sync32k_timer_init+0x8/0x58) [0.00] [c086a114] (omap3_secure_sync32k_timer_init) from [c0862684] (time_init+0x1c/0x30) [0.00] [c0862684] (time_init) from [c085eb08] (start_kernel+0x25c/0x3fc) [0.00] [c085eb08] (start_kernel) from [80008074] (0x80008074) [0.00] Code: e12fff1e e1a03000 eaf7 e4d03001 (e4d12001) [ -- To unsubscribe from this list: send the line unsubscribe linux-omap in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
Re: [PATCH 5/5] ARM: OMAP3+: DPLL: use determine_rate() and set_rate_and_parent()
Hi Tero, On Fri, Oct 3, 2014 at 6:57 AM, Tero Kristo t-kri...@ti.com wrote: Currently, DPLLs are hiding the gory details of switching parent within set_rate, which confuses the common clock code and is wrong. Fixed by applying the new determine_rate() and set_rate_and_parent() functionality to any clock-ops previously using the broken approach. This patch also removes the broken legacy code. Signed-off-by: Tero Kristo t-kri...@ti.com This patch arrived in linux-next (as commit 2e1a7b014f9c) and broke the omap2plus_defconfig, non-DT boot for the omap3-beagle-xm. By default, there's no output on the console, but turning on DEBUG_LL, I got the crash below[1]. Reverting this commit on next-20141210 gets things booting again for me. Kevin [1] [0.00] Clocking rate (Crystal/Core/MPU): 26.0/400/600 MHz [0.00] Unable to handle kernel paging request at virtual address 5f737973 [0.00] pgd = c0004000 [0.00] [5f737973] *pgd= [0.00] Internal error: Oops: 5 [#1] SMP ARM [0.00] Modules linked in: [0.00] CPU: 0 PID: 0 Comm: swapper/0 Not tainted 3.18.0-11367-g6791358f417e #85 [0.00] Hardware name: OMAP3 Beagle Board [0.00] task: c08da288 ti: c08ce000 task.ti: c08ce000 [0.00] PC is at strcmp+0x4/0x30 [0.00] LR is at clk_fetch_parent_index+0x80/0xd8 [0.00] pc : [c032f3dc]lr : [c04d81c0]psr: 61d3 [0.00] sp : c08cff20 ip : fp : [0.00] r10: c08ec168 r9 : 5f737973 r8 : 0001 [0.00] r7 : de00d280 r6 : c0770eb4 r5 : de00d284 r4 : [0.00] r3 : 0073 r2 : r1 : 5f737973 r0 : c0770eb5 [0.00] Flags: nZCv IRQs off FIQs off Mode SVC_32 ISA ARM Segment kernel [0.00] Control: 10c5387d Table: 80004019 DAC: 0015 [0.00] Process swapper/0 (pid: 0, stack limit = 0xc08ce240) [0.00] Stack: (0xc08cff20 to 0xc08d) [0.00] ff20: c08ec168 c0770eb4 c08ebbf0 23c34600 07270e00 413fc082 dfeff140 c04d82b0 [0.00] ff40: c08ebbf0 07270e00 c08ec168 c08ec168 07270e00 001a 23c34600 c08ab890 [0.00] ff60: dfeff140 c04d8bfc 34300133 0190 c08ec168 c086ffc8 34300133 0190 [0.00] ff80: c0870318 0258 c09768c4 c09768c4 c09768c4 0001 [0.00] ffa0: c0976480 c08681a8 c086a114 c08aa1e8 c0862684 0002 c085eb08 [0.00] ffc0: c085e670 c08ab890 c0976694 [0.00] ffe0: c08d6968 c08ab88c c08dbc2c 80004059 80008074 [0.00] [c032f3dc] (strcmp) from [c04d81c0] (clk_fetch_parent_index+0x80/0xd8) [0.00] [c04d81c0] (clk_fetch_parent_index) from [c04d82b0] (clk_calc_new_rates+0x98/0x194) [0.00] [c04d82b0] (clk_calc_new_rates) from [c04d8bfc] (clk_set_rate+0x50/0x90) [0.00] [c04d8bfc] (clk_set_rate) from [c086ffc8] (omap3_clk_lock_dpll5+0x1c/0xb4) [0.00] [c086ffc8] (omap3_clk_lock_dpll5) from [c0870318] (omap3xxx_clk_init+0x2b8/0x398) [0.00] [c0870318] (omap3xxx_clk_init) from [c08681a8] (omap_clk_init+0x3c/0x50) [0.00] [c08681a8] (omap_clk_init) from [c086a114] (omap3_secure_sync32k_timer_init+0x8/0x58) [0.00] [c086a114] (omap3_secure_sync32k_timer_init) from [c0862684] (time_init+0x1c/0x30) [0.00] [c0862684] (time_init) from [c085eb08] (start_kernel+0x25c/0x3fc) [0.00] [c085eb08] (start_kernel) from [80008074] (0x80008074) [0.00] Code: e12fff1e e1a03000 eaf7 e4d03001 (e4d12001) [ -- To unsubscribe from this list: send the line unsubscribe linux-omap in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
Re: [PATCH 5/5] ARM: OMAP3+: DPLL: use determine_rate() and set_rate_and_parent()
On 12/10/2014 09:41 PM, Kevin Hilman wrote: Hi Tero, On Fri, Oct 3, 2014 at 6:57 AM, Tero Kristo t-kri...@ti.com wrote: Currently, DPLLs are hiding the gory details of switching parent within set_rate, which confuses the common clock code and is wrong. Fixed by applying the new determine_rate() and set_rate_and_parent() functionality to any clock-ops previously using the broken approach. This patch also removes the broken legacy code. Signed-off-by: Tero Kristo t-kri...@ti.com This patch arrived in linux-next (as commit 2e1a7b014f9c) and broke the omap2plus_defconfig, non-DT boot for the omap3-beagle-xm. By default, there's no output on the console, but turning on DEBUG_LL, I got the crash below[1]. Reverting this commit on next-20141210 gets things booting again for me. Interesting... I'll pull latest linux-next today and try this out. -Tero Kevin [1] [0.00] Clocking rate (Crystal/Core/MPU): 26.0/400/600 MHz [0.00] Unable to handle kernel paging request at virtual address 5f737973 [0.00] pgd = c0004000 [0.00] [5f737973] *pgd= [0.00] Internal error: Oops: 5 [#1] SMP ARM [0.00] Modules linked in: [0.00] CPU: 0 PID: 0 Comm: swapper/0 Not tainted 3.18.0-11367-g6791358f417e #85 [0.00] Hardware name: OMAP3 Beagle Board [0.00] task: c08da288 ti: c08ce000 task.ti: c08ce000 [0.00] PC is at strcmp+0x4/0x30 [0.00] LR is at clk_fetch_parent_index+0x80/0xd8 [0.00] pc : [c032f3dc]lr : [c04d81c0]psr: 61d3 [0.00] sp : c08cff20 ip : fp : [0.00] r10: c08ec168 r9 : 5f737973 r8 : 0001 [0.00] r7 : de00d280 r6 : c0770eb4 r5 : de00d284 r4 : [0.00] r3 : 0073 r2 : r1 : 5f737973 r0 : c0770eb5 [0.00] Flags: nZCv IRQs off FIQs off Mode SVC_32 ISA ARM Segment kernel [0.00] Control: 10c5387d Table: 80004019 DAC: 0015 [0.00] Process swapper/0 (pid: 0, stack limit = 0xc08ce240) [0.00] Stack: (0xc08cff20 to 0xc08d) [0.00] ff20: c08ec168 c0770eb4 c08ebbf0 23c34600 07270e00 413fc082 dfeff140 c04d82b0 [0.00] ff40: c08ebbf0 07270e00 c08ec168 c08ec168 07270e00 001a 23c34600 c08ab890 [0.00] ff60: dfeff140 c04d8bfc 34300133 0190 c08ec168 c086ffc8 34300133 0190 [0.00] ff80: c0870318 0258 c09768c4 c09768c4 c09768c4 0001 [0.00] ffa0: c0976480 c08681a8 c086a114 c08aa1e8 c0862684 0002 c085eb08 [0.00] ffc0: c085e670 c08ab890 c0976694 [0.00] ffe0: c08d6968 c08ab88c c08dbc2c 80004059 80008074 [0.00] [c032f3dc] (strcmp) from [c04d81c0] (clk_fetch_parent_index+0x80/0xd8) [0.00] [c04d81c0] (clk_fetch_parent_index) from [c04d82b0] (clk_calc_new_rates+0x98/0x194) [0.00] [c04d82b0] (clk_calc_new_rates) from [c04d8bfc] (clk_set_rate+0x50/0x90) [0.00] [c04d8bfc] (clk_set_rate) from [c086ffc8] (omap3_clk_lock_dpll5+0x1c/0xb4) [0.00] [c086ffc8] (omap3_clk_lock_dpll5) from [c0870318] (omap3xxx_clk_init+0x2b8/0x398) [0.00] [c0870318] (omap3xxx_clk_init) from [c08681a8] (omap_clk_init+0x3c/0x50) [0.00] [c08681a8] (omap_clk_init) from [c086a114] (omap3_secure_sync32k_timer_init+0x8/0x58) [0.00] [c086a114] (omap3_secure_sync32k_timer_init) from [c0862684] (time_init+0x1c/0x30) [0.00] [c0862684] (time_init) from [c085eb08] (start_kernel+0x25c/0x3fc) [0.00] [c085eb08] (start_kernel) from [80008074] (0x80008074) [0.00] Code: e12fff1e e1a03000 eaf7 e4d03001 (e4d12001) [ -- To unsubscribe from this list: send the line unsubscribe linux-omap in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
