Re: Simple GPMC device driver with basic User application
Hi Philip, On Fri, Nov 4, 2011 at 7:48 PM, Philip Balister phi...@balister.org wrote: On 11/03/2011 03:25 PM, Tony Lindgren wrote: * James angweiy...@gmail.com [111023 18:13]: Dear all, I'm learning embedded linux development and need help on my task. I'm trying to communicate with a FPGA via the GPMC bus on my Overo FE board and need assistance with writing a simple device driver test application that uses the GPMC bus to read write a WORD size data and also a BLOCK of WORD data to the FPGA. The FPGA-OMAP3530 will be use synchronous read/write over the 16-bit datapath and CS 6. The GPMC bus is shared with an Ethernet chip and NAND chip as per Gumstix COM + TOBI/Chestnut design and these standard devices must still work as per norm. I've been searching via GMANE for similar questions but some are pointing to non-existence archives. I believe I have to develop a kernel device driver to register the FPGA and from which will expose a device node for the test application. or is there a generic GPMC driver that does it? Can someone share with me similar layout and code so that I can base my learning from a starting point? Many thanks in adv. Please take a look at the various arch/arm/mach-omap2/gpmc-*.c files. The biggest pain is to get the timings right. Also take a look at: https://github.com/balister/linux-omap-philip/commits/e100-2.6.38-2 Philip I've been reading the codes from your e100-2.6.38-2 repo as suggested by your earlier replies to me in Gumstix Mailing List. (^^,) In usrp1_e_init() inside board-overo.c, GPMC_CS_CONFIG7 for both CS4 and CS6 are both written with 0x00. I couldn't understand the background/why behind this line of code as the Use-case in the TRM writes the base address of the device to it. Do you have some timing diagram or documents that explains the data flow / interactions / protocol between the FPGA and Overo as reference to the codes? Many many thanks in adv. -- Regards, James -- To unsubscribe from this list: send the line unsubscribe linux-omap in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
Re: Simple GPMC device driver with basic User application
On 11/03/2011 03:25 PM, Tony Lindgren wrote: * James angweiy...@gmail.com [111023 18:13]: Dear all, I'm learning embedded linux development and need help on my task. I'm trying to communicate with a FPGA via the GPMC bus on my Overo FE board and need assistance with writing a simple device driver test application that uses the GPMC bus to read write a WORD size data and also a BLOCK of WORD data to the FPGA. The FPGA-OMAP3530 will be use synchronous read/write over the 16-bit datapath and CS 6. The GPMC bus is shared with an Ethernet chip and NAND chip as per Gumstix COM + TOBI/Chestnut design and these standard devices must still work as per norm. I've been searching via GMANE for similar questions but some are pointing to non-existence archives. I believe I have to develop a kernel device driver to register the FPGA and from which will expose a device node for the test application. or is there a generic GPMC driver that does it? Can someone share with me similar layout and code so that I can base my learning from a starting point? Many thanks in adv. Please take a look at the various arch/arm/mach-omap2/gpmc-*.c files. The biggest pain is to get the timings right. Also take a look at: https://github.com/balister/linux-omap-philip/commits/e100-2.6.38-2 Philip -- To unsubscribe from this list: send the line unsubscribe linux-omap in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
Re: Simple GPMC device driver with basic User application
* James angweiy...@gmail.com [111023 18:13]: Dear all, I'm learning embedded linux development and need help on my task. I'm trying to communicate with a FPGA via the GPMC bus on my Overo FE board and need assistance with writing a simple device driver test application that uses the GPMC bus to read write a WORD size data and also a BLOCK of WORD data to the FPGA. The FPGA-OMAP3530 will be use synchronous read/write over the 16-bit datapath and CS 6. The GPMC bus is shared with an Ethernet chip and NAND chip as per Gumstix COM + TOBI/Chestnut design and these standard devices must still work as per norm. I've been searching via GMANE for similar questions but some are pointing to non-existence archives. I believe I have to develop a kernel device driver to register the FPGA and from which will expose a device node for the test application. or is there a generic GPMC driver that does it? Can someone share with me similar layout and code so that I can base my learning from a starting point? Many thanks in adv. Please take a look at the various arch/arm/mach-omap2/gpmc-*.c files. The biggest pain is to get the timings right. Tony -- To unsubscribe from this list: send the line unsubscribe linux-omap in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
