Re: [PATCH 0/4] ARM: dts: r7s72100: add soc node

[Simon Horman]

On Mon, Feb 12, 2018 at 04:12:02PM +0100, Geert Uytterhoeven wrote:
> Hi Simon,
> 
> On Mon, Feb 12, 2018 at 3:39 PM, Simon Horman
>  wrote:
> > this patchset adds an soc node, moves all nodes for IP blocks with an
> > address on the bus to be sub nodes of the soc node, removes the clock node
> > and sorts subnodes of the root and soc nodes.
> >
> > This brings the DTS of the r7s72100 in line with that of R-Car Gen 2 SoCs.
> >
> > Simon Horman (4):
> >   ARM: dts: r7s72100: add soc node
> >   ARM: dts: r7s72100: sort subnodes of soc node
> >   ARM: dts: r7s72100: stop grouping clocks under a "clocks" subnode
> >   ARM: dts: r7s72100: sort subnodes of root node
> 
> Thanks!
> 
> >  arch/arm/boot/dts/r7s72100.dtsi | 1038 
> > ---
> >  1 file changed, 521 insertions(+), 517 deletions(-)
> 
> For the whole series, with a bit of help from dtx_diff:
> Reviewed-by: Geert Uytterhoeven 

Thanks, applied.

Re: [PATCH v2 5/5] drm: adv7511: Add support for i2c_new_secondary_device

[Dan Carpenter]

On Mon, Feb 12, 2018 at 06:11:57PM +, Kieran Bingham wrote:
> + adv7511->i2c_packet = i2c_new_secondary_device(i2c, "packet",
> + ADV7511_PACKET_I2C_ADDR_DEFAULT);
> + if (!adv7511->i2c_packet) {
> + ret = -EINVAL;
> + goto err_unregister_cec;
> + }
> +
> + regmap_write(adv7511->regmap, ADV7511_REG_PACKET_I2C_ADDR,
> +  adv7511->i2c_packet->addr << 1);
> +
>   INIT_WORK(>hpd_work, adv7511_hpd_work);
>  
>   if (i2c->irq) {
> @@ -1181,7 +1190,7 @@ static int adv7511_probe(struct i2c_client *i2c, const 
> struct i2c_device_id *id)
>   IRQF_ONESHOT, dev_name(dev),
>   adv7511);
>   if (ret)
> - goto err_unregister_cec;
> + goto err_unregister_packet;
>   }
>  
>   adv7511_power_off(adv7511);

There is another goto which needs to be updated if adv7511_cec_init()
fails.

> @@ -1203,6 +1212,8 @@ static int adv7511_probe(struct i2c_client *i2c, const 
> struct i2c_device_id *id)
>   adv7511_audio_init(dev, adv7511);
>   return 0;
>  
> +err_unregister_packet:
> + i2c_unregister_device(adv7511->i2c_packet);
>  err_unregister_cec:
>   i2c_unregister_device(adv7511->i2c_cec);
>   if (adv7511->cec_clk)


regards,
dan carpenter

[PATCH v13 2/2] rcar-csi2: add Renesas R-Car MIPI CSI-2 receiver driver

[Niklas Söderlund]

A V4L2 driver for Renesas R-Car MIPI CSI-2 receiver. The driver
supports the R-Car Gen3 SoCs where separate CSI-2 hardware blocks are
connected between the video sources and the video grabbers (VIN).

Driver is based on a prototype by Koji Matsuoka in the Renesas BSP.

Signed-off-by: Niklas Söderlund 
Reviewed-by: Hans Verkuil 
---
 drivers/media/platform/rcar-vin/Kconfig |  12 +
 drivers/media/platform/rcar-vin/Makefile|   1 +
 drivers/media/platform/rcar-vin/rcar-csi2.c | 884 
 3 files changed, 897 insertions(+)
 create mode 100644 drivers/media/platform/rcar-vin/rcar-csi2.c

diff --git a/drivers/media/platform/rcar-vin/Kconfig 
b/drivers/media/platform/rcar-vin/Kconfig
index af4c98b44d2e22cb..6875f30c1ae42631 100644
--- a/drivers/media/platform/rcar-vin/Kconfig
+++ b/drivers/media/platform/rcar-vin/Kconfig
@@ -1,3 +1,15 @@
+config VIDEO_RCAR_CSI2
+   tristate "R-Car MIPI CSI-2 Receiver"
+   depends on VIDEO_V4L2 && VIDEO_V4L2_SUBDEV_API && OF
+   depends on ARCH_RENESAS || COMPILE_TEST
+   select V4L2_FWNODE
+   ---help---
+ Support for Renesas R-Car MIPI CSI-2 receiver.
+ Supports R-Car Gen3 SoCs.
+
+ To compile this driver as a module, choose M here: the
+ module will be called rcar-csi2.
+
 config VIDEO_RCAR_VIN
tristate "R-Car Video Input (VIN) Driver"
depends on VIDEO_V4L2 && VIDEO_V4L2_SUBDEV_API && OF && HAS_DMA && 
MEDIA_CONTROLLER
diff --git a/drivers/media/platform/rcar-vin/Makefile 
b/drivers/media/platform/rcar-vin/Makefile
index 48c5632c21dc060b..5ab803d3e7c1aa57 100644
--- a/drivers/media/platform/rcar-vin/Makefile
+++ b/drivers/media/platform/rcar-vin/Makefile
@@ -1,3 +1,4 @@
 rcar-vin-objs = rcar-core.o rcar-dma.o rcar-v4l2.o
 
+obj-$(CONFIG_VIDEO_RCAR_CSI2) += rcar-csi2.o
 obj-$(CONFIG_VIDEO_RCAR_VIN) += rcar-vin.o
diff --git a/drivers/media/platform/rcar-vin/rcar-csi2.c 
b/drivers/media/platform/rcar-vin/rcar-csi2.c
new file mode 100644
index ..c0c2a763151bc928
--- /dev/null
+++ b/drivers/media/platform/rcar-vin/rcar-csi2.c
@@ -0,0 +1,884 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * Driver for Renesas R-Car MIPI CSI-2 Receiver
+ *
+ * Copyright (C) 2018 Renesas Electronics Corp.
+ */
+
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+
+#include 
+#include 
+#include 
+#include 
+#include 
+
+/* Register offsets and bits */
+
+/* Control Timing Select */
+#define TREF_REG   0x00
+#define TREF_TREF  BIT(0)
+
+/* Software Reset */
+#define SRST_REG   0x04
+#define SRST_SRST  BIT(0)
+
+/* PHY Operation Control */
+#define PHYCNT_REG 0x08
+#define PHYCNT_SHUTDOWNZ   BIT(17)
+#define PHYCNT_RSTZBIT(16)
+#define PHYCNT_ENABLECLK   BIT(4)
+#define PHYCNT_ENABLE_3BIT(3)
+#define PHYCNT_ENABLE_2BIT(2)
+#define PHYCNT_ENABLE_1BIT(1)
+#define PHYCNT_ENABLE_0BIT(0)
+
+/* Checksum Control */
+#define CHKSUM_REG 0x0c
+#define CHKSUM_ECC_EN  BIT(1)
+#define CHKSUM_CRC_EN  BIT(0)
+
+/*
+ * Channel Data Type Select
+ * VCDT[0-15]:  Channel 1 VCDT[16-31]:  Channel 2
+ * VCDT2[0-15]: Channel 3 VCDT2[16-31]: Channel 4
+ */
+#define VCDT_REG   0x10
+#define VCDT2_REG  0x14
+#define VCDT_VCDTN_EN  BIT(15)
+#define VCDT_SEL_VC(n) (((n) & 0x3) << 8)
+#define VCDT_SEL_DTN_ONBIT(6)
+#define VCDT_SEL_DT(n) (((n) & 0x3f) << 0)
+
+/* Frame Data Type Select */
+#define FRDT_REG   0x18
+
+/* Field Detection Control */
+#define FLD_REG0x1c
+#define FLD_FLD_NUM(n) (((n) & 0xff) << 16)
+#define FLD_FLD_EN4BIT(3)
+#define FLD_FLD_EN3BIT(2)
+#define FLD_FLD_EN2BIT(1)
+#define FLD_FLD_EN BIT(0)
+
+/* Automatic Standby Control */
+#define ASTBY_REG  0x20
+
+/* Long Data Type Setting 0 */
+#define LNGDT0_REG 0x28
+
+/* Long Data Type Setting 1 */
+#define LNGDT1_REG 0x2c
+
+/* Interrupt Enable */
+#define INTEN_REG  0x30
+
+/* Interrupt Source Mask */
+#define INTCLOSE_REG   0x34
+
+/* Interrupt Status Monitor */
+#define INTSTATE_REG   0x38
+#define INTSTATE_INT_ULPS_STARTBIT(7)
+#define INTSTATE_INT_ULPS_END  BIT(6)
+
+/* Interrupt Error Status Monitor */
+#define INTERRSTATE_REG0x3c
+
+/* Short Packet Data */
+#define SHPDAT_REG 0x40
+
+/* Short Packet Count 

[PATCH v13 0/2] rcar-csi2: add Renesas R-Car MIPI CSI-2

[Niklas Söderlund]

Hi,

This is the latest incarnation of R-Car MIPI CSI-2 receiver driver. It's
based on top of the media-tree and are tested on Renesas Salvator-X
together with adv7482 and the out-of-tree patches for rcar-vin and to 
add support for Gen3 VIN.

I hope this is the last incarnation of this patch-set, I do think it is
ready for upstream consumption :-)

* Changes since v12
- Fixed spelling mistakes in commit messages and documentation patch, 
  thanks Laurent.
- Mark endpoints in port 1 as optional as it is allowed to not connect a 
  VIN to the CSI-2 and instead have it only use its parallel input 
  source (for those VIN that have one).
- Added Ack from Sakari, thanks!
- Media bus codes are u32 not unsigned int.
- Ignore error check for v4l2_subdev_call(sd, video, s_stream, 0)
- Do not set subdev host data as it's not used, 
  v4l2_set_subdev_hostdata().
- Fixed spelling errors in commit message.
- Add SPDX header
- Rename badly named variable tmp to vcdt_part.
- Cache subdevice in bound callback instead of looking it up in the 
  media graph. By doing this rcar_csi2_sd_info() can be removed.
- Print unsigned using %u not %d.
- Call pm_runtime_enable() before calling v4l2_async_register_subdev().
- Dropped of_match_ptr() as OF is required.

* Changes since v11
- Added missing call to v4l2_async_notifier_unregister().
- Fixed missing reg popery in bindings documentation.
- Add Rob's ack to 01/02.
- Dropped 'media:' prefix from patch subjects as it seems they are added
  first when a patch is picked up by the maintainer.
- Fixed typo in comment enpoint -> endpoint, thanks Hans.
- Added Hans Reviewed-by to driver.

* Changes since v10
- Renamed Documentation/devicetree/bindings/media/rcar-csi2.txt to
  Documentation/devicetree/bindings/media/renesas,rcar-csi2.txt
- Add extra newline in rcar_csi2_code_to_fmt()
- Use locally stored format information instead of reading it from the
  remote subdevice, Sakari pointed out that the pipeline is validated
  before .s_stream() is called so this is safe.
- Do not check return from media_entity_to_v4l2_subdev() in
  rcar_csi2_start(), Sakari pointed out it can't fail. Also move logic
  to find the remote subdevice is moved to the only user of it,
  rcar_csi2_calc_phypll().
- Move pm_runtime_get_sync() and pm_runtime_put() to
  rcar_csi2_s_stream() and remove rcar_csi2_s_power().
- Add validation of pixel code to rcar_csi2_set_pad_format().
- Remove static rcar_csi2_notify_unbind() as it only printed a debug
  message.

* Changes since v9
- Add reset property to device tree example
- Use BIT(x) instead of (1 << x)
- Use u16 in struct phypll_hsfreqrange to pack struct better.
- Use unsigned int type for loop variable in rcar_csi2_code_to_fmt
- Move fields inside struct struct rcar_csi2_info and struct rcar_csi2
  to pack struct's tighter.
- Use %u instead of %d when printing __u32.
- Don't check return of platform_get_resource(), let
  devm_ioremap_resource() handle it.
- Store quirk workaround for r8a7795 ES1.0 in the data field of struct
  soc_device_attribute.

Changes since v8:
- Updated bindings documentation, thanks Rob!
- Make use of the now in media-tree sub-notifier V4L2 API
- Add delay when resetting the IP to allow for a proper reset
- Fix bug in s_stream error path where the usage count was off if an
  error was hit.
- Add support for H3 ES2.0

Changes since v7:
- Rebase on top of the latest incremental async patches.
- Fix comments on DT documentation.
- Use v4l2_ctrl_g_ctrl_int64() instead of v4l2_g_ext_ctrls().
- Handle try formats in .set_fmt() and .get_fmt().
- Don't call v4l2_device_register_subdev_nodes() as this is not needed
  with the complete() callbacks synchronized.
- Fix line over 80 chars.
- Fix varies spelling mistakes.

Changes since v6:
- Rebased on top of Sakaris fwnode patches.
- Changed of RCAR_CSI2_PAD_MAX to NR_OF_RCAR_CSI2_PAD.
- Remove assumption about unknown media bus type, thanks Sakari for
  pointing this out.
- Created table for supported format information instead of scattering
  this information around the driver, thanks Sakari!
- Small newline fixes and reduce some indentation levels

Changes since v5:
- Make use of the incremental async subnotifer and helper to map DT
  endpoint to media pad number. This moves functionality which
  previously in the Gen3 patches for R-Car VIN driver to this R-Car
  CSI-2 driver. This is done in preparation to support the ADV7482
  driver in development by Kieran which will register more then one
  subdevice and the CSI-2 driver needs to cope wit this. Further more it
  prepares the driver for another use-case where more then one subdevice
  is present upstream for the CSI-2.
- Small cleanups.
- Add explicit include for linux/io.h, thanks Kieran.

Changes since v4:
- Match SoC part numbers and drop trailing space in documentation,
  thanks Geert for pointing this out.
- Clarify that the driver is a CSI-2 receiver by supervised
  s/interface/receiver/, thanks Laurent.
- Add entries in Kconfig and 

[PATCH v13 1/2] rcar-csi2: add Renesas R-Car MIPI CSI-2 receiver documentation

[Niklas Söderlund]

Documentation for Renesas R-Car MIPI CSI-2 receiver. The CSI-2 receivers
are located between the video sources (CSI-2 transmitters) and the video
grabbers (VIN) on Gen3 of Renesas R-Car SoC.

Each CSI-2 device is connected to more than one VIN device which
simultaneously can receive video from the same CSI-2 device. Each VIN
device can also be connected to more than one CSI-2 device. The routing
of which links are used is controlled by the VIN devices. There are only
a few possible routes which are set by hardware limitations, which are
different for each SoC in the Gen3 family.

Signed-off-by: Niklas Söderlund 
Acked-by: Rob Herring 
Acked-by: Sakari Ailus 
---
 .../bindings/media/renesas,rcar-csi2.txt   | 99 ++
 MAINTAINERS|  1 +
 2 files changed, 100 insertions(+)
 create mode 100644 
Documentation/devicetree/bindings/media/renesas,rcar-csi2.txt

diff --git a/Documentation/devicetree/bindings/media/renesas,rcar-csi2.txt 
b/Documentation/devicetree/bindings/media/renesas,rcar-csi2.txt
new file mode 100644
index ..6f71f997dc48eee9
--- /dev/null
+++ b/Documentation/devicetree/bindings/media/renesas,rcar-csi2.txt
@@ -0,0 +1,99 @@
+Renesas R-Car MIPI CSI-2
+
+
+The R-Car CSI-2 receiver device provides MIPI CSI-2 capabilities for the
+Renesas R-Car family of devices. It is used in conjunction with the
+R-Car VIN module, which provides the video capture capabilities.
+
+Mandatory properties
+
+ - compatible: Must be one or more of the following
+   - "renesas,r8a7795-csi2" for the R8A7795 device.
+   - "renesas,r8a7796-csi2" for the R8A7796 device.
+
+ - reg: the register base and size for the device registers
+ - interrupts: the interrupt for the device
+ - clocks: reference to the parent clock
+
+The device node shall contain two 'port' child nodes according to the
+bindings defined in Documentation/devicetree/bindings/media/
+video-interfaces.txt. Port 0 shall connect to the CSI-2 source. Port 1
+shall connect to all the R-Car VIN modules that have a hardware
+connection to the CSI-2 receiver.
+
+- Port 0 - Video source (mandatory)
+   - Endpoint 0 - sub-node describing the endpoint that is the video source
+
+- Port 1 - VIN instances (optional)
+   - One endpoint sub-node for every R-Car VIN instance which is connected
+ to the R-Car CSI-2 receiver.
+
+Example:
+
+   csi20: csi2@fea8 {
+   compatible = "renesas,r8a7796-csi2";
+   reg = <0 0xfea8 0 0x1>;
+   interrupts = <0 184 IRQ_TYPE_LEVEL_HIGH>;
+   clocks = < CPG_MOD 714>;
+   power-domains = < R8A7796_PD_ALWAYS_ON>;
+   resets = < 714>;
+
+   ports {
+   #address-cells = <1>;
+   #size-cells = <0>;
+
+   port@0 {
+   #address-cells = <1>;
+   #size-cells = <0>;
+
+   reg = <0>;
+
+   csi20_in: endpoint@0 {
+   reg = <0>;
+   clock-lanes = <0>;
+   data-lanes = <1>;
+   remote-endpoint = <_txb>;
+   };
+   };
+
+   port@1 {
+   #address-cells = <1>;
+   #size-cells = <0>;
+
+   reg = <1>;
+
+   csi20vin0: endpoint@0 {
+   reg = <0>;
+   remote-endpoint = <>;
+   };
+   csi20vin1: endpoint@1 {
+   reg = <1>;
+   remote-endpoint = <>;
+   };
+   csi20vin2: endpoint@2 {
+   reg = <2>;
+   remote-endpoint = <>;
+   };
+   csi20vin3: endpoint@3 {
+   reg = <3>;
+   remote-endpoint = <>;
+   };
+   csi20vin4: endpoint@4 {
+   reg = <4>;
+   remote-endpoint = <>;
+   };
+   csi20vin5: endpoint@5 {
+   reg = <5>;
+   remote-endpoint = <>;
+   };
+   csi20vin6: endpoint@6 {
+   

Re: Warning for possible circular locking dependecy on v4.16-rc1

[Niklas Söderlund]

Hi again,

On 2018-02-12 21:12:48 +0100, Niklas Söderlund wrote:
> Hi Geert,
> 
> When doing some testing on v4.16-rc1 I ran across this warning a couple 
> of times. I was using the renesas_config from the current master branch 
> of renesas-drivers at the time. It do not hit every time but in my 
> limited testing I would say ~50%.

I forgot to mention this was on H3 ES2.0.

> 
> 
> [2.634819] ==
> [2.640996] WARNING: possible circular locking dependency detected
> [2.647176] 4.16.0-rc1-arm64-renesas-1-g75fb1624ab1a0c5a #34 Not 
> tainted
> [2.654222] --
> [2.660400] swapper/0/1 is trying to acquire lock:
> [2.665188]  (prepare_lock){+.+.}, at: [<(ptrval)>] 
> clk_prepare_lock+0x48/0xa8
> [2.673123] 
> [2.673123] but task is already holding lock:
> [2.678953]  (of_clk_mutex){+.+.}, at: [<(ptrval)>] 
> __of_clk_get_from_provider.part.22+0x3c/0x120
> [2.688528] 
> [2.688528] which lock already depends on the new lock.
> [2.688528] 
> [2.696706] 
> [2.696706] the existing dependency chain (in reverse order) is:
> [2.704186] 
> [2.704186] -> #5 (of_clk_mutex){+.+.}:
> [2.709511]__mutex_lock+0x70/0x888
> [2.713606]mutex_lock_nested+0x1c/0x28
> [2.718049]__of_clk_get_from_provider.part.22+0x3c/0x120
> [2.724054]of_clk_get_from_provider+0x20/0x30
> [2.729105]cpg_mssr_attach_dev+0xfc/0x1e0
> [2.733809]genpd_add_device+0xbc/0x230
> [2.738251]genpd_dev_pm_attach+0xac/0x230
> [2.742954]dev_pm_domain_attach+0xc/0x18
> [2.747571]platform_drv_probe+0x38/0xb8
> [2.752100]driver_probe_device+0x23c/0x310
> [2.756890]__driver_attach+0xc4/0xc8
> [2.761157]bus_for_each_dev+0x74/0xc8
> [2.765511]driver_attach+0x20/0x28
> [2.769605]bus_add_driver+0x1b0/0x220
> [2.773960]driver_register+0x60/0xf8
> [2.778228]__platform_driver_register+0x40/0x48
> [2.783456]sh_mobile_i2c_adap_init+0x18/0x20
> [2.788423]do_one_initcall+0x9c/0x14c
> [2.792778]kernel_init_freeable+0x1dc/0x274
> [2.797654]kernel_init+0x10/0x100
> [2.801665]ret_from_fork+0x10/0x18
> [2.805757] 
> [2.805757] -> #4 (>mlock){+.+.}:
> [2.811162]__mutex_lock+0x70/0x888
> [2.815256]mutex_lock_nested+0x1c/0x28
> [2.819699]genpd_lock_mtx+0x14/0x20
> [2.823879]genpd_runtime_resume+0x70/0x230
> [2.828667]__rpm_callback+0xe0/0x268
> [2.832934]rpm_callback+0x20/0x80
> [2.836940]rpm_resume+0x344/0x608
> [2.840946]__pm_runtime_resume+0x50/0x78
> [2.845561]usb_dmac_alloc_chan_resources+0x8c/0xa0
> [2.851044]dma_chan_get+0x28/0x80
> [2.855051]find_candidate+0xf8/0x188
> [2.859319]__dma_request_channel+0x68/0xc8
> [2.864108]usb_dmac_of_xlate+0x64/0x98
> [2.868550]of_dma_request_slave_channel+0x170/0x270
> [2.874121]dma_request_chan+0x38/0x1d0
> [2.878568]usbhsf_dma_init.isra.8+0x60/0x108
> [2.883531]usbhs_fifo_probe+0x70/0x148
> [2.887972]usbhs_probe+0x2c8/0x5e0
> [2.892065]platform_drv_probe+0x58/0xb8
> [2.896594]driver_probe_device+0x23c/0x310
> [2.901382]__driver_attach+0xc4/0xc8
> [2.905649]bus_for_each_dev+0x74/0xc8
> [2.910004]driver_attach+0x20/0x28
> [2.914097]bus_add_driver+0x1b0/0x220
> [2.918452]driver_register+0x60/0xf8
> [2.922718]__platform_driver_register+0x40/0x48
> [2.927942]renesas_usbhs_driver_init+0x18/0x20
> [2.933078]do_one_initcall+0x9c/0x14c
> [2.937433]kernel_init_freeable+0x1dc/0x274
> [2.942309]kernel_init+0x10/0x100
> [2.946316]ret_from_fork+0x10/0x18
> [2.950407] 
> [2.950407] -> #3 (dma_list_mutex){+.+.}:
> [2.955900]__mutex_lock+0x70/0x888
> [2.959994]mutex_lock_nested+0x1c/0x28
> [2.964435]__dma_request_channel+0x38/0xc8
> [2.969225]usb_dmac_of_xlate+0x64/0x98
> [2.973666]of_dma_request_slave_channel+0x170/0x270
> [2.979236]dma_request_chan+0x38/0x1d0
> [2.983678]usbhsf_dma_init.isra.8+0x60/0x108
> [2.988640]usbhs_fifo_probe+0x70/0x148
> [2.993081]usbhs_probe+0x2c8/0x5e0
> [2.997174]platform_drv_probe+0x58/0xb8
> [3.001702]driver_probe_device+0x23c/0x310
> [3.006491]__driver_attach+0xc4/0xc8
> [3.010759]bus_for_each_dev+0x74/0xc8
> [3.015114]driver_attach+0x20/0x28
> [3.019208]bus_add_driver+0x1b0/0x220
> [3.023562]driver_register+0x60/0xf8
> [

[PATCH 1/4] arm64: dts: renesas: r8a77995: add FCPVB node

[Kieran Bingham]

From: Kieran Bingham 

The FCPVB handles the interface between the VSPB and memory.

Signed-off-by: Kieran Bingham 
---
 arch/arm64/boot/dts/renesas/r8a77995.dtsi | 9 +
 1 file changed, 9 insertions(+)

diff --git a/arch/arm64/boot/dts/renesas/r8a77995.dtsi 
b/arch/arm64/boot/dts/renesas/r8a77995.dtsi
index cd3c6a30fc47..6cf935d307d9 100644
--- a/arch/arm64/boot/dts/renesas/r8a77995.dtsi
+++ b/arch/arm64/boot/dts/renesas/r8a77995.dtsi
@@ -691,6 +691,15 @@
#phy-cells = <0>;
status = "disabled";
};
+
+   fcpvb0: fcp@fe96f000 {
+   compatible = "renesas,fcpv";
+   reg = <0 0xfe96f000 0 0x200>;
+   clocks = < CPG_MOD 607>;
+   power-domains = < R8A77995_PD_ALWAYS_ON>;
+   resets = < 607>;
+   iommus = <_vp0 5>;
+   };
};
 
timer {
-- 
2.7.4

[PATCH 4/4] arm64: dts: renesas: r8a77995: add VSPD instances

[Kieran Bingham]

From: Kieran Bingham 

The r8a77995 has two VSPDs to handle display pipelines with a DU.

Signed-off-by: Kieran Bingham 
---
 arch/arm64/boot/dts/renesas/r8a77995.dtsi | 20 
 1 file changed, 20 insertions(+)

diff --git a/arch/arm64/boot/dts/renesas/r8a77995.dtsi 
b/arch/arm64/boot/dts/renesas/r8a77995.dtsi
index 50c891f6649f..2c14a8dfd201 100644
--- a/arch/arm64/boot/dts/renesas/r8a77995.dtsi
+++ b/arch/arm64/boot/dts/renesas/r8a77995.dtsi
@@ -711,6 +711,16 @@
iommus = <_vp0 5>;
};
 
+   vspd0: vsp@fea2 {
+   compatible = "renesas,vsp2";
+   reg = <0 0xfea2 0 0x4000>;
+   interrupts = ;
+   clocks = < CPG_MOD 623>;
+   power-domains = < R8A77995_PD_ALWAYS_ON>;
+   resets = < 623>;
+   renesas,fcp = <>;
+   };
+
fcpvd0: fcp@fea27000 {
compatible = "renesas,fcpv";
reg = <0 0xfea27000 0 0x200>;
@@ -720,6 +730,16 @@
iommus = <_vi0 8>;
};
 
+   vspd1: vsp@fea8 {
+   compatible = "renesas,vsp2";
+   reg = <0 0xfea28000 0 0x4000>;
+   interrupts = ;
+   clocks = < CPG_MOD 622>;
+   power-domains = < R8A77995_PD_ALWAYS_ON>;
+   resets = < 622>;
+   renesas,fcp = <>;
+   };
+
fcpvd1: fcp@fea2f000 {
compatible = "renesas,fcpv";
reg = <0 0xfea2f000 0 0x200>;
-- 
2.7.4

[PATCH 3/4] arm64: dts: renesas: r8a77995: add VSPBS instance

[Kieran Bingham]

From: Kieran Bingham 

The r8a77995 has a VSPBS to support image processing such as blending of
2 input images.

Signed-off-by: Kieran Bingham 
---
 arch/arm64/boot/dts/renesas/r8a77995.dtsi | 10 ++
 1 file changed, 10 insertions(+)

diff --git a/arch/arm64/boot/dts/renesas/r8a77995.dtsi 
b/arch/arm64/boot/dts/renesas/r8a77995.dtsi
index 196a917afea6..50c891f6649f 100644
--- a/arch/arm64/boot/dts/renesas/r8a77995.dtsi
+++ b/arch/arm64/boot/dts/renesas/r8a77995.dtsi
@@ -692,6 +692,16 @@
status = "disabled";
};
 
+   vspbs: vsp@fe96 {
+   compatible = "renesas,vsp2";
+   reg = <0 0xfe96 0 0x4000>;
+   interrupts = ;
+   clocks = < CPG_MOD 627>;
+   power-domains = < R8A77995_PD_ALWAYS_ON>;
+   resets = < 627>;
+   renesas,fcp = <>;
+   };
+
fcpvb0: fcp@fe96f000 {
compatible = "renesas,fcpv";
reg = <0 0xfe96f000 0 0x200>;
-- 
2.7.4

[PATCH 2/4] arm64: dts: renesas: r8a77995: add FCPVD nodes

[Kieran Bingham]

From: Kieran Bingham 

The FCPVD handles the interface between the VSPD and memory.

Signed-off-by: Kieran Bingham 
---
 arch/arm64/boot/dts/renesas/r8a77995.dtsi | 18 ++
 1 file changed, 18 insertions(+)

diff --git a/arch/arm64/boot/dts/renesas/r8a77995.dtsi 
b/arch/arm64/boot/dts/renesas/r8a77995.dtsi
index 6cf935d307d9..196a917afea6 100644
--- a/arch/arm64/boot/dts/renesas/r8a77995.dtsi
+++ b/arch/arm64/boot/dts/renesas/r8a77995.dtsi
@@ -700,6 +700,24 @@
resets = < 607>;
iommus = <_vp0 5>;
};
+
+   fcpvd0: fcp@fea27000 {
+   compatible = "renesas,fcpv";
+   reg = <0 0xfea27000 0 0x200>;
+   clocks = < CPG_MOD 603>;
+   power-domains = < R8A77995_PD_ALWAYS_ON>;
+   resets = < 603>;
+   iommus = <_vi0 8>;
+   };
+
+   fcpvd1: fcp@fea2f000 {
+   compatible = "renesas,fcpv";
+   reg = <0 0xfea2f000 0 0x200>;
+   clocks = < CPG_MOD 602>;
+   power-domains = < R8A77995_PD_ALWAYS_ON>;
+   resets = < 602>;
+   iommus = <_vi0 9>;
+   };
};
 
timer {
-- 
2.7.4

[PATCH 0/4] arm64: dts: renesas: r8a77995: Add VSP support

[Kieran Bingham]

From: Kieran Bingham 

The r8a77995-d3 platform supports 3 VSP instances. One VSPBS can be used
as a dual-input image blender, while two VSPD instances can be utilised as
part of a display (DU) pipeline.

Kieran Bingham (4):
  arm64: dts: renesas: r8a77995: add FCPVB node
  arm64: dts: renesas: r8a77995: add FCPVD nodes
  arm64: dts: renesas: r8a77995: add VSPBS instance
  arm64: dts: renesas: r8a77995: add VSPD instances

 arch/arm64/boot/dts/renesas/r8a77995.dtsi | 57 +++
 1 file changed, 57 insertions(+)

-- 
2.7.4

[PATCH v3 1/5] dt-bindings: media: adv7604: Add support for i2c_new_secondary_device

[Kieran Bingham]

From: Jean-Michel Hautbois 

The ADV7604 has thirteen 256-byte maps that can be accessed via the main
I²C ports. Each map has it own I²C address and acts as a standard slave
device on the I²C bus.

Extend the device tree node bindings to be able to override the default
addresses so that address conflicts with other devices on the same bus
may be resolved at the board description level.

Signed-off-by: Jean-Michel Hautbois 
[Kieran: Re-adapted for mainline]
Signed-off-by: Kieran Bingham 
Reviewed-by: Rob Herring 

---
Based upon the original posting :
  https://lkml.org/lkml/2014/10/22/469

v2:
 - DT Binding update separated from code change
 - Minor reword to commit message to account for DT only change.
 - Collected Rob's RB tag.

v3:
 - Split map register addresses into individual declarations.

 .../devicetree/bindings/media/i2c/adv7604.txt  | 18 --
 1 file changed, 16 insertions(+), 2 deletions(-)

diff --git a/Documentation/devicetree/bindings/media/i2c/adv7604.txt 
b/Documentation/devicetree/bindings/media/i2c/adv7604.txt
index 9cbd92eb5d05..ebb5f070c05b 100644
--- a/Documentation/devicetree/bindings/media/i2c/adv7604.txt
+++ b/Documentation/devicetree/bindings/media/i2c/adv7604.txt
@@ -13,7 +13,11 @@ Required Properties:
 - "adi,adv7611" for the ADV7611
 - "adi,adv7612" for the ADV7612
 
-  - reg: I2C slave address
+  - reg: I2C slave addresses
+The ADV76xx has up to thirteen 256-byte maps that can be accessed via the
+main I²C ports. Each map has it own I²C address and acts as a standard
+slave device on the I²C bus. The main address is mandatory, others are
+optional and revert to defaults if not specified.
 
   - hpd-gpios: References to the GPIOs that control the HDMI hot-plug
 detection pins, one per HDMI input. The active flag indicates the GPIO
@@ -35,6 +39,11 @@ Optional Properties:
 
   - reset-gpios: Reference to the GPIO connected to the device's reset pin.
   - default-input: Select which input is selected after reset.
+  - reg-names : Names of maps with programmable addresses.
+   It can contain any map needing a non-default address.
+   Possible maps names are :
+ "main", "avlink", "cec", "infoframe", "esdp", "dpp", "afe",
+ "rep", "edid", "hdmi", "test", "cp", "vdp"
 
 Optional Endpoint Properties:
 
@@ -52,7 +61,12 @@ Example:
 
hdmi_receiver@4c {
compatible = "adi,adv7611";
-   reg = <0x4c>;
+   /*
+* The edid page will be accessible @ 0x66 on the i2c bus. All
+* other maps will retain their default addresses.
+*/
+   reg = <0x4c>, <0x66>;
+   reg-names "main", "edid";
 
reset-gpios = < 0 GPIO_ACTIVE_LOW>;
hpd-gpios = < 2 GPIO_ACTIVE_HIGH>;
-- 
2.7.4

[PATCH v3 0/5] Add support for i2c_new_secondary_device

[Kieran Bingham]

From: Kieran Bingham 

Back in 2014, Jean-Michel provided patches [0] to implement a means of
describing software defined I2C addresses for devices through the DT nodes.

The patch to implement the function "i2c_new_secondary_device()" was integrated,
but the corresponding driver update didn't get applied.

This short series re-bases Jean-Michel's patch to mainline for the ADV7604 
driver
in linux-media, and also provides a patch for the ADV7511 DRM Bridge driver 
taking
the same approach.

This series allows us to define the I2C address allocations of these devices in
the device tree for the Renesas D3 platform where these two devices reside on
the same bus and conflict with each other presently..

[0] https://lkml.org/lkml/2014/10/22/468
[1] https://lkml.org/lkml/2014/10/22/469

v2:
 - dt bindings split from driver changes
 - fixed up dt binding property descriptions
 - Update missing edid-i2c address setting (adv7511)
 - Provide update for r8a7792 DTB to account for address conflict

v3:
 - Split map register addresses into individual declarations across all uses


Jean-Michel Hautbois (2):
  dt-bindings: media: adv7604: Add support for i2c_new_secondary_device
  media: adv7604: Add support for i2c_new_secondary_device

Kieran Bingham (3):
  dt-bindings: adv7511: Add support for i2c_new_secondary_device
  [RFT] ARM: dts: wheat: Fix ADV7513 address usage
  drm: adv7511: Add support for i2c_new_secondary_device

 .../bindings/display/bridge/adi,adv7511.txt| 18 ++-
 .../devicetree/bindings/media/i2c/adv7604.txt  | 18 ++-
 arch/arm/boot/dts/r8a7792-wheat.dts| 12 -
 drivers/gpu/drm/bridge/adv7511/adv7511.h   |  6 +++
 drivers/gpu/drm/bridge/adv7511/adv7511_drv.c   | 42 +--
 drivers/media/i2c/adv7604.c| 62 ++
 6 files changed, 115 insertions(+), 43 deletions(-)

-- 
2.7.4

[PATCH v3 4/5] media: adv7604: Add support for i2c_new_secondary_device

[Kieran Bingham]

From: Jean-Michel Hautbois 

The ADV7604 has thirteen 256-byte maps that can be accessed via the main
I²C ports. Each map has it own I²C address and acts as a standard slave
device on the I²C bus.

Allow a device tree node to override the default addresses so that
address conflicts with other devices on the same bus may be resolved at
the board description level.

Signed-off-by: Jean-Michel Hautbois 
[Kieran: Re-adapted for mainline]
Signed-off-by: Kieran Bingham 
---
Based upon the original posting :
  https://lkml.org/lkml/2014/10/22/469

v2:
 - Split out DT bindings from driver updates
 - Return -EINVAL on error paths from adv76xx_dummy_client()

 drivers/media/i2c/adv7604.c | 62 +
 1 file changed, 40 insertions(+), 22 deletions(-)

diff --git a/drivers/media/i2c/adv7604.c b/drivers/media/i2c/adv7604.c
index 1544920ec52d..872e124793f8 100644
--- a/drivers/media/i2c/adv7604.c
+++ b/drivers/media/i2c/adv7604.c
@@ -2734,6 +2734,27 @@ static const struct v4l2_ctrl_config 
adv76xx_ctrl_free_run_color = {
 
 /* --- */
 
+struct adv76xx_register {
+   const char *name;
+   u8 default_addr;
+};
+
+static const struct adv76xx_register adv76xx_secondary_names[] = {
+   [ADV76XX_PAGE_IO] = { "main", 0x4c },
+   [ADV7604_PAGE_AVLINK] = { "avlink", 0x42 },
+   [ADV76XX_PAGE_CEC] = { "cec", 0x40 },
+   [ADV76XX_PAGE_INFOFRAME] = { "infoframe", 0x3e },
+   [ADV7604_PAGE_ESDP] = { "esdp", 0x38 },
+   [ADV7604_PAGE_DPP] = { "dpp", 0x3c },
+   [ADV76XX_PAGE_AFE] = { "afe", 0x26 },
+   [ADV76XX_PAGE_REP] = { "rep", 0x32 },
+   [ADV76XX_PAGE_EDID] = { "edid", 0x36 },
+   [ADV76XX_PAGE_HDMI] = { "hdmi", 0x34 },
+   [ADV76XX_PAGE_TEST] = { "test", 0x30 },
+   [ADV76XX_PAGE_CP] = { "cp", 0x22 },
+   [ADV7604_PAGE_VDP] = { "vdp", 0x24 },
+};
+
 static int adv76xx_core_init(struct v4l2_subdev *sd)
 {
struct adv76xx_state *state = to_state(sd);
@@ -2834,13 +2855,26 @@ static void adv76xx_unregister_clients(struct 
adv76xx_state *state)
 }
 
 static struct i2c_client *adv76xx_dummy_client(struct v4l2_subdev *sd,
-   u8 addr, u8 io_reg)
+  unsigned int i)
 {
struct i2c_client *client = v4l2_get_subdevdata(sd);
+   struct adv76xx_state *state = to_state(sd);
+   struct adv76xx_platform_data *pdata = >pdata;
+   unsigned int io_reg = 0xf2 + i;
+   struct i2c_client *new_client;
+
+   if (pdata && pdata->i2c_addresses[i])
+   new_client = i2c_new_dummy(client->adapter,
+  pdata->i2c_addresses[i]);
+   else
+   new_client = i2c_new_secondary_device(client,
+   adv76xx_secondary_names[i].name,
+   adv76xx_secondary_names[i].default_addr);
 
-   if (addr)
-   io_write(sd, io_reg, addr << 1);
-   return i2c_new_dummy(client->adapter, io_read(sd, io_reg) >> 1);
+   if (new_client)
+   io_write(sd, io_reg, new_client->addr << 1);
+
+   return new_client;
 }
 
 static const struct adv76xx_reg_seq adv7604_recommended_settings_afe[] = {
@@ -3115,20 +3149,6 @@ static int adv76xx_parse_dt(struct adv76xx_state *state)
/* Disable the interrupt for now as no DT-based board uses it. */
state->pdata.int1_config = ADV76XX_INT1_CONFIG_DISABLED;
 
-   /* Use the default I2C addresses. */
-   state->pdata.i2c_addresses[ADV7604_PAGE_AVLINK] = 0x42;
-   state->pdata.i2c_addresses[ADV76XX_PAGE_CEC] = 0x40;
-   state->pdata.i2c_addresses[ADV76XX_PAGE_INFOFRAME] = 0x3e;
-   state->pdata.i2c_addresses[ADV7604_PAGE_ESDP] = 0x38;
-   state->pdata.i2c_addresses[ADV7604_PAGE_DPP] = 0x3c;
-   state->pdata.i2c_addresses[ADV76XX_PAGE_AFE] = 0x26;
-   state->pdata.i2c_addresses[ADV76XX_PAGE_REP] = 0x32;
-   state->pdata.i2c_addresses[ADV76XX_PAGE_EDID] = 0x36;
-   state->pdata.i2c_addresses[ADV76XX_PAGE_HDMI] = 0x34;
-   state->pdata.i2c_addresses[ADV76XX_PAGE_TEST] = 0x30;
-   state->pdata.i2c_addresses[ADV76XX_PAGE_CP] = 0x22;
-   state->pdata.i2c_addresses[ADV7604_PAGE_VDP] = 0x24;
-
/* Hardcode the remaining platform data fields. */
state->pdata.disable_pwrdnb = 0;
state->pdata.disable_cable_det_rst = 0;
@@ -3478,11 +3498,9 @@ static int adv76xx_probe(struct i2c_client *client,
if (!(BIT(i) & state->info->page_mask))
continue;
 
-   state->i2c_clients[i] =
-   adv76xx_dummy_client(sd, state->pdata.i2c_addresses[i],
-0xf2 + i);
+   state->i2c_clients[i] = adv76xx_dummy_client(sd, 

[PATCH v3 3/5] [RFT] ARM: dts: wheat: Fix ADV7513 address usage

[Kieran Bingham]

From: Kieran Bingham 

The r8a7792 Wheat board has two ADV7513 devices sharing a single i2c
bus, however in low power mode the ADV7513 will reset it's slave maps to
use the hardware defined default addresses.

The ADV7511 driver was adapted to allow the two devices to be registered
correctly - but it did not take into account the fault whereby the
devices reset the addresses.

This results in an address conflict between the device using the default
addresses, and the other device if it is in low-power-mode.

Repair this issue by moving both devices away from the default address
definitions.

Signed-off-by: Kieran Bingham 

---
v2:
 - Addition to series

v3:
 - Split map register addresses into individual declarations.

 arch/arm/boot/dts/r8a7792-wheat.dts | 12 ++--
 1 file changed, 10 insertions(+), 2 deletions(-)

diff --git a/arch/arm/boot/dts/r8a7792-wheat.dts 
b/arch/arm/boot/dts/r8a7792-wheat.dts
index b9471b67b728..42fff8837eab 100644
--- a/arch/arm/boot/dts/r8a7792-wheat.dts
+++ b/arch/arm/boot/dts/r8a7792-wheat.dts
@@ -240,9 +240,16 @@
status = "okay";
clock-frequency = <40>;
 
+   /*
+* The adv75xx resets its addresses to defaults during low power power
+* mode. Because we have two ADV7513 devices on the same bus, we must
+* change both of them away from the defaults so that they do not
+* conflict.
+*/
hdmi@3d {
compatible = "adi,adv7513";
-   reg = <0x3d>;
+   reg = <0x3d>, <0x2d>, <0x4d>, <0x5d>;
+   reg-names = "main", "cec", "edid", "packet";
 
adi,input-depth = <8>;
adi,input-colorspace = "rgb";
@@ -272,7 +279,8 @@
 
hdmi@39 {
compatible = "adi,adv7513";
-   reg = <0x39>;
+   reg = <0x39>, <0x29>, <0x49>, <0x59>;
+   reg-names = "main", "cec", "edid", "packet";
 
adi,input-depth = <8>;
adi,input-colorspace = "rgb";
-- 
2.7.4

[PATCH v3 5/5] drm: adv7511: Add support for i2c_new_secondary_device

[Kieran Bingham]

From: Kieran Bingham 

The ADV7511 has four 256-byte maps that can be accessed via the main I²C
ports. Each map has it own I²C address and acts as a standard slave
device on the I²C bus.

Allow a device tree node to override the default addresses so that
address conflicts with other devices on the same bus may be resolved at
the board description level.

Signed-off-by: Kieran Bingham 
---
v2:
 - Update missing edid-i2c address setting
 - Split out DT bindings
 - Rename and move the I2C default addresses to their own section

 drivers/gpu/drm/bridge/adv7511/adv7511.h |  6 
 drivers/gpu/drm/bridge/adv7511/adv7511_drv.c | 42 ++--
 2 files changed, 33 insertions(+), 15 deletions(-)

diff --git a/drivers/gpu/drm/bridge/adv7511/adv7511.h 
b/drivers/gpu/drm/bridge/adv7511/adv7511.h
index d034b2cb5eee..04e6759ee45b 100644
--- a/drivers/gpu/drm/bridge/adv7511/adv7511.h
+++ b/drivers/gpu/drm/bridge/adv7511/adv7511.h
@@ -93,6 +93,11 @@
 #define ADV7511_REG_CHIP_ID_HIGH   0xf5
 #define ADV7511_REG_CHIP_ID_LOW0xf6
 
+/* Hardware defined default addresses for i2c register maps */
+#define ADV7511_CEC_I2C_ADDR_DEFAULT   0x3c
+#define ADV7511_EDID_I2C_ADDR_DEFAULT  0x3f
+#define ADV7511_PACKET_I2C_ADDR_DEFAULT0x38
+
 #define ADV7511_CSC_ENABLE BIT(7)
 #define ADV7511_CSC_UPDATE_MODEBIT(5)
 
@@ -322,6 +327,7 @@ struct adv7511 {
struct i2c_client *i2c_main;
struct i2c_client *i2c_edid;
struct i2c_client *i2c_cec;
+   struct i2c_client *i2c_packet;
 
struct regmap *regmap;
struct regmap *regmap_cec;
diff --git a/drivers/gpu/drm/bridge/adv7511/adv7511_drv.c 
b/drivers/gpu/drm/bridge/adv7511/adv7511_drv.c
index efa29db5fc2b..5e61b928c9c0 100644
--- a/drivers/gpu/drm/bridge/adv7511/adv7511_drv.c
+++ b/drivers/gpu/drm/bridge/adv7511/adv7511_drv.c
@@ -586,7 +586,7 @@ static int adv7511_get_modes(struct adv7511 *adv7511,
/* Reading the EDID only works if the device is powered */
if (!adv7511->powered) {
unsigned int edid_i2c_addr =
-   (adv7511->i2c_main->addr << 1) + 4;
+   (adv7511->i2c_edid->addr << 1);
 
__adv7511_power_on(adv7511);
 
@@ -969,10 +969,10 @@ static int adv7511_init_cec_regmap(struct adv7511 *adv)
 {
int ret;
 
-   adv->i2c_cec = i2c_new_dummy(adv->i2c_main->adapter,
-adv->i2c_main->addr - 1);
+   adv->i2c_cec = i2c_new_secondary_device(adv->i2c_main, "cec",
+   ADV7511_CEC_I2C_ADDR_DEFAULT);
if (!adv->i2c_cec)
-   return -ENOMEM;
+   return -EINVAL;
i2c_set_clientdata(adv->i2c_cec, adv);
 
adv->regmap_cec = devm_regmap_init_i2c(adv->i2c_cec,
@@ -1082,8 +1082,6 @@ static int adv7511_probe(struct i2c_client *i2c, const 
struct i2c_device_id *id)
struct adv7511_link_config link_config;
struct adv7511 *adv7511;
struct device *dev = >dev;
-   unsigned int main_i2c_addr = i2c->addr << 1;
-   unsigned int edid_i2c_addr = main_i2c_addr + 4;
unsigned int val;
int ret;
 
@@ -1153,24 +1151,35 @@ static int adv7511_probe(struct i2c_client *i2c, const 
struct i2c_device_id *id)
if (ret)
goto uninit_regulators;
 
-   regmap_write(adv7511->regmap, ADV7511_REG_EDID_I2C_ADDR, edid_i2c_addr);
-   regmap_write(adv7511->regmap, ADV7511_REG_PACKET_I2C_ADDR,
-main_i2c_addr - 0xa);
-   regmap_write(adv7511->regmap, ADV7511_REG_CEC_I2C_ADDR,
-main_i2c_addr - 2);
-
adv7511_packet_disable(adv7511, 0x);
 
-   adv7511->i2c_edid = i2c_new_dummy(i2c->adapter, edid_i2c_addr >> 1);
+   adv7511->i2c_edid = i2c_new_secondary_device(i2c, "edid",
+   ADV7511_EDID_I2C_ADDR_DEFAULT);
if (!adv7511->i2c_edid) {
-   ret = -ENOMEM;
+   ret = -EINVAL;
goto uninit_regulators;
}
 
+   regmap_write(adv7511->regmap, ADV7511_REG_EDID_I2C_ADDR,
+adv7511->i2c_edid->addr << 1);
+
ret = adv7511_init_cec_regmap(adv7511);
if (ret)
goto err_i2c_unregister_edid;
 
+   regmap_write(adv7511->regmap, ADV7511_REG_CEC_I2C_ADDR,
+adv7511->i2c_cec->addr << 1);
+
+   adv7511->i2c_packet = i2c_new_secondary_device(i2c, "packet",
+   ADV7511_PACKET_I2C_ADDR_DEFAULT);
+   if (!adv7511->i2c_packet) {
+   ret = -EINVAL;
+   goto err_unregister_cec;
+   }
+
+   regmap_write(adv7511->regmap, ADV7511_REG_PACKET_I2C_ADDR,
+adv7511->i2c_packet->addr << 1);
+
  

[PATCH v3 2/5] dt-bindings: adv7511: Add support for i2c_new_secondary_device

[Kieran Bingham]

From: Kieran Bingham 

The ADV7511 has four 256-byte maps that can be accessed via the main I²C
ports. Each map has it own I²C address and acts as a standard slave
device on the I²C bus.

Extend the device tree node bindings to be able to override the default
addresses so that address conflicts with other devices on the same bus
may be resolved at the board description level.

Signed-off-by: Kieran Bingham 
Reviewed-by: Rob Herring 
---
v2:
 - Fixed up reg: property description to account for multiple optional
   addresses.
 - Minor reword to commit message to account for DT only change
 - Collected Robs RB tag

v3:
 - Split map register addresses into individual declarations.

 .../devicetree/bindings/display/bridge/adi,adv7511.txt | 18 --
 1 file changed, 16 insertions(+), 2 deletions(-)

diff --git a/Documentation/devicetree/bindings/display/bridge/adi,adv7511.txt 
b/Documentation/devicetree/bindings/display/bridge/adi,adv7511.txt
index 0047b1394c70..3f85c351dd39 100644
--- a/Documentation/devicetree/bindings/display/bridge/adi,adv7511.txt
+++ b/Documentation/devicetree/bindings/display/bridge/adi,adv7511.txt
@@ -14,7 +14,13 @@ Required properties:
"adi,adv7513"
"adi,adv7533"
 
-- reg: I2C slave address
+- reg: I2C slave addresses
+  The ADV7511 internal registers are split into four pages exposed through
+  different I2C addresses, creating four register maps. Each map has it own
+  I2C address and acts as a standard slave device on the I²C bus. The main
+  address is mandatory, others are optional and revert to defaults if not
+  specified.
+
 
 The ADV7511 supports a large number of input data formats that differ by their
 color depth, color format, clock mode, bit justification and random
@@ -70,6 +76,9 @@ Optional properties:
   rather than generate its own timings for HDMI output.
 - clocks: from common clock binding: reference to the CEC clock.
 - clock-names: from common clock binding: must be "cec".
+- reg-names : Names of maps with programmable addresses.
+   It can contain any map needing a non-default address.
+   Possible maps names are : "main", "edid", "cec", "packet"
 
 Required nodes:
 
@@ -88,7 +97,12 @@ Example
 
adv7511w: hdmi@39 {
compatible = "adi,adv7511w";
-   reg = <39>;
+   /*
+* The EDID page will be accessible on address 0x66 on the i2c
+* bus. All other maps continue to use their default addresses.
+*/
+   reg = <0x39>, <0x66>;
+   reg-names = "main", "edid";
interrupt-parent = <>;
interrupts = <29 IRQ_TYPE_EDGE_FALLING>;
clocks = <_clock>;
-- 
2.7.4

[PATCH] v4l: subdev: compat: update handling for VIDIOC_SUBDEV_[GS]_ROUTING

[Niklas Söderlund]

Implement compat IOCTL handling for VIDIOC_SUBDEV_G_ROUTING and
VIDIOC_SUBDEV_S_ROUTING IOCTLs.

Signed-off-by: Niklas Söderlund 
---
 drivers/media/v4l2-core/v4l2-compat-ioctl32.c | 7 +--
 1 file changed, 5 insertions(+), 2 deletions(-)

Hi Sakari,

With this fix on-top of your vc branch I get it work with v4.16-rc1, 
feel free to squash it into your branch where appropriate. I tested this 
with a ARM64 kernel and a ARM user-land with v4l2-ctl + my 
--{get,set}-routing patches for v4l-utils.

// Niklas

diff --git a/drivers/media/v4l2-core/v4l2-compat-ioctl32.c 
b/drivers/media/v4l2-core/v4l2-compat-ioctl32.c
index a1f71a83ac076d7f..30700658963d3227 100644
--- a/drivers/media/v4l2-core/v4l2-compat-ioctl32.c
+++ b/drivers/media/v4l2-core/v4l2-compat-ioctl32.c
@@ -1124,7 +1124,10 @@ static long do_video_ioctl(struct file *file, unsigned 
int cmd, unsigned long ar
 
case VIDIOC_SUBDEV_G_ROUTING:
case VIDIOC_SUBDEV_S_ROUTING:
-   err = get_v4l2_subdev_routing(_routing, up);
+   err = alloc_userspace(sizeof(struct v4l2_subdev_routing),
+ 0, _native);
+   if (!err)
+   err = get_v4l2_subdev_routing(up_native, up);
compatible_arg = 0;
break;
 
@@ -1257,7 +1260,7 @@ static long do_video_ioctl(struct file *file, unsigned 
int cmd, unsigned long ar
break;
case VIDIOC_SUBDEV_G_ROUTING:
case VIDIOC_SUBDEV_S_ROUTING:
-   err = put_v4l2_subdev_routing(_routing, up);
+   err = put_v4l2_subdev_routing(up_native, up);
break;
}
if (err)
-- 
2.16.1

Re: [PATCH v5 13/26] watchdog: renesas_wdt: Add restart handler

[Wolfram Sang]

On Mon, Feb 12, 2018 at 05:44:22PM +, Fabrizio Castro wrote:
> On iWave's boards iwg20d and iwg22d the only way to reboot the system is
> by means of the watchdog.
> This patch adds a restart handler to rwdt_ops, and also makes sure we
> keep its priority to a medium level, in order to not override other more
> effective handlers.
> 
> Signed-off-by: Fabrizio Castro 
> Signed-off-by: Ramesh Shanmugasundaram 
> 
> Reviewed-by: Guenter Roeck 

Reviewed-by: Wolfram Sang 



signature.asc
Description: PGP signature

Re: [PATCH v5 12/26] watchdog: renesas_wdt: Add R-Car Gen2 support

[Wolfram Sang]

On Mon, Feb 12, 2018 at 05:44:21PM +, Fabrizio Castro wrote:
> Due to commits:
> * "ARM: shmobile: Add watchdog support",
> * "ARM: shmobile: rcar-gen2: Add watchdog support", and
> * "soc: renesas: rcar-rst: Enable watchdog as reset trigger for Gen2",
> we now have everything we needed for the watchdog to work on Gen2 and
> RZ/G1.
> 
> This commit adds "renesas,rcar-gen2-wdt" as compatible string for R-Car
> Gen2 and RZ/G1, and since on those platforms the rwdt clock needs to be
> always ON, when suspending to RAM we need to explicitly disable the
> counting by clearing TME from RWTCSRA.
> 
> Signed-off-by: Fabrizio Castro 
> Signed-off-by: Ramesh Shanmugasundaram 
> 
> ---
> v4->v5:
> * various improvements suggested by Wolfram
> 

Reviewed-by: Wolfram Sang 



signature.asc
Description: PGP signature

Warning for possible circular locking dependecy on v4.16-rc1

[Niklas Söderlund]

Hi Geert,

When doing some testing on v4.16-rc1 I ran across this warning a couple 
of times. I was using the renesas_config from the current master branch 
of renesas-drivers at the time. It do not hit every time but in my 
limited testing I would say ~50%.


[2.634819] ==
[2.640996] WARNING: possible circular locking dependency detected
[2.647176] 4.16.0-rc1-arm64-renesas-1-g75fb1624ab1a0c5a #34 Not tainted
[2.654222] --
[2.660400] swapper/0/1 is trying to acquire lock:
[2.665188]  (prepare_lock){+.+.}, at: [<(ptrval)>] 
clk_prepare_lock+0x48/0xa8
[2.673123] 
[2.673123] but task is already holding lock:
[2.678953]  (of_clk_mutex){+.+.}, at: [<(ptrval)>] 
__of_clk_get_from_provider.part.22+0x3c/0x120
[2.688528] 
[2.688528] which lock already depends on the new lock.
[2.688528] 
[2.696706] 
[2.696706] the existing dependency chain (in reverse order) is:
[2.704186] 
[2.704186] -> #5 (of_clk_mutex){+.+.}:
[2.709511]__mutex_lock+0x70/0x888
[2.713606]mutex_lock_nested+0x1c/0x28
[2.718049]__of_clk_get_from_provider.part.22+0x3c/0x120
[2.724054]of_clk_get_from_provider+0x20/0x30
[2.729105]cpg_mssr_attach_dev+0xfc/0x1e0
[2.733809]genpd_add_device+0xbc/0x230
[2.738251]genpd_dev_pm_attach+0xac/0x230
[2.742954]dev_pm_domain_attach+0xc/0x18
[2.747571]platform_drv_probe+0x38/0xb8
[2.752100]driver_probe_device+0x23c/0x310
[2.756890]__driver_attach+0xc4/0xc8
[2.761157]bus_for_each_dev+0x74/0xc8
[2.765511]driver_attach+0x20/0x28
[2.769605]bus_add_driver+0x1b0/0x220
[2.773960]driver_register+0x60/0xf8
[2.778228]__platform_driver_register+0x40/0x48
[2.783456]sh_mobile_i2c_adap_init+0x18/0x20
[2.788423]do_one_initcall+0x9c/0x14c
[2.792778]kernel_init_freeable+0x1dc/0x274
[2.797654]kernel_init+0x10/0x100
[2.801665]ret_from_fork+0x10/0x18
[2.805757] 
[2.805757] -> #4 (>mlock){+.+.}:
[2.811162]__mutex_lock+0x70/0x888
[2.815256]mutex_lock_nested+0x1c/0x28
[2.819699]genpd_lock_mtx+0x14/0x20
[2.823879]genpd_runtime_resume+0x70/0x230
[2.828667]__rpm_callback+0xe0/0x268
[2.832934]rpm_callback+0x20/0x80
[2.836940]rpm_resume+0x344/0x608
[2.840946]__pm_runtime_resume+0x50/0x78
[2.845561]usb_dmac_alloc_chan_resources+0x8c/0xa0
[2.851044]dma_chan_get+0x28/0x80
[2.855051]find_candidate+0xf8/0x188
[2.859319]__dma_request_channel+0x68/0xc8
[2.864108]usb_dmac_of_xlate+0x64/0x98
[2.868550]of_dma_request_slave_channel+0x170/0x270
[2.874121]dma_request_chan+0x38/0x1d0
[2.878568]usbhsf_dma_init.isra.8+0x60/0x108
[2.883531]usbhs_fifo_probe+0x70/0x148
[2.887972]usbhs_probe+0x2c8/0x5e0
[2.892065]platform_drv_probe+0x58/0xb8
[2.896594]driver_probe_device+0x23c/0x310
[2.901382]__driver_attach+0xc4/0xc8
[2.905649]bus_for_each_dev+0x74/0xc8
[2.910004]driver_attach+0x20/0x28
[2.914097]bus_add_driver+0x1b0/0x220
[2.918452]driver_register+0x60/0xf8
[2.922718]__platform_driver_register+0x40/0x48
[2.927942]renesas_usbhs_driver_init+0x18/0x20
[2.933078]do_one_initcall+0x9c/0x14c
[2.937433]kernel_init_freeable+0x1dc/0x274
[2.942309]kernel_init+0x10/0x100
[2.946316]ret_from_fork+0x10/0x18
[2.950407] 
[2.950407] -> #3 (dma_list_mutex){+.+.}:
[2.955900]__mutex_lock+0x70/0x888
[2.959994]mutex_lock_nested+0x1c/0x28
[2.964435]__dma_request_channel+0x38/0xc8
[2.969225]usb_dmac_of_xlate+0x64/0x98
[2.973666]of_dma_request_slave_channel+0x170/0x270
[2.979236]dma_request_chan+0x38/0x1d0
[2.983678]usbhsf_dma_init.isra.8+0x60/0x108
[2.988640]usbhs_fifo_probe+0x70/0x148
[2.993081]usbhs_probe+0x2c8/0x5e0
[2.997174]platform_drv_probe+0x58/0xb8
[3.001702]driver_probe_device+0x23c/0x310
[3.006491]__driver_attach+0xc4/0xc8
[3.010759]bus_for_each_dev+0x74/0xc8
[3.015114]driver_attach+0x20/0x28
[3.019208]bus_add_driver+0x1b0/0x220
[3.023562]driver_register+0x60/0xf8
[3.027829]__platform_driver_register+0x40/0x48
[3.033052]renesas_usbhs_driver_init+0x18/0x20
[3.038188]do_one_initcall+0x9c/0x14c
[3.042543]kernel_init_freeable+0x1dc/0x274
[3.047419]kernel_init+0x10/0x100
[3.051426]ret_from_fork+0x10/0x18
[

[PATCH] ravb: add support for changing MTU

[Niklas Söderlund]

Allow for chancing the MTU within the limit of the maximum size of a
descriptor (2048 bytes). Add the callback to change MTU from user-space
and take the configurable MTU into account when configuring the
hardware.

Signed-off-by: Niklas Söderlund 
---
 drivers/net/ethernet/renesas/ravb.h  |  1 +
 drivers/net/ethernet/renesas/ravb_main.c | 34 +---
 2 files changed, 28 insertions(+), 7 deletions(-)

diff --git a/drivers/net/ethernet/renesas/ravb.h 
b/drivers/net/ethernet/renesas/ravb.h
index 96a27b00c90e212a..b81f4faf7b10114d 100644
--- a/drivers/net/ethernet/renesas/ravb.h
+++ b/drivers/net/ethernet/renesas/ravb.h
@@ -1018,6 +1018,7 @@ struct ravb_private {
u32 dirty_rx[NUM_RX_QUEUE]; /* Producer ring indices */
u32 cur_tx[NUM_TX_QUEUE];
u32 dirty_tx[NUM_TX_QUEUE];
+   u32 rx_buf_sz;  /* Based on MTU+slack. */
struct napi_struct napi[NUM_RX_QUEUE];
struct work_struct work;
/* MII transceiver section. */
diff --git a/drivers/net/ethernet/renesas/ravb_main.c 
b/drivers/net/ethernet/renesas/ravb_main.c
index c87f57ca44371586..a4870c9e42195802 100644
--- a/drivers/net/ethernet/renesas/ravb_main.c
+++ b/drivers/net/ethernet/renesas/ravb_main.c
@@ -238,7 +238,7 @@ static void ravb_ring_free(struct net_device *ndev, int q)
   le32_to_cpu(desc->dptr)))
dma_unmap_single(ndev->dev.parent,
 le32_to_cpu(desc->dptr),
-PKT_BUF_SZ,
+priv->rx_buf_sz,
 DMA_FROM_DEVICE);
}
ring_size = sizeof(struct ravb_ex_rx_desc) *
@@ -300,9 +300,9 @@ static void ravb_ring_format(struct net_device *ndev, int q)
for (i = 0; i < priv->num_rx_ring[q]; i++) {
/* RX descriptor */
rx_desc = >rx_ring[q][i];
-   rx_desc->ds_cc = cpu_to_le16(PKT_BUF_SZ);
+   rx_desc->ds_cc = cpu_to_le16(priv->rx_buf_sz);
dma_addr = dma_map_single(ndev->dev.parent, 
priv->rx_skb[q][i]->data,
- PKT_BUF_SZ,
+ le16_to_cpu(rx_desc->ds_cc),
  DMA_FROM_DEVICE);
/* We just set the data size to 0 for a failed mapping which
 * should prevent DMA from happening...
@@ -346,6 +346,10 @@ static int ravb_ring_init(struct net_device *ndev, int q)
int ring_size;
int i;
 
+   /* +16 gets room from the status from the card. */
+   priv->rx_buf_sz = (ndev->mtu <= 1492 ? PKT_BUF_SZ : ndev->mtu) +
+   ETH_HLEN + VLAN_HLEN + ETH_FCS_LEN + 16;
+
/* Allocate RX and TX skb rings */
priv->rx_skb[q] = kcalloc(priv->num_rx_ring[q],
  sizeof(*priv->rx_skb[q]), GFP_KERNEL);
@@ -355,7 +359,7 @@ static int ravb_ring_init(struct net_device *ndev, int q)
goto error;
 
for (i = 0; i < priv->num_rx_ring[q]; i++) {
-   skb = netdev_alloc_skb(ndev, PKT_BUF_SZ + RAVB_ALIGN - 1);
+   skb = netdev_alloc_skb(ndev, priv->rx_buf_sz + RAVB_ALIGN - 1);
if (!skb)
goto error;
ravb_set_buffer_align(skb);
@@ -586,7 +590,7 @@ static bool ravb_rx(struct net_device *ndev, int *quota, 
int q)
skb = priv->rx_skb[q][entry];
priv->rx_skb[q][entry] = NULL;
dma_unmap_single(ndev->dev.parent, 
le32_to_cpu(desc->dptr),
-PKT_BUF_SZ,
+priv->rx_buf_sz,
 DMA_FROM_DEVICE);
get_ts &= (q == RAVB_NC) ?
RAVB_RXTSTAMP_TYPE_V2_L2_EVENT :
@@ -619,11 +623,12 @@ static bool ravb_rx(struct net_device *ndev, int *quota, 
int q)
for (; priv->cur_rx[q] - priv->dirty_rx[q] > 0; priv->dirty_rx[q]++) {
entry = priv->dirty_rx[q] % priv->num_rx_ring[q];
desc = >rx_ring[q][entry];
-   desc->ds_cc = cpu_to_le16(PKT_BUF_SZ);
+   desc->ds_cc = cpu_to_le16(priv->rx_buf_sz);
 
if (!priv->rx_skb[q][entry]) {
skb = netdev_alloc_skb(ndev,
-  PKT_BUF_SZ + RAVB_ALIGN - 1);
+  priv->rx_buf_sz +
+  RAVB_ALIGN - 1);
if (!skb)
break;  /* Better luck next round. */
ravb_set_buffer_align(skb);
@@ -1854,6 +1859,17 @@ static int ravb_do_ioctl(struct 

Re: [PATCH v5 12/26] watchdog: renesas_wdt: Add R-Car Gen2 support

[Guenter Roeck]

On Mon, Feb 12, 2018 at 05:44:21PM +, Fabrizio Castro wrote:
> Due to commits:
> * "ARM: shmobile: Add watchdog support",
> * "ARM: shmobile: rcar-gen2: Add watchdog support", and
> * "soc: renesas: rcar-rst: Enable watchdog as reset trigger for Gen2",
> we now have everything we needed for the watchdog to work on Gen2 and
> RZ/G1.
> 
> This commit adds "renesas,rcar-gen2-wdt" as compatible string for R-Car
> Gen2 and RZ/G1, and since on those platforms the rwdt clock needs to be
> always ON, when suspending to RAM we need to explicitly disable the
> counting by clearing TME from RWTCSRA.
> 
> Signed-off-by: Fabrizio Castro 
> Signed-off-by: Ramesh Shanmugasundaram 
> 

Reviewed-by: Guenter Roeck 

> ---
> v4->v5:
> * various improvements suggested by Wolfram
> 
>  drivers/watchdog/renesas_wdt.c | 27 ++-
>  1 file changed, 22 insertions(+), 5 deletions(-)
> 
> diff --git a/drivers/watchdog/renesas_wdt.c b/drivers/watchdog/renesas_wdt.c
> index 831ef83..e972b7b 100644
> --- a/drivers/watchdog/renesas_wdt.c
> +++ b/drivers/watchdog/renesas_wdt.c
> @@ -203,13 +203,29 @@ static int rwdt_remove(struct platform_device *pdev)
>   return 0;
>  }
>  
> -/*
> - * This driver does also fit for R-Car Gen2 (r8a779[0-4]) WDT. However, for 
> SMP
> - * to work there, one also needs a RESET (RST) driver which does not exist 
> yet
> - * due to HW issues. This needs to be solved before adding compatibles here.
> - */
> +static int __maybe_unused rwdt_suspend(struct device *dev)
> +{
> + struct rwdt_priv *priv = dev_get_drvdata(dev);
> +
> + if (watchdog_active(>wdev))
> + rwdt_write(priv, priv->cks, RWTCSRA);
> + return 0;
> +}
> +
> +static int __maybe_unused rwdt_resume(struct device *dev)
> +{
> + struct rwdt_priv *priv = dev_get_drvdata(dev);
> +
> + if (watchdog_active(>wdev))
> + rwdt_write(priv, priv->cks | RWTCSRA_TME, RWTCSRA);
> + return 0;
> +}
> +
> +static SIMPLE_DEV_PM_OPS(rwdt_pm_ops, rwdt_suspend, rwdt_resume);
> +
>  static const struct of_device_id rwdt_ids[] = {
>   { .compatible = "renesas,rcar-gen3-wdt", },
> + { .compatible = "renesas,rcar-gen2-wdt", },
>   { /* sentinel */ }
>  };
>  MODULE_DEVICE_TABLE(of, rwdt_ids);
> @@ -218,6 +234,7 @@ static struct platform_driver rwdt_driver = {
>   .driver = {
>   .name = "renesas_wdt",
>   .of_match_table = rwdt_ids,
> + .pm = _pm_ops,
>   },
>   .probe = rwdt_probe,
>   .remove = rwdt_remove,
> -- 
> 2.7.4
> 

Re: [PATCH v2 3/5] [RFT] ARM: dts: wheat: Fix ADV7513 address usage

[Kieran Bingham]

Hi Lars,

Thanks for your review!

On 12/02/18 18:24, Lars-Peter Clausen wrote:
> On 02/12/2018 07:11 PM, Kieran Bingham wrote:
> [...]
>> +/*
>> + * The adv75xx resets its addresses to defaults during low power power
>> + * mode. Because we have two ADV7513 devices on the same bus, we must
>> + * change both of them away from the defaults so that they do not
>> + * conflict.
>> + */
>>  hdmi@3d {
>>  compatible = "adi,adv7513";
>> -reg = <0x3d>;
>> +reg = <0x3d 0x2d 0x4d, 0x5d>;
> 
> To have the correct semantics this should be:
>   reg = <0x3d>, <0x2d>, <0x4d>, <0x5d>;>
> It is a set of 4 single cell addresses. The other thing is a single 4 cell
> address. It will get compiled to the same bytes, but the DT tools should
> complain about it, because it doesn't match #address-cells.

Not to mention the spurious comma's!!! (at least I marked the patch RFT :D)

I'll resend a v2.1 RFT here, and update my local changes (with the same fault,
sans comma) to my other DT files!

Thanks for the fast review.

--
Kieran


> 
>> +reg-names = "main", "cec", "edid", "packet";
>>  
>>  adi,input-depth = <8>;
>>  adi,input-colorspace = "rgb";
>> @@ -272,7 +279,8 @@
>>  
>>  hdmi@39 {
>>  compatible = "adi,adv7513";
>> -reg = <0x39>;
>> +reg = <0x39 0x29 0x49, 0x59>;
> 
> Same here.
> 
>> +reg-names = "main", "cec", "edid", "packet";
>>  
>>  adi,input-depth = <8>;
>>  adi,input-colorspace = "rgb";
>>
> 

Re: [PATCH v2 3/5] [RFT] ARM: dts: wheat: Fix ADV7513 address usage

[Lars-Peter Clausen]

On 02/12/2018 07:11 PM, Kieran Bingham wrote:
[...]
> + /*
> +  * The adv75xx resets its addresses to defaults during low power power
> +  * mode. Because we have two ADV7513 devices on the same bus, we must
> +  * change both of them away from the defaults so that they do not
> +  * conflict.
> +  */
>   hdmi@3d {
>   compatible = "adi,adv7513";
> - reg = <0x3d>;
> + reg = <0x3d 0x2d 0x4d, 0x5d>;

To have the correct semantics this should be:
reg = <0x3d>, <0x2d>, <0x4d>, <0x5d>;

It is a set of 4 single cell addresses. The other thing is a single 4 cell
address. It will get compiled to the same bytes, but the DT tools should
complain about it, because it doesn't match #address-cells.

> + reg-names = "main", "cec", "edid", "packet";
>  
>   adi,input-depth = <8>;
>   adi,input-colorspace = "rgb";
> @@ -272,7 +279,8 @@
>  
>   hdmi@39 {
>   compatible = "adi,adv7513";
> - reg = <0x39>;
> + reg = <0x39 0x29 0x49, 0x59>;

Same here.

> + reg-names = "main", "cec", "edid", "packet";
>  
>   adi,input-depth = <8>;
>   adi,input-colorspace = "rgb";
> 

[PATCH v2 2/5] dt-bindings: adv7511: Add support for i2c_new_secondary_device

[Kieran Bingham]

From: Kieran Bingham 

The ADV7511 has four 256-byte maps that can be accessed via the main I²C
ports. Each map has it own I²C address and acts as a standard slave
device on the I²C bus.

Extend the device tree node bindings to be able to override the default
addresses so that address conflicts with other devices on the same bus
may be resolved at the board description level.

Signed-off-by: Kieran Bingham 
Reviewed-by: Rob Herring 
---
v2:
 - Fixed up reg: property description to account for multiple optional
   addresses.
 - Minor reword to commit message to account for DT only change
 - Collected Robs RB tag

 .../devicetree/bindings/display/bridge/adi,adv7511.txt | 18 --
 1 file changed, 16 insertions(+), 2 deletions(-)

diff --git a/Documentation/devicetree/bindings/display/bridge/adi,adv7511.txt 
b/Documentation/devicetree/bindings/display/bridge/adi,adv7511.txt
index 0047b1394c70..f1b5466b1ca7 100644
--- a/Documentation/devicetree/bindings/display/bridge/adi,adv7511.txt
+++ b/Documentation/devicetree/bindings/display/bridge/adi,adv7511.txt
@@ -14,7 +14,13 @@ Required properties:
"adi,adv7513"
"adi,adv7533"
 
-- reg: I2C slave address
+- reg: I2C slave addresses
+  The ADV7511 internal registers are split into four pages exposed through
+  different I2C addresses, creating four register maps. Each map has it own
+  I2C address and acts as a standard slave device on the I²C bus. The main
+  address is mandatory, others are optional and revert to defaults if not
+  specified.
+
 
 The ADV7511 supports a large number of input data formats that differ by their
 color depth, color format, clock mode, bit justification and random
@@ -70,6 +76,9 @@ Optional properties:
   rather than generate its own timings for HDMI output.
 - clocks: from common clock binding: reference to the CEC clock.
 - clock-names: from common clock binding: must be "cec".
+- reg-names : Names of maps with programmable addresses.
+   It can contain any map needing a non-default address.
+   Possible maps names are : "main", "edid", "cec", "packet"
 
 Required nodes:
 
@@ -88,7 +97,12 @@ Example
 
adv7511w: hdmi@39 {
compatible = "adi,adv7511w";
-   reg = <39>;
+   /*
+* The EDID page will be accessible on address 0x66 on the i2c
+* bus. All other maps continue to use their default addresses.
+*/
+   reg = <0x39 0x66>;
+   reg-names = "main", "edid";
interrupt-parent = <>;
interrupts = <29 IRQ_TYPE_EDGE_FALLING>;
clocks = <_clock>;
-- 
2.7.4

[PATCH v2 3/5] [RFT] ARM: dts: wheat: Fix ADV7513 address usage

[Kieran Bingham]

From: Kieran Bingham 

The r8a7792 Wheat board has two ADV7513 devices sharing a single i2c
bus, however in low power mode the ADV7513 will reset it's slave maps to
use the hardware defined default addresses.

The ADV7511 driver was adapted to allow the two devices to be registered
correctly - but it did not take into account the fault whereby the
devices reset the addresses.

This results in an address conflict between the device using the default
addresses, and the other device if it is in low-power-mode.

Repair this issue by moving both devices away from the default address
definitions.

Signed-off-by: Kieran Bingham 
---
 arch/arm/boot/dts/r8a7792-wheat.dts | 12 ++--
 1 file changed, 10 insertions(+), 2 deletions(-)

diff --git a/arch/arm/boot/dts/r8a7792-wheat.dts 
b/arch/arm/boot/dts/r8a7792-wheat.dts
index b9471b67b728..c94f330392ee 100644
--- a/arch/arm/boot/dts/r8a7792-wheat.dts
+++ b/arch/arm/boot/dts/r8a7792-wheat.dts
@@ -240,9 +240,16 @@
status = "okay";
clock-frequency = <40>;
 
+   /*
+* The adv75xx resets its addresses to defaults during low power power
+* mode. Because we have two ADV7513 devices on the same bus, we must
+* change both of them away from the defaults so that they do not
+* conflict.
+*/
hdmi@3d {
compatible = "adi,adv7513";
-   reg = <0x3d>;
+   reg = <0x3d 0x2d 0x4d, 0x5d>;
+   reg-names = "main", "cec", "edid", "packet";
 
adi,input-depth = <8>;
adi,input-colorspace = "rgb";
@@ -272,7 +279,8 @@
 
hdmi@39 {
compatible = "adi,adv7513";
-   reg = <0x39>;
+   reg = <0x39 0x29 0x49, 0x59>;
+   reg-names = "main", "cec", "edid", "packet";
 
adi,input-depth = <8>;
adi,input-colorspace = "rgb";
-- 
2.7.4

[PATCH v2 4/5] media: adv7604: Add support for i2c_new_secondary_device

[Kieran Bingham]

From: Jean-Michel Hautbois 

The ADV7604 has thirteen 256-byte maps that can be accessed via the main
I²C ports. Each map has it own I²C address and acts as a standard slave
device on the I²C bus.

Allow a device tree node to override the default addresses so that
address conflicts with other devices on the same bus may be resolved at
the board description level.

Signed-off-by: Jean-Michel Hautbois 
[Kieran: Re-adapted for mainline]
Signed-off-by: Kieran Bingham 
---
Based upon the original posting :
  https://lkml.org/lkml/2014/10/22/469

v2:
 - Split out DT bindings from driver updates
 - Return -EINVAL on error paths from adv76xx_dummy_client()

 drivers/media/i2c/adv7604.c | 62 +
 1 file changed, 40 insertions(+), 22 deletions(-)

diff --git a/drivers/media/i2c/adv7604.c b/drivers/media/i2c/adv7604.c
index 1544920ec52d..872e124793f8 100644
--- a/drivers/media/i2c/adv7604.c
+++ b/drivers/media/i2c/adv7604.c
@@ -2734,6 +2734,27 @@ static const struct v4l2_ctrl_config 
adv76xx_ctrl_free_run_color = {
 
 /* --- */
 
+struct adv76xx_register {
+   const char *name;
+   u8 default_addr;
+};
+
+static const struct adv76xx_register adv76xx_secondary_names[] = {
+   [ADV76XX_PAGE_IO] = { "main", 0x4c },
+   [ADV7604_PAGE_AVLINK] = { "avlink", 0x42 },
+   [ADV76XX_PAGE_CEC] = { "cec", 0x40 },
+   [ADV76XX_PAGE_INFOFRAME] = { "infoframe", 0x3e },
+   [ADV7604_PAGE_ESDP] = { "esdp", 0x38 },
+   [ADV7604_PAGE_DPP] = { "dpp", 0x3c },
+   [ADV76XX_PAGE_AFE] = { "afe", 0x26 },
+   [ADV76XX_PAGE_REP] = { "rep", 0x32 },
+   [ADV76XX_PAGE_EDID] = { "edid", 0x36 },
+   [ADV76XX_PAGE_HDMI] = { "hdmi", 0x34 },
+   [ADV76XX_PAGE_TEST] = { "test", 0x30 },
+   [ADV76XX_PAGE_CP] = { "cp", 0x22 },
+   [ADV7604_PAGE_VDP] = { "vdp", 0x24 },
+};
+
 static int adv76xx_core_init(struct v4l2_subdev *sd)
 {
struct adv76xx_state *state = to_state(sd);
@@ -2834,13 +2855,26 @@ static void adv76xx_unregister_clients(struct 
adv76xx_state *state)
 }
 
 static struct i2c_client *adv76xx_dummy_client(struct v4l2_subdev *sd,
-   u8 addr, u8 io_reg)
+  unsigned int i)
 {
struct i2c_client *client = v4l2_get_subdevdata(sd);
+   struct adv76xx_state *state = to_state(sd);
+   struct adv76xx_platform_data *pdata = >pdata;
+   unsigned int io_reg = 0xf2 + i;
+   struct i2c_client *new_client;
+
+   if (pdata && pdata->i2c_addresses[i])
+   new_client = i2c_new_dummy(client->adapter,
+  pdata->i2c_addresses[i]);
+   else
+   new_client = i2c_new_secondary_device(client,
+   adv76xx_secondary_names[i].name,
+   adv76xx_secondary_names[i].default_addr);
 
-   if (addr)
-   io_write(sd, io_reg, addr << 1);
-   return i2c_new_dummy(client->adapter, io_read(sd, io_reg) >> 1);
+   if (new_client)
+   io_write(sd, io_reg, new_client->addr << 1);
+
+   return new_client;
 }
 
 static const struct adv76xx_reg_seq adv7604_recommended_settings_afe[] = {
@@ -3115,20 +3149,6 @@ static int adv76xx_parse_dt(struct adv76xx_state *state)
/* Disable the interrupt for now as no DT-based board uses it. */
state->pdata.int1_config = ADV76XX_INT1_CONFIG_DISABLED;
 
-   /* Use the default I2C addresses. */
-   state->pdata.i2c_addresses[ADV7604_PAGE_AVLINK] = 0x42;
-   state->pdata.i2c_addresses[ADV76XX_PAGE_CEC] = 0x40;
-   state->pdata.i2c_addresses[ADV76XX_PAGE_INFOFRAME] = 0x3e;
-   state->pdata.i2c_addresses[ADV7604_PAGE_ESDP] = 0x38;
-   state->pdata.i2c_addresses[ADV7604_PAGE_DPP] = 0x3c;
-   state->pdata.i2c_addresses[ADV76XX_PAGE_AFE] = 0x26;
-   state->pdata.i2c_addresses[ADV76XX_PAGE_REP] = 0x32;
-   state->pdata.i2c_addresses[ADV76XX_PAGE_EDID] = 0x36;
-   state->pdata.i2c_addresses[ADV76XX_PAGE_HDMI] = 0x34;
-   state->pdata.i2c_addresses[ADV76XX_PAGE_TEST] = 0x30;
-   state->pdata.i2c_addresses[ADV76XX_PAGE_CP] = 0x22;
-   state->pdata.i2c_addresses[ADV7604_PAGE_VDP] = 0x24;
-
/* Hardcode the remaining platform data fields. */
state->pdata.disable_pwrdnb = 0;
state->pdata.disable_cable_det_rst = 0;
@@ -3478,11 +3498,9 @@ static int adv76xx_probe(struct i2c_client *client,
if (!(BIT(i) & state->info->page_mask))
continue;
 
-   state->i2c_clients[i] =
-   adv76xx_dummy_client(sd, state->pdata.i2c_addresses[i],
-0xf2 + i);
+   state->i2c_clients[i] = adv76xx_dummy_client(sd, 

[PATCH v2 5/5] drm: adv7511: Add support for i2c_new_secondary_device

[Kieran Bingham]

From: Kieran Bingham 

The ADV7511 has four 256-byte maps that can be accessed via the main I²C
ports. Each map has it own I²C address and acts as a standard slave
device on the I²C bus.

Allow a device tree node to override the default addresses so that
address conflicts with other devices on the same bus may be resolved at
the board description level.

Signed-off-by: Kieran Bingham 

---
v2:
 - Update missing edid-i2c address setting
 - Split out DT bindings
 - Rename and move the I2C default addresses to their own section

 drivers/gpu/drm/bridge/adv7511/adv7511.h |  6 
 drivers/gpu/drm/bridge/adv7511/adv7511_drv.c | 42 ++--
 2 files changed, 33 insertions(+), 15 deletions(-)

diff --git a/drivers/gpu/drm/bridge/adv7511/adv7511.h 
b/drivers/gpu/drm/bridge/adv7511/adv7511.h
index d034b2cb5eee..04e6759ee45b 100644
--- a/drivers/gpu/drm/bridge/adv7511/adv7511.h
+++ b/drivers/gpu/drm/bridge/adv7511/adv7511.h
@@ -93,6 +93,11 @@
 #define ADV7511_REG_CHIP_ID_HIGH   0xf5
 #define ADV7511_REG_CHIP_ID_LOW0xf6
 
+/* Hardware defined default addresses for i2c register maps */
+#define ADV7511_CEC_I2C_ADDR_DEFAULT   0x3c
+#define ADV7511_EDID_I2C_ADDR_DEFAULT  0x3f
+#define ADV7511_PACKET_I2C_ADDR_DEFAULT0x38
+
 #define ADV7511_CSC_ENABLE BIT(7)
 #define ADV7511_CSC_UPDATE_MODEBIT(5)
 
@@ -322,6 +327,7 @@ struct adv7511 {
struct i2c_client *i2c_main;
struct i2c_client *i2c_edid;
struct i2c_client *i2c_cec;
+   struct i2c_client *i2c_packet;
 
struct regmap *regmap;
struct regmap *regmap_cec;
diff --git a/drivers/gpu/drm/bridge/adv7511/adv7511_drv.c 
b/drivers/gpu/drm/bridge/adv7511/adv7511_drv.c
index efa29db5fc2b..5e61b928c9c0 100644
--- a/drivers/gpu/drm/bridge/adv7511/adv7511_drv.c
+++ b/drivers/gpu/drm/bridge/adv7511/adv7511_drv.c
@@ -586,7 +586,7 @@ static int adv7511_get_modes(struct adv7511 *adv7511,
/* Reading the EDID only works if the device is powered */
if (!adv7511->powered) {
unsigned int edid_i2c_addr =
-   (adv7511->i2c_main->addr << 1) + 4;
+   (adv7511->i2c_edid->addr << 1);
 
__adv7511_power_on(adv7511);
 
@@ -969,10 +969,10 @@ static int adv7511_init_cec_regmap(struct adv7511 *adv)
 {
int ret;
 
-   adv->i2c_cec = i2c_new_dummy(adv->i2c_main->adapter,
-adv->i2c_main->addr - 1);
+   adv->i2c_cec = i2c_new_secondary_device(adv->i2c_main, "cec",
+   ADV7511_CEC_I2C_ADDR_DEFAULT);
if (!adv->i2c_cec)
-   return -ENOMEM;
+   return -EINVAL;
i2c_set_clientdata(adv->i2c_cec, adv);
 
adv->regmap_cec = devm_regmap_init_i2c(adv->i2c_cec,
@@ -1082,8 +1082,6 @@ static int adv7511_probe(struct i2c_client *i2c, const 
struct i2c_device_id *id)
struct adv7511_link_config link_config;
struct adv7511 *adv7511;
struct device *dev = >dev;
-   unsigned int main_i2c_addr = i2c->addr << 1;
-   unsigned int edid_i2c_addr = main_i2c_addr + 4;
unsigned int val;
int ret;
 
@@ -1153,24 +1151,35 @@ static int adv7511_probe(struct i2c_client *i2c, const 
struct i2c_device_id *id)
if (ret)
goto uninit_regulators;
 
-   regmap_write(adv7511->regmap, ADV7511_REG_EDID_I2C_ADDR, edid_i2c_addr);
-   regmap_write(adv7511->regmap, ADV7511_REG_PACKET_I2C_ADDR,
-main_i2c_addr - 0xa);
-   regmap_write(adv7511->regmap, ADV7511_REG_CEC_I2C_ADDR,
-main_i2c_addr - 2);
-
adv7511_packet_disable(adv7511, 0x);
 
-   adv7511->i2c_edid = i2c_new_dummy(i2c->adapter, edid_i2c_addr >> 1);
+   adv7511->i2c_edid = i2c_new_secondary_device(i2c, "edid",
+   ADV7511_EDID_I2C_ADDR_DEFAULT);
if (!adv7511->i2c_edid) {
-   ret = -ENOMEM;
+   ret = -EINVAL;
goto uninit_regulators;
}
 
+   regmap_write(adv7511->regmap, ADV7511_REG_EDID_I2C_ADDR,
+adv7511->i2c_edid->addr << 1);
+
ret = adv7511_init_cec_regmap(adv7511);
if (ret)
goto err_i2c_unregister_edid;
 
+   regmap_write(adv7511->regmap, ADV7511_REG_CEC_I2C_ADDR,
+adv7511->i2c_cec->addr << 1);
+
+   adv7511->i2c_packet = i2c_new_secondary_device(i2c, "packet",
+   ADV7511_PACKET_I2C_ADDR_DEFAULT);
+   if (!adv7511->i2c_packet) {
+   ret = -EINVAL;
+   goto err_unregister_cec;
+   }
+
+   regmap_write(adv7511->regmap, ADV7511_REG_PACKET_I2C_ADDR,
+adv7511->i2c_packet->addr << 1);
+
 

[PATCH v2 1/5] dt-bindings: media: adv7604: Add support for i2c_new_secondary_device

[Kieran Bingham]

From: Jean-Michel Hautbois 

The ADV7604 has thirteen 256-byte maps that can be accessed via the main
I²C ports. Each map has it own I²C address and acts as a standard slave
device on the I²C bus.

Extend the device tree node bindings to be able to override the default
addresses so that address conflicts with other devices on the same bus
may be resolved at the board description level.

Signed-off-by: Jean-Michel Hautbois 
[Kieran: Re-adapted for mainline]
Signed-off-by: Kieran Bingham 
Reviewed-by: Rob Herring 

---
Based upon the original posting :
  https://lkml.org/lkml/2014/10/22/469

v2:
 - DT Binding update separated from code change
 - Minor reword to commit message to account for DT only change.
 - Collected Rob's RB tag.

 .../devicetree/bindings/media/i2c/adv7604.txt  | 18 --
 1 file changed, 16 insertions(+), 2 deletions(-)

diff --git a/Documentation/devicetree/bindings/media/i2c/adv7604.txt 
b/Documentation/devicetree/bindings/media/i2c/adv7604.txt
index 9cbd92eb5d05..b64e313dcc66 100644
--- a/Documentation/devicetree/bindings/media/i2c/adv7604.txt
+++ b/Documentation/devicetree/bindings/media/i2c/adv7604.txt
@@ -13,7 +13,11 @@ Required Properties:
 - "adi,adv7611" for the ADV7611
 - "adi,adv7612" for the ADV7612
 
-  - reg: I2C slave address
+  - reg: I2C slave addresses
+The ADV76xx has up to thirteen 256-byte maps that can be accessed via the
+main I²C ports. Each map has it own I²C address and acts as a standard
+slave device on the I²C bus. The main address is mandatory, others are
+optional and revert to defaults if not specified.
 
   - hpd-gpios: References to the GPIOs that control the HDMI hot-plug
 detection pins, one per HDMI input. The active flag indicates the GPIO
@@ -35,6 +39,11 @@ Optional Properties:
 
   - reset-gpios: Reference to the GPIO connected to the device's reset pin.
   - default-input: Select which input is selected after reset.
+  - reg-names : Names of maps with programmable addresses.
+   It can contain any map needing a non-default address.
+   Possible maps names are :
+ "main", "avlink", "cec", "infoframe", "esdp", "dpp", "afe",
+ "rep", "edid", "hdmi", "test", "cp", "vdp"
 
 Optional Endpoint Properties:
 
@@ -52,7 +61,12 @@ Example:
 
hdmi_receiver@4c {
compatible = "adi,adv7611";
-   reg = <0x4c>;
+   /*
+* The edid page will be accessible @ 0x66 on the i2c bus. All
+* other maps will retain their default addresses.
+*/
+   reg = <0x4c 0x66>;
+   reg-names "main", "edid";
 
reset-gpios = < 0 GPIO_ACTIVE_LOW>;
hpd-gpios = < 2 GPIO_ACTIVE_HIGH>;
-- 
2.7.4

[PATCH v2 0/5] Add support for i2c_new_secondary_device

[Kieran Bingham]

From: Kieran Bingham 

Back in 2014, Jean-Michel provided patches [0] to implement a means of
describing software defined I2C addresses for devices through the DT nodes.

The patch to implement the function "i2c_new_secondary_device()" was integrated,
but the corresponding driver update didn't get applied.

This short series re-bases Jean-Michel's patch to mainline for the ADV7604 
driver
in linux-media, and also provides a patch for the ADV7511 DRM Bridge driver 
taking
the same approach.

This series allows us to define the I2C address allocations of these devices in
the device tree for the Renesas D3 platform where these two devices reside on
the same bus and conflict with each other presently..

[0] https://lkml.org/lkml/2014/10/22/468
[1] https://lkml.org/lkml/2014/10/22/469

v2:
 - dt bindings split from driver changes
 - fixed up dt binding property descriptions
 - Update missing edid-i2c address setting (adv7511)
 - Provide update for r8a7792 DTB to account for address conflict

Jean-Michel Hautbois (2):
  dt-bindings: media: adv7604: Add support for i2c_new_secondary_device
  media: adv7604: Add support for i2c_new_secondary_device

Kieran Bingham (3):
  dt-bindings: adv7511: Add support for i2c_new_secondary_device
  [RFT] ARM: dts: wheat: Fix ADV7513 address usage
  drm: adv7511: Add support for i2c_new_secondary_device

 .../bindings/display/bridge/adi,adv7511.txt| 18 ++-
 .../devicetree/bindings/media/i2c/adv7604.txt  | 18 ++-
 arch/arm/boot/dts/r8a7792-wheat.dts| 12 -
 drivers/gpu/drm/bridge/adv7511/adv7511.h   |  6 +++
 drivers/gpu/drm/bridge/adv7511/adv7511_drv.c   | 42 +--
 drivers/media/i2c/adv7604.c| 62 ++
 6 files changed, 115 insertions(+), 43 deletions(-)

-- 
2.7.4

Re: [PATCH 0/3] Add R8A77970/Eagle PFC support

[Sergei Shtylyov]

On 01/19/2018 01:48 PM, Kieran Bingham wrote:

>>> Here's the set of 3 patches against Simon Horman's 'renesas.git' repo's
>>> 'renesas-devel-20171110-v4.14-rc8' tag.  We're adding the R8A77970 PFC node
>>> and then describing the pins for SCIF0 and EtherAVB devices declared 
>>> earlier.
>>> These patches depend on the R8A77970 PFC suport in order to work properly.
>>>
>>> [1/3] arm64: dts: renesas: r8a77970: add PFC support
>>> [2/3] arm64: dts: renesas: eagle: add SCIF0 pins
>>> [3/3] arm64: dts: renesas: eagle: add EtherAVB pins
>>
>> Hi Sergei,
>>
>> I have marked these patches as deferred pending acceptance of the PFC
>> driver. Please repost or otherwise ping me once that dependency has been
>> accepted.
> 
> Has the dependency blocking this series been resolved yet ?

   Now it is, except for the 3rd patch... Simon, do I need to repost the first 
two?
The 1st one did apply to 4.16-rc1 here with a fuzz...

> (I have patches for the Eagle-V3M which are blocked waiting for the PFC 
> support)
> 
> --
> Regards
> 
> Kieran

MBR, Sergei

RE: [PATCH/RFC 10/11] ARM: dts: alt: Enable watchdog support

[Fabrizio Castro]

> Subject: [PATCH/RFC 10/11] ARM: dts: alt: Enable watchdog support
>
> Enable the watchdog, so the board can be restarted by a watchdog
> timeout.
>
> Signed-off-by: Geert Uytterhoeven 

Acked-by: Fabrizio Castro 

> ---
>  arch/arm/boot/dts/r8a7794-alt.dts | 5 +
>  1 file changed, 5 insertions(+)
>
> diff --git a/arch/arm/boot/dts/r8a7794-alt.dts 
> b/arch/arm/boot/dts/r8a7794-alt.dts
> index 60c6515c499660eb..fdc4a311648dc30d 100644
> --- a/arch/arm/boot/dts/r8a7794-alt.dts
> +++ b/arch/arm/boot/dts/r8a7794-alt.dts
> @@ -295,6 +295,11 @@
>  status = "okay";
>  };
>
> + {
> +timeout-sec = <60>;
> +status = "okay";
> +};
> +
>   {
>  pinctrl-0 = <_pins>;
>  pinctrl-1 = <_pins_uhs>;
> --
> 2.7.4




Renesas Electronics Europe Ltd, Dukes Meadow, Millboard Road, Bourne End, 
Buckinghamshire, SL8 5FH, UK. Registered in England & Wales under Registered 
No. 04586709.

RE: [PATCH/RFC 11/11] ARM: dts: silk: Enable watchdog support

[Fabrizio Castro]

> Subject: [PATCH/RFC 11/11] ARM: dts: silk: Enable watchdog support
>
> Enable the watchdog, so the board can be restarted by a watchdog
> timeout.
>
> Signed-off-by: Geert Uytterhoeven 

Acked-by: Fabrizio Castro 

> ---
>  arch/arm/boot/dts/r8a7794-silk.dts | 5 +
>  1 file changed, 5 insertions(+)
>
> diff --git a/arch/arm/boot/dts/r8a7794-silk.dts 
> b/arch/arm/boot/dts/r8a7794-silk.dts
> index edfad0e5ac53a0c1..993f83c70dedbb30 100644
> --- a/arch/arm/boot/dts/r8a7794-silk.dts
> +++ b/arch/arm/boot/dts/r8a7794-silk.dts
> @@ -457,6 +457,11 @@
>  };
>  };
>
> + {
> +timeout-sec = <60>;
> +status = "okay";
> +};
> +
>   {
>  shared-pin;
>  };
> --
> 2.7.4




Renesas Electronics Europe Ltd, Dukes Meadow, Millboard Road, Bourne End, 
Buckinghamshire, SL8 5FH, UK. Registered in England & Wales under Registered 
No. 04586709.

RE: [PATCH/RFC 08/11] ARM: dts: wheat: Enable watchdog support

[Fabrizio Castro]

> Subject: [PATCH/RFC 08/11] ARM: dts: wheat: Enable watchdog support
>
> Enable the watchdog, so the board can be restarted by a watchdog
> timeout.
>
> Signed-off-by: Geert Uytterhoeven 

Acked-by: Fabrizio Castro 

> ---
>  arch/arm/boot/dts/r8a7792-wheat.dts | 5 +
>  1 file changed, 5 insertions(+)
>
> diff --git a/arch/arm/boot/dts/r8a7792-wheat.dts 
> b/arch/arm/boot/dts/r8a7792-wheat.dts
> index b9471b67b72829de..293b9e3b3e70d7b8 100644
> --- a/arch/arm/boot/dts/r8a7792-wheat.dts
> +++ b/arch/arm/boot/dts/r8a7792-wheat.dts
> @@ -168,6 +168,11 @@
>  };
>  };
>
> + {
> +timeout-sec = <60>;
> +status = "okay";
> +};
> +
>   {
>  pinctrl-0 = <_pins>;
>  pinctrl-names = "default";
> --
> 2.7.4




Renesas Electronics Europe Ltd, Dukes Meadow, Millboard Road, Bourne End, 
Buckinghamshire, SL8 5FH, UK. Registered in England & Wales under Registered 
No. 04586709.

RE: [PATCH/RFC 09/11] ARM: dts: gose: Enable watchdog support

[Fabrizio Castro]

> Subject: [PATCH/RFC 09/11] ARM: dts: gose: Enable watchdog support
>
> Enable the watchdog, so the board can be restarted by a watchdog
> timeout.
>
> Signed-off-by: Geert Uytterhoeven 

Acked-by: Fabrizio Castro 

> ---
>  arch/arm/boot/dts/r8a7793-gose.dts | 5 +
>  1 file changed, 5 insertions(+)
>
> diff --git a/arch/arm/boot/dts/r8a7793-gose.dts 
> b/arch/arm/boot/dts/r8a7793-gose.dts
> index 51b3ffac8efaad1d..1c8b4f1b5257216c 100644
> --- a/arch/arm/boot/dts/r8a7793-gose.dts
> +++ b/arch/arm/boot/dts/r8a7793-gose.dts
> @@ -446,6 +446,11 @@
>  status = "okay";
>  };
>
> + {
> +timeout-sec = <60>;
> +status = "okay";
> +};
> +
>   {
>  pinctrl-0 = <_pins>;
>  pinctrl-names = "default";
> --
> 2.7.4




Renesas Electronics Europe Ltd, Dukes Meadow, Millboard Road, Bourne End, 
Buckinghamshire, SL8 5FH, UK. Registered in England & Wales under Registered 
No. 04586709.

RE: [PATCH/RFC 07/11] ARM: dts: blanche: Enable watchdog support

[Fabrizio Castro]

> Subject: [PATCH/RFC 07/11] ARM: dts: blanche: Enable watchdog support
>
> Enable the watchdog, so the board can be restarted by a watchdog
> timeout.
>
> Signed-off-by: Geert Uytterhoeven 

Acked-by: Fabrizio Castro 

> ---
>  arch/arm/boot/dts/r8a7792-blanche.dts | 5 +
>  1 file changed, 5 insertions(+)
>
> diff --git a/arch/arm/boot/dts/r8a7792-blanche.dts 
> b/arch/arm/boot/dts/r8a7792-blanche.dts
> index 9b67dca6c9ef550d..04fb70931b3b0772 100644
> --- a/arch/arm/boot/dts/r8a7792-blanche.dts
> +++ b/arch/arm/boot/dts/r8a7792-blanche.dts
> @@ -239,6 +239,11 @@
>  };
>  };
>
> + {
> +timeout-sec = <60>;
> +status = "okay";
> +};
> +
>   {
>  pinctrl-0 = <_pins>;
>  pinctrl-names = "default";
> --
> 2.7.4




Renesas Electronics Europe Ltd, Dukes Meadow, Millboard Road, Bourne End, 
Buckinghamshire, SL8 5FH, UK. Registered in England & Wales under Registered 
No. 04586709.

RE: [PATCH/RFC 06/11] ARM: dts: porter: Enable watchdog support

[Fabrizio Castro]

> Subject: [PATCH/RFC 06/11] ARM: dts: porter: Enable watchdog support
>
> Enable the watchdog, so the board can be restarted by a watchdog
> timeout.
>
> Signed-off-by: Geert Uytterhoeven 

Acked-by: Fabrizio Castro 

> ---
>  arch/arm/boot/dts/r8a7791-porter.dts | 5 +
>  1 file changed, 5 insertions(+)
>
> diff --git a/arch/arm/boot/dts/r8a7791-porter.dts 
> b/arch/arm/boot/dts/r8a7791-porter.dts
> index 9a02d03b23c2b7e9..7d06fb24bcdf2fee 100644
> --- a/arch/arm/boot/dts/r8a7791-porter.dts
> +++ b/arch/arm/boot/dts/r8a7791-porter.dts
> @@ -449,6 +449,11 @@
>  };
>  };
>
> + {
> +timeout-sec = <60>;
> +status = "okay";
> +};
> +
>   {
>  shared-pin;
>  };
> --
> 2.7.4




Renesas Electronics Europe Ltd, Dukes Meadow, Millboard Road, Bourne End, 
Buckinghamshire, SL8 5FH, UK. Registered in England & Wales under Registered 
No. 04586709.

RE: [PATCH/RFC 05/11] ARM: dts: koelsch: Enable watchdog support

[Fabrizio Castro]

> Subject: [PATCH/RFC 05/11] ARM: dts: koelsch: Enable watchdog support
>
> Enable the watchdog, so the board can be restarted by a watchdog
> timeout.
>
> Signed-off-by: Geert Uytterhoeven 

Acked-by: Fabrizio Castro 

> ---
>  arch/arm/boot/dts/r8a7791-koelsch.dts | 5 +
>  1 file changed, 5 insertions(+)
>
> diff --git a/arch/arm/boot/dts/r8a7791-koelsch.dts 
> b/arch/arm/boot/dts/r8a7791-koelsch.dts
> index a50924d12b6f37d5..c90462dbcd36c836 100644
> --- a/arch/arm/boot/dts/r8a7791-koelsch.dts
> +++ b/arch/arm/boot/dts/r8a7791-koelsch.dts
> @@ -499,6 +499,11 @@
>  status = "okay";
>  };
>
> + {
> +timeout-sec = <60>;
> +status = "okay";
> +};
> +
>   {
>  status = "okay";
>  };
> --
> 2.7.4




Renesas Electronics Europe Ltd, Dukes Meadow, Millboard Road, Bourne End, 
Buckinghamshire, SL8 5FH, UK. Registered in England & Wales under Registered 
No. 04586709.

RE: [PATCH/RFC 04/11] ARM: dts: lager: Enable watchdog support

[Fabrizio Castro]

> Subject: [PATCH/RFC 04/11] ARM: dts: lager: Enable watchdog support
>
> Enable the watchdog, so the board can be restarted by a watchdog
> timeout.
>
> Signed-off-by: Geert Uytterhoeven 

Acked-by: Fabrizio Castro 

> ---
>  arch/arm/boot/dts/r8a7790-lager.dts | 5 +
>  1 file changed, 5 insertions(+)
>
> diff --git a/arch/arm/boot/dts/r8a7790-lager.dts 
> b/arch/arm/boot/dts/r8a7790-lager.dts
> index 7892b113ecaa14c6..4d8fb09fdbb816a5 100644
> --- a/arch/arm/boot/dts/r8a7790-lager.dts
> +++ b/arch/arm/boot/dts/r8a7790-lager.dts
> @@ -860,6 +860,11 @@
>  };
>  };
>
> + {
> +timeout-sec = <60>;
> +status = "okay";
> +};
> +
>   {
>  shared-pin;
>  };
> --
> 2.7.4




Renesas Electronics Europe Ltd, Dukes Meadow, Millboard Road, Bourne End, 
Buckinghamshire, SL8 5FH, UK. Registered in England & Wales under Registered 
No. 04586709.

RE: [PATCH/RFC 03/11] ARM: dts: r8a7793: Add RWDT node

[Fabrizio Castro]

> Subject: [PATCH/RFC 03/11] ARM: dts: r8a7793: Add RWDT node
>
> Add a device node for the Watchdog Timer (WDT) controller on the Renesas
> R-Car M2-N (r8a7793) SoC.
>
> Signed-off-by: Geert Uytterhoeven 

Acked-by: Fabrizio Castro 

> ---
>  arch/arm/boot/dts/r8a7793.dtsi | 10 ++
>  1 file changed, 10 insertions(+)
>
> diff --git a/arch/arm/boot/dts/r8a7793.dtsi b/arch/arm/boot/dts/r8a7793.dtsi
> index f0e0415682f89440..5a06ad1788b27ff1 100644
> --- a/arch/arm/boot/dts/r8a7793.dtsi
> +++ b/arch/arm/boot/dts/r8a7793.dtsi
> @@ -126,6 +126,16 @@
>  #size-cells = <2>;
>  ranges;
>
> +rwdt: watchdog@e602 {
> +compatible = "renesas,r8a7793-wdt",
> + "renesas,rcar-gen2-wdt";
> +reg = <0 0xe602 0 0x0c>;
> +clocks = < CPG_MOD 402>;
> +power-domains = < R8A7793_PD_ALWAYS_ON>;
> +resets = < 402>;
> +status = "disabled";
> +};
> +
>  gpio0: gpio@e605 {
>  compatible = "renesas,gpio-r8a7793",
>   "renesas,rcar-gen2-gpio";
> --
> 2.7.4




Renesas Electronics Europe Ltd, Dukes Meadow, Millboard Road, Bourne End, 
Buckinghamshire, SL8 5FH, UK. Registered in England & Wales under Registered 
No. 04586709.

RE: [PATCH/RFC 02/11] ARM: dts: r8a7792: Add RWDT node

[Fabrizio Castro]

> Subject: [PATCH/RFC 02/11] ARM: dts: r8a7792: Add RWDT node
>
> Add a device node for the Watchdog Timer (WDT) controller on the Renesas
> R-Car V2H (r8a7792) SoC.
>
> Signed-off-by: Geert Uytterhoeven 

Acked-by: Fabrizio Castro 

> ---
>  arch/arm/boot/dts/r8a7792.dtsi | 10 ++
>  1 file changed, 10 insertions(+)
>
> diff --git a/arch/arm/boot/dts/r8a7792.dtsi b/arch/arm/boot/dts/r8a7792.dtsi
> index bea0f12f03d36195..d2cf8dd2d9b03624 100644
> --- a/arch/arm/boot/dts/r8a7792.dtsi
> +++ b/arch/arm/boot/dts/r8a7792.dtsi
> @@ -101,6 +101,16 @@
>  #size-cells = <2>;
>  ranges;
>
> +rwdt: watchdog@e602 {
> +compatible = "renesas,r8a7792-wdt",
> + "renesas,rcar-gen2-wdt";
> +reg = <0 0xe602 0 0x0c>;
> +clocks = < CPG_MOD 402>;
> +power-domains = < R8A7792_PD_ALWAYS_ON>;
> +resets = < 402>;
> +status = "disabled";
> +};
> +
>  gpio0: gpio@e605 {
>  compatible = "renesas,gpio-r8a7792",
>   "renesas,rcar-gen2-gpio";
> --
> 2.7.4




Renesas Electronics Europe Ltd, Dukes Meadow, Millboard Road, Bourne End, 
Buckinghamshire, SL8 5FH, UK. Registered in England & Wales under Registered 
No. 04586709.

RE: [PATCH/RFC 01/11] clk: renesas: r8a7792: Add rwdt clock

[Fabrizio Castro]

> Subject: [PATCH/RFC 01/11] clk: renesas: r8a7792: Add rwdt clock
>
> Add "rwdt" clock to r8a7792_mod_clks. Also, since we may need to access
> the watchdog registers at any time, declare the clock as critical.
>
> Signed-off-by: Geert Uytterhoeven 

Acked-by: Fabrizio Castro 

> ---
>  drivers/clk/renesas/r8a7792-cpg-mssr.c | 2 ++
>  1 file changed, 2 insertions(+)
>
> diff --git a/drivers/clk/renesas/r8a7792-cpg-mssr.c 
> b/drivers/clk/renesas/r8a7792-cpg-mssr.c
> index 7f85bbf20bf782b7..609a540804965c40 100644
> --- a/drivers/clk/renesas/r8a7792-cpg-mssr.c
> +++ b/drivers/clk/renesas/r8a7792-cpg-mssr.c
> @@ -98,6 +98,7 @@ static const struct mssr_mod_clk r8a7792_mod_clks[] 
> __initconst = {
>  DEF_MOD("tpu0", 304,R8A7792_CLK_CP),
>  DEF_MOD("sdhi0", 314,R8A7792_CLK_SD),
>  DEF_MOD("cmt1", 329,R8A7792_CLK_R),
> +DEF_MOD("rwdt", 402,R8A7792_CLK_R),
>  DEF_MOD("irqc", 407,R8A7792_CLK_CP),
>  DEF_MOD("intc-sys", 408,R8A7792_CLK_ZS),
>  DEF_MOD("audio-dmac0", 502,R8A7792_CLK_HP),
> @@ -154,6 +155,7 @@ static const struct mssr_mod_clk r8a7792_mod_clks[] 
> __initconst = {
>  };
>
>  static const unsigned int r8a7792_crit_mod_clks[] __initconst = {
> +MOD_CLK_ID(402),/* RWDT */
>  MOD_CLK_ID(408),/* INTC-SYS (GIC) */
>  };
>
> --
> 2.7.4




Renesas Electronics Europe Ltd, Dukes Meadow, Millboard Road, Bourne End, 
Buckinghamshire, SL8 5FH, UK. Registered in England & Wales under Registered 
No. 04586709.

[PATCH v5 25/26] ARM: dts: iwg20m: Add watchdog support to SoM dtsi

[Fabrizio Castro]

This patch enables the watchdog from within the iwg20m SoM dtsi.

Signed-off-by: Fabrizio Castro 
Signed-off-by: Ramesh Shanmugasundaram 
Reviewed-by: Geert Uytterhoeven 
Reviewed-by: Wolfram Sang 
---
v4->v5:
* no change

 arch/arm/boot/dts/r8a7743-iwg20m.dtsi | 5 +
 1 file changed, 5 insertions(+)

diff --git a/arch/arm/boot/dts/r8a7743-iwg20m.dtsi 
b/arch/arm/boot/dts/r8a7743-iwg20m.dtsi
index 1d3e950..d364685 100644
--- a/arch/arm/boot/dts/r8a7743-iwg20m.dtsi
+++ b/arch/arm/boot/dts/r8a7743-iwg20m.dtsi
@@ -91,6 +91,11 @@
};
 };
 
+ {
+   timeout-sec = <60>;
+   status = "okay";
+};
+
  {
pinctrl-0 = <_pins>;
pinctrl-names = "default";
-- 
2.7.4

[PATCH v5 16/26] clk: renesas: r8a7745: Add rwdt clock

[Fabrizio Castro]

Add "rwdt" clock to r8a7745_mod_clks. Also, since we may need to access
the watchdog registers at any time, declare the clock as critical.

Signed-off-by: Fabrizio Castro 
Signed-off-by: Ramesh Shanmugasundaram 
Reviewed-by: Wolfram Sang 
---
v4->v5:
* no change

 drivers/clk/renesas/r8a7745-cpg-mssr.c | 2 ++
 1 file changed, 2 insertions(+)

diff --git a/drivers/clk/renesas/r8a7745-cpg-mssr.c 
b/drivers/clk/renesas/r8a7745-cpg-mssr.c
index 2859504..87f5a36 100644
--- a/drivers/clk/renesas/r8a7745-cpg-mssr.c
+++ b/drivers/clk/renesas/r8a7745-cpg-mssr.c
@@ -114,6 +114,7 @@ static const struct mssr_mod_clk r8a7745_mod_clks[] 
__initconst = {
DEF_MOD("cmt1",  329,   R8A7745_CLK_R),
DEF_MOD("usbhs-dmac0",   330,   R8A7745_CLK_HP),
DEF_MOD("usbhs-dmac1",   331,   R8A7745_CLK_HP),
+   DEF_MOD("rwdt",  402,   R8A7745_CLK_R),
DEF_MOD("irqc",  407,   R8A7745_CLK_CP),
DEF_MOD("intc-sys",  408,   R8A7745_CLK_ZS),
DEF_MOD("audio-dmac0",   502,   R8A7745_CLK_HP),
@@ -180,6 +181,7 @@ static const struct mssr_mod_clk r8a7745_mod_clks[] 
__initconst = {
 };
 
 static const unsigned int r8a7745_crit_mod_clks[] __initconst = {
+   MOD_CLK_ID(402),/* RWDT */
MOD_CLK_ID(408),/* INTC-SYS (GIC) */
 };
 
-- 
2.7.4

[PATCH v5 26/26] ARM: dts: iwg22m: Add watchdog support to SoM dtsi

[Fabrizio Castro]

This patch enables the watchdog from within the iwg20m SoM dtsi.

Signed-off-by: Fabrizio Castro 
Signed-off-by: Ramesh Shanmugasundaram 
Reviewed-by: Geert Uytterhoeven 
Reviewed-by: Wolfram Sang 
---
v4->v5:
* no change

 arch/arm/boot/dts/r8a7745-iwg22m.dtsi | 5 +
 1 file changed, 5 insertions(+)

diff --git a/arch/arm/boot/dts/r8a7745-iwg22m.dtsi 
b/arch/arm/boot/dts/r8a7745-iwg22m.dtsi
index 8d0a392b..29b6e10 100644
--- a/arch/arm/boot/dts/r8a7745-iwg22m.dtsi
+++ b/arch/arm/boot/dts/r8a7745-iwg22m.dtsi
@@ -91,6 +91,11 @@
};
 };
 
+ {
+   timeout-sec = <60>;
+   status = "okay";
+};
+
  {
pinctrl-0 = <_pins>;
pinctrl-names = "default";
-- 
2.7.4

[PATCH v5 18/26] clk: renesas: r8a7791/r8a7793: Add rwdt clock

[Fabrizio Castro]

Add "rwdt" clock to r8a7791_mod_clks. Also, since we may need to access
the watchdog registers at any time, declare the clock as critical.

Signed-off-by: Fabrizio Castro 
Signed-off-by: Ramesh Shanmugasundaram 
Reviewed-by: Wolfram Sang 
---
v4->v5:
* no change

 drivers/clk/renesas/r8a7791-cpg-mssr.c | 2 ++
 1 file changed, 2 insertions(+)

diff --git a/drivers/clk/renesas/r8a7791-cpg-mssr.c 
b/drivers/clk/renesas/r8a7791-cpg-mssr.c
index c0b51f9..820b220 100644
--- a/drivers/clk/renesas/r8a7791-cpg-mssr.c
+++ b/drivers/clk/renesas/r8a7791-cpg-mssr.c
@@ -128,6 +128,7 @@ static const struct mssr_mod_clk r8a7791_mod_clks[] 
__initconst = {
DEF_MOD("cmt1",  329,   R8A7791_CLK_R),
DEF_MOD("usbhs-dmac0",   330,   R8A7791_CLK_HP),
DEF_MOD("usbhs-dmac1",   331,   R8A7791_CLK_HP),
+   DEF_MOD("rwdt",  402,   R8A7791_CLK_R),
DEF_MOD("irqc",  407,   R8A7791_CLK_CP),
DEF_MOD("intc-sys",  408,   R8A7791_CLK_ZS),
DEF_MOD("audio-dmac1",   501,   R8A7791_CLK_HP),
@@ -209,6 +210,7 @@ static const struct mssr_mod_clk r8a7791_mod_clks[] 
__initconst = {
 };
 
 static const unsigned int r8a7791_crit_mod_clks[] __initconst = {
+   MOD_CLK_ID(402),/* RWDT */
MOD_CLK_ID(408),/* INTC-SYS (GIC) */
 };
 
-- 
2.7.4

[PATCH v5 21/26] ARM: dts: r8a7745: Add watchdog support to SoC dtsi

[Fabrizio Castro]

This patch adds watchdog support to the r8a7745 SoC dtsi.

Signed-off-by: Fabrizio Castro 
Signed-off-by: Ramesh Shanmugasundaram 
Reviewed-by: Geert Uytterhoeven 
Acked-by: Wolfram Sang 
---
v4->v5:
* no change

 arch/arm/boot/dts/r8a7745.dtsi | 10 ++
 1 file changed, 10 insertions(+)

diff --git a/arch/arm/boot/dts/r8a7745.dtsi b/arch/arm/boot/dts/r8a7745.dtsi
index 6bc1cf4..5d1b8f2 100644
--- a/arch/arm/boot/dts/r8a7745.dtsi
+++ b/arch/arm/boot/dts/r8a7745.dtsi
@@ -321,6 +321,16 @@
reg = <0 0xe616 0 0x100>;
};
 
+   rwdt: watchdog@e602 {
+   compatible = "renesas,r8a7745-wdt",
+"renesas,rcar-gen2-wdt";
+   reg = <0 0xe602 0 0x0c>;
+   clocks = < CPG_MOD 402>;
+   power-domains = < R8A7745_PD_ALWAYS_ON>;
+   resets = < 402>;
+   status = "disabled";
+   };
+
sysc: system-controller@e618 {
compatible = "renesas,r8a7745-sysc";
reg = <0 0xe618 0 0x200>;
-- 
2.7.4

[PATCH v5 24/26] ARM: dts: r8a7794: Add watchdog support to SoC dtsi

[Fabrizio Castro]

This commit adds watchdog support to the r8a7794 dtsi.

Signed-off-by: Fabrizio Castro 
Signed-off-by: Ramesh Shanmugasundaram 
Reviewed-by: Geert Uytterhoeven 
Acked-by: Wolfram Sang 
---
v4->v5:
* no change

 arch/arm/boot/dts/r8a7794.dtsi | 10 ++
 1 file changed, 10 insertions(+)

diff --git a/arch/arm/boot/dts/r8a7794.dtsi b/arch/arm/boot/dts/r8a7794.dtsi
index e47c5f4..1c9b149 100644
--- a/arch/arm/boot/dts/r8a7794.dtsi
+++ b/arch/arm/boot/dts/r8a7794.dtsi
@@ -119,6 +119,16 @@
#size-cells = <2>;
ranges;
 
+   rwdt: watchdog@e602 {
+   compatible = "renesas,r8a7794-wdt",
+"renesas,rcar-gen2-wdt";
+   reg = <0 0xe602 0 0x0c>;
+   clocks = < CPG_MOD 402>;
+   power-domains = < R8A7794_PD_ALWAYS_ON>;
+   resets = < 402>;
+   status = "disabled";
+   };
+
gpio0: gpio@e605 {
compatible = "renesas,gpio-r8a7794",
 "renesas,rcar-gen2-gpio";
-- 
2.7.4

[PATCH v5 23/26] ARM: dts: r8a7791: Add watchdog support to SoC dtsi

[Fabrizio Castro]

This commit adds watchdog support to the r8a7791 dtsi.

Signed-off-by: Fabrizio Castro 
Signed-off-by: Ramesh Shanmugasundaram 
Reviewed-by: Geert Uytterhoeven 
Acked-by: Wolfram Sang 
---
v4->v5:
* no change

 arch/arm/boot/dts/r8a7791.dtsi | 10 ++
 1 file changed, 10 insertions(+)

diff --git a/arch/arm/boot/dts/r8a7791.dtsi b/arch/arm/boot/dts/r8a7791.dtsi
index d2a4546..80e20ecd 100644
--- a/arch/arm/boot/dts/r8a7791.dtsi
+++ b/arch/arm/boot/dts/r8a7791.dtsi
@@ -142,6 +142,16 @@
#size-cells = <2>;
ranges;
 
+   rwdt: watchdog@e602 {
+   compatible = "renesas,r8a7791-wdt",
+"renesas,rcar-gen2-wdt";
+   reg = <0 0xe602 0 0x0c>;
+   clocks = < CPG_MOD 402>;
+   power-domains = < R8A7791_PD_ALWAYS_ON>;
+   resets = < 402>;
+   status = "disabled";
+   };
+
gpio0: gpio@e605 {
compatible = "renesas,gpio-r8a7791",
 "renesas,rcar-gen2-gpio";
-- 
2.7.4

[PATCH v5 20/26] ARM: dts: r8a7743: Add watchdog support to SoC dtsi

[Fabrizio Castro]

This patch adds watchdog support to the r8a7743 SoC dtsi.

Signed-off-by: Fabrizio Castro 
Signed-off-by: Ramesh Shanmugasundaram 
Reviewed-by: Geert Uytterhoeven 
Acked-by: Wolfram Sang 
---
v4->v5:
* no change

 arch/arm/boot/dts/r8a7743.dtsi | 10 ++
 1 file changed, 10 insertions(+)

diff --git a/arch/arm/boot/dts/r8a7743.dtsi b/arch/arm/boot/dts/r8a7743.dtsi
index c2943d7..1d4505f 100644
--- a/arch/arm/boot/dts/r8a7743.dtsi
+++ b/arch/arm/boot/dts/r8a7743.dtsi
@@ -368,6 +368,16 @@
reg = <0 0xe616 0 0x100>;
};
 
+   rwdt: watchdog@e602 {
+   compatible = "renesas,r8a7743-wdt",
+"renesas,rcar-gen2-wdt";
+   reg = <0 0xe602 0 0x0c>;
+   clocks = < CPG_MOD 402>;
+   power-domains = < R8A7743_PD_ALWAYS_ON>;
+   resets = < 402>;
+   status = "disabled";
+   };
+
sysc: system-controller@e618 {
compatible = "renesas,r8a7743-sysc";
reg = <0 0xe618 0 0x200>;
-- 
2.7.4

[PATCH v5 22/26] ARM: dts: r8a7790: Add watchdog support to SoC dtsi

[Fabrizio Castro]

This commit adds watchdog support to the r8a7790 dtsi.

Signed-off-by: Fabrizio Castro 
Signed-off-by: Ramesh Shanmugasundaram 
Reviewed-by: Geert Uytterhoeven 
Acked-by: Wolfram Sang 
---
v4->v5:
* no change

 arch/arm/boot/dts/r8a7790.dtsi | 10 ++
 1 file changed, 10 insertions(+)

diff --git a/arch/arm/boot/dts/r8a7790.dtsi b/arch/arm/boot/dts/r8a7790.dtsi
index a84bf35..83d6704 100644
--- a/arch/arm/boot/dts/r8a7790.dtsi
+++ b/arch/arm/boot/dts/r8a7790.dtsi
@@ -218,6 +218,16 @@
#size-cells = <2>;
ranges;
 
+   rwdt: watchdog@e602 {
+   compatible = "renesas,r8a7790-wdt",
+"renesas,rcar-gen2-wdt";
+   reg = <0 0xe602 0 0x0c>;
+   clocks = < CPG_MOD 402>;
+   power-domains = < R8A7790_PD_ALWAYS_ON>;
+   resets = < 402>;
+   status = "disabled";
+   };
+
gpio0: gpio@e605 {
compatible = "renesas,gpio-r8a7790",
 "renesas,rcar-gen2-gpio";
-- 
2.7.4

[PATCH v5 19/26] clk: renesas: r8a7794: Add rwdt clock

[Fabrizio Castro]

Add "rwdt" clock to r8a7794_mod_clks. Also, since we may need to access
the watchdog registers at any time, declare the clock as critical.

Signed-off-by: Fabrizio Castro 
Signed-off-by: Ramesh Shanmugasundaram 
Reviewed-by: Wolfram Sang 
---
v4->v5:
* no change

 drivers/clk/renesas/r8a7794-cpg-mssr.c | 2 ++
 1 file changed, 2 insertions(+)

diff --git a/drivers/clk/renesas/r8a7794-cpg-mssr.c 
b/drivers/clk/renesas/r8a7794-cpg-mssr.c
index ec091a4..2a40bbe 100644
--- a/drivers/clk/renesas/r8a7794-cpg-mssr.c
+++ b/drivers/clk/renesas/r8a7794-cpg-mssr.c
@@ -121,6 +121,7 @@ static const struct mssr_mod_clk r8a7794_mod_clks[] 
__initconst = {
DEF_MOD("cmt1",  329,   R8A7794_CLK_R),
DEF_MOD("usbhs-dmac0",   330,   R8A7794_CLK_HP),
DEF_MOD("usbhs-dmac1",   331,   R8A7794_CLK_HP),
+   DEF_MOD("rwdt",  402,   R8A7794_CLK_R),
DEF_MOD("irqc",  407,   R8A7794_CLK_CP),
DEF_MOD("intc-sys",  408,   R8A7794_CLK_ZS),
DEF_MOD("audio-dmac0",   502,   R8A7794_CLK_HP),
@@ -190,6 +191,7 @@ static const struct mssr_mod_clk r8a7794_mod_clks[] 
__initconst = {
 };
 
 static const unsigned int r8a7794_crit_mod_clks[] __initconst = {
+   MOD_CLK_ID(402),/* RWDT */
MOD_CLK_ID(408),/* INTC-SYS (GIC) */
 };
 
-- 
2.7.4

[PATCH v5 17/26] clk: renesas: r8a7790: Add rwdt clock

[Fabrizio Castro]

Add "rwdt" clock to r8a7790_mod_clks. Also, since we may need to access
the watchdog registers at any time, declare the clock as critical.

Signed-off-by: Fabrizio Castro 
Signed-off-by: Ramesh Shanmugasundaram 
Reviewed-by: Wolfram Sang 
---
v4->v5:
* no change

 drivers/clk/renesas/r8a7790-cpg-mssr.c | 2 ++
 1 file changed, 2 insertions(+)

diff --git a/drivers/clk/renesas/r8a7790-cpg-mssr.c 
b/drivers/clk/renesas/r8a7790-cpg-mssr.c
index 46bb55b..f936cb7 100644
--- a/drivers/clk/renesas/r8a7790-cpg-mssr.c
+++ b/drivers/clk/renesas/r8a7790-cpg-mssr.c
@@ -140,6 +140,7 @@ static const struct mssr_mod_clk r8a7790_mod_clks[] 
__initconst = {
DEF_MOD("cmt1",  329,   R8A7790_CLK_R),
DEF_MOD("usbhs-dmac0",   330,   R8A7790_CLK_HP),
DEF_MOD("usbhs-dmac1",   331,   R8A7790_CLK_HP),
+   DEF_MOD("rwdt",  402,   R8A7790_CLK_R),
DEF_MOD("irqc",  407,   R8A7790_CLK_CP),
DEF_MOD("intc-sys",  408,   R8A7790_CLK_ZS),
DEF_MOD("audio-dmac1",   501,   R8A7790_CLK_HP),
@@ -211,6 +212,7 @@ static const struct mssr_mod_clk r8a7790_mod_clks[] 
__initconst = {
 };
 
 static const unsigned int r8a7790_crit_mod_clks[] __initconst = {
+   MOD_CLK_ID(402),/* RWDT */
MOD_CLK_ID(408),/* INTC-SYS (GIC) */
 };
 
-- 
2.7.4

[PATCH v5 15/26] clk: renesas: r8a7743: Add rwdt clock

[Fabrizio Castro]

Add "rwdt" clock to r8a7743_mod_clks. Also, since we may need to access
the watchdog registers at any time, declare the clock as critical.

Signed-off-by: Fabrizio Castro 
Signed-off-by: Ramesh Shanmugasundaram 
Reviewed-by: Wolfram Sang 
---
v4->v5:
* no change

 drivers/clk/renesas/r8a7743-cpg-mssr.c | 2 ++
 1 file changed, 2 insertions(+)

diff --git a/drivers/clk/renesas/r8a7743-cpg-mssr.c 
b/drivers/clk/renesas/r8a7743-cpg-mssr.c
index 6dc0b30..d3c8b1e 100644
--- a/drivers/clk/renesas/r8a7743-cpg-mssr.c
+++ b/drivers/clk/renesas/r8a7743-cpg-mssr.c
@@ -117,6 +117,7 @@ static const struct mssr_mod_clk r8a7743_mod_clks[] 
__initconst = {
DEF_MOD("cmt1",  329,   R8A7743_CLK_R),
DEF_MOD("usbhs-dmac0",   330,   R8A7743_CLK_HP),
DEF_MOD("usbhs-dmac1",   331,   R8A7743_CLK_HP),
+   DEF_MOD("rwdt",  402,   R8A7743_CLK_R),
DEF_MOD("irqc",  407,   R8A7743_CLK_CP),
DEF_MOD("intc-sys",  408,   R8A7743_CLK_ZS),
DEF_MOD("audio-dmac1",   501,   R8A7743_CLK_HP),
@@ -195,6 +196,7 @@ static const struct mssr_mod_clk r8a7743_mod_clks[] 
__initconst = {
 };
 
 static const unsigned int r8a7743_crit_mod_clks[] __initconst = {
+   MOD_CLK_ID(402),/* RWDT */
MOD_CLK_ID(408),/* INTC-SYS (GIC) */
 };
 
-- 
2.7.4

[PATCH v5 14/26] ARM: shmobile: defconfig: Enable RENESAS_WDT_GEN

[Fabrizio Castro]

R-Car Gen2 and RZ/G1 platforms come with a watchdog IP, therefore enable
its driver by default.

Signed-off-by: Fabrizio Castro 
Signed-off-by: Ramesh Shanmugasundaram 
Reviewed-by: Wolfram Sang 
---
v4->v5:
* no change

 arch/arm/configs/shmobile_defconfig | 1 +
 1 file changed, 1 insertion(+)

diff --git a/arch/arm/configs/shmobile_defconfig 
b/arch/arm/configs/shmobile_defconfig
index 578434c..d5cdad8 100644
--- a/arch/arm/configs/shmobile_defconfig
+++ b/arch/arm/configs/shmobile_defconfig
@@ -132,6 +132,7 @@ CONFIG_CPU_THERMAL=y
 CONFIG_RCAR_THERMAL=y
 CONFIG_WATCHDOG=y
 CONFIG_DA9063_WATCHDOG=y
+CONFIG_RENESAS_WDT=y
 CONFIG_MFD_AS3711=y
 CONFIG_MFD_DA9063=y
 CONFIG_REGULATOR_FIXED_VOLTAGE=y
-- 
2.7.4

[PATCH v5 13/26] watchdog: renesas_wdt: Add restart handler

[Fabrizio Castro]

On iWave's boards iwg20d and iwg22d the only way to reboot the system is
by means of the watchdog.
This patch adds a restart handler to rwdt_ops, and also makes sure we
keep its priority to a medium level, in order to not override other more
effective handlers.

Signed-off-by: Fabrizio Castro 
Signed-off-by: Ramesh Shanmugasundaram 
Reviewed-by: Guenter Roeck 
---
v4->v5:
* changed rwdt_restart implementation as per Wolfram comments

 drivers/watchdog/renesas_wdt.c | 12 
 1 file changed, 12 insertions(+)

diff --git a/drivers/watchdog/renesas_wdt.c b/drivers/watchdog/renesas_wdt.c
index e972b7b..0f88614 100644
--- a/drivers/watchdog/renesas_wdt.c
+++ b/drivers/watchdog/renesas_wdt.c
@@ -107,6 +107,16 @@ static unsigned int rwdt_get_timeleft(struct 
watchdog_device *wdev)
return DIV_BY_CLKS_PER_SEC(priv, 65536 - val);
 }
 
+static int rwdt_restart(struct watchdog_device *wdev, unsigned long action,
+   void *data)
+{
+   struct rwdt_priv *priv = watchdog_get_drvdata(wdev);
+
+   rwdt_start(wdev);
+   rwdt_write(priv, 0x, RWTCNT);
+   return 0;
+}
+
 static const struct watchdog_info rwdt_ident = {
.options = WDIOF_MAGICCLOSE | WDIOF_KEEPALIVEPING | WDIOF_SETTIMEOUT,
.identity = "Renesas WDT Watchdog",
@@ -118,6 +128,7 @@ static const struct watchdog_ops rwdt_ops = {
.stop = rwdt_stop,
.ping = rwdt_init_timeout,
.get_timeleft = rwdt_get_timeleft,
+   .restart = rwdt_restart,
 };
 
 static int rwdt_probe(struct platform_device *pdev)
@@ -176,6 +187,7 @@ static int rwdt_probe(struct platform_device *pdev)
platform_set_drvdata(pdev, priv);
watchdog_set_drvdata(>wdev, priv);
watchdog_set_nowayout(>wdev, nowayout);
+   watchdog_set_restart_priority(>wdev, 0);
 
/* This overrides the default timeout only if DT configuration was 
found */
ret = watchdog_init_timeout(>wdev, 0, >dev);
-- 
2.7.4

[PATCH v5 12/26] watchdog: renesas_wdt: Add R-Car Gen2 support

[Fabrizio Castro]

Due to commits:
* "ARM: shmobile: Add watchdog support",
* "ARM: shmobile: rcar-gen2: Add watchdog support", and
* "soc: renesas: rcar-rst: Enable watchdog as reset trigger for Gen2",
we now have everything we needed for the watchdog to work on Gen2 and
RZ/G1.

This commit adds "renesas,rcar-gen2-wdt" as compatible string for R-Car
Gen2 and RZ/G1, and since on those platforms the rwdt clock needs to be
always ON, when suspending to RAM we need to explicitly disable the
counting by clearing TME from RWTCSRA.

Signed-off-by: Fabrizio Castro 
Signed-off-by: Ramesh Shanmugasundaram 
---
v4->v5:
* various improvements suggested by Wolfram

 drivers/watchdog/renesas_wdt.c | 27 ++-
 1 file changed, 22 insertions(+), 5 deletions(-)

diff --git a/drivers/watchdog/renesas_wdt.c b/drivers/watchdog/renesas_wdt.c
index 831ef83..e972b7b 100644
--- a/drivers/watchdog/renesas_wdt.c
+++ b/drivers/watchdog/renesas_wdt.c
@@ -203,13 +203,29 @@ static int rwdt_remove(struct platform_device *pdev)
return 0;
 }
 
-/*
- * This driver does also fit for R-Car Gen2 (r8a779[0-4]) WDT. However, for SMP
- * to work there, one also needs a RESET (RST) driver which does not exist yet
- * due to HW issues. This needs to be solved before adding compatibles here.
- */
+static int __maybe_unused rwdt_suspend(struct device *dev)
+{
+   struct rwdt_priv *priv = dev_get_drvdata(dev);
+
+   if (watchdog_active(>wdev))
+   rwdt_write(priv, priv->cks, RWTCSRA);
+   return 0;
+}
+
+static int __maybe_unused rwdt_resume(struct device *dev)
+{
+   struct rwdt_priv *priv = dev_get_drvdata(dev);
+
+   if (watchdog_active(>wdev))
+   rwdt_write(priv, priv->cks | RWTCSRA_TME, RWTCSRA);
+   return 0;
+}
+
+static SIMPLE_DEV_PM_OPS(rwdt_pm_ops, rwdt_suspend, rwdt_resume);
+
 static const struct of_device_id rwdt_ids[] = {
{ .compatible = "renesas,rcar-gen3-wdt", },
+   { .compatible = "renesas,rcar-gen2-wdt", },
{ /* sentinel */ }
 };
 MODULE_DEVICE_TABLE(of, rwdt_ids);
@@ -218,6 +234,7 @@ static struct platform_driver rwdt_driver = {
.driver = {
.name = "renesas_wdt",
.of_match_table = rwdt_ids,
+   .pm = _pm_ops,
},
.probe = rwdt_probe,
.remove = rwdt_remove,
-- 
2.7.4

[PATCH v5 11/26] dt-bindings: watchdog: renesas-wdt: Add R-Car Gen2 support

[Fabrizio Castro]

This commit documents the compatibility with R-Car Gen2 and RZ/G
devices by defining the generic compatible string "renesas,rcar-gen2-wdt".
Also, this patch expands the list of SoC-specific compatible strings to
include RZ/G and R-Car Gen2 devices.

Signed-off-by: Fabrizio Castro 
Signed-off-by: Ramesh Shanmugasundaram 
Reviewed-by: Geert Uytterhoeven 
Reviewed-by: Rob Herring 
Reviewed-by: Wolfram Sang 
---
v4->v5:
* no change

 .../devicetree/bindings/watchdog/renesas-wdt.txt  | 19 ++-
 1 file changed, 14 insertions(+), 5 deletions(-)

diff --git a/Documentation/devicetree/bindings/watchdog/renesas-wdt.txt 
b/Documentation/devicetree/bindings/watchdog/renesas-wdt.txt
index bf6d1ca..4815128 100644
--- a/Documentation/devicetree/bindings/watchdog/renesas-wdt.txt
+++ b/Documentation/devicetree/bindings/watchdog/renesas-wdt.txt
@@ -1,17 +1,26 @@
 Renesas Watchdog Timer (WDT) Controller
 
 Required properties:
-- compatible : Should be "renesas,-wdt", and
-  "renesas,rcar-gen3-wdt" or "renesas,rza-wdt" as fallback.
+ - compatible : Must be "renesas,-wdt", followed by a generic
+   fallback compatible string when compatible with the generic
+   version.
   Examples with soctypes are:
+- "renesas,r8a7743-wdt" (RZ/G1M)
+- "renesas,r8a7745-wdt" (RZ/G1E)
+- "renesas,r8a7790-wdt" (R-Car H2)
+- "renesas,r8a7791-wdt" (R-Car M2-W)
+- "renesas,r8a7792-wdt" (R-Car V2H)
+- "renesas,r8a7793-wdt" (R-Car M2-N)
+- "renesas,r8a7794-wdt" (R-Car E2)
 - "renesas,r8a7795-wdt" (R-Car H3)
 - "renesas,r8a7796-wdt" (R-Car M3-W)
 - "renesas,r8a77995-wdt" (R-Car D3)
 - "renesas,r7s72100-wdt" (RZ/A1)
+   The generic compatible string must be:
+- "renesas,rza-wdt" for RZ/A
+- "renesas,rcar-gen2-wdt" for R-Car Gen2 and RZ/G
+- "renesas,rcar-gen3-wdt" for R-Car Gen3
 
-  When compatible with the generic version, nodes must list the SoC-specific
-  version corresponding to the platform first, followed by the generic
-  version.
 
 - reg : Should contain WDT registers location and length
 - clocks : the clock feeding the watchdog timer.
-- 
2.7.4

[PATCH v5 09/26] soc: renesas: rcar-rst: Enable watchdog as reset trigger for Gen2

[Fabrizio Castro]

This patch allows for platform specific quirks as some of the SoC need
further customization for the watchdog to work properly, like for R-Car
Gen2 and for RZ/G.

Signed-off-by: Fabrizio Castro 
Signed-off-by: Ramesh Shanmugasundaram 
---
v4->v5:
* no change

 drivers/soc/renesas/rcar-rst.c | 35 +--
 1 file changed, 29 insertions(+), 6 deletions(-)

diff --git a/drivers/soc/renesas/rcar-rst.c b/drivers/soc/renesas/rcar-rst.c
index 3316b02..93febe6 100644
--- a/drivers/soc/renesas/rcar-rst.c
+++ b/drivers/soc/renesas/rcar-rst.c
@@ -13,8 +13,18 @@
 #include 
 #include 
 
+#define WDTRSTCR_RESET 0xA55A0002
+#define WDTRSTCR   0x0054
+
+static int rcar_rst_enable_wdt_reset(void __iomem *base)
+{
+   iowrite32(WDTRSTCR_RESET, base + WDTRSTCR);
+   return 0;
+}
+
 struct rst_config {
-   unsigned int modemr;/* Mode Monitoring Register Offset */
+   unsigned int modemr;/* Mode Monitoring Register Offset */
+   int (*configure)(void *base);   /* Platform specific configuration */
 };
 
 static const struct rst_config rcar_rst_gen1 __initconst = {
@@ -23,6 +33,11 @@ static const struct rst_config rcar_rst_gen1 __initconst = {
 
 static const struct rst_config rcar_rst_gen2 __initconst = {
.modemr = 0x60,
+   .configure = rcar_rst_enable_wdt_reset,
+};
+
+static const struct rst_config rcar_rst_gen3 __initconst = {
+   .modemr = 0x60,
 };
 
 static const struct of_device_id rcar_rst_matches[] __initconst = {
@@ -38,11 +53,11 @@ static const struct of_device_id rcar_rst_matches[] 
__initconst = {
{ .compatible = "renesas,r8a7792-rst", .data = _rst_gen2 },
{ .compatible = "renesas,r8a7793-rst", .data = _rst_gen2 },
{ .compatible = "renesas,r8a7794-rst", .data = _rst_gen2 },
-   /* R-Car Gen3 is handled like R-Car Gen2 */
-   { .compatible = "renesas,r8a7795-rst", .data = _rst_gen2 },
-   { .compatible = "renesas,r8a7796-rst", .data = _rst_gen2 },
-   { .compatible = "renesas,r8a77970-rst", .data = _rst_gen2 },
-   { .compatible = "renesas,r8a77995-rst", .data = _rst_gen2 },
+   /* R-Car Gen3 */
+   { .compatible = "renesas,r8a7795-rst", .data = _rst_gen3 },
+   { .compatible = "renesas,r8a7796-rst", .data = _rst_gen3 },
+   { .compatible = "renesas,r8a77970-rst", .data = _rst_gen3 },
+   { .compatible = "renesas,r8a77995-rst", .data = _rst_gen3 },
{ /* sentinel */ }
 };
 
@@ -71,6 +86,14 @@ static int __init rcar_rst_init(void)
rcar_rst_base = base;
cfg = match->data;
saved_mode = ioread32(base + cfg->modemr);
+   if (cfg->configure) {
+   error = cfg->configure(base);
+   if (error) {
+   pr_warn("%pOF: Cannot run SoC specific configuration\n",
+   np);
+   goto out_put;
+   }
+   }
 
pr_debug("%pOF: MODE = 0x%08x\n", np, saved_mode);
 
-- 
2.7.4

[PATCH v5 10/26] ARM: shmobile: rcar-gen2: Add watchdog support

[Fabrizio Castro]

This patch adds watchdog support by installing shmobile_boot_vector_gen2
to ICRAM1 when enough memory is available, in which case we also keep a
copy of MPIDR to complete the reset vector logic.

Signed-off-by: Fabrizio Castro 
Signed-off-by: Ramesh Shanmugasundaram 
---
v4->v5:
* reworked comment style

 arch/arm/mach-shmobile/platsmp-apmu.c |  1 +
 arch/arm/mach-shmobile/pm-rcar-gen2.c | 15 ---
 2 files changed, 13 insertions(+), 3 deletions(-)

diff --git a/arch/arm/mach-shmobile/platsmp-apmu.c 
b/arch/arm/mach-shmobile/platsmp-apmu.c
index 4422b61..ba732ef 100644
--- a/arch/arm/mach-shmobile/platsmp-apmu.c
+++ b/arch/arm/mach-shmobile/platsmp-apmu.c
@@ -191,6 +191,7 @@ static void __init shmobile_smp_apmu_setup_boot(void)
 {
/* install boot code shared by all CPUs */
shmobile_boot_fn = __pa_symbol(shmobile_smp_boot);
+   shmobile_boot_fn_gen2 = shmobile_boot_fn;
 }
 
 void __init shmobile_smp_apmu_prepare_cpus(unsigned int max_cpus,
diff --git a/arch/arm/mach-shmobile/pm-rcar-gen2.c 
b/arch/arm/mach-shmobile/pm-rcar-gen2.c
index e5f215c..5a798b4 100644
--- a/arch/arm/mach-shmobile/pm-rcar-gen2.c
+++ b/arch/arm/mach-shmobile/pm-rcar-gen2.c
@@ -17,6 +17,7 @@
 #include 
 #include 
 #include 
+#include 
 #include "common.h"
 #include "rcar-gen2.h"
 
@@ -37,7 +38,6 @@
 #define CA7RESCNT_CODE 0x5a5a
 #define CA7RESCNT_CPUS 0xf /* CPU0-3 */
 
-
 /* On-chip RAM */
 #define ICRAM1 0xe63c  /* Inter Connect RAM1 (4 KiB) */
 
@@ -119,8 +119,17 @@ void __init rcar_gen2_pm_init(void)
p = ioremap(res.start, resource_size());
if (!p)
return;
-
-   memcpy_toio(p, shmobile_boot_vector, shmobile_boot_size);
+   /*
+* install the reset vector, use the largest version if we have enough
+* memory available
+*/
+   if (resource_size() >= shmobile_boot_size_gen2) {
+   shmobile_boot_cpu_gen2 = read_cpuid_mpidr();
+   memcpy_toio(p, shmobile_boot_vector_gen2,
+   shmobile_boot_size_gen2);
+   } else {
+   memcpy_toio(p, shmobile_boot_vector, shmobile_boot_size);
+   }
iounmap(p);
 
/* setup reset vectors */
-- 
2.7.4

[PATCH v5 06/26] ARM: dts: r8a7792: Adjust SMP routine size

[Fabrizio Castro]

This patch adjusts the definition of the SMP routine size according
to the latest changes made by commit:
"ARM: shmobile: Add watchdog support"

Signed-off-by: Fabrizio Castro 
Signed-off-by: Ramesh Shanmugasundaram 
Reviewed-by: Geert Uytterhoeven 
---
v4->v5:
* no change

 arch/arm/boot/dts/r8a7792.dtsi | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/arch/arm/boot/dts/r8a7792.dtsi b/arch/arm/boot/dts/r8a7792.dtsi
index 268987f..bea0f12 100644
--- a/arch/arm/boot/dts/r8a7792.dtsi
+++ b/arch/arm/boot/dts/r8a7792.dtsi
@@ -341,7 +341,7 @@
 
smp-sram@0 {
compatible = "renesas,smp-sram";
-   reg = <0 0x10>;
+   reg = <0 0x100>;
};
};
 
-- 
2.7.4

[PATCH v5 08/26] ARM: dts: r8a7794: Adjust SMP routine size

[Fabrizio Castro]

This patch adjusts the definition of the SMP routine size according
to the latest changes made by commit:
"ARM: shmobile: Add watchdog support"

Signed-off-by: Fabrizio Castro 
Signed-off-by: Ramesh Shanmugasundaram 
Reviewed-by: Geert Uytterhoeven 
---
v4->v5:
* no change

 arch/arm/boot/dts/r8a7794.dtsi | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/arch/arm/boot/dts/r8a7794.dtsi b/arch/arm/boot/dts/r8a7794.dtsi
index d588efa..e47c5f4 100644
--- a/arch/arm/boot/dts/r8a7794.dtsi
+++ b/arch/arm/boot/dts/r8a7794.dtsi
@@ -348,7 +348,7 @@
 
smp-sram@0 {
compatible = "renesas,smp-sram";
-   reg = <0 0x10>;
+   reg = <0 0x100>;
};
};
 
-- 
2.7.4

[PATCH v5 07/26] ARM: dts: r8a7793: Adjust SMP routine size

[Fabrizio Castro]

This patch adjusts the definition of the SMP routine size according
to the latest changes made by commit:
"ARM: shmobile: Add watchdog support"

Signed-off-by: Fabrizio Castro 
Signed-off-by: Ramesh Shanmugasundaram 
Reviewed-by: Geert Uytterhoeven 
---
v4->v5:
* no change

 arch/arm/boot/dts/r8a7793.dtsi | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/arch/arm/boot/dts/r8a7793.dtsi b/arch/arm/boot/dts/r8a7793.dtsi
index aa7d779..bde6969 100644
--- a/arch/arm/boot/dts/r8a7793.dtsi
+++ b/arch/arm/boot/dts/r8a7793.dtsi
@@ -392,7 +392,7 @@
 
smp-sram@0 {
compatible = "renesas,smp-sram";
-   reg = <0 0x10>;
+   reg = <0 0x100>;
};
};
 
-- 
2.7.4

[PATCH v5 04/26] ARM: dts: r8a7790: Adjust SMP routine size

[Fabrizio Castro]

This patch adjusts the definition of the SMP routine size according
to the latest changes made by commit:
"ARM: shmobile: Add watchdog support"

Signed-off-by: Fabrizio Castro 
Signed-off-by: Ramesh Shanmugasundaram 
Reviewed-by: Geert Uytterhoeven 
---
v4->v5:
* no change

 arch/arm/boot/dts/r8a7790.dtsi | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/arch/arm/boot/dts/r8a7790.dtsi b/arch/arm/boot/dts/r8a7790.dtsi
index 3bbcc0b..a84bf35 100644
--- a/arch/arm/boot/dts/r8a7790.dtsi
+++ b/arch/arm/boot/dts/r8a7790.dtsi
@@ -443,7 +443,7 @@
 
smp-sram@0 {
compatible = "renesas,smp-sram";
-   reg = <0 0x10>;
+   reg = <0 0x100>;
};
};
 
-- 
2.7.4

[PATCH v5 05/26] ARM: dts: r8a7791: Adjust SMP routine size

[Fabrizio Castro]

This patch adjusts the definition of the SMP routine size according
to the latest changes made by commit:
"ARM: shmobile: Add watchdog support"

Signed-off-by: Fabrizio Castro 
Signed-off-by: Ramesh Shanmugasundaram 
Reviewed-by: Geert Uytterhoeven 
---
v4->v5:
* no change

 arch/arm/boot/dts/r8a7791.dtsi | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/arch/arm/boot/dts/r8a7791.dtsi b/arch/arm/boot/dts/r8a7791.dtsi
index dc65935..d2a4546 100644
--- a/arch/arm/boot/dts/r8a7791.dtsi
+++ b/arch/arm/boot/dts/r8a7791.dtsi
@@ -407,7 +407,7 @@
 
smp-sram@0 {
compatible = "renesas,smp-sram";
-   reg = <0 0x10>;
+   reg = <0 0x100>;
};
};
 
-- 
2.7.4

[PATCH v5 03/26] ARM: dts: r8a7745: Adjust SMP routine size

[Fabrizio Castro]

This patch adjusts the definition of the SMP routine size according
to the latest changes made by commit:
"ARM: shmobile: Add watchdog support"

Signed-off-by: Fabrizio Castro 
Signed-off-by: Ramesh Shanmugasundaram 
Reviewed-by: Geert Uytterhoeven 
---
v4->v5:
* no change

 arch/arm/boot/dts/r8a7745.dtsi | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/arch/arm/boot/dts/r8a7745.dtsi b/arch/arm/boot/dts/r8a7745.dtsi
index ddc3da2..6bc1cf4 100644
--- a/arch/arm/boot/dts/r8a7745.dtsi
+++ b/arch/arm/boot/dts/r8a7745.dtsi
@@ -755,7 +755,7 @@
 
smp-sram@0 {
compatible = "renesas,smp-sram";
-   reg = <0 0x10>;
+   reg = <0 0x100>;
};
};
 
-- 
2.7.4

[PATCH v5 02/26] ARM: dts: r8a7743: Adjust SMP routine size

[Fabrizio Castro]

This patch adjusts the definition of the SMP routine size according
to the latest changes made by commit:
"ARM: shmobile: Add watchdog support"

Signed-off-by: Fabrizio Castro 
Signed-off-by: Ramesh Shanmugasundaram 
Reviewed-by: Geert Uytterhoeven 
---
v4->v5:
* no change

 arch/arm/boot/dts/r8a7743.dtsi | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/arch/arm/boot/dts/r8a7743.dtsi b/arch/arm/boot/dts/r8a7743.dtsi
index 47b62f6..c2943d7 100644
--- a/arch/arm/boot/dts/r8a7743.dtsi
+++ b/arch/arm/boot/dts/r8a7743.dtsi
@@ -973,7 +973,7 @@
 
smp-sram@0 {
compatible = "renesas,smp-sram";
-   reg = <0 0x10>;
+   reg = <0 0x100>;
};
};
 
-- 
2.7.4

[PATCH v5 00/26] Fix watchdog on Renesas R-Car Gen2 and RZ/G1

[Fabrizio Castro]

Dear All,

this series has been around for some time as RFC, and it has collected
useful comments from the community along the way.
The solution proposed by this patch set works for most R-Car Gen2 and
RZ/G1 devices, but not all of them. We now know that for some R-Car
Gen2 early revisions there is no proper software fix. Anyway, no
product has been built around early revisions, but development boards
mounting early revisions (basically prototypes) are still out there.
As a result, this series isn't enabling the internal watchdog on R-Car
Gen2 boards, developers may enable it in board specific device trees
if needed.
This series has been tested by me on the iwg20d, iwg22d, Lager, Alt,
and Koelsch boards.

The problem
===
To deal with SMP on R-Car Gen2 and RZ/G1, we install a reset vector
to ICRAM1 and we program the [S]BAR registers so that when we turn ON
the non-boot CPUs they are redirected to the reset vector installed by
Linux in ICRAM1, and eventually they continue the execution to RAM,
where the SMP bring-up code will take care of the rest.
The content of the [S]BAR registers survives a watchdog triggered reset,
and as such after the watchdog fires the boot core will try and execute
the SMP bring-up code instead of jumping to the bootrom code.

The fix
===
The main strategy for the solution is to let the reset vector decide
if it needs to jump to shmobile_boot_fn or to the bootrom code.
In a watchdog triggered reset scenario, since the [S]BAR registers keep
their values, the boot CPU will jump into the newly designed reset
vector, the assembly routine will eventually test WOVF (a bit in register
RWTCSRA that indicates if the watchdog counter has overflown, the value
of this bit gets retained in this scenario), and jump to the bootrom code
which will in turn load up the bootloader, etc.
When bringing up SMP or using CPU hotplug, the reset vector will jump
to shmobile_boot_fn instead.

Thank you All for your help.

Best regards,

Fabrizio Castro (26):
  ARM: shmobile: Add watchdog support
  ARM: dts: r8a7743: Adjust SMP routine size
  ARM: dts: r8a7745: Adjust SMP routine size
  ARM: dts: r8a7790: Adjust SMP routine size
  ARM: dts: r8a7791: Adjust SMP routine size
  ARM: dts: r8a7792: Adjust SMP routine size
  ARM: dts: r8a7793: Adjust SMP routine size
  ARM: dts: r8a7794: Adjust SMP routine size
  soc: renesas: rcar-rst: Enable watchdog as reset trigger for Gen2
  ARM: shmobile: rcar-gen2: Add watchdog support
  dt-bindings: watchdog: renesas-wdt: Add R-Car Gen2 support
  watchdog: renesas_wdt: Add R-Car Gen2 support
  watchdog: renesas_wdt: Add restart handler
  ARM: shmobile: defconfig: Enable RENESAS_WDT_GEN
  clk: renesas: r8a7743: Add rwdt clock
  clk: renesas: r8a7745: Add rwdt clock
  clk: renesas: r8a7790: Add rwdt clock
  clk: renesas: r8a7791/r8a7793: Add rwdt clock
  clk: renesas: r8a7794: Add rwdt clock
  ARM: dts: r8a7743: Add watchdog support to SoC dtsi
  ARM: dts: r8a7745: Add watchdog support to SoC dtsi
  ARM: dts: r8a7790: Add watchdog support to SoC dtsi
  ARM: dts: r8a7791: Add watchdog support to SoC dtsi
  ARM: dts: r8a7794: Add watchdog support to SoC dtsi
  ARM: dts: iwg20m: Add watchdog support to SoM dtsi
  ARM: dts: iwg22m: Add watchdog support to SoM dtsi

 .../devicetree/bindings/watchdog/renesas-wdt.txt   | 19 ++--
 arch/arm/boot/dts/r8a7743-iwg20m.dtsi  |  5 ++
 arch/arm/boot/dts/r8a7743.dtsi | 12 -
 arch/arm/boot/dts/r8a7745-iwg22m.dtsi  |  5 ++
 arch/arm/boot/dts/r8a7745.dtsi | 12 -
 arch/arm/boot/dts/r8a7790.dtsi | 12 -
 arch/arm/boot/dts/r8a7791.dtsi | 12 -
 arch/arm/boot/dts/r8a7792.dtsi |  2 +-
 arch/arm/boot/dts/r8a7793.dtsi |  2 +-
 arch/arm/boot/dts/r8a7794.dtsi | 12 -
 arch/arm/configs/shmobile_defconfig|  1 +
 arch/arm/mach-shmobile/common.h|  6 +++
 arch/arm/mach-shmobile/headsmp.S   | 55 ++
 arch/arm/mach-shmobile/platsmp-apmu.c  |  1 +
 arch/arm/mach-shmobile/pm-rcar-gen2.c  | 15 --
 drivers/clk/renesas/r8a7743-cpg-mssr.c |  2 +
 drivers/clk/renesas/r8a7745-cpg-mssr.c |  2 +
 drivers/clk/renesas/r8a7790-cpg-mssr.c |  2 +
 drivers/clk/renesas/r8a7791-cpg-mssr.c |  2 +
 drivers/clk/renesas/r8a7794-cpg-mssr.c |  2 +
 drivers/soc/renesas/rcar-rst.c | 35 +++---
 drivers/watchdog/renesas_wdt.c | 39 +--
 22 files changed, 229 insertions(+), 26 deletions(-)

-- 
2.7.4

[PATCH v5 01/26] ARM: shmobile: Add watchdog support

[Fabrizio Castro]

On R-Car Gen2 and RZ/G1 platforms, we use the SBAR registers to make non
boot CPUs run a routine designed to bring up SMP and deal with hot plug.
The value contained in the SBAR registers is not initialized by a WDT
triggered reset, which means that after a WDT triggered reset we jump
to the SMP bring up routine, preventing the system from executing the
bootrom code.

The purpose of this patch is to jump to the bootrom code in case of a
WDT triggered reset, and keep the SMP functionality untouched.
In order to tell if the code had been called due to the WDT overflowing
we are testing WOVF from register RWTCSRA.

The new function shmobile_boot_vector_gen2 isn't replacing
shmobile_boot_vector for backward compatibility reasons. The kernel
will install the best option (either shmobile_boot_vector or
shmobile_boot_vector_gen2) to ICRAM1 after parsing the device tree,
according to the amount of memory available.

Since shmobile_boot_vector has become bigger, "reg" property of nodes
compatible with "renesas,smp-sram" now need to be set to a value
greater or equal to "<0 0x60>".

Signed-off-by: Fabrizio Castro 
Signed-off-by: Ramesh Shanmugasundaram 
---
v4->v5:
* no change

 arch/arm/mach-shmobile/common.h  |  6 +
 arch/arm/mach-shmobile/headsmp.S | 55 
 2 files changed, 61 insertions(+)

diff --git a/arch/arm/mach-shmobile/common.h b/arch/arm/mach-shmobile/common.h
index a8fa4f7..d8c11f5 100644
--- a/arch/arm/mach-shmobile/common.h
+++ b/arch/arm/mach-shmobile/common.h
@@ -7,6 +7,12 @@ extern void shmobile_init_delay(void);
 extern void shmobile_boot_vector(void);
 extern unsigned long shmobile_boot_fn;
 extern unsigned long shmobile_boot_size;
+#ifdef CONFIG_ARCH_RCAR_GEN2
+extern void shmobile_boot_vector_gen2(void);
+extern unsigned long shmobile_boot_fn_gen2;
+extern unsigned long shmobile_boot_cpu_gen2;
+extern unsigned long shmobile_boot_size_gen2;
+#endif /* CONFIG_ARCH_RCAR_GEN2 */
 extern void shmobile_smp_boot(void);
 extern void shmobile_smp_sleep(void);
 extern void shmobile_smp_hook(unsigned int cpu, unsigned long fn,
diff --git a/arch/arm/mach-shmobile/headsmp.S b/arch/arm/mach-shmobile/headsmp.S
index 32e0bf6..cef8e8c 100644
--- a/arch/arm/mach-shmobile/headsmp.S
+++ b/arch/arm/mach-shmobile/headsmp.S
@@ -16,6 +16,11 @@
 #include 
 #include 
 
+#define SCTLR_MMU  0x01
+#define BOOTROM_ADDRESS0xE634
+#define RWTCSRA_ADDRESS 0xE6020004
+#define RWTCSRA_WOVF   0x10
+
 /*
  * Reset vector for secondary CPUs.
  * This will be mapped at address 0 by SBAR register.
@@ -37,6 +42,56 @@ shmobile_boot_fn:
 shmobile_boot_size:
.long   . - shmobile_boot_vector
 
+#ifdef CONFIG_ARCH_RCAR_GEN2
+/*
+ * Reset vector for R-Car Gen2 and RZ/G1 secondary CPUs.
+ * This will be mapped at address 0 by SBAR register.
+ */
+ENTRY(shmobile_boot_vector_gen2)
+   mrc p15, 0, r0, c0, c0, 5   @ r0 = MPIDR
+   ldr r1, shmobile_boot_cpu_gen2
+   cmp r0, r1
+   bne shmobile_smp_continue_gen2
+
+   mrc p15, 0, r1, c1, c0, 0   @ r1 = SCTLR
+   and r0, r1, #SCTLR_MMU
+   cmp r0, #SCTLR_MMU
+   beq shmobile_smp_continue_gen2
+
+   ldr r0, rwtcsra
+   mov r1, #0
+   ldrbr1, [r0]
+   and r0, r1, #RWTCSRA_WOVF
+   cmp r0, #RWTCSRA_WOVF
+   bne shmobile_smp_continue_gen2
+
+   ldr r0, bootrom
+   bx  r0
+
+shmobile_smp_continue_gen2:
+   ldr r1, shmobile_boot_fn_gen2
+   bx  r1
+
+ENDPROC(shmobile_boot_vector_gen2)
+
+   .align  4
+rwtcsra:
+   .word   RWTCSRA_ADDRESS
+bootrom:
+   .word   BOOTROM_ADDRESS
+   .globl  shmobile_boot_cpu_gen2
+shmobile_boot_cpu_gen2:
+   .word   0x
+
+   .align  2
+   .globl  shmobile_boot_fn_gen2
+shmobile_boot_fn_gen2:
+   .space  4
+   .globl  shmobile_boot_size_gen2
+shmobile_boot_size_gen2:
+   .long   . - shmobile_boot_vector_gen2
+#endif /* CONFIG_ARCH_RCAR_GEN2 */
+
 /*
  * Per-CPU SMP boot function/argument selection code based on MPIDR
  */
-- 
2.7.4

Re: [PATCH/RFT v3] sata_rcar: Reset SATA PHY when Salvator-X board resumes

[Tejun Heo]

On Mon, Feb 05, 2018 at 04:18:51AM +0900, Yoshihiro Kaneko wrote:
> From: Khiem Nguyen 
> 
> Because power of Salvator-X board is cut off in suspend,
> it needs to reset SATA PHY state in resume.
> Otherwise, SATA partition could not be accessed anymore.
> 
> Signed-off-by: Khiem Nguyen 
> Signed-off-by: Hien Dang 
> [reinit phy in sata_rcar_resume() function on R-Car Gen3 only]
> [factor out SATA module init sequence]
> [fixed the prefix for the subject]
> Signed-off-by: Yoshihiro Kaneko 

Applied to libata/for-4.16-fixes.

Thanks.

-- 
tejun

Re: [PATCH v2] sh_eth: Remove obsolete explicit clock handling for WoL

[David Miller]

From: Geert Uytterhoeven 
Date: Mon, 12 Feb 2018 14:42:36 +0100

> Currently, if Wake-on-LAN is enabled, the SH-ETH device's module clock
> is manually kept running during system suspend, to make sure the device
> stays active.
> 
> Since commits 91c719f5ec6671f7 ("soc: renesas: rcar-sysc: Keep wakeup
> sources active during system suspend") and 744dddcae84441b1 ("clk:
> renesas: mstp: Keep wakeup sources active during system suspend"), this
> workaround is no longer needed.  Hence remove all explicit clock
> handling to keep the device active.
> 
> Signed-off-by: Geert Uytterhoeven 
> Reviewed-by: Niklas Söderlund 
> Reviewed-by: Sergei Shtylyov 
> ---
> v2:
>   - Add Reviewed-by,
>   - Drop RFC state, now the dependencies are upstream.

Applied.

Re: [PATCH v2] ravb: Remove obsolete explicit clock handling for WoL

[David Miller]

From: Geert Uytterhoeven 
Date: Mon, 12 Feb 2018 14:40:00 +0100

> Currently, if Wake-on-LAN is enabled, the EtherAVB device's module clock
> is manually kept running during system suspend, to make sure the device
> stays active.
> 
> Since commit 91c719f5ec6671f7 ("soc: renesas: rcar-sysc: Keep wakeup
> sources active during system suspend") , this workaround is no longer
> needed.  Hence remove all explicit clock handling to keep the device
> active.
> 
> Signed-off-by: Geert Uytterhoeven 
> Reviewed-by: Niklas Söderlund 
> Reviewed-by: Sergei Shtylyov 
> ---
> v2:
>   - Add Reviewed-by,
>   - Rebased,
>   - Drop RFC state, now the dependency is upstream.

Applied.

[PATCH 5/5] soc: renesas: Use symbols for register offsets for R-Car D3 power areas

[Simon Horman]

Use symbols rather for register offsets for R-Car D3 power areas
to improve readability.

Also line-wrap at 80 columns for consistency with R-Car H3 and M3-W
implementations.

This does not have any functional change.

Signed-off-by: Simon Horman 
---
 drivers/soc/renesas/r8a77995-sysc.c | 11 ++-
 1 file changed, 6 insertions(+), 5 deletions(-)

diff --git a/drivers/soc/renesas/r8a77995-sysc.c 
b/drivers/soc/renesas/r8a77995-sysc.c
index f718429cab02..45355a5cca34 100644
--- a/drivers/soc/renesas/r8a77995-sysc.c
+++ b/drivers/soc/renesas/r8a77995-sysc.c
@@ -17,11 +17,12 @@
 #include "rcar-sysc.h"
 
 static struct rcar_sysc_area r8a77995_areas[] __initdata = {
-   { "always-on", 0, 0, R8A77995_PD_ALWAYS_ON, -1, PD_ALWAYS_ON },
-   { "ca53-scu",  0x140, 0, R8A77995_PD_CA53_SCU,  R8A77995_PD_ALWAYS_ON,
- PD_SCU },
-   { "ca53-cpu0", 0x200, 0, R8A77995_PD_CA53_CPU0, R8A77995_PD_CA53_SCU,
- PD_CPU_NOCR },
+   { "always-on", RCAR_GEN3_SYSCSR, 0, R8A77995_PD_ALWAYS_ON,
+ -1, PD_ALWAYS_ON },
+   { "ca53-scu",  RCAR_GEN3_PWRSR3, 0, R8A77995_PD_CA53_SCU,
+ R8A77995_PD_ALWAYS_ON, PD_SCU },
+   { "ca53-cpu0", RCAR_GEN3_PWRSR6, 0, R8A77995_PD_CA53_CPU0,
+ R8A77995_PD_CA53_SCU, PD_CPU_NOCR },
 };
 
 
-- 
2.11.0

[PATCH 2/5] soc: renesas: Use symbols for register offsets for R-Car H3 power areas

[Simon Horman]

Use symbols rather for register offsets for R-Car H3 power areas
to improve readability.

This does not have any functional change.

Signed-off-by: Simon Horman 
---
 drivers/soc/renesas/r8a7795-sysc.c | 76 ++
 1 file changed, 44 insertions(+), 32 deletions(-)

diff --git a/drivers/soc/renesas/r8a7795-sysc.c 
b/drivers/soc/renesas/r8a7795-sysc.c
index 7412666187b3..0c8440741b58 100644
--- a/drivers/soc/renesas/r8a7795-sysc.c
+++ b/drivers/soc/renesas/r8a7795-sysc.c
@@ -17,39 +17,51 @@
 #include "rcar-sysc.h"
 
 static struct rcar_sysc_area r8a7795_areas[] __initdata = {
-   { "always-on",  0, 0, R8A7795_PD_ALWAYS_ON, -1, PD_ALWAYS_ON },
-   { "ca57-scu",   0x1c0, 0, R8A7795_PD_CA57_SCU,  R8A7795_PD_ALWAYS_ON,
- PD_SCU },
-   { "ca57-cpu0",   0x80, 0, R8A7795_PD_CA57_CPU0, R8A7795_PD_CA57_SCU,
- PD_CPU_NOCR },
-   { "ca57-cpu1",   0x80, 1, R8A7795_PD_CA57_CPU1, R8A7795_PD_CA57_SCU,
- PD_CPU_NOCR },
-   { "ca57-cpu2",   0x80, 2, R8A7795_PD_CA57_CPU2, R8A7795_PD_CA57_SCU,
- PD_CPU_NOCR },
-   { "ca57-cpu3",   0x80, 3, R8A7795_PD_CA57_CPU3, R8A7795_PD_CA57_SCU,
- PD_CPU_NOCR },
-   { "ca53-scu",   0x140, 0, R8A7795_PD_CA53_SCU,  R8A7795_PD_ALWAYS_ON,
- PD_SCU },
-   { "ca53-cpu0",  0x200, 0, R8A7795_PD_CA53_CPU0, R8A7795_PD_CA53_SCU,
- PD_CPU_NOCR },
-   { "ca53-cpu1",  0x200, 1, R8A7795_PD_CA53_CPU1, R8A7795_PD_CA53_SCU,
- PD_CPU_NOCR },
-   { "ca53-cpu2",  0x200, 2, R8A7795_PD_CA53_CPU2, R8A7795_PD_CA53_SCU,
- PD_CPU_NOCR },
-   { "ca53-cpu3",  0x200, 3, R8A7795_PD_CA53_CPU3, R8A7795_PD_CA53_SCU,
- PD_CPU_NOCR },
-   { "a3vp",   0x340, 0, R8A7795_PD_A3VP,  R8A7795_PD_ALWAYS_ON },
-   { "cr7",0x240, 0, R8A7795_PD_CR7,   R8A7795_PD_ALWAYS_ON },
-   { "a3vc",   0x380, 0, R8A7795_PD_A3VC,  R8A7795_PD_ALWAYS_ON },
+   { "always-on",  RCAR_GEN3_SYSCSR,  0, R8A7795_PD_ALWAYS_ON,
+ -1, PD_ALWAYS_ON },
+   { "ca57-scu",   RCAR_GEN3_PWRSR5,  0, R8A7795_PD_CA57_SCU,
+ R8A7795_PD_ALWAYS_ON, PD_SCU },
+   { "ca57-cpu0",  RCAR_GEN3_PWRSR0,  0, R8A7795_PD_CA57_CPU0,
+ R8A7795_PD_CA57_SCU, PD_CPU_NOCR },
+   { "ca57-cpu1",  RCAR_GEN3_PWRSR0,  1, R8A7795_PD_CA57_CPU1,
+ R8A7795_PD_CA57_SCU, PD_CPU_NOCR },
+   { "ca57-cpu2",  RCAR_GEN3_PWRSR0,  2, R8A7795_PD_CA57_CPU2,
+ R8A7795_PD_CA57_SCU, PD_CPU_NOCR },
+   { "ca57-cpu3",  RCAR_GEN3_PWRSR0,  3, R8A7795_PD_CA57_CPU3,
+ R8A7795_PD_CA57_SCU, PD_CPU_NOCR },
+   { "ca53-scu",   RCAR_GEN3_PWRSR3,  0, R8A7795_PD_CA53_SCU,
+ R8A7795_PD_ALWAYS_ON, PD_SCU },
+   { "ca53-cpu0",  RCAR_GEN3_PWRSR6,  0, R8A7795_PD_CA53_CPU0,
+ R8A7795_PD_CA53_SCU, PD_CPU_NOCR },
+   { "ca53-cpu1",  RCAR_GEN3_PWRSR6,  1, R8A7795_PD_CA53_CPU1,
+ R8A7795_PD_CA53_SCU, PD_CPU_NOCR },
+   { "ca53-cpu2",  RCAR_GEN3_PWRSR6,  2, R8A7795_PD_CA53_CPU2,
+ R8A7795_PD_CA53_SCU, PD_CPU_NOCR },
+   { "ca53-cpu3",  RCAR_GEN3_PWRSR6,  3, R8A7795_PD_CA53_CPU3,
+ R8A7795_PD_CA53_SCU, PD_CPU_NOCR },
+   { "a3vp",   RCAR_GEN3_PWRSR8,  0, R8A7795_PD_A3VP,
+ R8A7795_PD_ALWAYS_ON },
+   { "cr7",RCAR_GEN3_PWRSR7,  0, R8A7795_PD_CR7,
+ R8A7795_PD_ALWAYS_ON },
+   { "a3vc",   RCAR_GEN3_PWRSR9,  0, R8A7795_PD_A3VC,
+ R8A7795_PD_ALWAYS_ON },
/* A2VC0 exists on ES1.x only */
-   { "a2vc0",  0x3c0, 0, R8A7795_PD_A2VC0, R8A7795_PD_A3VC },
-   { "a2vc1",  0x3c0, 1, R8A7795_PD_A2VC1, R8A7795_PD_A3VC },
-   { "3dg-a",  0x100, 0, R8A7795_PD_3DG_A, R8A7795_PD_ALWAYS_ON },
-   { "3dg-b",  0x100, 1, R8A7795_PD_3DG_B, R8A7795_PD_3DG_A },
-   { "3dg-c",  0x100, 2, R8A7795_PD_3DG_C, R8A7795_PD_3DG_B },
-   { "3dg-d",  0x100, 3, R8A7795_PD_3DG_D, R8A7795_PD_3DG_C },
-   { "3dg-e",  0x100, 4, R8A7795_PD_3DG_E, R8A7795_PD_3DG_D },
-   { "a3ir",   0x180, 0, R8A7795_PD_A3IR,  R8A7795_PD_ALWAYS_ON },
+   { "a2vc0",  RCAR_GEN3_PWRSR10, 0, R8A7795_PD_A2VC0,
+ R8A7795_PD_A3VC },
+   { "a2vc1",  RCAR_GEN3_PWRSR10, 1, R8A7795_PD_A2VC1,
+ R8A7795_PD_A3VC },
+   { "3dg-a",  RCAR_GEN3_PWRSR2,  0, R8A7795_PD_3DG_A,
+ R8A7795_PD_ALWAYS_ON },
+   { "3dg-b",  RCAR_GEN3_PWRSR2,  1, R8A7795_PD_3DG_B,
+ R8A7795_PD_3DG_A },
+   { "3dg-c",  RCAR_GEN3_PWRSR2,  2, R8A7795_PD_3DG_C,
+ R8A7795_PD_3DG_B },
+   { "3dg-d",  RCAR_GEN3_PWRSR2,  3, R8A7795_PD_3DG_D,
+ R8A7795_PD_3DG_C },
+   { "3dg-e",  RCAR_GEN3_PWRSR2,  4, R8A7795_PD_3DG_E,
+ R8A7795_PD_3DG_D },
+   { "a3ir",   RCAR_GEN3_PWRSR4,  0, R8A7795_PD_A3IR,
+ R8A7795_PD_ALWAYS_ON },
 };
 
 
-- 
2.11.0

[PATCH 0/5] soc: renesas: dd symbols for R-Car Gen3 register offsets

[Simon Horman]

Add and use symbols for Gen3 register offsets to improve readability.

This has no functional change.

Based on renesas-devel-20180212-v4.16-rc1.

Simon Horman (5):
  soc: renesas: Add symbols for R-Car Gen3 register offsets
  soc: renesas: Use symbols for register offsets for R-Car H3 power
areas
  soc: renesas: Use symbols for register offsets for R-Car M3-W power
areas
  soc: renesas: Use symbols for register offsets for R-Car V3M power
areas
  soc: renesas: Use symbols for register offsets for R-Car D3 power
areas

 drivers/soc/renesas/r8a7795-sysc.c  | 76 +
 drivers/soc/renesas/r8a7796-sysc.c  | 56 +++
 drivers/soc/renesas/r8a77970-sysc.c | 39 +++
 drivers/soc/renesas/r8a77995-sysc.c | 11 +++---
 drivers/soc/renesas/rcar-sysc.h | 19 ++
 5 files changed, 125 insertions(+), 76 deletions(-)

-- 
2.11.0

[PATCH 3/5] soc: renesas: Use symbols for register offsets for R-Car M3-W power areas

[Simon Horman]

Use symbols rather for register offsets for R-Car M3-W power areas
to improve readability.

This does not have any functional change.

Signed-off-by: Simon Horman 
---
 drivers/soc/renesas/r8a7796-sysc.c | 56 ++
 1 file changed, 32 insertions(+), 24 deletions(-)

diff --git a/drivers/soc/renesas/r8a7796-sysc.c 
b/drivers/soc/renesas/r8a7796-sysc.c
index f700c842b9e1..beea0ee0d85e 100644
--- a/drivers/soc/renesas/r8a7796-sysc.c
+++ b/drivers/soc/renesas/r8a7796-sysc.c
@@ -16,30 +16,38 @@
 #include "rcar-sysc.h"
 
 static const struct rcar_sysc_area r8a7796_areas[] __initconst = {
-   { "always-on",  0, 0, R8A7796_PD_ALWAYS_ON, -1, PD_ALWAYS_ON },
-   { "ca57-scu",   0x1c0, 0, R8A7796_PD_CA57_SCU,  R8A7796_PD_ALWAYS_ON,
- PD_SCU },
-   { "ca57-cpu0",   0x80, 0, R8A7796_PD_CA57_CPU0, R8A7796_PD_CA57_SCU,
- PD_CPU_NOCR },
-   { "ca57-cpu1",   0x80, 1, R8A7796_PD_CA57_CPU1, R8A7796_PD_CA57_SCU,
- PD_CPU_NOCR },
-   { "ca53-scu",   0x140, 0, R8A7796_PD_CA53_SCU,  R8A7796_PD_ALWAYS_ON,
- PD_SCU },
-   { "ca53-cpu0",  0x200, 0, R8A7796_PD_CA53_CPU0, R8A7796_PD_CA53_SCU,
- PD_CPU_NOCR },
-   { "ca53-cpu1",  0x200, 1, R8A7796_PD_CA53_CPU1, R8A7796_PD_CA53_SCU,
- PD_CPU_NOCR },
-   { "ca53-cpu2",  0x200, 2, R8A7796_PD_CA53_CPU2, R8A7796_PD_CA53_SCU,
- PD_CPU_NOCR },
-   { "ca53-cpu3",  0x200, 3, R8A7796_PD_CA53_CPU3, R8A7796_PD_CA53_SCU,
- PD_CPU_NOCR },
-   { "cr7",0x240, 0, R8A7796_PD_CR7,   R8A7796_PD_ALWAYS_ON },
-   { "a3vc",   0x380, 0, R8A7796_PD_A3VC,  R8A7796_PD_ALWAYS_ON },
-   { "a2vc0",  0x3c0, 0, R8A7796_PD_A2VC0, R8A7796_PD_A3VC },
-   { "a2vc1",  0x3c0, 1, R8A7796_PD_A2VC1, R8A7796_PD_A3VC },
-   { "3dg-a",  0x100, 0, R8A7796_PD_3DG_A, R8A7796_PD_ALWAYS_ON },
-   { "3dg-b",  0x100, 1, R8A7796_PD_3DG_B, R8A7796_PD_3DG_A },
-   { "a3ir",   0x180, 0, R8A7796_PD_A3IR,  R8A7796_PD_ALWAYS_ON },
+   { "always-on",  RCAR_GEN3_SYSCSR, 0, R8A7796_PD_ALWAYS_ON,
+ -1, PD_ALWAYS_ON },
+   { "ca57-scu",   RCAR_GEN3_PWRSR5,  0, R8A7796_PD_CA57_SCU,
+ R8A7796_PD_ALWAYS_ON, PD_SCU },
+   { "ca57-cpu0",  RCAR_GEN3_PWRSR0,  0, R8A7796_PD_CA57_CPU0,
+ R8A7796_PD_CA57_SCU, PD_CPU_NOCR },
+   { "ca57-cpu1",  RCAR_GEN3_PWRSR0,  1, R8A7796_PD_CA57_CPU1,
+ R8A7796_PD_CA57_SCU, PD_CPU_NOCR },
+   { "ca53-scu",   RCAR_GEN3_PWRSR3,  0, R8A7796_PD_CA53_SCU,
+ R8A7796_PD_ALWAYS_ON, PD_SCU },
+   { "ca53-cpu0",  RCAR_GEN3_PWRSR6,  0, R8A7796_PD_CA53_CPU0,
+ R8A7796_PD_CA53_SCU, PD_CPU_NOCR },
+   { "ca53-cpu1",  RCAR_GEN3_PWRSR6,  1, R8A7796_PD_CA53_CPU1,
+ R8A7796_PD_CA53_SCU, PD_CPU_NOCR },
+   { "ca53-cpu2",  RCAR_GEN3_PWRSR6,  2, R8A7796_PD_CA53_CPU2,
+ R8A7796_PD_CA53_SCU, PD_CPU_NOCR },
+   { "ca53-cpu3",  RCAR_GEN3_PWRSR6,  3, R8A7796_PD_CA53_CPU3,
+ R8A7796_PD_CA53_SCU, PD_CPU_NOCR },
+   { "cr7",RCAR_GEN3_PWRSR7,  0, R8A7796_PD_CR7,
+ R8A7796_PD_ALWAYS_ON },
+   { "a3vc",   RCAR_GEN3_PWRSR9,  0, R8A7796_PD_A3VC,
+ R8A7796_PD_ALWAYS_ON },
+   { "a2vc0",  RCAR_GEN3_PWRSR10, 0, R8A7796_PD_A2VC0,
+ R8A7796_PD_A3VC },
+   { "a2vc1",  RCAR_GEN3_PWRSR10, 1, R8A7796_PD_A2VC1,
+ R8A7796_PD_A3VC },
+   { "3dg-a",  RCAR_GEN3_PWRSR2,  0, R8A7796_PD_3DG_A,
+ R8A7796_PD_ALWAYS_ON },
+   { "3dg-b",  RCAR_GEN3_PWRSR2,  1, R8A7796_PD_3DG_B,
+ R8A7796_PD_3DG_A },
+   { "a3ir",   RCAR_GEN3_PWRSR4,  0, R8A7796_PD_A3IR,
+ R8A7796_PD_ALWAYS_ON },
 };
 
 const struct rcar_sysc_info r8a7796_sysc_info __initconst = {
-- 
2.11.0

[PATCH 1/5] soc: renesas: Add symbols for R-Car Gen3 register offsets

[Simon Horman]

Add symbols for Gen3 register offsets.
These may be used to improve readability of users of these offsets.

This does not introduce any functional change.

Signed-off-by: Simon Horman 
---
 drivers/soc/renesas/rcar-sysc.h | 19 +++
 1 file changed, 19 insertions(+)

diff --git a/drivers/soc/renesas/rcar-sysc.h b/drivers/soc/renesas/rcar-sysc.h
index 9d9daf9eb91b..c6041e29fbcb 100644
--- a/drivers/soc/renesas/rcar-sysc.h
+++ b/drivers/soc/renesas/rcar-sysc.h
@@ -24,6 +24,25 @@
 #define PD_CPU_NOCRPD_CPU | PD_NO_CR /* CPU area lacks CR (R-Car Gen2/3) */
 #define PD_ALWAYS_ON   PD_NO_CR  /* Always-on area */
 
+/*
+ * R-Car Gen3 register offsets
+ */
+
+#define RCAR_GEN3_SYSCSR  0
+#define RCAR_GEN3_PWRSR0  0x80
+#define RCAR_GEN3_PWRSR2  0x100
+#define RCAR_GEN3_PWRSR3  0x140
+#define RCAR_GEN3_PWRSR4  0x180
+#define RCAR_GEN3_PWRSR5  0x1c0
+#define RCAR_GEN3_PWRSR6  0x200
+#define RCAR_GEN3_PWRSR7  0x240
+#define RCAR_GEN3_PWRSR8  0x340
+#define RCAR_GEN3_PWRSR9  0x380
+#define RCAR_GEN3_PWRSR10 0x3c0
+#define RCAR_GEN3_PWRSR11 0x400
+#define RCAR_GEN3_PWRSR12 0x2c0
+#define RCAR_GEN3_PWRSR13 0x300
+#define RCAR_GEN3_PWRSR14 0x280
 
 /*
  * Description of a Power Area
-- 
2.11.0

Re: [PATCH 0/4] ARM: dts: r7s72100: add soc node

[Geert Uytterhoeven]

Hi Simon,

On Mon, Feb 12, 2018 at 3:39 PM, Simon Horman
 wrote:
> this patchset adds an soc node, moves all nodes for IP blocks with an
> address on the bus to be sub nodes of the soc node, removes the clock node
> and sorts subnodes of the root and soc nodes.
>
> This brings the DTS of the r7s72100 in line with that of R-Car Gen 2 SoCs.
>
> Simon Horman (4):
>   ARM: dts: r7s72100: add soc node
>   ARM: dts: r7s72100: sort subnodes of soc node
>   ARM: dts: r7s72100: stop grouping clocks under a "clocks" subnode
>   ARM: dts: r7s72100: sort subnodes of root node

Thanks!

>  arch/arm/boot/dts/r7s72100.dtsi | 1038 
> ---
>  1 file changed, 521 insertions(+), 517 deletions(-)

For the whole series, with a bit of help from dtx_diff:
Reviewed-by: Geert Uytterhoeven 

Gr{oetje,eeting}s,

Geert

--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- ge...@linux-m68k.org

In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
-- Linus Torvalds

Re: [PATCH v2 3/5] arm64: dts: renesas: r8a77970: add DU support

[Kieran Bingham]

Hi Sergei, Niklas

On 08/02/18 15:47, Niklas Söderlund wrote:
> From: Sergei Shtylyov 
> 
> Define the generic R8A77970 part of the DU device node.
> 
> Based on the original (and large) patch by Daisuke Matsushita
> .
> 
> Signed-off-by: Vladimir Barinov 
> Signed-off-by: Sergei Shtylyov 
> Signed-off-by: Niklas Söderlund 

I almost got this wrong ... thinking there was only a single output ... but
there are indeed two outputs, just a single DU channel.

LGTM...

Reviewed-by: Kieran Bingham 

> ---
>  arch/arm64/boot/dts/renesas/r8a77970.dtsi | 28 
>  1 file changed, 28 insertions(+)
> 
> diff --git a/arch/arm64/boot/dts/renesas/r8a77970.dtsi 
> b/arch/arm64/boot/dts/renesas/r8a77970.dtsi
> index 5eb5d4b26f955671..c6056635bd372ce3 100644
> --- a/arch/arm64/boot/dts/renesas/r8a77970.dtsi
> +++ b/arch/arm64/boot/dts/renesas/r8a77970.dtsi
> @@ -630,6 +630,34 @@
>   resets = < 623>;
>   renesas,fcp = <>;
>   };
> +
> + du: display@feb0 {
> + compatible = "renesas,du-r8a77970";
> + reg = <0 0xfeb0 0 0x8>;
> + interrupts = ;
> + clocks = < CPG_MOD 724>;
> + clock-names = "du.0";
> + power-domains = < R8A77970_PD_ALWAYS_ON>;
> + vsps = <>;
> + status = "disabled";
> +
> + ports {
> + #address-cells = <1>;
> + #size-cells = <0>;
> +
> + port@0 {
> + reg = <0>;
> + du_out_rgb: endpoint {
> + };
> + };
> +
> + port@1 {
> + reg = <1>;
> + du_out_lvds: endpoint {
> + };
> + };
> + };
> + };
>   };
>  
>   timer {
> 

Re: [PATCH v3 0/3] renesas: irqchip: Use wakeup_path i.s.o. explicit clock handling

[Ulf Hansson]

On 12 February 2018 at 14:55, Geert Uytterhoeven
 wrote:
> Hi all,
>
> If an interrupt controller in a Renesas ARM SoC is part of a Clock
> Domain, and it is part of the wakeup path, it must be kept active during
> system suspend.
>
> Currently this is handled in all interrupt controller drivers by
> explicitly increasing the use count of the module clock when the device
> is part of the wakeup path.  However, this explicit clock handling is
> merely a workaround for a failure to properly communicate wakeup
> information to the device core.
>
> Hence this series fixes the affected drivers by setting the devices'
> power.wakeup_path fields instead, to indicate they are part of the
> wakeup path.  Depending on the PM Domain's active_wakeup configuration,
> the genpd core code will keep the device enabled (and the clock running)
> during system suspend when needed.
>
> Target trees:
>   - Patches 1 and 2 are meant for the irqchip tree,
>   - Patch 3 is meant for the GPIO tree.
>
> Changes compared to v2 (sent by Ulf Hanson):
>   - Revert to v1, as WAKEUP_PATH didn't make it,
>   - Use an atomic_t instead of a boolean flag, as the boolean tracked
> only the status of the last configured GPIO, while multiple interrupt
> sources on the same irqchip may be involved with wake-up,
>   - Use new helper device_set_wakeup_path(),
>   - Drop checks for CONFIG_PM_SLEEP, as device_set_wakeup_path() is
> always available, unlike dev_pm_info.wakeup_path,
>   - Mark suspend functions __maybe_unused.
>
> Changes compared to v1:
>   - Convert to use the WAKEUP_PATH driver PM flag (Ulf Hanson).
>
> This has been tested on r8a73a4/ape6evm, r8a7740/armadillo,
> r8a7791/koelsch, r8a7795/salvator-x and -xs, r8a7796/salvator-x, and
> sh73a0/kzm9g.
>
> Thanks for applying!
>
> Geert Uytterhoeven (3):
>   irqchip/renesas-intc-irqpin: Use wakeup_path i.s.o. explicit clock
> handling
>   irqchip/renesas-irqc: Use wakeup_path i.s.o. explicit clock handling
>   gpio: rcar: Use wakeup_path i.s.o. explicit clock handling
>
>  drivers/gpio/gpio-rcar.c  | 38 +
>  drivers/irqchip/irq-renesas-intc-irqpin.c | 40 
> +--
>  drivers/irqchip/irq-renesas-irqc.c| 30 ---
>  3 files changed, 48 insertions(+), 60 deletions(-)
>

For the series:

Reviewed-by: Ulf Hansson 

Kind regards
Uffe

[PATCH 3/4] ARM: dts: r7s72100: stop grouping clocks under a "clocks" subnode

[Simon Horman]

The current practice is to not group clocks under a "clocks" subnode,
but just put them together with the other on-SoC devices.

As per updates for R-Car Gen2 SoCs by Geert Uytterhoeven.

Signed-off-by: Simon Horman 
---
 arch/arm/boot/dts/r7s72100.dtsi | 104 +++-
 1 file changed, 49 insertions(+), 55 deletions(-)

diff --git a/arch/arm/boot/dts/r7s72100.dtsi b/arch/arm/boot/dts/r7s72100.dtsi
index 0d63dbe11e0d..d69d4810e597 100644
--- a/arch/arm/boot/dts/r7s72100.dtsi
+++ b/arch/arm/boot/dts/r7s72100.dtsi
@@ -30,62 +30,56 @@
spi4 = 
};
 
-   clocks {
-   ranges;
-   #address-cells = <1>;
-   #size-cells = <1>;
+   /* External clocks */
+   extal_clk: extal {
+   #clock-cells = <0>;
+   compatible = "fixed-clock";
+   /* If clk present, value must be set by board */
+   clock-frequency = <0>;
+   };
 
-   /* External clocks */
-   extal_clk: extal {
-   #clock-cells = <0>;
-   compatible = "fixed-clock";
-   /* If clk present, value must be set by board */
-   clock-frequency = <0>;
-   };
-
-   usb_x1_clk: usb_x1 {
-   #clock-cells = <0>;
-   compatible = "fixed-clock";
-   /* If clk present, value must be set by board */
-   clock-frequency = <0>;
-   };
-
-   rtc_x1_clk: rtc_x1 {
-   #clock-cells = <0>;
-   compatible = "fixed-clock";
-   /* If clk present, value must be set by board to 32678 
*/
-   clock-frequency = <0>;
-   };
-
-   rtc_x3_clk: rtc_x3 {
-   #clock-cells = <0>;
-   compatible = "fixed-clock";
-   /* If clk present, value must be set by board to 
400 */
-   clock-frequency = <0>;
-   };
-
-   /* Fixed factor clocks */
-   b_clk: b {
-   #clock-cells = <0>;
-   compatible = "fixed-factor-clock";
-   clocks = <_clocks R7S72100_CLK_PLL>;
-   clock-mult = <1>;
-   clock-div = <3>;
-   };
-   p1_clk: p1 {
-   #clock-cells = <0>;
-   compatible = "fixed-factor-clock";
-   clocks = <_clocks R7S72100_CLK_PLL>;
-   clock-mult = <1>;
-   clock-div = <6>;
-   };
-   p0_clk: p0 {
-   #clock-cells = <0>;
-   compatible = "fixed-factor-clock";
-   clocks = <_clocks R7S72100_CLK_PLL>;
-   clock-mult = <1>;
-   clock-div = <12>;
-   };
+   usb_x1_clk: usb_x1 {
+   #clock-cells = <0>;
+   compatible = "fixed-clock";
+   /* If clk present, value must be set by board */
+   clock-frequency = <0>;
+   };
+
+   rtc_x1_clk: rtc_x1 {
+   #clock-cells = <0>;
+   compatible = "fixed-clock";
+   /* If clk present, value must be set by board to 32678 */
+   clock-frequency = <0>;
+   };
+
+   rtc_x3_clk: rtc_x3 {
+   #clock-cells = <0>;
+   compatible = "fixed-clock";
+   /* If clk present, value must be set by board to 400 */
+   clock-frequency = <0>;
+   };
+
+   /* Fixed factor clocks */
+   b_clk: b {
+   #clock-cells = <0>;
+   compatible = "fixed-factor-clock";
+   clocks = <_clocks R7S72100_CLK_PLL>;
+   clock-mult = <1>;
+   clock-div = <3>;
+   };
+   p1_clk: p1 {
+   #clock-cells = <0>;
+   compatible = "fixed-factor-clock";
+   clocks = <_clocks R7S72100_CLK_PLL>;
+   clock-mult = <1>;
+   clock-div = <6>;
+   };
+   p0_clk: p0 {
+   #clock-cells = <0>;
+   compatible = "fixed-factor-clock";
+   clocks = <_clocks R7S72100_CLK_PLL>;
+   clock-mult = <1>;
+   clock-div = <12>;
};
 
cpus {
-- 
2.11.0

[PATCH 2/4] ARM: dts: r7s72100: sort subnodes of soc node

[Simon Horman]

Sort the subnodes of the soc node to improve maintainability.
The sort key is the address on the bus with instances of the same
IP block grouped together and sorted alphabetically.

This patch should not introduce any functional change.

Signed-off-by: Simon Horman 
---
 arch/arm/boot/dts/r7s72100.dtsi | 570 
 1 file changed, 285 insertions(+), 285 deletions(-)

diff --git a/arch/arm/boot/dts/r7s72100.dtsi b/arch/arm/boot/dts/r7s72100.dtsi
index 0aa74355e24f..0d63dbe11e0d 100644
--- a/arch/arm/boot/dts/r7s72100.dtsi
+++ b/arch/arm/boot/dts/r7s72100.dtsi
@@ -110,187 +110,14 @@
#size-cells = <1>;
ranges;
 
-   /* Special CPG clocks */
-   cpg_clocks: cpg_clocks@fcfe {
-   #clock-cells = <1>;
-   compatible = "renesas,r7s72100-cpg-clocks",
-"renesas,rz-cpg-clocks";
-   reg = <0xfcfe 0x18>;
-   clocks = <_clk>, <_x1_clk>;
-   clock-output-names = "pll", "i", "g";
-   #power-domain-cells = <0>;
-   };
-
-   /* MSTP clocks */
-   mstp3_clks: mstp3_clks@fcfe0420 {
-   #clock-cells = <1>;
-   compatible = "renesas,r7s72100-mstp-clocks", 
"renesas,cpg-mstp-clocks";
-   reg = <0xfcfe0420 4>;
-   clocks = <_clk>;
-   clock-indices = ;
-   clock-output-names = "mtu2";
-   };
-
-   mstp4_clks: mstp4_clks@fcfe0424 {
-   #clock-cells = <1>;
-   compatible = "renesas,r7s72100-mstp-clocks", 
"renesas,cpg-mstp-clocks";
-   reg = <0xfcfe0424 4>;
-   clocks = <_clk>, <_clk>, <_clk>, <_clk>,
-<_clk>, <_clk>, <_clk>, <_clk>;
-   clock-indices = <
-   R7S72100_CLK_SCIF0 R7S72100_CLK_SCIF1 
R7S72100_CLK_SCIF2 R7S72100_CLK_SCIF3
-   R7S72100_CLK_SCIF4 R7S72100_CLK_SCIF5 
R7S72100_CLK_SCIF6 R7S72100_CLK_SCIF7
-   >;
-   clock-output-names = "scif0", "scif1", "scif2", 
"scif3", "scif4", "scif5", "scif6", "scif7";
-   };
-
-   mstp5_clks: mstp5_clks@fcfe0428 {
-   #clock-cells = <1>;
-   compatible = "renesas,r7s72100-mstp-clocks", 
"renesas,cpg-mstp-clocks";
-   reg = <0xfcfe0428 4>;
-   clocks = <_clk>, <_clk>;
-   clock-indices = ;
-   clock-output-names = "ostm0", "ostm1";
-   };
-
-   mstp6_clks: mstp6_clks@fcfe042c {
-   #clock-cells = <1>;
-   compatible = "renesas,r7s72100-mstp-clocks", 
"renesas,cpg-mstp-clocks";
-   reg = <0xfcfe042c 4>;
-   clocks = <_clk>;
-   clock-indices = ;
-   clock-output-names = "rtc";
-   };
-
-   mstp7_clks: mstp7_clks@fcfe0430 {
-   #clock-cells = <1>;
-   compatible = "renesas,r7s72100-mstp-clocks", 
"renesas,cpg-mstp-clocks";
-   reg = <0xfcfe0430 4>;
-   clocks = <_clk>, <_clk>, <_clk>;
-   clock-indices = ;
-   clock-output-names = "ether", "usb0", "usb1";
-   };
-
-   mstp8_clks: mstp8_clks@fcfe0434 {
-   #clock-cells = <1>;
-   compatible = "renesas,r7s72100-mstp-clocks", 
"renesas,cpg-mstp-clocks";
-   reg = <0xfcfe0434 4>;
-   clocks = <_clk>;
-   clock-indices = ;
-   clock-output-names = "mmcif";
-   };
-
-   mstp9_clks: mstp9_clks@fcfe0438 {
-   #clock-cells = <1>;
-   compatible = "renesas,r7s72100-mstp-clocks", 
"renesas,cpg-mstp-clocks";
-   reg = <0xfcfe0438 4>;
-   clocks = <_clk>, <_clk>, <_clk>, <_clk>;
-   clock-indices = <
-   R7S72100_CLK_I2C0 R7S72100_CLK_I2C1 
R7S72100_CLK_I2C2 R7S72100_CLK_I2C3
-   >;
-   clock-output-names = "i2c0", "i2c1", "i2c2", "i2c3";
-   };
-
-   mstp10_clks: mstp10_clks@fcfe043c {
-   #clock-cells = <1>;
-   compatible = "renesas,r7s72100-mstp-clocks", 
"renesas,cpg-mstp-clocks";
-   reg = <0xfcfe043c 4>;
-   clocks = <_clk>, <_clk>, <_clk>, <_clk>,
-<_clk>;
-   

[PATCH 1/4] ARM: dts: r7s72100: add soc node

[Simon Horman]

Add soc node to represent the bus and move all nodes with a base address
into this node. This is consistent with handling of R-Car Gen3 and Gen2
SoCs in mainline. It is intended to migrate other Renesas ARM-based
SoCs to this scheme.

The ordering is derived from simply moving each node with an address up to
before any nodes without a base address that occur before the soc node.  To
improve maintainability follow-up patches will sort subnodes of both the
new soc node and the root node.

This patch should not introduce any functional change.

Signed-off-by: Simon Horman 
---
 arch/arm/boot/dts/r7s72100.dtsi | 910 
 1 file changed, 459 insertions(+), 451 deletions(-)

diff --git a/arch/arm/boot/dts/r7s72100.dtsi b/arch/arm/boot/dts/r7s72100.dtsi
index bd6366d1800b..0aa74355e24f 100644
--- a/arch/arm/boot/dts/r7s72100.dtsi
+++ b/arch/arm/boot/dts/r7s72100.dtsi
@@ -15,7 +15,6 @@
 
 / {
compatible = "renesas,r7s72100";
-   interrupt-parent = <>;
#address-cells = <1>;
#size-cells = <1>;
 
@@ -87,6 +86,29 @@
clock-mult = <1>;
clock-div = <12>;
};
+   };
+
+   cpus {
+   #address-cells = <1>;
+   #size-cells = <0>;
+
+   cpu@0 {
+   device_type = "cpu";
+   compatible = "arm,cortex-a9";
+   reg = <0>;
+   clock-frequency = <4>;
+   clocks = <_clocks R7S72100_CLK_I>;
+   next-level-cache = <>;
+   };
+   };
+
+   soc {
+   compatible = "simple-bus";
+   interrupt-parent = <>;
+
+   #address-cells = <1>;
+   #size-cells = <1>;
+   ranges;
 
/* Special CPG clocks */
cpg_clocks: cpg_clocks@fcfe {
@@ -192,499 +214,485 @@
>;
clock-output-names = "sdhi00", "sdhi01", "sdhi10", 
"sdhi11";
};
-   };
-
-   cpus {
-   #address-cells = <1>;
-   #size-cells = <0>;
 
-   cpu@0 {
-   device_type = "cpu";
-   compatible = "arm,cortex-a9";
-   reg = <0>;
-   clock-frequency = <4>;
-   clocks = <_clocks R7S72100_CLK_I>;
-   next-level-cache = <>;
+   pinctrl: pin-controller@fcfe3000 {
+   compatible = "renesas,r7s72100-ports";
+
+   reg = <0xfcfe3000 0x4230>;
+
+   port0: gpio-0 {
+   gpio-controller;
+   #gpio-cells = <2>;
+   gpio-ranges = < 0 0 6>;
+   };
+
+   port1: gpio-1 {
+   gpio-controller;
+   #gpio-cells = <2>;
+   gpio-ranges = < 0 16 16>;
+   };
+
+   port2: gpio-2 {
+   gpio-controller;
+   #gpio-cells = <2>;
+   gpio-ranges = < 0 32 16>;
+   };
+
+   port3: gpio-3 {
+   gpio-controller;
+   #gpio-cells = <2>;
+   gpio-ranges = < 0 48 16>;
+   };
+
+   port4: gpio-4 {
+   gpio-controller;
+   #gpio-cells = <2>;
+   gpio-ranges = < 0 64 16>;
+   };
+
+   port5: gpio-5 {
+   gpio-controller;
+   #gpio-cells = <2>;
+   gpio-ranges = < 0 80 11>;
+   };
+
+   port6: gpio-6 {
+   gpio-controller;
+   #gpio-cells = <2>;
+   gpio-ranges = < 0 96 16>;
+   };
+
+   port7: gpio-7 {
+   gpio-controller;
+   #gpio-cells = <2>;
+   gpio-ranges = < 0 112 16>;
+   };
+
+   port8: gpio-8 {
+   gpio-controller;
+   #gpio-cells = <2>;
+   gpio-ranges = < 0 128 16>;
+   };
+
+   port9: gpio-9 {
+   gpio-controller;
+   #gpio-cells = <2>;
+   gpio-ranges = < 0 144 8>;
+   };
+
+   

[PATCH 0/4] ARM: dts: r7s72100: add soc node

[Simon Horman]

Hi,

this patchset adds an soc node, moves all nodes for IP blocks with an
address on the bus to be sub nodes of the soc node, removes the clock node
and sorts subnodes of the root and soc nodes.

This brings the DTS of the r7s72100 in line with that of R-Car Gen 2 SoCs.

Simon Horman (4):
  ARM: dts: r7s72100: add soc node
  ARM: dts: r7s72100: sort subnodes of soc node
  ARM: dts: r7s72100: stop grouping clocks under a "clocks" subnode
  ARM: dts: r7s72100: sort subnodes of root node

 arch/arm/boot/dts/r7s72100.dtsi | 1038 ---
 1 file changed, 521 insertions(+), 517 deletions(-)

-- 
2.11.0

[PATCH 4/4] ARM: dts: r7s72100: sort subnodes of root node

[Simon Horman]

Sort the subnodes of the soc node to improve maintainability.
The sort has been done alphabetically with the node name as the key.

This patch should not introduce any functional change.

Signed-off-by: Simon Horman 
---
 arch/arm/boot/dts/r7s72100.dtsi | 78 +
 1 file changed, 40 insertions(+), 38 deletions(-)

diff --git a/arch/arm/boot/dts/r7s72100.dtsi b/arch/arm/boot/dts/r7s72100.dtsi
index d69d4810e597..ecf9516bcda8 100644
--- a/arch/arm/boot/dts/r7s72100.dtsi
+++ b/arch/arm/boot/dts/r7s72100.dtsi
@@ -30,43 +30,45 @@
spi4 = 
};
 
-   /* External clocks */
-   extal_clk: extal {
+   /* Fixed factor clocks */
+   b_clk: b {
#clock-cells = <0>;
-   compatible = "fixed-clock";
-   /* If clk present, value must be set by board */
-   clock-frequency = <0>;
+   compatible = "fixed-factor-clock";
+   clocks = <_clocks R7S72100_CLK_PLL>;
+   clock-mult = <1>;
+   clock-div = <3>;
};
 
-   usb_x1_clk: usb_x1 {
-   #clock-cells = <0>;
-   compatible = "fixed-clock";
-   /* If clk present, value must be set by board */
-   clock-frequency = <0>;
-   };
+   cpus {
+   #address-cells = <1>;
+   #size-cells = <0>;
 
-   rtc_x1_clk: rtc_x1 {
-   #clock-cells = <0>;
-   compatible = "fixed-clock";
-   /* If clk present, value must be set by board to 32678 */
-   clock-frequency = <0>;
+   cpu@0 {
+   device_type = "cpu";
+   compatible = "arm,cortex-a9";
+   reg = <0>;
+   clock-frequency = <4>;
+   clocks = <_clocks R7S72100_CLK_I>;
+   next-level-cache = <>;
+   };
};
 
-   rtc_x3_clk: rtc_x3 {
+   /* External clocks */
+   extal_clk: extal {
#clock-cells = <0>;
compatible = "fixed-clock";
-   /* If clk present, value must be set by board to 400 */
+   /* If clk present, value must be set by board */
clock-frequency = <0>;
};
 
-   /* Fixed factor clocks */
-   b_clk: b {
+   p0_clk: p0 {
#clock-cells = <0>;
compatible = "fixed-factor-clock";
clocks = <_clocks R7S72100_CLK_PLL>;
clock-mult = <1>;
-   clock-div = <3>;
+   clock-div = <12>;
};
+
p1_clk: p1 {
#clock-cells = <0>;
compatible = "fixed-factor-clock";
@@ -74,26 +76,19 @@
clock-mult = <1>;
clock-div = <6>;
};
-   p0_clk: p0 {
+
+   rtc_x1_clk: rtc_x1 {
#clock-cells = <0>;
-   compatible = "fixed-factor-clock";
-   clocks = <_clocks R7S72100_CLK_PLL>;
-   clock-mult = <1>;
-   clock-div = <12>;
+   compatible = "fixed-clock";
+   /* If clk present, value must be set by board to 32678 */
+   clock-frequency = <0>;
};
 
-   cpus {
-   #address-cells = <1>;
-   #size-cells = <0>;
-
-   cpu@0 {
-   device_type = "cpu";
-   compatible = "arm,cortex-a9";
-   reg = <0>;
-   clock-frequency = <4>;
-   clocks = <_clocks R7S72100_CLK_I>;
-   next-level-cache = <>;
-   };
+   rtc_x3_clk: rtc_x3 {
+   #clock-cells = <0>;
+   compatible = "fixed-clock";
+   /* If clk present, value must be set by board to 400 */
+   clock-frequency = <0>;
};
 
soc {
@@ -689,4 +684,11 @@
status = "disabled";
};
};
+
+   usb_x1_clk: usb_x1 {
+   #clock-cells = <0>;
+   compatible = "fixed-clock";
+   /* If clk present, value must be set by board */
+   clock-frequency = <0>;
+   };
 };
-- 
2.11.0

Re: [GIT PULL FOR renesas-drivers] vsp1/vga-performance-fix

[Geert Uytterhoeven]

Hi Kieran,

On Fri, Feb 9, 2018 at 5:23 PM, Kieran Bingham  wrote:
> Please consider including this fix for the VSP1 in renesas-drivers.
>
> --
> Regards
>
> Kieran
>
> The following changes since commit d8a5b80568a9cb66810e75b182018e9edb68e8ff:
>
>   Linux 4.15 (2018-01-28 13:20:33 -0800)
>
> are available in the git repository at:
>
>   git://git.kernel.org/pub/scm/linux/kernel/git/kbingham/rcar.git 
> vsp1/vga-performance-fix
>
> for you to fetch changes up to e0c81de98739197b6fda7ba65fe4f17c7a03c384:
>
>   v4l: vsp1: Fix header display list status check in continuous mode 
> (2018-02-09 15:57:49 +)

Thank you, merges cleanly into dotay's linux-next.

Gr{oetje,eeting}s,

Geert

--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- ge...@linux-m68k.org

In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
-- Linus Torvalds

Re: [PATCH] dt-bindings: pinctrl: sh-pfc: Correct SoC family name for R8A7778

[Geert Uytterhoeven]

On Wed, Dec 20, 2017 at 9:12 AM, Simon Horman  wrote:
> On Tue, Dec 19, 2017 at 05:04:56PM +0100, Geert Uytterhoeven wrote:
>> R8A7778 is R-Car (not R-Mobile) M1.
>>
>> Signed-off-by: Geert Uytterhoeven 
>
> Acked-by: Simon Horman 

Thanks, queued in sh-pfc-for-v4.17.

Gr{oetje,eeting}s,

Geert

--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- ge...@linux-m68k.org

In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
-- Linus Torvalds

Re: [PATCH] ARM: shmobile: Enable RZA1 pin controller

[Simon Horman]

On Fri, Feb 09, 2018 at 06:34:18PM +0100, Jacopo Mondi wrote:
> Enable PINCTRL_RZA1 option in shmobile_defconfig
> 
> Signed-off-by: Jacopo Mondi 
> ---
> Hi Simon,
>   this fixes the issue you reported on Genmai when applying 
> shmobile_defconfig.

Thanks!

Tested-by: Simon Horman 

I will apply this for v4.17.

[PATCH v3 2/3] irqchip/renesas-irqc: Use wakeup_path i.s.o. explicit clock handling

[Geert Uytterhoeven]

Since commit 6f46aedb9c85873b ("irqchip: renesas-irqc: Add wake-up
support"), when an IRQ is used for wakeup, the INTC
block's module clock is manually kept running during system suspend, to
make sure the device stays active.

However, this explicit clock handling is merely a workaround for a
failure to properly communicate wakeup information to the device core.

Instead, set the device's power.wakeup_path field, to indicate this
device is part of the wakeup path.  Depending on the PM Domain's
active_wakeup configuration, the genpd core code will keep the device
enabled (and the clock running) during system suspend when needed.
This allows for the removal of all explicit clock handling code from the
driver.

Signed-off-by: Geert Uytterhoeven 
---
v3:
  - Revert to v1, as WAKEUP_PATH didn't make it,
  - Use an atomic_t instead of a boolean flag, as the boolean tracked
only the status of the last configured GPIO, while multiple
interrupt pins on the same interrupt controller may be involved with
wake-up,
  - Use new helper device_set_wakeup_path(),
  - Drop checks for CONFIG_PM_SLEEP, as device_set_wakeup_path() is
always available, unlike dev_pm_info.wakeup_path,
  - Mark irqc_suspend() __maybe_unused,
  - Drop RFC state, now the dependencies are upstream.

v2 (sent by Ulf Hanson):
  - Convert to use the WAKEUP_PATH driver PM flag (Ulf).
---
 drivers/irqchip/irq-renesas-irqc.c | 30 --
 1 file changed, 16 insertions(+), 14 deletions(-)

diff --git a/drivers/irqchip/irq-renesas-irqc.c 
b/drivers/irqchip/irq-renesas-irqc.c
index 52304b139aa46a60..a4f11124024dcf32 100644
--- a/drivers/irqchip/irq-renesas-irqc.c
+++ b/drivers/irqchip/irq-renesas-irqc.c
@@ -17,7 +17,6 @@
  * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
  */
 
-#include 
 #include 
 #include 
 #include 
@@ -64,7 +63,7 @@ struct irqc_priv {
struct platform_device *pdev;
struct irq_chip_generic *gc;
struct irq_domain *irq_domain;
-   struct clk *clk;
+   atomic_t wakeup_path;
 };
 
 static struct irqc_priv *irq_data_to_priv(struct irq_data *data)
@@ -111,14 +110,10 @@ static int irqc_irq_set_wake(struct irq_data *d, unsigned 
int on)
int hw_irq = irqd_to_hwirq(d);
 
irq_set_irq_wake(p->irq[hw_irq].requested_irq, on);
-
-   if (!p->clk)
-   return 0;
-
if (on)
-   clk_enable(p->clk);
+   atomic_inc(>wakeup_path);
else
-   clk_disable(p->clk);
+   atomic_dec(>wakeup_path);
 
return 0;
 }
@@ -159,12 +154,6 @@ static int irqc_probe(struct platform_device *pdev)
p->pdev = pdev;
platform_set_drvdata(pdev, p);
 
-   p->clk = devm_clk_get(>dev, NULL);
-   if (IS_ERR(p->clk)) {
-   dev_warn(>dev, "unable to get clock\n");
-   p->clk = NULL;
-   }
-
pm_runtime_enable(>dev);
pm_runtime_get_sync(>dev);
 
@@ -276,6 +265,18 @@ static int irqc_remove(struct platform_device *pdev)
return 0;
 }
 
+static int __maybe_unused irqc_suspend(struct device *dev)
+{
+   struct irqc_priv *p = dev_get_drvdata(dev);
+
+   if (atomic_read(>wakeup_path))
+   device_set_wakeup_path(dev);
+
+   return 0;
+}
+
+static SIMPLE_DEV_PM_OPS(irqc_pm_ops, irqc_suspend, NULL);
+
 static const struct of_device_id irqc_dt_ids[] = {
{ .compatible = "renesas,irqc", },
{},
@@ -288,6 +289,7 @@ static struct platform_driver irqc_device_driver = {
.driver = {
.name   = "renesas_irqc",
.of_match_table = irqc_dt_ids,
+   .pm = _pm_ops,
}
 };
 
-- 
2.7.4

[PATCH v3 1/3] irqchip/renesas-intc-irqpin: Use wakeup_path i.s.o. explicit clock handling

[Geert Uytterhoeven]

Since commit 705bc96c2c15313c ("irqchip: renesas-intc-irqpin: Add
minimal runtime PM support"), when an IRQ is used for wakeup, the INTC
block's module clock (if exists) is manually kept running during system
suspend, to make sure the device stays active.

However, this explicit clock handling is merely a workaround for a
failure to properly communicate wakeup information to the device core.

Instead, set the device's power.wakeup_path field, to indicate this
device is part of the wakeup path.  Depending on the PM Domain's
active_wakeup configuration, the genpd core code will keep the device
enabled (and the clock running) during system suspend when needed.
This allows for the removal of all explicit clock handling code from the
driver.

Signed-off-by: Geert Uytterhoeven 
---
v3:
  - Revert to v1, as WAKEUP_PATH didn't make it,
  - Use an atomic_t instead of a boolean flag, as the boolean tracked
only the status of the last configured GPIO, while multiple
interrupt pins on the same interrupt controller may be involved with
wake-up,
  - Use new helper device_set_wakeup_path(),
  - Drop checks for CONFIG_PM_SLEEP, as device_set_wakeup_path() is
always available, unlike dev_pm_info.wakeup_path,
  - Mark intc_irqpin_suspend() __maybe_unused,

v2 (sent by Ulf Hanson):
  - Convert to use the WAKEUP_PATH driver PM flag (Ulf).
---
 drivers/irqchip/irq-renesas-intc-irqpin.c | 40 +--
 1 file changed, 16 insertions(+), 24 deletions(-)

diff --git a/drivers/irqchip/irq-renesas-intc-irqpin.c 
b/drivers/irqchip/irq-renesas-intc-irqpin.c
index cee59fe1321c44f9..c6e6c9e9137ad1d2 100644
--- a/drivers/irqchip/irq-renesas-intc-irqpin.c
+++ b/drivers/irqchip/irq-renesas-intc-irqpin.c
@@ -17,7 +17,6 @@
  * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
  */
 
-#include 
 #include 
 #include 
 #include 
@@ -78,16 +77,14 @@ struct intc_irqpin_priv {
struct platform_device *pdev;
struct irq_chip irq_chip;
struct irq_domain *irq_domain;
-   struct clk *clk;
+   atomic_t wakeup_path;
unsigned shared_irqs:1;
-   unsigned needs_clk:1;
u8 shared_irq_mask;
 };
 
 struct intc_irqpin_config {
unsigned int irlm_bit;
unsigned needs_irlm:1;
-   unsigned needs_clk:1;
 };
 
 static unsigned long intc_irqpin_read32(void __iomem *iomem)
@@ -287,14 +284,10 @@ static int intc_irqpin_irq_set_wake(struct irq_data *d, 
unsigned int on)
int hw_irq = irqd_to_hwirq(d);
 
irq_set_irq_wake(p->irq[hw_irq].requested_irq, on);
-
-   if (!p->clk)
-   return 0;
-
if (on)
-   clk_enable(p->clk);
+   atomic_inc(>wakeup_path);
else
-   clk_disable(p->clk);
+   atomic_dec(>wakeup_path);
 
return 0;
 }
@@ -369,12 +362,10 @@ static const struct irq_domain_ops 
intc_irqpin_irq_domain_ops = {
 static const struct intc_irqpin_config intc_irqpin_irlm_r8a777x = {
.irlm_bit = 23, /* ICR0.IRLM0 */
.needs_irlm = 1,
-   .needs_clk = 0,
 };
 
 static const struct intc_irqpin_config intc_irqpin_rmobile = {
.needs_irlm = 0,
-   .needs_clk = 1,
 };
 
 static const struct of_device_id intc_irqpin_dt_ids[] = {
@@ -426,18 +417,6 @@ static int intc_irqpin_probe(struct platform_device *pdev)
platform_set_drvdata(pdev, p);
 
config = of_device_get_match_data(dev);
-   if (config)
-   p->needs_clk = config->needs_clk;
-
-   p->clk = devm_clk_get(dev, NULL);
-   if (IS_ERR(p->clk)) {
-   if (p->needs_clk) {
-   dev_err(dev, "unable to get clock\n");
-   ret = PTR_ERR(p->clk);
-   goto err0;
-   }
-   p->clk = NULL;
-   }
 
pm_runtime_enable(dev);
pm_runtime_get_sync(dev);
@@ -606,12 +585,25 @@ static int intc_irqpin_remove(struct platform_device 
*pdev)
return 0;
 }
 
+static int __maybe_unused intc_irqpin_suspend(struct device *dev)
+{
+   struct intc_irqpin_priv *p = dev_get_drvdata(dev);
+
+   if (atomic_read(>wakeup_path))
+   device_set_wakeup_path(dev);
+
+   return 0;
+}
+
+static SIMPLE_DEV_PM_OPS(intc_irqpin_pm_ops, intc_irqpin_suspend, NULL);
+
 static struct platform_driver intc_irqpin_device_driver = {
.probe  = intc_irqpin_probe,
.remove = intc_irqpin_remove,
.driver = {
.name   = "renesas_intc_irqpin",
.of_match_table = intc_irqpin_dt_ids,
+   .pm = _irqpin_pm_ops,
}
 };
 
-- 
2.7.4

[PATCH v3 3/3] gpio: rcar: Use wakeup_path i.s.o. explicit clock handling

[Geert Uytterhoeven]

Since commit ab82fa7da4dce5c7 ("gpio: rcar: Prevent module clock disable
when wake-up is enabled"), when a GPIO is used for wakeup, the GPIO
block's module clock (if exists) is manually kept running during system
suspend, to make sure the device stays active.

However, this explicit clock handling is merely a workaround for a
failure to properly communicate wakeup information to the device core.

Instead, set the device's power.wakeup_path field, to indicate this
device is part of the wakeup path.  Depending on the PM Domain's
active_wakeup configuration, the genpd core code will keep the device
enabled (and the clock running) during system suspend when needed.
This allows for the removal of all explicit clock handling code from the
driver.

Signed-off-by: Geert Uytterhoeven 
---
v3:
  - Revert to v1, as WAKEUP_PATH didn't make it,
  - Use an atomic_t instead of a boolean flag, as the latter tracked
only the status of the last configured GPIO, while multiple GPIOs on
the same GPIO controller may be involved with wake-up,
  - Use new helper device_set_wakeup_path(),
  - Drop checks for CONFIG_PM_SLEEP, as device_set_wakeup_path() is
always available, unlike dev_pm_info.wakeup_path,
  - Mark gpio_rcar_suspend() __maybe_unused,
  - Drop RFC state, now the dependencies are upstream.

v2 (sent by Ulf Hanson):
  - Convert to use the WAKEUP_PATH driver PM flag (Ulf).
---
 drivers/gpio/gpio-rcar.c | 38 --
 1 file changed, 16 insertions(+), 22 deletions(-)

diff --git a/drivers/gpio/gpio-rcar.c b/drivers/gpio/gpio-rcar.c
index e76de57dd617d7e2..ebaea8b1594b7fc4 100644
--- a/drivers/gpio/gpio-rcar.c
+++ b/drivers/gpio/gpio-rcar.c
@@ -14,7 +14,6 @@
  * GNU General Public License for more details.
  */
 
-#include 
 #include 
 #include 
 #include 
@@ -37,10 +36,9 @@ struct gpio_rcar_priv {
struct platform_device *pdev;
struct gpio_chip gpio_chip;
struct irq_chip irq_chip;
-   struct clk *clk;
unsigned int irq_parent;
+   atomic_t wakeup_path;
bool has_both_edge_trigger;
-   bool needs_clk;
 };
 
 #define IOINTSEL 0x00  /* General IO/Interrupt Switching Register */
@@ -186,13 +184,10 @@ static int gpio_rcar_irq_set_wake(struct irq_data *d, 
unsigned int on)
}
}
 
-   if (!p->clk)
-   return 0;
-
if (on)
-   clk_enable(p->clk);
+   atomic_inc(>wakeup_path);
else
-   clk_disable(p->clk);
+   atomic_dec(>wakeup_path);
 
return 0;
 }
@@ -330,17 +325,14 @@ static int gpio_rcar_direction_output(struct gpio_chip 
*chip, unsigned offset,
 
 struct gpio_rcar_info {
bool has_both_edge_trigger;
-   bool needs_clk;
 };
 
 static const struct gpio_rcar_info gpio_rcar_info_gen1 = {
.has_both_edge_trigger = false,
-   .needs_clk = false,
 };
 
 static const struct gpio_rcar_info gpio_rcar_info_gen2 = {
.has_both_edge_trigger = true,
-   .needs_clk = true,
 };
 
 static const struct of_device_id gpio_rcar_of_table[] = {
@@ -403,7 +395,6 @@ static int gpio_rcar_parse_dt(struct gpio_rcar_priv *p, 
unsigned int *npins)
ret = of_parse_phandle_with_fixed_args(np, "gpio-ranges", 3, 0, );
*npins = ret == 0 ? args.args[2] : RCAR_MAX_GPIO_PER_BANK;
p->has_both_edge_trigger = info->has_both_edge_trigger;
-   p->needs_clk = info->needs_clk;
 
if (*npins == 0 || *npins > RCAR_MAX_GPIO_PER_BANK) {
dev_warn(>pdev->dev,
@@ -440,16 +431,6 @@ static int gpio_rcar_probe(struct platform_device *pdev)
 
platform_set_drvdata(pdev, p);
 
-   p->clk = devm_clk_get(dev, NULL);
-   if (IS_ERR(p->clk)) {
-   if (p->needs_clk) {
-   dev_err(dev, "unable to get clock\n");
-   ret = PTR_ERR(p->clk);
-   goto err0;
-   }
-   p->clk = NULL;
-   }
-
pm_runtime_enable(dev);
 
irq = platform_get_resource(pdev, IORESOURCE_IRQ, 0);
@@ -531,11 +512,24 @@ static int gpio_rcar_remove(struct platform_device *pdev)
return 0;
 }
 
+static int __maybe_unused gpio_rcar_suspend(struct device *dev)
+{
+   struct gpio_rcar_priv *p = dev_get_drvdata(dev);
+
+   if (atomic_read(>wakeup_path))
+   device_set_wakeup_path(dev);
+
+   return 0;
+}
+
+static SIMPLE_DEV_PM_OPS(gpio_rcar_pm_ops, gpio_rcar_suspend, NULL);
+
 static struct platform_driver gpio_rcar_device_driver = {
.probe  = gpio_rcar_probe,
.remove = gpio_rcar_remove,
.driver = {
.name   = "gpio_rcar",
+   .pm = _rcar_pm_ops,
.of_match_table = of_match_ptr(gpio_rcar_of_table),
}
 };
-- 
2.7.4

[PATCH v3 0/3] renesas: irqchip: Use wakeup_path i.s.o. explicit clock handling

[Geert Uytterhoeven]

Hi all,

If an interrupt controller in a Renesas ARM SoC is part of a Clock
Domain, and it is part of the wakeup path, it must be kept active during
system suspend.

Currently this is handled in all interrupt controller drivers by
explicitly increasing the use count of the module clock when the device
is part of the wakeup path.  However, this explicit clock handling is
merely a workaround for a failure to properly communicate wakeup
information to the device core.

Hence this series fixes the affected drivers by setting the devices'
power.wakeup_path fields instead, to indicate they are part of the
wakeup path.  Depending on the PM Domain's active_wakeup configuration,
the genpd core code will keep the device enabled (and the clock running)
during system suspend when needed.

Target trees:
  - Patches 1 and 2 are meant for the irqchip tree,
  - Patch 3 is meant for the GPIO tree.

Changes compared to v2 (sent by Ulf Hanson):
  - Revert to v1, as WAKEUP_PATH didn't make it,
  - Use an atomic_t instead of a boolean flag, as the boolean tracked
only the status of the last configured GPIO, while multiple interrupt
sources on the same irqchip may be involved with wake-up,
  - Use new helper device_set_wakeup_path(),
  - Drop checks for CONFIG_PM_SLEEP, as device_set_wakeup_path() is
always available, unlike dev_pm_info.wakeup_path,
  - Mark suspend functions __maybe_unused.

Changes compared to v1:
  - Convert to use the WAKEUP_PATH driver PM flag (Ulf Hanson).

This has been tested on r8a73a4/ape6evm, r8a7740/armadillo,
r8a7791/koelsch, r8a7795/salvator-x and -xs, r8a7796/salvator-x, and
sh73a0/kzm9g.

Thanks for applying!

Geert Uytterhoeven (3):
  irqchip/renesas-intc-irqpin: Use wakeup_path i.s.o. explicit clock
handling
  irqchip/renesas-irqc: Use wakeup_path i.s.o. explicit clock handling
  gpio: rcar: Use wakeup_path i.s.o. explicit clock handling

 drivers/gpio/gpio-rcar.c  | 38 +
 drivers/irqchip/irq-renesas-intc-irqpin.c | 40 +--
 drivers/irqchip/irq-renesas-irqc.c| 30 ---
 3 files changed, 48 insertions(+), 60 deletions(-)

-- 
2.7.4

Gr{oetje,eeting}s,

Geert

--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- ge...@linux-m68k.org

In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
-- Linus Torvalds

[PATCH v2] sh_eth: Remove obsolete explicit clock handling for WoL

[Geert Uytterhoeven]

Currently, if Wake-on-LAN is enabled, the SH-ETH device's module clock
is manually kept running during system suspend, to make sure the device
stays active.

Since commits 91c719f5ec6671f7 ("soc: renesas: rcar-sysc: Keep wakeup
sources active during system suspend") and 744dddcae84441b1 ("clk:
renesas: mstp: Keep wakeup sources active during system suspend"), this
workaround is no longer needed.  Hence remove all explicit clock
handling to keep the device active.

Signed-off-by: Geert Uytterhoeven 
Reviewed-by: Niklas Söderlund 
Reviewed-by: Sergei Shtylyov 
---
v2:
  - Add Reviewed-by,
  - Drop RFC state, now the dependencies are upstream.
---
 drivers/net/ethernet/renesas/sh_eth.c | 18 +++---
 1 file changed, 3 insertions(+), 15 deletions(-)

diff --git a/drivers/net/ethernet/renesas/sh_eth.c 
b/drivers/net/ethernet/renesas/sh_eth.c
index a197e11f3a564470..92dcf8717fc6e7bc 100644
--- a/drivers/net/ethernet/renesas/sh_eth.c
+++ b/drivers/net/ethernet/renesas/sh_eth.c
@@ -40,7 +40,6 @@
 #include 
 #include 
 #include 
-#include 
 #include 
 #include 
 
@@ -2304,7 +2303,7 @@ static void sh_eth_get_wol(struct net_device *ndev, 
struct ethtool_wolinfo *wol)
wol->supported = 0;
wol->wolopts = 0;
 
-   if (mdp->cd->magic && mdp->clk) {
+   if (mdp->cd->magic) {
wol->supported = WAKE_MAGIC;
wol->wolopts = mdp->wol_enabled ? WAKE_MAGIC : 0;
}
@@ -2314,7 +2313,7 @@ static int sh_eth_set_wol(struct net_device *ndev, struct 
ethtool_wolinfo *wol)
 {
struct sh_eth_private *mdp = netdev_priv(ndev);
 
-   if (!mdp->cd->magic || !mdp->clk || wol->wolopts & ~WAKE_MAGIC)
+   if (!mdp->cd->magic || wol->wolopts & ~WAKE_MAGIC)
return -EOPNOTSUPP;
 
mdp->wol_enabled = !!(wol->wolopts & WAKE_MAGIC);
@@ -3153,11 +3152,6 @@ static int sh_eth_drv_probe(struct platform_device *pdev)
goto out_release;
}
 
-   /* Get clock, if not found that's OK but Wake-On-Lan is unavailable */
-   mdp->clk = devm_clk_get(>dev, NULL);
-   if (IS_ERR(mdp->clk))
-   mdp->clk = NULL;
-
ndev->base_addr = res->start;
 
spin_lock_init(>lock);
@@ -3278,7 +3272,7 @@ static int sh_eth_drv_probe(struct platform_device *pdev)
if (ret)
goto out_napi_del;
 
-   if (mdp->cd->magic && mdp->clk)
+   if (mdp->cd->magic)
device_set_wakeup_capable(>dev, 1);
 
/* print device information */
@@ -3331,9 +3325,6 @@ static int sh_eth_wol_setup(struct net_device *ndev)
/* Enable MagicPacket */
sh_eth_modify(ndev, ECMR, ECMR_MPDE, ECMR_MPDE);
 
-   /* Increased clock usage so device won't be suspended */
-   clk_enable(mdp->clk);
-
return enable_irq_wake(ndev->irq);
 }
 
@@ -3359,9 +3350,6 @@ static int sh_eth_wol_restore(struct net_device *ndev)
if (ret < 0)
return ret;
 
-   /* Restore clock usage count */
-   clk_disable(mdp->clk);
-
return disable_irq_wake(ndev->irq);
 }
 
-- 
2.7.4

[PATCH v2] ravb: Remove obsolete explicit clock handling for WoL

[Geert Uytterhoeven]

Currently, if Wake-on-LAN is enabled, the EtherAVB device's module clock
is manually kept running during system suspend, to make sure the device
stays active.

Since commit 91c719f5ec6671f7 ("soc: renesas: rcar-sysc: Keep wakeup
sources active during system suspend") , this workaround is no longer
needed.  Hence remove all explicit clock handling to keep the device
active.

Signed-off-by: Geert Uytterhoeven 
Reviewed-by: Niklas Söderlund 
Reviewed-by: Sergei Shtylyov 
---
v2:
  - Add Reviewed-by,
  - Rebased,
  - Drop RFC state, now the dependency is upstream.
---
 drivers/net/ethernet/renesas/ravb_main.c | 6 --
 1 file changed, 6 deletions(-)

diff --git a/drivers/net/ethernet/renesas/ravb_main.c 
b/drivers/net/ethernet/renesas/ravb_main.c
index c87f57ca44371586..a95fbd5510d92e7b 100644
--- a/drivers/net/ethernet/renesas/ravb_main.c
+++ b/drivers/net/ethernet/renesas/ravb_main.c
@@ -2255,9 +2255,6 @@ static int ravb_wol_setup(struct net_device *ndev)
/* Enable MagicPacket */
ravb_modify(ndev, ECMR, ECMR_MPDE, ECMR_MPDE);
 
-   /* Increased clock usage so device won't be suspended */
-   clk_enable(priv->clk);
-
return enable_irq_wake(priv->emac_irq);
 }
 
@@ -2276,9 +2273,6 @@ static int ravb_wol_restore(struct net_device *ndev)
if (ret < 0)
return ret;
 
-   /* Restore clock usage count */
-   clk_disable(priv->clk);
-
return disable_irq_wake(priv->emac_irq);
 }
 
-- 
2.7.4

[PATCH] ravb: Remove obsolete explicit clock handling for WoL

[Geert Uytterhoeven]

Currently, if Wake-on-LAN is enabled, the EtherAVB device's module clock
is manually kept running during system suspend, to make sure the device
stays active.

Since commit 91c719f5ec6671f7 ("soc: renesas: rcar-sysc: Keep wakeup
sources active during system suspend") , this workaround is no longer
needed.  Hence remove all explicit clock handling to keep the device
active.

Signed-off-by: Geert Uytterhoeven 
Reviewed-by: Niklas Söderlund 
Reviewed-by: Sergei Shtylyov 
---
v2:
  - Add Reviewed-by,
  - Rebased,
  - Drop RFC state, now the dependency is upstream.
---
 drivers/net/ethernet/renesas/ravb_main.c | 6 --
 1 file changed, 6 deletions(-)

diff --git a/drivers/net/ethernet/renesas/ravb_main.c 
b/drivers/net/ethernet/renesas/ravb_main.c
index c87f57ca44371586..a95fbd5510d92e7b 100644
--- a/drivers/net/ethernet/renesas/ravb_main.c
+++ b/drivers/net/ethernet/renesas/ravb_main.c
@@ -2255,9 +2255,6 @@ static int ravb_wol_setup(struct net_device *ndev)
/* Enable MagicPacket */
ravb_modify(ndev, ECMR, ECMR_MPDE, ECMR_MPDE);
 
-   /* Increased clock usage so device won't be suspended */
-   clk_enable(priv->clk);
-
return enable_irq_wake(priv->emac_irq);
 }
 
@@ -2276,9 +2273,6 @@ static int ravb_wol_restore(struct net_device *ndev)
if (ret < 0)
return ret;
 
-   /* Restore clock usage count */
-   clk_disable(priv->clk);
-
return disable_irq_wake(priv->emac_irq);
 }
 
-- 
2.7.4

Re: [PATCH v2 2/5] arm64: dts: renesass: r8a77970: add VSPD support

[Kieran Bingham]

Hi Niklas, and Sergei,

On 08/02/18 15:47, Niklas Söderlund wrote:
> From: Sergei Shtylyov 
> 
> Describe VSPD0 in the R8A77970 device tree; it will be used by DU in
> the next patch...
> 
> Based on the original (and large) patch by Daisuke Matsushita
> .
> 
> Signed-off-by: Vladimir Barinov 
> Signed-off-by: Sergei Shtylyov 
> Signed-off-by: Niklas Söderlund 

Seems odd that the interrupts here are so distant on the V3M platform vs the
others ... but the data sheets agree.

Registers, interrupt, CPG values reviewed.

Reviewed-by: Kieran Bingham 

> ---
>  arch/arm64/boot/dts/renesas/r8a77970.dtsi | 10 ++
>  1 file changed, 10 insertions(+)
> 
> diff --git a/arch/arm64/boot/dts/renesas/r8a77970.dtsi 
> b/arch/arm64/boot/dts/renesas/r8a77970.dtsi
> index 2567e68fe0c6cf7b..5eb5d4b26f955671 100644
> --- a/arch/arm64/boot/dts/renesas/r8a77970.dtsi
> +++ b/arch/arm64/boot/dts/renesas/r8a77970.dtsi
> @@ -620,6 +620,16 @@
>   power-domains = < R8A77970_PD_ALWAYS_ON>;
>   resets = < 603>;
>   };
> +
> + vspd0: vsp@fea2 {
> + compatible = "renesas,vsp2";
> + reg = <0 0xfea2 0 0x4000>;
> + interrupts = ;
> + clocks = < CPG_MOD 623>;
> + power-domains = < R8A77970_PD_ALWAYS_ON>;
> + resets = < 623>;
> + renesas,fcp = <>;
> + };
>   };
>  
>   timer {
> 

Re: [PATCH v2 1/5] arm64: dts: renesass: r8a77970: add FCPVD support

[Kieran Bingham]

Hi Niklas, and Sergei,

On 08/02/18 15:47, Niklas Söderlund wrote:
> From: Sergei Shtylyov 
> 
> Describe FCPVD0 in the R8A77970 device tree; it will be used by VSPD0 in
> the next patch...
> 
> Based on the original (and large) patch by Daisuke Matsushita
> .
> 
> Signed-off-by: Vladimir Barinov 
> Signed-off-by: Sergei Shtylyov 
> Signed-off-by: Niklas Söderlund 

Register address and CPG verified:

Reviewed-by: Kieran Bingham 

> ---
>  arch/arm64/boot/dts/renesas/r8a77970.dtsi | 8 
>  1 file changed, 8 insertions(+)
> 
> diff --git a/arch/arm64/boot/dts/renesas/r8a77970.dtsi 
> b/arch/arm64/boot/dts/renesas/r8a77970.dtsi
> index 13c88414cb432b1a..2567e68fe0c6cf7b 100644
> --- a/arch/arm64/boot/dts/renesas/r8a77970.dtsi
> +++ b/arch/arm64/boot/dts/renesas/r8a77970.dtsi
> @@ -612,6 +612,14 @@
>   #address-cells = <1>;
>   #size-cells = <0>;
>   };
> +
> + fcpvd0: fcp@fea27000 {
> + compatible = "renesas,fcpv";
> + reg = <0 0xfea27000 0 0x200>;
> + clocks = < CPG_MOD 603>;
> + power-domains = < R8A77970_PD_ALWAYS_ON>;
> + resets = < 603>;
> + };
>   };
>  
>   timer {
> 

Applied "ASoC: remove rtd->platform checck" to the asoc tree

[Mark Brown]

The patch

   ASoC: remove rtd->platform checck

has been applied to the asoc tree at

   https://git.kernel.org/pub/scm/linux/kernel/git/broonie/sound.git 

All being well this means that it will be integrated into the linux-next
tree (usually sometime in the next 24 hours) and sent to Linus during
the next merge window (or sooner if it is a bug fix), however if
problems are discovered then the patch may be dropped or reverted.  

You may get further e-mails resulting from automated or manual testing
and review of the tree, please engage with people reporting problems and
send followup patches addressing any issues that are reported if needed.

If any updates are required or you are submitting further changes they
should be sent as incremental updates against current git, existing
patches will not be replaced.

Please add any relevant lists and maintainers to the CCs when replying
to this mail.

Thanks,
Mark

>From bbf4d71aa9e21e8ee05e16cbb2cd2999252ce930 Mon Sep 17 00:00:00 2001
From: Kuninori Morimoto 
Date: Mon, 29 Jan 2018 02:40:28 +
Subject: [PATCH] ASoC: remove rtd->platform checck

Now, we are ready to replace rtd->platform to rtdcom list.
>From this patch, rtd->platform check is no longer needed.
It will be replaced into rtdcom.

Signed-off-by: Kuninori Morimoto 
Signed-off-by: Mark Brown 
---
 sound/soc/soc-core.c | 5 -
 1 file changed, 5 deletions(-)

diff --git a/sound/soc/soc-core.c b/sound/soc/soc-core.c
index 96c44f6576c9..9558125b448d 100644
--- a/sound/soc/soc-core.c
+++ b/sound/soc/soc-core.c
@@ -1162,11 +1162,6 @@ static int soc_bind_dai_link(struct snd_soc_card *card,
 
rtd->platform = platform;
}
-   if (!rtd->platform) {
-   dev_err(card->dev, "ASoC: platform %s not registered\n",
-   dai_link->platform_name);
-   goto _err_defer;
-   }
 
soc_add_pcm_runtime(card, rtd);
return 0;
-- 
2.16.1

Applied "ASoC: bcm: cygnus: replace platform to component" to the asoc tree

[Mark Brown]

The patch

   ASoC: bcm: cygnus: replace platform to component

has been applied to the asoc tree at

   https://git.kernel.org/pub/scm/linux/kernel/git/broonie/sound.git 

All being well this means that it will be integrated into the linux-next
tree (usually sometime in the next 24 hours) and sent to Linus during
the next merge window (or sooner if it is a bug fix), however if
problems are discovered then the patch may be dropped or reverted.  

You may get further e-mails resulting from automated or manual testing
and review of the tree, please engage with people reporting problems and
send followup patches addressing any issues that are reported if needed.

If any updates are required or you are submitting further changes they
should be sent as incremental updates against current git, existing
patches will not be replaced.

Please add any relevant lists and maintainers to the CCs when replying
to this mail.

Thanks,
Mark

>From 540b925af4c0456adf220dea991d91bf05ad77c0 Mon Sep 17 00:00:00 2001
From: Kuninori Morimoto 
Date: Mon, 29 Jan 2018 02:42:37 +
Subject: [PATCH] ASoC: bcm: cygnus: replace platform to component

Now platform can be replaced to component, let's do it.

Signed-off-by: Kuninori Morimoto 
Signed-off-by: Mark Brown 
---
 sound/soc/bcm/cygnus-pcm.c | 7 +++
 1 file changed, 3 insertions(+), 4 deletions(-)

diff --git a/sound/soc/bcm/cygnus-pcm.c b/sound/soc/bcm/cygnus-pcm.c
index d616e096462e..123ecf5479d7 100644
--- a/sound/soc/bcm/cygnus-pcm.c
+++ b/sound/soc/bcm/cygnus-pcm.c
@@ -820,7 +820,7 @@ static int cygnus_dma_new(struct snd_soc_pcm_runtime *rtd)
return 0;
 }
 
-static struct snd_soc_platform_driver cygnus_soc_platform = {
+static struct snd_soc_component_driver cygnus_soc_platform = {
.ops= _pcm_ops,
.pcm_new= cygnus_dma_new,
.pcm_free   = cygnus_dma_free_dma_buffers,
@@ -840,7 +840,8 @@ int cygnus_soc_platform_register(struct device *dev,
return rc;
}
 
-   rc = snd_soc_register_platform(dev, _soc_platform);
+   rc = devm_snd_soc_register_component(dev, _soc_platform,
+NULL, 0);
if (rc) {
dev_err(dev, "%s failed\n", __func__);
return rc;
@@ -851,8 +852,6 @@ int cygnus_soc_platform_register(struct device *dev,
 
 int cygnus_soc_platform_unregister(struct device *dev)
 {
-   snd_soc_unregister_platform(dev);
-
return 0;
 }
 
-- 
2.16.1