Re: [PATCH v2 1/4] pinctrl: sh-pfc: Add physical pin multiplexing helper macros
> On November 16, 2018 at 9:42 AM Geert Uytterhoeven > wrote: > > > Hi Uli, > > On Fri, Nov 16, 2018 at 8:21 AM Ulrich Hecht wrote: > > Used by I2C controllers 0, 3 and 5 in R8A7795 and R8A7796 SoCs. > > > > Signed-off-by: Ulrich Hecht > > Thanks for your patch! > > Reviewed-by: Geert Uytterhoeven > > Some bikeshedding below, which I believe would increase readability. > > > --- a/drivers/pinctrl/sh-pfc/sh_pfc.h > > +++ b/drivers/pinctrl/sh-pfc/sh_pfc.h > > @@ -386,6 +386,28 @@ extern const struct sh_pfc_soc_info shx3_pinmux_info; > > PINMUX_DATA(fn##_MARK, FN_##msel, FN_##fn, FN_##ipsr) > > > > /* > > + * Describe a pinmux configuration similar to PINMUX_IPSR_MSEL, but with > > + * an additional select register that controls physical multiplexing > > + * with another pin. > > + * - ipsr: IPSR field > > + * - fn: Function name, also referring to the IPSR field > > + * - msel1: Physical multiplexing selector > > psel? > > > + * - msel2: Module selector > > msel? > > > + */ > > +#define PINMUX_IPSR_MSEL2(ipsr, fn, msel1, msel2) \ > > PINMUX_IPSR_PHYS_MSEL? > > > + PINMUX_DATA(fn##_MARK, FN_##msel1, FN_##msel2, FN_##fn, FN_##ipsr) > > + > > +/* > > + * Describe a pinmux configuration in which a pin is physically multiplexed > > + * with other pins. > > + * - ipsr: IPSR field > > + * - fn: Function name, also referring to the IPSR field > > + * - msel: Phyiscal multiplexing selector > > psel? > Physical > > > + */ > > +#define PINMUX_IPSR_PHYS(ipsr, fn, msel) \ > > + PINMUX_DATA(fn##_MARK, FN_##msel) > > + > > +/* > > * Describe a pinmux configuration for a single-function pin with GPIO > > * capability. > > * - fn: Function name > > If you agree, I can fix up all of the above while applying. That would be fine with me, thank you. CU Uli
RE: [PATCH v6 1/2] pinctrl: Add RZ/A2 pin and gpio controller
Hi Geert, On Friday, November 16, 2018, Geert Uytterhoeven wrote: > > We can have Geert give his opinion on the topic since it was his > > suggestion to begin with. > > > > > > > I'm sorry this is more work, and again, it might be post-poned imo, > > > provided you drop this change you have introduced here. > > > > Since Geert is the maintainer of the Renesas pinctrl drivers, I'll let > > him decide if I should drop that part for now since only 1 SOC exists > > today. > > I don't have a real preference. > > Two cautions, though: > 1. You do have to remember to increase port_names[], when needed, Given your comment that we always explicitly add SOC support to a driver, even if that just means adding a compatible string, we will always have to edit the driver anyway. > 2. Trying to predict the future may fail, and more driver updates may be > needed when a new variant of this pin controller will be conceived. Very true. I think changing the hard coded RZA2_NPINS into priv->npins was the correct thing to do. Of course the driver name is pinctrl-rza2.c which will be silly if used for other SoCs. But then again...I'm using lots of "rcar" drivers for RZ/A2! Chris
Re: [PATCH] arm64: defconfig: Enable CONFIG_PHY_RCAR_GEN3_PCIE
On Thu, Nov 15, 2018 at 03:47:10PM +0100, Marek Vasut wrote: > On 11/15/2018 03:33 PM, Simon Horman wrote: > > On Wed, Nov 14, 2018 at 04:32:05PM +0100, Marek Vasut wrote: > >> On 11/13/2018 04:22 PM, Geert Uytterhoeven wrote: > >>> Enable R-Car Gen3 PCIe PHY support, which is needed for PCIe to function > >>> on the Renesas Condor board. > >>> > >>> Signed-off-by: Geert Uytterhoeven > >> > >> This helps > >> > >> Reviewed-by: Marek Vasut > > > > Thanks, would it be better to use enable this driver as a module rather > > than a built-in? > > I think not, since the pcie-rcar cannot be compiled in as module, so the > associated phy driver shouldn't be compiled in as module either. Thanks Marek, applied for v4.21.
Re: [PATCH v2 2/2] ARM: shmobile: Move SoC Kconfig symbols to drivers/soc/renesas/
On Fri, Nov 16, 2018 at 02:48:42PM +0100, Geert Uytterhoeven wrote: > For consistency with arm64, where vendors have a single Kconfig symbol > in arch/arm64/Kconfig.platforms. > > Signed-off-by: Geert Uytterhoeven Thanks Geert, applied for v4.21.
Re: [PATCH v2 1/2] arm64: renesas: Move SoC Kconfig symbols to drivers/soc/renesas/
On Fri, Nov 16, 2018 at 02:48:41PM +0100, Geert Uytterhoeven wrote: > arch/arm64/Kconfig.platforms has SoC-specific Kconfig symbols for > Renesas SoCs, while other vendors have only a single Kconfig symbol. > > Increase consistency with other vendors by moving the SoC-specific > Kconfig symbols to drivers/soc/renesas/Kconfig. > > Increase consistency with R-Car Gen1 and Gen2 SoCs on arm32 by > introducing a family-specific Kconfig symbol for R-Car Gen3 > (ARCH_RCAR_GEN3), which enables family-specific hardware features. > While so far only a single family (R-Car Gen3 and derivatives) of > Renesas arm64 SoCs is supported by Linux, this will make it easier > to add support for other SoC families later. > > Signed-off-by: Geert Uytterhoeven > --- > v2: > - Introduce a family-specific Kconfig symbol for R-Car Gen3. Thanks Geert, applied for v4.21.
Re: [PATCH] ARM: shmobile: Hide ARCH_RZN1 to improve consistency
On Fri, Nov 16, 2018 at 02:38:03PM +0100, Geert Uytterhoeven wrote: > Unlike all other family-specific Kconfig symbols for Renesas ARM SoCs, > ARCH_RZN1 is user-visible. As this symbol is already selected by the > SoC-specific ARCH_R9A06G032 symbol, there is no need for that. > > Hide ARCH_RZN1 from the user, and move it up, where all other > family-specific Kconfig symbols live. Drop the select of CPU_V7, as > this is already implied by the dependency of ARCH_RENESAS on > ARCH_MULTI_V7. > > Signed-off-by: Geert Uytterhoeven Thanks Geert, applied for v4.21.
[PATCH v2 1/2] arm64: renesas: Move SoC Kconfig symbols to drivers/soc/renesas/
arch/arm64/Kconfig.platforms has SoC-specific Kconfig symbols for Renesas SoCs, while other vendors have only a single Kconfig symbol. Increase consistency with other vendors by moving the SoC-specific Kconfig symbols to drivers/soc/renesas/Kconfig. Increase consistency with R-Car Gen1 and Gen2 SoCs on arm32 by introducing a family-specific Kconfig symbol for R-Car Gen3 (ARCH_RCAR_GEN3), which enables family-specific hardware features. While so far only a single family (R-Car Gen3 and derivatives) of Renesas arm64 SoCs is supported by Linux, this will make it easier to add support for other SoC families later. Signed-off-by: Geert Uytterhoeven --- v2: - Introduce a family-specific Kconfig symbol for R-Car Gen3. --- arch/arm64/Kconfig.platforms | 59 --- drivers/soc/renesas/Kconfig | 90 ++-- 2 files changed, 77 insertions(+), 72 deletions(-) diff --git a/arch/arm64/Kconfig.platforms b/arch/arm64/Kconfig.platforms index 2eb02734ae4575a0..28f052185eb6e6b3 100644 --- a/arch/arm64/Kconfig.platforms +++ b/arch/arm64/Kconfig.platforms @@ -159,69 +159,10 @@ config ARCH_RENESAS bool "Renesas SoC Platforms" select GPIOLIB select PINCTRL - select PM - select PM_GENERIC_DOMAINS - select RENESAS_IRQC select SOC_BUS - select SYS_SUPPORTS_SH_CMT - select SYS_SUPPORTS_SH_TMU help This enables support for the ARMv8 based Renesas SoCs. -config ARCH_R8A774A1 - bool "Renesas RZ/G2M SoC Platform" - depends on ARCH_RENESAS - help - This enables support for the Renesas RZ/G2M SoC. - -config ARCH_R8A774C0 - bool "Renesas RZ/G2E SoC Platform" - depends on ARCH_RENESAS - help - This enables support for the Renesas RZ/G2E SoC. - -config ARCH_R8A7795 - bool "Renesas R-Car H3 SoC Platform" - depends on ARCH_RENESAS - help - This enables support for the Renesas R-Car H3 SoC. - -config ARCH_R8A7796 - bool "Renesas R-Car M3-W SoC Platform" - depends on ARCH_RENESAS - help - This enables support for the Renesas R-Car M3-W SoC. - -config ARCH_R8A77965 - bool "Renesas R-Car M3-N SoC Platform" - depends on ARCH_RENESAS - help - This enables support for the Renesas R-Car M3-N SoC. - -config ARCH_R8A77970 - bool "Renesas R-Car V3M SoC Platform" - depends on ARCH_RENESAS - help - This enables support for the Renesas R-Car V3M SoC. - -config ARCH_R8A77980 - bool "Renesas R-Car V3H SoC Platform" - depends on ARCH_RENESAS - help - This enables support for the Renesas R-Car V3H SoC. - -config ARCH_R8A77990 - bool "Renesas R-Car E3 SoC Platform" - depends on ARCH_RENESAS - help - This enables support for the Renesas R-Car E3 SoC. - -config ARCH_R8A77995 - bool "Renesas R-Car D3 SoC Platform" - depends on ARCH_RENESAS - help - This enables support for the Renesas R-Car D3 SoC. - config ARCH_ROCKCHIP bool "Rockchip Platforms" select ARCH_HAS_RESET_CONTROLLER diff --git a/drivers/soc/renesas/Kconfig b/drivers/soc/renesas/Kconfig index 407f02c80e8b721c..2f5bc5a6ae2b67e3 100644 --- a/drivers/soc/renesas/Kconfig +++ b/drivers/soc/renesas/Kconfig @@ -3,30 +3,94 @@ config SOC_RENESAS bool "Renesas SoC driver support" if COMPILE_TEST && !ARCH_RENESAS default y if ARCH_RENESAS select SOC_BUS - select RST_RCAR if ARCH_RCAR_GEN1 || ARCH_RCAR_GEN2 || \ - ARCH_R8A774A1 || ARCH_R8A774C0 || ARCH_R8A7795 || \ - ARCH_R8A7796 || ARCH_R8A77965 || ARCH_R8A77970 || \ - ARCH_R8A77980 || ARCH_R8A77990 || ARCH_R8A77995 + select RST_RCAR if ARCH_RCAR_GEN1 || ARCH_RCAR_GEN2 select SYSC_R8A7743 if ARCH_R8A7743 || ARCH_R8A7744 select SYSC_R8A7745 if ARCH_R8A7745 select SYSC_R8A77470 if ARCH_R8A77470 - select SYSC_R8A774A1 if ARCH_R8A774A1 - select SYSC_R8A774C0 if ARCH_R8A774C0 select SYSC_R8A7779 if ARCH_R8A7779 select SYSC_R8A7790 if ARCH_R8A7790 select SYSC_R8A7791 if ARCH_R8A7791 || ARCH_R8A7793 select SYSC_R8A7792 if ARCH_R8A7792 select SYSC_R8A7794 if ARCH_R8A7794 - select SYSC_R8A7795 if ARCH_R8A7795 - select SYSC_R8A7796 if ARCH_R8A7796 - select SYSC_R8A77965 if ARCH_R8A77965 - select SYSC_R8A77970 if ARCH_R8A77970 - select SYSC_R8A77980 if ARCH_R8A77980 - select SYSC_R8A77990 if ARCH_R8A77990 - select SYSC_R8A77995 if ARCH_R8A77995 if SOC_RENESAS +config ARCH_RCAR_GEN3 + bool + select PM + select PM_GENERIC_DOMAINS + select RENESAS_IRQC + select RST_RCAR + select SYS_SUPPORTS_SH_CMT + select SYS_SUPPORTS_SH_TMU + +if ARM64 + +config ARCH_R8A774A1 + bool "Renesas RZ/G2M SoC Platform" + select
[PATCH v2 2/2] ARM: shmobile: Move SoC Kconfig symbols to drivers/soc/renesas/
For consistency with arm64, where vendors have a single Kconfig symbol in arch/arm64/Kconfig.platforms. Signed-off-by: Geert Uytterhoeven --- v2: - Move family-specific Kconfig symbols, too. --- arch/arm/mach-shmobile/Kconfig | 126 drivers/soc/renesas/Kconfig| 148 +++-- 2 files changed, 139 insertions(+), 135 deletions(-) diff --git a/arch/arm/mach-shmobile/Kconfig b/arch/arm/mach-shmobile/Kconfig index 70c6f557f8cd1694..9b798c9dffe4e94a 100644 --- a/arch/arm/mach-shmobile/Kconfig +++ b/arch/arm/mach-shmobile/Kconfig @@ -4,31 +4,6 @@ config PM_RMOBILE select PM select PM_GENERIC_DOMAINS -config ARCH_RCAR_GEN1 - bool - select PM - select PM_GENERIC_DOMAINS - select RENESAS_INTC_IRQPIN - select SYS_SUPPORTS_SH_TMU - -config ARCH_RCAR_GEN2 - bool - select HAVE_ARM_ARCH_TIMER - select PM - select PM_GENERIC_DOMAINS - select RENESAS_IRQC - select SYS_SUPPORTS_SH_CMT - -config ARCH_RMOBILE - bool - select PM_RMOBILE - select SYS_SUPPORTS_SH_CMT - select SYS_SUPPORTS_SH_TMU - -config ARCH_RZN1 - bool - select ARM_AMBA - menuconfig ARCH_RENESAS bool "Renesas ARM SoCs" depends on ARCH_MULTI_V7 && MMU @@ -38,104 +13,3 @@ menuconfig ARCH_RENESAS select PINCTRL select SOC_BUS select ZONE_DMA if ARM_LPAE - -if ARCH_RENESAS - -#comment "Renesas ARM SoCs System Type" - -config ARCH_EMEV2 - bool "Emma Mobile EV2" - select HAVE_ARM_SCU if SMP - select SYS_SUPPORTS_EM_STI - -config ARCH_R7S72100 - bool "RZ/A1H (R7S72100)" - select PM - select PM_GENERIC_DOMAINS - select SYS_SUPPORTS_SH_MTU2 - select RENESAS_OSTM - -config ARCH_R7S9210 - bool "RZ/A2 (R7S9210)" - select PM - select PM_GENERIC_DOMAINS - select RENESAS_OSTM - -config ARCH_R8A73A4 - bool "R-Mobile APE6 (R8A73A40)" - select ARCH_RMOBILE - select ARM_ERRATA_798181 if SMP - select HAVE_ARM_ARCH_TIMER - select RENESAS_IRQC - -config ARCH_R8A7740 - bool "R-Mobile A1 (R8A77400)" - select ARCH_RMOBILE - select RENESAS_INTC_IRQPIN - -config ARCH_R8A7743 - bool "RZ/G1M (R8A77430)" - select ARCH_RCAR_GEN2 - select ARM_ERRATA_798181 if SMP - -config ARCH_R8A7744 - bool "RZ/G1N (R8A77440)" - select ARCH_RCAR_GEN2 - select ARM_ERRATA_798181 if SMP - -config ARCH_R8A7745 - bool "RZ/G1E (R8A77450)" - select ARCH_RCAR_GEN2 - -config ARCH_R8A77470 - bool "RZ/G1C (R8A77470)" - select ARCH_RCAR_GEN2 - -config ARCH_R8A7778 - bool "R-Car M1A (R8A77781)" - select ARCH_RCAR_GEN1 - -config ARCH_R8A7779 - bool "R-Car H1 (R8A77790)" - select HAVE_ARM_SCU if SMP - select HAVE_ARM_TWD if SMP - select ARCH_RCAR_GEN1 - -config ARCH_R8A7790 - bool "R-Car H2 (R8A77900)" - select ARCH_RCAR_GEN2 - select ARM_ERRATA_798181 if SMP - select I2C - -config ARCH_R8A7791 - bool "R-Car M2-W (R8A77910)" - select ARCH_RCAR_GEN2 - select ARM_ERRATA_798181 if SMP - select I2C - -config ARCH_R8A7792 - bool "R-Car V2H (R8A77920)" - select ARCH_RCAR_GEN2 - select ARM_ERRATA_798181 if SMP - -config ARCH_R8A7793 - bool "R-Car M2-N (R8A7793)" - select ARCH_RCAR_GEN2 - select ARM_ERRATA_798181 if SMP - select I2C - -config ARCH_R8A7794 - bool "R-Car E2 (R8A77940)" - select ARCH_RCAR_GEN2 - -config ARCH_R9A06G032 - bool "RZ/N1D (R9A06G032)" - select ARCH_RZN1 - -config ARCH_SH73A0 - bool "SH-Mobile AG5 (R8A73A00)" - select ARCH_RMOBILE - select HAVE_ARM_SCU if SMP - select HAVE_ARM_TWD if SMP - select RENESAS_INTC_IRQPIN -endif diff --git a/drivers/soc/renesas/Kconfig b/drivers/soc/renesas/Kconfig index 2f5bc5a6ae2b67e3..fe7f58616cdd6cf7 100644 --- a/drivers/soc/renesas/Kconfig +++ b/drivers/soc/renesas/Kconfig @@ -3,18 +3,26 @@ config SOC_RENESAS bool "Renesas SoC driver support" if COMPILE_TEST && !ARCH_RENESAS default y if ARCH_RENESAS select SOC_BUS - select RST_RCAR if ARCH_RCAR_GEN1 || ARCH_RCAR_GEN2 - select SYSC_R8A7743 if ARCH_R8A7743 || ARCH_R8A7744 - select SYSC_R8A7745 if ARCH_R8A7745 - select SYSC_R8A77470 if ARCH_R8A77470 - select SYSC_R8A7779 if ARCH_R8A7779 - select SYSC_R8A7790 if ARCH_R8A7790 - select SYSC_R8A7791 if ARCH_R8A7791 || ARCH_R8A7793 - select SYSC_R8A7792 if ARCH_R8A7792 - select SYSC_R8A7794 if ARCH_R8A7794 if SOC_RENESAS +config ARCH_RCAR_GEN1 + bool + select PM + select PM_GENERIC_DOMAINS + select RENESAS_INTC_IRQPIN + select RST_RCAR + select SYS_SUPPORTS_SH_TMU + +config ARCH_RCAR_GEN2 + bool + select HAVE_ARM_ARCH_TIMER + select PM + select PM_GENERIC_DOMAINS
[PATCH v2 0/2] arm: renesas: Move SoC Kconfig symbols to drivers/soc/renesas/
Hi all,
As pointed out by Arnd[*], there are lots of SoC-specific Kconfig
symbols in the Renesas section of arch/arm64/Kconfig.platforms, while
other vendors expose a single Kconfig symbol there.
Hence this patch series moves them to drivers/soc/renesas/Kconfig,
reducing the footprint and associated amount of churn in
arch/arm64/Kconfig.platforms, while preserving the benefits for users of
automatic selection of e.g. clock and pinctrl drivers.
As my OCD just loves consistency, the second patch does the same for
arm32 SoCs.
Note that e.g. drivers/clk/ is included before drivers/soc/. Hence when
COMPILE_TEST=y and ARCH_RENESAS=n, questions will be asked about clock
drivers before they can be auto-selected by the corresponding
SoC-specific Kconfig symbols.
Of course this will trigger some defconfig updates later...
Changes compared to v1/RFC:
- Introduce a family-specific Kconfig symbol for R-Car Gen3,
- Move arm32 family-specific Kconfig symbols, too.
This depends on Simon's devel branch, and "ARM: shmobile: Hide ARCH_RZN1
to improve consistency".
Thanks!
[*] https://www.spinics.net/lists/arm-kernel/msg679390.html
Geert Uytterhoeven (2):
arm64: renesas: Move SoC Kconfig symbols to drivers/soc/renesas/
ARM: shmobile: Move SoC Kconfig symbols to drivers/soc/renesas/
arch/arm/mach-shmobile/Kconfig | 126 --
arch/arm64/Kconfig.platforms | 59 -
drivers/soc/renesas/Kconfig| 236 ++---
3 files changed, 215 insertions(+), 206 deletions(-)
--
2.17.1
Gr{oetje,eeting}s,
Geert
--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- ge...@linux-m68k.org
In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
-- Linus Torvalds
[PATCH] ARM: shmobile: Hide ARCH_RZN1 to improve consistency
Unlike all other family-specific Kconfig symbols for Renesas ARM SoCs, ARCH_RZN1 is user-visible. As this symbol is already selected by the SoC-specific ARCH_R9A06G032 symbol, there is no need for that. Hide ARCH_RZN1 from the user, and move it up, where all other family-specific Kconfig symbols live. Drop the select of CPU_V7, as this is already implied by the dependency of ARCH_RENESAS on ARCH_MULTI_V7. Signed-off-by: Geert Uytterhoeven --- arch/arm/mach-shmobile/Kconfig | 9 - 1 file changed, 4 insertions(+), 5 deletions(-) diff --git a/arch/arm/mach-shmobile/Kconfig b/arch/arm/mach-shmobile/Kconfig index a35eb5913dfdf4ba..70c6f557f8cd1694 100644 --- a/arch/arm/mach-shmobile/Kconfig +++ b/arch/arm/mach-shmobile/Kconfig @@ -25,6 +25,10 @@ config ARCH_RMOBILE select SYS_SUPPORTS_SH_CMT select SYS_SUPPORTS_SH_TMU +config ARCH_RZN1 + bool + select ARM_AMBA + menuconfig ARCH_RENESAS bool "Renesas ARM SoCs" depends on ARCH_MULTI_V7 && MMU @@ -128,11 +132,6 @@ config ARCH_R9A06G032 bool "RZ/N1D (R9A06G032)" select ARCH_RZN1 -config ARCH_RZN1 - bool "RZ/N1 (R9A06G0xx) Family" - select ARM_AMBA - select CPU_V7 - config ARCH_SH73A0 bool "SH-Mobile AG5 (R8A73A00)" select ARCH_RMOBILE -- 2.17.1
Re: [PATCH v6 1/2] pinctrl: Add RZ/A2 pin and gpio controller
Hi Chris,
On Thu, Nov 15, 2018 at 5:50 PM Chris Brandt wrote:
> On Thursday, November 15, 2018 1, jacopo mondi wrote:
> > > v5:
> > > * Specify number of ports using of_device_id.data and save as priv-
> > >npins
> > > * Use priv->npins everywhere instead of hard coded RZA2_NPINS
> > > * Check gpio-ranges to make sure args matches SOC
> >
> > Sorry about this, I didn't want to ask you to do this now, it might
> > have had post-poned to when a new SoC will have to be supported, but..
>
> As long as I can get this driver in for 4.21, I'll still be happy
;-)
> > > +static const struct of_device_id rza2_pinctrl_of_match[] = {
> > > + { .compatible = "renesas,r7s9210-pinctrl", .data = (void *)22, },
> >
> > ... I really don't like this, I'm sorry.
> >
> > I would rather make a 'struct rza_pinctrl_info' or similar which
> > contains all the fields you now hardcode (number of ports, pins per
> > port etc) and which is easily extensible in case you need to do so.
>
> I was going by if there is only 1 value being set, just pass in a number
> (don't make a struct). That is what is being done for the R-Car/RZA
> SDHI driver (renesas_sdhi_internal_dmac.c), and what I was also asked to do
> for the RZ/A watchdog timer (rza_wdt.c).
That's indeed what we do, typically.
> At the moment, the number of ports in the SOC is the only variable that
> would be different between SoCs. For example, "pins per port" will
> always be 8 (it's part of the HW design of this pin controller, it can never
> change).
>
> We can have Geert give his opinion on the topic since it was his
> suggestion to begin with.
>
>
> > I'm sorry this is more work, and again, it might be post-poned imo,
> > provided you drop this change you have introduced here.
>
> Since Geert is the maintainer of the Renesas pinctrl drivers, I'll let
> him decide if I should drop that part for now since only 1 SOC exists
> today.
I don't have a real preference.
Two cautions, though:
1. You do have to remember to increase port_names[], when needed,
2. Trying to predict the future may fail, and more driver updates may be
needed when a new variant of this pin controller will be conceived.
Gr{oetje,eeting}s,
Geert
--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- ge...@linux-m68k.org
In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
-- Linus Torvalds
Re: [PATCH v7 1/2] pinctrl: Add RZ/A2 pin and gpio controller
On Thu, Nov 15, 2018 at 5:15 PM Chris Brandt wrote:
> Adds support for the pin and gpio controller found in R7S9210 (RZ/A2) SoCs.
>
> Signed-off-by: Chris Brandt
> Reviewed-by: Jacopo Mondi
> ---
> v6:
> * Bug fix: Output value not being set in rza2_chip_direction_output()
Reviewed-by: Geert Uytterhoeven
Gr{oetje,eeting}s,
Geert
--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- ge...@linux-m68k.org
In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
-- Linus Torvalds
Re: [PATCH/RFT v2] pinctrl: sh-pfc: r8a77990: Add HSCIF pins, groups, and functions
Hi Kaneko-san,
On Thu, Nov 15, 2018 at 5:47 PM Yoshihiro Kaneko wrote:
> From: Takeshi Kihara
>
> This patch adds HSCIF{0,1,2,3,4} pins, groups and functions to
> the R8A77990 SoC.
>
> Signed-off-by: Takeshi Kihara
> Signed-off-by: Yoshihiro Kaneko
> ---
>
> This patch is based on the sh-pfc branch of Geert Uytterhoeven's
> renesas-drivers tree.
>
> v2 [Yoshihiro Kaneko]
> * As suggested by Geert Uytterhoeven
> - Fix the definition of the hscif3_data_d_pins
> - Update the size of the sh_pfc_pin_group.common and the
> sh_pfc_function.common
Thanks for the update!
Reviewed-by: Geert Uytterhoeven
i.e. will queue in sh-pfc-for-v4.21.
Gr{oetje,eeting}s,
Geert
--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- ge...@linux-m68k.org
In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
-- Linus Torvalds
Re: [PATCH v2 1/4] pinctrl: sh-pfc: Add physical pin multiplexing helper macros
Hi Uli,
On Fri, Nov 16, 2018 at 8:21 AM Ulrich Hecht wrote:
> Used by I2C controllers 0, 3 and 5 in R8A7795 and R8A7796 SoCs.
>
> Signed-off-by: Ulrich Hecht
Thanks for your patch!
Reviewed-by: Geert Uytterhoeven
Some bikeshedding below, which I believe would increase readability.
> --- a/drivers/pinctrl/sh-pfc/sh_pfc.h
> +++ b/drivers/pinctrl/sh-pfc/sh_pfc.h
> @@ -386,6 +386,28 @@ extern const struct sh_pfc_soc_info shx3_pinmux_info;
> PINMUX_DATA(fn##_MARK, FN_##msel, FN_##fn, FN_##ipsr)
>
> /*
> + * Describe a pinmux configuration similar to PINMUX_IPSR_MSEL, but with
> + * an additional select register that controls physical multiplexing
> + * with another pin.
> + * - ipsr: IPSR field
> + * - fn: Function name, also referring to the IPSR field
> + * - msel1: Physical multiplexing selector
psel?
> + * - msel2: Module selector
msel?
> + */
> +#define PINMUX_IPSR_MSEL2(ipsr, fn, msel1, msel2) \
PINMUX_IPSR_PHYS_MSEL?
> + PINMUX_DATA(fn##_MARK, FN_##msel1, FN_##msel2, FN_##fn, FN_##ipsr)
> +
> +/*
> + * Describe a pinmux configuration in which a pin is physically multiplexed
> + * with other pins.
> + * - ipsr: IPSR field
> + * - fn: Function name, also referring to the IPSR field
> + * - msel: Phyiscal multiplexing selector
psel?
Physical
> + */
> +#define PINMUX_IPSR_PHYS(ipsr, fn, msel) \
> + PINMUX_DATA(fn##_MARK, FN_##msel)
> +
> +/*
> * Describe a pinmux configuration for a single-function pin with GPIO
> * capability.
> * - fn: Function name
If you agree, I can fix up all of the above while applying.
Thanks!
Gr{oetje,eeting}s,
Geert
--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- ge...@linux-m68k.org
In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
-- Linus Torvalds
Re: [PATCH v2 4/4] pinctrl: sh-pfc: r8a7796: Add I2C{0,3,5} pins, groups and functions
On Fri, Nov 16, 2018 at 8:21 AM Ulrich Hecht wrote:
> From: Takeshi Kihara
>
> This patch adds I2C{0,3,5} pins, groups and functions to the R8A7796 SoC.
>
> These pins are physically muxed with other pins. Therefore, setup of
> MOD_SEL is needed for exclusive control with other pins.
>
> Signed-off-by: Takeshi Kihara
> Signed-off-by: Ulrich Hecht
Reviewed-by: Geert Uytterhoeven
Gr{oetje,eeting}s,
Geert
--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- ge...@linux-m68k.org
In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
-- Linus Torvalds
Re: [PATCH v2 3/4] pinctrl: sh-pfc: r8a7795-es1: Add I2C{0,3,5} pins, groups and functions
On Fri, Nov 16, 2018 at 8:21 AM Ulrich Hecht wrote:
> From: Takeshi Kihara
>
> This patch adds I2C{0,3,5} pins, groups and functions to
> the R8A7795 ES1.x SoC.
>
> These pins are physically muxed with other pins. Therefore, setup of
> MOD_SEL is needed for exclusive control with other pins.
>
> Signed-off-by: Takeshi Kihara
> Signed-off-by: Ulrich Hecht
Reviewed-by: Geert Uytterhoeven
Gr{oetje,eeting}s,
Geert
--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- ge...@linux-m68k.org
In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
-- Linus Torvalds
Re: [PATCH v2 2/4] pinctrl: sh-pfc: r8a7795: Add I2C{0,3,5} pins, groups and functions
On Fri, Nov 16, 2018 at 8:21 AM Ulrich Hecht wrote:
> From: Takeshi Kihara
>
> This patch adds I2C{0,3,5} pins, groups and functions to the R8A7795 SoC.
>
> These pins are physically muxed with other pins. Therefore, setup of
> MOD_SEL is needed for exclusive control with other pins.
>
> Signed-off-by: Takeshi Kihara
> Signed-off-by: Ulrich Hecht
Reviewed-by: Geert Uytterhoeven
Gr{oetje,eeting}s,
Geert
--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- ge...@linux-m68k.org
In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
-- Linus Torvalds
Re: [PATCH v2 0/4] I2C0/3/5 pin control for H3 and M3-W
Hi Uli,
On Fri, Nov 16, 2018 at 8:21 AM Ulrich Hecht wrote:
> This is an up-port from the BSP. Unfortunately I could not test these
> because none of those pins seem to be accessible on Salvator boards (not on
> ULCB either, AFAICT), so the best thing I can say is that they don't seem to
> break anything.
I think I replied before...
For Salvator-X(S):
1. If you set SW5 and SW6 to their center positions, you can access I2C3 on
EXIO Connector D.
2. I2C5 is available on test points CP45/46.
> This revision incorporates the suggestions made by Geert; see below for
> details.
Thanks for the update!
Gr{oetje,eeting}s,
Geert
--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- ge...@linux-m68k.org
In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
-- Linus Torvalds
