From: Takeshi Kihara
Based on a similar patch of the R8A7796 device tree
by Kuninori Morimoto .
Signed-off-by: Takeshi Kihara
Signed-off-by: Yoshihiro Kaneko
---
The following patches were squashed into this patch:
arm64: dts: r8a77965: Add Audio-DMAC device nodes
arm64: dts: r8a77965: Add Sound device node and SSI support
arm64: dts: r8a77965: Add Sound SRC support
arm64: dts: r8a77965: Add Sound DVC device nodes
arm64: dts: r8a77965: Add Sound CTU support
arm64: dts: r8a77965: Add Sound MIX support
This patch is based on the devel branch of Simon Horman's renesas tree.
arch/arm64/boot/dts/renesas/r8a77965.dtsi | 245 --
1 file changed, 234 insertions(+), 11 deletions(-)
diff --git a/arch/arm64/boot/dts/renesas/r8a77965.dtsi
b/arch/arm64/boot/dts/renesas/r8a77965.dtsi
index 0cd4446..0a64b72 100644
--- a/arch/arm64/boot/dts/renesas/r8a77965.dtsi
+++ b/arch/arm64/boot/dts/renesas/r8a77965.dtsi
@@ -12,7 +12,7 @@
#include
#include
-#define CPG_AUDIO_CLK_I10
+#define CPG_AUDIO_CLK_IR8A77965_CLK_S0D4
/ {
compatible = "renesas,r8a77965";
@@ -1324,46 +1324,269 @@
};
rcar_sound: sound@ec50 {
+ /*
+* #sound-dai-cells is required
+*
+* Single DAI : #sound-dai-cells = <0>; <&rcar_sound>;
+* Multi DAI : #sound-dai-cells = <1>; <&rcar_sound N>;
+*/
+ /*
+* #clock-cells is required for audio_clkout0/1/2/3
+*
+* clkout : #clock-cells = <0>; <&rcar_sound>;
+* clkout0/1/2/3: #clock-cells = <1>; <&rcar_sound N>;
+*/
+ compatible = "renesas,rcar_sound-r8a77965",
"renesas,rcar_sound-gen3";
reg = <0 0xec50 0 0x1000>, /* SCU */
<0 0xec5a 0 0x100>, /* ADG */
<0 0xec54 0 0x1000>, /* SSIU */
<0 0xec541000 0 0x280>, /* SSI */
<0 0xec74 0 0x200>; /* Audio DMAC peri
peri*/
- /* placeholder */
+ reg-names = "scu", "adg", "ssiu", "ssi", "audmapp";
+
+ clocks = <&cpg CPG_MOD 1005>,
+<&cpg CPG_MOD 1006>, <&cpg CPG_MOD 1007>,
+<&cpg CPG_MOD 1008>, <&cpg CPG_MOD 1009>,
+<&cpg CPG_MOD 1010>, <&cpg CPG_MOD 1011>,
+<&cpg CPG_MOD 1012>, <&cpg CPG_MOD 1013>,
+<&cpg CPG_MOD 1014>, <&cpg CPG_MOD 1015>,
+<&cpg CPG_MOD 1022>, <&cpg CPG_MOD 1023>,
+<&cpg CPG_MOD 1024>, <&cpg CPG_MOD 1025>,
+<&cpg CPG_MOD 1026>, <&cpg CPG_MOD 1027>,
+<&cpg CPG_MOD 1028>, <&cpg CPG_MOD 1029>,
+<&cpg CPG_MOD 1030>, <&cpg CPG_MOD 1031>,
+<&cpg CPG_MOD 1020>, <&cpg CPG_MOD 1021>,
+<&cpg CPG_MOD 1020>, <&cpg CPG_MOD 1021>,
+<&cpg CPG_MOD 1019>, <&cpg CPG_MOD 1018>,
+<&audio_clk_a>, <&audio_clk_b>,
+<&audio_clk_c>,
+<&cpg CPG_CORE R8A77965_CLK_S0D4>;
+ clock-names = "ssi-all",
+ "ssi.9", "ssi.8", "ssi.7", "ssi.6",
+ "ssi.5", "ssi.4", "ssi.3", "ssi.2",
+ "ssi.1", "ssi.0",
+ "src.9", "src.8", "src.7", "src.6",
+ "src.5", "src.4", "src.3", "src.2",
+ "src.1", "src.0",
+ "mix.1", "mix.0",
+ "ctu.1", "ctu.0",
+ "dvc.0", "dvc.1",
+ "clk_a", "clk_b", "clk_c", "clk_i";
+ power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
+ resets = <&cpg 1005>,
+<&cpg 1006>, <&cpg 1007>,
+<&cpg 1008>, <&cpg 1009>,
+<&cpg 1010>, <&cpg 1011>,
+<&cpg 1012>, <&cpg 1013>,
+<&cpg 1014>, <&cpg 1015>;
+ reset-names = "ssi-all",
+ "ssi.9", "ssi.8", "ssi.7", "ssi.6",
+ "ssi.5", "ssi.4", "ssi.3", "ssi.2",
+ "ssi.1", "ssi.0"