Re: [PATCH/RFT] pinctrl: sh-pfc: r8a77990: Add HSCIF pins, groups, and functions
Hi Geert-san,
Thanks for your review!!
2018年11月6日(火) 0:30 Geert Uytterhoeven :
>
> Hi Kaneko-san,
>
> On Sat, Oct 20, 2018 at 11:31 PM Yoshihiro Kaneko
> wrote:
> > From: Takeshi Kihara
> >
> > This patch adds HSCIF{0,1,2,3,4} pins, groups and functions to
> > the R8A77990 SoC.
> >
> > Signed-off-by: Takeshi Kihara
> > Signed-off-by: Yoshihiro Kaneko
>
> Thanks for your patch!
>
> > --- a/drivers/pinctrl/sh-pfc/pfc-r8a77990.c
> > +++ b/drivers/pinctrl/sh-pfc/pfc-r8a77990.c
>
> > +static const unsigned int hscif3_data_d_pins[] = {
> > + /* RX, TX */
> > + RCAR_GP_PIN(1, 3), RCAR_GP_PIN(1, 0),
>
> These two pins are exchanged.
> According to the datasheet, it should be:
>
> RCAR_GP_PIN(1, 0), RCAR_GP_PIN(1, 3),
I will fix it in v2.
>
> > +};
> > +
> > +static const unsigned int hscif3_data_d_mux[] = {
> > + HRX3_D_MARK, HTX3_D_MARK,
> > +};
>
> > @@ -2454,6 +2738,37 @@ enum {
> > SH_PFC_PIN_GROUP(du_disp_cde),
> > SH_PFC_PIN_GROUP(du_cde),
> > SH_PFC_PIN_GROUP(du_disp),
> > + SH_PFC_PIN_GROUP(hscif0_data_a),
> > + SH_PFC_PIN_GROUP(hscif0_clk_a),
> > + SH_PFC_PIN_GROUP(hscif0_ctrl_a),
> > + SH_PFC_PIN_GROUP(hscif0_data_b),
> > + SH_PFC_PIN_GROUP(hscif0_clk_b),
> > + SH_PFC_PIN_GROUP(hscif1_data_a),
> > + SH_PFC_PIN_GROUP(hscif1_clk_a),
> > + SH_PFC_PIN_GROUP(hscif1_data_b),
> > + SH_PFC_PIN_GROUP(hscif1_clk_b),
> > + SH_PFC_PIN_GROUP(hscif1_ctrl_b),
> > + SH_PFC_PIN_GROUP(hscif2_data_a),
> > + SH_PFC_PIN_GROUP(hscif2_clk_a),
> > + SH_PFC_PIN_GROUP(hscif2_ctrl_a),
> > + SH_PFC_PIN_GROUP(hscif2_data_b),
> > + SH_PFC_PIN_GROUP(hscif3_data_a),
> > + SH_PFC_PIN_GROUP(hscif3_data_b),
> > + SH_PFC_PIN_GROUP(hscif3_clk_b),
> > + SH_PFC_PIN_GROUP(hscif3_data_c),
> > + SH_PFC_PIN_GROUP(hscif3_clk_c),
> > + SH_PFC_PIN_GROUP(hscif3_ctrl_c),
> > + SH_PFC_PIN_GROUP(hscif3_data_d),
> > + SH_PFC_PIN_GROUP(hscif3_data_e),
> > + SH_PFC_PIN_GROUP(hscif3_ctrl_e),
> > + SH_PFC_PIN_GROUP(hscif4_data_a),
> > + SH_PFC_PIN_GROUP(hscif4_clk_a),
> > + SH_PFC_PIN_GROUP(hscif4_ctrl_a),
> > + SH_PFC_PIN_GROUP(hscif4_data_b),
> > + SH_PFC_PIN_GROUP(hscif4_clk_b),
> > + SH_PFC_PIN_GROUP(hscif4_data_c),
> > + SH_PFC_PIN_GROUP(hscif4_data_d),
> > + SH_PFC_PIN_GROUP(hscif4_data_e),
> > SH_PFC_PIN_GROUP(i2c1_a),
> > SH_PFC_PIN_GROUP(i2c1_b),
> > SH_PFC_PIN_GROUP(i2c1_c),
>
> The above doesn't compile, as you forgot to update the size of the
> pinmux_groups.common[] array.
I will fix it.
>
> > @@ -2781,6 +3142,11 @@ enum {
> > .common = {
> > SH_PFC_FUNCTION(avb),
> > SH_PFC_FUNCTION(du),
> > + SH_PFC_FUNCTION(hscif0),
> > + SH_PFC_FUNCTION(hscif1),
> > + SH_PFC_FUNCTION(hscif2),
> > + SH_PFC_FUNCTION(hscif3),
> > + SH_PFC_FUNCTION(hscif4),
> > SH_PFC_FUNCTION(i2c1),
> > SH_PFC_FUNCTION(i2c2),
> > SH_PFC_FUNCTION(i2c4),
>
> The above doesn't compile, as you forgot to update the size of the
> pinmux_functions.common[] array.
I will fix it.
Best regards,
Kaneko
>
> Gr{oetje,eeting}s,
>
> Geert
>
> --
> Geert Uytterhoeven -- There's lots of Linux beyond ia32 --
> ge...@linux-m68k.org
>
> In personal conversations with technical people, I call myself a hacker. But
> when I'm talking to journalists I just say "programmer" or something like
> that.
> -- Linus Torvalds
Re: [PATCH/RFT] pinctrl: sh-pfc: r8a77990: Add HSCIF pins, groups, and functions
Hi Kaneko-san,
On Sat, Oct 20, 2018 at 11:31 PM Yoshihiro Kaneko wrote:
> From: Takeshi Kihara
>
> This patch adds HSCIF{0,1,2,3,4} pins, groups and functions to
> the R8A77990 SoC.
>
> Signed-off-by: Takeshi Kihara
> Signed-off-by: Yoshihiro Kaneko
Thanks for your patch!
> --- a/drivers/pinctrl/sh-pfc/pfc-r8a77990.c
> +++ b/drivers/pinctrl/sh-pfc/pfc-r8a77990.c
> +static const unsigned int hscif3_data_d_pins[] = {
> + /* RX, TX */
> + RCAR_GP_PIN(1, 3), RCAR_GP_PIN(1, 0),
These two pins are exchanged.
According to the datasheet, it should be:
RCAR_GP_PIN(1, 0), RCAR_GP_PIN(1, 3),
> +};
> +
> +static const unsigned int hscif3_data_d_mux[] = {
> + HRX3_D_MARK, HTX3_D_MARK,
> +};
> @@ -2454,6 +2738,37 @@ enum {
> SH_PFC_PIN_GROUP(du_disp_cde),
> SH_PFC_PIN_GROUP(du_cde),
> SH_PFC_PIN_GROUP(du_disp),
> + SH_PFC_PIN_GROUP(hscif0_data_a),
> + SH_PFC_PIN_GROUP(hscif0_clk_a),
> + SH_PFC_PIN_GROUP(hscif0_ctrl_a),
> + SH_PFC_PIN_GROUP(hscif0_data_b),
> + SH_PFC_PIN_GROUP(hscif0_clk_b),
> + SH_PFC_PIN_GROUP(hscif1_data_a),
> + SH_PFC_PIN_GROUP(hscif1_clk_a),
> + SH_PFC_PIN_GROUP(hscif1_data_b),
> + SH_PFC_PIN_GROUP(hscif1_clk_b),
> + SH_PFC_PIN_GROUP(hscif1_ctrl_b),
> + SH_PFC_PIN_GROUP(hscif2_data_a),
> + SH_PFC_PIN_GROUP(hscif2_clk_a),
> + SH_PFC_PIN_GROUP(hscif2_ctrl_a),
> + SH_PFC_PIN_GROUP(hscif2_data_b),
> + SH_PFC_PIN_GROUP(hscif3_data_a),
> + SH_PFC_PIN_GROUP(hscif3_data_b),
> + SH_PFC_PIN_GROUP(hscif3_clk_b),
> + SH_PFC_PIN_GROUP(hscif3_data_c),
> + SH_PFC_PIN_GROUP(hscif3_clk_c),
> + SH_PFC_PIN_GROUP(hscif3_ctrl_c),
> + SH_PFC_PIN_GROUP(hscif3_data_d),
> + SH_PFC_PIN_GROUP(hscif3_data_e),
> + SH_PFC_PIN_GROUP(hscif3_ctrl_e),
> + SH_PFC_PIN_GROUP(hscif4_data_a),
> + SH_PFC_PIN_GROUP(hscif4_clk_a),
> + SH_PFC_PIN_GROUP(hscif4_ctrl_a),
> + SH_PFC_PIN_GROUP(hscif4_data_b),
> + SH_PFC_PIN_GROUP(hscif4_clk_b),
> + SH_PFC_PIN_GROUP(hscif4_data_c),
> + SH_PFC_PIN_GROUP(hscif4_data_d),
> + SH_PFC_PIN_GROUP(hscif4_data_e),
> SH_PFC_PIN_GROUP(i2c1_a),
> SH_PFC_PIN_GROUP(i2c1_b),
> SH_PFC_PIN_GROUP(i2c1_c),
The above doesn't compile, as you forgot to update the size of the
pinmux_groups.common[] array.
> @@ -2781,6 +3142,11 @@ enum {
> .common = {
> SH_PFC_FUNCTION(avb),
> SH_PFC_FUNCTION(du),
> + SH_PFC_FUNCTION(hscif0),
> + SH_PFC_FUNCTION(hscif1),
> + SH_PFC_FUNCTION(hscif2),
> + SH_PFC_FUNCTION(hscif3),
> + SH_PFC_FUNCTION(hscif4),
> SH_PFC_FUNCTION(i2c1),
> SH_PFC_FUNCTION(i2c2),
> SH_PFC_FUNCTION(i2c4),
The above doesn't compile, as you forgot to update the size of the
pinmux_functions.common[] array.
Gr{oetje,eeting}s,
Geert
--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- ge...@linux-m68k.org
In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
-- Linus Torvalds
[PATCH/RFT] pinctrl: sh-pfc: r8a77990: Add HSCIF pins, groups, and functions
From: Takeshi Kihara
This patch adds HSCIF{0,1,2,3,4} pins, groups and functions to
the R8A77990 SoC.
Signed-off-by: Takeshi Kihara
Signed-off-by: Yoshihiro Kaneko
---
This patch is based on the sh-pfc branch of Geert Uytterhoeven's
renesas-drivers tree.
drivers/pinctrl/sh-pfc/pfc-r8a77990.c | 366 ++
1 file changed, 366 insertions(+)
diff --git a/drivers/pinctrl/sh-pfc/pfc-r8a77990.c
b/drivers/pinctrl/sh-pfc/pfc-r8a77990.c
index 1fdafa4..0d0153a 100644
--- a/drivers/pinctrl/sh-pfc/pfc-r8a77990.c
+++ b/drivers/pinctrl/sh-pfc/pfc-r8a77990.c
@@ -1459,6 +1459,290 @@ enum {
DU_DISP_MARK,
};
+/* - HSCIF0 --*/
+static const unsigned int hscif0_data_a_pins[] = {
+ /* RX, TX */
+ RCAR_GP_PIN(5, 8), RCAR_GP_PIN(5, 9),
+};
+
+static const unsigned int hscif0_data_a_mux[] = {
+ HRX0_A_MARK, HTX0_A_MARK,
+};
+
+static const unsigned int hscif0_clk_a_pins[] = {
+ /* SCK */
+ RCAR_GP_PIN(5, 7),
+};
+
+static const unsigned int hscif0_clk_a_mux[] = {
+ HSCK0_A_MARK,
+};
+
+static const unsigned int hscif0_ctrl_a_pins[] = {
+ /* RTS, CTS */
+ RCAR_GP_PIN(5, 15), RCAR_GP_PIN(5, 14),
+};
+
+static const unsigned int hscif0_ctrl_a_mux[] = {
+ HRTS0_N_A_MARK, HCTS0_N_A_MARK,
+};
+
+static const unsigned int hscif0_data_b_pins[] = {
+ /* RX, TX */
+ RCAR_GP_PIN(6, 11), RCAR_GP_PIN(6, 12),
+};
+
+static const unsigned int hscif0_data_b_mux[] = {
+ HRX0_B_MARK, HTX0_B_MARK,
+};
+
+static const unsigned int hscif0_clk_b_pins[] = {
+ /* SCK */
+ RCAR_GP_PIN(6, 13),
+};
+
+static const unsigned int hscif0_clk_b_mux[] = {
+ HSCK0_B_MARK,
+};
+
+/* - HSCIF1 - */
+static const unsigned int hscif1_data_a_pins[] = {
+ /* RX, TX */
+ RCAR_GP_PIN(5, 1), RCAR_GP_PIN(5, 2),
+};
+
+static const unsigned int hscif1_data_a_mux[] = {
+ HRX1_A_MARK, HTX1_A_MARK,
+};
+
+static const unsigned int hscif1_clk_a_pins[] = {
+ /* SCK */
+ RCAR_GP_PIN(5, 0),
+};
+
+static const unsigned int hscif1_clk_a_mux[] = {
+ HSCK1_A_MARK,
+};
+
+static const unsigned int hscif1_data_b_pins[] = {
+ /* RX, TX */
+ RCAR_GP_PIN(3, 1), RCAR_GP_PIN(3, 2),
+};
+
+static const unsigned int hscif1_data_b_mux[] = {
+ HRX1_B_MARK, HTX1_B_MARK,
+};
+
+static const unsigned int hscif1_clk_b_pins[] = {
+ /* SCK */
+ RCAR_GP_PIN(3, 0),
+};
+
+static const unsigned int hscif1_clk_b_mux[] = {
+ HSCK1_B_MARK,
+};
+
+static const unsigned int hscif1_ctrl_b_pins[] = {
+ /* RTS, CTS */
+ RCAR_GP_PIN(3, 4), RCAR_GP_PIN(3, 3),
+};
+
+static const unsigned int hscif1_ctrl_b_mux[] = {
+ HRTS1_N_B_MARK, HCTS1_N_B_MARK,
+};
+
+/* - HSCIF2 - */
+static const unsigned int hscif2_data_a_pins[] = {
+ /* RX, TX */
+ RCAR_GP_PIN(5, 14), RCAR_GP_PIN(5, 15),
+};
+
+static const unsigned int hscif2_data_a_mux[] = {
+ HRX2_A_MARK, HTX2_A_MARK,
+};
+
+static const unsigned int hscif2_clk_a_pins[] = {
+ /* SCK */
+ RCAR_GP_PIN(6, 14),
+};
+
+static const unsigned int hscif2_clk_a_mux[] = {
+ HSCK2_A_MARK,
+};
+
+static const unsigned int hscif2_ctrl_a_pins[] = {
+ /* RTS, CTS */
+ RCAR_GP_PIN(6, 16), RCAR_GP_PIN(6, 15),
+};
+
+static const unsigned int hscif2_ctrl_a_mux[] = {
+ HRTS2_N_A_MARK, HCTS2_N_A_MARK,
+};
+
+static const unsigned int hscif2_data_b_pins[] = {
+ /* RX, TX */
+ RCAR_GP_PIN(5, 5), RCAR_GP_PIN(5, 6),
+};
+
+static const unsigned int hscif2_data_b_mux[] = {
+ HRX2_B_MARK, HTX2_B_MARK,
+};
+
+/* - HSCIF3 */
+static const unsigned int hscif3_data_a_pins[] = {
+ /* RX, TX */
+ RCAR_GP_PIN(0, 14), RCAR_GP_PIN(0, 15),
+};
+
+static const unsigned int hscif3_data_a_mux[] = {
+ HRX3_A_MARK, HTX3_A_MARK,
+};
+
+static const unsigned int hscif3_data_b_pins[] = {
+ /* RX, TX */
+ RCAR_GP_PIN(0, 5), RCAR_GP_PIN(0, 6),
+};
+
+static const unsigned int hscif3_data_b_mux[] = {
+ HRX3_B_MARK, HTX3_B_MARK,
+};
+
+static const unsigned int hscif3_clk_b_pins[] = {
+ /* SCK */
+ RCAR_GP_PIN(0, 4),
+};
+
+static const unsigned int hscif3_clk_b_mux[] = {
+ HSCK3_B_MARK,
+};
+
+static const unsigned int hscif3_data_c_pins[] = {
+ /* RX, TX */
+ RCAR_GP_PIN(2, 10), RCAR_GP_PIN(2, 9),
+};
+
+static const unsigned int hscif3_data_c_mux[] = {
+ HRX3_C_MARK, HTX3_C_MARK,
+};
+
+static const unsigned int hscif3_clk_c_pins[] = {
+ /* SCK */
+ RCAR_GP_PIN(2, 11),
+};
+
+static const unsigned int hscif3_clk_c_mux[] = {
+ HSCK3_C_MARK,
+};
+
+static const unsigned int hscif3_ctrl_c_pins[] = {
+ /* RTS, CTS */
+ RCAR_GP_PIN(2, 13), RCAR_GP_PIN(2, 12),
+};
+
+static const unsigned int hscif3_ctrl_c_mux[] = {
+ HRTS3_N_C_MA
