Re: [PATCH] arm64: dts: renesas: r8a7796: Add CMT device nodes
On Wed, Nov 21, 2018 at 10:27:41AM +, Biju Das wrote:
> Hi Simon,
>
> Thanks for the feedback.
>
> > -Original Message-
> > From: Simon Horman
> > Sent: 21 November 2018 10:24
> > To: Biju Das
> > Cc: Rob Herring ; Mark Rutland
> > ; Magnus Damm ;
> > linux-renesas-soc@vger.kernel.org; devicet...@vger.kernel.org; Geert
> > Uytterhoeven ; Chris Paterson
> > ; Daniel Lezcano
> > ; Thomas Gleixner ; John
> > Stultz ; Fabrizio Castro
> >
> > Subject: Re: [PATCH] arm64: dts: renesas: r8a7796: Add CMT device nodes
> >
> > On Fri, Oct 26, 2018 at 09:25:07AM +0100, Biju Das wrote:
> > > This patch adds CMT{0|1|2|3} device nodes for r8a7796 SoC.
> > >
> > > Signed-off-by: Biju Das
> > > ---
> > > This patch is tested against renesas-dev
> > >
> > > I have executed on inconsistency-check, nanosleep and
> > > clocksource_switch selftests on this arm64 SoC. The
> > > inconsistency-check and nanosleep tests are working fine.The
> > > clocksource_switch asynchronous test is failing due to inconsistency-check
> > failure on "arch_sys_counter".
> > >
> > > But if i skip the clocksource_switching of "arch_sys_counter", the
> > > asynchronous test is passing for CMT0/1/2/3 timer.
> > >
> > > Has any one noticed this issue?
> >
> > I am reluctant to apply this patch until there is a better understanding of
> > the
> > issue above.
>
> If I understand correctly this patch has no issue at all. The problem is
> related to ARM architecture timer.
> Please correct me if you think otherwise.
Thanks for the clarification, I have applied this patch for v4.21.
Re: [PATCH] arm64: dts: renesas: r8a7796: Add CMT device nodes
On 22/11/2018 10:46, Biju Das wrote:
> Hello Daniel,
>
> Thanks for the feedback.
>
>> -Original Message-
>> From: Daniel Lezcano
>> Sent: 19 November 2018 17:15
>> To: Biju Das ; Rob Herring
>> ; Mark Rutland
>> Cc: Simon Horman ; Magnus Damm
>> ; linux-renesas-soc@vger.kernel.org;
>> devicet...@vger.kernel.org; Geert Uytterhoeven
>> ; Chris Paterson
>> ; Thomas Gleixner ;
>> John Stultz ; Fabrizio Castro
>>
>> Subject: Re: [PATCH] arm64: dts: renesas: r8a7796: Add CMT device nodes
>>
>> On 19/11/2018 16:50, Biju Das wrote:
>>> Hi Daniel,
>>>
>>> Thanks for the feedback.
>>>
>>>>>> Subject: Re: [PATCH] arm64: dts: renesas: r8a7796: Add CMT device
>>>>>> nodes
>>>>>>
>>>>>> On 26/10/2018 10:25, Biju Das wrote:
>>>>>>> This patch adds CMT{0|1|2|3} device nodes for r8a7796 SoC.
>>>>>>>
>>>>>>> Signed-off-by: Biju Das
>>>>>>> ---
>>>>>>> This patch is tested against renesas-dev
>>>>>>>
>>>>>>> I have executed on inconsistency-check, nanosleep and
>>>>>>> clocksource_switch selftests on this arm64 SoC. The
>>>>>>> inconsistency-check and nanosleep tests are working fine.The
>>>>>>> clocksource_switch asynchronous test is failing due to
>>>>>>> inconsistency-check
>>>>>> failure on "arch_sys_counter".
>>>>>>>
>>>>>>> But if i skip the clocksource_switching of "arch_sys_counter", the
>>>>>>> asynchronous test is passing for CMT0/1/2/3 timer.
>>>>>>>
>>>>>>> Has any one noticed this issue?
>>>>>>
>>>>>> So now that you mention that, I've been through the
>>>>>> clocksource_switch on another ARM64 platform (hikey960) and
>>>>>> disabled the
>>>>>> ARM64_ERRATUM_858921 config option. I can see the same issue.
>>>>>>
>>>>>> Is this option set on your config ?
>>>>>
>>>>> No. As per " config ARM64_ERRATUM_858921", it is "Workaround for
>>>> Cortex-A73 erratum 858921"
>>>>>
>>>>> Our SoC is 2xCA-57 + 4 x CA-53. Does it impact CA-57 + CA_53?
>>>>
>>>> Dunno :/
>>>>
>>>>> Any way I will enable this config option and will provide you the results.
>>>>
>>>> Ok, thanks!
>>>
>>> The following config is enabled by default on upstream
>>> kernel(4.20-rc3) CONFIG_ARM_ARCH_TIMER_EVTSTREAM=y
>>> CONFIG_ARM_ARCH_TIMER_OOL_WORKAROUND=y
>>> CONFIG_FSL_ERRATUM_A008585=y
>>> CONFIG_HISILICON_ERRATUM_161010101=y
>>> CONFIG_ARM64_ERRATUM_858921=y
>>>
>>> For a quick testing, I have activated the erratum using the property
>> "fsl,erratum-a008585" on device tree.
>>> With this I confirm the issue is fixed.
>>>
>>> I have some questions on this.
>>> 1) Based on the test result ,do you think renesas soc also impacted by the
>> ARM64_ERRATUM_858921?
>>> 2) Is there any way to find, is this Erratum actually causing the
>> asynchronous test to fail?
>>
>> I guess, you can hack the __fsl_a008585_read_reg macro and check if the
>> invalid condition is reached.
>>
>> This thread https://lkml.org/lkml/2018/5/10/773 will give you all the answers
>> you are looking for (well very likely).
>>
>> Let me know if it helped.
>
> In our case , Delta: 174760 ns
>
> 1530553351:205762284
> 1530553351:205762404
>
> 1530553351:205951226
> 1530553351:205776466
>
>
> I have tried the workaround for ARM64_ERRATUM_858921, that also fixes the
> issue.
>
> But all the workaround disables ARM64 VDSO. How do we conclude that is it
> VDSO issue or ARM64_ERRATUM issue?
May be disable all errata and set vdso_default to false?
[ ... ]
-static bool vdso_default = true;
+static bool vdso_default = false;
[ ... ]
>>> timer {
>>> compatible = "arm,armv8-timer";
>>> interrupts-extended = < GIC_PPI 13
>> (GIC_CPU_MASK_SIMPLE(6) | IRQ_TYPE_LEVEL_LOW)>,
>>> < GIC_PPI 14
>>> (GIC_CPU_MASK_SIMPLE(6) |
>> IRQ_TYPE_LEVEL_LOW)>,
>>> < GIC_PPI 11
>>> (GIC_CPU_MASK_SIMPLE(6) |
>> IRQ_TYPE_LEVEL_LOW)>,
>>> < GIC_PPI 10
>>> (GIC_CPU_MASK_SIMPLE(6) | IRQ_TYPE_LEVEL_LOW)>;
>>> +fsl,erratum-a008585;
>>> }
>>
>>
>>
>>
>> --
>> <http://www.linaro.org/> Linaro.org │ Open source software for ARM SoCs
>>
>> Follow Linaro: <http://www.facebook.com/pages/Linaro> Facebook |
>> <http://twitter.com/#!/linaroorg> Twitter | <http://www.linaro.org/linaro-
>> blog/> Blog
>
>
>
>
> Renesas Electronics Europe Ltd, Dukes Meadow, Millboard Road, Bourne End,
> Buckinghamshire, SL8 5FH, UK. Registered in England & Wales under Registered
> No. 04586709.
>
--
<http://www.linaro.org/> Linaro.org │ Open source software for ARM SoCs
Follow Linaro: <http://www.facebook.com/pages/Linaro> Facebook |
<http://twitter.com/#!/linaroorg> Twitter |
<http://www.linaro.org/linaro-blog/> Blog
RE: [PATCH] arm64: dts: renesas: r8a7796: Add CMT device nodes
Hello Daniel,
Thanks for the feedback.
> -Original Message-
> From: Daniel Lezcano
> Sent: 19 November 2018 17:15
> To: Biju Das ; Rob Herring
> ; Mark Rutland
> Cc: Simon Horman ; Magnus Damm
> ; linux-renesas-soc@vger.kernel.org;
> devicet...@vger.kernel.org; Geert Uytterhoeven
> ; Chris Paterson
> ; Thomas Gleixner ;
> John Stultz ; Fabrizio Castro
>
> Subject: Re: [PATCH] arm64: dts: renesas: r8a7796: Add CMT device nodes
>
> On 19/11/2018 16:50, Biju Das wrote:
> > Hi Daniel,
> >
> > Thanks for the feedback.
> >
> >>>> Subject: Re: [PATCH] arm64: dts: renesas: r8a7796: Add CMT device
> >>>> nodes
> >>>>
> >>>> On 26/10/2018 10:25, Biju Das wrote:
> >>>>> This patch adds CMT{0|1|2|3} device nodes for r8a7796 SoC.
> >>>>>
> >>>>> Signed-off-by: Biju Das
> >>>>> ---
> >>>>> This patch is tested against renesas-dev
> >>>>>
> >>>>> I have executed on inconsistency-check, nanosleep and
> >>>>> clocksource_switch selftests on this arm64 SoC. The
> >>>>> inconsistency-check and nanosleep tests are working fine.The
> >>>>> clocksource_switch asynchronous test is failing due to
> >>>>> inconsistency-check
> >>>> failure on "arch_sys_counter".
> >>>>>
> >>>>> But if i skip the clocksource_switching of "arch_sys_counter", the
> >>>>> asynchronous test is passing for CMT0/1/2/3 timer.
> >>>>>
> >>>>> Has any one noticed this issue?
> >>>>
> >>>> So now that you mention that, I've been through the
> >>>> clocksource_switch on another ARM64 platform (hikey960) and
> >>>> disabled the
> >>>> ARM64_ERRATUM_858921 config option. I can see the same issue.
> >>>>
> >>>> Is this option set on your config ?
> >>>
> >>> No. As per " config ARM64_ERRATUM_858921", it is "Workaround for
> >> Cortex-A73 erratum 858921"
> >>>
> >>> Our SoC is 2xCA-57 + 4 x CA-53. Does it impact CA-57 + CA_53?
> >>
> >> Dunno :/
> >>
> >>> Any way I will enable this config option and will provide you the results.
> >>
> >> Ok, thanks!
> >
> > The following config is enabled by default on upstream
> > kernel(4.20-rc3) CONFIG_ARM_ARCH_TIMER_EVTSTREAM=y
> > CONFIG_ARM_ARCH_TIMER_OOL_WORKAROUND=y
> > CONFIG_FSL_ERRATUM_A008585=y
> > CONFIG_HISILICON_ERRATUM_161010101=y
> > CONFIG_ARM64_ERRATUM_858921=y
> >
> > For a quick testing, I have activated the erratum using the property
> "fsl,erratum-a008585" on device tree.
> > With this I confirm the issue is fixed.
> >
> > I have some questions on this.
> > 1) Based on the test result ,do you think renesas soc also impacted by the
> ARM64_ERRATUM_858921?
> > 2) Is there any way to find, is this Erratum actually causing the
> asynchronous test to fail?
>
> I guess, you can hack the __fsl_a008585_read_reg macro and check if the
> invalid condition is reached.
>
> This thread https://lkml.org/lkml/2018/5/10/773 will give you all the answers
> you are looking for (well very likely).
>
> Let me know if it helped.
In our case , Delta: 174760 ns
1530553351:205762284
1530553351:205762404
1530553351:205951226
1530553351:205776466
I have tried the workaround for ARM64_ERRATUM_858921, that also fixes the issue.
But all the workaround disables ARM64 VDSO. How do we conclude that is it VDSO
issue or ARM64_ERRATUM issue?
Please share your ideas.
Regards,
Biju
> > timer {
> > compatible = "arm,armv8-timer";
> > interrupts-extended = < GIC_PPI 13
> (GIC_CPU_MASK_SIMPLE(6) | IRQ_TYPE_LEVEL_LOW)>,
> > < GIC_PPI 14
> > (GIC_CPU_MASK_SIMPLE(6) |
> IRQ_TYPE_LEVEL_LOW)>,
> > < GIC_PPI 11
> > (GIC_CPU_MASK_SIMPLE(6) |
> IRQ_TYPE_LEVEL_LOW)>,
> > < GIC_PPI 10
> > (GIC_CPU_MASK_SIMPLE(6) | IRQ_TYPE_LEVEL_LOW)>;
> > +fsl,erratum-a008585;
> > }
>
>
>
>
> --
> <http://www.linaro.org/> Linaro.org │ Open source software for ARM SoCs
>
> Follow Linaro: <http://www.facebook.com/pages/Linaro> Facebook |
> <http://twitter.com/#!/linaroorg> Twitter | <http://www.linaro.org/linaro-
> blog/> Blog
Renesas Electronics Europe Ltd, Dukes Meadow, Millboard Road, Bourne End,
Buckinghamshire, SL8 5FH, UK. Registered in England & Wales under Registered
No. 04586709.
RE: [PATCH] arm64: dts: renesas: r8a7796: Add CMT device nodes
Hi Simon,
Thanks for the feedback.
> -Original Message-
> From: Simon Horman
> Sent: 21 November 2018 10:24
> To: Biju Das
> Cc: Rob Herring ; Mark Rutland
> ; Magnus Damm ;
> linux-renesas-soc@vger.kernel.org; devicet...@vger.kernel.org; Geert
> Uytterhoeven ; Chris Paterson
> ; Daniel Lezcano
> ; Thomas Gleixner ; John
> Stultz ; Fabrizio Castro
>
> Subject: Re: [PATCH] arm64: dts: renesas: r8a7796: Add CMT device nodes
>
> On Fri, Oct 26, 2018 at 09:25:07AM +0100, Biju Das wrote:
> > This patch adds CMT{0|1|2|3} device nodes for r8a7796 SoC.
> >
> > Signed-off-by: Biju Das
> > ---
> > This patch is tested against renesas-dev
> >
> > I have executed on inconsistency-check, nanosleep and
> > clocksource_switch selftests on this arm64 SoC. The
> > inconsistency-check and nanosleep tests are working fine.The
> > clocksource_switch asynchronous test is failing due to inconsistency-check
> failure on "arch_sys_counter".
> >
> > But if i skip the clocksource_switching of "arch_sys_counter", the
> > asynchronous test is passing for CMT0/1/2/3 timer.
> >
> > Has any one noticed this issue?
>
> I am reluctant to apply this patch until there is a better understanding of
> the
> issue above.
If I understand correctly this patch has no issue at all. The problem is
related to ARM architecture timer.
Please correct me if you think otherwise.
Regards,
Biju
Renesas Electronics Europe Ltd, Dukes Meadow, Millboard Road, Bourne End,
Buckinghamshire, SL8 5FH, UK. Registered in England & Wales under Registered
No. 04586709.
Re: [PATCH] arm64: dts: renesas: r8a7796: Add CMT device nodes
On Fri, Oct 26, 2018 at 09:25:07AM +0100, Biju Das wrote:
> This patch adds CMT{0|1|2|3} device nodes for r8a7796 SoC.
>
> Signed-off-by: Biju Das
> ---
> This patch is tested against renesas-dev
>
> I have executed on inconsistency-check, nanosleep and clocksource_switch
> selftests on this arm64 SoC. The inconsistency-check and nanosleep tests
> are working fine.The clocksource_switch asynchronous test is failing due
> to inconsistency-check failure on "arch_sys_counter".
>
> But if i skip the clocksource_switching of "arch_sys_counter", the
> asynchronous test is passing for CMT0/1/2/3 timer.
>
> Has any one noticed this issue?
I am reluctant to apply this patch until there is a better understanding
of the issue above.
RE: [PATCH] arm64: dts: renesas: r8a7796: Add CMT device nodes
Hi Daniel,
Thanks for the feedback.
> >> Subject: Re: [PATCH] arm64: dts: renesas: r8a7796: Add CMT device
> >> nodes
> >>
> >> On 26/10/2018 10:25, Biju Das wrote:
> >>> This patch adds CMT{0|1|2|3} device nodes for r8a7796 SoC.
> >>>
> >>> Signed-off-by: Biju Das
> >>> ---
> >>> This patch is tested against renesas-dev
> >>>
> >>> I have executed on inconsistency-check, nanosleep and
> >>> clocksource_switch selftests on this arm64 SoC. The
> >>> inconsistency-check and nanosleep tests are working fine.The
> >>> clocksource_switch asynchronous test is failing due to
> >>> inconsistency-check
> >> failure on "arch_sys_counter".
> >>>
> >>> But if i skip the clocksource_switching of "arch_sys_counter", the
> >>> asynchronous test is passing for CMT0/1/2/3 timer.
> >>>
> >>> Has any one noticed this issue?
> >>
> >> So now that you mention that, I've been through the
> >> clocksource_switch on another ARM64 platform (hikey960) and disabled
> >> the
> >> ARM64_ERRATUM_858921 config option. I can see the same issue.
> >>
> >> Is this option set on your config ?
> >
> > No. As per " config ARM64_ERRATUM_858921", it is "Workaround for
> Cortex-A73 erratum 858921"
> >
> > Our SoC is 2xCA-57 + 4 x CA-53. Does it impact CA-57 + CA_53?
>
> Dunno :/
>
> > Any way I will enable this config option and will provide you the results.
>
> Ok, thanks!
The following config is enabled by default on upstream kernel(4.20-rc3)
CONFIG_ARM_ARCH_TIMER_EVTSTREAM=y
CONFIG_ARM_ARCH_TIMER_OOL_WORKAROUND=y
CONFIG_FSL_ERRATUM_A008585=y
CONFIG_HISILICON_ERRATUM_161010101=y
CONFIG_ARM64_ERRATUM_858921=y
For a quick testing, I have activated the erratum using the property
"fsl,erratum-a008585" on device tree.
With this I confirm the issue is fixed.
I have some questions on this.
1) Based on the test result ,do you think renesas soc also impacted by the
ARM64_ERRATUM_858921?
2) Is there any way to find, is this Erratum actually causing the asynchronous
test to fail?
timer {
compatible = "arm,armv8-timer";
interrupts-extended = < GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(6)
| IRQ_TYPE_LEVEL_LOW)>,
< GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(6)
| IRQ_TYPE_LEVEL_LOW)>,
< GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(6)
| IRQ_TYPE_LEVEL_LOW)>,
< GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(6)
| IRQ_TYPE_LEVEL_LOW)>;
+fsl,erratum-a008585;
}
Regards,
Biju
Renesas Electronics Europe Ltd, Dukes Meadow, Millboard Road, Bourne End,
Buckinghamshire, SL8 5FH, UK. Registered in England & Wales under Registered
No. 04586709.
Re: [PATCH] arm64: dts: renesas: r8a7796: Add CMT device nodes
On 19/11/2018 11:35, Biju Das wrote:
> Hi Daniel,
>
> Thanks for the feedback.
>
>> -Original Message-
>> From: Daniel Lezcano
>> Sent: 19 November 2018 10:26
>> To: Biju Das ; Rob Herring
>> ; Mark Rutland
>> Cc: Simon Horman ; Magnus Damm
>> ; linux-renesas-soc@vger.kernel.org;
>> devicet...@vger.kernel.org; Geert Uytterhoeven
>> ; Chris Paterson
>> ; Thomas Gleixner ;
>> John Stultz ; Fabrizio Castro
>>
>> Subject: Re: [PATCH] arm64: dts: renesas: r8a7796: Add CMT device nodes
>>
>> On 26/10/2018 10:25, Biju Das wrote:
>>> This patch adds CMT{0|1|2|3} device nodes for r8a7796 SoC.
>>>
>>> Signed-off-by: Biju Das
>>> ---
>>> This patch is tested against renesas-dev
>>>
>>> I have executed on inconsistency-check, nanosleep and
>>> clocksource_switch selftests on this arm64 SoC. The
>>> inconsistency-check and nanosleep tests are working fine.The
>>> clocksource_switch asynchronous test is failing due to inconsistency-check
>> failure on "arch_sys_counter".
>>>
>>> But if i skip the clocksource_switching of "arch_sys_counter", the
>>> asynchronous test is passing for CMT0/1/2/3 timer.
>>>
>>> Has any one noticed this issue?
>>
>> So now that you mention that, I've been through the clocksource_switch on
>> another ARM64 platform (hikey960) and disabled the
>> ARM64_ERRATUM_858921 config option. I can see the same issue.
>>
>> Is this option set on your config ?
>
> No. As per " config ARM64_ERRATUM_858921", it is "Workaround for Cortex-A73
> erratum 858921"
>
> Our SoC is 2xCA-57 + 4 x CA-53. Does it impact CA-57 + CA_53?
Dunno :/
> Any way I will enable this config option and will provide you the results.
Ok, thanks!
> The following errata is set in our kernel config.
>
> CONFIG_ARM64_ERRATUM_826319=y
> CONFIG_ARM64_ERRATUM_827319=y
> CONFIG_ARM64_ERRATUM_824069=y
> CONFIG_ARM64_ERRATUM_819472=y
> CONFIG_ARM64_ERRATUM_832075=y
> CONFIG_ARM64_ERRATUM_834220=y
> CONFIG_ARM64_ERRATUM_845719=y
> CONFIG_ARM64_ERRATUM_843419=y
> CONFIG_ARM64_ERRATUM_1024718=y
> CONFIG_ARM64_ERRATUM_1188873=y
>
> Regards.
> Biju
>
>
>
> Renesas Electronics Europe Ltd, Dukes Meadow, Millboard Road, Bourne End,
> Buckinghamshire, SL8 5FH, UK. Registered in England & Wales under Registered
> No. 04586709.
>
--
<http://www.linaro.org/> Linaro.org │ Open source software for ARM SoCs
Follow Linaro: <http://www.facebook.com/pages/Linaro> Facebook |
<http://twitter.com/#!/linaroorg> Twitter |
<http://www.linaro.org/linaro-blog/> Blog
RE: [PATCH] arm64: dts: renesas: r8a7796: Add CMT device nodes
Hi Daniel,
Thanks for the feedback.
> -Original Message-
> From: Daniel Lezcano
> Sent: 19 November 2018 10:26
> To: Biju Das ; Rob Herring
> ; Mark Rutland
> Cc: Simon Horman ; Magnus Damm
> ; linux-renesas-soc@vger.kernel.org;
> devicet...@vger.kernel.org; Geert Uytterhoeven
> ; Chris Paterson
> ; Thomas Gleixner ;
> John Stultz ; Fabrizio Castro
>
> Subject: Re: [PATCH] arm64: dts: renesas: r8a7796: Add CMT device nodes
>
> On 26/10/2018 10:25, Biju Das wrote:
> > This patch adds CMT{0|1|2|3} device nodes for r8a7796 SoC.
> >
> > Signed-off-by: Biju Das
> > ---
> > This patch is tested against renesas-dev
> >
> > I have executed on inconsistency-check, nanosleep and
> > clocksource_switch selftests on this arm64 SoC. The
> > inconsistency-check and nanosleep tests are working fine.The
> > clocksource_switch asynchronous test is failing due to inconsistency-check
> failure on "arch_sys_counter".
> >
> > But if i skip the clocksource_switching of "arch_sys_counter", the
> > asynchronous test is passing for CMT0/1/2/3 timer.
> >
> > Has any one noticed this issue?
>
> So now that you mention that, I've been through the clocksource_switch on
> another ARM64 platform (hikey960) and disabled the
> ARM64_ERRATUM_858921 config option. I can see the same issue.
>
> Is this option set on your config ?
No. As per " config ARM64_ERRATUM_858921", it is "Workaround for Cortex-A73
erratum 858921"
Our SoC is 2xCA-57 + 4 x CA-53. Does it impact CA-57 + CA_53?
Any way I will enable this config option and will provide you the results.
The following errata is set in our kernel config.
CONFIG_ARM64_ERRATUM_826319=y
CONFIG_ARM64_ERRATUM_827319=y
CONFIG_ARM64_ERRATUM_824069=y
CONFIG_ARM64_ERRATUM_819472=y
CONFIG_ARM64_ERRATUM_832075=y
CONFIG_ARM64_ERRATUM_834220=y
CONFIG_ARM64_ERRATUM_845719=y
CONFIG_ARM64_ERRATUM_843419=y
CONFIG_ARM64_ERRATUM_1024718=y
CONFIG_ARM64_ERRATUM_1188873=y
Regards.
Biju
Renesas Electronics Europe Ltd, Dukes Meadow, Millboard Road, Bourne End,
Buckinghamshire, SL8 5FH, UK. Registered in England & Wales under Registered
No. 04586709.
Re: [PATCH] arm64: dts: renesas: r8a7796: Add CMT device nodes
Hi Daniel,
On Mon, Nov 19, 2018 at 11:26 AM Daniel Lezcano
wrote:
> On 26/10/2018 10:25, Biju Das wrote:
> > This patch adds CMT{0|1|2|3} device nodes for r8a7796 SoC.
> >
> > Signed-off-by: Biju Das
> > ---
> > This patch is tested against renesas-dev
> >
> > I have executed on inconsistency-check, nanosleep and clocksource_switch
> > selftests on this arm64 SoC. The inconsistency-check and nanosleep tests
> > are working fine.The clocksource_switch asynchronous test is failing due
> > to inconsistency-check failure on "arch_sys_counter".
> >
> > But if i skip the clocksource_switching of "arch_sys_counter", the
> > asynchronous test is passing for CMT0/1/2/3 timer.
> >
> > Has any one noticed this issue?
>
> So now that you mention that, I've been through the clocksource_switch
> on another ARM64 platform (hikey960) and disabled the
> ARM64_ERRATUM_858921 config option. I can see the same issue.
>
> Is this option set on your config ?
Note that r8a7796 does not have Cortex-A73, but A57/A53.
But let's wait for Biju's answer, to see if it makes a difference...
Gr{oetje,eeting}s,
Geert
--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- ge...@linux-m68k.org
In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
-- Linus Torvalds
Re: [PATCH] arm64: dts: renesas: r8a7796: Add CMT device nodes
On 26/10/2018 10:25, Biju Das wrote:
> This patch adds CMT{0|1|2|3} device nodes for r8a7796 SoC.
>
> Signed-off-by: Biju Das
> ---
> This patch is tested against renesas-dev
>
> I have executed on inconsistency-check, nanosleep and clocksource_switch
> selftests on this arm64 SoC. The inconsistency-check and nanosleep tests
> are working fine.The clocksource_switch asynchronous test is failing due
> to inconsistency-check failure on "arch_sys_counter".
>
> But if i skip the clocksource_switching of "arch_sys_counter", the
> asynchronous test is passing for CMT0/1/2/3 timer.
>
> Has any one noticed this issue?
So now that you mention that, I've been through the clocksource_switch
on another ARM64 platform (hikey960) and disabled the
ARM64_ERRATUM_858921 config option. I can see the same issue.
Is this option set on your config ?
--
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Re: [PATCH] arm64: dts: renesas: r8a7796: Add CMT device nodes
On 26/10/2018 10:25, Biju Das wrote:
> This patch adds CMT{0|1|2|3} device nodes for r8a7796 SoC.
>
> Signed-off-by: Biju Das
> ---
> This patch is tested against renesas-dev
>
> I have executed on inconsistency-check, nanosleep and clocksource_switch
> selftests on this arm64 SoC. The inconsistency-check and nanosleep tests
> are working fine.The clocksource_switch asynchronous test is failing due
> to inconsistency-check failure on "arch_sys_counter".
>
> But if i skip the clocksource_switching of "arch_sys_counter", the
> asynchronous test is passing for CMT0/1/2/3 timer.
>
> Has any one noticed this issue?
Were you able to narrow down the issue?
> ---
> arch/arm64/boot/dts/renesas/r8a7796.dtsi | 70
>
> 1 file changed, 70 insertions(+)
>
> diff --git a/arch/arm64/boot/dts/renesas/r8a7796.dtsi
> b/arch/arm64/boot/dts/renesas/r8a7796.dtsi
> index 1ec6aaa..d62febd0 100644
> --- a/arch/arm64/boot/dts/renesas/r8a7796.dtsi
> +++ b/arch/arm64/boot/dts/renesas/r8a7796.dtsi
> @@ -401,6 +401,76 @@
> reg = <0 0xe606 0 0x50c>;
> };
>
> + cmt0: timer@e60f {
> + compatible = "renesas,r8a7796-cmt0",
> + "renesas,rcar-gen3-cmt0";
> + reg = <0 0xe60f 0 0x1004>;
> + interrupts = ,
> + ;
> + clocks = < CPG_MOD 303>;
> + clock-names = "fck";
> + power-domains = < R8A7796_PD_ALWAYS_ON>;
> + resets = < 303>;
> + status = "disabled";
> + };
> +
> + cmt1: timer@e613 {
> + compatible = "renesas,r8a7796-cmt1",
> + "renesas,rcar-gen3-cmt1";
> + reg = <0 0xe613 0 0x1004>;
> + interrupts = ,
> + ,
> + ,
> + ,
> + ,
> + ,
> + ,
> + ;
> + clocks = < CPG_MOD 302>;
> + clock-names = "fck";
> + power-domains = < R8A7796_PD_ALWAYS_ON>;
> + resets = < 302>;
> + status = "disabled";
> + };
> +
> + cmt2: timer@e614 {
> + compatible = "renesas,r8a7796-cmt1",
> + "renesas,rcar-gen3-cmt1";
> + reg = <0 0xe614 0 0x1004>;
> + interrupts = ,
> + ,
> + ,
> + ,
> + ,
> + ,
> + ,
> + ;
> + clocks = < CPG_MOD 301>;
> + clock-names = "fck";
> + power-domains = < R8A7796_PD_ALWAYS_ON>;
> + resets = < 301>;
> + status = "disabled";
> + };
> +
> + cmt3: timer@e6148000 {
> + compatible = "renesas,r8a7796-cmt1",
> + "renesas,rcar-gen3-cmt1";
> + reg = <0 0xe6148000 0 0x1004>;
> + interrupts = ,
> + ,
> + ,
> + ,
> + ,
> + ,
> + ,
> + ;
> + clocks = < CPG_MOD 300>;
> + clock-names = "fck";
> + power-domains = < R8A7796_PD_ALWAYS_ON>;
> + resets = < 300>;
> + status = "disabled";
> + };
> +
> cpg: clock-controller@e615 {
> compatible = "renesas,r8a7796-cpg-mssr";
> reg = <0 0xe615 0 0x1000>;
>
--
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RE: [PATCH] arm64: dts: renesas: r8a7796: Add CMT device nodes
Hi All,
Gentle reminder, Is this patch looks ok to you? Or any changes needed.
Regards,
Biju
> -Original Message-
> From: Biju Das
> Sent: 26 October 2018 09:25
> To: Rob Herring ; Mark Rutland
>
> Cc: Biju Das ; Simon Horman
> ; Magnus Damm ;
> linux-renesas-soc@vger.kernel.org; devicet...@vger.kernel.org; Geert
> Uytterhoeven ; Chris Paterson
> ; Daniel Lezcano
> ; Thomas Gleixner ; John
> Stultz ; Fabrizio Castro
>
> Subject: [PATCH] arm64: dts: renesas: r8a7796: Add CMT device nodes
>
> This patch adds CMT{0|1|2|3} device nodes for r8a7796 SoC.
>
> Signed-off-by: Biju Das
> ---
> This patch is tested against renesas-dev
>
> I have executed on inconsistency-check, nanosleep and clocksource_switch
> selftests on this arm64 SoC. The inconsistency-check and nanosleep tests are
> working fine.The clocksource_switch asynchronous test is failing due to
> inconsistency-check failure on "arch_sys_counter".
>
> But if i skip the clocksource_switching of "arch_sys_counter", the
> asynchronous test is passing for CMT0/1/2/3 timer.
>
> Has any one noticed this issue?
> ---
> arch/arm64/boot/dts/renesas/r8a7796.dtsi | 70
>
> 1 file changed, 70 insertions(+)
>
> diff --git a/arch/arm64/boot/dts/renesas/r8a7796.dtsi
> b/arch/arm64/boot/dts/renesas/r8a7796.dtsi
> index 1ec6aaa..d62febd0 100644
> --- a/arch/arm64/boot/dts/renesas/r8a7796.dtsi
> +++ b/arch/arm64/boot/dts/renesas/r8a7796.dtsi
> @@ -401,6 +401,76 @@
> reg = <0 0xe606 0 0x50c>;
> };
>
> +cmt0: timer@e60f {
> +compatible = "renesas,r8a7796-cmt0",
> + "renesas,rcar-gen3-cmt0";
> +reg = <0 0xe60f 0 0x1004>;
> +interrupts = ,
> + ;
> +clocks = < CPG_MOD 303>;
> +clock-names = "fck";
> +power-domains = <
> R8A7796_PD_ALWAYS_ON>;
> +resets = < 303>;
> +status = "disabled";
> +};
> +
> +cmt1: timer@e613 {
> +compatible = "renesas,r8a7796-cmt1",
> + "renesas,rcar-gen3-cmt1";
> +reg = <0 0xe613 0 0x1004>;
> +interrupts = ,
> + ,
> + ,
> + ,
> + ,
> + ,
> + ,
> + ;
> +clocks = < CPG_MOD 302>;
> +clock-names = "fck";
> +power-domains = <
> R8A7796_PD_ALWAYS_ON>;
> +resets = < 302>;
> +status = "disabled";
> +};
> +
> +cmt2: timer@e614 {
> +compatible = "renesas,r8a7796-cmt1",
> + "renesas,rcar-gen3-cmt1";
> +reg = <0 0xe614 0 0x1004>;
> +interrupts = ,
> + ,
> + ,
> + ,
> + ,
> + ,
> + ,
> + ;
> +clocks = < CPG_MOD 301>;
> +clock-names = "fck";
> +power-domains = <
> R8A7796_PD_ALWAYS_ON>;
> +resets = < 301>;
> +status = "disabled";
> +};
> +
> +cmt3: timer@e6148000 {
> +compatible = "renesas,r8a7796-cmt1",
> + "renesas,rcar-gen3-cmt1";
> +reg = <0 0xe6148000 0 0x1004>;
> +interrupts = ,
> + ,
> + ,
> + ,
> + ,
> + ,
> + ,
> + ;
> +clocks = < CPG_MOD 300>;
> +clock-names = "fck";
> +power-domains = <
> R8A7796_PD_ALWAYS_ON>;
> +resets = < 300>;
> +status = "disabled";
> +};
> +
> cpg: clock-controller@e615 {
> compatible = "renesas,r8a7796-cpg-mssr";
> reg = <0 0xe615 0 0x1000>;
> --
> 2.7.4
Renesas Electronics Europe Ltd, Dukes Meadow, Millboard Road, Bourne End,
Buckinghamshire, SL8 5FH, UK. Registered in England & Wales under Registered
No. 04586709.
RE: [PATCH] arm64: dts: renesas: r8a7796: Add CMT device nodes
> Subject: [PATCH] arm64: dts: renesas: r8a7796: Add CMT device nodes
>
> This patch adds CMT{0|1|2|3} device nodes for r8a7796 SoC.
>
> Signed-off-by: Biju Das
Reviewed-by: Fabrizio Castro
> ---
> This patch is tested against renesas-dev
>
> I have executed on inconsistency-check, nanosleep and clocksource_switch
> selftests on this arm64 SoC. The inconsistency-check and nanosleep tests
> are working fine.The clocksource_switch asynchronous test is failing due
> to inconsistency-check failure on "arch_sys_counter".
>
> But if i skip the clocksource_switching of "arch_sys_counter", the
> asynchronous test is passing for CMT0/1/2/3 timer.
>
> Has any one noticed this issue?
> ---
> arch/arm64/boot/dts/renesas/r8a7796.dtsi | 70
>
> 1 file changed, 70 insertions(+)
>
> diff --git a/arch/arm64/boot/dts/renesas/r8a7796.dtsi
> b/arch/arm64/boot/dts/renesas/r8a7796.dtsi
> index 1ec6aaa..d62febd0 100644
> --- a/arch/arm64/boot/dts/renesas/r8a7796.dtsi
> +++ b/arch/arm64/boot/dts/renesas/r8a7796.dtsi
> @@ -401,6 +401,76 @@
> reg = <0 0xe606 0 0x50c>;
> };
>
> +cmt0: timer@e60f {
> +compatible = "renesas,r8a7796-cmt0",
> + "renesas,rcar-gen3-cmt0";
> +reg = <0 0xe60f 0 0x1004>;
> +interrupts = ,
> + ;
> +clocks = < CPG_MOD 303>;
> +clock-names = "fck";
> +power-domains = < R8A7796_PD_ALWAYS_ON>;
> +resets = < 303>;
> +status = "disabled";
> +};
> +
> +cmt1: timer@e613 {
> +compatible = "renesas,r8a7796-cmt1",
> + "renesas,rcar-gen3-cmt1";
> +reg = <0 0xe613 0 0x1004>;
> +interrupts = ,
> + ,
> + ,
> + ,
> + ,
> + ,
> + ,
> + ;
> +clocks = < CPG_MOD 302>;
> +clock-names = "fck";
> +power-domains = < R8A7796_PD_ALWAYS_ON>;
> +resets = < 302>;
> +status = "disabled";
> +};
> +
> +cmt2: timer@e614 {
> +compatible = "renesas,r8a7796-cmt1",
> + "renesas,rcar-gen3-cmt1";
> +reg = <0 0xe614 0 0x1004>;
> +interrupts = ,
> + ,
> + ,
> + ,
> + ,
> + ,
> + ,
> + ;
> +clocks = < CPG_MOD 301>;
> +clock-names = "fck";
> +power-domains = < R8A7796_PD_ALWAYS_ON>;
> +resets = < 301>;
> +status = "disabled";
> +};
> +
> +cmt3: timer@e6148000 {
> +compatible = "renesas,r8a7796-cmt1",
> + "renesas,rcar-gen3-cmt1";
> +reg = <0 0xe6148000 0 0x1004>;
> +interrupts = ,
> + ,
> + ,
> + ,
> + ,
> + ,
> + ,
> + ;
> +clocks = < CPG_MOD 300>;
> +clock-names = "fck";
> +power-domains = < R8A7796_PD_ALWAYS_ON>;
> +resets = < 300>;
> +status = "disabled";
> +};
> +
> cpg: clock-controller@e615 {
> compatible = "renesas,r8a7796-cpg-mssr";
> reg = <0 0xe615 0 0x1000>;
> --
> 2.7.4
Renesas Electronics Europe Ltd, Dukes Meadow, Millboard Road, Bourne End,
Buckinghamshire, SL8 5FH, UK. Registered in England & Wales under Registered
No. 04586709.
[PATCH] arm64: dts: renesas: r8a7796: Add CMT device nodes
This patch adds CMT{0|1|2|3} device nodes for r8a7796 SoC.
Signed-off-by: Biju Das
---
This patch is tested against renesas-dev
I have executed on inconsistency-check, nanosleep and clocksource_switch
selftests on this arm64 SoC. The inconsistency-check and nanosleep tests
are working fine.The clocksource_switch asynchronous test is failing due
to inconsistency-check failure on "arch_sys_counter".
But if i skip the clocksource_switching of "arch_sys_counter", the
asynchronous test is passing for CMT0/1/2/3 timer.
Has any one noticed this issue?
---
arch/arm64/boot/dts/renesas/r8a7796.dtsi | 70
1 file changed, 70 insertions(+)
diff --git a/arch/arm64/boot/dts/renesas/r8a7796.dtsi
b/arch/arm64/boot/dts/renesas/r8a7796.dtsi
index 1ec6aaa..d62febd0 100644
--- a/arch/arm64/boot/dts/renesas/r8a7796.dtsi
+++ b/arch/arm64/boot/dts/renesas/r8a7796.dtsi
@@ -401,6 +401,76 @@
reg = <0 0xe606 0 0x50c>;
};
+ cmt0: timer@e60f {
+ compatible = "renesas,r8a7796-cmt0",
+"renesas,rcar-gen3-cmt0";
+ reg = <0 0xe60f 0 0x1004>;
+ interrupts = ,
+;
+ clocks = < CPG_MOD 303>;
+ clock-names = "fck";
+ power-domains = < R8A7796_PD_ALWAYS_ON>;
+ resets = < 303>;
+ status = "disabled";
+ };
+
+ cmt1: timer@e613 {
+ compatible = "renesas,r8a7796-cmt1",
+"renesas,rcar-gen3-cmt1";
+ reg = <0 0xe613 0 0x1004>;
+ interrupts = ,
+,
+,
+,
+,
+,
+,
+;
+ clocks = < CPG_MOD 302>;
+ clock-names = "fck";
+ power-domains = < R8A7796_PD_ALWAYS_ON>;
+ resets = < 302>;
+ status = "disabled";
+ };
+
+ cmt2: timer@e614 {
+ compatible = "renesas,r8a7796-cmt1",
+"renesas,rcar-gen3-cmt1";
+ reg = <0 0xe614 0 0x1004>;
+ interrupts = ,
+,
+,
+,
+,
+,
+,
+;
+ clocks = < CPG_MOD 301>;
+ clock-names = "fck";
+ power-domains = < R8A7796_PD_ALWAYS_ON>;
+ resets = < 301>;
+ status = "disabled";
+ };
+
+ cmt3: timer@e6148000 {
+ compatible = "renesas,r8a7796-cmt1",
+"renesas,rcar-gen3-cmt1";
+ reg = <0 0xe6148000 0 0x1004>;
+ interrupts = ,
+,
+,
+,
+,
+,
+,
+;
+ clocks = < CPG_MOD 300>;
+ clock-names = "fck";
+ power-domains = < R8A7796_PD_ALWAYS_ON>;
+ resets = < 300>;
+ status = "disabled";
+ };
+
cpg: clock-controller@e615 {
compatible = "renesas,r8a7796-cpg-mssr";
reg = <0 0xe615 0 0x1000>;
--
2.7.4
