Re: [PATCH] clk: renesas: rcar-gen3: set state when registering SD clocks
Hi Niklas,
On Thu, Nov 29, 2018 at 1:16 AM Niklas Söderlund
wrote:
> The driver tries to figure out which state a SD clock is in when the
> clock is register instead of setting a known state. This can be
> problematic for two reasons.
>
> 1. If the clock driver can't figure out the state of the clock
>registration of the clock fails and setting of a known state by a
>clock user is not possible.
>
> 2. The state of the clock depends on if and how the bootloader
>configured it. The driver only checks that the rate is known not if
>the clock is stopped or not for example.
>
> Fix this by setting a known state and make sure the clock is stopped.
>
> Signed-off-by: Niklas Söderlund
Thanks for your patch!
Reviewed-by: Geert Uytterhoeven
One minor nit below.
> --- a/drivers/clk/renesas/rcar-gen3-cpg.c
> +++ b/drivers/clk/renesas/rcar-gen3-cpg.c
> @@ -360,7 +360,7 @@ static struct clk * __init cpg_sd_clk_register(const
> struct cpg_core_clk *core,
> struct sd_clock *clock;
> struct clk *clk;
> unsigned int i;
> - u32 sd_fc;
> + u32 val;
>
> clock = kzalloc(sizeof(*clock), GFP_KERNEL);
> if (!clock)
> @@ -377,17 +377,11 @@ static struct clk * __init cpg_sd_clk_register(const
> struct cpg_core_clk *core,
> clock->div_table = cpg_sd_div_table;
> clock->div_num = ARRAY_SIZE(cpg_sd_div_table);
>
> - sd_fc = readl(clock->csn.reg) & CPG_SD_FC_MASK;
> - for (i = 0; i < clock->div_num; i++)
> - if (sd_fc == (clock->div_table[i].val & CPG_SD_FC_MASK))
> - break;
> -
> - if (WARN_ON(i >= clock->div_num)) {
> - kfree(clock);
> - return ERR_PTR(-EINVAL);
> - }
> + val = readl(clock->csn.reg) & ~CPG_SD_FC_MASK;
> + val |= CPG_SD_STP_MASK | (clock->div_table[0].val & CPG_SD_FC_MASK);
> + writel(val, clock->csn.reg);
>
> - clock->cur_div_idx = i;
> + clock->cur_div_idx = 0;
I think this line can just be dropped, as the object was allocated using
kzalloc().
Gr{oetje,eeting}s,
Geert
--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- ge...@linux-m68k.org
In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
-- Linus Torvalds
Re: [PATCH] clk: renesas: rcar-gen3: set state when registering SD clocks
On Thu, Nov 29, 2018 at 01:15:38AM +0100, Niklas Söderlund wrote: > The driver tries to figure out which state a SD clock is in when the > clock is register instead of setting a known state. This can be > problematic for two reasons. > > 1. If the clock driver can't figure out the state of the clock >registration of the clock fails and setting of a known state by a >clock user is not possible. > > 2. The state of the clock depends on if and how the bootloader >configured it. The driver only checks that the rate is known not if >the clock is stopped or not for example. > > Fix this by setting a known state and make sure the clock is stopped. > > Signed-off-by: Niklas Söderlund Tested on H3 ES1.0 and ES2.0, M3W ES1.0, and M3N with eMMC and UHS-SD cards. Proper clock speeds were selected and performance matches. Tested-by: Wolfram Sang Acked-by: Wolfram Sang signature.asc Description: PGP signature
Re: [PATCH] clk: renesas: rcar-gen3: set state when registering SD clocks
On Thu, Nov 29, 2018 at 01:15:38AM +0100, Niklas Söderlund wrote: > The driver tries to figure out which state a SD clock is in when the > clock is register instead of setting a known state. This can be > problematic for two reasons. > > 1. If the clock driver can't figure out the state of the clock >registration of the clock fails and setting of a known state by a >clock user is not possible. > > 2. The state of the clock depends on if and how the bootloader >configured it. The driver only checks that the rate is known not if >the clock is stopped or not for example. > > Fix this by setting a known state and make sure the clock is stopped. > > Signed-off-by: Niklas Söderlund This patch makes much sense to me, a known state is gold. I can't really think of a reason why it was matched against the bootloader clock. Can someone else? If not, maybe asking the BSP team makes sense to ensure we don't overlook something?
Re: [PATCH] clk: renesas: rcar-gen3: set state when registering SD clocks
Hello! On 11/29/2018 03:15 AM, Niklas Söderlund wrote: > The driver tries to figure out which state a SD clock is in when the > clock is register instead of setting a known state. This can be Registered? > problematic for two reasons. > > 1. If the clock driver can't figure out the state of the clock >registration of the clock fails and setting of a known state by a >clock user is not possible. > > 2. The state of the clock depends on if and how the bootloader >configured it. The driver only checks that the rate is known not if >the clock is stopped or not for example. > > Fix this by setting a known state and make sure the clock is stopped. > > Signed-off-by: Niklas Söderlund [...] MBR, Sergei
[PATCH] clk: renesas: rcar-gen3: set state when registering SD clocks
The driver tries to figure out which state a SD clock is in when the
clock is register instead of setting a known state. This can be
problematic for two reasons.
1. If the clock driver can't figure out the state of the clock
registration of the clock fails and setting of a known state by a
clock user is not possible.
2. The state of the clock depends on if and how the bootloader
configured it. The driver only checks that the rate is known not if
the clock is stopped or not for example.
Fix this by setting a known state and make sure the clock is stopped.
Signed-off-by: Niklas Söderlund
---
drivers/clk/renesas/rcar-gen3-cpg.c | 16 +---
1 file changed, 5 insertions(+), 11 deletions(-)
diff --git a/drivers/clk/renesas/rcar-gen3-cpg.c
b/drivers/clk/renesas/rcar-gen3-cpg.c
index 4ba38f98cc7bab82..f6335357c85505df 100644
--- a/drivers/clk/renesas/rcar-gen3-cpg.c
+++ b/drivers/clk/renesas/rcar-gen3-cpg.c
@@ -360,7 +360,7 @@ static struct clk * __init cpg_sd_clk_register(const struct
cpg_core_clk *core,
struct sd_clock *clock;
struct clk *clk;
unsigned int i;
- u32 sd_fc;
+ u32 val;
clock = kzalloc(sizeof(*clock), GFP_KERNEL);
if (!clock)
@@ -377,17 +377,11 @@ static struct clk * __init cpg_sd_clk_register(const
struct cpg_core_clk *core,
clock->div_table = cpg_sd_div_table;
clock->div_num = ARRAY_SIZE(cpg_sd_div_table);
- sd_fc = readl(clock->csn.reg) & CPG_SD_FC_MASK;
- for (i = 0; i < clock->div_num; i++)
- if (sd_fc == (clock->div_table[i].val & CPG_SD_FC_MASK))
- break;
-
- if (WARN_ON(i >= clock->div_num)) {
- kfree(clock);
- return ERR_PTR(-EINVAL);
- }
+ val = readl(clock->csn.reg) & ~CPG_SD_FC_MASK;
+ val |= CPG_SD_STP_MASK | (clock->div_table[0].val & CPG_SD_FC_MASK);
+ writel(val, clock->csn.reg);
- clock->cur_div_idx = i;
+ clock->cur_div_idx = 0;
clock->div_max = clock->div_table[0].div;
clock->div_min = clock->div_max;
--
2.19.1
