Re: [PATCH 0/2] renesas: rcar-gen3: add HS400 quirk for SD clock
Hi Wolfram,
On Mon, Nov 5, 2018 at 7:08 PM Wolfram Sang wrote:
> > Is there any chance this can start to bite us in the future?
>
> Well, there is always a chance but to the best of our current knowledge,
> we can't see it for Gen3. And even then, we can still fix it.
>
> I was entering SDHI hackfest with the attitude of representing the
> hardware which means exposing SDHn. Yet, I got convinced that getting
> and keeping highspeed modes stable means turning a lot of knobs
> currently. This is not only true for HS400, but also HS200 and SDR50 and
> SDR104.
>
> This simple approach here allows us to have a stable base on which we
> can evaluate the other BSP patches on top. Especially those which modify
> the tuning procedure.
>
> So, because this change does not prevent SDHn exposure in the future, I
> suggest to go this way for now, so we can spend our (limited) manpower
> on evaluating the tuning next.
OK. Thanks!
Gr{oetje,eeting}s,
Geert
--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- ge...@linux-m68k.org
In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
-- Linus Torvalds
Re: [PATCH 0/2] renesas: rcar-gen3: add HS400 quirk for SD clock
Hi Geert, > Is there any chance this can start to bite us in the future? Well, there is always a chance but to the best of our current knowledge, we can't see it for Gen3. And even then, we can still fix it. I was entering SDHI hackfest with the attitude of representing the hardware which means exposing SDHn. Yet, I got convinced that getting and keeping highspeed modes stable means turning a lot of knobs currently. This is not only true for HS400, but also HS200 and SDR50 and SDR104. This simple approach here allows us to have a stable base on which we can evaluate the other BSP patches on top. Especially those which modify the tuning procedure. So, because this change does not prevent SDHn exposure in the future, I suggest to go this way for now, so we can spend our (limited) manpower on evaluating the tuning next. Kind regards, Wolfram signature.asc Description: PGP signature
Re: [PATCH 0/2] renesas: rcar-gen3: add HS400 quirk for SD clock
Hi Geert,
Thanks for your feedback.
On 2018-11-05 11:32:15 +0100, Geert Uytterhoeven wrote:
> Hi Niklas,
>
> On Thu, Nov 1, 2018 at 12:26 AM Niklas Söderlund
> wrote:
> > This is the result of the SDHI hackathon for a possible solution to the
> > clock issue on early ES versions. It is based on the Gen2 solution where
> > a row of the possible clock settings are ignored on the effected SoC+ES
> > versions. The first row is not effected when reading settings left by
> > the bootloader, only when the setting the clock.
>
> To clarify, you decided not to describe the SDH clock in DT, but went for
> heuristics with a quirk instead?
>
> Is there any chance this can start to bite us in the future?
We discussed this at the SDHI hackfest and we could not think of any
future situation where this could come back and bite us.
>
> Thanks!
>
> Gr{oetje,eeting}s,
>
> Geert
>
> --
> Geert Uytterhoeven -- There's lots of Linux beyond ia32 --
> ge...@linux-m68k.org
>
> In personal conversations with technical people, I call myself a hacker. But
> when I'm talking to journalists I just say "programmer" or something like
> that.
> -- Linus Torvalds
--
Regards,
Niklas Söderlund
Re: [PATCH 0/2] renesas: rcar-gen3: add HS400 quirk for SD clock
> This is the result of the SDHI hackathon for a possible solution to the > clock issue on early ES versions. It is based on the Gen2 solution where > a row of the possible clock settings are ignored on the effected SoC+ES > versions. The first row is not effected when reading settings left by > the bootloader, only when the setting the clock. We really thought about exposing both clocks, SDn and SDHn. I got convinced to use this less intrusive approach to get HS400 reliably to work as a first step. "First make it work, then make it beautiful" so to say... signature.asc Description: PGP signature
[PATCH 0/2] renesas: rcar-gen3: add HS400 quirk for SD clock
From: Niklas Söderlund
Hi Geert,
This is the result of the SDHI hackathon for a possible solution to the
clock issue on early ES versions. It is based on the Gen2 solution where
a row of the possible clock settings are ignored on the effected SoC+ES
versions. The first row is not effected when reading settings left by
the bootloader, only when the setting the clock.
This is tested on H3 (ES1.0, ES2.0), M3-W (ES1.0) and M3-N together with
patches to enable HS400 with great results. No regressions found for
eMMC HS200/HS400 modes nor for SDR{25,50,104} on any of the SoCs.
Patch 1/2 adds documentation on which settings is used while 2/2 is the
real change where the quirk is implemented.
Niklas Söderlund (2):
clk: renesas: rcar-gen3: add documentation for SD clocks
clk: renesas: rcar-gen3: add HS400 quirk for SD clock
drivers/clk/renesas/rcar-gen3-cpg.c | 38 -
1 file changed, 27 insertions(+), 11 deletions(-)
--
2.19.1
