Re: [PATCH 09/13] ARM: dts: r8a7792: add [H]SCIF support
On 06/01/2016 04:13 AM, Simon Horman wrote: Describe [H]SCIFs in the R8A7792 device tree. Signed-off-by: Sergei ShtylyovThis looks correct to me. I am wondering if you have been able to confirm DMA operation of the devices enabled later on in the series. The SCIF DMA seems to work now that enabled it in the driver. Not sure what you meant by "the devices enabled later in the seties"... MBR, Sergei
Re: [PATCH 09/13] ARM: dts: r8a7792: add [H]SCIF support
On Wed, Jun 1, 2016 at 12:26 AM, Sergei Shtylyovwrote: > Describe [H]SCIFs in the R8A7792 device tree. > > Signed-off-by: Sergei Shtylyov Reviewed-by: Geert Uytterhoeven Gr{oetje,eeting}s, Geert -- Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- ge...@linux-m68k.org In personal conversations with technical people, I call myself a hacker. But when I'm talking to journalists I just say "programmer" or something like that. -- Linus Torvalds
Re: [PATCH 09/13] ARM: dts: r8a7792: add [H]SCIF support
On Wed, Jun 01, 2016 at 01:26:56AM +0300, Sergei Shtylyov wrote: > Describe [H]SCIFs in the R8A7792 device tree. > > Signed-off-by: Sergei ShtylyovThis looks correct to me. I am wondering if you have been able to confirm DMA operation of the devices enabled later on in the series. > > --- > arch/arm/boot/dts/r8a7792.dtsi | 90 > + > 1 file changed, 90 insertions(+) > > Index: renesas/arch/arm/boot/dts/r8a7792.dtsi > === > --- renesas.orig/arch/arm/boot/dts/r8a7792.dtsi > +++ renesas/arch/arm/boot/dts/r8a7792.dtsi > @@ -140,6 +140,96 @@ > dma-channels = <15>; > }; > > + scif0: serial@e6e6 { > + compatible = "renesas,scif-r8a7792", "renesas,rcar-gen2-scif", > + "renesas,scif"; > + reg = <0 0xe6e6 0 64>; > + interrupts = ; > + clocks = <_clks R8A7792_CLK_SCIF0>, <_clk>, > + <_clk>; > + clock-names = "fck", "brg_int", "scif_clk"; > + dmas = < 0x29>, < 0x2a>, > +< 0x29>, < 0x2a>; > + dma-names = "tx", "rx", "tx", "rx"; > + power-domains = < R8A7792_PD_ALWAYS_ON>; > + status = "disabled"; > + }; > + > + scif1: serial@e6e68000 { > + compatible = "renesas,scif-r8a7792", "renesas,rcar-gen2-scif", > + "renesas,scif"; > + reg = <0 0xe6e68000 0 64>; > + interrupts = ; > + clocks = <_clks R8A7792_CLK_SCIF1>, <_clk>, > + <_clk>; > + clock-names = "fck", "brg_int", "scif_clk"; > + dmas = < 0x2d>, < 0x2e>, > +< 0x2d>, < 0x2e>; > + dma-names = "tx", "rx", "tx", "rx"; > + power-domains = < R8A7792_PD_ALWAYS_ON>; > + status = "disabled"; > + }; > + > + scif2: serial@e6e58000 { > + compatible = "renesas,scif-r8a7792", "renesas,rcar-gen2-scif", > + "renesas,scif"; > + reg = <0 0xe6e58000 0 64>; > + interrupts = ; > + clocks = <_clks R8A7792_CLK_SCIF2>, <_clk>, > + <_clk>; > + clock-names = "fck", "brg_int", "scif_clk"; > + dmas = < 0x2b>, < 0x2c>, > +< 0x2b>, < 0x2c>; > + dma-names = "tx", "rx", "tx", "rx"; > + power-domains = < R8A7792_PD_ALWAYS_ON>; > + status = "disabled"; > + }; > + > + scif3: serial@e6ea8000 { > + compatible = "renesas,scif-r8a7792", "renesas,rcar-gen2-scif", > + "renesas,scif"; > + reg = <0 0xe6ea8000 0 64>; > + interrupts = ; > + clocks = <_clks R8A7792_CLK_SCIF3>, <_clk>, > + <_clk>; > + clock-names = "fck", "brg_int", "scif_clk"; > + dmas = < 0x2f>, < 0x30>, > +< 0x2f>, < 0x30>; > + dma-names = "tx", "rx", "tx", "rx"; > + power-domains = < R8A7792_PD_ALWAYS_ON>; > + status = "disabled"; > + }; > + > + hscif0: serial@e62c { > + compatible = "renesas,hscif-r8a7792", "renesas,rcar-gen2-hscif", > + "renesas,hscif"; > + reg = <0 0xe62c 0 96>; > + interrupts = ; > + clocks = <_clks R8A7792_CLK_HSCIF0>, <_clk>, > + <_clk>; > + clock-names = "fck", "brg_int", "scif_clk"; > + dmas = < 0x39>, < 0x3a>, > +< 0x39>, < 0x3a>; > + dma-names = "tx", "rx", "tx", "rx"; > + power-domains = < R8A7792_PD_ALWAYS_ON>; > + status = "disabled"; > + }; > + > + hscif1: serial@e62c8000 { > + compatible = "renesas,hscif-r8a7792", "renesas,rcar-gen2-hscif", > + "renesas,hscif"; > + reg = <0 0xe62c8000 0 96>; > + interrupts = ; > + clocks = <_clks R8A7792_CLK_HSCIF1>, <_clk>, > + <_clk>; > + clock-names = "fck", "brg_int", "scif_clk"; > + dmas = < 0x4d>, < 0x4e>, > +< 0x4d>, < 0x4e>; > + dma-names = "tx", "rx", "tx", "rx"; > + power-domains = < R8A7792_PD_ALWAYS_ON>; > + status = "disabled"; > + }; > + > clocks { > #address-cells = <2>; > #size-cells = <2>; >
[PATCH 09/13] ARM: dts: r8a7792: add [H]SCIF support
Describe [H]SCIFs in the R8A7792 device tree. Signed-off-by: Sergei Shtylyov--- arch/arm/boot/dts/r8a7792.dtsi | 90 + 1 file changed, 90 insertions(+) Index: renesas/arch/arm/boot/dts/r8a7792.dtsi === --- renesas.orig/arch/arm/boot/dts/r8a7792.dtsi +++ renesas/arch/arm/boot/dts/r8a7792.dtsi @@ -140,6 +140,96 @@ dma-channels = <15>; }; + scif0: serial@e6e6 { + compatible = "renesas,scif-r8a7792", "renesas,rcar-gen2-scif", +"renesas,scif"; + reg = <0 0xe6e6 0 64>; + interrupts = ; + clocks = <_clks R8A7792_CLK_SCIF0>, <_clk>, +<_clk>; + clock-names = "fck", "brg_int", "scif_clk"; + dmas = < 0x29>, < 0x2a>, + < 0x29>, < 0x2a>; + dma-names = "tx", "rx", "tx", "rx"; + power-domains = < R8A7792_PD_ALWAYS_ON>; + status = "disabled"; + }; + + scif1: serial@e6e68000 { + compatible = "renesas,scif-r8a7792", "renesas,rcar-gen2-scif", +"renesas,scif"; + reg = <0 0xe6e68000 0 64>; + interrupts = ; + clocks = <_clks R8A7792_CLK_SCIF1>, <_clk>, +<_clk>; + clock-names = "fck", "brg_int", "scif_clk"; + dmas = < 0x2d>, < 0x2e>, + < 0x2d>, < 0x2e>; + dma-names = "tx", "rx", "tx", "rx"; + power-domains = < R8A7792_PD_ALWAYS_ON>; + status = "disabled"; + }; + + scif2: serial@e6e58000 { + compatible = "renesas,scif-r8a7792", "renesas,rcar-gen2-scif", +"renesas,scif"; + reg = <0 0xe6e58000 0 64>; + interrupts = ; + clocks = <_clks R8A7792_CLK_SCIF2>, <_clk>, +<_clk>; + clock-names = "fck", "brg_int", "scif_clk"; + dmas = < 0x2b>, < 0x2c>, + < 0x2b>, < 0x2c>; + dma-names = "tx", "rx", "tx", "rx"; + power-domains = < R8A7792_PD_ALWAYS_ON>; + status = "disabled"; + }; + + scif3: serial@e6ea8000 { + compatible = "renesas,scif-r8a7792", "renesas,rcar-gen2-scif", +"renesas,scif"; + reg = <0 0xe6ea8000 0 64>; + interrupts = ; + clocks = <_clks R8A7792_CLK_SCIF3>, <_clk>, +<_clk>; + clock-names = "fck", "brg_int", "scif_clk"; + dmas = < 0x2f>, < 0x30>, + < 0x2f>, < 0x30>; + dma-names = "tx", "rx", "tx", "rx"; + power-domains = < R8A7792_PD_ALWAYS_ON>; + status = "disabled"; + }; + + hscif0: serial@e62c { + compatible = "renesas,hscif-r8a7792", "renesas,rcar-gen2-hscif", +"renesas,hscif"; + reg = <0 0xe62c 0 96>; + interrupts = ; + clocks = <_clks R8A7792_CLK_HSCIF0>, <_clk>, +<_clk>; + clock-names = "fck", "brg_int", "scif_clk"; + dmas = < 0x39>, < 0x3a>, + < 0x39>, < 0x3a>; + dma-names = "tx", "rx", "tx", "rx"; + power-domains = < R8A7792_PD_ALWAYS_ON>; + status = "disabled"; + }; + + hscif1: serial@e62c8000 { + compatible = "renesas,hscif-r8a7792", "renesas,rcar-gen2-hscif", +"renesas,hscif"; + reg = <0 0xe62c8000 0 96>; + interrupts = ; + clocks = <_clks R8A7792_CLK_HSCIF1>, <_clk>, +<_clk>; + clock-names = "fck", "brg_int", "scif_clk"; + dmas = < 0x4d>, < 0x4e>, + < 0x4d>, < 0x4e>; + dma-names = "tx", "rx", "tx", "rx"; + power-domains = < R8A7792_PD_ALWAYS_ON>; + status = "disabled"; + }; + clocks { #address-cells = <2>; #size-cells = <2>;