Re: [PATCH 1/2] pinctrl: sh-pfc: r8a77990: Add SDHI pins, groups and functions

2018-11-08 Thread Geert Uytterhoeven
On Mon, Nov 5, 2018 at 10:40 PM Marek Vasut  wrote:
> From: Takeshi Kihara 
>
> This patch adds SDHI{0,1,3} pins, groups and functions to the R8A77990
> SoC.
>
> Signed-off-by: Takeshi Kihara 
> Signed-off-by: Marek Vasut 

Reviewed-by: Geert Uytterhoeven 
i.e. will queue in sh-pfc-for-v4.21.

Gr{oetje,eeting}s,

Geert

-- 
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- ge...@linux-m68k.org

In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
-- Linus Torvalds


Re: [PATCH 1/2] pinctrl: sh-pfc: r8a77990: Add SDHI pins, groups and functions

2018-11-06 Thread Marek Vasut
On 11/06/2018 12:14 PM, Wolfram Sang wrote:
> 
>>  static const struct {
>> -struct sh_pfc_pin_group common[123];
>> +struct sh_pfc_pin_group common[140];
>>  struct sh_pfc_pin_group automotive[0];
>>  } pinmux_groups = {
> 
> ...
> 
>>  static const struct {
>> -struct sh_pfc_function common[29];
>> +struct sh_pfc_function common[32];
>>  struct sh_pfc_function automotive[0];
>>  } pinmux_functions = {
> 
> 
> It is Geert's call, but maybe those are a seperate patch?

These must be part of this patch, since adding
+   SH_PFC_PIN_GROUP(sdhi0_data1),
entries grows the size of the array. If you were to split this patch,
the PFC driver would break, as the size of the array won't match the
size of the content.

-- 
Best regards,
Marek Vasut


Re: [PATCH 1/2] pinctrl: sh-pfc: r8a77990: Add SDHI pins, groups and functions

2018-11-06 Thread Wolfram Sang

>  static const struct {
> - struct sh_pfc_pin_group common[123];
> + struct sh_pfc_pin_group common[140];
>   struct sh_pfc_pin_group automotive[0];
>  } pinmux_groups = {

...

>  static const struct {
> - struct sh_pfc_function common[29];
> + struct sh_pfc_function common[32];
>   struct sh_pfc_function automotive[0];
>  } pinmux_functions = {


It is Geert's call, but maybe those are a seperate patch?



signature.asc
Description: PGP signature


RE: [PATCH 1/2] pinctrl: sh-pfc: r8a77990: Add SDHI pins, groups and functions

2018-11-05 Thread Yoshihiro Shimoda
Hello Marek-san,

> From: Marek Vasut, Sent: Tuesday, November 6, 2018 6:40 AM
> 
> From: Takeshi Kihara 
> 
> This patch adds SDHI{0,1,3} pins, groups and functions to the R8A77990
> SoC.
> 
> Signed-off-by: Takeshi Kihara 
> Signed-off-by: Marek Vasut 
> Cc: Geert Uytterhoeven 
> Cc: Simon Horman 
> Cc: Wolfram Sang 
> Cc: Yoshihiro Shimoda 
> Cc: linux-renesas-soc@vger.kernel.org
> ---

Thank you for the patch!

Reviewed-by: Yoshihiro Shimoda 

Best regards,
Yoshihiro Shimoda



[PATCH 1/2] pinctrl: sh-pfc: r8a77990: Add SDHI pins, groups and functions

2018-11-05 Thread Marek Vasut
From: Takeshi Kihara 

This patch adds SDHI{0,1,3} pins, groups and functions to the R8A77990
SoC.

Signed-off-by: Takeshi Kihara 
Signed-off-by: Marek Vasut 
Cc: Geert Uytterhoeven 
Cc: Simon Horman 
Cc: Wolfram Sang 
Cc: Yoshihiro Shimoda 
Cc: linux-renesas-soc@vger.kernel.org
---
 drivers/pinctrl/sh-pfc/pfc-r8a77990.c | 218 +-
 1 file changed, 216 insertions(+), 2 deletions(-)

diff --git a/drivers/pinctrl/sh-pfc/pfc-r8a77990.c 
b/drivers/pinctrl/sh-pfc/pfc-r8a77990.c
index 1fdafa48479c..97aba270a515 100644
--- a/drivers/pinctrl/sh-pfc/pfc-r8a77990.c
+++ b/drivers/pinctrl/sh-pfc/pfc-r8a77990.c
@@ -2386,6 +2386,174 @@ static const unsigned int scif_clk_b_mux[] = {
SCIF_CLK_B_MARK,
 };
 
+/* - SDHI0 -- 
*/
+static const unsigned int sdhi0_data1_pins[] = {
+   /* D0 */
+   RCAR_GP_PIN(3, 2),
+};
+
+static const unsigned int sdhi0_data1_mux[] = {
+   SD0_DAT0_MARK,
+};
+
+static const unsigned int sdhi0_data4_pins[] = {
+   /* D[0:3] */
+   RCAR_GP_PIN(3, 2), RCAR_GP_PIN(3, 3),
+   RCAR_GP_PIN(3, 4), RCAR_GP_PIN(3, 5),
+};
+
+static const unsigned int sdhi0_data4_mux[] = {
+   SD0_DAT0_MARK, SD0_DAT1_MARK,
+   SD0_DAT2_MARK, SD0_DAT3_MARK,
+};
+
+static const unsigned int sdhi0_ctrl_pins[] = {
+   /* CLK, CMD */
+   RCAR_GP_PIN(3, 0), RCAR_GP_PIN(3, 1),
+};
+
+static const unsigned int sdhi0_ctrl_mux[] = {
+   SD0_CLK_MARK, SD0_CMD_MARK,
+};
+
+static const unsigned int sdhi0_cd_pins[] = {
+   /* CD */
+   RCAR_GP_PIN(3, 12),
+};
+
+static const unsigned int sdhi0_cd_mux[] = {
+   SD0_CD_MARK,
+};
+
+static const unsigned int sdhi0_wp_pins[] = {
+   /* WP */
+   RCAR_GP_PIN(3, 13),
+};
+
+static const unsigned int sdhi0_wp_mux[] = {
+   SD0_WP_MARK,
+};
+
+/* - SDHI1 -- 
*/
+static const unsigned int sdhi1_data1_pins[] = {
+   /* D0 */
+   RCAR_GP_PIN(3, 8),
+};
+
+static const unsigned int sdhi1_data1_mux[] = {
+   SD1_DAT0_MARK,
+};
+
+static const unsigned int sdhi1_data4_pins[] = {
+   /* D[0:3] */
+   RCAR_GP_PIN(3, 8),  RCAR_GP_PIN(3, 9),
+   RCAR_GP_PIN(3, 10), RCAR_GP_PIN(3, 11),
+};
+
+static const unsigned int sdhi1_data4_mux[] = {
+   SD1_DAT0_MARK, SD1_DAT1_MARK,
+   SD1_DAT2_MARK, SD1_DAT3_MARK,
+};
+
+static const unsigned int sdhi1_ctrl_pins[] = {
+   /* CLK, CMD */
+   RCAR_GP_PIN(3, 6), RCAR_GP_PIN(3, 7),
+};
+
+static const unsigned int sdhi1_ctrl_mux[] = {
+   SD1_CLK_MARK, SD1_CMD_MARK,
+};
+
+static const unsigned int sdhi1_cd_pins[] = {
+   /* CD */
+   RCAR_GP_PIN(3, 14),
+};
+
+static const unsigned int sdhi1_cd_mux[] = {
+   SD1_CD_MARK,
+};
+
+static const unsigned int sdhi1_wp_pins[] = {
+   /* WP */
+   RCAR_GP_PIN(3, 15),
+};
+
+static const unsigned int sdhi1_wp_mux[] = {
+   SD1_WP_MARK,
+};
+
+/* - SDHI3 -- 
*/
+static const unsigned int sdhi3_data1_pins[] = {
+   /* D0 */
+   RCAR_GP_PIN(4, 2),
+};
+
+static const unsigned int sdhi3_data1_mux[] = {
+   SD3_DAT0_MARK,
+};
+
+static const unsigned int sdhi3_data4_pins[] = {
+   /* D[0:3] */
+   RCAR_GP_PIN(4, 2), RCAR_GP_PIN(4, 3),
+   RCAR_GP_PIN(4, 4), RCAR_GP_PIN(4, 5),
+};
+
+static const unsigned int sdhi3_data4_mux[] = {
+   SD3_DAT0_MARK, SD3_DAT1_MARK,
+   SD3_DAT2_MARK, SD3_DAT3_MARK,
+};
+
+static const unsigned int sdhi3_data8_pins[] = {
+   /* D[0:7] */
+   RCAR_GP_PIN(4, 2), RCAR_GP_PIN(4, 3),
+   RCAR_GP_PIN(4, 4), RCAR_GP_PIN(4, 5),
+   RCAR_GP_PIN(4, 6), RCAR_GP_PIN(4, 7),
+   RCAR_GP_PIN(4, 8), RCAR_GP_PIN(4, 9),
+};
+
+static const unsigned int sdhi3_data8_mux[] = {
+   SD3_DAT0_MARK, SD3_DAT1_MARK,
+   SD3_DAT2_MARK, SD3_DAT3_MARK,
+   SD3_DAT4_MARK, SD3_DAT5_MARK,
+   SD3_DAT6_MARK, SD3_DAT7_MARK,
+};
+
+static const unsigned int sdhi3_ctrl_pins[] = {
+   /* CLK, CMD */
+   RCAR_GP_PIN(4, 0), RCAR_GP_PIN(4, 1),
+};
+
+static const unsigned int sdhi3_ctrl_mux[] = {
+   SD3_CLK_MARK, SD3_CMD_MARK,
+};
+
+static const unsigned int sdhi3_cd_pins[] = {
+   /* CD */
+   RCAR_GP_PIN(3, 12),
+};
+
+static const unsigned int sdhi3_cd_mux[] = {
+   SD3_CD_MARK,
+};
+
+static const unsigned int sdhi3_wp_pins[] = {
+   /* WP */
+   RCAR_GP_PIN(3, 13),
+};
+
+static const unsigned int sdhi3_wp_mux[] = {
+   SD3_WP_MARK,
+};
+
+static const unsigned int sdhi3_ds_pins[] = {
+   /* DS */
+   RCAR_GP_PIN(4, 10),
+};
+
+static const unsigned int sdhi3_ds_mux[] = {
+   SD3_DS_MARK,
+};
+
 /* - USB0 --- 
*/
 static const unsigned int usb0_a_pins[] = {
/* PWEN, OVC */
@@ -2434,7 +2602,7 @@ static const unsigned int usb30_id_mux[] = {
 };
 
 static const struct {
-   struct