From: Chris Brandt <chris.bra...@renesas.com>

Signed-off-by: Chris Brandt <chris.bra...@renesas.com>
Reviewed-by: Geert Uytterhoeven <geert+rene...@glider.be>
Signed-off-by: Simon Horman <horms+rene...@verge.net.au>
---
 arch/arm/boot/dts/r7s72100.dtsi | 18 ++++++++++++++++++
 1 file changed, 18 insertions(+)

diff --git a/arch/arm/boot/dts/r7s72100.dtsi b/arch/arm/boot/dts/r7s72100.dtsi
index d5946df29222..74e684f3c1c7 100644
--- a/arch/arm/boot/dts/r7s72100.dtsi
+++ b/arch/arm/boot/dts/r7s72100.dtsi
@@ -505,4 +505,22 @@
                cap-sdio-irq;
                status = "disabled";
        };
+
+       ostm0: timer@fcfec000 {
+               compatible = "renesas,r7s72100-ostm", "renesas,ostm";
+               reg = <0xfcfec000 0x30>;
+               interrupts = <GIC_SPI 102 IRQ_TYPE_EDGE_RISING>;
+               clocks = <&mstp5_clks R7S72100_CLK_OSTM0>;
+               power-domains = <&cpg_clocks>;
+               status = "disabled";
+       };
+
+       ostm1: timer@fcfec400 {
+               compatible = "renesas,r7s72100-ostm", "renesas,ostm";
+               reg = <0xfcfec400 0x30>;
+               interrupts = <GIC_SPI 103 IRQ_TYPE_EDGE_RISING>;
+               clocks = <&mstp5_clks R7S72100_CLK_OSTM1>;
+               power-domains = <&cpg_clocks>;
+               status = "disabled";
+       };
 };
-- 
2.7.0.rc3.207.g0ac5344

Reply via email to