RE: [PATCH 3/4] ARM: dts: r8a77470: Add QSPI support
Hi Geert,
Thank you for your feedback!
> Subject: Re: [PATCH 3/4] ARM: dts: r8a77470: Add QSPI support
>
> Hi Fabrizio,
>
> On Thu, Nov 8, 2018 at 11:31 AM Fabrizio Castro
> wrote:
> > > On Thu, Nov 8, 2018 at 11:22 AM Fabrizio Castro
> > > wrote:
> > > > > From: Simon Horman
> > > > > Sent: 02 November 2018 11:50
> > > > > Subject: Re: [PATCH 3/4] ARM: dts: r8a77470: Add QSPI support
> > > > >
> > > > > On Thu, Nov 01, 2018 at 12:35:04PM +, Fabrizio Castro wrote:
> > > > > > Add QSPI[01] support to the RZ/G1C SoC specific device tree.
> > > > > >
> > > > > > Signed-off-by: Fabrizio Castro
> > > > > > ---
> > > > > > arch/arm/boot/dts/r8a77470.dtsi | 34
> > > > > > ++
> > > > > > 1 file changed, 34 insertions(+)
> > > > > >
> > > > > > diff --git a/arch/arm/boot/dts/r8a77470.dtsi
> > > > > > b/arch/arm/boot/dts/r8a77470.dtsi
> > > > > > index e6407e5..04a8877 100644
> > > > > > --- a/arch/arm/boot/dts/r8a77470.dtsi
> > > > > > +++ b/arch/arm/boot/dts/r8a77470.dtsi
> > > > > > @@ -20,6 +20,8 @@
> > > > > > i2c2 =
> > > > > > i2c3 =
> > > > > > i2c4 =
> > > > > > +spi0 =
> > > > > > +spi1 =
> > > > > > };
> > > > >
> > > > > Geert can comment but I believe we are moving away from using aliases
> > > > > in this way and that it would be best if the above hunk was dropped
> > > > > from this patch.
> > > > >
> > > > > https://patchwork.kernel.org/patch/10644159/
> > > >
> > > > Geert, what do you want me to do here?
> > >
> > > Please drop the aliases. Thanks!
> >
> > Will do, will send a new version without the additional aliases.
>
> Thanks!
>
> > My understanding is that your personal preference is to only leave debug
> > console and ethernet,
>
> Labeled serial ports and primary Ethernet, so U-Boot knows which MAC address
> property to update.
>
> > shall I also get rid of what was already upstreamed for RZ/G related
> > boards that is not in line
> > with the new policy?
>
> I believe these are all serial ports, using aliases that match the documented
> and/or labeled port names? So they don't have to be removed.
We have also been using aliases for i2c, spi (like in this case), vin, etc.,
for all of the RZ/G boards,
shall I get rid of those?
Cheers,
Fab
>
> Gr{oetje,eeting}s,
>
> Geert
>
> --
> Geert Uytterhoeven -- There's lots of Linux beyond ia32 --
> ge...@linux-m68k.org
>
> In personal conversations with technical people, I call myself a hacker. But
> when I'm talking to journalists I just say "programmer" or something like
> that.
> -- Linus Torvalds
Renesas Electronics Europe Ltd, Dukes Meadow, Millboard Road, Bourne End,
Buckinghamshire, SL8 5FH, UK. Registered in England & Wales under Registered
No. 04586709.
Re: [PATCH 3/4] ARM: dts: r8a77470: Add QSPI support
Hi Fabrizio,
On Thu, Nov 8, 2018 at 11:31 AM Fabrizio Castro
wrote:
> > On Thu, Nov 8, 2018 at 11:22 AM Fabrizio Castro
> > wrote:
> > > > From: Simon Horman
> > > > Sent: 02 November 2018 11:50
> > > > Subject: Re: [PATCH 3/4] ARM: dts: r8a77470: Add QSPI support
> > > >
> > > > On Thu, Nov 01, 2018 at 12:35:04PM +, Fabrizio Castro wrote:
> > > > > Add QSPI[01] support to the RZ/G1C SoC specific device tree.
> > > > >
> > > > > Signed-off-by: Fabrizio Castro
> > > > > ---
> > > > > arch/arm/boot/dts/r8a77470.dtsi | 34
> > > > > ++
> > > > > 1 file changed, 34 insertions(+)
> > > > >
> > > > > diff --git a/arch/arm/boot/dts/r8a77470.dtsi
> > > > > b/arch/arm/boot/dts/r8a77470.dtsi
> > > > > index e6407e5..04a8877 100644
> > > > > --- a/arch/arm/boot/dts/r8a77470.dtsi
> > > > > +++ b/arch/arm/boot/dts/r8a77470.dtsi
> > > > > @@ -20,6 +20,8 @@
> > > > > i2c2 =
> > > > > i2c3 =
> > > > > i2c4 =
> > > > > +spi0 =
> > > > > +spi1 =
> > > > > };
> > > >
> > > > Geert can comment but I believe we are moving away from using aliases
> > > > in this way and that it would be best if the above hunk was dropped
> > > > from this patch.
> > > >
> > > > https://patchwork.kernel.org/patch/10644159/
> > >
> > > Geert, what do you want me to do here?
> >
> > Please drop the aliases. Thanks!
>
> Will do, will send a new version without the additional aliases.
Thanks!
> My understanding is that your personal preference is to only leave debug
> console and ethernet,
Labeled serial ports and primary Ethernet, so U-Boot knows which MAC address
property to update.
> shall I also get rid of what was already upstreamed for RZ/G related boards
> that is not in line
> with the new policy?
I believe these are all serial ports, using aliases that match the documented
and/or labeled port names? So they don't have to be removed.
Gr{oetje,eeting}s,
Geert
--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- ge...@linux-m68k.org
In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
-- Linus Torvalds
RE: [PATCH 3/4] ARM: dts: r8a77470: Add QSPI support
Hello Geert,
Thank you for your feedback!
> Subject: Re: [PATCH 3/4] ARM: dts: r8a77470: Add QSPI support
>
> Hi Fabrizio,
>
> On Thu, Nov 8, 2018 at 11:22 AM Fabrizio Castro
> wrote:
> > > From: Simon Horman
> > > Sent: 02 November 2018 11:50
> > > Subject: Re: [PATCH 3/4] ARM: dts: r8a77470: Add QSPI support
> > >
> > > On Thu, Nov 01, 2018 at 12:35:04PM +, Fabrizio Castro wrote:
> > > > Add QSPI[01] support to the RZ/G1C SoC specific device tree.
> > > >
> > > > Signed-off-by: Fabrizio Castro
> > > > ---
> > > > arch/arm/boot/dts/r8a77470.dtsi | 34 ++
> > > > 1 file changed, 34 insertions(+)
> > > >
> > > > diff --git a/arch/arm/boot/dts/r8a77470.dtsi
> > > > b/arch/arm/boot/dts/r8a77470.dtsi
> > > > index e6407e5..04a8877 100644
> > > > --- a/arch/arm/boot/dts/r8a77470.dtsi
> > > > +++ b/arch/arm/boot/dts/r8a77470.dtsi
> > > > @@ -20,6 +20,8 @@
> > > > i2c2 =
> > > > i2c3 =
> > > > i2c4 =
> > > > +spi0 =
> > > > +spi1 =
> > > > };
> > >
> > > Geert can comment but I believe we are moving away from using aliases
> > > in this way and that it would be best if the above hunk was dropped
> > > from this patch.
> > >
> > > https://patchwork.kernel.org/patch/10644159/
> >
> > Geert, what do you want me to do here?
>
> Please drop the aliases. Thanks!
Will do, will send a new version without the additional aliases.
My understanding is that your personal preference is to only leave debug
console and ethernet,
shall I also get rid of what was already upstreamed for RZ/G related boards
that is not in line
with the new policy?
Thanks,
Fab
>
> Gr{oetje,eeting}s,
>
> Geert
>
> --
> Geert Uytterhoeven -- There's lots of Linux beyond ia32 --
> ge...@linux-m68k.org
>
> In personal conversations with technical people, I call myself a hacker. But
> when I'm talking to journalists I just say "programmer" or something like
> that.
> -- Linus Torvalds
Renesas Electronics Europe Ltd, Dukes Meadow, Millboard Road, Bourne End,
Buckinghamshire, SL8 5FH, UK. Registered in England & Wales under Registered
No. 04586709.
Re: [PATCH 3/4] ARM: dts: r8a77470: Add QSPI support
Hi Fabrizio,
On Thu, Nov 8, 2018 at 11:22 AM Fabrizio Castro
wrote:
> > From: Simon Horman
> > Sent: 02 November 2018 11:50
> > Subject: Re: [PATCH 3/4] ARM: dts: r8a77470: Add QSPI support
> >
> > On Thu, Nov 01, 2018 at 12:35:04PM +, Fabrizio Castro wrote:
> > > Add QSPI[01] support to the RZ/G1C SoC specific device tree.
> > >
> > > Signed-off-by: Fabrizio Castro
> > > ---
> > > arch/arm/boot/dts/r8a77470.dtsi | 34 ++
> > > 1 file changed, 34 insertions(+)
> > >
> > > diff --git a/arch/arm/boot/dts/r8a77470.dtsi
> > > b/arch/arm/boot/dts/r8a77470.dtsi
> > > index e6407e5..04a8877 100644
> > > --- a/arch/arm/boot/dts/r8a77470.dtsi
> > > +++ b/arch/arm/boot/dts/r8a77470.dtsi
> > > @@ -20,6 +20,8 @@
> > > i2c2 =
> > > i2c3 =
> > > i2c4 =
> > > +spi0 =
> > > +spi1 =
> > > };
> >
> > Geert can comment but I believe we are moving away from using aliases
> > in this way and that it would be best if the above hunk was dropped
> > from this patch.
> >
> > https://patchwork.kernel.org/patch/10644159/
>
> Geert, what do you want me to do here?
Please drop the aliases. Thanks!
Gr{oetje,eeting}s,
Geert
--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- ge...@linux-m68k.org
In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
-- Linus Torvalds
RE: [PATCH 3/4] ARM: dts: r8a77470: Add QSPI support
Hello Simon,
Thank you for your feedback!
> From: Simon Horman
> Sent: 02 November 2018 11:50
> Subject: Re: [PATCH 3/4] ARM: dts: r8a77470: Add QSPI support
>
> On Thu, Nov 01, 2018 at 12:35:04PM +, Fabrizio Castro wrote:
> > Add QSPI[01] support to the RZ/G1C SoC specific device tree.
> >
> > Signed-off-by: Fabrizio Castro
> > ---
> > arch/arm/boot/dts/r8a77470.dtsi | 34 ++
> > 1 file changed, 34 insertions(+)
> >
> > diff --git a/arch/arm/boot/dts/r8a77470.dtsi
> > b/arch/arm/boot/dts/r8a77470.dtsi
> > index e6407e5..04a8877 100644
> > --- a/arch/arm/boot/dts/r8a77470.dtsi
> > +++ b/arch/arm/boot/dts/r8a77470.dtsi
> > @@ -20,6 +20,8 @@
> > i2c2 =
> > i2c3 =
> > i2c4 =
> > +spi0 =
> > +spi1 =
> > };
>
> Geert can comment but I believe we are moving away from using aliases
> in this way and that it would be best if the above hunk was dropped
> from this patch.
>
> https://patchwork.kernel.org/patch/10644159/
Geert, what do you want me to do here?
Thanks,
Fab
>
> The rest of the patch looks fine to me.
>
> >
> > cpus {
> > @@ -460,6 +462,38 @@
> > status = "disabled";
> > };
> >
> > +qspi0: spi@e6b1 {
> > +compatible = "renesas,qspi-r8a77470", "renesas,qspi";
> > +reg = <0 0xe6b1 0 0x2c>;
> > +interrupts = ;
> > +clocks = < CPG_MOD 918>;
> > +dmas = < 0x17>, < 0x18>,
> > + < 0x17>, < 0x18>;
> > +dma-names = "tx", "rx", "tx", "rx";
> > +power-domains = < R8A77470_PD_ALWAYS_ON>;
> > +num-cs = <1>;
> > +#address-cells = <1>;
> > +#size-cells = <0>;
> > +resets = < 918>;
> > +status = "disabled";
> > +};
> > +
> > +qspi1: spi@ee20 {
> > +compatible = "renesas,qspi-r8a77470", "renesas,qspi";
> > +reg = <0 0xee20 0 0x2c>;
> > +interrupts = ;
> > +clocks = < CPG_MOD 917>;
> > +dmas = < 0xd1>, < 0xd2>,
> > + < 0xd1>, < 0xd2>;
> > +dma-names = "tx", "rx", "tx", "rx";
> > +power-domains = < R8A77470_PD_ALWAYS_ON>;
> > +num-cs = <1>;
> > +#address-cells = <1>;
> > +#size-cells = <0>;
> > +resets = < 917>;
> > +status = "disabled";
> > +};
> > +
> > scif0: serial@e6e6 {
> > compatible = "renesas,scif-r8a77470",
> > "renesas,rcar-gen2-scif", "renesas,scif";
> > --
> > 2.7.4
> >
Renesas Electronics Europe Ltd, Dukes Meadow, Millboard Road, Bourne End,
Buckinghamshire, SL8 5FH, UK. Registered in England & Wales under Registered
No. 04586709.
Re: [PATCH 3/4] ARM: dts: r8a77470: Add QSPI support
On Thu, Nov 01, 2018 at 12:35:04PM +, Fabrizio Castro wrote:
> Add QSPI[01] support to the RZ/G1C SoC specific device tree.
>
> Signed-off-by: Fabrizio Castro
> ---
> arch/arm/boot/dts/r8a77470.dtsi | 34 ++
> 1 file changed, 34 insertions(+)
>
> diff --git a/arch/arm/boot/dts/r8a77470.dtsi b/arch/arm/boot/dts/r8a77470.dtsi
> index e6407e5..04a8877 100644
> --- a/arch/arm/boot/dts/r8a77470.dtsi
> +++ b/arch/arm/boot/dts/r8a77470.dtsi
> @@ -20,6 +20,8 @@
> i2c2 =
> i2c3 =
> i2c4 =
> + spi0 =
> + spi1 =
> };
Geert can comment but I believe we are moving away from using aliases
in this way and that it would be best if the above hunk was dropped
from this patch.
https://patchwork.kernel.org/patch/10644159/
The rest of the patch looks fine to me.
>
> cpus {
> @@ -460,6 +462,38 @@
> status = "disabled";
> };
>
> + qspi0: spi@e6b1 {
> + compatible = "renesas,qspi-r8a77470", "renesas,qspi";
> + reg = <0 0xe6b1 0 0x2c>;
> + interrupts = ;
> + clocks = < CPG_MOD 918>;
> + dmas = < 0x17>, < 0x18>,
> +< 0x17>, < 0x18>;
> + dma-names = "tx", "rx", "tx", "rx";
> + power-domains = < R8A77470_PD_ALWAYS_ON>;
> + num-cs = <1>;
> + #address-cells = <1>;
> + #size-cells = <0>;
> + resets = < 918>;
> + status = "disabled";
> + };
> +
> + qspi1: spi@ee20 {
> + compatible = "renesas,qspi-r8a77470", "renesas,qspi";
> + reg = <0 0xee20 0 0x2c>;
> + interrupts = ;
> + clocks = < CPG_MOD 917>;
> + dmas = < 0xd1>, < 0xd2>,
> +< 0xd1>, < 0xd2>;
> + dma-names = "tx", "rx", "tx", "rx";
> + power-domains = < R8A77470_PD_ALWAYS_ON>;
> + num-cs = <1>;
> + #address-cells = <1>;
> + #size-cells = <0>;
> + resets = < 917>;
> + status = "disabled";
> + };
> +
> scif0: serial@e6e6 {
> compatible = "renesas,scif-r8a77470",
>"renesas,rcar-gen2-scif", "renesas,scif";
> --
> 2.7.4
>
