[PATCH 2.6.24-rt1] SMC91x: Use special_lock when CONFIG_PREEMPT_[HARD|SOFT]IRQS
The smc_special_locks should also be used when either softIRQs or hard IRQs are preempted which may lead to the same problems as under SMP. Signed-off-by: Kevin Hilman [EMAIL PROTECTED] --- drivers/net/smc91x.c |3 ++- 1 files changed, 2 insertions(+), 1 deletions(-) diff --git a/drivers/net/smc91x.c b/drivers/net/smc91x.c index f198c49..be62616 100644 --- a/drivers/net/smc91x.c +++ b/drivers/net/smc91x.c @@ -530,7 +530,8 @@ static inline void smc_rcv(struct net_device *dev) } } -#ifdef CONFIG_SMP +#if defined(CONFIG_SMP) || \ +defined(CONFIG_PREEMPT_SOFTIRQS) || defined(CONFIG_PREEMPT_HARDIRQS) /* * On SMP we have the following problem: * -- 1.5.4 - To unsubscribe from this list: send the line unsubscribe linux-rt-users in the body of a message to [EMAIL PROTECTED] More majordomo info at http://vger.kernel.org/majordomo-info.html
Re: Use the RT Latency Trace? - LET ME KNOW!
Steven Rostedt [EMAIL PROTECTED] writes: I'm about to gut the RT latency tracer with the version I'm pushing upstream. This will be some of the changes: Might I request that you follow the mainline stabilization model and wait until the 2.6.25-rcX-rtY series to make a significant change like this? I have nothing against your changes, but am not crazy about seeing something like this happen in the stable part of the dev cycle. Thanks, Kevin - To unsubscribe from this list: send the line unsubscribe linux-rt-users in the body of a message to [EMAIL PROTECTED] More majordomo info at http://vger.kernel.org/majordomo-info.html
Generic IRQs: proper edge/level via irq_chip-set_type hook
I'm trying to cleanup/remove the use of handle_simple_irq in the OMAP
GPIO IRQ handling.
Currently, the OMAP GPIO demux handler uses handle_simple_irq for all
the GPIOs whether they are edge or level. The result is duplicated
logic with handle_[edge|level]_irq as well as things not working
correctly for threaded interrupts with the -rt patch.
Currently, upon init, the handlers for all GPIO IRQs are initialized
to handle_simple_irq. This is fine, since before the interrupts are
registered via request_irq or setup_irq, we don't know if they are
edge or level.
When request_irq or setup_irq are called, the type of interrupt (edge
or level) is known and the 'set_type' hook of the irq_chip is called
to set the triggering accordingly. It seems to me this is also the
appropriate place to change the handler from handle_simple_irq to
handle_[edge|level]_irq via a call to set_irq_handler().
The problem is that when the 'set_type' hook is called the
irq_desc-lock is held by setup_irq(), so a call to set_irq_handler()
dies with a recursive lock.
The hack below allows me to get the above idea working, but I'm
looking for better suggestions on how to rework the locking here so
that the handler might be changed from within the irq_chip's set_type
handler.
Any ideas?
Kevin
--- a/kernel/irq/manage.c
+++ b/kernel/irq/manage.c
@@ -369,10 +369,12 @@ int setup_irq(unsigned int irq, struct irqaction *new)
/* Setup the type (level, edge polarity) if configured: */
if (new-flags IRQF_TRIGGER_MASK) {
- if (desc-chip desc-chip-set_type)
+ if (desc-chip desc-chip-set_type) {
+ spin_unlock(desc-lock);
desc-chip-set_type(irq,
new-flags IRQF_TRIGGER_MASK);
- else
+ spin_lock(desc-lock);
+ } else
/*
* IRQF_TRIGGER_* but the PIC does not support
* multiple flow-types?
-
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[PATCH] ARM: OMAP: Fix GPIO IRQ unmask
GPIO IRQ unmask doesn't actually do anything useful. The problem is
hidden by a separate explicit mass unmask at the end of the chained
bank handler.
Signed-off-by: Kevin Hilman [EMAIL PROTECTED]
---
arch/arm/plat-omap/gpio.c |3 +--
1 files changed, 1 insertions(+), 2 deletions(-)
diff --git a/arch/arm/plat-omap/gpio.c b/arch/arm/plat-omap/gpio.c
index 1640a37..f5a1ee5 100644
--- a/arch/arm/plat-omap/gpio.c
+++ b/arch/arm/plat-omap/gpio.c
@@ -1145,10 +1145,9 @@ static void gpio_mask_irq(unsigned int irq)
static void gpio_unmask_irq(unsigned int irq)
{
unsigned int gpio = irq - IH_GPIO_BASE;
- unsigned int gpio_idx = get_gpio_index(gpio);
struct gpio_bank *bank = get_irq_chip_data(irq);
- _set_gpio_irqenable(bank, gpio_idx, 1);
+ _set_gpio_irqenable(bank, gpio, 1);
}
static struct irq_chip gpio_irq_chip = {
--
1.5.3.5
-
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[PATCH] ARM: OMAP: Clear level-triggered GPIO interrupts in unmask hook
The clearing was moved to the unmask hook because it is known to run
after the interrupt handler has actually run. Before this patch, if
interrupts were threaded, the clearing/unmasking of level triggered
interrupts could be done before the threaded handler actually ran.
Signed-off-by: Kevin Hilman [EMAIL PROTECTED]
---
arch/arm/plat-omap/gpio.c | 28 ++--
1 files changed, 14 insertions(+), 14 deletions(-)
diff --git a/arch/arm/plat-omap/gpio.c b/arch/arm/plat-omap/gpio.c
index f5a1ee5..09fcd30 100644
--- a/arch/arm/plat-omap/gpio.c
+++ b/arch/arm/plat-omap/gpio.c
@@ -150,6 +150,7 @@ struct gpio_bank {
u32 saved_fallingdetect;
u32 saved_risingdetect;
#endif
+ u32 level_mask;
spinlock_t lock;
};
@@ -519,6 +520,10 @@ static inline void set_24xx_gpio_triggering(struct
gpio_bank *bank, int gpio, in
else
bank-enabled_non_wakeup_gpios = ~gpio_bit;
}
+
+ bank-level_mask =
+ __raw_readl(bank-base + OMAP24XX_GPIO_LEVELDETECT0) |
+ __raw_readl(bank-base + OMAP24XX_GPIO_LEVELDETECT1);
/* FIXME: Possibly do 'set_irq_handler(j, handle_level_irq)' if only
level
* triggering requested. */
}
@@ -1033,12 +1038,7 @@ static void gpio_irq_handler(unsigned int irq, struct
irq_desc *desc)
isr = 0x;
if (cpu_class_is_omap2()) {
- level_mask =
- __raw_readl(bank-base +
- OMAP24XX_GPIO_LEVELDETECT0) |
- __raw_readl(bank-base +
- OMAP24XX_GPIO_LEVELDETECT1);
- level_mask = enabled;
+ level_mask = bank-level_mask enabled;
}
/* clear edge sensitive interrupts before handler(s) are
@@ -1100,14 +1100,6 @@ static void gpio_irq_handler(unsigned int irq, struct
irq_desc *desc)
retrigger |= irq_mask;
}
}
-
- if (cpu_class_is_omap2()) {
- /* clear level sensitive interrupts after handler(s) */
- _enable_gpio_irqbank(bank, isr_saved level_mask, 0);
- _clear_gpio_irqbank(bank, isr_saved level_mask);
- _enable_gpio_irqbank(bank, isr_saved level_mask, 1);
- }
-
}
/* if bank has any level sensitive GPIO pin interrupt
configured, we must unmask the bank interrupt only after
@@ -1146,7 +1138,15 @@ static void gpio_unmask_irq(unsigned int irq)
{
unsigned int gpio = irq - IH_GPIO_BASE;
struct gpio_bank *bank = get_irq_chip_data(irq);
+ unsigned int irq_mask = 1 get_gpio_index(gpio);
+ /* For level-triggered GPIOs, the clearing must be done after
+* the HW source is cleared, thus after the handler has run */
+ if (bank-level_mask irq_mask) {
+ _set_gpio_irqenable(bank, gpio, 0);
+ _clear_gpio_irqstatus(bank, gpio);
+ }
+
_set_gpio_irqenable(bank, gpio, 1);
}
--
1.5.3.5
-
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[PATCH] Generic IRQ: Add unlocked version of set_irq_handler()
Add unlocked version for use by irq_chip.set_type handlers which may
wish to change handler to level or edge handler when IRQ type is
changed.
The normal set_irq_handler() call cannot be used because it tries to
take irq_desc.lock which is already held when the irq_chip.set_type
hook is called.
Signed-off-by: Kevin Hilman [EMAIL PROTECTED]
---
include/linux/irq.h |7 +++
1 files changed, 7 insertions(+), 0 deletions(-)
diff --git a/include/linux/irq.h b/include/linux/irq.h
index 879ab83..2465709 100644
--- a/include/linux/irq.h
+++ b/include/linux/irq.h
@@ -347,6 +347,13 @@ extern void
__set_irq_handler(unsigned int irq, irq_flow_handler_t handle, int is_chained,
const char *name);
+/* caller has locked the irq_desc and both params are valid */
+static inline void __set_irq_handler_unlocked(int irq,
+ irq_flow_handler_t handler)
+{
+ irq_desc[irq].handle_irq = handler;
+}
+
/*
* Set a highlevel flow handler for a given IRQ:
*/
--
1.5.3.5
-
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[PATCH] ARM: OMAP: use edge/level handlers from generic IRQ framework
Currently, the GPIO interrupt handling is duplicating some of the work
done by the generic IRQ handlers (handle_edge_irq, handle_level_irq)
such as detecting nesting, handling re-triggers etc. Remove this
duplication and use generic hooks based on IRQ type.
Using generic IRQ handlers ensures correct behavior when using
threaded interrupts introduced by the -rt patch.
Signed-off-by: Kevin Hilman [EMAIL PROTECTED]
---
arch/arm/plat-omap/gpio.c | 40 +++-
1 files changed, 7 insertions(+), 33 deletions(-)
diff --git a/arch/arm/plat-omap/gpio.c b/arch/arm/plat-omap/gpio.c
index 09fcd30..c55ad11 100644
--- a/arch/arm/plat-omap/gpio.c
+++ b/arch/arm/plat-omap/gpio.c
@@ -524,8 +524,6 @@ static inline void set_24xx_gpio_triggering(struct
gpio_bank *bank, int gpio, in
bank-level_mask =
__raw_readl(bank-base + OMAP24XX_GPIO_LEVELDETECT0) |
__raw_readl(bank-base + OMAP24XX_GPIO_LEVELDETECT1);
- /* FIXME: Possibly do 'set_irq_handler(j, handle_level_irq)' if only
level
-* triggering requested. */
}
void
@@ -672,6 +670,12 @@ static int gpio_irq_type(unsigned irq, unsigned type)
irq_desc[irq].status |= type;
}
spin_unlock(bank-lock);
+
+ if (type (IRQ_TYPE_LEVEL_LOW | IRQ_TYPE_LEVEL_HIGH))
+ __set_irq_handler_unlocked(irq, handle_level_irq);
+ else if (type (IRQ_TYPE_EDGE_FALLING | IRQ_TYPE_EDGE_RISING))
+ __set_irq_handler_unlocked(irq, handle_edge_irq);
+
return retval;
}
@@ -1063,42 +1067,12 @@ static void gpio_irq_handler(unsigned int irq, struct
irq_desc *desc)
gpio_irq = bank-virtual_irq_start;
for (; isr != 0; isr = 1, gpio_irq++) {
struct irq_desc *d;
- int irq_mask;
+
if (!(isr 1))
continue;
d = irq_desc + gpio_irq;
- /* Don't run the handler if it's already running
-* or was disabled lazely.
-*/
- if (unlikely((d-depth ||
- (d-status IRQ_INPROGRESS {
- irq_mask = 1
- (gpio_irq - bank-virtual_irq_start);
- /* The unmasking will be done by
-* enable_irq in case it is disabled or
-* after returning from the handler if
-* it's already running.
-*/
- _enable_gpio_irqbank(bank, irq_mask, 0);
- if (!d-depth) {
- /* Level triggered interrupts
-* won't ever be reentered
-*/
- BUG_ON(level_mask irq_mask);
- d-status |= IRQ_PENDING;
- }
- continue;
- }
desc_handle_irq(gpio_irq, d);
-
- if (unlikely((d-status IRQ_PENDING) !d-depth)) {
- irq_mask = 1
- (gpio_irq - bank-virtual_irq_start);
- d-status = ~IRQ_PENDING;
- _enable_gpio_irqbank(bank, irq_mask, 1);
- retrigger |= irq_mask;
- }
}
}
/* if bank has any level sensitive GPIO pin interrupt
--
1.5.3.5
-
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[PATCH -rt] ARM: compile fix for event tracing
The cycles/usecs conversion macros should be dependent on CONFIG_EVENT_TRACE instead of CONFIG_LATENCY_TIMING. Signed-off-by: Kevin Hilman [EMAIL PROTECTED] --- a/include/asm-arm/timex.h +++ b/include/asm-arm/timex.h @@ -18,7 +18,7 @@ typedef unsigned long cycles_t; #ifndef mach_read_cycles #define mach_read_cycles() (0) -#ifdef CONFIG_LATENCY_TIMING +#ifdef CONFIG_EVENT_TRACE #define mach_cycles_to_usecs(d) (d) #define mach_usecs_to_cycles(d) (d) #endif - To unsubscribe from this list: send the line unsubscribe linux-rt-users in the body of a message to [EMAIL PROTECTED] More majordomo info at http://vger.kernel.org/majordomo-info.html
[PATCH 2.6.23-rc2-rt2] call IRQ-chip's end hook in thread_simple_irq()
When using the 'simple' handler as a chained handler, the end hook should be called so the chained handler can properly ack/unmask etc. after the threaded handler has completed. In particular, the chained GPIO IRQ hander on OMAP uses the 'simple' handler since the GPIO IRQs can be dynamically configured either as edge or level. When using threaded IRQs, the only way to know when the handler is done and do the proper ack/unmask is via the end hook. Signed-off-by: Kevin Hilman [EMAIL PROTECTED] --- linux-2.6.21.orig/kernel/irq/manage.c +++ linux-2.6.21/kernel/irq/manage.c @@ -637,6 +637,8 @@ static void thread_simple_irq(irq_desc_t note_interrupt(irq, desc, action_ret); } desc-status = ~IRQ_INPROGRESS; + if (desc-chip-end) + desc-chip-end(irq); } /* -- - To unsubscribe from this list: send the line unsubscribe linux-rt-users in the body of a message to [EMAIL PROTECTED] More majordomo info at http://vger.kernel.org/majordomo-info.html
[PATCH 2.6.23-rc2-rt2] ARM: use raw lock in __new_context
The ARM CPU ASID lock should be raw as it's used by schedule() when creating a new context. Signed-off-by: Kevin Hilman [EMAIL PROTECTED] --- dev.orig/arch/arm/mm/context.c +++ dev/arch/arm/mm/context.c @@ -14,7 +14,7 @@ #include asm/mmu_context.h #include asm/tlbflush.h -static DEFINE_SPINLOCK(cpu_asid_lock); +static DEFINE_RAW_SPINLOCK(cpu_asid_lock); unsigned int cpu_last_asid = ASID_FIRST_VERSION; /* -- - To unsubscribe from this list: send the line unsubscribe linux-rt-users in the body of a message to [EMAIL PROTECTED] More majordomo info at http://vger.kernel.org/majordomo-info.html
[PATCH 2.6.23-rc2-rt2] misc. compile fixes for UP builds
Signed-off-by: Kevin Hilman [EMAIL PROTECTED]
---
include/linux/percpu_list.h |2 +-
include/linux/smp.h |3 ++-
2 files changed, 3 insertions(+), 2 deletions(-)
Index: dev/include/linux/percpu_list.h
===
--- dev.orig/include/linux/percpu_list.h
+++ dev/include/linux/percpu_list.h
@@ -84,7 +84,7 @@ void percpu_list_fold(struct percpu_list
struct percpu_list {
struct lock_list_head list;
-}
+};
static inline
void percpu_list_init(struct percpu_list *pcl)
Index: dev/include/linux/smp.h
===
--- dev.orig/include/linux/smp.h
+++ dev/include/linux/smp.h
@@ -7,6 +7,7 @@
*/
#include linux/errno.h
+#include linux/cpumask.h
extern void cpu_idle(void);
@@ -116,7 +117,7 @@ static inline int up_smp_call_function(v
})
static inline void smp_send_reschedule(int cpu) { }
static inline void smp_send_reschedule_allbutself(void) { }
-static inline void smp_send_reschedule_allbutself_cpumask(cpumask_t) { }
+static inline void smp_send_reschedule_allbutself_cpumask(cpumask_t mask) { }
#define num_booting_cpus() 1
#define smp_prepare_boot_cpu() do {} while (0)
#define smp_call_function_single(cpuid, func, info, retry, wait) \
--
-
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Re: v2.6.22.1-rt3
Thomas, In arm-preempt-config.patch, the GENERIC_TIME is removed from the OMAP arch. Can you undo that removal?OMAP is still GENERIC_TIME capable unless something has been done to break it. In other words, on top of -rt3: Index: linux-2.6/arch/arm/Kconfig === --- linux-2.6.orig/arch/arm/Kconfig +++ linux-2.6/arch/arm/Kconfig @@ -394,6 +394,7 @@ config ARCH_DAVINCI config ARCH_OMAP bool TI OMAP select GENERIC_GPIO + select GENERIC_TIME help Support for TI's OMAP platform (OMAP1 and OMAP2). Signed-off-by: Kevin Hilman [EMAIL PROTECTED] - To unsubscribe from this list: send the line unsubscribe linux-rt-users in the body of a message to [EMAIL PROTECTED] More majordomo info at http://vger.kernel.org/majordomo-info.html
Re: v2.6.22.1-rt3
Thomas, A typo in preempt-irqs-core.patch, where IRQF_TIMER is changed to _IRQF_TIMER but called later as __IRQF_TIMER. Here's a patch to compile, but not sure if you want one or two underscores. With these two paches, -rt3 is building/booting for ARM/OMAP1. Kevin Index: linux-2.6/include/linux/interrupt.h === --- linux-2.6.orig/include/linux/interrupt.h +++ linux-2.6/include/linux/interrupt.h @@ -52,7 +52,7 @@ #define IRQF_SAMPLE_RANDOM 0x0040 #define IRQF_SHARED0x0080 #define IRQF_PROBE_SHARED 0x0100 -#define _IRQF_TIMER0x0200 +#define __IRQF_TIMER 0x0200 #define IRQF_PERCPU0x0400 #define IRQF_NOBALANCING 0x0800 #define IRQF_IRQPOLL 0x1000 - To unsubscribe from this list: send the line unsubscribe linux-rt-users in the body of a message to [EMAIL PROTECTED] More majordomo info at http://vger.kernel.org/majordomo-info.html
[PATCH -rt 5/6] ARM: Fix save_stack_trace() prototype
Signed-off-by: Kevin Hilman [EMAIL PROTECTED]
---
arch/arm/lib/stacktrace.c |2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
Index: linux-2.6/arch/arm/lib/stacktrace.c
===
--- linux-2.6.orig/arch/arm/lib/stacktrace.c
+++ linux-2.6/arch/arm/lib/stacktrace.c
@@ -1,7 +1,7 @@
#include linux/sched.h
#include linux/stacktrace.h
-void save_stack_trace(struct stack_trace *trace, struct task_struct *task)
+void save_stack_trace(struct stack_trace *trace)
{
}
--
-
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[PATCH -rt 3/6] Compile fix for PREEMPT_TIMING on and TRACE_IRQFLAGS off
Fix compile of latency_trace.c in the case where CRITICAL_PREEMPT_TIMING=y and TRACE_IRQFLAGS=n (because DEBUG_KERNEL is disabled) Signed-off-by: Kevin Hilman [EMAIL PROTECTED] --- kernel/latency_trace.c |2 +- 1 file changed, 1 insertion(+), 1 deletion(-) Index: linux-2.6.21/kernel/latency_trace.c === --- linux-2.6.21.orig/kernel/latency_trace.c +++ linux-2.6.21/kernel/latency_trace.c @@ -2151,7 +2151,7 @@ void notrace unmask_preempt_count(unsign } EXPORT_SYMBOL(unmask_preempt_count); -#ifdef CONFIG_CRITICAL_PREEMPT_TIMING +#if defined(CONFIG_CRITICAL_PREEMPT_TIMING) defined(CONFIG_TRACE_IRQFLAGS) /* Some archs do their cpu_idle with preemption on. Don't measure it */ void notrace trace_preempt_enter_idle(void) -- - To unsubscribe from this list: send the line unsubscribe linux-rt-users in the body of a message to [EMAIL PROTECTED] More majordomo info at http://vger.kernel.org/majordomo-info.html
