[PATCH] cpufreq: exynos: Show list of available frequencies
Add freq_attr attribute to show list of available frequencies.
Signed-off-by: Donggeun Kim dg77@samsung.com
Signed-off-by: MyungJoo Ham myungjoo@samsung.com
Signed-off-by: KyungMin Park kyungmin.p...@samsung.com
Signed-off-by: Inderpal Singh inderpal.si...@linaro.org
---
drivers/cpufreq/exynos-cpufreq.c | 13 +
1 file changed, 13 insertions(+)
diff --git a/drivers/cpufreq/exynos-cpufreq.c b/drivers/cpufreq/exynos-cpufreq.c
index 7012ea8..bc1e833 100644
--- a/drivers/cpufreq/exynos-cpufreq.c
+++ b/drivers/cpufreq/exynos-cpufreq.c
@@ -244,13 +244,26 @@ static int exynos_cpufreq_cpu_init(struct cpufreq_policy
*policy)
return cpufreq_frequency_table_cpuinfo(policy, exynos_info-freq_table);
}
+static int exynos_cpufreq_cpu_exit(struct cpufreq_policy *policy)
+{
+ cpufreq_frequency_table_put_attr(policy-cpu);
+ return 0;
+}
+
+static struct freq_attr *exynos_cpufreq_attr[] = {
+ cpufreq_freq_attr_scaling_available_freqs,
+ NULL,
+};
+
static struct cpufreq_driver exynos_driver = {
.flags = CPUFREQ_STICKY,
.verify = exynos_verify_speed,
.target = exynos_target,
.get= exynos_getspeed,
.init = exynos_cpufreq_cpu_init,
+ .exit = exynos_cpufreq_cpu_exit,
.name = exynos_cpufreq,
+ .attr = exynos_cpufreq_attr,
#ifdef CONFIG_PM
.suspend= exynos_cpufreq_suspend,
.resume = exynos_cpufreq_resume,
--
1.7.9.5
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Re: [PATCH] cpufreq: exynos: Show list of available frequencies
+CC:
dg77@samsung.com, myungjoo@samsung.com, kyungmin.p...@samsung.com
On 8 January 2013 16:20, Inderpal Singh inderpal.si...@linaro.org wrote:
Add freq_attr attribute to show list of available frequencies.
Signed-off-by: Donggeun Kim dg77@samsung.com
Signed-off-by: MyungJoo Ham myungjoo@samsung.com
Signed-off-by: KyungMin Park kyungmin.p...@samsung.com
Signed-off-by: Inderpal Singh inderpal.si...@linaro.org
---
drivers/cpufreq/exynos-cpufreq.c | 13 +
1 file changed, 13 insertions(+)
diff --git a/drivers/cpufreq/exynos-cpufreq.c
b/drivers/cpufreq/exynos-cpufreq.c
index 7012ea8..bc1e833 100644
--- a/drivers/cpufreq/exynos-cpufreq.c
+++ b/drivers/cpufreq/exynos-cpufreq.c
@@ -244,13 +244,26 @@ static int exynos_cpufreq_cpu_init(struct
cpufreq_policy *policy)
return cpufreq_frequency_table_cpuinfo(policy,
exynos_info-freq_table);
}
+static int exynos_cpufreq_cpu_exit(struct cpufreq_policy *policy)
+{
+ cpufreq_frequency_table_put_attr(policy-cpu);
+ return 0;
+}
+
+static struct freq_attr *exynos_cpufreq_attr[] = {
+ cpufreq_freq_attr_scaling_available_freqs,
+ NULL,
+};
+
static struct cpufreq_driver exynos_driver = {
.flags = CPUFREQ_STICKY,
.verify = exynos_verify_speed,
.target = exynos_target,
.get= exynos_getspeed,
.init = exynos_cpufreq_cpu_init,
+ .exit = exynos_cpufreq_cpu_exit,
.name = exynos_cpufreq,
+ .attr = exynos_cpufreq_attr,
#ifdef CONFIG_PM
.suspend= exynos_cpufreq_suspend,
.resume = exynos_cpufreq_resume,
--
1.7.9.5
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Re: [PATCH] ARM: dts: correct the dw-mshc timing properties as per binding
Hi Doug, On Tue, Jan 8, 2013 at 12:34 AM, Doug Anderson diand...@chromium.org wrote: Alim, On Mon, Jan 7, 2013 at 3:19 AM, Alim Akhtar alim.akh...@samsung.com wrote: As per the current exynos-dw-mshc bindings, dw-mshc-sdr-timing and dw-mshc-ddr-timing properties are having only two cells, these properties are wrongly set for exynos5250 based cros5250 and smdk5250 platfroms. This patch corrects above timing propreties for above platfroms Thanks for catching this. Given that this just removes a number from the dts file that isn't read by the code, I don't expect any functional change and I don't see any. I also double-checked usage and compared to the current Chrome OS tree. The third number (that you removed) is already correctly specified in the dts as samsung,dw-mshc-ciu-div. :) Yes, no functional changes as the removed number is passed using dw-mshc-ciu-div property now as mentioned by you. Signed-off-by: Alim Akhtar alim.akh...@samsung.com Tested-by: Doug Anderson diand...@chromium.org Acked-by: Doug Anderson diand...@chromium.org Thanks!!! -- To unsubscribe from this list: send the line unsubscribe linux-samsung-soc in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html -- To unsubscribe from this list: send the line unsubscribe linux-samsung-soc in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
RE: [GIT PULL] Samsung fixes-2 for v3.8
Olof Johansson wrote: Hi, Hi :-) On Mon, Jan 7, 2013 at 3:33 PM, Kukjin Kim kgene@samsung.com wrote: Hi Arnd, Olof Here is Samsung-fixes-2 for v3.8. Most of them are EXYNOS5440 fixes which are for changing uart console, cpu id (typo) and silent complaining gpio error in kernel boot. If any problems, please kindly let me know. Thanks and a very happy new year. - Kukjin The following changes since commit a49f0d1ea3ec94fc7cf33a7c36a16343b74bd565: Linux 3.8-rc1 (2012-12-21 17:19:00 -0800) are available in the git repository at: git://git.kernel.org/pub/scm/linux/kernel/git/kgene/linux-samsung.git v3.8-samsung-fixes-2 for you to fetch changes up to 61bcbc2af8be4cafb5723d4bd306053b70f52a7a: ARM: EXYNOS: skip the clock initialization for exynos5440 (2013-01-05 08:32:55 -0800) Kukjin Kim (5): ARM: SAMSUNG: fix the cpu id for EXYNOS5440 ARM: dts: use uart port0 for console on exynos5440-ssdk5440 ARM: dts: use uart port1 for console on exynos4210-smdkv310 ARM: EXYNOS: enable PINCTRL for EXYNOS5440 ARM: EXYNOS: skip the clock initialization for exynos5440 See comment I just sent to the posted patch for this one. I replied on that. If any concerns, please kindly let me know. Thanks. - Kukjin -- To unsubscribe from this list: send the line unsubscribe linux-samsung-soc in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
Re: [PATCH] ARM: EXYNOS: skip the clock initialization for exynos5440
On Tue, Jan 8, 2013 at 9:35 AM, Kukjin Kim kgene@samsung.com wrote:
Olof Johansson wrote:
Hi,
On Mon, Dec 31, 2012 at 3:33 PM, Kukjin Kim kgene@samsung.com
wrote:
Since exynos5440 can support only common clk stuff, so this
patch skips legacy exynos5 clock initialization.
Signed-off-by: Kukjin Kim kgene@samsung.com
---
arch/arm/mach-exynos/common.c |7 +++
1 file changed, 7 insertions(+)
diff --git a/arch/arm/mach-exynos/common.c b/arch/arm/mach-
exynos/common.c
index d6d0dc6..1a89824 100644
--- a/arch/arm/mach-exynos/common.c
+++ b/arch/arm/mach-exynos/common.c
@@ -424,11 +424,18 @@ static void __init exynos5_init_clocks(int xtal)
{
printk(KERN_DEBUG %s: initializing clocks\n, __func__);
+ /* EXYNOS5440 can support only common clock framework */
+
+ if (soc_is_exynos5440())
+ return;
+
+#ifdef CONFIG_SOC_EXYNOS5250
Why are you adding an ifdef here, when the return above will take care
of returning early for 5440?
Without this, compilation error should be happened when we builds only for
exynos5440 without selection exynos5250, because you know, current
exynos5440 stuff cannot support legacy exynos5 clock. Of course, the ifdef
will be going away when we support common clock on all of exynos stuff, but
it's v3.9 not v3.8 so I think, we need this for now.
Note, exynos5440 is working fine on current mainline + v3.8-samsung-fixes-2
without any configuration clock stuff in kernel because hardware initial
value is ok.
Why is there a need to have a config option for 5250 and 5440? They
are similar enough that there shouldn't be much overhead to just have
a EXYNOS5 option that includes both. It's how some of the other SoCs
handle this (OMAP and Tegra, for example).
That would reduce the amount of ifdefs in your code as well, for cases
like these. I think it's a good idea -- especially since these parts
are used in bigger systems where saving the last 2k of code/data isn't
as critical. Having easy-to-maintain code is worth more in most of
those cases.
So, I'll pull the branch but please consider removing the config
options in 3.9, and not adding new ones for future similar parts if at
all possible.
Thanks!
-Olof
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Re: [PATCH 1/5 v2] Rename s5p-time to samsung-time
Hi Romain, On Saturday 15 of December 2012 22:43:03 Romain Naour wrote: Le 10/12/2012 13:59, Heiko Stübner a écrit : Am Sonntag, 2. Dezember 2012, 20:44:01 schrieb Romain Naour: This patch rename s5p-time to samsung-time. There is no functional change. Signed-off-by: Naour Romain romain.na...@openwide.fr The patch does not apply to current linux-next, because it has some problem with the exynos-universal board. I've fixed this to test the patch, so Acked-by: Heiko Stuebner he...@sntech.de What's wrong with this part of the patch ? I applied this patch today on linux-next tree, branch next-20121214. (with some hunk but no error) Patches that are supposed to go through Samsung (Kgene's) tree, should be based on for-next branch of Samsung tree. Do you have plans to rebase and resubmit this series again? I plan to submit some patches for S3C64xx (partly based on my historical work on this platform) and would be nice to have hrtime support already there, especially when all left is to just merge it. Best regards, Tomasz Figa -- To unsubscribe from this list: send the line unsubscribe linux-samsung-soc in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
Re: [PATCH] ARM: dts: exynos5250: Set HDMI version to v1.4
On Mon, Jan 7, 2013 at 4:00 PM, Sean Paul seanp...@chromium.org wrote:
Set the HDMI version to v1.4 for all exynos5250 targets. This property
was previously being inferred by the existence of the hdmi node.
Signed-off-by: Sean Paul seanp...@chromium.org
---
The patch adding the property has churned a bit from
devicetree-discuss reviews. I'll upload this again after it's settled.
Please drop.
Sean
arch/arm/boot/dts/exynos5250.dtsi |1 +
1 files changed, 1 insertions(+), 0 deletions(-)
diff --git a/arch/arm/boot/dts/exynos5250.dtsi
b/arch/arm/boot/dts/exynos5250.dtsi
index 2e3b6ef..9fb6845 100644
--- a/arch/arm/boot/dts/exynos5250.dtsi
+++ b/arch/arm/boot/dts/exynos5250.dtsi
@@ -576,6 +576,7 @@
compatible = samsung,exynos5-hdmi;
reg = 0x1453 0x10;
interrupts = 0 95 0;
+ samsung,supports-hdmi-1.4;
};
mixer {
--
1.7.7.3
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Re: [PATCH 4/4] regulator: add device tree support for s5m8767
On 10 December 2012 04:49, Amit Daniel Kachhap amit.dan...@samsung.com wrote:
Add device tree based discovery support for pmic block of s5m8767
Signed-off-by: Amit Daniel Kachhap amit.dan...@samsung.com
---
.../bindings/regulator/s5m8767-regulator.txt | 133 ++
drivers/mfd/sec-core.c | 75 -
drivers/regulator/s5m8767.c| 190
+++-
include/linux/mfd/samsung/core.h |3 +
4 files changed, 398 insertions(+), 3 deletions(-)
create mode 100644
Documentation/devicetree/bindings/regulator/s5m8767-regulator.txt
diff --git
a/Documentation/devicetree/bindings/regulator/s5m8767-regulator.txt
b/Documentation/devicetree/bindings/regulator/s5m8767-regulator.txt
new file mode 100644
index 000..59c372b
--- /dev/null
+++ b/Documentation/devicetree/bindings/regulator/s5m8767-regulator.txt
@@ -0,0 +1,133 @@
+* Samsung S5M8767 Voltage and Current Regulator
+
+The Samsung S5M8767 is a multi-function device which includes volatage and
+current regulators, rtc, charger controller and other sub-blocks. It is
+interfaced to the host controller using a i2c interface. Each sub-block is
+addressed by the host system using different i2c slave address. This document
+describes the bindings for 'pmic' sub-block of s5m8767.
+
+Required properties:
+- compatible: Should be samsung,s5m8767-pmic.
+- reg: Specifies the i2c slave address of the pmic block. It should be 0x66.
+
+- s5m8767,pmic-buck2-dvs-voltage: A set of 8 voltage values in micro-volt
(uV)
+ units for buck2 when changing voltage using gpio dvs. Refer to [1] below
+ for additional information.
+
+- s5m8767,pmic-buck3-dvs-voltage: A set of 8 voltage values in micro-volt
(uV)
+ units for buck3 when changing voltage using gpio dvs. Refer to [1] below
+ for additional information.
+
+- s5m8767,pmic-buck4-dvs-voltage: A set of 8 voltage values in micro-volt
(uV)
+ units for buck4 when changing voltage using gpio dvs. Refer to [1] below
+ for additional information.
+
+[1] If none of the 's5m8767,pmic-buck[2/3/4]-uses-gpio-dvs' optional
+property is specified, the 's5m8767,pmic-buck[2/3/4]-dvs-voltage'
+property should specify atleast one voltage level (which would be a
+safe operating voltage).
+
+If either of the 's5m8767,pmic-buck[2/3/4]-uses-gpio-dvs' optional
+property is specified, then all the eigth voltage values for the
+'s5m8767,pmic-buck[2/3/4]-dvs-voltage' should be specified.
+
+Optional properties:
+- interrupt-parent: Specifies the phandle of the interrupt controller to
which
+ the interrupts from s5m8767 are delivered to.
+- interrupts: Interrupt specifiers for two interrupt sources.
+ - First interrupt specifier is for 'irq1' interrupt.
+ - Second interrupt specifier is for 'alert' interrupt.
+- s5m8767,pmic-buck2-uses-gpio-dvs: 'buck2' can be controlled by gpio dvs.
+- s5m8767,pmic-buck3-uses-gpio-dvs: 'buck3' can be controlled by gpio dvs.
+- s5m8767,pmic-buck4-uses-gpio-dvs: 'buck4' can be controlled by gpio dvs.
+
+Additional properties required if either of the optional properties are used:
+
+- s5m8767,pmic-buck234-default-dvs-idx: Default voltage setting selected from
+ the possible 8 options selectable by the dvs gpios. The value of this
+ property should be between 0 and 7. If not specified or if out of range,
the
+ default value of this property is set to 0.
+
+- s5m8767,pmic-buck-dvs-gpios: GPIO specifiers for three host gpio's used
+ for dvs. The format of the gpio specifier depends in the gpio controller.
+
+Regulators: The regulators of s5m8767 that have to be instantiated should be
+included in a sub-node named 'regulators'. Regulator nodes included in this
+sub-node should be of the format as listed below.
+
+ regulator_name {
+ standard regulator bindings here
+ };
+
+The following are the names of the regulators that the s5m8767 pmic block
+supports. Note: The 'n' in LDOn and BUCKn represents the LDO or BUCK number
+as per the datasheet of s5m8767.
+
+ - LDOn
+ - valid values for n are 1 to 28
+ - Example: LDO0, LD01, LDO28
+ - BUCKn
+ - valid values for n are 1 to 9.
+ - Example: BUCK1, BUCK2, BUCK9
+
+The bindings inside the regulator nodes use the standard regulator bindings
+which are documented elsewhere.
+
+Example:
+
+ s5m8767_pmic@66 {
+ compatible = samsung,s5m8767-pmic;
+ reg = 0x66;
+
+ s5m8767,pmic-buck2-uses-gpio-dvs;
+ s5m8767,pmic-buck3-uses-gpio-dvs;
+ s5m8767,pmic-buck4-uses-gpio-dvs;
+
+ s5m8767,pmic-buck-default-dvs-idx = 0;
+
+ s5m8767,pmic-buck-dvs-gpios = gpx0 0 1 0 0, /* DVS1 */
+gpx0 1 1 0 0, /*
Re: [PATCH 2/5 RESEND] thermal: exynos: Miscellaneous fixes to support falling threshold interrupt
Hi Joe,
Thanks for the review. Will re-post with your suggestion,
On Sun, Jan 6, 2013 at 3:55 PM, Joe Perches j...@perches.com wrote:
On Sun, 2013-01-06 at 15:50 -0800, Amit Daniel Kachhap wrote:
Below fixes are done to support falling threshold interrupt,
* Falling interrupt status macro corrected according to exynos5 data sheet.
* The get trend function modified to calculate trip temperature correctly.
* The clearing of interrupt status in the isr is now done after handling
the event that caused the interrupt.
[]
diff --git a/drivers/thermal/exynos_thermal.c
b/drivers/thermal/exynos_thermal.c
[]
@@ -373,12 +373,19 @@ static int exynos_get_temp(struct thermal_zone_device
*thermal,
static int exynos_get_trend(struct thermal_zone_device *thermal,
int trip, enum thermal_trend *trend)
{
- if (thermal-temperature = trip)
+ int ret = 0;
Yes agreed. Will modify it.
Unnecessary initialization
+ unsigned long trip_temp;
+
+ ret = exynos_get_trip_temp(thermal, trip, trip_temp);
+ if (ret 0)
+ return ret;
+
+ if (thermal-temperature = trip_temp)
*trend = THERMAL_TREND_RAISING;
else
*trend = THERMAL_TREND_DROPPING;
THERMAL_TREND_STABLE ?
Only 2 trend is sufficient. It is stable for some time as the falling
threshold interrupt is some units below the trip temp.
- return 0;
+ return ret;
Ok agreed
return 0 is clearer.
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Re: [linux-pm] [PATCH] cpufreq: exynos: Show list of available frequencies
On Tue, Jan 8, 2013 at 2:50 AM, Inderpal Singh
inderpal.si...@linaro.org wrote:
Add freq_attr attribute to show list of available frequencies.
Signed-off-by: Donggeun Kim dg77@samsung.com
Signed-off-by: MyungJoo Ham myungjoo@samsung.com
Signed-off-by: KyungMin Park kyungmin.p...@samsung.com
Signed-off-by: Inderpal Singh inderpal.si...@linaro.org
---
drivers/cpufreq/exynos-cpufreq.c | 13 +
1 file changed, 13 insertions(+)
diff --git a/drivers/cpufreq/exynos-cpufreq.c
b/drivers/cpufreq/exynos-cpufreq.c
index 7012ea8..bc1e833 100644
--- a/drivers/cpufreq/exynos-cpufreq.c
+++ b/drivers/cpufreq/exynos-cpufreq.c
@@ -244,13 +244,26 @@ static int exynos_cpufreq_cpu_init(struct
cpufreq_policy *policy)
return cpufreq_frequency_table_cpuinfo(policy,
exynos_info-freq_table);
}
+static int exynos_cpufreq_cpu_exit(struct cpufreq_policy *policy)
+{
+ cpufreq_frequency_table_put_attr(policy-cpu);
+ return 0;
+}
+
+static struct freq_attr *exynos_cpufreq_attr[] = {
+ cpufreq_freq_attr_scaling_available_freqs,
+ NULL,
+};
+
This change looks fine. I guess this was posted before also but could
not go mainline.
Reviewed-by: Amit Daniel Kachhapamit.dan...@samsung.com
Thanks,
Amit Daniel
static struct cpufreq_driver exynos_driver = {
.flags = CPUFREQ_STICKY,
.verify = exynos_verify_speed,
.target = exynos_target,
.get= exynos_getspeed,
.init = exynos_cpufreq_cpu_init,
+ .exit = exynos_cpufreq_cpu_exit,
.name = exynos_cpufreq,
+ .attr = exynos_cpufreq_attr,
#ifdef CONFIG_PM
.suspend= exynos_cpufreq_suspend,
.resume = exynos_cpufreq_resume,
--
1.7.9.5
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Re: [PATCH v8 1/2] usb: phy: samsung: Introducing usb phy driver for hsotg
Hi Tomasz,
Sorry! I I missed this comment of yours. Is it okay if we keep
pmu_isolation as it is (as it does not seem much out of the line). We
have already gone through a lot of rework and there has been no
fruitful result :(
Also after Viveks work, this is only milited to non DT SoCs.
Thanks,
Praveen
On Wed, Nov 28, 2012 at 6:32 PM, Tomasz Figa t.f...@samsung.com wrote:
Hi Praveen,
On Friday 23 of November 2012 09:56:37 Praveen Paneri wrote:
+static void samsung_usbphy_enable(struct samsung_usbphy *sphy)
+{
+ void __iomem *regs = sphy-regs;
+ u32 phypwr;
+ u32 phyclk;
+ u32 rstcon;
+
+ /* set clock frequency for PLL */
+ phyclk = sphy-ref_clk_freq;
+ phypwr = readl(regs + SAMSUNG_PHYPWR);
+ rstcon = readl(regs + SAMSUNG_RSTCON);
+
+ switch (sphy-cpu_type) {
+ case TYPE_S3C64XX:
+ phyclk = ~PHYCLK_COMMON_ON_N;
+ phypwr = ~PHYPWR_NORMAL_MASK;
+ rstcon |= RSTCON_SWRST;
+ break;
+ case TYPE_EXYNOS4210:
+ phypwr = ~PHYPWR_NORMAL_MASK_PHY0;
+ rstcon |= RSTCON_SWRST;
+ default:
+ break;
+ }
+
+ writel(phyclk, regs + SAMSUNG_PHYCLK);
+ /* set to normal of PHY0 */
I don't understand this comment.
Will change it to Configure PHY0 for normal operation
That should be more clear, I suppose.
Yes, much better.
+ */
+
+#ifndef __SAMSUNG_USBPHY_PLATFORM_H
+#define __SAMSUNG_USBPHY_PLATFORM_H
+
+/**
+ * samsung_usbphy_data - Platform data for USB PHY driver.
+ * @pmu_isolation: Function to control usb phy isolation in PMU.
+ */
+struct samsung_usbphy_data {
+ void (*pmu_isolation)(int on);
I believe this should be named in a generic way. This is called PMU
isolation on Exynos SoCs, but on S3C64xx it's USB PHY mask.
Yes! I am aware of it. The fact that this ( MASK or ISOLATION) has
always been part of the PMU, pmu_isolation seems quite generic that
way. Though you can suggest a better name.
What do you think about set_isolation(int on) or power_isolation(int on)?
Sorry! I don't understand the point here.Why to invest so much of time
and evergy on things we want to remove soon.
I am a bit reluctant to change this now, after sending 9 versions of
the same code.
Lets concentrate on more important things like AUXDATA removal or
adding support for all DT enabled machines.
Best regards,
--
Tomasz Figa
Samsung Poland RD Center
SW Solution Development, Linux Platform
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Re: [PATCH v9 1/2] usb: phy: samsung: Introducing usb phy driver for hsotg
Hi Kukjin, It has been a long time since I posted these patches. It will be very kind of you to express your views about this series. If this looks fine to you, please ack. Thanks, Praveen On Fri, Nov 23, 2012 at 4:03 PM, Praveen Paneri p.pan...@samsung.com wrote: This driver uses usb_phy interface to interact with s3c-hsotg. Supports phy_init and phy_shutdown functions to enable/disable usb phy. Support will be extended to host controllers and more Samsung SoCs. Signed-off-by: Praveen Paneri p.pan...@samsung.com Acked-by: Heiko Stuebner he...@sntech.de Acked-by: Kyungmin Park kyungmin.p...@samsung.com --- .../devicetree/bindings/usb/samsung-usbphy.txt | 11 + drivers/usb/phy/Kconfig|8 + drivers/usb/phy/Makefile |1 + drivers/usb/phy/samsung-usbphy.c | 354 include/linux/platform_data/samsung-usbphy.h | 27 ++ 5 files changed, 401 insertions(+), 0 deletions(-) create mode 100644 Documentation/devicetree/bindings/usb/samsung-usbphy.txt create mode 100644 drivers/usb/phy/samsung-usbphy.c create mode 100644 include/linux/platform_data/samsung-usbphy.h diff --git a/Documentation/devicetree/bindings/usb/samsung-usbphy.txt b/Documentation/devicetree/bindings/usb/samsung-usbphy.txt new file mode 100644 index 000..7b26e2d --- /dev/null +++ b/Documentation/devicetree/bindings/usb/samsung-usbphy.txt @@ -0,0 +1,11 @@ +* Samsung's usb phy transceiver + +The Samsung's phy transceiver is used for controlling usb otg phy for +s3c-hsotg usb device controller. +TODO: Adding the PHY binding with controller(s) according to the under +developement generic PHY driver. + +Required properties: +- compatible : should be samsung,exynos4210-usbphy +- reg : base physical address of the phy registers and length of memory mapped + region. diff --git a/drivers/usb/phy/Kconfig b/drivers/usb/phy/Kconfig index 7eb73c5..17ad743 100644 --- a/drivers/usb/phy/Kconfig +++ b/drivers/usb/phy/Kconfig @@ -44,3 +44,11 @@ config USB_RCAR_PHY To compile this driver as a module, choose M here: the module will be called rcar-phy. + +config SAMSUNG_USBPHY + bool Samsung USB PHY controller Driver + depends on USB_S3C_HSOTG + select USB_OTG_UTILS + help + Enable this to support Samsung USB phy controller for samsung + SoCs. diff --git a/drivers/usb/phy/Makefile b/drivers/usb/phy/Makefile index 1a579a8..ec304f6 100644 --- a/drivers/usb/phy/Makefile +++ b/drivers/usb/phy/Makefile @@ -9,3 +9,4 @@ obj-$(CONFIG_USB_ISP1301) += isp1301.o obj-$(CONFIG_MV_U3D_PHY) += mv_u3d_phy.o obj-$(CONFIG_USB_EHCI_TEGRA) += tegra_usb_phy.o obj-$(CONFIG_USB_RCAR_PHY) += rcar-phy.o +obj-$(CONFIG_SAMSUNG_USBPHY) += samsung-usbphy.o diff --git a/drivers/usb/phy/samsung-usbphy.c b/drivers/usb/phy/samsung-usbphy.c new file mode 100644 index 000..5c5e1bb --- /dev/null +++ b/drivers/usb/phy/samsung-usbphy.c @@ -0,0 +1,354 @@ +/* linux/drivers/usb/phy/samsung-usbphy.c + * + * Copyright (c) 2012 Samsung Electronics Co., Ltd. + * http://www.samsung.com + * + * Author: Praveen Paneri p.pan...@samsung.com + * + * Samsung USB2.0 High-speed OTG transceiver, talks to S3C HS OTG controller + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ + +#include linux/module.h +#include linux/platform_device.h +#include linux/clk.h +#include linux/delay.h +#include linux/err.h +#include linux/io.h +#include linux/of.h +#include linux/usb/otg.h +#include linux/platform_data/samsung-usbphy.h + +/* Register definitions */ + +#define SAMSUNG_PHYPWR (0x00) + +#define PHYPWR_NORMAL_MASK (0x19 0) +#define PHYPWR_OTG_DISABLE (0x1 4) +#define PHYPWR_ANALOG_POWERDOWN(0x1 3) +#define PHYPWR_FORCE_SUSPEND (0x1 1) +/* For Exynos4 */ +#define PHYPWR_NORMAL_MASK_PHY0(0x39 0) +#define PHYPWR_SLEEP_PHY0 (0x1 5) + +#define SAMSUNG_PHYCLK (0x04) + +#define PHYCLK_MODE_USB11 (0x1 6) +#define PHYCLK_EXT_OSC (0x1 5) +#define PHYCLK_COMMON_ON_N (0x1 4) +#define PHYCLK_ID_PULL (0x1 2) +#define PHYCLK_CLKSEL_MASK (0x3 0) +#define PHYCLK_CLKSEL_48M
