date:20130410

[PATCH v5 3/3] of/pci: mips: convert to common of_pci_range_parser

2013-04-10 Thread Andrew Murray

This patch converts the pci_load_of_ranges function to use the new common
of_pci_range_parser.

Signed-off-by: Andrew Murray andrew.mur...@arm.com
Signed-off-by: Liviu Dudau liviu.du...@arm.com
---
 arch/mips/pci/pci.c |   50 --
 1 files changed, 16 insertions(+), 34 deletions(-)

diff --git a/arch/mips/pci/pci.c b/arch/mips/pci/pci.c
index 0872f12..bee49a4 100644
--- a/arch/mips/pci/pci.c
+++ b/arch/mips/pci/pci.c
@@ -122,51 +122,33 @@ static void pcibios_scanbus(struct pci_controller *hose)
 #ifdef CONFIG_OF
 void pci_load_of_ranges(struct pci_controller *hose, struct device_node *node)
 {
-   const __be32 *ranges;
-   int rlen;
-   int pna = of_n_addr_cells(node);
-   int np = pna + 5;
+   struct of_pci_range_range range;
+   struct of_pci_range_parser parser;
+   u32 res_type;
 
pr_info(PCI host bridge %s ranges:\n, node-full_name);
-   ranges = of_get_property(node, ranges, rlen);
-   if (ranges == NULL)
-   return;
hose-of_node = node;
 
-   while ((rlen -= np * 4) = 0) {
-   u32 pci_space;
+   if (of_pci_range_parser(parser, node))
+   return;
+
+   for_each_of_pci_range(parser, range) {
struct resource *res = NULL;
-   u64 addr, size;
-
-   pci_space = be32_to_cpup(ranges[0]);
-   addr = of_translate_address(node, ranges + 3);
-   size = of_read_number(ranges + pna + 3, 2);
-   ranges += np;
-   switch ((pci_space  24)  0x3) {
-   case 1: /* PCI IO space */
+
+   res_type = range.flags  IORESOURCE_TYPE_BITS;
+   if (res_type == IORESOURCE_IO) {
pr_info(  IO 0x%016llx..0x%016llx\n,
-   addr, addr + size - 1);
+   range.addr, range.addr + range.size - 1);
hose-io_map_base =
-   (unsigned long)ioremap(addr, size);
+   (unsigned long)ioremap(range.addr, range.size);
res = hose-io_resource;
-   res-flags = IORESOURCE_IO;
-   break;
-   case 2: /* PCI Memory space */
-   case 3: /* PCI 64 bits Memory space */
+   } else if (res_type == IORESOURCE_MEM) {
pr_info( MEM 0x%016llx..0x%016llx\n,
-   addr, addr + size - 1);
+   range.addr, range.addr + range.size - 1);
res = hose-mem_resource;
-   res-flags = IORESOURCE_MEM;
-   break;
-   }
-   if (res != NULL) {
-   res-start = addr;
-   res-name = node-full_name;
-   res-end = res-start + size - 1;
-   res-parent = NULL;
-   res-sibling = NULL;
-   res-child = NULL;
}
+   if (res != NULL)
+   of_pci_range_to_resource(range, node, res);
}
 }
 #endif
-- 
1.7.0.4

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[PATCH v5 0/3] of/pci: Provide common support for PCI DT parsing

2013-04-10 Thread Andrew Murray

This patchset factors out duplicated code associated with parsing PCI
DT ranges properties across the architectures and introduces a
ranges parser. This parser of_pci_range_parser can be used directly
by ARM host bridge drivers enabling them to obtain ranges from device
trees.

Compared to the v4 (incorrectly labelled v3) sent by Andrew Murray,
the following changes have been made:

 * Split the patch as suggested by Rob Herring

Compared to the v3 sent by Andrew Murray, the following changes have
been made:

 * Unify and move duplicate pci_process_bridge_OF_ranges functions to
   drivers/of/of_pci.c as suggested by Rob Herring

 * Fix potential build errors with Microblaze/MIPS

Compared to [PATCH v5 01/17] of/pci: Provide support for parsing PCI DT
ranges property, the following changes have been made:

 * Correct use of IORESOURCE_* as suggested by Russell King

 * Improved interface and naming as suggested by Thierry Reding

Compared to the v2 sent by Andrew Murray, Thomas Petazzoni did:

 * Add a memset() on the struct of_pci_range_iter when starting the
   for loop in for_each_pci_range(). Otherwise, with an uninitialized
   of_pci_range_iter, of_pci_process_ranges() may crash.

 * Add parenthesis around 'res', 'np' and 'iter' in the
   for_each_of_pci_range macro definitions. Otherwise, passing
   something like foobar as 'res' didn't work.

 * Rebased on top of 3.9-rc2, which required fixing a few conflicts in
   the Microblaze code.

v2:
  This follows on from suggestions made by Grant Likely
  (marc.info/?l=linux-kernelm=136079602806328)

Andrew Murray (3):
  of/pci: Unify pci_process_bridge_OF_ranges from Microblaze and
PowerPC
  of/pci: Provide support for parsing PCI DT ranges property
  of/pci: mips: convert to common of_pci_range_parser

 arch/microblaze/include/asm/pci-bridge.h |5 +-
 arch/microblaze/pci/pci-common.c |  192 --
 arch/mips/pci/pci.c  |   50 +++--
 arch/powerpc/include/asm/pci-bridge.h|5 +-
 arch/powerpc/kernel/pci-common.c |  192 --
 drivers/of/address.c |   63 ++
 drivers/of/of_pci.c  |  168 ++
 include/linux/of_address.h   |   42 +++
 include/linux/of_pci.h   |3 +
 9 files changed, 294 insertions(+), 426 deletions(-)

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[PATCH v5 2/3] of/pci: Provide support for parsing PCI DT ranges property

2013-04-10 Thread Andrew Murray

This patch factors out common implementation patterns to reduce overall kernel
code and provide a means for host bridge drivers to directly obtain struct
resources from the DT's ranges property without relying on architecture specific
DT handling. This will make it easier to write archiecture independent host 
bridge
drivers and mitigate against further duplication of DT parsing code.

This patch can be used in the following way:

struct of_pci_range_parser parser;
struct of_pci_range range;

if (of_pci_range_parser(parser, np))
; //no ranges property

for_each_of_pci_range(parser, range) {

/*
directly access properties of the address range, e.g.:
range.pci_space, range.pci_addr, range.cpu_addr,
range.size, range.flags

alternatively obtain a struct resource, e.g.:
struct resource res;
of_pci_range_to_resource(range, np, res);
*/
}

Additionally the implementation takes care of adjacent ranges and merges them
into a single range (as was the case with powerpc and microblaze).

Signed-off-by: Andrew Murray andrew.mur...@arm.com
Signed-off-by: Liviu Dudau liviu.du...@arm.com
Signed-off-by: Thomas Petazzoni thomas.petazz...@free-electrons.com
---
 drivers/of/address.c   |   63 +
 drivers/of/of_pci.c|  112 
 include/linux/of_address.h |   42 
 3 files changed, 145 insertions(+), 72 deletions(-)

diff --git a/drivers/of/address.c b/drivers/of/address.c
index 04da786..e87f45e 100644
--- a/drivers/of/address.c
+++ b/drivers/of/address.c
@@ -227,6 +227,69 @@ int of_pci_address_to_resource(struct device_node *dev, 
int bar,
return __of_address_to_resource(dev, addrp, size, flags, NULL, r);
 }
 EXPORT_SYMBOL_GPL(of_pci_address_to_resource);
+
+int of_pci_range_parser(struct of_pci_range_parser *parser,
+   struct device_node *node)
+{
+   const int na = 3, ns = 2;
+   int rlen;
+
+   parser-node = node;
+   parser-pna = of_n_addr_cells(node);
+   parser-np = parser-pna + na + ns;
+
+   parser-range = of_get_property(node, ranges, rlen);
+   if (parser-range == NULL)
+   return -ENOENT;
+
+   parser-end = parser-range + rlen / sizeof(__be32);
+
+   return 0;
+}
+
+struct of_pci_range *of_pci_process_ranges(struct of_pci_range_parser *parser,
+   struct of_pci_range *range)
+{
+   const int na = 3, ns = 2;
+
+   if (!parser-range || parser-range + parser-np  parser-end)
+   return NULL;
+
+   range-pci_space = be32_to_cpup(parser-range);
+   range-flags = of_bus_pci_get_flags(parser-range);
+   range-pci_addr = of_read_number(parser-range + 1, ns);
+   range-cpu_addr = of_translate_address(parser-node,
+   parser-range + na);
+   range-size = of_read_number(parser-range + parser-pna + na, ns);
+
+   parser-range += parser-np;
+
+   /* Now consume following elements while they are contiguous */
+   while (parser-range + parser-np = parser-end) {
+   u32 flags, pci_space;
+   u64 pci_addr, cpu_addr, size;
+
+   pci_space = be32_to_cpup(parser-range);
+   flags = of_bus_pci_get_flags(parser-range);
+   pci_addr = of_read_number(parser-range + 1, ns);
+   cpu_addr = of_translate_address(parser-node,
+   parser-range + na);
+   size = of_read_number(parser-range + parser-pna + na, ns);
+
+   if (flags != range-flags)
+   break;
+   if (pci_addr != range-pci_addr + range-size ||
+   cpu_addr != range-cpu_addr + range-size)
+   break;
+
+   range-size += size;
+   parser-range += parser-np;
+   }
+
+   return range;
+}
+EXPORT_SYMBOL_GPL(of_pci_process_ranges);
+
 #endif /* CONFIG_PCI */
 
 /*
diff --git a/drivers/of/of_pci.c b/drivers/of/of_pci.c
index 0611248..9680dc6 100644
--- a/drivers/of/of_pci.c
+++ b/drivers/of/of_pci.c
@@ -82,67 +82,43 @@ EXPORT_SYMBOL_GPL(of_pci_find_child_device);
 void pci_process_bridge_OF_ranges(struct pci_controller *hose,
  struct device_node *dev, int primary)
 {
-   const u32 *ranges;
-   int rlen;
-   int pna = of_n_addr_cells(dev);
-   int np = pna + 5;
int memno = 0, isa_hole = -1;
-   u32 pci_space;
-   unsigned long long pci_addr, cpu_addr, pci_next, cpu_next, size;
unsigned long long isa_mb = 0;
struct resource *res;
+   struct of_pci_range range;
+   struct of_pci_range_parser parser;
+   u32 res_type;
 
pr_info(PCI host bridge %s %s ranges:\n,

[PATCH v5 1/3] of/pci: Unify pci_process_bridge_OF_ranges from Microblaze and PowerPC

2013-04-10 Thread Andrew Murray

The pci_process_bridge_OF_ranges function, used to parse the ranges
property of a PCI host device, is found in both Microblaze and PowerPC
architectures. These implementations are nearly identical. This patch
moves this common code to a common place.

Signed-off-by: Andrew Murray andrew.mur...@arm.com
Signed-off-by: Liviu Dudau liviu.du...@arm.com
---
 arch/microblaze/include/asm/pci-bridge.h |5 +-
 arch/microblaze/pci/pci-common.c |  192 
 arch/powerpc/include/asm/pci-bridge.h|5 +-
 arch/powerpc/kernel/pci-common.c |  192 
 drivers/of/of_pci.c  |  200 ++
 include/linux/of_pci.h   |3 +
 6 files changed, 205 insertions(+), 392 deletions(-)

diff --git a/arch/microblaze/include/asm/pci-bridge.h 
b/arch/microblaze/include/asm/pci-bridge.h
index cb5d397..5783cd6 100644
--- a/arch/microblaze/include/asm/pci-bridge.h
+++ b/arch/microblaze/include/asm/pci-bridge.h
@@ -10,6 +10,7 @@
 #include linux/pci.h
 #include linux/list.h
 #include linux/ioport.h
+#include linux/of_pci.h
 
 struct device_node;
 
@@ -132,10 +133,6 @@ extern void setup_indirect_pci(struct pci_controller *hose,
 extern struct pci_controller *pci_find_hose_for_OF_device(
struct device_node *node);
 
-/* Fill up host controller resources from the OF node */
-extern void pci_process_bridge_OF_ranges(struct pci_controller *hose,
-   struct device_node *dev, int primary);
-
 /* Allocate  free a PCI host bridge structure */
 extern struct pci_controller *pcibios_alloc_controller(struct device_node 
*dev);
 extern void pcibios_free_controller(struct pci_controller *phb);
diff --git a/arch/microblaze/pci/pci-common.c b/arch/microblaze/pci/pci-common.c
index 9ea521e..2735ad9 100644
--- a/arch/microblaze/pci/pci-common.c
+++ b/arch/microblaze/pci/pci-common.c
@@ -622,198 +622,6 @@ void pci_resource_to_user(const struct pci_dev *dev, int 
bar,
*end = rsrc-end - offset;
 }
 
-/**
- * pci_process_bridge_OF_ranges - Parse PCI bridge resources from device tree
- * @hose: newly allocated pci_controller to be setup
- * @dev: device node of the host bridge
- * @primary: set if primary bus (32 bits only, soon to be deprecated)
- *
- * This function will parse the ranges property of a PCI host bridge device
- * node and setup the resource mapping of a pci controller based on its
- * content.
- *
- * Life would be boring if it wasn't for a few issues that we have to deal
- * with here:
- *
- *   - We can only cope with one IO space range and up to 3 Memory space
- * ranges. However, some machines (thanks Apple !) tend to split their
- * space into lots of small contiguous ranges. So we have to coalesce.
- *
- *   - We can only cope with all memory ranges having the same offset
- * between CPU addresses and PCI addresses. Unfortunately, some bridges
- * are setup for a large 1:1 mapping along with a small window which
- * maps PCI address 0 to some arbitrary high address of the CPU space in
- * order to give access to the ISA memory hole.
- * The way out of here that I've chosen for now is to always set the
- * offset based on the first resource found, then override it if we
- * have a different offset and the previous was set by an ISA hole.
- *
- *   - Some busses have IO space not starting at 0, which causes trouble with
- * the way we do our IO resource renumbering. The code somewhat deals with
- * it for 64 bits but I would expect problems on 32 bits.
- *
- *   - Some 32 bits platforms such as 4xx can have physical space larger than
- * 32 bits so we need to use 64 bits values for the parsing
- */
-void pci_process_bridge_OF_ranges(struct pci_controller *hose,
- struct device_node *dev, int primary)
-{
-   const u32 *ranges;
-   int rlen;
-   int pna = of_n_addr_cells(dev);
-   int np = pna + 5;
-   int memno = 0, isa_hole = -1;
-   u32 pci_space;
-   unsigned long long pci_addr, cpu_addr, pci_next, cpu_next, size;
-   unsigned long long isa_mb = 0;
-   struct resource *res;
-
-   pr_info(PCI host bridge %s %s ranges:\n,
-  dev-full_name, primary ? (primary) : );
-
-   /* Get ranges property */
-   ranges = of_get_property(dev, ranges, rlen);
-   if (ranges == NULL)
-   return;
-
-   /* Parse it */
-   pr_debug(Parsing ranges property...\n);
-   while ((rlen -= np * 4) = 0) {
-   /* Read next ranges element */
-   pci_space = ranges[0];
-   pci_addr = of_read_number(ranges + 1, 2);
-   cpu_addr = of_translate_address(dev, ranges + 3);
-   size = of_read_number(ranges + pna + 3, 2);
-
-   pr_debug(pci_space: 0x%08x pci_addr:0x%016llx ,
-   pci_space, pci_addr);
-

RE: [GIT PULL 04/10] clk-exynos for v3.10

2013-04-10 Thread Kukjin Kim

Sachin Kamat wrote:
 
 On 10 April 2013 02:01, Arnd Bergmann a...@arndb.de wrote:
  On Monday 08 April 2013, Kukjin Kim wrote:
  The following changes since commit
 07961ac7c0ee8b546658717034fe692fd12eefa9:
 
 Linux 3.9-rc5 (2013-03-31 15:12:43 -0700)
 
  are available in the git repository at:
 
 
git://git.kernel.org/pub/scm/linux/kernel/git/kgene/linux-samsung.git
  tags/clk-exynos-for-v3.10
 
  for you to fetch changes up to
da821eb7d42935b0f7056d98c75fd1150f6636f4:
 
 Merge commit 'v3.9-rc5' into next/clk-exynos (2013-04-09 01:10:13
 +0900)
 
  
 
  add suppport common clock framework for exynos
 
  I got a build warning, probably because of this patch:
 
 
 IIRC, the patch at [1] was supposed to fix the build warning. Kukjin
 had mentioned it was applied [1].
 
 [1] https://patchwork.kernel.org/patch/2010691/
 
Oops, probably the patch missed :-( Let me fix it.

Thanks.

- Kukjin

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Re: [GIT PULL 08/10] secure-exynos for v3.10

2013-04-10 Thread Tomasz Figa

Hi Rob,

On Tuesday 09 of April 2013 16:43:48 Rob Herring wrote:
 On Mon, Apr 8, 2013 at 1:19 PM, Kukjin Kim kgene@samsung.com 
wrote:
  The following changes since commit 
da821eb7d42935b0f7056d98c75fd1150f6636f4:
Merge commit 'v3.9-rc5' into next/clk-exynos (2013-04-09 01:10:13
+0900) 
  are available in the git repository at:
git://git.kernel.org/pub/scm/linux/kernel/git/kgene/linux-samsung.gi
t
  
  tags/secure-exynos-for-v3.10
  
  for you to fetch changes up to 
beddf63fc8e01f06799bd6d7a2dd879885bbc9c6:
ARM: EXYNOS: Add secure firmware support to secondary CPU bring-up
  
  (2013-04-09 01:52:30 +0900)
  
  
  add support secure firmware for exynos
  
  
  
  Tomasz Figa (5):
ARM: Add interface for registering and calling firmware-specific
  
  operations
 
 I missed the original series, but looking at this patch now I'm not
 convinced this is all that generic despite the name. Should PSCI be
 using this for example?

As far as I remember, nobody had any objections about this interface not 
being generic enough in last version of the series.

In fact it might be hard to make this fully generic (in terms of available 
firmware ops), because each firmware might provide its own, different set 
of operations.
 
 Also, a comment from Barry Song that firmware_ops is too generic for
 global name was not addressed.

This doesn't seem like any major issue at the moment. I can send a 
followup patch to rename it to arm_firmware, secure_firmware or whatever 
is preferred after it gets merged.

Btw. Barry's comment is dated to 26 Dec, more than a month since the patch 
was posted and was already merged in Kukjin's tree at that time.

Best regards,
Tomasz

 Rob
 
ARM: EXYNOS: Add support for secure monitor calls
ARM: EXYNOS: Add support for Exynos secure firmware
ARM: EXYNOS: Add IO mapping for non-secure SYSRAM.
ARM: EXYNOS: Add secure firmware support to secondary CPU
bring-up
   
   Documentation/arm/firmware.txt | 88
  
  ++
  
   .../devicetree/bindings/arm/samsung-boards.txt | 10 +++
   arch/arm/common/Makefile   |  2 +
   arch/arm/common/firmware.c | 18 +
   arch/arm/include/asm/firmware.h| 66
    arch/arm/mach-exynos/Makefile 
   |  6 ++
   arch/arm/mach-exynos/common.c  | 35 +
   arch/arm/mach-exynos/common.h  |  2 +
   arch/arm/mach-exynos/exynos-smc.S  | 22 ++
   arch/arm/mach-exynos/firmware.c| 70
   + arch/arm/mach-exynos/include/mach/map.h   
   |  3 +
   arch/arm/mach-exynos/mach-exynos4-dt.c |  1 +
   arch/arm/mach-exynos/platsmp.c | 32 ++--
   arch/arm/mach-exynos/smc.h | 31 
   arch/arm/plat-samsung/include/plat/map-s5p.h   |  1 +
   15 files changed, 382 insertions(+), 5 deletions(-)
   create mode 100644 Documentation/arm/firmware.txt
   create mode 100644 arch/arm/common/firmware.c
   create mode 100644 arch/arm/include/asm/firmware.h
   create mode 100644 arch/arm/mach-exynos/exynos-smc.S
   create mode 100644 arch/arm/mach-exynos/firmware.c
   create mode 100644 arch/arm/mach-exynos/smc.h
  
  --
  Thanks.
  
  Best regards,
  Kgene.
  --
  Kukjin Kim kgene@samsung.com, Senior Engineer,
  SW Solution Development Team, Samsung Electronics Co., Ltd.
  
  ___
  linux-arm-kernel mailing list
  linux-arm-ker...@lists.infradead.org
  http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
 
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Re: [PATCH] rtc: rtc-s3c: use clk_prepare_enable and clk_disable_unprepare

2013-04-10 Thread Sylwester Nawrocki

On 04/09/2013 04:27 PM, Vivek Gautam wrote:
 From: Thomas Abraham thomas.abra...@linaro.org
 
 Convert clk_enable/clk_disable to clk_prepare_enable/clk_disable_unprepare
 calls as required by common clock framework.
 
 Signed-off-by: Thomas Abraham thomas.abra...@linaro.org
 Signed-off-by: Vivek Gautam gautam.vi...@samsung.com

Thanks Vivek.

Reviewed-by: Sylwester Nawrocki s.nawro...@samsung.com

 ---
 
 The v1 of this patch is pretty old, but the change needs to be merged to
 avoid getting those needless WARN_ON() dumps on console.
 
 Changes from v1:
  - Not using clk_disable_unprepare() at the end of s3c_rtc_probe(), since
this will unprepare the rtc clock which is again getting used in other
funtions later.
  - Using clk_unprepare() at the remove() instead to fix things up.
 
  drivers/rtc/rtc-s3c.c |5 +++--
  1 files changed, 3 insertions(+), 2 deletions(-)
 
 diff --git a/drivers/rtc/rtc-s3c.c b/drivers/rtc/rtc-s3c.c
 index fb994e9..e3528c9 100644
 --- a/drivers/rtc/rtc-s3c.c
 +++ b/drivers/rtc/rtc-s3c.c
 @@ -430,6 +430,7 @@ static int s3c_rtc_remove(struct platform_device *dev)
  
   s3c_rtc_setaie(dev-dev, 0);
  
 + clk_unprepare(rtc_clk);
   rtc_clk = NULL;
  
   return 0;
 @@ -498,7 +499,7 @@ static int s3c_rtc_probe(struct platform_device *pdev)
   return ret;
   }
  
 - clk_enable(rtc_clk);
 + clk_prepare_enable(rtc_clk);
  
   /* check to see if everything is setup correctly */
  
 @@ -578,7 +579,7 @@ static int s3c_rtc_probe(struct platform_device *pdev)
  
   err_nortc:
   s3c_rtc_enable(pdev, 0);
 - clk_disable(rtc_clk);
 + clk_disable_unprepare(rtc_clk);
  
   return ret;
  }

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RE: [PATCH 1/3] ARM: dts: Remove keypad entries from exynos4x12-pinctrl.dtsi

2013-04-10 Thread Kukjin Kim

Sachin Kamat wrote:
 
 Keypad pins/lines are board specific and should be added to respective
 board dts files.
 
 Signed-off-by: Sachin Kamat sachin.ka...@linaro.org
 ---
  arch/arm/boot/dts/exynos4x12-pinctrl.dtsi |   56
-
 
  1 files changed, 0 insertions(+), 56 deletions(-)
 
 diff --git a/arch/arm/boot/dts/exynos4x12-pinctrl.dtsi
 b/arch/arm/boot/dts/exynos4x12-pinctrl.dtsi
 index 099cec7..704290f 100644
 --- a/arch/arm/boot/dts/exynos4x12-pinctrl.dtsi
 +++ b/arch/arm/boot/dts/exynos4x12-pinctrl.dtsi
 @@ -778,62 +778,6 @@
   samsung,pin-drv = 3;
   };
 
 - keypad_col0: keypad-col0 {
 - samsung,pins = gpl2-0;
 - samsung,pin-function = 3;
 - samsung,pin-pud = 0;
 - samsung,pin-drv = 0;
 - };
 -
 - keypad_col1: keypad-col1 {
 - samsung,pins = gpl2-1;
 - samsung,pin-function = 3;
 - samsung,pin-pud = 0;
 - samsung,pin-drv = 0;
 - };
 -
 - keypad_col2: keypad-col2 {
 - samsung,pins = gpl2-2;
 - samsung,pin-function = 3;
 - samsung,pin-pud = 0;
 - samsung,pin-drv = 0;
 - };
 -
 - keypad_col3: keypad-col3 {
 - samsung,pins = gpl2-3;
 - samsung,pin-function = 3;
 - samsung,pin-pud = 0;
 - samsung,pin-drv = 0;
 - };
 -
 - keypad_col4: keypad-col4 {
 - samsung,pins = gpl2-4;
 - samsung,pin-function = 3;
 - samsung,pin-pud = 0;
 - samsung,pin-drv = 0;
 - };
 -
 - keypad_col5: keypad-col5 {
 - samsung,pins = gpl2-5;
 - samsung,pin-function = 3;
 - samsung,pin-pud = 0;
 - samsung,pin-drv = 0;
 - };
 -
 - keypad_col6: keypad-col6 {
 - samsung,pins = gpl2-6;
 - samsung,pin-function = 3;
 - samsung,pin-pud = 0;
 - samsung,pin-drv = 0;
 - };
 -
 - keypad_col7: keypad-col7 {
 - samsung,pins = gpl2-7;
 - samsung,pin-function = 3;
 - samsung,pin-pud = 0;
 - samsung,pin-drv = 0;
 - };
 -
   cam_port_b: cam-port-b {
   samsung,pins = gpm0-0, gpm0-1, gpm0-2,
gpm0-3,
   gpm0-4, gpm0-5, gpm0-6,
gpm0-7,
 --
 1.7.4.1

Applied, this whole series.

Thanks.

- Kukjin

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RE: [PATCH v2 1/2] ARM: dts: Add MFC clock entries for exynos4

2013-04-10 Thread Kukjin Kim

Sachin Kamat wrote:
 
 Added MFC related clock entries in exynos4.dtsi file.
 
 Signed-off-by: Sachin Kamat sachin.ka...@linaro.org
 Reviewed-by: Sylwester Nawrocki s.nawro...@samsung.com

Applied this series.

Thanks.

- Kukjin

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RE: [PATCH] pinctrl: Add pinctrl-s3c24xx driver

2013-04-10 Thread Kukjin Kim

Heiko Stübner wrote:
 
 The s3c24xx pins follow a similar pattern as the other Samsung SoCs and
 can therefore reuse the already introduced infrastructure.
 
 The s3c24xx SoCs have one design oddity in that the first 4 external
 interrupts do not reside in the eint pending register but in the main
 interrupt controller instead. We solve this by forwarding the external
 interrupt from the main controller into the irq domain of the pin bank.
 The masking/acking of these interrupts is handled in the same way.
 
 Furthermore the S3C2412/2413 SoCs contain another oddity in that they
 keep the same 4 eints in the main interrupt controller and eintpend
 register and requiring ack operations to happen in both. To solve this
 a ctrl_type enum is introduced which can keep the type of controller
 in the samsung_pin_ctrl struct for later retrieval.
 
 The ctrl_type enum contains only S3C24XX and S3C2412 types, as the
 eint-speciality is currently the only use-case. But it can be expaned
 if other SoCs gain special handling requirements later on.
 
 Signed-off-by: Heiko Stuebner he...@sntech.de

Looks good to me, need to implement more for other s3c24xx though.

Linus, if you want, please add:

Acked-by: Kukjin Kim kgene@samsung.com

Thanks.

- Kukjin

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RE: [PATCH v2 0/3] ARM: S3C24XX: Add devicetree support for s3c2416

2013-04-10 Thread Kukjin Kim

Heiko Stübner wrote:
 
 This is the second installment of beginning devicetree support the
 Samsung S3C24xx architectures and focuses on the s3c2416 for now.
 
 Included is the devicetree support for the s3c24xx irq controller and
 basic support for smdk2416 boards, which can sucessfully boot.
 
 
 After the discussion with Thomas Abraham on v1 and staring to long at all
 of
 this, I'm not even sure if having the interrupt mapping in the binding
 is the correct way to go anymore.
 
 The key positive aspect of this solution is, that after everything is
 running
 via dt all the SoC specific mapping tables in the driver can go away,
 cutting
 its length in half.
 
 The other option would be as Thomas suggested to define specific irq-
 controller
 types (i.e. s3c2416-intc, s3c2443-intc, ... resulting in 16 types) and
 keep
 the mapping data in the code, as it is now.
 
 So I would be very thankful for a bit of guidance on what is the better
 way.
 
 
 The series depends on the finalized s3c24xx irq rework, which probably
 won't
 make it into 3.9 and also the clocksource dt support by Tomasz Figa, which
 are not in any tree yet.
 
 
 Changes since v1:
 - adapt to changes in the underlying s3c24xx irq rework
   = more shared init code
 - use irqchip infrastructure
 - limit number of possible irq-types to not encode implementation details
   into the binding
 - include new samsung-clocksource
 
 Heiko Stuebner (3):
   ARM: S3C24XX: move irq driver to drivers/irqchip
   irqchip: irq-s3c24xx: add devicetree support
   ARM: S3C24XX: Add devicetree support and dt-board file for s3c2416 SoCs
 
  .../interrupt-controller/samsung,s3c24xx-irq.txt   |   53 ++
  arch/arm/boot/dts/Makefile |1 +
  arch/arm/boot/dts/s3c2416-smdk2416.dts |   79 
  arch/arm/boot/dts/s3c2416.dtsi |  193 
 
  arch/arm/boot/dts/s3c24xx.dtsi |  165 +
  arch/arm/mach-s3c24xx/Kconfig  |   10 +
  arch/arm/mach-s3c24xx/Makefile |3 +-
  arch/arm/mach-s3c24xx/mach-s3c2416-dt.c|   91 +
  drivers/irqchip/Makefile   |1 +
  .../irq.c = drivers/irqchip/irq-s3c24xx.c |  128 +
  10 files changed, 723 insertions(+), 1 deletions(-)
  create mode 100644 Documentation/devicetree/bindings/interrupt-
 controller/samsung,s3c24xx-irq.txt
  create mode 100644 arch/arm/boot/dts/s3c2416-smdk2416.dts
  create mode 100644 arch/arm/boot/dts/s3c2416.dtsi
  create mode 100644 arch/arm/boot/dts/s3c24xx.dtsi
  create mode 100644 arch/arm/mach-s3c24xx/mach-s3c2416-dt.c
  rename arch/arm/mach-s3c24xx/irq.c = drivers/irqchip/irq-s3c24xx.c (92%)
 
 --
 1.7.2.3

Basically, looks good to me and thanks for your effort.

BTW, if you don't mind, would be better to send to upstream next time. Because 
I need to consider other s3c24xx SoCs for DT...

Thanks.

- Kukjin

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[PATCH] I2C: EXYNOS5: Set up the TX FIFO and RX FIFO for HSI2C

2013-04-10 Thread Yuvaraj Kumar C D

This patch, set up TX FIFO and RX FIFO of HSI2C controller based
on i2c message length.If we configure TX and RX FIFO for a default
value,the ALMOST_EMPTY and ALMOST_FULL will rise the interrupts
unnecessary.

Signed-off-by: Yuvaraj Kumar C D yuvaraj...@samsung.com
---
 drivers/i2c/busses/i2c-exynos5.c |   21 -
 1 file changed, 12 insertions(+), 9 deletions(-)

diff --git a/drivers/i2c/busses/i2c-exynos5.c b/drivers/i2c/busses/i2c-exynos5.c
index a38c616..b25c717 100644
--- a/drivers/i2c/busses/i2c-exynos5.c
+++ b/drivers/i2c/busses/i2c-exynos5.c
@@ -77,9 +77,9 @@
 /* I2C_FIFO_CTL Register bits */
 #define HSI2C_RXFIFO_EN(1u  0)
 #define HSI2C_TXFIFO_EN(1u  1)
-#define HSI2C_TXFIFO_TRIGGER_LEVEL (0x30  16)
-#define HSI2C_RXFIFO_TRIGGER_LEVEL (0x30  4)
-
+#define HSI2C_FIFO_MAX (0x40)
+#define HSI2C_RXFIFO_TRIGGER_LEVEL(x)  ((x)  4)
+#define HSI2C_TXFIFO_TRIGGER_LEVEL(x)  ((x)  16)
 /* I2C_TRAILING_CTL Register bits */
 #define HSI2C_TRAILING_COUNT   (0xf)
 
@@ -400,10 +400,9 @@ static irqreturn_t exynos5_i2c_irq(int irqno, void *dev_id)
goto stop;
}
 
-   /* 0x30 is the default trigger level for TX FIFO */
-   len = 48 - fifo_level;
-
-   if (len  i2c-msg-len)
+   if (i2c-msg-len  HSI2C_FIFO_MAX)
+   len = HSI2C_FIFO_MAX;
+   else
len = i2c-msg-len;
 
i2c-msg_len += len;
@@ -492,10 +491,11 @@ static void exynos5_i2c_message_start(struct exynos5_i2c 
*i2c, int stop)
u32 i2c_auto_conf = 0;
u32 fifo_ctl;
 
+   unsigned short len = (i2c-msg-len  HSI2C_FIFO_MAX) ?
+   HSI2C_FIFO_MAX : i2c-msg-len;
exynos5_i2c_en_timeout(i2c);
 
-   fifo_ctl = HSI2C_RXFIFO_EN | HSI2C_TXFIFO_EN |
-   HSI2C_TXFIFO_TRIGGER_LEVEL | HSI2C_RXFIFO_TRIGGER_LEVEL;
+   fifo_ctl = HSI2C_RXFIFO_EN | HSI2C_TXFIFO_EN;
writel(fifo_ctl, i2c-regs + HSI2C_FIFO_CTL);
 
i2c_ctl = readl(i2c-regs + HSI2C_CTL);
@@ -506,11 +506,13 @@ static void exynos5_i2c_message_start(struct exynos5_i2c 
*i2c, int stop)
 
i2c_auto_conf |= HSI2C_READ_WRITE;
 
+   fifo_ctl |= HSI2C_RXFIFO_TRIGGER_LEVEL(len);
int_en |= (HSI2C_INT_RX_ALMOSTFULL_EN |
HSI2C_INT_TRAILING_EN);
} else {
i2c_ctl |= HSI2C_TXCHON;
 
+   fifo_ctl |= HSI2C_TXFIFO_TRIGGER_LEVEL(len);
int_en |= HSI2C_INT_TX_ALMOSTEMPTY_EN;
}
 
@@ -519,6 +521,7 @@ static void exynos5_i2c_message_start(struct exynos5_i2c 
*i2c, int stop)
 
writel(HSI2C_SLV_ADDR_MAS(i2c-msg-addr), i2c-regs + HSI2C_ADDR);
 
+   writel(fifo_ctl, i2c-regs + HSI2C_FIFO_CTL);
writel(i2c_ctl, i2c-regs + HSI2C_CTL);
 
/* In auto mode the length of xfer cannot be 0 */
-- 
1.7.9.5

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RE: [PATCH v4 0/2] ARM: Exynos5250: Enabling samsung usb phy

2013-04-10 Thread Kukjin Kim

Vivek Gautam wrote:
 
 Based on 'for-next' of linux-samsung tree with following patches
 from Doug on top:
 usb: Document clocks in samsung, exynos4210-ehci/ohci bindings
 ARM: dts: add usb 2.0 clock references to exynos5250 device tree
 
 Also depending upon following patch-series for Samsung-usb-phy driver:
 [PATCH v7 0/2] Adding USB 3.0 DRD-phy support for exynos5250
 
 Changes from v3:
 Added 'clocks' and 'clock-names' entry also in device nodes, aligning
 with common clock framework for Samsung's SoCs.
 
 Vivek Gautam (2):
   ARM: Exynos5250: Enabling samsung-usb2phy driver
   ARM: Exynos5250: Enabling samsung-usb3phy driver
 
  arch/arm/boot/dts/exynos5250.dtsi |   29 +
  1 files changed, 29 insertions(+), 0 deletions(-)
 
 --
 1.7.6.5

OK, applied, thanks.

- Kukjin

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RE: [PATCH RESEND] ARM: EXYNOS: no more support non-DT for EXYNOS SoCs

2013-04-10 Thread Kukjin Kim

Kukjin Kim wrote:
 
 From: Kukjin Kim kgene@samsung.com
 
 As we discussed in mailing list, non-DT for EXYNOS SoCs will not be
 supported from v3.10. This patch removes regarding files for non-DT
 including board files.
 
 Signed-off-by: Kukjin Kim kgene@samsung.com

I'd like to send this patch for v3.10 in late branch, if possible.

If any objections, please let me know.

- Kukjin

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Re: [PATCH] pinctrl: Add pinctrl-s3c24xx driver

2013-04-10 Thread Tomasz Figa

Hi Heiko,

Basically looks good to me, but please see my inline comments about 
handling of EINT0-3.

On Wednesday 10 of April 2013 01:35:12 Heiko Stübner wrote:
 The s3c24xx pins follow a similar pattern as the other Samsung SoCs and
 can therefore reuse the already introduced infrastructure.
 
 The s3c24xx SoCs have one design oddity in that the first 4 external
 interrupts do not reside in the eint pending register but in the main
 interrupt controller instead. We solve this by forwarding the external
 interrupt from the main controller into the irq domain of the pin bank.
 The masking/acking of these interrupts is handled in the same way.
 
 Furthermore the S3C2412/2413 SoCs contain another oddity in that they
 keep the same 4 eints in the main interrupt controller and eintpend
 register and requiring ack operations to happen in both. To solve this
 a ctrl_type enum is introduced which can keep the type of controller
 in the samsung_pin_ctrl struct for later retrieval.
 
 The ctrl_type enum contains only S3C24XX and S3C2412 types, as the
 eint-speciality is currently the only use-case. But it can be expaned
 if other SoCs gain special handling requirements later on.
 
 Signed-off-by: Heiko Stuebner he...@sntech.de
 ---
 Depends on the s3c64xx pinctrl work from Tomasz Figa.
 
 It also does not yet contain the pin-definitions for all s3c24xx SoCs,
 as I don't have datasheets for them.
 
 Tested on a s3c2416 based board.
 
  .../bindings/pinctrl/samsung-pinctrl.txt   |4 +
  drivers/gpio/gpio-samsung.c|4 +
  drivers/pinctrl/Kconfig|5 +
  drivers/pinctrl/Makefile   |1 +
  drivers/pinctrl/pinctrl-s3c24xx.c  |  603
  drivers/pinctrl/pinctrl-samsung.c 
 |   10 +
  drivers/pinctrl/pinctrl-samsung.h  |   16 +
  7 files changed, 643 insertions(+), 0 deletions(-)
  create mode 100644 drivers/pinctrl/pinctrl-s3c24xx.c
 
 diff --git
 a/Documentation/devicetree/bindings/pinctrl/samsung-pinctrl.txt
 b/Documentation/devicetree/bindings/pinctrl/samsung-pinctrl.txt index
 c70fca1..1d8fc3c 100644
 --- a/Documentation/devicetree/bindings/pinctrl/samsung-pinctrl.txt
 +++ b/Documentation/devicetree/bindings/pinctrl/samsung-pinctrl.txt
 @@ -7,6 +7,10 @@ on-chip controllers onto these pads.
 
  Required Properties:
  - compatible: should be one of the following.
 +  - samsung,s3c2413-pinctrl: for S3C64xx-compatible pin-controller,
 +  - samsung,s3c2416-pinctrl: for S3C64xx-compatible pin-controller,
 +  - samsung,s3c2440-pinctrl: for S3C64xx-compatible pin-controller,
 +  - samsung,s3c2450-pinctrl: for S3C64xx-compatible pin-controller,
- samsung,s3c64xx-pinctrl: for S3C64xx-compatible pin-controller,
- samsung,exynos4210-pinctrl: for Exynos4210 compatible
 pin-controller. - samsung,exynos4x12-pinctrl: for Exynos4x12
 compatible pin-controller. diff --git a/drivers/gpio/gpio-samsung.c
 b/drivers/gpio/gpio-samsung.c index dc06a6f..73017b9 100644
 --- a/drivers/gpio/gpio-samsung.c
 +++ b/drivers/gpio/gpio-samsung.c
 @@ -3026,6 +3026,10 @@ static __init int samsung_gpiolib_init(void)
   */
   struct device_node *pctrl_np;
   static const struct of_device_id exynos_pinctrl_ids[] = {
 + { .compatible = samsung,s3c2413-pinctrl, },
 + { .compatible = samsung,s3c2416-pinctrl, },
 + { .compatible = samsung,s3c2440-pinctrl, },
 + { .compatible = samsung,s3c2450-pinctrl, },
   { .compatible = samsung,s3c64xx-pinctrl, },
   { .compatible = samsung,exynos4210-pinctrl, },
   { .compatible = samsung,exynos4x12-pinctrl, },
 diff --git a/drivers/pinctrl/Kconfig b/drivers/pinctrl/Kconfig
 index 7402ac9..58d73ac 100644
 --- a/drivers/pinctrl/Kconfig
 +++ b/drivers/pinctrl/Kconfig
 @@ -226,6 +226,11 @@ config PINCTRL_EXYNOS5440
   select PINMUX
   select PINCONF
 
 +config PINCTRL_S3C24XX
 + bool Samsung S3C24XX SoC pinctrl driver
 + depends on ARCH_S3C24XX
 + select PINCTRL_SAMSUNG
 +
  config PINCTRL_S3C64XX
   bool Samsung S3C64XX SoC pinctrl driver
   depends on ARCH_S3C64XX
 diff --git a/drivers/pinctrl/Makefile b/drivers/pinctrl/Makefile
 index 21d34c2..1ccdfd8 100644
 --- a/drivers/pinctrl/Makefile
 +++ b/drivers/pinctrl/Makefile
 @@ -45,6 +45,7 @@ obj-$(CONFIG_PINCTRL_COH901)+= pinctrl-
coh901.o
  obj-$(CONFIG_PINCTRL_SAMSUNG)+= pinctrl-samsung.o
  obj-$(CONFIG_PINCTRL_EXYNOS) += pinctrl-exynos.o
  obj-$(CONFIG_PINCTRL_EXYNOS5440) += pinctrl-exynos5440.o
 +obj-$(CONFIG_PINCTRL_S3C24XX)+= pinctrl-s3c24xx.o
  obj-$(CONFIG_PINCTRL_S3C64XX)+= pinctrl-s3c64xx.o
  obj-$(CONFIG_PINCTRL_XWAY)   += pinctrl-xway.o
  obj-$(CONFIG_PINCTRL_LANTIQ) += pinctrl-lantiq.o
 diff --git a/drivers/pinctrl/pinctrl-s3c24xx.c
 b/drivers/pinctrl/pinctrl-s3c24xx.c new file mode 100644
 index 000..6b05519
 --- /dev/null
 +++

Re: [PATCH v2 0/3] ARM: S3C24XX: Add devicetree support for s3c2416

2013-04-10 Thread Heiko Stübner

Am Mittwoch, 10. April 2013, 12:15:48 schrieb Kukjin Kim:
 Heiko Stübner wrote:
  This is the second installment of beginning devicetree support the
  Samsung S3C24xx architectures and focuses on the s3c2416 for now.
  
  Included is the devicetree support for the s3c24xx irq controller and
  basic support for smdk2416 boards, which can sucessfully boot.
  
  
  After the discussion with Thomas Abraham on v1 and staring to long at all
  of
  this, I'm not even sure if having the interrupt mapping in the binding
  is the correct way to go anymore.
  
  The key positive aspect of this solution is, that after everything is
  running
  via dt all the SoC specific mapping tables in the driver can go away,
  cutting
  its length in half.
  
  The other option would be as Thomas suggested to define specific irq-
  controller
  types (i.e. s3c2416-intc, s3c2443-intc, ... resulting in 16 types) and
  keep
  the mapping data in the code, as it is now.
  
  So I would be very thankful for a bit of guidance on what is the better
  way.
  
  
  The series depends on the finalized s3c24xx irq rework, which probably
  won't
  make it into 3.9 and also the clocksource dt support by Tomasz Figa,
  which are not in any tree yet.
  
  
  Changes since v1:
  - adapt to changes in the underlying s3c24xx irq rework
  
= more shared init code
  
  - use irqchip infrastructure
  - limit number of possible irq-types to not encode implementation details
  
into the binding
  
  - include new samsung-clocksource
  
  Heiko Stuebner (3):
ARM: S3C24XX: move irq driver to drivers/irqchip
irqchip: irq-s3c24xx: add devicetree support
ARM: S3C24XX: Add devicetree support and dt-board file for s3c2416 SoCs
   
   .../interrupt-controller/samsung,s3c24xx-irq.txt   |   53 ++
   arch/arm/boot/dts/Makefile |1 +
   arch/arm/boot/dts/s3c2416-smdk2416.dts |   79 
   arch/arm/boot/dts/s3c2416.dtsi |  193
    arch/arm/boot/dts/s3c24xx.dtsi
   |  165 + arch/arm/mach-s3c24xx/Kconfig 
   |   10 +
   arch/arm/mach-s3c24xx/Makefile |3 +-
   arch/arm/mach-s3c24xx/mach-s3c2416-dt.c|   91 +
   drivers/irqchip/Makefile   |1 +
   .../irq.c = drivers/irqchip/irq-s3c24xx.c |  128 +
   10 files changed, 723 insertions(+), 1 deletions(-)
   create mode 100644 Documentation/devicetree/bindings/interrupt-
  
  controller/samsung,s3c24xx-irq.txt
  
   create mode 100644 arch/arm/boot/dts/s3c2416-smdk2416.dts
   create mode 100644 arch/arm/boot/dts/s3c2416.dtsi
   create mode 100644 arch/arm/boot/dts/s3c24xx.dtsi
   create mode 100644 arch/arm/mach-s3c24xx/mach-s3c2416-dt.c
   rename arch/arm/mach-s3c24xx/irq.c = drivers/irqchip/irq-s3c24xx.c
   (92%)
  
  --
  1.7.2.3
 
 Basically, looks good to me and thanks for your effort.
 
 BTW, if you don't mind, would be better to send to upstream next time.
 Because I need to consider other s3c24xx SoCs for DT...

hehe, you're digging up quite old stuff :-)

This of course got superseeded by the different approach to s3c24xx-irq dt-
support and the pinctrl work.

I'll send a new version of the dt support which takes into account all the 
recent changes in the next couple of days.

Of course I'm ok with delaying this until 3.11. At least all the building 
blocks (irq and pinctrl) are there now.


Heiko
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RE: [PATCH v5 0/3] ARM: Exynos5250: Enabling dwc3-exynos driver

2013-04-10 Thread Kukjin Kim

Vivek Gautam wrote:
 
 This patch-set is in continuation with patch-series:
 [PATCH v4 0/4] Enable ehci, ohci and dwc3 devices on exynos5250
 out of which follwowing patches have been picked up:
 ARM: Exynos5250: Enabling ehci-s5p driver
 ARM: Exynos5250: Enabling ohci-exynos driver
 
 Based on following patch-set for Samsung's usb PHY enablement:
 [PATCH v4 0/2] ARM: Exynos5250: Enabling samsung usb phy
 
 and further depends on dwc3-exynos driver patch-set:
 [PATCH 0/2] dwc3: exynos: Device tree fixes
 
 Changes from v4:
  - Aligning with the recently merged common clock framework, thereby
no place for clock file changes. ;-)
  - Adding proper binding documentation as per latest bindings changes in
dwc3 driver (dwc3/core.c as well as for dwc3-exynos.c change reflected
by above patch-set.
  - Bifurcating the patch to separate our Documentation, arch and dts
 changes.
 
 Vivek Gautam (3):
   usb: Add device tree bindings for dwc3-exynos
   ARM: exynos5250: dts: Enabling dwc3-exynos driver
   ARM: exynos5: Enable XHCI support on exynos5
 
  .../devicetree/bindings/usb/exynos-usb.txt |   34
 
  arch/arm/boot/dts/exynos5250.dtsi  |   20 ++-
  arch/arm/mach-exynos/Kconfig   |1 +
  3 files changed, 53 insertions(+), 2 deletions(-)
 
 --
 1.7.6.5

Applied this series, thanks.

- Kukjin

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Re: [PATCH RESEND] ARM: EXYNOS: no more support non-DT for EXYNOS SoCs

2013-04-10 Thread Sylwester Nawrocki

On 04/10/2013 12:34 PM, Kukjin Kim wrote:
 Kukjin Kim wrote:

 From: Kukjin Kim kgene@samsung.com

 As we discussed in mailing list, non-DT for EXYNOS SoCs will not be
 supported from v3.10. This patch removes regarding files for non-DT
 including board files.

 Signed-off-by: Kukjin Kim kgene@samsung.com

It looks OK to me.

 I'd like to send this patch for v3.10 in late branch, if possible.
 
 If any objections, please let me know.
 
 - Kukjin

Thanks,
Sylwester

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[PATCH 0/7] exynos4-is cleanups and improvements

2013-04-10 Thread Sylwester Nawrocki

This patch series includes some cleanups of the recently added FIMC-IS
driver and prerequisite patches for the FIMC-LITE module to make it
easier to reuse in the future exynos5-is driver.

Sylwester Nawrocki (7):
  exynos4-is: Move the subdev group ID definitions to public header
  exynos4-is: Make fimc-lite independent of the pipeline-subdevs array
  exynos4-is: Make fimc-lite independent on struct fimc_sensor_info
  exynos4-is: Improve the ISP chain parameter count calculation
  exynos4-is: Rename the ISP chain configuration data structure
  exynos4-is: Remove meaningless test before bit setting
  exynos4-is: Disable debug trace by default in fimc-isp.c

 drivers/media/platform/exynos4-is/fimc-capture.c  |7 +-
 drivers/media/platform/exynos4-is/fimc-is-param.c |  277 +
 drivers/media/platform/exynos4-is/fimc-is-param.h |4 +-
 drivers/media/platform/exynos4-is/fimc-is-regs.c  |   17 +-
 drivers/media/platform/exynos4-is/fimc-is.c   |   24 +-
 drivers/media/platform/exynos4-is/fimc-is.h   |   10 +-
 drivers/media/platform/exynos4-is/fimc-isp.c  |   15 +-
 drivers/media/platform/exynos4-is/fimc-lite.c |   67 ++---
 drivers/media/platform/exynos4-is/media-dev.c |   74 +++---
 drivers/media/platform/exynos4-is/media-dev.h |   15 +-
 include/media/s5p_fimc.h  |   11 +
 11 files changed, 238 insertions(+), 283 deletions(-)

--
1.7.9.5

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[PATCH 1/7] exynos4-is: Move the subdev group ID definitions to public header

2013-04-10 Thread Sylwester Nawrocki

Move the sub-device group ID definitions to the driver's public header
so they are available to other media drivers that need to share modules
found in exynos4-is.

Signed-off-by: Sylwester Nawrocki s.nawro...@samsung.com
Signed-off-by: Kyungmin Park kyungmin.p...@samsung.com
---
 drivers/media/platform/exynos4-is/media-dev.h |9 -
 include/media/s5p_fimc.h  |   11 +++
 2 files changed, 11 insertions(+), 9 deletions(-)

diff --git a/drivers/media/platform/exynos4-is/media-dev.h 
b/drivers/media/platform/exynos4-is/media-dev.h
index 0b14cd5..7f126c3 100644
--- a/drivers/media/platform/exynos4-is/media-dev.h
+++ b/drivers/media/platform/exynos4-is/media-dev.h
@@ -30,15 +30,6 @@
 
 #define PINCTRL_STATE_IDLE idle
 
-/* Group IDs of sensor, MIPI-CSIS, FIMC-LITE and the writeback subdevs. */
-#define GRP_ID_SENSOR  (1  8)
-#define GRP_ID_FIMC_IS_SENSOR  (1  9)
-#define GRP_ID_WRITEBACK   (1  10)
-#define GRP_ID_CSIS(1  11)
-#define GRP_ID_FIMC(1  12)
-#define GRP_ID_FLITE   (1  13)
-#define GRP_ID_FIMC_IS (1  14)
-
 #define FIMC_MAX_SENSORS   8
 #define FIMC_MAX_CAMCLKS   2
 
diff --git a/include/media/s5p_fimc.h b/include/media/s5p_fimc.h
index e316d15..f509690 100644
--- a/include/media/s5p_fimc.h
+++ b/include/media/s5p_fimc.h
@@ -49,6 +49,17 @@ enum fimc_bus_type {
 #define fimc_input_is_parallel(x) ((x) == 1 || (x) == 2)
 #define fimc_input_is_mipi_csi(x) ((x) == 3 || (x) == 4)
 
+/*
+ * The subdevices' group IDs.
+ */
+#define GRP_ID_SENSOR  (1  8)
+#define GRP_ID_FIMC_IS_SENSOR  (1  9)
+#define GRP_ID_WRITEBACK   (1  10)
+#define GRP_ID_CSIS(1  11)
+#define GRP_ID_FIMC(1  12)
+#define GRP_ID_FLITE   (1  13)
+#define GRP_ID_FIMC_IS (1  14)
+
 struct i2c_board_info;
 
 /**
-- 
1.7.9.5

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[PATCH 2/7] exynos4-is: Make fimc-lite independent of the pipeline-subdevs array

2013-04-10 Thread Sylwester Nawrocki

Get the sensor subdev by walking media graph in both cases: when the
device is used as a subdev only and through video node. This allows
to not dereference the pipeline-subdevs[] array and makes the module
more generic and easier to re-use in other media driver.

Signed-off-by: Sylwester Nawrocki s.nawro...@samsung.com
Signed-off-by: Kyungmin Park kyungmin.p...@samsung.com
---
 drivers/media/platform/exynos4-is/fimc-lite.c |   57 -
 1 file changed, 28 insertions(+), 29 deletions(-)

diff --git a/drivers/media/platform/exynos4-is/fimc-lite.c 
b/drivers/media/platform/exynos4-is/fimc-lite.c
index cb196b8..3ea4fc7 100644
--- a/drivers/media/platform/exynos4-is/fimc-lite.c
+++ b/drivers/media/platform/exynos4-is/fimc-lite.c
@@ -130,23 +130,43 @@ static const struct fimc_fmt *fimc_lite_find_format(const 
u32 *pixelformat,
return def_fmt;
 }
 
+/* Called with the media graph mutex held or @me stream_count  0. */
+static struct v4l2_subdev *__find_remote_sensor(struct media_entity *me)
+{
+   struct media_pad *pad = me-pads[0];
+   struct v4l2_subdev *sd;
+
+   while (pad-flags  MEDIA_PAD_FL_SINK) {
+   /* source pad */
+   pad = media_entity_remote_source(pad);
+   if (pad == NULL ||
+   media_entity_type(pad-entity) != MEDIA_ENT_T_V4L2_SUBDEV)
+   break;
+
+   sd = media_entity_to_v4l2_subdev(pad-entity);
+
+   if (sd-grp_id == GRP_ID_FIMC_IS_SENSOR ||
+   sd-grp_id == GRP_ID_SENSOR)
+   return sd;
+   /* sink pad */
+   pad = sd-entity.pads[0];
+   }
+   return NULL;
+}
+
 static int fimc_lite_hw_init(struct fimc_lite *fimc, bool isp_output)
 {
-   struct fimc_pipeline *pipeline = fimc-pipeline;
-   struct v4l2_subdev *sensor;
struct fimc_sensor_info *si;
unsigned long flags;
 
-   sensor = isp_output ? fimc-sensor : pipeline-subdevs[IDX_SENSOR];
-
-   if (sensor == NULL)
+   if (fimc-sensor == NULL)
return -ENXIO;
 
if (fimc-inp_frame.fmt == NULL || fimc-out_frame.fmt == NULL)
return -EINVAL;
 
/* Get sensor configuration data from the sensor subdev */
-   si = v4l2_get_subdev_hostdata(sensor);
+   si = v4l2_get_subdev_hostdata(fimc-sensor);
spin_lock_irqsave(fimc-slock, flags);
 
flite_hw_set_camera_bus(fimc, si-pdata);
@@ -801,6 +821,8 @@ static int fimc_lite_streamon(struct file *file, void *priv,
if (ret  0)
goto err_p_stop;
 
+   fimc-sensor = __find_remote_sensor(fimc-subdev.entity);
+
ret = vb2_ioctl_streamon(file, priv, type);
if (!ret) {
fimc-streaming = true;
@@ -929,29 +951,6 @@ static const struct v4l2_ioctl_ops fimc_lite_ioctl_ops = {
.vidioc_streamoff   = fimc_lite_streamoff,
 };
 
-/* Called with the media graph mutex held */
-static struct v4l2_subdev *__find_remote_sensor(struct media_entity *me)
-{
-   struct media_pad *pad = me-pads[0];
-   struct v4l2_subdev *sd;
-
-   while (pad-flags  MEDIA_PAD_FL_SINK) {
-   /* source pad */
-   pad = media_entity_remote_source(pad);
-   if (pad == NULL ||
-   media_entity_type(pad-entity) != MEDIA_ENT_T_V4L2_SUBDEV)
-   break;
-
-   sd = media_entity_to_v4l2_subdev(pad-entity);
-
-   if (sd-grp_id == GRP_ID_FIMC_IS_SENSOR)
-   return sd;
-   /* sink pad */
-   pad = sd-entity.pads[0];
-   }
-   return NULL;
-}
-
 /* Capture subdev media entity operations */
 static int fimc_lite_link_setup(struct media_entity *entity,
const struct media_pad *local,
-- 
1.7.9.5

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[PATCH 3/7] exynos4-is: Make fimc-lite independent on struct fimc_sensor_info

2013-04-10 Thread Sylwester Nawrocki

Make the sensor subdevs host_data hold a pointer to struct fimc_source_info,
which is defined in the driver's public header, rather than a pointer to
struct fimc_sensor_info which is specific to exynos4-is media device driver.

The purpose of this change is to allow easier reuse of the fimc-lite module
in the exynos5-is driver, which should similarly store a pointer to struct
fimc_source_info instance in the sensor's subdev host_data.

Signed-off-by: Sylwester Nawrocki s.nawro...@samsung.com
Signed-off-by: Kyungmin Park kyungmin.p...@samsung.com
---
 drivers/media/platform/exynos4-is/fimc-capture.c |7 +-
 drivers/media/platform/exynos4-is/fimc-lite.c|   10 ++-
 drivers/media/platform/exynos4-is/media-dev.c|   74 +++---
 drivers/media/platform/exynos4-is/media-dev.h|6 ++
 4 files changed, 54 insertions(+), 43 deletions(-)

diff --git a/drivers/media/platform/exynos4-is/fimc-capture.c 
b/drivers/media/platform/exynos4-is/fimc-capture.c
index 28c6b26..72c516a 100644
--- a/drivers/media/platform/exynos4-is/fimc-capture.c
+++ b/drivers/media/platform/exynos4-is/fimc-capture.c
@@ -1450,7 +1450,7 @@ static const struct media_entity_operations 
fimc_sd_media_ops = {
 void fimc_sensor_notify(struct v4l2_subdev *sd, unsigned int notification,
void *arg)
 {
-   struct fimc_sensor_info *sensor;
+   struct fimc_source_info *si;
struct fimc_vid_buffer *buf;
struct fimc_md *fmd;
struct fimc_dev *fimc;
@@ -1459,11 +1459,12 @@ void fimc_sensor_notify(struct v4l2_subdev *sd, 
unsigned int notification,
if (sd == NULL)
return;
 
-   sensor = v4l2_get_subdev_hostdata(sd);
+   si = v4l2_get_subdev_hostdata(sd);
fmd = entity_to_fimc_mdev(sd-entity);
 
spin_lock_irqsave(fmd-slock, flags);
-   fimc = sensor ? sensor-host : NULL;
+
+   fimc = si ? source_to_sensor_info(si)-host : NULL;
 
if (fimc  arg  notification == S5P_FIMC_TX_END_NOTIFY 
test_bit(ST_CAPT_PEND, fimc-state)) {
diff --git a/drivers/media/platform/exynos4-is/fimc-lite.c 
b/drivers/media/platform/exynos4-is/fimc-lite.c
index 3ea4fc7..661d0d1 100644
--- a/drivers/media/platform/exynos4-is/fimc-lite.c
+++ b/drivers/media/platform/exynos4-is/fimc-lite.c
@@ -11,6 +11,7 @@
 #define pr_fmt(fmt) %s:%d  fmt, __func__, __LINE__
 
 #include linux/bug.h
+#include linux/clk.h
 #include linux/device.h
 #include linux/errno.h
 #include linux/interrupt.h
@@ -31,7 +32,7 @@
 #include media/videobuf2-dma-contig.h
 #include media/s5p_fimc.h
 
-#include media-dev.h
+#include fimc-core.h
 #include fimc-lite.h
 #include fimc-lite-reg.h
 
@@ -156,7 +157,7 @@ static struct v4l2_subdev *__find_remote_sensor(struct 
media_entity *me)
 
 static int fimc_lite_hw_init(struct fimc_lite *fimc, bool isp_output)
 {
-   struct fimc_sensor_info *si;
+   struct fimc_source_info *si;
unsigned long flags;
 
if (fimc-sensor == NULL)
@@ -167,9 +168,12 @@ static int fimc_lite_hw_init(struct fimc_lite *fimc, bool 
isp_output)
 
/* Get sensor configuration data from the sensor subdev */
si = v4l2_get_subdev_hostdata(fimc-sensor);
+   if (!si)
+   return -EINVAL;
+
spin_lock_irqsave(fimc-slock, flags);
 
-   flite_hw_set_camera_bus(fimc, si-pdata);
+   flite_hw_set_camera_bus(fimc, si);
flite_hw_set_source_format(fimc, fimc-inp_frame);
flite_hw_set_window_offset(fimc, fimc-inp_frame);
flite_hw_set_output_dma(fimc, fimc-out_frame, !isp_output);
diff --git a/drivers/media/platform/exynos4-is/media-dev.c 
b/drivers/media/platform/exynos4-is/media-dev.c
index 44d6c1d..1dbd554 100644
--- a/drivers/media/platform/exynos4-is/media-dev.c
+++ b/drivers/media/platform/exynos4-is/media-dev.c
@@ -37,7 +37,7 @@
 #include mipi-csis.h
 
 static int __fimc_md_set_camclk(struct fimc_md *fmd,
-   struct fimc_sensor_info *s_info,
+   struct fimc_source_info *si,
bool on);
 /**
  * fimc_pipeline_prepare - update pipeline information with subdevice pointers
@@ -281,36 +281,36 @@ static const struct fimc_pipeline_ops fimc_pipeline_ops = 
{
  * Sensor subdevice helper functions
  */
 static struct v4l2_subdev *fimc_md_register_sensor(struct fimc_md *fmd,
-  struct fimc_sensor_info *s_info)
+   struct fimc_source_info *si)
 {
struct i2c_adapter *adapter;
struct v4l2_subdev *sd = NULL;
 
-   if (!s_info || !fmd)
+   if (!si || !fmd)
return NULL;
/*
 * If FIMC bus type is not Writeback FIFO assume it is same
 * as sensor_bus_type.
 */
-   s_info-pdata.fimc_bus_type = s_info-pdata.sensor_bus_type;
+   si-fimc_bus_type = si-sensor_bus_type;
 
-   adapter = i2c_get_adapter(s_info-pdata.i2c_bus_num);
+   adapter =

[PATCH 4/7] exynos4-is: Improve the ISP chain parameter count calculation

2013-04-10 Thread Sylwester Nawrocki

Instead of incrementing p_region_num field each time we set a bit
in the parameter mask calculate the number of bits set only when
this information is needed.

Signed-off-by: Sylwester Nawrocki s.nawro...@samsung.com
Signed-off-by: Kyungmin Park kyungmin.p...@samsung.com
---
 drivers/media/platform/exynos4-is/fimc-is-param.c |   86 +++--
 drivers/media/platform/exynos4-is/fimc-is-param.h |4 +-
 drivers/media/platform/exynos4-is/fimc-is-regs.c  |3 +-
 drivers/media/platform/exynos4-is/fimc-is.c   |2 -
 drivers/media/platform/exynos4-is/fimc-is.h   |1 -
 drivers/media/platform/exynos4-is/fimc-isp.c  |7 +-
 6 files changed, 34 insertions(+), 69 deletions(-)

diff --git a/drivers/media/platform/exynos4-is/fimc-is-param.c 
b/drivers/media/platform/exynos4-is/fimc-is-param.c
index 37fd5fe..58123e3 100644
--- a/drivers/media/platform/exynos4-is/fimc-is-param.c
+++ b/drivers/media/platform/exynos4-is/fimc-is-param.c
@@ -12,14 +12,15 @@
  */
 #define pr_fmt(fmt) %s:%d  fmt, __func__, __LINE__
 
+#include linux/bitops.h
 #include linux/bug.h
 #include linux/device.h
 #include linux/errno.h
 #include linux/kernel.h
 #include linux/module.h
-#include linux/types.h
 #include linux/platform_device.h
 #include linux/slab.h
+#include linux/types.h
 #include linux/videodev2.h
 
 #include media/v4l2-device.h
@@ -160,6 +161,20 @@ int __fimc_is_hw_update_param(struct fimc_is *is, u32 
offset)
return 0;
 }
 
+unsigned int __get_pending_param_count(struct fimc_is *is)
+{
+   struct is_config_param *config = is-cfg_param[is-scenario_id];
+   unsigned long flags;
+   unsigned int count;
+
+   spin_lock_irqsave(is-slock, flags);
+   count = hweight32(config-p_region_index1);
+   count += hweight32(config-p_region_index2);
+   spin_unlock_irqrestore(is-slock, flags);
+
+   return count;
+}
+
 int __is_hw_update_params(struct fimc_is *is)
 {
unsigned long *p_index1, *p_index2;
@@ -234,15 +249,10 @@ void __is_set_frame_size(struct fimc_is *is, struct 
v4l2_mbus_framefmt *mf)
 
/* Update field */
fimc_is_set_param_bit(is, PARAM_ISP_OTF_INPUT);
-   fimc_is_inc_param_num(is);
fimc_is_set_param_bit(is, PARAM_ISP_OTF_OUTPUT);
-   fimc_is_inc_param_num(is);
fimc_is_set_param_bit(is, PARAM_DRC_OTF_INPUT);
-   fimc_is_inc_param_num(is);
fimc_is_set_param_bit(is, PARAM_DRC_OTF_OUTPUT);
-   fimc_is_inc_param_num(is);
fimc_is_set_param_bit(is, PARAM_FD_OTF_INPUT);
-   fimc_is_inc_param_num(is);
 }
 
 int fimc_is_hw_get_sensor_max_framerate(struct fimc_is *is)
@@ -277,14 +287,11 @@ void __is_set_sensor(struct fimc_is *is, int fps)
isp-otf_input.frametime_max = (u32)100 / fps;
}
 
-   if (!test_bit(PARAM_SENSOR_FRAME_RATE, p_index)) {
+   if (!test_bit(PARAM_SENSOR_FRAME_RATE, p_index))
fimc_is_set_param_bit(is, PARAM_SENSOR_FRAME_RATE);
-   fimc_is_inc_param_num(is);
-   }
-   if (!test_bit(PARAM_ISP_OTF_INPUT, p_index)) {
+
+   if (!test_bit(PARAM_ISP_OTF_INPUT, p_index))
fimc_is_set_param_bit(is, PARAM_ISP_OTF_INPUT);
-   fimc_is_inc_param_num(is);
-   }
 }
 
 void __is_set_init_isp_aa(struct fimc_is *is)
@@ -306,7 +313,6 @@ void __is_set_init_isp_aa(struct fimc_is *is)
isp-aa.err = ISP_AF_ERROR_NONE;
 
fimc_is_set_param_bit(is, PARAM_ISP_AA);
-   fimc_is_inc_param_num(is);
 }
 
 void __is_set_isp_flash(struct fimc_is *is, u32 cmd, u32 redeye)
@@ -319,10 +325,8 @@ void __is_set_isp_flash(struct fimc_is *is, u32 cmd, u32 
redeye)
isp-flash.redeye = redeye;
isp-flash.err = ISP_FLASH_ERROR_NONE;
 
-   if (!test_bit(PARAM_ISP_FLASH, cfg-p_region_index1)) {
+   if (!test_bit(PARAM_ISP_FLASH, cfg-p_region_index1))
fimc_is_set_param_bit(is, PARAM_ISP_FLASH);
-   fimc_is_inc_param_num(is);
-   }
 }
 
 void __is_set_isp_awb(struct fimc_is *is, u32 cmd, u32 val)
@@ -338,10 +342,8 @@ void __is_set_isp_awb(struct fimc_is *is, u32 cmd, u32 val)
isp-awb.illumination = val;
isp-awb.err = ISP_AWB_ERROR_NONE;
 
-   if (!test_bit(PARAM_ISP_AWB, p_index)) {
+   if (!test_bit(PARAM_ISP_AWB, p_index))
fimc_is_set_param_bit(is, PARAM_ISP_AWB);
-   fimc_is_inc_param_num(is);
-   }
 }
 
 void __is_set_isp_effect(struct fimc_is *is, u32 cmd)
@@ -356,10 +358,8 @@ void __is_set_isp_effect(struct fimc_is *is, u32 cmd)
isp-effect.cmd = cmd;
isp-effect.err = ISP_IMAGE_EFFECT_ERROR_NONE;
 
-   if (!test_bit(PARAM_ISP_IMAGE_EFFECT, p_index)) {
+   if (!test_bit(PARAM_ISP_IMAGE_EFFECT, p_index))
fimc_is_set_param_bit(is, PARAM_ISP_IMAGE_EFFECT);
-   fimc_is_inc_param_num(is);
-   }
 }
 
 void __is_set_isp_iso(struct fimc_is *is, u32 cmd, u32 val)
@@ -375,10 +375,8 @@ void __is_set_isp_iso(struct fimc_is *is, u32 cmd, u32

[PATCH 6/7] exynos4-is: Remove meaningless test before bit setting

2013-04-10 Thread Sylwester Nawrocki

There is no need to check same bit before setting it, since we
always end up with a bit set. Remove some of the tests and make
set unconditional, in every place where all that needs to be done
is just setting a bit.

Signed-off-by: Sylwester Nawrocki s.nawro...@samsung.com
Signed-off-by: Kyungmin Park kyungmin.p...@samsung.com
---
 drivers/media/platform/exynos4-is/fimc-is-param.c |   40 +
 1 file changed, 9 insertions(+), 31 deletions(-)

diff --git a/drivers/media/platform/exynos4-is/fimc-is-param.c 
b/drivers/media/platform/exynos4-is/fimc-is-param.c
index 254740f..53fe2a2 100644
--- a/drivers/media/platform/exynos4-is/fimc-is-param.c
+++ b/drivers/media/platform/exynos4-is/fimc-is-param.c
@@ -269,9 +269,7 @@ void __is_set_sensor(struct fimc_is *is, int fps)
unsigned int index = is-config_index;
struct sensor_param *sensor;
struct isp_param *isp;
-   unsigned long *p_index;
 
-   p_index = is-config[index].p_region_index1;
sensor = is-config[index].sensor;
isp = is-config[index].isp;
 
@@ -286,11 +284,8 @@ void __is_set_sensor(struct fimc_is *is, int fps)
isp-otf_input.frametime_max = (u32)100 / fps;
}
 
-   if (!test_bit(PARAM_SENSOR_FRAME_RATE, p_index))
-   fimc_is_set_param_bit(is, PARAM_SENSOR_FRAME_RATE);
-
-   if (!test_bit(PARAM_ISP_OTF_INPUT, p_index))
-   fimc_is_set_param_bit(is, PARAM_ISP_OTF_INPUT);
+   fimc_is_set_param_bit(is, PARAM_SENSOR_FRAME_RATE);
+   fimc_is_set_param_bit(is, PARAM_ISP_OTF_INPUT);
 }
 
 void __is_set_init_isp_aa(struct fimc_is *is)
@@ -317,65 +312,54 @@ void __is_set_init_isp_aa(struct fimc_is *is)
 void __is_set_isp_flash(struct fimc_is *is, u32 cmd, u32 redeye)
 {
unsigned int index = is-config_index;
-   struct chain_config *cfg = is-config[index];
-   struct isp_param *isp = cfg-isp;
+   struct isp_param *isp = is-config[index].isp;
 
isp-flash.cmd = cmd;
isp-flash.redeye = redeye;
isp-flash.err = ISP_FLASH_ERROR_NONE;
 
-   if (!test_bit(PARAM_ISP_FLASH, cfg-p_region_index1))
-   fimc_is_set_param_bit(is, PARAM_ISP_FLASH);
+   fimc_is_set_param_bit(is, PARAM_ISP_FLASH);
 }
 
 void __is_set_isp_awb(struct fimc_is *is, u32 cmd, u32 val)
 {
unsigned int index = is-config_index;
struct isp_param *isp;
-   unsigned long *p_index;
 
-   p_index = is-config[index].p_region_index1;
isp = is-config[index].isp;
 
isp-awb.cmd = cmd;
isp-awb.illumination = val;
isp-awb.err = ISP_AWB_ERROR_NONE;
 
-   if (!test_bit(PARAM_ISP_AWB, p_index))
-   fimc_is_set_param_bit(is, PARAM_ISP_AWB);
+   fimc_is_set_param_bit(is, PARAM_ISP_AWB);
 }
 
 void __is_set_isp_effect(struct fimc_is *is, u32 cmd)
 {
unsigned int index = is-config_index;
struct isp_param *isp;
-   unsigned long *p_index;
 
-   p_index = is-config[index].p_region_index1;
isp = is-config[index].isp;
 
isp-effect.cmd = cmd;
isp-effect.err = ISP_IMAGE_EFFECT_ERROR_NONE;
 
-   if (!test_bit(PARAM_ISP_IMAGE_EFFECT, p_index))
-   fimc_is_set_param_bit(is, PARAM_ISP_IMAGE_EFFECT);
+   fimc_is_set_param_bit(is, PARAM_ISP_IMAGE_EFFECT);
 }
 
 void __is_set_isp_iso(struct fimc_is *is, u32 cmd, u32 val)
 {
unsigned int index = is-config_index;
struct isp_param *isp;
-   unsigned long *p_index;
 
-   p_index = is-config[index].p_region_index1;
isp = is-config[index].isp;
 
isp-iso.cmd = cmd;
isp-iso.value = val;
isp-iso.err = ISP_ISO_ERROR_NONE;
 
-   if (!test_bit(PARAM_ISP_ISO, p_index))
-   fimc_is_set_param_bit(is, PARAM_ISP_ISO);
+   fimc_is_set_param_bit(is, PARAM_ISP_ISO);
 }
 
 void __is_set_isp_adjust(struct fimc_is *is, u32 cmd, u32 val)
@@ -464,32 +448,26 @@ void __is_set_isp_afc(struct fimc_is *is, u32 cmd, u32 
val)
 {
unsigned int index = is-config_index;
struct isp_param *isp;
-   unsigned long *p_index;
 
-   p_index = is-config[index].p_region_index1;
isp = is-config[index].isp;
 
isp-afc.cmd = cmd;
isp-afc.manual = val;
isp-afc.err = ISP_AFC_ERROR_NONE;
 
-   if (!test_bit(PARAM_ISP_AFC, p_index))
-   fimc_is_set_param_bit(is, PARAM_ISP_AFC);
+   fimc_is_set_param_bit(is, PARAM_ISP_AFC);
 }
 
 void __is_set_drc_control(struct fimc_is *is, u32 val)
 {
unsigned int index = is-config_index;
struct drc_param *drc;
-   unsigned long *p_index;
 
-   p_index = is-config[index].p_region_index1;
drc = is-config[index].drc;
 
drc-control.bypass = val;
 
-   if (!test_bit(PARAM_DRC_CONTROL, p_index))
-   fimc_is_set_param_bit(is, PARAM_DRC_CONTROL);
+   fimc_is_set_param_bit(is, PARAM_DRC_CONTROL);
 }
 
 void __is_set_fd_control(struct fimc_is *is, u32 val)
-- 
1.7.9.5

--
To

Re: [PATCH] rtc: rtc-s3c: use clk_prepare_enable and clk_disable_unprepare

2013-04-10 Thread Vivek Gautam

On Wed, Apr 10, 2013 at 3:20 PM, Sylwester Nawrocki
s.nawro...@samsung.com wrote:
 On 04/09/2013 04:27 PM, Vivek Gautam wrote:
 From: Thomas Abraham thomas.abra...@linaro.org

 Convert clk_enable/clk_disable to clk_prepare_enable/clk_disable_unprepare
 calls as required by common clock framework.

 Signed-off-by: Thomas Abraham thomas.abra...@linaro.org
 Signed-off-by: Vivek Gautam gautam.vi...@samsung.com

 Thanks Vivek.

your welcome  :-)


 Reviewed-by: Sylwester Nawrocki s.nawro...@samsung.com




-- 
Thanks  Regards
Vivek
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Re: [PATCH] pinctrl: Add pinctrl-s3c24xx driver

2013-04-10 Thread Heiko Stübner

Hi Tomasz,

thanks for your comments, more inline.


Am Mittwoch, 10. April 2013, 12:36:39 schrieb Tomasz Figa:
 Hi Heiko,
 
 Basically looks good to me, but please see my inline comments about
 handling of EINT0-3.
 
 On Wednesday 10 of April 2013 01:35:12 Heiko Stübner wrote:
  The s3c24xx pins follow a similar pattern as the other Samsung SoCs and
  can therefore reuse the already introduced infrastructure.

[...]

  +struct s3c24xx_eint_data {
  +   struct samsung_pinctrl_drv_data *drvdata;
  +   struct irq_domain *domains[NUM_EINT];
  +   int parents[NUM_EINT_IRQ];
  +};
  +
  +struct s3c24xx_eint_domain_data {
  +   struct samsung_pin_bank *bank;
  +   struct s3c24xx_eint_data *eint_data;
 
 What about:
 
 + bool eint0_3_parent_only;
 
 (or whatever name would be more appropriate), which would store the
 information about the s3c24xx-specific quirk in 24xx-specific data
 structure, without the need to add another field to the generic
 samsung_pinctrl_drv_data structure?
 
 See my further comments on how I would see using this field in interrupt
 handling code.

ok, sounds good, especially gathering the type from the wakeup-int property

  +};

[...]

 Now I would split the following 3 functions into two sets of 3 functions,
 one set for s3c2412 and other for remaining SoCs and make separate EINT0-3
 IRQ chips for both cases.

Not doing the decision every time, might bring some very slight speed 
improvements, so is probably the right way to go.

  +
  +static void s3c24xx_eint0_3_ack(struct irq_data *data)
  +{
  +   struct samsung_pin_bank *bank = irq_data_get_irq_chip_data(data);
  +   struct samsung_pinctrl_drv_data *d = bank-drvdata;
  +   struct s3c24xx_eint_domain_data *ddata = bank-irq_domain-
 
 host_data;
 
  +   struct s3c24xx_eint_data *eint_data = ddata-eint_data;
  +   int parent_irq = eint_data-parents[data-hwirq];
  +   struct irq_chip *parent_chip = irq_get_chip(parent_irq);
  +
  +   if (d-ctrl-type == S3C2412) {
  +   unsigned long bitval = 1UL  data-hwirq;
  +   writel(bitval, d-virt_base + EINTPEND_REG);
  +   }
  +
  +   if (parent_chip-irq_ack)
  +   parent_chip-irq_ack(irq_get_irq_data(parent_irq));
 
 Btw. Is this parent level acking really needed here?

Depends. If using chained_irq_* of course not, but if the irq-handler should 
stay in charge of when to ack it might be better this way.

Generic s3c24xx SoCs need acking in the main controller only, while s3c2412 
needs acking in both the main controller and eintpend.

  +}

[...]

  +static void s3c24xx_demux_eint0_3(unsigned int irq, struct irq_desc
  *desc) +{
  +   struct irq_data *data = irq_desc_get_irq_data(desc);
  +   struct s3c24xx_eint_data *eint_data = irq_get_handler_data(irq);
  +   unsigned int virq;
  +
 
 Instead of acking the interrupt at parent chip from ack callback of
 EINT0_3 chip, I would rather use chained_irq_enter() here...
 
  +   /* the first 4 eints have a simple 1 to 1 mapping */
  +   virq = irq_linear_revmap(eint_data-domains[data-hwirq],
  data-hwirq); + /* Something must be really wrong if an unmapped
 
 EINT
 
  +* was unmasked...
  +*/
  +   BUG_ON(!virq);
  +
  +   generic_handle_irq(virq);
 
 ...and chained_irq_exit() here.

If I understand it correctly, the way chained_irq_* works it would limit the 
eints to a level style handling. With the way it's currently the whole 
determination of when to ack,mask and unmask is completely for the real 
handler (edge or level) to decide, as the original interrupt gets completely 
forwarded into the irq-domain without further constraints.

So, after the change on regular s3c24xx SoCs when the real irq handler wants 
to ack the irq, it would be a no-op, as it would already have been acked by 
chained_irq_enter.

Masking might be even more interesting. Currently control is transfered 
completely to the pinctrl irq-domain, which then controls the masking of the 
interrupt thru the parent-calls - on regular s3c24xx the masking of these is 
also only done in the main controller.

When using chained_irq_* it also wants to mask the interrupt which might 
conflict with regular enable_irq/disable_irq calls being done for example in 
driver code.


So in short I agree with the earlier split of the irqchip, but would keep the 
irq operations themself centralized in the pinctrl driver, instead of using 
chained_irq_* functions.


Heiko
 

  +}
  +
  +static inline void s3c24xx_demux_eint(unsigned int irq, struct irq_desc
  *desc, +  u32 offset, u32 range)
  +{
  +   struct irq_chip *chip = irq_get_chip(irq);
  +   struct s3c24xx_eint_data *data = irq_get_handler_data(irq);
  +   struct samsung_pinctrl_drv_data *d = data-drvdata;
  +   unsigned int pend, mask;
  +
  +   chained_irq_enter(chip, desc);
  +
  +   pend = readl(d-virt_base + EINTPEND_REG);
  +   mask = readl(d-virt_base + EINTMASK_REG);
  +
  +   pend = ~mask;
  +   pend = range;
  +
  +   while (pend) {
  +   unsigned

Re: [PATCH] pinctrl: Add pinctrl-s3c24xx driver

2013-04-10 Thread Tomasz Figa

On Wednesday 10 of April 2013 14:20:22 Heiko Stübner wrote:
 Hi Tomasz,
 
 thanks for your comments, more inline.
 
 Am Mittwoch, 10. April 2013, 12:36:39 schrieb Tomasz Figa:
  Hi Heiko,
  
  Basically looks good to me, but please see my inline comments about
  handling of EINT0-3.
  
  On Wednesday 10 of April 2013 01:35:12 Heiko Stübner wrote:
   The s3c24xx pins follow a similar pattern as the other Samsung SoCs
   and
   can therefore reuse the already introduced infrastructure.
 
 [...]
 
   +struct s3c24xx_eint_data {
   + struct samsung_pinctrl_drv_data *drvdata;
   + struct irq_domain *domains[NUM_EINT];
   + int parents[NUM_EINT_IRQ];
   +};
   +
   +struct s3c24xx_eint_domain_data {
   + struct samsung_pin_bank *bank;
   + struct s3c24xx_eint_data *eint_data;
  
  What about:
  
  +   bool eint0_3_parent_only;
  
  (or whatever name would be more appropriate), which would store the
  information about the s3c24xx-specific quirk in 24xx-specific data
  structure, without the need to add another field to the generic
  samsung_pinctrl_drv_data structure?
  
  See my further comments on how I would see using this field in
  interrupt handling code.
 
 ok, sounds good, especially gathering the type from the wakeup-int
 property
   +};
 
 [...]
 
  Now I would split the following 3 functions into two sets of 3
  functions, one set for s3c2412 and other for remaining SoCs and make
  separate EINT0-3 IRQ chips for both cases.
 
 Not doing the decision every time, might bring some very slight speed
 improvements, so is probably the right way to go.
 
   +
   +static void s3c24xx_eint0_3_ack(struct irq_data *data)
   +{
   + struct samsung_pin_bank *bank = irq_data_get_irq_chip_data(data);
   + struct samsung_pinctrl_drv_data *d = bank-drvdata;
   + struct s3c24xx_eint_domain_data *ddata = bank-irq_domain-
  
  host_data;
  
   + struct s3c24xx_eint_data *eint_data = ddata-eint_data;
   + int parent_irq = eint_data-parents[data-hwirq];
   + struct irq_chip *parent_chip = irq_get_chip(parent_irq);
   +
   + if (d-ctrl-type == S3C2412) {
   + unsigned long bitval = 1UL  data-hwirq;
   + writel(bitval, d-virt_base + EINTPEND_REG);
   + }
   +
   + if (parent_chip-irq_ack)
   + parent_chip-irq_ack(irq_get_irq_data(parent_irq));
  
  Btw. Is this parent level acking really needed here?
 
 Depends. If using chained_irq_* of course not, but if the irq-handler
 should stay in charge of when to ack it might be better this way.
 
 Generic s3c24xx SoCs need acking in the main controller only, while
 s3c2412 needs acking in both the main controller and eintpend.
 
   +}
 
 [...]
 
   +static void s3c24xx_demux_eint0_3(unsigned int irq, struct irq_desc
   *desc) +{
   + struct irq_data *data = irq_desc_get_irq_data(desc);
   + struct s3c24xx_eint_data *eint_data = irq_get_handler_data(irq);
   + unsigned int virq;
   +
  
  Instead of acking the interrupt at parent chip from ack callback of
  EINT0_3 chip, I would rather use chained_irq_enter() here...
  
   + /* the first 4 eints have a simple 1 to 1 mapping */
   + virq = irq_linear_revmap(eint_data-domains[data-hwirq],
   data-hwirq); +   /* Something must be really wrong if an unmapped
  
  EINT
  
   +  * was unmasked...
   +  */
   + BUG_ON(!virq);
   +
   + generic_handle_irq(virq);
  
  ...and chained_irq_exit() here.
 
 If I understand it correctly, the way chained_irq_* works it would limit
 the eints to a level style handling. With the way it's currently the
 whole determination of when to ack,mask and unmask is completely for
 the real handler (edge or level) to decide, as the original interrupt
 gets completely forwarded into the irq-domain without further
 constraints.
 
 So, after the change on regular s3c24xx SoCs when the real irq handler
 wants to ack the irq, it would be a no-op, as it would already have
 been acked by chained_irq_enter.
 
 Masking might be even more interesting. Currently control is transfered
 completely to the pinctrl irq-domain, which then controls the masking of
 the interrupt thru the parent-calls - on regular s3c24xx the masking of
 these is also only done in the main controller.
 
 When using chained_irq_* it also wants to mask the interrupt which might
 conflict with regular enable_irq/disable_irq calls being done for
 example in driver code.
 
 
 So in short I agree with the earlier split of the irqchip, but would
 keep the irq operations themself centralized in the pinctrl driver,
 instead of using chained_irq_* functions.
 

Right, my solution wouldn't work properly in case of regular s3c24xx and 
edge triggered interrupts. 

However I'm still wondering if it's OK to manually call parent chip 
operations in case of s3c2416. This would imply the same operation calling 
order as imposed by flow handler of the chained EINT (which can be 
handle_edge_irq), while the parent chip is probably level triggered, isn't 
it?

Best regards,
Tomasz

 
 Heiko
 
   +}
   +
   +static inline void

Re: [PATCH v4] mmc: dw_mmc: let device core setup the default pin configuration

2013-04-10 Thread Thomas Abraham

On 10 April 2013 05:00, Doug Anderson diand...@chromium.org wrote:
 Thomas,

 On Mon, Apr 8, 2013 at 10:59 PM, Thomas Abraham
 thomas.abra...@linaro.org wrote:
 @@ -2002,7 +1994,7 @@ static int dw_mci_init_slot(struct dw_mci *host, 
 unsigned int id)
 if (ret) {
 dev_err(host-dev,
 failed to enable regulator: %d\n, ret);
 -   goto err_setup_bus;
 +   return ret;

 It seems like you'd need a mmc_free_host(mmc); in this case don't
 you?  AKA: this should be a goto and not a return.

Hi Doug,

The call to regulator_enable() is prior to the call to mmc_add_host().
Hence, call to mmc_fre_host is not required in this case. So the above
change should be right.

Thanks,
Thomas.


 -Doug
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Re: [PATCH RESEND] ARM: EXYNOS: no more support non-DT for EXYNOS SoCs

2013-04-10 Thread Arnd Bergmann

On Wednesday 10 April 2013, Sylwester Nawrocki wrote:
 On 04/10/2013 12:34 PM, Kukjin Kim wrote:
  Kukjin Kim wrote:
 
  From: Kukjin Kim kgene@samsung.com
 
  As we discussed in mailing list, non-DT for EXYNOS SoCs will not be
  supported from v3.10. This patch removes regarding files for non-DT
  including board files.
 
  Signed-off-by: Kukjin Kim kgene@samsung.com
 
 It looks OK to me.

Ok. I am currently rebuilding my exynos multiplatform series on top of the
branches merged yesterday, but keeping ATAGS support alive there.

Should I rebase on top of this patch instead?

Arnd
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Re: [PATCH v5 1/3] of/pci: Unify pci_process_bridge_OF_ranges from Microblaze and PowerPC

2013-04-10 Thread Rob Herring

Adding Ben H and Michal...

On 04/10/2013 02:29 AM, Andrew Murray wrote:
 The pci_process_bridge_OF_ranges function, used to parse the ranges
 property of a PCI host device, is found in both Microblaze and PowerPC
 architectures. These implementations are nearly identical. This patch
 moves this common code to a common place.
 
 Signed-off-by: Andrew Murray andrew.mur...@arm.com
 Signed-off-by: Liviu Dudau liviu.du...@arm.com

One comment below. Otherwise,

Reviewed-by: Rob Herring rob.herr...@calxeda.com

You need also need acks from Ben and Michal.

[...]

 + /* Act based on address space type */
 + res = NULL;
 + switch ((pci_space  24)  0x3) {
 + case 1: /* PCI IO space */
 + pr_info(  IO 0x%016llx..0x%016llx - 0x%016llx\n,
 +cpu_addr, cpu_addr + size - 1, pci_addr);
 +
 + /* We support only one IO range */
 + if (hose-pci_io_size) {
 + pr_info( \\-- Skipped (too many) !\n);
 + continue;
 + }
 +#if defined(CONFIG_PPC32) || defined(CONFIG_MICROBLAZE)

How about if (!IS_ENABLED(CONFIG_64BIT)) instead.

 + /* On 32 bits, limit I/O space to 16MB */
 + if (size  0x0100)
 + size = 0x0100;
 +
 + /* 32 bits needs to map IOs here */
 + hose-io_base_virt = ioremap(cpu_addr, size);
 +
 + /* Expect trouble if pci_addr is not 0 */
 + if (primary)
 + isa_io_base =
 + (unsigned long)hose-io_base_virt;
 +#endif /* CONFIG_PPC32 || CONFIG_MICROBLAZE */
 + /* pci_io_size and io_base_phys always represent IO
 +  * space starting at 0 so we factor in pci_addr
 +  */
 + hose-pci_io_size = pci_addr + size;
 + hose-io_base_phys = cpu_addr - pci_addr;

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Re: [PATCH] pinctrl: Add pinctrl-s3c24xx driver

2013-04-10 Thread Heiko Stübner

Am Mittwoch, 10. April 2013, 14:31:29 schrieb Tomasz Figa:
 On Wednesday 10 of April 2013 14:20:22 Heiko Stübner wrote:
  Hi Tomasz,
  
  thanks for your comments, more inline.
  
  Am Mittwoch, 10. April 2013, 12:36:39 schrieb Tomasz Figa:
   Hi Heiko,
   
   Basically looks good to me, but please see my inline comments about
   handling of EINT0-3.
   
   On Wednesday 10 of April 2013 01:35:12 Heiko Stübner wrote:
The s3c24xx pins follow a similar pattern as the other Samsung SoCs
and
can therefore reuse the already introduced infrastructure.
  
  [...]
  
+struct s3c24xx_eint_data {
+   struct samsung_pinctrl_drv_data *drvdata;
+   struct irq_domain *domains[NUM_EINT];
+   int parents[NUM_EINT_IRQ];
+};
+
+struct s3c24xx_eint_domain_data {
+   struct samsung_pin_bank *bank;
+   struct s3c24xx_eint_data *eint_data;
   
   What about:
   
   + bool eint0_3_parent_only;
   
   (or whatever name would be more appropriate), which would store the
   information about the s3c24xx-specific quirk in 24xx-specific data
   structure, without the need to add another field to the generic
   samsung_pinctrl_drv_data structure?
   
   See my further comments on how I would see using this field in
   interrupt handling code.
  
  ok, sounds good, especially gathering the type from the wakeup-int
  property
  
+};
  
  [...]
  
   Now I would split the following 3 functions into two sets of 3
   functions, one set for s3c2412 and other for remaining SoCs and make
   separate EINT0-3 IRQ chips for both cases.
  
  Not doing the decision every time, might bring some very slight speed
  improvements, so is probably the right way to go.
  
+
+static void s3c24xx_eint0_3_ack(struct irq_data *data)
+{
+   struct samsung_pin_bank *bank = 
irq_data_get_irq_chip_data(data);
+   struct samsung_pinctrl_drv_data *d = bank-drvdata;
+   struct s3c24xx_eint_domain_data *ddata = bank-irq_domain-
   
   host_data;
   
+   struct s3c24xx_eint_data *eint_data = ddata-eint_data;
+   int parent_irq = eint_data-parents[data-hwirq];
+   struct irq_chip *parent_chip = irq_get_chip(parent_irq);
+
+   if (d-ctrl-type == S3C2412) {
+   unsigned long bitval = 1UL  data-hwirq;
+   writel(bitval, d-virt_base + EINTPEND_REG);
+   }
+
+   if (parent_chip-irq_ack)
+   parent_chip-irq_ack(irq_get_irq_data(parent_irq));
   
   Btw. Is this parent level acking really needed here?
  
  Depends. If using chained_irq_* of course not, but if the irq-handler
  should stay in charge of when to ack it might be better this way.
  
  Generic s3c24xx SoCs need acking in the main controller only, while
  s3c2412 needs acking in both the main controller and eintpend.
  
+}
  
  [...]
  
+static void s3c24xx_demux_eint0_3(unsigned int irq, struct irq_desc
*desc) +{
+   struct irq_data *data = irq_desc_get_irq_data(desc);
+   struct s3c24xx_eint_data *eint_data = irq_get_handler_data(irq);
+   unsigned int virq;
+
   
   Instead of acking the interrupt at parent chip from ack callback of
   EINT0_3 chip, I would rather use chained_irq_enter() here...
   
+   /* the first 4 eints have a simple 1 to 1 mapping */
+   virq = irq_linear_revmap(eint_data-domains[data-hwirq],
data-hwirq); + /* Something must be really wrong if an unmapped
   
   EINT
   
+* was unmasked...
+*/
+   BUG_ON(!virq);
+
+   generic_handle_irq(virq);
   
   ...and chained_irq_exit() here.
  
  If I understand it correctly, the way chained_irq_* works it would limit
  the eints to a level style handling. With the way it's currently the
  whole determination of when to ack,mask and unmask is completely for
  the real handler (edge or level) to decide, as the original interrupt
  gets completely forwarded into the irq-domain without further
  constraints.
  
  So, after the change on regular s3c24xx SoCs when the real irq handler
  wants to ack the irq, it would be a no-op, as it would already have
  been acked by chained_irq_enter.
  
  Masking might be even more interesting. Currently control is transfered
  completely to the pinctrl irq-domain, which then controls the masking of
  the interrupt thru the parent-calls - on regular s3c24xx the masking of
  these is also only done in the main controller.
  
  When using chained_irq_* it also wants to mask the interrupt which might
  conflict with regular enable_irq/disable_irq calls being done for
  example in driver code.
  
  
  So in short I agree with the earlier split of the irqchip, but would
  keep the irq operations themself centralized in the pinctrl driver,
  instead of using chained_irq_* functions.
 
 Right, my solution wouldn't work properly in case of regular s3c24xx and
 edge triggered interrupts.
 
 However I'm still

Re: [PATCH RESEND] ARM: EXYNOS: no more support non-DT for EXYNOS SoCs

2013-04-10 Thread Sylwester Nawrocki

On 04/10/2013 02:59 PM, Arnd Bergmann wrote:
 On Wednesday 10 April 2013, Sylwester Nawrocki wrote:
 On 04/10/2013 12:34 PM, Kukjin Kim wrote:
 Kukjin Kim wrote:

 From: Kukjin Kim kgene@samsung.com

 As we discussed in mailing list, non-DT for EXYNOS SoCs will not be
 supported from v3.10. This patch removes regarding files for non-DT
 including board files.

 Signed-off-by: Kukjin Kim kgene@samsung.com

 It looks OK to me.
 
 Ok. I am currently rebuilding my exynos multiplatform series on top of the
 branches merged yesterday, but keeping ATAGS support alive there.
 
 Should I rebase on top of this patch instead?

Hmm, it turns out we are still actively using some boards based on
Exynos4210 EVT0 SoCs. And since it seems unlikely the patches from
Tomasz [1] adding basic DT support for those will get merged for
3.10, it would be a bit inconvenient to remove the ATAGS support
now, leaving Exynos4210 Rev. 0 not supported at all.

Not sure what's others opinion on that, and what would be an advantage
of removing non-dt support for Exynos now, rather than in 3.11, vs. any
possible inconvenience and regressions this could cause.

[1] http://www.spinics.net/lists/arm-kernel/msg235745.html

Thanks,
Sylwester
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[GIT PULL v2 1/4] cleanup-samsung v2 for v3.10

2013-04-10 Thread Kukjin Kim


Hi Arnd, Olof,

This is for replacing previous pull-request for 
tags/cleanup-samsung-for-v3.10 because it included wrong e-mail address 
for author.

Please pull this instead. Sorry for that.

Thanks.

- Kukjin


The following changes since commit a937536b868b8369b98967929045f1df54234323:

  Linux 3.9-rc3 (2013-03-17 15:59:32 -0700)

are available in the git repository at:

  git://git.kernel.org/pub/scm/linux/kernel/git/kgene/linux-samsung.git 
tags/cleanup-samsung-v2-for-v3.10


for you to fetch changes up to 9bf38322c8ecb0892cc11a61decb870520753673:

  ARM: EXYNOS: remove config EXYNOS_DEV_DRM (2013-04-10 17:26:05 +0900)


This cleans unused codes and removes unneeded dependencies for Samsung. 
Note, this is 2nd version because of wrong e-mail address for author



Alexander Shiyan (3):
  ARM: S3C24XX: Removed unneeded dependency on ARCH_S3C24XX for boards
  ARM: S3C24XX: Removed unneeded dependency on CPU_S3C2410
  ARM: S3C24XX: Removed unneeded dependency on CPU_S3C2412

Jingoo Han (1):
  ARM: EXYNOS: change the name of USB ohci header

Padmavathi Venna (1):
  ARM: SAMSUNG: Remove unnecessary code for dma

Paul Bolle (11):
  ARM: S3C24XX: drop select MACH_N35
  ARM: S3C24XX: drop select MACH_NEO1973
  ARM: EXYNOS: drop select HAVE_SCHED_CLOCK
  ARM: EXYNOS: change HAVE_SAMSUNG_KEYPAD to KEYBOARD_SAMSUNG
  ARM: SAMSUNG: remove config S3C_BOOT_WATCHDOG
  ARM: SAMSUNG: Remove useless Samsung GPIO related CONFIG
  ARM: S3C24XX: remove unneeded config SMDK2440_CPU2442
  ARM: S3C64XX: remove obsolete Makefile line
  ARM: S5P64X0: Fix typo CONFIG_S5P64X0_SETUP_SDHCI
  ARM: SAMSUNG: Fix typo CONFIG_SAMSUNG_DEV_RTC
  ARM: EXYNOS: remove config EXYNOS_DEV_DRM

Sylwester Nawrocki (1):
  ARM: S3C24XX: Remove unused GPIO drive strength register definitions

Wei Yongjun (1):
  ARM: EXYNOS: remove duplicated include from common.c

 arch/arm/Kconfig   |   1 -
 arch/arm/mach-exynos/Kconfig   |  13 +-
 arch/arm/mach-exynos/common.c  |   1 -
 arch/arm/mach-exynos/dev-ohci.c|   2 +-
 arch/arm/mach-exynos/mach-origen.c |   2 +-
 arch/arm/mach-exynos/mach-smdkv310.c   |   2 +-
 arch/arm/mach-s3c24xx/Kconfig  |  22 +--
 arch/arm/mach-s3c24xx/include/mach/dma.h   |   1 -
 arch/arm/mach-s3c24xx/regs-dsc.h   | 203 
+

 arch/arm/mach-s3c64xx/Makefile |   1 -
 arch/arm/mach-s3c64xx/include/mach/dma.h   |   1 -
 arch/arm/plat-samsung/Kconfig  |  14 --
 arch/arm/plat-samsung/dma-ops.c|  10 +-
 arch/arm/plat-samsung/include/plat/dma-ops.h   |   1 -
 arch/arm/plat-samsung/include/plat/dma-pl330.h |   1 -
 arch/arm/plat-samsung/include/plat/rtc-core.h  |   2 +-
 arch/arm/plat-samsung/include/plat/sdhci.h |   4 +-
 drivers/usb/host/ohci-exynos.c |   3 +-
 .../{usb-exynos.h = usb-ohci-exynos.h}|   0
 19 files changed, 20 insertions(+), 264 deletions(-)
 rename include/linux/platform_data/{usb-exynos.h = usb-ohci-exynos.h} 
(100%)


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[GIT PULL v2 2/4] dt-exynos v2 for v3.10

2013-04-10 Thread Kukjin Kim


Hi Arnd, Olof,

Please pull this instead of tags/dt-exynos-for-v3.10 because of wrong 
e-mail address for author. Sorry for that.


Thanks.

- Kukjin

The following changes since commit da821eb7d42935b0f7056d98c75fd1150f6636f4:

  Merge commit 'v3.9-rc5' into next/clk-exynos (2013-04-09 01:10:13 +0900)

are available in the git repository at:


  git://git.kernel.org/pub/scm/linux/kernel/git/kgene/linux-samsung.git 
tags/dt-exynos-v2-for-v3.10


for you to fetch changes up to 31d39248810072dec3279463d5fda0001721c01c:

  ARM: dts: add mshc controller node for Exynos4x12 SoCs (2013-04-10 
17:51:32 +0900)



This updates device tree for exynos4210 (origen and smdkv310 boards), 
exynos4412 (origen and smdk4412 boards), exynos5250 (arndale, smdk5250 
and snow boards), and exynos5440 (sd5v1 and ssdk5440 boards). And adds 
support for exynos5250 pinctrl. And includes bindings for g2d, usb and 
fimd. Note, this is 2nd version because of wrong e-mail address for author



Alexander Graf (2):
  ARM: dts: Declare the gic as a15 compatible for exynos5250
  ARM: dts: Add architected timer nodes for exynos5250

Amit Daniel Kachhap (2):
  ARM: dts: Add PMIC node entry for Arndale board
  ARM: dts: Add cpufreq controller node for Exynos5440 SoC

Byungho An (1):
  ARM: dts: Add node for GMAC for exynos5440

Doug Anderson (2):
  ARM: dts: add usb 2.0 clock references to exynos5250 device tree
  ARM: dts: Document usb clocks in samsung,exynos4210-ehci/ohci 
bindings


Giridhar Maruthy (1):
  ARM: dts: Add virtual GIC DT bindings for exynos5440

Kukjin Kim (1):
  ARM: dts: add device tree file for SD5v1 board

Leela Krishna Amudala (2):
  ARM: dts: Add FIMD node to exynos5
  ARM: dts: Add display timing node to exynos5250-smdk5250.dts

Sachin Kamat (11):
  ARM: dts: Add G2D node to exynos4210.dtsi
  ARM: dts: Add G2D node to SMDKV310
  ARM: dts: Add G2D node to exynos4210-origen
  ARM: dts: Add G2D node to exynos4x12.dtsi
  ARM: dts: Add G2D node to SMDK4412
  ARM: dts: Add G2D node to exynos4412-origen
  ARM: dts: Add Samsung G2D DT bindings documentation
  ARM: dts: Add disable-wp for card slot on exynos5250-arndale
  ARM: dts: Add vmmc regulator support for Arndale board
  ARM: dts: Add MFC codec support for Arndale board
  ARM: dts: Add HDMI HPD and regulator node for Arndale board

Subash Patel (3):
  ARM: dts: add PMU support in exynos5440
  ARM: dts: update bootargs to boot from sda2 for exynos5440-ssdk5440
  ARM: dts: add PDMA0 changes for exynos5440

Sylwester Nawrocki (1):
  ARM: dts: Add SYSREG block node for S5P/Exynos4 SoC series

Thomas Abraham (5):
  ARM: dts: add pin state information in client nodes for Exynos4 
platforms
  ARM: dts: add pin state information in client nodes for Exynos5 
platforms
  ARM: dts: list the interrupts generated by pin-controller on 
Exynos5440

  ARM: dts: Fix gmac clock ids due to changes in Exynos5440
  ARM: dts: add mshc controller node for Exynos4x12 SoCs

Tushar Behera (2):
  ARM: dts: Add pin-control related changes for Arndale board
  ARM: dts: Add gpio-button entries for Arndale board

Vikas Sajjan (3):
  ARM: dts: Add FIMD node to exynos4
  ARM: dts: Add FIMD node and display timing node to 
exynos4412-origen.dts

  ARM: dts: Add FIMD DT binding Documentation

 .../devicetree/bindings/arm/samsung/sysreg.txt |   7 +
 .../devicetree/bindings/gpu/samsung-g2d.txt|  20 +
 .../devicetree/bindings/usb/exynos-usb.txt |  10 +
 .../devicetree/bindings/video/samsung-fimd.txt |  65 ++
 arch/arm/boot/dts/Makefile |   1 +
 arch/arm/boot/dts/cros5250-common.dtsi |  51 +-
 arch/arm/boot/dts/exynos4.dtsi |  27 +
 arch/arm/boot/dts/exynos4210-origen.dts|   4 +
 arch/arm/boot/dts/exynos4210-smdkv310.dts  |  57 +-
 arch/arm/boot/dts/exynos4210.dtsi  |   7 +
 arch/arm/boot/dts/exynos4412-origen.dts|  21 +
 arch/arm/boot/dts/exynos4412-smdk4412.dts  |   8 +
 arch/arm/boot/dts/exynos4412.dtsi  |   8 +
 arch/arm/boot/dts/exynos4x12.dtsi  |   7 +
 arch/arm/boot/dts/exynos5250-arndale.dts   | 343 -
 arch/arm/boot/dts/exynos5250-pinctrl.dtsi  | 783 
+

 arch/arm/boot/dts/exynos5250-smdk5250.dts  |  49 +-
 arch/arm/boot/dts/exynos5250-snow.dts  |  22 +-
 arch/arm/boot/dts/exynos5250.dtsi  | 343 +++--
 arch/arm/boot/dts/exynos5440-sd5v1.dts |  39 +
 arch/arm/boot/dts/exynos5440-ssdk5440.dts  |   6 +-
 arch/arm/boot/dts/exynos5440.dtsi  |  55 +-
 22 files changed, 1567 insertions(+), 366

[GIT PULL v2 3/4] mct-exynos v2 for v3.10

2013-04-10 Thread Kukjin Kim


Hi Arnd, Olof,

Please pull this instead of tags/mct-exynos-for-v3.10 because of wrong 
e-mail address for author. Sorry for that.


Thanks.

- Kukjin


The following changes since commit 6dbe51c251a327e012439c4772097a13df43c5b8:

  Linux 3.9-rc1 (2013-03-03 15:11:05 -0800)

are available in the git repository at:

  git://git.kernel.org/pub/scm/linux/kernel/git/kgene/linux-samsung.git 
tags/mct-exynos-v2-for-v3.10


for you to fetch changes up to 00cf16bc88b4ce15ccd85671e6b0ee54405c32e2:

  clocksource: mct: Add terminating entry for exynos_mct_ids table 
(2013-04-10 17:28:51 +0900)



This adds mct device tree node for all EXYNOS SoCs and moves into 
drivers/clocksource. Note, this is 2nd version because of wrong e-mail 
address for author



Axel Lin (1):
  clocksource: mct: Add terminating entry for exynos_mct_ids table

Doug Anderson (1):
  clocksource: mct: Add missing semicolons in exynos_mct.c

Thomas Abraham (7):
  ARM: EXYNOS: add a register base address variable in mct 
controller driver

  ARM: EXYNOS: prepare an array of MCT interrupt numbers and use it
  ARM: EXYNOS: add device tree support for MCT controller driver
  ARM: EXYNOS: allow dt based discovery of mct controller using 
clocksource_of_init

  ARM: dts: add mct device tree node for all supported Exynos SoC's
  ARM: EXYNOS: remove static io-remapping of mct registers for Exynos5
  ARM: EXYNOS: move mct driver to drivers/clocksource

 .../bindings/timer/samsung,exynos4210-mct.txt  |  68 +++
 arch/arm/Kconfig   |   2 +-
 arch/arm/boot/dts/exynos4210.dtsi  |  22 +++
 arch/arm/boot/dts/exynos4212.dtsi  |  22 +++
 arch/arm/boot/dts/exynos4412.dtsi  |  24 +++
 arch/arm/boot/dts/exynos5250.dtsi  |  22 +++
 arch/arm/mach-exynos/Kconfig   |   8 +-
 arch/arm/mach-exynos/Makefile  |   2 -
 arch/arm/mach-exynos/common.c  |   5 -
 arch/arm/mach-exynos/common.h  |   2 +-
 arch/arm/mach-exynos/include/mach/irqs.h   |   6 -
 arch/arm/mach-exynos/include/mach/map.h|   1 -
 arch/arm/mach-exynos/include/mach/regs-mct.h   |  53 --
 arch/arm/mach-exynos/mach-armlex4210.c |   2 +-
 arch/arm/mach-exynos/mach-exynos4-dt.c |   3 +-
 arch/arm/mach-exynos/mach-exynos5-dt.c |   3 +-
 arch/arm/mach-exynos/mach-nuri.c   |   2 +-
 arch/arm/mach-exynos/mach-origen.c |   2 +-
 arch/arm/mach-exynos/mach-smdk4x12.c   |   4 +-
 arch/arm/mach-exynos/mach-smdkv310.c   |   4 +-
 drivers/clocksource/Kconfig|   5 +
 drivers/clocksource/Makefile   |   1 +
 .../mct.c = drivers/clocksource/exynos_mct.c  | 196 
++---

 23 files changed, 310 insertions(+), 149 deletions(-)
 create mode 100644 
Documentation/devicetree/bindings/timer/samsung,exynos4210-mct.txt

 delete mode 100644 arch/arm/mach-exynos/include/mach/regs-mct.h
 rename arch/arm/mach-exynos/mct.c = drivers/clocksource/exynos_mct.c 
(67%)

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[GIT PULL 4/4] dt-exynos 2 for v3.10

2013-04-10 Thread Kukjin Kim


Hi Arnd, Olof,

This is one more pull-request for exynos dt update for v3.10.
Please pull.

Thanks.

- Kukjin


The following changes since commit 31d39248810072dec3279463d5fda0001721c01c:

  ARM: dts: add mshc controller node for Exynos4x12 SoCs (2013-04-10 
17:51:32 +0900)


are available in the git repository at:

  git://git.kernel.org/pub/scm/linux/kernel/git/kgene/linux-samsung.git 
tags/dt-exynos-2-for-v3.10


for you to fetch changes up to 9251646b7a36059f8667f87fa00361a776bf19a2:

  ARM: EXYNOS: Enable XHCI support on exynos5 (2013-04-10 19:38:41 +0900)


This updates device tree for keypad for smdk4412 and origen4412 boards 
and adds mfc clock entries for exynos4 and enables usb2phy and usb3phy 
and dwc3-exynos for exynos5250



Sachin Kamat (5):
  ARM: dts: Remove keypad entries from exynos4x12-pinctrl.dtsi
  ARM: dts: Add keypad entries to Exynos4412 based Origen
  ARM: dts: Add keypad entries to SMDK4412
  ARM: dts: Add MFC clock entries for exynos4
  ARM: dts: Update MFC documentation for clock entries

Vivek Gautam (5):
  ARM: dts: Enabling samsung-usb2phy driver for exynos5250
  ARM: dts: Enabling samsung-usb3phy driver for exynos5250
  ARM: dts: Add device tree bindings for dwc3-exynos
  ARM: dts: Enabling dwc3-exynos driver for exynos5250
  ARM: EXYNOS: Enable XHCI support on exynos5

 .../devicetree/bindings/media/s5p-mfc.txt  |  5 ++
 .../devicetree/bindings/usb/exynos-usb.txt | 34 +
 arch/arm/boot/dts/exynos4.dtsi |  2 +
 arch/arm/boot/dts/exynos4412-origen.dts| 62 +++
 arch/arm/boot/dts/exynos4412-smdk4412.dts  | 87 
++

 arch/arm/boot/dts/exynos4x12-pinctrl.dtsi  | 56 --
 arch/arm/boot/dts/exynos5250.dtsi  | 45 +++
 arch/arm/mach-exynos/Kconfig   |  1 +
 8 files changed, 236 insertions(+), 56 deletions(-)
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Re: [PATCH RESEND] ARM: EXYNOS: no more support non-DT for EXYNOS SoCs

2013-04-10 Thread Arnd Bergmann

On Wednesday 10 April 2013, Sylwester Nawrocki wrote:
 Hmm, it turns out we are still actively using some boards based on
 Exynos4210 EVT0 SoCs. And since it seems unlikely the patches from
 Tomasz [1] adding basic DT support for those will get merged for
 3.10, it would be a bit inconvenient to remove the ATAGS support
 now, leaving Exynos4210 Rev. 0 not supported at all.

I still have hope to get those included.

 Not sure what's others opinion on that, and what would be an advantage
 of removing non-dt support for Exynos now, rather than in 3.11, vs. any
 possible inconvenience and regressions this could cause.

A multiplatform kernel will not work on an ATAGS based Exynos platform,
but I think we can have it both ways and allow either multiplatform
DT-only or single-platform with both DT and ATAGS in 3.10.

Arnd
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Re: [PATCH v4] mmc: dw_mmc: let device core setup the default pin configuration

2013-04-10 Thread Doug Anderson

Thomas,

On Wed, Apr 10, 2013 at 5:48 AM, Thomas Abraham
thomas.abra...@linaro.org wrote:
 The call to regulator_enable() is prior to the call to mmc_add_host().
 Hence, call to mmc_fre_host is not required in this case. So the above
 change should be right.

Are you sure that mmc_free_host() is the opposite of mmc_add_host()
and not mmc_alloc_host()?

I'll double-check myself in a few hours when I'm in front of a computer.

-Doug
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Re: [PATCH RESEND] ARM: EXYNOS: no more support non-DT for EXYNOS SoCs

2013-04-10 Thread Kukjin Kim


On 04/10/13 22:55, Arnd Bergmann wrote:

On Wednesday 10 April 2013, Sylwester Nawrocki wrote:

Hmm, it turns out we are still actively using some boards based on
Exynos4210 EVT0 SoCs. And since it seems unlikely the patches from
Tomasz [1] adding basic DT support for those will get merged for
3.10, it would be a bit inconvenient to remove the ATAGS support
now, leaving Exynos4210 Rev. 0 not supported at all.


I still have hope to get those included.


I agree and I asked Tomasz to re-send universal dt patch.


Not sure what's others opinion on that, and what would be an advantage
of removing non-dt support for Exynos now, rather than in 3.11, vs. any
possible inconvenience and regressions this could cause.


A multiplatform kernel will not work on an ATAGS based Exynos platform,
but I think we can have it both ways and allow either multiplatform
DT-only or single-platform with both DT and ATAGS in 3.10.


I think, if possible, keeping both way would be nice to us.

Thanks.

- Kukjin
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Re: [PATCH v4] mmc: dw_mmc: let device core setup the default pin configuration

2013-04-10 Thread Doug Anderson

Thomas,

On Wed, Apr 10, 2013 at 6:56 AM, Doug Anderson diand...@chromium.org wrote:
 On Wed, Apr 10, 2013 at 5:48 AM, Thomas Abraham
 thomas.abra...@linaro.org wrote:
 The call to regulator_enable() is prior to the call to mmc_add_host().
 Hence, call to mmc_fre_host is not required in this case. So the above
 change should be right.

 Are you sure that mmc_free_host() is the opposite of mmc_add_host()
 and not mmc_alloc_host()?

 I'll double-check myself in a few hours when I'm in front of a computer.

OK, I double checked and I'm still convinced that the free is needed
because we've already called mmc_alloc_host().  Current code always
makes sure to free when it returns an error and that seems right to
me.

-Doug
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Re: [PATCH v5 2/3] of/pci: Provide support for parsing PCI DT ranges property

2013-04-10 Thread Rob Herring

On 04/10/2013 02:29 AM, Andrew Murray wrote:
 This patch factors out common implementation patterns to reduce overall kernel
 code and provide a means for host bridge drivers to directly obtain struct
 resources from the DT's ranges property without relying on architecture 
 specific
 DT handling. This will make it easier to write archiecture independent host 
 bridge
 drivers and mitigate against further duplication of DT parsing code.
 
 This patch can be used in the following way:
 
   struct of_pci_range_parser parser;
   struct of_pci_range range;
 
   if (of_pci_range_parser(parser, np))
   ; //no ranges property
 
   for_each_of_pci_range(parser, range) {
 
   /*
   directly access properties of the address range, e.g.:
   range.pci_space, range.pci_addr, range.cpu_addr,
   range.size, range.flags
 
   alternatively obtain a struct resource, e.g.:
   struct resource res;
   of_pci_range_to_resource(range, np, res);
   */
   }
 
 Additionally the implementation takes care of adjacent ranges and merges them
 into a single range (as was the case with powerpc and microblaze).
 
 Signed-off-by: Andrew Murray andrew.mur...@arm.com
 Signed-off-by: Liviu Dudau liviu.du...@arm.com
 Signed-off-by: Thomas Petazzoni thomas.petazz...@free-electrons.com
 ---

A few minor things below, otherwise:

Reviewed-by: Rob Herring rob.herr...@calxeda.com

  drivers/of/address.c   |   63 +
  drivers/of/of_pci.c|  112 
 
  include/linux/of_address.h |   42 
  3 files changed, 145 insertions(+), 72 deletions(-)
 
 diff --git a/drivers/of/address.c b/drivers/of/address.c
 index 04da786..e87f45e 100644
 --- a/drivers/of/address.c
 +++ b/drivers/of/address.c
 @@ -227,6 +227,69 @@ int of_pci_address_to_resource(struct device_node *dev, 
 int bar,
   return __of_address_to_resource(dev, addrp, size, flags, NULL, r);
  }
  EXPORT_SYMBOL_GPL(of_pci_address_to_resource);
 +
 +int of_pci_range_parser(struct of_pci_range_parser *parser,
 + struct device_node *node)
 +{
 + const int na = 3, ns = 2;
 + int rlen;
 +
 + parser-node = node;
 + parser-pna = of_n_addr_cells(node);
 + parser-np = parser-pna + na + ns;
 +
 + parser-range = of_get_property(node, ranges, rlen);
 + if (parser-range == NULL)
 + return -ENOENT;
 +
 + parser-end = parser-range + rlen / sizeof(__be32);
 +
 + return 0;
 +}
 +
 +struct of_pci_range *of_pci_process_ranges(struct of_pci_range_parser 
 *parser,
 + struct of_pci_range *range)
 +{
 + const int na = 3, ns = 2;
 +
 + if (!parser-range || parser-range + parser-np  parser-end)

Add a !range check

 + return NULL;
 +
 + range-pci_space = be32_to_cpup(parser-range);
 + range-flags = of_bus_pci_get_flags(parser-range);
 + range-pci_addr = of_read_number(parser-range + 1, ns);
 + range-cpu_addr = of_translate_address(parser-node,
 + parser-range + na);
 + range-size = of_read_number(parser-range + parser-pna + na, ns);
 +
 + parser-range += parser-np;
 +
 + /* Now consume following elements while they are contiguous */
 + while (parser-range + parser-np = parser-end) {
 + u32 flags, pci_space;
 + u64 pci_addr, cpu_addr, size;
 +
 + pci_space = be32_to_cpup(parser-range);

This line doesn't do anything.

 + flags = of_bus_pci_get_flags(parser-range);
 + pci_addr = of_read_number(parser-range + 1, ns);
 + cpu_addr = of_translate_address(parser-node,
 + parser-range + na);
 + size = of_read_number(parser-range + parser-pna + na, ns);
 +
 + if (flags != range-flags)
 + break;
 + if (pci_addr != range-pci_addr + range-size ||
 + cpu_addr != range-cpu_addr + range-size)
 + break;
 +
 + range-size += size;
 + parser-range += parser-np;
 + }
 +
 + return range;
 +}
 +EXPORT_SYMBOL_GPL(of_pci_process_ranges);
 +
  #endif /* CONFIG_PCI */
  
  /*
 diff --git a/drivers/of/of_pci.c b/drivers/of/of_pci.c
 index 0611248..9680dc6 100644
 --- a/drivers/of/of_pci.c
 +++ b/drivers/of/of_pci.c
 @@ -82,67 +82,43 @@ EXPORT_SYMBOL_GPL(of_pci_find_child_device);
  void pci_process_bridge_OF_ranges(struct pci_controller *hose,
 struct device_node *dev, int primary)
  {
 - const u32 *ranges;
 - int rlen;
 - int pna = of_n_addr_cells(dev);
 - int np = pna + 5;
   int memno = 0, isa_hole = -1;
 - u32 pci_space;
 - unsigned long long pci_addr, cpu_addr, pci_next, cpu_next, size;
   unsigned long long

Re: [PATCH v5 3/3] of/pci: mips: convert to common of_pci_range_parser

2013-04-10 Thread Rob Herring

On 04/10/2013 02:29 AM, Andrew Murray wrote:
 This patch converts the pci_load_of_ranges function to use the new common
 of_pci_range_parser.
 
 Signed-off-by: Andrew Murray andrew.mur...@arm.com
 Signed-off-by: Liviu Dudau liviu.du...@arm.com

Reviewed-by: Rob Herring rob.herr...@calxeda.com


 ---
  arch/mips/pci/pci.c |   50 --
  1 files changed, 16 insertions(+), 34 deletions(-)
 
 diff --git a/arch/mips/pci/pci.c b/arch/mips/pci/pci.c
 index 0872f12..bee49a4 100644
 --- a/arch/mips/pci/pci.c
 +++ b/arch/mips/pci/pci.c
 @@ -122,51 +122,33 @@ static void pcibios_scanbus(struct pci_controller *hose)
  #ifdef CONFIG_OF
  void pci_load_of_ranges(struct pci_controller *hose, struct device_node 
 *node)
  {
 - const __be32 *ranges;
 - int rlen;
 - int pna = of_n_addr_cells(node);
 - int np = pna + 5;
 + struct of_pci_range_range range;
 + struct of_pci_range_parser parser;
 + u32 res_type;
  
   pr_info(PCI host bridge %s ranges:\n, node-full_name);
 - ranges = of_get_property(node, ranges, rlen);
 - if (ranges == NULL)
 - return;
   hose-of_node = node;
  
 - while ((rlen -= np * 4) = 0) {
 - u32 pci_space;
 + if (of_pci_range_parser(parser, node))
 + return;
 +
 + for_each_of_pci_range(parser, range) {
   struct resource *res = NULL;
 - u64 addr, size;
 -
 - pci_space = be32_to_cpup(ranges[0]);
 - addr = of_translate_address(node, ranges + 3);
 - size = of_read_number(ranges + pna + 3, 2);
 - ranges += np;
 - switch ((pci_space  24)  0x3) {
 - case 1: /* PCI IO space */
 +
 + res_type = range.flags  IORESOURCE_TYPE_BITS;
 + if (res_type == IORESOURCE_IO) {
   pr_info(  IO 0x%016llx..0x%016llx\n,
 - addr, addr + size - 1);
 + range.addr, range.addr + range.size - 1);
   hose-io_map_base =
 - (unsigned long)ioremap(addr, size);
 + (unsigned long)ioremap(range.addr, range.size);
   res = hose-io_resource;
 - res-flags = IORESOURCE_IO;
 - break;
 - case 2: /* PCI Memory space */
 - case 3: /* PCI 64 bits Memory space */
 + } else if (res_type == IORESOURCE_MEM) {
   pr_info( MEM 0x%016llx..0x%016llx\n,
 - addr, addr + size - 1);
 + range.addr, range.addr + range.size - 1);
   res = hose-mem_resource;
 - res-flags = IORESOURCE_MEM;
 - break;
 - }
 - if (res != NULL) {
 - res-start = addr;
 - res-name = node-full_name;
 - res-end = res-start + size - 1;
 - res-parent = NULL;
 - res-sibling = NULL;
 - res-child = NULL;
   }
 + if (res != NULL)
 + of_pci_range_to_resource(range, node, res);
   }
  }
  #endif
 

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Re: [PATCH] pinctrl: Add pinctrl-s3c24xx driver

2013-04-10 Thread Tomasz Figa

On Wednesday 10 of April 2013 15:45:48 Heiko Stübner wrote:
 Am Mittwoch, 10. April 2013, 14:31:29 schrieb Tomasz Figa:
  On Wednesday 10 of April 2013 14:20:22 Heiko Stübner wrote:
   Hi Tomasz,
   
   thanks for your comments, more inline.
   
   Am Mittwoch, 10. April 2013, 12:36:39 schrieb Tomasz Figa:
Hi Heiko,

Basically looks good to me, but please see my inline comments
about
handling of EINT0-3.

On Wednesday 10 of April 2013 01:35:12 Heiko Stübner wrote:
 The s3c24xx pins follow a similar pattern as the other Samsung
 SoCs
 and
 can therefore reuse the already introduced infrastructure.
   
   [...]
   
 +struct s3c24xx_eint_data {
 + struct samsung_pinctrl_drv_data *drvdata;
 + struct irq_domain *domains[NUM_EINT];
 + int parents[NUM_EINT_IRQ];
 +};
 +
 +struct s3c24xx_eint_domain_data {
 + struct samsung_pin_bank *bank;
 + struct s3c24xx_eint_data *eint_data;

What about:

+   bool eint0_3_parent_only;

(or whatever name would be more appropriate), which would store
the
information about the s3c24xx-specific quirk in 24xx-specific data
structure, without the need to add another field to the generic
samsung_pinctrl_drv_data structure?

See my further comments on how I would see using this field in
interrupt handling code.
   
   ok, sounds good, especially gathering the type from the wakeup-int
   property
   
 +};
   
   [...]
   
Now I would split the following 3 functions into two sets of 3
functions, one set for s3c2412 and other for remaining SoCs and
make
separate EINT0-3 IRQ chips for both cases.
   
   Not doing the decision every time, might bring some very slight
   speed
   improvements, so is probably the right way to go.
   
 +
 +static void s3c24xx_eint0_3_ack(struct irq_data *data)
 +{
 + struct samsung_pin_bank *bank =
 irq_data_get_irq_chip_data(data);
 + struct samsung_pinctrl_drv_data *d = bank-drvdata;
 + struct s3c24xx_eint_domain_data *ddata = bank-irq_domain-

host_data;

 + struct s3c24xx_eint_data *eint_data = ddata-eint_data;
 + int parent_irq = eint_data-parents[data-hwirq];
 + struct irq_chip *parent_chip = irq_get_chip(parent_irq);
 +
 + if (d-ctrl-type == S3C2412) {
 + unsigned long bitval = 1UL  data-hwirq;
 + writel(bitval, d-virt_base + EINTPEND_REG);
 + }
 +
 + if (parent_chip-irq_ack)
 + parent_chip-
irq_ack(irq_get_irq_data(parent_irq));

Btw. Is this parent level acking really needed here?
   
   Depends. If using chained_irq_* of course not, but if the
   irq-handler
   should stay in charge of when to ack it might be better this way.
   
   Generic s3c24xx SoCs need acking in the main controller only, while
   s3c2412 needs acking in both the main controller and eintpend.
   
 +}
   
   [...]
   
 +static void s3c24xx_demux_eint0_3(unsigned int irq, struct
 irq_desc
 *desc) +{
 + struct irq_data *data = irq_desc_get_irq_data(desc);
 + struct s3c24xx_eint_data *eint_data =
 irq_get_handler_data(irq);
 + unsigned int virq;
 +

Instead of acking the interrupt at parent chip from ack callback
of
EINT0_3 chip, I would rather use chained_irq_enter() here...

 + /* the first 4 eints have a simple 1 to 1 mapping */
 + virq = irq_linear_revmap(eint_data-domains[data-hwirq],
 data-hwirq); +   /* Something must be really wrong if an 
unmapped

EINT

 +  * was unmasked...
 +  */
 + BUG_ON(!virq);
 +
 + generic_handle_irq(virq);

...and chained_irq_exit() here.
   
   If I understand it correctly, the way chained_irq_* works it would
   limit the eints to a level style handling. With the way it's
   currently the whole determination of when to ack,mask and unmask is
   completely for the real handler (edge or level) to decide, as the
   original interrupt gets completely forwarded into the irq-domain
   without further
   constraints.
   
   So, after the change on regular s3c24xx SoCs when the real irq
   handler
   wants to ack the irq, it would be a no-op, as it would already have
   been acked by chained_irq_enter.
   
   Masking might be even more interesting. Currently control is
   transfered
   completely to the pinctrl irq-domain, which then controls the
   masking of the interrupt thru the parent-calls - on regular s3c24xx
   the masking of these is also only done in the main controller.
   
   When using chained_irq_* it also wants to mask the interrupt which
   might conflict with regular enable_irq/disable_irq calls being done
   for example in driver code.
   
   
   So in short I agree with the earlier split of the irqchip, but would
   keep the irq operations themself

Re: [PATCH] pinctrl: Add pinctrl-s3c24xx driver

2013-04-10 Thread Heiko Stübner

Am Mittwoch, 10. April 2013, 21:51:11 schrieb Tomasz Figa:
 On Wednesday 10 of April 2013 15:45:48 Heiko Stübner wrote:
  Am Mittwoch, 10. April 2013, 14:31:29 schrieb Tomasz Figa:
   On Wednesday 10 of April 2013 14:20:22 Heiko Stübner wrote:
Hi Tomasz,

thanks for your comments, more inline.

Am Mittwoch, 10. April 2013, 12:36:39 schrieb Tomasz Figa:
 Hi Heiko,
 
 Basically looks good to me, but please see my inline comments
 about
 handling of EINT0-3.
 
 On Wednesday 10 of April 2013 01:35:12 Heiko Stübner wrote:
  The s3c24xx pins follow a similar pattern as the other Samsung
  SoCs
  and
  can therefore reuse the already introduced infrastructure.

[...]

  +struct s3c24xx_eint_data {
  +   struct samsung_pinctrl_drv_data *drvdata;
  +   struct irq_domain *domains[NUM_EINT];
  +   int parents[NUM_EINT_IRQ];
  +};
  +
  +struct s3c24xx_eint_domain_data {
  +   struct samsung_pin_bank *bank;
  +   struct s3c24xx_eint_data *eint_data;
 
 What about:
 
 + bool eint0_3_parent_only;
 
 (or whatever name would be more appropriate), which would store
 the
 information about the s3c24xx-specific quirk in 24xx-specific data
 structure, without the need to add another field to the generic
 samsung_pinctrl_drv_data structure?
 
 See my further comments on how I would see using this field in
 interrupt handling code.

ok, sounds good, especially gathering the type from the wakeup-int
property

  +};

[...]

 Now I would split the following 3 functions into two sets of 3
 functions, one set for s3c2412 and other for remaining SoCs and
 make
 separate EINT0-3 IRQ chips for both cases.

Not doing the decision every time, might bring some very slight
speed
improvements, so is probably the right way to go.

  +
  +static void s3c24xx_eint0_3_ack(struct irq_data *data)
  +{
  +   struct samsung_pin_bank *bank =
  irq_data_get_irq_chip_data(data);
  +   struct samsung_pinctrl_drv_data *d = bank-drvdata;
  +   struct s3c24xx_eint_domain_data *ddata = bank-irq_domain-
 
 host_data;
 
  +   struct s3c24xx_eint_data *eint_data = ddata-eint_data;
  +   int parent_irq = eint_data-parents[data-hwirq];
  +   struct irq_chip *parent_chip = irq_get_chip(parent_irq);
  +
  +   if (d-ctrl-type == S3C2412) {
  +   unsigned long bitval = 1UL  data-hwirq;
  +   writel(bitval, d-virt_base + EINTPEND_REG);
  +   }
  +
  +   if (parent_chip-irq_ack)
  +   parent_chip-
 
 irq_ack(irq_get_irq_data(parent_irq));
 
 Btw. Is this parent level acking really needed here?

Depends. If using chained_irq_* of course not, but if the
irq-handler
should stay in charge of when to ack it might be better this way.

Generic s3c24xx SoCs need acking in the main controller only, while
s3c2412 needs acking in both the main controller and eintpend.

  +}

[...]

  +static void s3c24xx_demux_eint0_3(unsigned int irq, struct
  irq_desc
  *desc) +{
  +   struct irq_data *data = irq_desc_get_irq_data(desc);
  +   struct s3c24xx_eint_data *eint_data =
  irq_get_handler_data(irq);
  +   unsigned int virq;
  +
 
 Instead of acking the interrupt at parent chip from ack callback
 of
 EINT0_3 chip, I would rather use chained_irq_enter() here...
 
  +   /* the first 4 eints have a simple 1 to 1 mapping */
  +   virq = irq_linear_revmap(eint_data-domains[data-hwirq],
  data-hwirq); + /* Something must be really wrong if an
 
 unmapped
 
 EINT
 
  +* was unmasked...
  +*/
  +   BUG_ON(!virq);
  +
  +   generic_handle_irq(virq);
 
 ...and chained_irq_exit() here.

If I understand it correctly, the way chained_irq_* works it would
limit the eints to a level style handling. With the way it's
currently the whole determination of when to ack,mask and unmask is
completely for the real handler (edge or level) to decide, as the
original interrupt gets completely forwarded into the irq-domain
without further
constraints.

So, after the change on regular s3c24xx SoCs when the real irq
handler
wants to ack the irq, it would be a no-op, as it would already have
been acked by chained_irq_enter.

Masking might be even more interesting. Currently control is
transfered
completely to the pinctrl irq-domain, which then controls the
masking of the interrupt thru the parent-calls - on regular s3c24xx
the masking of these is also only done in the main controller.

When using chained_irq_* it also wants to mask the interrupt which
might conflict with regular enable_irq/disable_irq calls being done
for

Re: [PATCH] pinctrl: Add pinctrl-s3c24xx driver

2013-04-10 Thread Tomasz Figa

On Wednesday 10 of April 2013 22:11:03 Heiko Stübner wrote:
 Am Mittwoch, 10. April 2013, 21:51:11 schrieb Tomasz Figa:
  On Wednesday 10 of April 2013 15:45:48 Heiko Stübner wrote:
   Am Mittwoch, 10. April 2013, 14:31:29 schrieb Tomasz Figa:
On Wednesday 10 of April 2013 14:20:22 Heiko Stübner wrote:
 Hi Tomasz,
 
 thanks for your comments, more inline.
 
 Am Mittwoch, 10. April 2013, 12:36:39 schrieb Tomasz Figa:
  Hi Heiko,
  
  Basically looks good to me, but please see my inline comments
  about
  handling of EINT0-3.
  
  On Wednesday 10 of April 2013 01:35:12 Heiko Stübner wrote:
   The s3c24xx pins follow a similar pattern as the other
   Samsung
   SoCs
   and
   can therefore reuse the already introduced infrastructure.
 
 [...]
 
   +struct s3c24xx_eint_data {
   + struct samsung_pinctrl_drv_data *drvdata;
   + struct irq_domain *domains[NUM_EINT];
   + int parents[NUM_EINT_IRQ];
   +};
   +
   +struct s3c24xx_eint_domain_data {
   + struct samsung_pin_bank *bank;
   + struct s3c24xx_eint_data *eint_data;
  
  What about:
  
  +   bool eint0_3_parent_only;
  
  (or whatever name would be more appropriate), which would
  store
  the
  information about the s3c24xx-specific quirk in 24xx-specific
  data
  structure, without the need to add another field to the
  generic
  samsung_pinctrl_drv_data structure?
  
  See my further comments on how I would see using this field in
  interrupt handling code.
 
 ok, sounds good, especially gathering the type from the
 wakeup-int
 property
 
   +};
 
 [...]
 
  Now I would split the following 3 functions into two sets of 3
  functions, one set for s3c2412 and other for remaining SoCs
  and
  make
  separate EINT0-3 IRQ chips for both cases.
 
 Not doing the decision every time, might bring some very slight
 speed
 improvements, so is probably the right way to go.
 
   +
   +static void s3c24xx_eint0_3_ack(struct irq_data *data)
   +{
   + struct samsung_pin_bank *bank =
   irq_data_get_irq_chip_data(data);
   + struct samsung_pinctrl_drv_data *d = bank-drvdata;
   + struct s3c24xx_eint_domain_data *ddata = bank-irq_domain-
  
  host_data;
  
   + struct s3c24xx_eint_data *eint_data = ddata-eint_data;
   + int parent_irq = eint_data-parents[data-hwirq];
   + struct irq_chip *parent_chip = irq_get_chip(parent_irq);
   +
   + if (d-ctrl-type == S3C2412) {
   + unsigned long bitval = 1UL  data-hwirq;
   + writel(bitval, d-virt_base + EINTPEND_REG);
   + }
   +
   + if (parent_chip-irq_ack)
   + parent_chip-
  
  irq_ack(irq_get_irq_data(parent_irq));
  
  Btw. Is this parent level acking really needed here?
 
 Depends. If using chained_irq_* of course not, but if the
 irq-handler
 should stay in charge of when to ack it might be better this
 way.
 
 Generic s3c24xx SoCs need acking in the main controller only,
 while
 s3c2412 needs acking in both the main controller and eintpend.
 
   +}
 
 [...]
 
   +static void s3c24xx_demux_eint0_3(unsigned int irq, struct
   irq_desc
   *desc) +{
   + struct irq_data *data = irq_desc_get_irq_data(desc);
   + struct s3c24xx_eint_data *eint_data =
   irq_get_handler_data(irq);
   + unsigned int virq;
   +
  
  Instead of acking the interrupt at parent chip from ack
  callback
  of
  EINT0_3 chip, I would rather use chained_irq_enter() here...
  
   + /* the first 4 eints have a simple 1 to 1 mapping */
   + virq = irq_linear_revmap(eint_data-domains[data-hwirq],
   data-hwirq); +   /* Something must be really wrong if an
  
  unmapped
  
  EINT
  
   +  * was unmasked...
   +  */
   + BUG_ON(!virq);
   +
   + generic_handle_irq(virq);
  
  ...and chained_irq_exit() here.
 
 If I understand it correctly, the way chained_irq_* works it
 would
 limit the eints to a level style handling. With the way it's
 currently the whole determination of when to ack,mask and unmask
 is
 completely for the real handler (edge or level) to decide, as
 the
 original interrupt gets completely forwarded into the irq-domain
 without further
 constraints.
 
 So, after the change on regular s3c24xx SoCs when the real irq
 handler
 wants to ack the irq, it would be a no-op, as it would already
 have
 been acked by chained_irq_enter.
 
 Masking might be even more interesting. Currently control is
 transfered
 completely to the pinctrl irq-domain, which then controls the
 masking of the interrupt thru the parent-calls - on regular

Re: [PATCH] pinctrl: Add pinctrl-s3c24xx driver

2013-04-10 Thread Heiko Stübner

Am Mittwoch, 10. April 2013, 22:17:43 schrieb Tomasz Figa:
 On Wednesday 10 of April 2013 22:11:03 Heiko Stübner wrote:
  Am Mittwoch, 10. April 2013, 21:51:11 schrieb Tomasz Figa:
   On Wednesday 10 of April 2013 15:45:48 Heiko Stübner wrote:
Am Mittwoch, 10. April 2013, 14:31:29 schrieb Tomasz Figa:
 On Wednesday 10 of April 2013 14:20:22 Heiko Stübner wrote:
  Hi Tomasz,
  
  thanks for your comments, more inline.
  
  Am Mittwoch, 10. April 2013, 12:36:39 schrieb Tomasz Figa:
   Hi Heiko,
   
   Basically looks good to me, but please see my inline comments
   about
   handling of EINT0-3.
   
   On Wednesday 10 of April 2013 01:35:12 Heiko Stübner wrote:
The s3c24xx pins follow a similar pattern as the other
Samsung
SoCs
and
can therefore reuse the already introduced infrastructure.
  
  [...]
  
+struct s3c24xx_eint_data {
+   struct samsung_pinctrl_drv_data *drvdata;
+   struct irq_domain *domains[NUM_EINT];
+   int parents[NUM_EINT_IRQ];
+};
+
+struct s3c24xx_eint_domain_data {
+   struct samsung_pin_bank *bank;
+   struct s3c24xx_eint_data *eint_data;
   
   What about:
   
   + bool eint0_3_parent_only;
   
   (or whatever name would be more appropriate), which would
   store
   the
   information about the s3c24xx-specific quirk in 24xx-specific
   data
   structure, without the need to add another field to the
   generic
   samsung_pinctrl_drv_data structure?
   
   See my further comments on how I would see using this field in
   interrupt handling code.
  
  ok, sounds good, especially gathering the type from the
  wakeup-int
  property
  
+};
  
  [...]
  
   Now I would split the following 3 functions into two sets of 3
   functions, one set for s3c2412 and other for remaining SoCs
   and
   make
   separate EINT0-3 IRQ chips for both cases.
  
  Not doing the decision every time, might bring some very slight
  speed
  improvements, so is probably the right way to go.
  
+
+static void s3c24xx_eint0_3_ack(struct irq_data *data)
+{
+   struct samsung_pin_bank *bank =
irq_data_get_irq_chip_data(data);
+   struct samsung_pinctrl_drv_data *d = bank-drvdata;
+   struct s3c24xx_eint_domain_data *ddata = 
bank-irq_domain-
   
   host_data;
   
+   struct s3c24xx_eint_data *eint_data = ddata-eint_data;
+   int parent_irq = eint_data-parents[data-hwirq];
+   struct irq_chip *parent_chip = irq_get_chip(parent_irq);
+
+   if (d-ctrl-type == S3C2412) {
+   unsigned long bitval = 1UL  data-hwirq;
+   writel(bitval, d-virt_base + EINTPEND_REG);
+   }
+
+   if (parent_chip-irq_ack)
+   parent_chip-
   
   irq_ack(irq_get_irq_data(parent_irq));
   
   Btw. Is this parent level acking really needed here?
  
  Depends. If using chained_irq_* of course not, but if the
  irq-handler
  should stay in charge of when to ack it might be better this
  way.
  
  Generic s3c24xx SoCs need acking in the main controller only,
  while
  s3c2412 needs acking in both the main controller and eintpend.
  
+}
  
  [...]
  
+static void s3c24xx_demux_eint0_3(unsigned int irq, struct
irq_desc
*desc) +{
+   struct irq_data *data = irq_desc_get_irq_data(desc);
+   struct s3c24xx_eint_data *eint_data =
irq_get_handler_data(irq);
+   unsigned int virq;
+
   
   Instead of acking the interrupt at parent chip from ack
   callback
   of
   EINT0_3 chip, I would rather use chained_irq_enter() here...
   
+   /* the first 4 eints have a simple 1 to 1 mapping */
+   virq = 
irq_linear_revmap(eint_data-domains[data-hwirq],
data-hwirq); + /* Something must be really wrong if an
   
   unmapped
   
   EINT
   
+* was unmasked...
+*/
+   BUG_ON(!virq);
+
+   generic_handle_irq(virq);
   
   ...and chained_irq_exit() here.
  
  If I understand it correctly, the way chained_irq_* works it
  would
  limit the eints to a level style handling. With the way it's
  currently the whole determination of when to ack,mask and unmask
  is
  completely for the real handler (edge or level) to decide, as
  the
  original interrupt gets completely forwarded into the irq-domain
  without further
  constraints.
  
  So, after the change on regular s3c24xx SoCs

Re: [PATCH v5 1/3] of/pci: Unify pci_process_bridge_OF_ranges from Microblaze and PowerPC

2013-04-10 Thread Thomas Petazzoni

Ben, Michal,

On Wed, 10 Apr 2013 08:13:54 -0500, Rob Herring wrote:
 Adding Ben H and Michal...
 
 On 04/10/2013 02:29 AM, Andrew Murray wrote:
  The pci_process_bridge_OF_ranges function, used to parse the
  ranges property of a PCI host device, is found in both Microblaze
  and PowerPC architectures. These implementations are nearly
  identical. This patch moves this common code to a common place.
  
  Signed-off-by: Andrew Murray andrew.mur...@arm.com
  Signed-off-by: Liviu Dudau liviu.du...@arm.com
 
 One comment below. Otherwise,
 
 Reviewed-by: Rob Herring rob.herr...@calxeda.com
 
 You need also need acks from Ben and Michal.

Ben, Michal, could you review/test this patch from Andrew Murray? I
need it as a dependency of [PATCH v5 2/3] of/pci: Provide support for
parsing PCI DT ranges property, which itself is used by the Marvell
PCIe driver I'm hoping to get merged in 3.10.

Thanks a lot for your feedback,

Thomas
-- 
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Kernel, drivers, real-time and embedded Linux
development, consulting, training and support.
http://free-electrons.com
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Re: [PATCH v5 1/3] of/pci: Unify pci_process_bridge_OF_ranges from Microblaze and PowerPC

2013-04-10 Thread Thomas Petazzoni

Dear Andrew Murray,

On Wed, 10 Apr 2013 08:29:26 +0100, Andrew Murray wrote:

 diff --git a/include/linux/of_pci.h b/include/linux/of_pci.h
 index bb115de..6852481 100644
 --- a/include/linux/of_pci.h
 +++ b/include/linux/of_pci.h
 @@ -11,4 +11,7 @@ struct device_node;
  struct device_node *of_pci_find_child_device(struct device_node *parent,
unsigned int devfn);
  
 +void pci_process_bridge_OF_ranges(struct pci_controller *hose,
 + struct device_node *dev, int primary);
 +
  #endif

In this file, 'struct pci_controller' is not defined anywhere, and not
in any header file that is included. So I get a warning at compile time
when linux/of_pci.h is included, but nothing has defined 'struct
pci_controller' beforehand. So I think this file should carry a change
like:

+struct pci_controller;

In my version of the patch I added it, see:

diff --git a/include/linux/of_pci.h b/include/linux/of_pci.h
index bb115de..e56182f 100644
--- a/include/linux/of_pci.h
+++ b/include/linux/of_pci.h
@@ -4,6 +4,7 @@
 #include linux/pci.h
 
 struct pci_dev;
+struct pci_controller;
 struct of_irq;
 int of_irq_map_pci(const struct pci_dev *pdev, struct of_irq *out_irq);
 
@@ -11,4 +12,7 @@ struct device_node;
 struct device_node *of_pci_find_child_device(struct device_node *parent,
 unsigned int devfn);
 
+void pci_process_bridge_OF_ranges(struct pci_controller *hose,
+   struct device_node *dev, int primary);
+
 #endif

But otherwise, for PATCH 1/3 and 2/3,

Tested-by: Thomas Petazzoni thomas.petazz...@free-electrons.com

Thomas
-- 
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Kernel, drivers, real-time and embedded Linux
development, consulting, training and support.
http://free-electrons.com
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Re: [PATCH v4 04/14] mfd: Add Samsung PWM/timer master driver

2013-04-10 Thread Arnd Bergmann

On Monday 08 April 2013, Tomasz Figa wrote:
 On Saturday 06 of April 2013 00:24:18 Tomasz Figa wrote:
  On Friday 05 of April 2013 21:54:21 Arnd Bergmann wrote:
   On Friday 05 April 2013, Tomasz Figa wrote:
  
  I'm not sure what you mean by a register-level interface. Something like
  samsung_pwm_update_reg(reg, mask, val), which modifies bitfields
  according to the mask and value with appropriate synchronization? If
  yes, this solves only the problem of access to shared registers.
  
  The other problems that remain:
  
  - negotiation of PWM channels to use for clock source and clock events,
because each board can use different channels for PWM outputs,
  
  - code duplication caused by both of the drivers doing mostly the same
things and or having to parse the same data from device tree,
  
  - both non-DT and DT platforms must be supported,
  
  - how to keep the ability to load PWM driver as a module (or not load it
  at all when PWM is not used on particular board), while retaining
  everything that is needed for the clocksource driver in kernel,
  
  - some platforms can't use PWM timers as system clocksources, while on
others this is the only timekeeping hardware available.
  
 
 Hmm. Does anybody have an idea of a better way of implementing this PWM 
 timer support, which solves the above problems?
 
 This series is a dependency for moving Universal C210 board to DT-based 
 description and it's already almost out of time to get this included for 
 3.10...
 

Sorry for not replying earlier. My idea for the register level interface
was to create a platform_device for each PWM, e.g. using the mfd_cell
infrastructure. You can then pass a struct regmap as the platform
data for each child of the timer node, and all the DT handling code
can stay in the parent driver.

Arnd
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[PATCH v2] pinctrl: Add pinctrl-s3c24xx driver

2013-04-10 Thread Heiko Stübner

The s3c24xx pins follow a similar pattern as the other Samsung SoCs and
can therefore reuse the already introduced infrastructure.

The s3c24xx SoCs have one design oddity in that the first 4 external
interrupts do not reside in the eint pending register but in the main
interrupt controller instead. We solve this by forwarding the external
interrupt from the main controller into the irq domain of the pin bank.
The masking/acking of these interrupts is handled in the same way.

Furthermore the S3C2412/2413 SoCs contain another oddity in that they
keep the same 4 eints in the main interrupt controller and eintpend
register and requiring ack operations to happen in both. To solve this
a ctrl_type enum is introduced which can keep the type of controller
in the samsung_pin_ctrl struct for later retrieval.

The ctrl_type enum contains only S3C24XX and S3C2412 types, as the
eint-speciality is currently the only use-case. But it can be expaned
if other SoCs gain special handling requirements later on.

Signed-off-by: Heiko Stuebner he...@sntech.de
---
changes since v1:
- address comments from Tomasz Figa:
  * split handling functions for eints 0-3 for s3c2412 and all others
  * change the handling for s3c2412 eints 0-3 in that they now use
chained_irq_* for the outer parent interrupt

 .../bindings/pinctrl/samsung-pinctrl.txt   |8 +
 drivers/gpio/gpio-samsung.c|4 +
 drivers/pinctrl/Kconfig|5 +
 drivers/pinctrl/Makefile   |1 +
 drivers/pinctrl/pinctrl-s3c24xx.c  |  664 
 drivers/pinctrl/pinctrl-samsung.c  |   10 +
 drivers/pinctrl/pinctrl-samsung.h  |   16 +
 7 files changed, 708 insertions(+), 0 deletions(-)
 create mode 100644 drivers/pinctrl/pinctrl-s3c24xx.c

diff --git a/Documentation/devicetree/bindings/pinctrl/samsung-pinctrl.txt 
b/Documentation/devicetree/bindings/pinctrl/samsung-pinctrl.txt
index c70fca1..e4443e3 100644
--- a/Documentation/devicetree/bindings/pinctrl/samsung-pinctrl.txt
+++ b/Documentation/devicetree/bindings/pinctrl/samsung-pinctrl.txt
@@ -7,6 +7,10 @@ on-chip controllers onto these pads.
 
 Required Properties:
 - compatible: should be one of the following.
+  - samsung,s3c2413-pinctrl: for S3C64xx-compatible pin-controller,
+  - samsung,s3c2416-pinctrl: for S3C64xx-compatible pin-controller,
+  - samsung,s3c2440-pinctrl: for S3C64xx-compatible pin-controller,
+  - samsung,s3c2450-pinctrl: for S3C64xx-compatible pin-controller,
   - samsung,s3c64xx-pinctrl: for S3C64xx-compatible pin-controller,
   - samsung,exynos4210-pinctrl: for Exynos4210 compatible pin-controller.
   - samsung,exynos4x12-pinctrl: for Exynos4x12 compatible pin-controller.
@@ -106,6 +110,10 @@ B. External Wakeup Interrupts: For supporting external 
wakeup interrupts, a
 
- compatible: identifies the type of the external wakeup interrupt 
controller
  The possible values are:
+ - samsung,s3c2410-wakeup-eint: represents wakeup interrupt controller
+   found on Samsung S3C24xx SoCs except S3C2412 and S3C2413,
+ - samsung,s3c2412-wakeup-eint: represents wakeup interrupt controller
+   found on Samsung S3C2412 and S3C2413 SoCs,
  - samsung,s3c64xx-wakeup-eint: represents wakeup interrupt controller
found on Samsung S3C64xx SoCs,
  - samsung,exynos4210-wakeup-eint: represents wakeup interrupt controller
diff --git a/drivers/gpio/gpio-samsung.c b/drivers/gpio/gpio-samsung.c
index dc06a6f..73017b9 100644
--- a/drivers/gpio/gpio-samsung.c
+++ b/drivers/gpio/gpio-samsung.c
@@ -3026,6 +3026,10 @@ static __init int samsung_gpiolib_init(void)
*/
struct device_node *pctrl_np;
static const struct of_device_id exynos_pinctrl_ids[] = {
+   { .compatible = samsung,s3c2413-pinctrl, },
+   { .compatible = samsung,s3c2416-pinctrl, },
+   { .compatible = samsung,s3c2440-pinctrl, },
+   { .compatible = samsung,s3c2450-pinctrl, },
{ .compatible = samsung,s3c64xx-pinctrl, },
{ .compatible = samsung,exynos4210-pinctrl, },
{ .compatible = samsung,exynos4x12-pinctrl, },
diff --git a/drivers/pinctrl/Kconfig b/drivers/pinctrl/Kconfig
index 7402ac9..58d73ac 100644
--- a/drivers/pinctrl/Kconfig
+++ b/drivers/pinctrl/Kconfig
@@ -226,6 +226,11 @@ config PINCTRL_EXYNOS5440
select PINMUX
select PINCONF
 
+config PINCTRL_S3C24XX
+   bool Samsung S3C24XX SoC pinctrl driver
+   depends on ARCH_S3C24XX
+   select PINCTRL_SAMSUNG
+
 config PINCTRL_S3C64XX
bool Samsung S3C64XX SoC pinctrl driver
depends on ARCH_S3C64XX
diff --git a/drivers/pinctrl/Makefile b/drivers/pinctrl/Makefile
index 21d34c2..1ccdfd8 100644
--- a/drivers/pinctrl/Makefile
+++ b/drivers/pinctrl/Makefile
@@ -45,6 +45,7 @@ obj-$(CONFIG_PINCTRL_COH901)  += pinctrl-coh901.o
 obj-$(CONFIG_PINCTRL_SAMSUNG)  +=

Re: [PATCH v2 02/13] ARM: convert arm/arm64 arch timer to use CLKSRC_OF init

2013-04-10 Thread Rob Herring

On 04/04/2013 12:56 AM, Simon Horman wrote:
 On Mon, Apr 01, 2013 at 05:21:12PM -0500, Rob Herring wrote:
 From: Rob Herring rob.herr...@calxeda.com

 This converts arm and arm64 to use CLKSRC_OF DT based initialization for
 the arch timer. A new function arch_timer_arch_init is added to allow for
 arch specific setup.

 This has a side effect of enabling sched_clock on omap5 and exynos5. There
 should not be any reason not to use the arch timers for sched_clock.
 
 Would it be possible for you to either delay the removal of
 shmobile_timer_init. In general I am in favour of the following
 approach to wide changes such as this one:

I will simply change shmobile_timer_init to call clocksource_of_init
rather than deleting it. That should keep the new users working and then
it can be deleted latter.

 1. Add new feature
 2. Convert users to new feature
 3. Remove old feature.
 
 If it is not possible to delay the removal of shmobile_timer_init could you
 update your base such that you also remove its usage from the following
 files:
 
 arch/arm/mach-shmobile/board-kzm9g-reference.c
 arch/arm/mach-shmobile/setup-r8a73a4.c
 arch/arm/mach-shmobile/setup-r8a7779.c
 arch/arm/mach-shmobile/board-lager.c
 arch/arm/mach-shmobile/board-ape6evm.c
 arch/arm/mach-shmobile/setup-r8a7778.c
 arch/arm/mach-shmobile/board-marzen-reference.c
 arch/arm/mach-shmobile/setup-r8a7790.c
 arch/arm/mach-shmobile/board-bockw.c

Why so many boards? There's been prior discussions about whether to add
DT into existing board files or start with a minimal DT board file and
add to it. The fact that there are 14 mach desc's using
shmobile_timer_init which is a function only used for DT and 17 DT mach
descs total for shmobile tells me perhaps the latter approach is needed.

Either way, it is good to see progress on DT support in shmobile.

Rob

 The above files are all present in the arm-soc/next/boards2 branch
 of the arm-soc tree which has pulled the renesas-boards3-for-v3.10 tag
 of git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas.git.
 I am happy for you use the later as a base if you wish.
 
 Signed-off-by: Rob Herring rob.herr...@calxeda.com
 Cc: Russell King li...@arm.linux.org.uk
 Cc: Kukjin Kim kgene@samsung.com
 Cc: Tony Lindgren t...@atomide.com
 Cc: Simon Horman ho...@verge.net.au
 Cc: Magnus Damm magnus.d...@gmail.com
 Cc: Catalin Marinas catalin.mari...@arm.com
 Cc: Will Deacon will.dea...@arm.com
 Cc: John Stultz john.stu...@linaro.org
 Cc: Thomas Gleixner t...@linutronix.de
 Cc: linux-samsung-soc@vger.kernel.org
 Cc: linux-o...@vger.kernel.org
 Cc: linux...@vger.kernel.org
 ---
  arch/arm/include/asm/arch_timer.h|   13 +
  arch/arm/kernel/arch_timer.c |   17 +++--
  arch/arm/mach-exynos/mach-exynos5-dt.c   |1 -
  arch/arm/mach-exynos/mct.c   |6 --
  arch/arm/mach-highbank/highbank.c|5 +
  arch/arm/mach-omap2/timer.c  |5 +
  arch/arm/mach-shmobile/board-kzm9d.c |1 -
 
 I have boot tested the board-kzm9d change on the kzm9d board, it seems fine.
 
  arch/arm/mach-shmobile/include/mach/common.h |1 -
  arch/arm/mach-shmobile/setup-emev2.c |1 -
 
 I am not able to test the setup-emev2 portion properly at this time,
 booting the kzm9d board without the board-kzm9d file seems broken without
 your patch. However, your change seems reasonable to me.
 
  arch/arm/mach-shmobile/setup-r8a7740.c   |1 -
 
 I am not able to test the setup-r8a7740 portion properly at this time,
 booting the armadillo800eva board without the board-armadillo800eva file
 seems broken without your patch. However, your change seems reasonable to
 me.
 
  arch/arm/mach-shmobile/setup-sh7372.c|1 -
 
 I am not able to test the setup-sh7372 portion properly at this time,
 booting the mackerel board without the board-mackerel file seems broken 
 without
 your patch. However, your change seems reasonable to me.
 
  arch/arm/mach-shmobile/setup-sh73a0.c|1 -
 
 I have boot tested the setup-sh73a0 change on the kzm9g board, it seems fine.
 
 
 The tests above were made by merging
 
 git://sources.calxeda.com/kernel/linux.git arm-timers
 head commit: df3f518db302caf9fc0511917c5e9021037f6fcd
(devtree: add binding documentation for sp804)
 
 and the renesas-next-20130403 tag of the renesas tree (URL above).
 
  arch/arm/mach-shmobile/timer.c   |6 --
  arch/arm/mach-vexpress/v2m.c |7 ++-
  arch/arm/mach-virt/virt.c|9 -
  arch/arm64/include/asm/arch_timer.h  |5 +
  arch/arm64/kernel/time.c |6 --
  drivers/clocksource/Kconfig  |1 +
  drivers/clocksource/arm_arch_timer.c |   23 +--
  include/clocksource/arm_arch_timer.h |6 --
  20 files changed, 27 insertions(+), 89 deletions(-)

 diff

[PATCH 05/30] tty: serial/samsung: prepare for common clock API

2013-04-10 Thread Arnd Bergmann

With the common clock interface, there is no way to provide the
clock_source sysfs attribute for the samsung serial ports. Given that
this file was purely informational and had fixed contents, we have reason
to believe that no user space programs were relying on it.

The sysfs file is not documented in the ABI docs.

Signed-off-by: Arnd Bergmann a...@arndb.de
Cc: linux-ser...@vger.kernel.org
Cc: Greg Kroah-Hartman gre...@linuxfoundation.org
---
 drivers/tty/serial/samsung.c | 7 ++-
 1 file changed, 6 insertions(+), 1 deletion(-)

diff --git a/drivers/tty/serial/samsung.c b/drivers/tty/serial/samsung.c
index 2769a38..603f3f3 100644
--- a/drivers/tty/serial/samsung.c
+++ b/drivers/tty/serial/samsung.c
@@ -1179,6 +1179,7 @@ static int s3c24xx_serial_init_port(struct 
s3c24xx_uart_port *ourport,
return 0;
 }
 
+#ifdef CONFIG_SAMSUNG_CLOCK
 static ssize_t s3c24xx_serial_show_clksrc(struct device *dev,
  struct device_attribute *attr,
  char *buf)
@@ -1194,7 +1195,7 @@ static ssize_t s3c24xx_serial_show_clksrc(struct device 
*dev,
 }
 
 static DEVICE_ATTR(clock_source, S_IRUGO, s3c24xx_serial_show_clksrc, NULL);
-
+#endif
 
 /* Device driver serial port probe */
 
@@ -1252,9 +1253,11 @@ static int s3c24xx_serial_probe(struct platform_device 
*pdev)
uart_add_one_port(s3c24xx_uart_drv, ourport-port);
platform_set_drvdata(pdev, ourport-port);
 
+#ifdef CONFIG_SAMSUNG_CLOCK
ret = device_create_file(pdev-dev, dev_attr_clock_source);
if (ret  0)
dev_err(pdev-dev, failed to add clock source attr.\n);
+#endif
 
ret = s3c24xx_serial_cpufreq_register(ourport);
if (ret  0)
@@ -1272,7 +1275,9 @@ static int s3c24xx_serial_remove(struct platform_device 
*dev)
 
if (port) {
s3c24xx_serial_cpufreq_deregister(to_ourport(port));
+#ifdef CONFIG_SAMSUNG_CLOCK
device_remove_file(dev-dev, dev_attr_clock_source);
+#endif
uart_remove_one_port(s3c24xx_uart_drv, port);
}
 
-- 
1.8.1.2

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[PATCH 19/30] ASoC: samsung: use irq resource for idma

2013-04-10 Thread Arnd Bergmann

With multiplatform kernels, we cannot use hardwired IRQ
numbers in device drivers. This changes the idma driver
to use a proper resource, like all other drivers do.

Signed-off-by: Arnd Bergmann a...@arndb.de
Cc: alsa-de...@alsa-project.org
Cc: Mark Brown broo...@opensource.wolfsonmicro.com
Cc: Liam Girdwood lgirdw...@gmail.com
---
 arch/arm/plat-samsung/devs.c |  6 ++
 sound/soc/samsung/idma.c | 10 --
 2 files changed, 14 insertions(+), 2 deletions(-)

diff --git a/arch/arm/plat-samsung/devs.c b/arch/arm/plat-samsung/devs.c
index 78be9c0..b441908 100644
--- a/arch/arm/plat-samsung/devs.c
+++ b/arch/arm/plat-samsung/devs.c
@@ -145,14 +145,20 @@ struct platform_device s3c_device_camif = {
 
 /* ASOC DMA */
 
+#ifdef CONFIG_PLAT_S5P 
+static struct resource samsung_asoc_idma_resource = DEFINE_RES_IRQ(IRQ_I2S0);
+
 struct platform_device samsung_asoc_idma = {
.name   = samsung-idma,
.id = -1,
+   .num_resources  = 1,
+   .resource   = samsung_asoc_idma_resource,
.dev= {
.dma_mask   = samsung_device_dma_mask,
.coherent_dma_mask  = DMA_BIT_MASK(32),
}
 };
+#endif
 
 /* FB */
 
diff --git a/sound/soc/samsung/idma.c b/sound/soc/samsung/idma.c
index a07950b..f36a541 100644
--- a/sound/soc/samsung/idma.c
+++ b/sound/soc/samsung/idma.c
@@ -68,6 +68,8 @@ static struct idma_info {
dma_addr_t  lp_tx_addr;
 } idma;
 
+static int idma_irq;
+
 static void idma_getpos(dma_addr_t *src)
 {
*src = idma.lp_tx_addr +
@@ -305,7 +307,7 @@ static int idma_open(struct snd_pcm_substream *substream)
if (prtd == NULL)
return -ENOMEM;
 
-   ret = request_irq(IRQ_I2S0, iis_irq, 0, i2s, prtd);
+   ret = request_irq(idma_irq, iis_irq, 0, i2s, prtd);
if (ret  0) {
pr_err(fail to claim i2s irq , ret = %d\n, ret);
kfree(prtd);
@@ -324,7 +326,7 @@ static int idma_close(struct snd_pcm_substream *substream)
struct snd_pcm_runtime *runtime = substream-runtime;
struct idma_ctrl *prtd = runtime-private_data;
 
-   free_irq(IRQ_I2S0, prtd);
+   free_irq(idma_irq, prtd);
 
if (!prtd)
pr_err(idma_close called with prtd == NULL\n);
@@ -418,6 +420,10 @@ static struct snd_soc_platform_driver asoc_idma_platform = 
{
 
 static int asoc_idma_platform_probe(struct platform_device *pdev)
 {
+   idma_irq = platform_get_irq(pdev, 0);
+   if (idma_irq  0)
+   return idma_irq;
+
return snd_soc_register_platform(pdev-dev, asoc_idma_platform);
 }
 
-- 
1.8.1.2

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[PATCH 03/30] ARM: exynos: move debug-macro.S to include/debug/

2013-04-10 Thread Arnd Bergmann

The move is necessary to support early debug output on exynos
with multiplatform configurations. This implies also moving the
plat/debug-macro.S file, but we are leaving the remaining users of that
file in place, to avoid adding large numbers of extra configuration
options to Kconfig.debug

Signed-off-by: Arnd Bergmann a...@arndb.de
---
 arch/arm/Kconfig.debug   |  8 
 .../include/mach/debug-macro.S = include/debug/exynos.S}| 12 ++--
 .../include/plat/debug-macro.S = include/debug/samsung.S}   |  2 +-
 arch/arm/mach-s3c24xx/include/mach/debug-macro.S |  2 +-
 arch/arm/mach-s3c64xx/include/mach/debug-macro.S |  2 +-
 arch/arm/mach-s5p64x0/include/mach/debug-macro.S |  2 +-
 arch/arm/mach-s5pc100/include/mach/debug-macro.S |  2 +-
 arch/arm/mach-s5pv210/include/mach/debug-macro.S |  2 +-
 8 files changed, 20 insertions(+), 12 deletions(-)
 rename arch/arm/{mach-exynos/include/mach/debug-macro.S = 
include/debug/exynos.S} (84%)
 rename arch/arm/{plat-samsung/include/plat/debug-macro.S = 
include/debug/samsung.S} (98%)

diff --git a/arch/arm/Kconfig.debug b/arch/arm/Kconfig.debug
index e00bd4d..54d6fdc 100644
--- a/arch/arm/Kconfig.debug
+++ b/arch/arm/Kconfig.debug
@@ -348,6 +348,7 @@ choice
 
config DEBUG_S3C_UART0
depends on PLAT_SAMSUNG
+   select DEBUG_EXYNOS_UART if ARCH_EXYNOS
bool Use S3C UART 0 for low-level debug
help
  Say Y here if you want the debug print routines to direct
@@ -359,6 +360,7 @@ choice
 
config DEBUG_S3C_UART1
depends on PLAT_SAMSUNG
+   select DEBUG_EXYNOS_UART if ARCH_EXYNOS
bool Use S3C UART 1 for low-level debug
help
  Say Y here if you want the debug print routines to direct
@@ -370,6 +372,7 @@ choice
 
config DEBUG_S3C_UART2
depends on PLAT_SAMSUNG
+   select DEBUG_EXYNOS_UART if ARCH_EXYNOS
bool Use S3C UART 2 for low-level debug
help
  Say Y here if you want the debug print routines to direct
@@ -381,6 +384,7 @@ choice
 
config DEBUG_S3C_UART3
depends on PLAT_SAMSUNG  ARCH_EXYNOS
+   select DEBUG_EXYNOS_UART
bool Use S3C UART 3 for low-level debug
help
  Say Y here if you want the debug print routines to direct
@@ -510,6 +514,9 @@ choice
 
 endchoice
 
+config DEBUG_EXYNOS_UART
+   bool
+
 config DEBUG_IMX_UART_PORT
int i.MX Debug UART Port Selection if DEBUG_IMX1_UART || \
DEBUG_IMX25_UART || \
@@ -607,6 +614,7 @@ config DEBUG_LL_INCLUDE
string
default debug/bcm2835.S if DEBUG_BCM2835
default debug/cns3xxx.S if DEBUG_CNS3XXX
+   default debug/exynos.S if DEBUG_EXYNOS_UART
default debug/icedcc.S if DEBUG_ICEDCC
default debug/imx.S if DEBUG_IMX1_UART || \
 DEBUG_IMX25_UART || \
diff --git a/arch/arm/mach-exynos/include/mach/debug-macro.S 
b/arch/arm/include/debug/exynos.S
similarity index 84%
rename from arch/arm/mach-exynos/include/mach/debug-macro.S
rename to arch/arm/include/debug/exynos.S
index e0c86ea..b17fdb7 100644
--- a/arch/arm/mach-exynos/include/mach/debug-macro.S
+++ b/arch/arm/include/debug/exynos.S
@@ -1,10 +1,7 @@
-/* linux/arch/arm/mach-exynos4/include/mach/debug-macro.S
- *
+/*
  * Copyright (c) 2010-2011 Samsung Electronics Co., Ltd.
  * http://www.samsung.com
  *
- * Based on arch/arm/mach-s3c6400/include/mach/debug-macro.S
- *
  * This program is free software; you can redistribute it and/or modify
  * it under the terms of the GNU General Public License version 2 as
  * published by the Free Software Foundation.
@@ -12,7 +9,10 @@
 
 /* pull in the relevant register and map files. */
 
-#include mach/map.h
+#define S3C_ADDR_BASE   0xF600
+#define S3C_VA_UARTS3C_ADDR_BASE + 0x0100
+#define EXYNOS4_PA_UART0x1380
+#define EXYNOS5_PA_UART0x12C0
 
/* note, for the boot process to work we have to keep the UART
 * virtual address aligned to an 1MiB boundary for the L1
@@ -36,4 +36,4 @@
 #define fifo_full fifo_full_s5pv210
 #define fifo_level fifo_level_s5pv210
 
-#include plat/debug-macro.S
+#include debug/samsung.S
diff --git a/arch/arm/plat-samsung/include/plat/debug-macro.S 
b/arch/arm/include/debug/samsung.S
similarity index 98%
rename from arch/arm/plat-samsung/include/plat/debug-macro.S
rename to arch/arm/include/debug/samsung.S
index f3a9cff..8d8d922 100644
--- a/arch/arm/plat-samsung/include/plat/debug-macro.S
+++ b/arch/arm/include/debug/samsung.S
@@ -9,7 +9,7 @@
  * published by the Free Software Foundation.
 */
 
-#include plat/regs-serial.h
+#include linux/serial_s3c.h
 
 /* The S5PV210/S5PC110 implementations

[PATCH 28/30] irqchip: exynos: pass irq_base from platform

2013-04-10 Thread Arnd Bergmann

The platform code knows the IRQ base, while the irqchip driver
should really not. This is a littly hacky because we still
hardwire the IRQ base to 160 for the combiner in the DT case,
when we should really use -1. Removing that line will cause
a linear IRQ domain to be use, as we should.

Signed-off-by: Arnd Bergmann a...@arndb.de
Cc: Thomas Gleixner t...@linutronix.de
---
 arch/arm/mach-exynos/common.c |  3 ++-
 arch/arm/mach-exynos/common.h |  2 +-
 drivers/irqchip/exynos-combiner.c | 23 +--
 3 files changed, 16 insertions(+), 12 deletions(-)

diff --git a/arch/arm/mach-exynos/common.c b/arch/arm/mach-exynos/common.c
index b0e0b41..0634f99 100644
--- a/arch/arm/mach-exynos/common.c
+++ b/arch/arm/mach-exynos/common.c
@@ -479,7 +479,8 @@ void __init exynos4_init_irq(void)
 #endif
 
if (!of_have_populated_dt())
-   combiner_init(S5P_VA_COMBINER_BASE, NULL, max_combiner_nr());
+   combiner_init(S5P_VA_COMBINER_BASE, NULL,
+ max_combiner_nr(), COMBINER_IRQ(0, 0));
 
/*
 * The parameters of s5p_init_irq() are for VIC init.
diff --git a/arch/arm/mach-exynos/common.h b/arch/arm/mach-exynos/common.h
index 49bebd1..60dd35c 100644
--- a/arch/arm/mach-exynos/common.h
+++ b/arch/arm/mach-exynos/common.h
@@ -72,7 +72,7 @@ void exynos4212_register_clocks(void);
 
 struct device_node;
 void combiner_init(void __iomem *combiner_base, struct device_node *np,
-   unsigned int max_nr);
+   unsigned int max_nr, int irq_base);
 
 extern struct smp_operations exynos_smp_ops;
 
diff --git a/drivers/irqchip/exynos-combiner.c 
b/drivers/irqchip/exynos-combiner.c
index 31a4e96..7e876b5 100644
--- a/drivers/irqchip/exynos-combiner.c
+++ b/drivers/irqchip/exynos-combiner.c
@@ -207,27 +207,22 @@ static unsigned int combiner_lookup_irq(int group)
 
 void __init combiner_init(void __iomem *combiner_base,
  struct device_node *np,
- unsigned int max_nr)
+ unsigned int max_nr,
+ int irq_base)
 {
-   int i, irq, irq_base;
+   int i, irq;
unsigned int nr_irq;
struct combiner_chip_data *combiner_data;
 
nr_irq = max_nr * IRQ_IN_COMBINER;
 
-   irq_base = irq_alloc_descs(COMBINER_IRQ(0, 0), 1, nr_irq, 0);
-   if (IS_ERR_VALUE(irq_base)) {
-   irq_base = COMBINER_IRQ(0, 0);
-   pr_warning(%s: irq desc alloc failed. Continuing with %d as 
linux irq base\n, __func__, irq_base);
-   }
-
combiner_data = kcalloc(max_nr, sizeof (*combiner_data), GFP_KERNEL);
if (!combiner_data) {
pr_warning(%s: could not allocate combiner data\n, __func__);
return;
}
 
-   combiner_irq_domain = irq_domain_add_legacy(np, nr_irq, irq_base, 0,
+   combiner_irq_domain = irq_domain_add_simple(np, nr_irq, irq_base,
combiner_irq_domain_ops, combiner_data);
if (WARN_ON(!combiner_irq_domain)) {
pr_warning(%s: irq domain init failed\n, __func__);
@@ -254,6 +249,7 @@ static int __init combiner_of_init(struct device_node *np,
 {
void __iomem *combiner_base;
unsigned int max_nr;
+   int irq_base = -1;
 
combiner_base = of_iomap(np, 0);
if (!combiner_base) {
@@ -267,7 +263,14 @@ static int __init combiner_of_init(struct device_node *np,
__func__, max_nr);
}
 
-   combiner_init(combiner_base, np, max_nr);
+   /* 
+* FIXME: This is a hardwired COMBINER_IRQ(0,0). Once all devices
+* get their IRQ from DT, remove this in order to get dynamic
+* allocation.
+*/
+   irq_base = 160;
+
+   combiner_init(combiner_base, np, max_nr, irq_base);
 
return 0;
 }
-- 
1.8.1.2

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[PATCH 00/30] ARM: exynos multiplatform support

2013-04-10 Thread Arnd Bergmann

Hi everyone,

I have updated my series for multiplatform support of the ARM exynos
platform, based on what is currently queued up in arm-soc.

It would be really nice to still get this merged for 3.10. A lot of
the patches are really trivial, but there are some complex ones
as well.

To all subsystem maintainers: feel free to directly apply the patches
for your subsystem, there should be no dependencies between any of them,
aside from the last patch requiring all of the earlier ones to be applied
first. Getting an Ack is also fine so we can put the patches into arm-soc.

Arnd

Arnd Bergmann (30):
  ARM: exynos: introduce EXYNOS_ATAGS symbol
  ARM: exynos: prepare for sparse IRQ
  ARM: exynos: move debug-macro.S to include/debug/
  ARM: samsung: move mfc device definition to s5p-dev-mfc.c
  tty: serial/samsung: prepare for common clock API
  tty: serial/samsung: make register definitions global
  tty: serial/samsung: fix modular build
  i2c: s3c2410: make header file local
  mmc: sdhci-s3c: remove platform dependencies
  usb: exynos: do not include plat/usb-phy.h
  [media] exynos: remove unnecessary header inclusions
  video/exynos: remove unnecessary header inclusions
  video/s3c: move platform_data out of arch/arm
  thermal/exynos: remove unnecessary header inclusions
  mtd: onenand/samsung: make regs-onenand.h file local
  rtc: s3c: make header file local
  pwm: samsung: repair the worst MMIO abuses
  ASoC: samsung: move plat/ headers to local directory
  ASoC: samsung: use irq resource for idma
  ASoC: samsung: convert to dmaengine API
  ASoC: samsung/i2s: fix module_device_table
  ASoC: samsung/idma: export idma_reg_addr_init
  clk: exynos: prepare for multiplatform
  clocksource: exynos_mct: remove platform header dependency
  irqchip: exynos: pass max combiner number to combiner_init
  irqchip: exynos: allocate combiner_data dynamically
  irqchip: exynos: localize irq lookup for ATAGS
  irqchip: exynos: pass irq_base from platform
  spi: s3c64xx: move to generic dmaengine API
  ARM: exynos: enable multiplatform support

 arch/arm/Kconfig   |  10 +-
 arch/arm/Kconfig.debug |   8 +
 arch/arm/configs/exynos4_defconfig |   2 +-
 .../mach/debug-macro.S = include/debug/exynos.S}  |  12 +-
 .../plat/debug-macro.S = include/debug/samsung.S} |   2 +-
 arch/arm/mach-exynos/Kconfig   |  40 ++-
 arch/arm/mach-exynos/Makefile  |   5 +-
 arch/arm/mach-exynos/common.c  |  26 +-
 arch/arm/mach-exynos/common.h  |   7 +-
 arch/arm/mach-exynos/dev-uart.c|   1 +
 arch/arm/mach-exynos/include/mach/irqs.h   |   5 +-
 arch/arm/mach-exynos/mach-armlex4210.c |   2 +
 arch/arm/mach-exynos/mach-exynos4-dt.c |   3 +
 arch/arm/mach-exynos/mach-exynos5-dt.c |   2 +
 arch/arm/mach-exynos/mach-nuri.c   |   2 +
 arch/arm/mach-exynos/mach-origen.c |   2 +
 arch/arm/mach-exynos/mach-smdk4x12.c   |   2 +
 arch/arm/mach-exynos/mach-smdkv310.c   |   3 +
 arch/arm/mach-exynos/setup-sdhci-gpio.c|   2 +-
 arch/arm/mach-exynos/setup-usb-phy.c   |   8 +-
 arch/arm/mach-s3c24xx/clock-s3c2440.c  |   5 +
 arch/arm/mach-s3c24xx/common.c |   5 +
 arch/arm/mach-s3c24xx/dma-s3c2410.c|   2 -
 arch/arm/mach-s3c24xx/dma-s3c2412.c|   2 -
 arch/arm/mach-s3c24xx/dma-s3c2440.c|   2 -
 arch/arm/mach-s3c24xx/dma-s3c2443.c|   2 -
 arch/arm/mach-s3c24xx/include/mach/debug-macro.S   |   2 +-
 arch/arm/mach-s3c24xx/mach-rx1950.c|   1 -
 arch/arm/mach-s3c64xx/include/mach/debug-macro.S   |   2 +-
 arch/arm/mach-s3c64xx/setup-usb-phy.c  |   4 +-
 arch/arm/mach-s5p64x0/include/mach/debug-macro.S   |   2 +-
 arch/arm/mach-s5pc100/include/mach/debug-macro.S   |   2 +-
 arch/arm/mach-s5pc100/setup-sdhci-gpio.c   |   1 -
 arch/arm/mach-s5pv210/include/mach/debug-macro.S   |   2 +-
 arch/arm/mach-s5pv210/setup-sdhci-gpio.c   |   1 -
 arch/arm/mach-s5pv210/setup-usb-phy.c  |   4 +-
 arch/arm/plat-samsung/Kconfig  |   7 +-
 arch/arm/plat-samsung/Makefile |   8 +-
 arch/arm/plat-samsung/devs.c   |  62 ++---
 arch/arm/plat-samsung/include/plat/fb.h|  50 +---
 arch/arm/plat-samsung/include/plat/pm.h|   5 +
 arch/arm/plat-samsung/include/plat/regs-serial.h   | 282 +
 arch/arm/plat-samsung/include/plat/sdhci.h |  56 +---
 arch/arm/plat-samsung/include/plat/usb-phy.h   |   5 +-
 arch/arm/plat-samsung/irq-vic-timer.c  |   1 +
 arch/arm/plat-samsung/pm.c |   1 +
 arch/arm/plat-samsung/s5p-dev-mfc.c|  42 ++-
 arch/arm/plat-samsung/s5p-irq.c|

[PATCH 12/30] video/exynos: remove unnecessary header inclusions

2013-04-10 Thread Arnd Bergmann

In multiplatform configurations, we cannot include headers
provided by only the exynos platform. Fortunately a number
of drivers that include those headers do not actually need
them, so we can just remove the inclusions.

Signed-off-by: Arnd Bergmann a...@arndb.de
Cc: linux-fb...@vger.kernel.org
Cc: Jingoo Han jg1@samsung.com
---
 drivers/video/exynos/exynos_mipi_dsi.c  | 2 --
 drivers/video/exynos/exynos_mipi_dsi_common.c   | 2 --
 drivers/video/exynos/exynos_mipi_dsi_lowlevel.c | 2 --
 3 files changed, 6 deletions(-)

diff --git a/drivers/video/exynos/exynos_mipi_dsi.c 
b/drivers/video/exynos/exynos_mipi_dsi.c
index fac7df6..3dd43ca 100644
--- a/drivers/video/exynos/exynos_mipi_dsi.c
+++ b/drivers/video/exynos/exynos_mipi_dsi.c
@@ -35,8 +35,6 @@
 
 #include video/exynos_mipi_dsim.h
 
-#include plat/fb.h
-
 #include exynos_mipi_dsi_common.h
 #include exynos_mipi_dsi_lowlevel.h
 
diff --git a/drivers/video/exynos/exynos_mipi_dsi_common.c 
b/drivers/video/exynos/exynos_mipi_dsi_common.c
index c70cb89..520fc9b 100644
--- a/drivers/video/exynos/exynos_mipi_dsi_common.c
+++ b/drivers/video/exynos/exynos_mipi_dsi_common.c
@@ -31,8 +31,6 @@
 #include video/mipi_display.h
 #include video/exynos_mipi_dsim.h
 
-#include mach/map.h
-
 #include exynos_mipi_dsi_regs.h
 #include exynos_mipi_dsi_lowlevel.h
 #include exynos_mipi_dsi_common.h
diff --git a/drivers/video/exynos/exynos_mipi_dsi_lowlevel.c 
b/drivers/video/exynos/exynos_mipi_dsi_lowlevel.c
index 95cb99a..15c5abd 100644
--- a/drivers/video/exynos/exynos_mipi_dsi_lowlevel.c
+++ b/drivers/video/exynos/exynos_mipi_dsi_lowlevel.c
@@ -26,8 +26,6 @@
 
 #include video/exynos_mipi_dsim.h
 
-#include mach/map.h
-
 #include exynos_mipi_dsi_regs.h
 
 void exynos_mipi_dsi_func_reset(struct mipi_dsim_device *dsim)
-- 
1.8.1.2

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[PATCH 26/30] irqchip: exynos: allocate combiner_data dynamically

2013-04-10 Thread Arnd Bergmann

The number of combiners on a given SoC is a platform specific
constant, and we cannot encode this number on a multiplatform
kernel since the header file defining it is not available.

Allocating the structure dynamically ends up cleaner anyway
since we keep all the data local.

Signed-off-by: Arnd Bergmann a...@arndb.de
Cc: Thomas Gleixner t...@linutronix.de
---
 drivers/irqchip/exynos-combiner.c | 36 +++-
 1 file changed, 23 insertions(+), 13 deletions(-)

diff --git a/drivers/irqchip/exynos-combiner.c 
b/drivers/irqchip/exynos-combiner.c
index e7aef59..ffb10aa 100644
--- a/drivers/irqchip/exynos-combiner.c
+++ b/drivers/irqchip/exynos-combiner.c
@@ -12,6 +12,7 @@
 #include linux/export.h
 #include linux/init.h
 #include linux/io.h
+#include linux/slab.h
 #include linux/irqdomain.h
 #include linux/irqchip/chained_irq.h
 #include linux/of_address.h
@@ -38,7 +39,6 @@ struct combiner_chip_data {
 };
 
 static struct irq_domain *combiner_irq_domain;
-static struct combiner_chip_data combiner_data[MAX_COMBINER_NR];
 
 static inline void __iomem *combiner_base(struct irq_data *data)
 {
@@ -115,26 +115,26 @@ static struct irq_chip combiner_chip = {
 #endif
 };
 
-static void __init combiner_cascade_irq(unsigned int combiner_nr,
+static void __init combiner_cascade_irq(struct combiner_chip_data 
*combiner_data,
unsigned int irq)
 {
-   if (irq_set_handler_data(irq, combiner_data[combiner_nr]) != 0)
+   if (irq_set_handler_data(irq, combiner_data) != 0)
BUG();
irq_set_chained_handler(irq, combiner_handle_cascade_irq);
 }
 
-static void __init combiner_init_one(unsigned int combiner_nr,
+static void __init combiner_init_one(struct combiner_chip_data *combiner_data,
+unsigned int combiner_nr,
 void __iomem *base, unsigned int irq)
 {
-   combiner_data[combiner_nr].base = base;
-   combiner_data[combiner_nr].irq_offset = irq_find_mapping(
+   combiner_data-base = base;
+   combiner_data-irq_offset = irq_find_mapping(
combiner_irq_domain, combiner_nr * IRQ_IN_COMBINER);
-   combiner_data[combiner_nr].irq_mask = 0xff  ((combiner_nr % 4)  3);
-   combiner_data[combiner_nr].parent_irq = irq;
+   combiner_data-irq_mask = 0xff  ((combiner_nr % 4)  3);
+   combiner_data-parent_irq = irq;
 
/* Disable all interrupts */
-   __raw_writel(combiner_data[combiner_nr].irq_mask,
-base + COMBINER_ENABLE_CLEAR);
+   __raw_writel(combiner_data-irq_mask, base + COMBINER_ENABLE_CLEAR);
 }
 
 #ifdef CONFIG_OF
@@ -169,6 +169,8 @@ static int combiner_irq_domain_xlate(struct irq_domain *d,
 static int combiner_irq_domain_map(struct irq_domain *d, unsigned int irq,
   irq_hw_number_t hw)
 {
+   struct combiner_chip_data *combiner_data = d-host_data;
+
irq_set_chip_and_handler(irq, combiner_chip, handle_level_irq);
irq_set_chip_data(irq, combiner_data[hw  3]);
set_irq_flags(irq, IRQF_VALID | IRQF_PROBE);
@@ -203,6 +205,7 @@ void __init combiner_init(void __iomem *combiner_base,
 {
int i, irq, irq_base;
unsigned int nr_irq;
+   struct combiner_chip_data *combiner_data;
 
nr_irq = max_nr * IRQ_IN_COMBINER;
 
@@ -212,8 +215,14 @@ void __init combiner_init(void __iomem *combiner_base,
pr_warning(%s: irq desc alloc failed. Continuing with %d as 
linux irq base\n, __func__, irq_base);
}
 
+   combiner_data = kcalloc(max_nr, sizeof (*combiner_data), GFP_KERNEL);
+   if (!combiner_data) {
+   pr_warning(%s: could not allocate combiner data\n, __func__);
+   return;
+   }
+
combiner_irq_domain = irq_domain_add_legacy(np, nr_irq, irq_base, 0,
-   combiner_irq_domain_ops, combiner_data);
+   combiner_irq_domain_ops, combiner_data);
if (WARN_ON(!combiner_irq_domain)) {
pr_warning(%s: irq domain init failed\n, __func__);
return;
@@ -228,8 +237,9 @@ void __init combiner_init(void __iomem *combiner_base,
if (np)
irq = irq_of_parse_and_map(np, i);
 #endif
-   combiner_init_one(i, combiner_base + (i  2) * 0x10, irq);
-   combiner_cascade_irq(i, irq);
+   combiner_init_one(combiner_data[i], i,
+ combiner_base + (i  2) * 0x10, irq);
+   combiner_cascade_irq(combiner_data[i], irq);
}
 }
 
-- 
1.8.1.2

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[PATCH 16/30] rtc: s3c: make header file local

2013-04-10 Thread Arnd Bergmann

Nothing outside of the rtc driver includes plat/regs-rtc.h,
so we can simply move the file into the same directory,
which allows us to build the file as platform-independent
code.

Signed-off-by: Arnd Bergmann a...@arndb.de
Cc: rtc-li...@googlegroups.com
Cc: Alessandro Zummo a.zu...@towertech.it
---
 drivers/rtc/rtc-s3c.c  | 3 +--
 arch/arm/plat-samsung/include/plat/regs-rtc.h = drivers/rtc/rtc-s3c.h | 3 +--
 2 files changed, 2 insertions(+), 4 deletions(-)
 rename arch/arm/plat-samsung/include/plat/regs-rtc.h = drivers/rtc/rtc-s3c.h 
(97%)

diff --git a/drivers/rtc/rtc-s3c.c b/drivers/rtc/rtc-s3c.c
index fb994e9..7995f79 100644
--- a/drivers/rtc/rtc-s3c.c
+++ b/drivers/rtc/rtc-s3c.c
@@ -29,9 +29,8 @@
 #include linux/uaccess.h
 #include linux/io.h
 
-#include mach/hardware.h
 #include asm/irq.h
-#include plat/regs-rtc.h
+#include rtc-s3c.h
 
 enum s3c_cpu_type {
TYPE_S3C2410,
diff --git a/arch/arm/plat-samsung/include/plat/regs-rtc.h 
b/drivers/rtc/rtc-s3c.h
similarity index 97%
rename from arch/arm/plat-samsung/include/plat/regs-rtc.h
rename to drivers/rtc/rtc-s3c.h
index 0f8263e..004b61a 100644
--- a/arch/arm/plat-samsung/include/plat/regs-rtc.h
+++ b/drivers/rtc/rtc-s3c.h
@@ -1,5 +1,4 @@
-/* arch/arm/mach-s3c2410/include/mach/regs-rtc.h
- *
+/*
  * Copyright (c) 2003 Simtec Electronics li...@simtec.co.uk
  *   http://www.simtec.co.uk/products/SWLINUX/
  *
-- 
1.8.1.2

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[PATCH 21/30] ASoC: samsung/i2s: fix module_device_table

2013-04-10 Thread Arnd Bergmann

The second argument to the module_device_table macro must be the
name of the device id array. In the samsung i2s driver, there
was a small typo, resulting in a build error when building it
as a loadable module.

Signed-off-by: Arnd Bergmann a...@arndb.de
Cc: alsa-de...@alsa-project.org
Cc: Mark Brown broo...@opensource.wolfsonmicro.com
Cc: Liam Girdwood lgirdw...@gmail.com
---
 sound/soc/samsung/i2s.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/sound/soc/samsung/i2s.c b/sound/soc/samsung/i2s.c
index 61f2622..f7c6816 100644
--- a/sound/soc/samsung/i2s.c
+++ b/sound/soc/samsung/i2s.c
@@ -1289,7 +1289,7 @@ static struct platform_device_id samsung_i2s_driver_ids[] 
= {
},
{},
 };
-MODULE_DEVICE_TABLE(platform, samsung-i2s-driver-ids);
+MODULE_DEVICE_TABLE(platform, samsung_i2s_driver_ids);
 
 #ifdef CONFIG_OF
 static struct samsung_i2s_dai_data samsung_i2s_dai_data_array[] = {
-- 
1.8.1.2

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[PATCH 29/30] spi: s3c64xx: move to generic dmaengine API

2013-04-10 Thread Arnd Bergmann

The spi-s3c64xx uses a Samsung proprietary interface for
talking to the DMA engine, which does not work with
multiplatform kernels.

This version of the patch leaves the old code in place,
behind an #ifdef. This can be removed in the future,
after the s3c64xx platform start supporting the regular
dmaengine interface. An earlier version of this patch was
tested successfully on exynos5250 by Padma Venkat.

The conversion was rather mechanical, since the samsung
interface is just a shallow wrapper around the dmaengine
interface.

Signed-off-by: Arnd Bergmann a...@arndb.de
Cc: spi-devel-gene...@lists.sourceforge.net
Cc: Mark Brown broo...@opensource.wolfsonmicro.com
Cc: Grant Likely grant.lik...@secretlab.ca
Cc: Padma Venkat padma@gmail.com
---
 arch/arm/plat-samsung/devs.c  |  10 ++
 drivers/spi/spi-s3c64xx.c | 185 +++---
 include/linux/platform_data/spi-s3c64xx.h |   3 +
 3 files changed, 154 insertions(+), 44 deletions(-)

diff --git a/arch/arm/plat-samsung/devs.c b/arch/arm/plat-samsung/devs.c
index b441908..30c2fe2 100644
--- a/arch/arm/plat-samsung/devs.c
+++ b/arch/arm/plat-samsung/devs.c
@@ -10,6 +10,7 @@
  * published by the Free Software Foundation.
 */
 
+#include linux/amba/pl330.h
 #include linux/kernel.h
 #include linux/types.h
 #include linux/interrupt.h
@@ -1512,6 +1513,9 @@ void __init s3c64xx_spi0_set_platdata(int 
(*cfg_gpio)(void), int src_clk_nr,
pd.num_cs = num_cs;
pd.src_clk_nr = src_clk_nr;
pd.cfg_gpio = (cfg_gpio) ? cfg_gpio : s3c64xx_spi0_cfg_gpio;
+#ifdef CONFIG_PL330_DMA
+   pd.filter = pl330_filter;
+#endif
 
s3c_set_platdata(pd, sizeof(pd), s3c64xx_device_spi0);
 }
@@ -1550,6 +1554,9 @@ void __init s3c64xx_spi1_set_platdata(int 
(*cfg_gpio)(void), int src_clk_nr,
pd.num_cs = num_cs;
pd.src_clk_nr = src_clk_nr;
pd.cfg_gpio = (cfg_gpio) ? cfg_gpio : s3c64xx_spi1_cfg_gpio;
+#ifdef CONFIG_PL330_DMA
+   pd.filter = pl330_filter;
+#endif
 
s3c_set_platdata(pd, sizeof(pd), s3c64xx_device_spi1);
 }
@@ -1588,6 +1595,9 @@ void __init s3c64xx_spi2_set_platdata(int 
(*cfg_gpio)(void), int src_clk_nr,
pd.num_cs = num_cs;
pd.src_clk_nr = src_clk_nr;
pd.cfg_gpio = (cfg_gpio) ? cfg_gpio : s3c64xx_spi2_cfg_gpio;
+#ifdef CONFIG_PL330_DMA
+   pd.filter = pl330_filter;
+#endif
 
s3c_set_platdata(pd, sizeof(pd), s3c64xx_device_spi2);
 }
diff --git a/drivers/spi/spi-s3c64xx.c b/drivers/spi/spi-s3c64xx.c
index 4188b2f..74809af 100644
--- a/drivers/spi/spi-s3c64xx.c
+++ b/drivers/spi/spi-s3c64xx.c
@@ -24,6 +24,7 @@
 #include linux/delay.h
 #include linux/clk.h
 #include linux/dma-mapping.h
+#include linux/dmaengine.h
 #include linux/platform_device.h
 #include linux/pm_runtime.h
 #include linux/spi/spi.h
@@ -31,9 +32,12 @@
 #include linux/of.h
 #include linux/of_gpio.h
 
-#include mach/dma.h
 #include linux/platform_data/spi-s3c64xx.h
 
+#ifdef CONFIG_SAMSUNG_DMADEV
+#include mach/dma.h
+#endif
+
 #define MAX_SPI_PORTS  3
 
 /* Registers and bit-fields */
@@ -131,9 +135,9 @@
 #define TXBUSY(13)
 
 struct s3c64xx_spi_dma_data {
-   unsignedch;
+   struct dma_chan *ch;
enum dma_transfer_direction direction;
-   enum dma_ch dmach;
+   unsigned int dmach;
 };
 
 /**
@@ -195,16 +199,14 @@ struct s3c64xx_spi_driver_data {
unsignedcur_speed;
struct s3c64xx_spi_dma_data rx_dma;
struct s3c64xx_spi_dma_data tx_dma;
+#ifdef CONFIG_SAMSUNG_DMADEV
struct samsung_dma_ops  *ops;
+#endif
struct s3c64xx_spi_port_config  *port_conf;
unsigned intport_id;
unsigned long   gpios[4];
 };
 
-static struct s3c2410_dma_client s3c64xx_spi_dma_client = {
-   .name = samsung-spi-dma,
-};
-
 static void flush_fifo(struct s3c64xx_spi_driver_data *sdd)
 {
void __iomem *regs = sdd-regs;
@@ -281,6 +283,13 @@ static void s3c64xx_spi_dmacb(void *data)
spin_unlock_irqrestore(sdd-lock, flags);
 }
 
+#ifdef CONFIG_SAMSUNG_DMADEV
+/* FIXME: remove this section once arch/arm/mach-s3c64xx uses dmaengine */
+
+static struct s3c2410_dma_client s3c64xx_spi_dma_client = {
+   .name = samsung-spi-dma,
+};
+
 static void prepare_dma(struct s3c64xx_spi_dma_data *dma,
unsigned len, dma_addr_t buf)
 {
@@ -294,14 +303,14 @@ static void prepare_dma(struct s3c64xx_spi_dma_data *dma,
config.direction = sdd-rx_dma.direction;
config.fifo = sdd-sfr_start + S3C64XX_SPI_RX_DATA;
config.width = sdd-cur_bpw / 8;
-   sdd-ops-config(sdd-rx_dma.ch, config);
+   sdd-ops-config((enum dma_ch)sdd-rx_dma.ch, config);
} else {
sdd = container_of((void *)dma,
struct s3c64xx_spi_driver_data, tx_dma);
config.direction =

[PATCH 22/30] ASoC: samsung/idma: export idma_reg_addr_init

2013-04-10 Thread Arnd Bergmann

The idma_reg_addr_init function is used by the samsung i2s driver,
which can be a loadable module, so we have to export this function.

Signed-off-by: Arnd Bergmann a...@arndb.de
Cc: alsa-de...@alsa-project.org
Cc: Mark Brown broo...@opensource.wolfsonmicro.com
Cc: Liam Girdwood lgirdw...@gmail.com
---
 sound/soc/samsung/idma.c | 1 +
 1 file changed, 1 insertion(+)

diff --git a/sound/soc/samsung/idma.c b/sound/soc/samsung/idma.c
index f36a541..6e5fed3 100644
--- a/sound/soc/samsung/idma.c
+++ b/sound/soc/samsung/idma.c
@@ -411,6 +411,7 @@ void idma_reg_addr_init(void __iomem *regs, dma_addr_t addr)
idma.regs = regs;
idma.lp_tx_addr = addr;
 }
+EXPORT_SYMBOL_GPL(idma_reg_addr_init);
 
 static struct snd_soc_platform_driver asoc_idma_platform = {
.ops = idma_ops,
-- 
1.8.1.2

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Re: [PATCH v2 02/13] ARM: convert arm/arm64 arch timer to use CLKSRC_OF init

2013-04-10 Thread Simon Horman

[ CC Magnus Damm ]

On Wed, Apr 10, 2013 at 06:17:31PM -0500, Rob Herring wrote:
 On 04/04/2013 12:56 AM, Simon Horman wrote:
  On Mon, Apr 01, 2013 at 05:21:12PM -0500, Rob Herring wrote:
  From: Rob Herring rob.herr...@calxeda.com
 
  This converts arm and arm64 to use CLKSRC_OF DT based initialization for
  the arch timer. A new function arch_timer_arch_init is added to allow for
  arch specific setup.
 
  This has a side effect of enabling sched_clock on omap5 and exynos5. There
  should not be any reason not to use the arch timers for sched_clock.
  
  Would it be possible for you to either delay the removal of
  shmobile_timer_init. In general I am in favour of the following
  approach to wide changes such as this one:
 
 I will simply change shmobile_timer_init to call clocksource_of_init
 rather than deleting it. That should keep the new users working and then
 it can be deleted latter.

Thanks.

  1. Add new feature
  2. Convert users to new feature
  3. Remove old feature.
  
  If it is not possible to delay the removal of shmobile_timer_init could you
  update your base such that you also remove its usage from the following
  files:
  
  arch/arm/mach-shmobile/board-kzm9g-reference.c
  arch/arm/mach-shmobile/setup-r8a73a4.c
  arch/arm/mach-shmobile/setup-r8a7779.c
  arch/arm/mach-shmobile/board-lager.c
  arch/arm/mach-shmobile/board-ape6evm.c
  arch/arm/mach-shmobile/setup-r8a7778.c
  arch/arm/mach-shmobile/board-marzen-reference.c
  arch/arm/mach-shmobile/setup-r8a7790.c
  arch/arm/mach-shmobile/board-bockw.c
 
 Why so many boards? There's been prior discussions about whether to add
 DT into existing board files or start with a minimal DT board file and
 add to it. The fact that there are 14 mach desc's using
 shmobile_timer_init which is a function only used for DT and 17 DT mach
 descs total for shmobile tells me perhaps the latter approach is needed.
 
 Either way, it is good to see progress on DT support in shmobile.

I've CCed Magnus who can answer that question better than I.
But in general I believe the answer is that because DT support for
many of the drivers that the boards and SoCs rely on isn't quite (or
in some cases at all) ready yet we need to bring things up using C code.

I realise that there are other approaches to this problem, but
this is the one we're taking at this time.

 
 Rob
 
  The above files are all present in the arm-soc/next/boards2 branch
  of the arm-soc tree which has pulled the renesas-boards3-for-v3.10 tag
  of git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas.git.
  I am happy for you use the later as a base if you wish.
  
  Signed-off-by: Rob Herring rob.herr...@calxeda.com
  Cc: Russell King li...@arm.linux.org.uk
  Cc: Kukjin Kim kgene@samsung.com
  Cc: Tony Lindgren t...@atomide.com
  Cc: Simon Horman ho...@verge.net.au
  Cc: Magnus Damm magnus.d...@gmail.com
  Cc: Catalin Marinas catalin.mari...@arm.com
  Cc: Will Deacon will.dea...@arm.com
  Cc: John Stultz john.stu...@linaro.org
  Cc: Thomas Gleixner t...@linutronix.de
  Cc: linux-samsung-soc@vger.kernel.org
  Cc: linux-o...@vger.kernel.org
  Cc: linux...@vger.kernel.org
  ---
   arch/arm/include/asm/arch_timer.h|   13 +
   arch/arm/kernel/arch_timer.c |   17 +++--
   arch/arm/mach-exynos/mach-exynos5-dt.c   |1 -
   arch/arm/mach-exynos/mct.c   |6 --
   arch/arm/mach-highbank/highbank.c|5 +
   arch/arm/mach-omap2/timer.c  |5 +
   arch/arm/mach-shmobile/board-kzm9d.c |1 -
  
  I have boot tested the board-kzm9d change on the kzm9d board, it seems fine.
  
   arch/arm/mach-shmobile/include/mach/common.h |1 -
   arch/arm/mach-shmobile/setup-emev2.c |1 -
  
  I am not able to test the setup-emev2 portion properly at this time,
  booting the kzm9d board without the board-kzm9d file seems broken without
  your patch. However, your change seems reasonable to me.
  
   arch/arm/mach-shmobile/setup-r8a7740.c   |1 -
  
  I am not able to test the setup-r8a7740 portion properly at this time,
  booting the armadillo800eva board without the board-armadillo800eva file
  seems broken without your patch. However, your change seems reasonable to
  me.
  
   arch/arm/mach-shmobile/setup-sh7372.c|1 -
  
  I am not able to test the setup-sh7372 portion properly at this time,
  booting the mackerel board without the board-mackerel file seems broken 
  without
  your patch. However, your change seems reasonable to me.
  
   arch/arm/mach-shmobile/setup-sh73a0.c|1 -
  
  I have boot tested the setup-sh73a0 change on the kzm9g board, it seems 
  fine.
  
  
  The tests above were made by merging
  
  git://sources.calxeda.com/kernel/linux.git arm-timers
  head commit: df3f518db302caf9fc0511917c5e9021037f6fcd
   (devtree: add binding documentation for sp804)
  
  and the renesas-next-20130403 tag of the renesas tree

[PATCH 25/30] irqchip: exynos: pass max combiner number to combiner_init

2013-04-10 Thread Arnd Bergmann

We can find out the number of combined IRQs from the device
tree, but in case of ATAGS boot, the driver currently uses
hardcoded values based on the SoC type. We can't do that
in general for a multiplatform kernel, so let's instead pass
this information from platform code directly in case of
ATAGS boot.

Signed-off-by: Arnd Bergmann a...@arndb.de
Cc: Thomas Gleixner t...@linutronix.de
---
 arch/arm/mach-exynos/common.c | 15 -
 arch/arm/mach-exynos/common.h |  3 ++-
 drivers/irqchip/exynos-combiner.c | 46 ++-
 3 files changed, 32 insertions(+), 32 deletions(-)

diff --git a/arch/arm/mach-exynos/common.c b/arch/arm/mach-exynos/common.c
index 8e85d6c..b0e0b41 100644
--- a/arch/arm/mach-exynos/common.c
+++ b/arch/arm/mach-exynos/common.c
@@ -452,6 +452,19 @@ void __init exynos_init_time(void)
}
 }
 
+static unsigned int max_combiner_nr(void)
+{
+   if (soc_is_exynos5250())
+   return EXYNOS5_MAX_COMBINER_NR;
+   else if (soc_is_exynos4412())
+   return EXYNOS4412_MAX_COMBINER_NR;
+   else if (soc_is_exynos4212())
+   return EXYNOS4212_MAX_COMBINER_NR;
+   else
+   return EXYNOS4210_MAX_COMBINER_NR;
+}
+
+
 void __init exynos4_init_irq(void)
 {
unsigned int gic_bank_offset;
@@ -466,7 +479,7 @@ void __init exynos4_init_irq(void)
 #endif
 
if (!of_have_populated_dt())
-   combiner_init(S5P_VA_COMBINER_BASE, NULL);
+   combiner_init(S5P_VA_COMBINER_BASE, NULL, max_combiner_nr());
 
/*
 * The parameters of s5p_init_irq() are for VIC init.
diff --git a/arch/arm/mach-exynos/common.h b/arch/arm/mach-exynos/common.h
index f426a5b..49bebd1 100644
--- a/arch/arm/mach-exynos/common.h
+++ b/arch/arm/mach-exynos/common.h
@@ -71,7 +71,8 @@ void exynos4212_register_clocks(void);
 #endif
 
 struct device_node;
-void combiner_init(void __iomem *combiner_base, struct device_node *np);
+void combiner_init(void __iomem *combiner_base, struct device_node *np,
+   unsigned int max_nr);
 
 extern struct smp_operations exynos_smp_ops;
 
diff --git a/drivers/irqchip/exynos-combiner.c 
b/drivers/irqchip/exynos-combiner.c
index 02492ab..e7aef59 100644
--- a/drivers/irqchip/exynos-combiner.c
+++ b/drivers/irqchip/exynos-combiner.c
@@ -26,6 +26,8 @@
 #define COMBINER_ENABLE_CLEAR  0x4
 #define COMBINER_INT_STATUS0xC
 
+#define IRQ_IN_COMBINER8
+
 static DEFINE_SPINLOCK(irq_controller_lock);
 
 struct combiner_chip_data {
@@ -113,23 +115,9 @@ static struct irq_chip combiner_chip = {
 #endif
 };
 
-static unsigned int max_combiner_nr(void)
-{
-   if (soc_is_exynos5250())
-   return EXYNOS5_MAX_COMBINER_NR;
-   else if (soc_is_exynos4412())
-   return EXYNOS4412_MAX_COMBINER_NR;
-   else if (soc_is_exynos4212())
-   return EXYNOS4212_MAX_COMBINER_NR;
-   else
-   return EXYNOS4210_MAX_COMBINER_NR;
-}
-
 static void __init combiner_cascade_irq(unsigned int combiner_nr,
unsigned int irq)
 {
-   if (combiner_nr = max_combiner_nr())
-   BUG();
if (irq_set_handler_data(irq, combiner_data[combiner_nr]) != 0)
BUG();
irq_set_chained_handler(irq, combiner_handle_cascade_irq);
@@ -140,7 +128,7 @@ static void __init combiner_init_one(unsigned int 
combiner_nr,
 {
combiner_data[combiner_nr].base = base;
combiner_data[combiner_nr].irq_offset = irq_find_mapping(
-   combiner_irq_domain, combiner_nr * MAX_IRQ_IN_COMBINER);
+   combiner_irq_domain, combiner_nr * IRQ_IN_COMBINER);
combiner_data[combiner_nr].irq_mask = 0xff  ((combiner_nr % 4)  3);
combiner_data[combiner_nr].parent_irq = irq;
 
@@ -162,7 +150,7 @@ static int combiner_irq_domain_xlate(struct irq_domain *d,
if (intsize  2)
return -EINVAL;
 
-   *out_hwirq = intspec[0] * MAX_IRQ_IN_COMBINER + intspec[1];
+   *out_hwirq = intspec[0] * IRQ_IN_COMBINER + intspec[1];
*out_type = 0;
 
return 0;
@@ -210,22 +198,13 @@ static unsigned int exynos4x12_combiner_extra_irq(int 
group)
 }
 
 void __init combiner_init(void __iomem *combiner_base,
- struct device_node *np)
+ struct device_node *np,
+ unsigned int max_nr)
 {
int i, irq, irq_base;
-   unsigned int max_nr, nr_irq;
+   unsigned int nr_irq;
 
-   max_nr = max_combiner_nr();
-
-   if (np) {
-   if (of_property_read_u32(np, samsung,combiner-nr, max_nr)) {
-   pr_info(%s: number of combiners not specified, 
-   setting default as %d.\n,
-   __func__, max_nr);
-   }
-   }
-
-   nr_irq = max_nr * MAX_IRQ_IN_COMBINER;
+   nr_irq = max_nr * IRQ_IN_COMBINER;
 
irq_base =

[PATCH 27/30] irqchip: exynos: localize irq lookup for ATAGS

2013-04-10 Thread Arnd Bergmann

The IRQ_SPI() macro is not available in the driver when building with sparse
IRQs or multiplatform, so let's move all users of this into one function
that we can leave out when building DT-only.

Signed-off-by: Arnd Bergmann a...@arnd.de
Cc: Thomas Gleixner t...@linutronix.de
---
 drivers/irqchip/exynos-combiner.c | 19 ---
 1 file changed, 12 insertions(+), 7 deletions(-)

diff --git a/drivers/irqchip/exynos-combiner.c 
b/drivers/irqchip/exynos-combiner.c
index ffb10aa..31a4e96 100644
--- a/drivers/irqchip/exynos-combiner.c
+++ b/drivers/irqchip/exynos-combiner.c
@@ -19,7 +19,9 @@
 #include linux/of_irq.h
 #include asm/mach/irq.h
 
+#ifdef CONFIG_EXYNOS_ATAGS
 #include plat/cpu.h
+#endif
 
 #include irqchip.h
 
@@ -183,8 +185,12 @@ static struct irq_domain_ops combiner_irq_domain_ops = {
.map= combiner_irq_domain_map,
 };
 
-static unsigned int exynos4x12_combiner_extra_irq(int group)
+static unsigned int combiner_lookup_irq(int group)
 {
+#ifdef CONFIG_EXYNOS_ATAGS
+   if (group  EXYNOS4210_MAX_COMBINER_NR || soc_is_exynos5250())
+   return IRQ_SPI(group);
+
switch (group) {
case 16:
return IRQ_SPI(107);
@@ -194,9 +200,9 @@ static unsigned int exynos4x12_combiner_extra_irq(int group)
return IRQ_SPI(48);
case 19:
return IRQ_SPI(42);
-   default:
-   return 0;
}
+#endif
+   return 0;
 }
 
 void __init combiner_init(void __iomem *combiner_base,
@@ -229,14 +235,13 @@ void __init combiner_init(void __iomem *combiner_base,
}
 
for (i = 0; i  max_nr; i++) {
-   if (i  EXYNOS4210_MAX_COMBINER_NR || soc_is_exynos5250())
-   irq = IRQ_SPI(i);
-   else
-   irq = exynos4x12_combiner_extra_irq(i);
 #ifdef CONFIG_OF
if (np)
irq = irq_of_parse_and_map(np, i);
+   else
 #endif
+   irq = combiner_lookup_irq(i);
+
combiner_init_one(combiner_data[i], i,
  combiner_base + (i  2) * 0x10, irq);
combiner_cascade_irq(combiner_data[i], irq);
-- 
1.8.1.2

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[PATCH 20/30] ASoC: samsung: convert to dmaengine API

2013-04-10 Thread Arnd Bergmann

In order to build the exynos kernel with CONFIG_ARCH_MULTIPLATFORM,
we must convert all users of the Samsung private DMA interface to
the generic dmaengine API. This version of the patch adds the
generic dmaengine API as an alternative to the existing samsung
specific one. Once all the older platforms provide support for
the common dmaengine interfaces, we can remove the old code.

Signed-off-by: Arnd Bergmann a...@arndb.de
Cc: alsa-de...@alsa-project.org
Cc: Mark Brown broo...@opensource.wolfsonmicro.com
Cc: Liam Girdwood lgirdw...@gmail.com
---
 sound/soc/samsung/dma.c   | 219 ++
 sound/soc/samsung/dma.h   |  15 +++-
 sound/soc/samsung/i2s.c   |   2 -
 sound/soc/samsung/pcm.c   |   1 -
 sound/soc/samsung/spdif.c |   1 -
 5 files changed, 232 insertions(+), 6 deletions(-)

diff --git a/sound/soc/samsung/dma.c b/sound/soc/samsung/dma.c
index 21b7926..9fd53df 100644
--- a/sound/soc/samsung/dma.c
+++ b/sound/soc/samsung/dma.c
@@ -22,8 +22,14 @@
 #include sound/pcm_params.h
 
 #include asm/dma.h
+
+#ifdef CONFIG_SAMSUNG_DMADEV
 #include mach/hardware.h
 #include mach/dma.h
+#else
+#include linux/dmaengine.h
+#include linux/amba/pl330.h
+#endif
 
 #include dma.h
 
@@ -62,11 +68,13 @@ struct runtime_data {
 
 static void audio_buffdone(void *data);
 
+#ifdef CONFIG_SAMSUNG_DMADEV
 /* dma_enqueue
  *
  * place a dma buffer onto the queue for the dma system
  * to handle.
  */
+
 static void dma_enqueue(struct snd_pcm_substream *substream)
 {
struct runtime_data *prtd = substream-runtime-private_data;
@@ -265,6 +273,217 @@ static int dma_trigger(struct snd_pcm_substream 
*substream, int cmd)
 
return ret;
 }
+#else
+/* dma_enqueue
+ *
+ * place a dma buffer onto the queue for the dma system
+ * to handle.
+ */
+
+static void dma_enqueue(struct snd_pcm_substream *substream)
+{
+   struct runtime_data *prtd = substream-runtime-private_data;
+   dma_addr_t pos = prtd-dma_pos;
+   unsigned long period = prtd-dma_period;
+   unsigned int limit;
+   enum dma_transfer_direction direction;
+   struct dma_chan *chan = prtd-params-ch;
+   struct dma_async_tx_descriptor *desc;
+
+   pr_debug(Entered %s\n, __func__);
+
+   limit = (prtd-dma_end - prtd-dma_start) / prtd-dma_period;
+
+   pr_debug(%s: loaded %d, limit %d\n,
+   __func__, prtd-dma_loaded, limit);
+
+   direction = (substream-stream == SNDRV_PCM_STREAM_PLAYBACK
+? DMA_MEM_TO_DEV : DMA_DEV_TO_MEM);
+
+   while (prtd-dma_loaded  limit) {
+   pr_debug(dma_loaded: %d\n, prtd-dma_loaded);
+
+   if ((pos + period)  prtd-dma_end) {
+   period  = prtd-dma_end - pos;
+   pr_debug(%s: corrected dma len %ld\n,
+   __func__, period);
+   }
+
+   desc = dmaengine_prep_dma_cyclic(chan, pos,
+prtd-dma_period*limit, period, direction,
+   DMA_PREP_INTERRUPT | DMA_CTRL_ACK);
+
+   if (desc) {
+   desc-callback = audio_buffdone;
+   desc-callback_param = substream;
+   dmaengine_submit(desc);
+   }
+
+   prtd-dma_loaded++;
+   pos += period;
+   if (pos = prtd-dma_end)
+   pos = prtd-dma_start;
+   }
+
+   prtd-dma_pos = pos;
+}
+
+static void audio_buffdone(void *data)
+{
+   struct snd_pcm_substream *substream = data;
+   struct runtime_data *prtd = substream-runtime-private_data;
+
+   pr_debug(Entered %s\n, __func__);
+
+   if (prtd-state  ST_RUNNING) {
+   prtd-dma_pos += prtd-dma_period;
+   if (prtd-dma_pos = prtd-dma_end)
+   prtd-dma_pos = prtd-dma_start;
+
+   if (substream)
+   snd_pcm_period_elapsed(substream);
+   }
+}
+
+static int dma_hw_params(struct snd_pcm_substream *substream,
+   struct snd_pcm_hw_params *params)
+{
+   struct snd_pcm_runtime *runtime = substream-runtime;
+   struct runtime_data *prtd = runtime-private_data;
+   struct snd_soc_pcm_runtime *rtd = substream-private_data;
+   unsigned long totbytes = params_buffer_bytes(params);
+   struct s3c_dma_params *dma =
+   snd_soc_dai_get_dma_data(rtd-cpu_dai, substream);
+
+   pr_debug(Entered %s\n, __func__);
+
+   /* return if this is a bufferless transfer e.g.
+* codec -- BT codec or GSM modem -- lg FIXME */
+   if (!dma)
+   return 0;
+
+   /* this may get called several times by oss emulation
+* with different params -HW */
+   if (prtd-params == NULL) {
+   struct dma_slave_config config;
+   dma_cap_mask_t mask;
+
+   /* prepare DMA */
+   prtd-params = dma;
+
+   pr_debug(params %p, channel %d\n,

[PATCH 30/30] ARM: exynos: enable multiplatform support

2013-04-10 Thread Arnd Bergmann

This makes it possible to enable the exynos platform as part of a
multiplatform kernel, in addition to keeping the single-platform
exynos support.

The multiplatform variant has a number of limitations at the moment:

* It only supports DT-enabled machines. This is not a problem in
  the long run, as non-DT machines for exynos are going away.
  The main problem here is that the gpio code and the exynos_eint
  irqchip are not multiplatform capable but still required for
  ATAGS based boot.
* The watchdog driver is still missing a conversion.
* sparsemem and memory_holes are currently not supported in
  multiplatform.

Signed-off-by: Arnd Bergmann a...@arndb.de
---
 arch/arm/Kconfig| 10 +-
 arch/arm/configs/exynos4_defconfig  |  2 +-
 arch/arm/mach-exynos/Kconfig| 25 +
 arch/arm/mach-exynos/Makefile   |  5 +++--
 arch/arm/mach-exynos/common.c   |  6 ++
 arch/arm/plat-samsung/Kconfig   |  7 ++-
 arch/arm/plat-samsung/Makefile  |  8 ++--
 arch/arm/plat-samsung/include/plat/pm.h |  5 +
 drivers/gpio/Makefile   |  2 +-
 9 files changed, 50 insertions(+), 20 deletions(-)

diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig
index c451112..81185a5 100644
--- a/arch/arm/Kconfig
+++ b/arch/arm/Kconfig
@@ -775,19 +775,11 @@ config ARCH_S5PV210
help
  Samsung S5PV210/S5PC110 series based systems
 
-config ARCH_EXYNOS
+config ARCH_EXYNOS_SINGLE
bool Samsung EXYNOS
-   select ARCH_HAS_CPUFREQ
select ARCH_HAS_HOLES_MEMORYMODEL
select ARCH_SPARSEMEM_ENABLE
-   select CLKDEV_LOOKUP
-   select COMMON_CLK
-   select CPU_V7
-   select GENERIC_CLOCKEVENTS
-   select HAVE_CLK
-   select HAVE_S3C2410_I2C if I2C
select HAVE_S3C2410_WATCHDOG if WATCHDOG
-   select HAVE_S3C_RTC if RTC_CLASS
select NEED_MACH_GPIO_H
select NEED_MACH_MEMORY_H
help
diff --git a/arch/arm/configs/exynos4_defconfig 
b/arch/arm/configs/exynos4_defconfig
index bffe68e..ae90a0f 100644
--- a/arch/arm/configs/exynos4_defconfig
+++ b/arch/arm/configs/exynos4_defconfig
@@ -4,7 +4,7 @@ CONFIG_KALLSYMS_ALL=y
 CONFIG_MODULES=y
 CONFIG_MODULE_UNLOAD=y
 # CONFIG_BLK_DEV_BSG is not set
-CONFIG_ARCH_EXYNOS=y
+CONFIG_ARCH_EXYNOS_SINGLE=y
 CONFIG_S3C_LOWLEVEL_UART_PORT=1
 CONFIG_MACH_SMDKC210=y
 CONFIG_MACH_ARMLEX4210=y
diff --git a/arch/arm/mach-exynos/Kconfig b/arch/arm/mach-exynos/Kconfig
index e815057..f19cf65 100644
--- a/arch/arm/mach-exynos/Kconfig
+++ b/arch/arm/mach-exynos/Kconfig
@@ -7,6 +7,20 @@
 
 # Configuration options for the EXYNOS4
 
+config ARCH_EXYNOS
+   bool Samsung EXYNOS if ARCH_MULTI_V7
+   default ARCH_EXYNOS_SINGLE
+   select ARCH_HAS_CPUFREQ
+   select CLKDEV_LOOKUP
+   select COMMON_CLK
+   select CPU_V7
+   select GENERIC_CLOCKEVENTS
+   select HAVE_CLK
+   select HAVE_S3C2410_I2C if I2C
+   select HAVE_S3C_RTC if RTC_CLASS
+   help
+ Support for SAMSUNG's EXYNOS SoCs (EXYNOS4/5)
+
 if ARCH_EXYNOS
 
 menu SAMSUNG EXYNOS SoCs Support
@@ -20,6 +34,9 @@ config ARCH_EXYNOS4
help
  Samsung EXYNOS4 SoCs based systems
 
+config ARCH_EXYNOS4_SINGLE
+   def_bool ARCH_EXYNOS4  ARCH_EXYNOS_SINGLE
+
 config ARCH_EXYNOS5
bool SAMSUNG EXYNOS5
select HAVE_ARM_SCU if SMP
@@ -37,7 +54,7 @@ config CPU_EXYNOS4210
select PM_GENERIC_DOMAINS
select S5P_PM if PM
select S5P_SLEEP if PM
-   select SAMSUNG_DMADEV
+   select SAMSUNG_DMADEV if ARCH_EXYNOS_SINGLE
help
  Enable EXYNOS4210 CPU support
 
@@ -47,7 +64,7 @@ config SOC_EXYNOS4212
depends on ARCH_EXYNOS4
select S5P_PM if PM
select S5P_SLEEP if PM
-   select SAMSUNG_DMADEV
+   select SAMSUNG_DMADEV if ARCH_EXYNOS_SINGLE
help
  Enable EXYNOS4212 SoC support
 
@@ -55,7 +72,7 @@ config SOC_EXYNOS4412
bool SAMSUNG EXYNOS4412
default y
depends on ARCH_EXYNOS4
-   select SAMSUNG_DMADEV
+   select SAMSUNG_DMADEV if ARCH_EXYNOS_SINGLE
help
  Enable EXYNOS4412 SoC support
 
@@ -67,7 +84,7 @@ config SOC_EXYNOS5250
select S5P_PM if PM
select S5P_SLEEP if PM
select S5P_DEV_MFC
-   select SAMSUNG_DMADEV
+   select SAMSUNG_DMADEV if ARCH_EXYNOS_SINGLE
help
  Enable EXYNOS5250 SoC support
 
diff --git a/arch/arm/mach-exynos/Makefile b/arch/arm/mach-exynos/Makefile
index b09b027..ef6860b 100644
--- a/arch/arm/mach-exynos/Makefile
+++ b/arch/arm/mach-exynos/Makefile
@@ -4,6 +4,7 @@
 #  http://www.samsung.com/
 #
 # Licensed under GPLv2
+ccflags-$(CONFIG_ARCH_MULTIPLATFORM) += -I$(srctree)/$(src)/include 
-I$(srctree)/arch/arm/plat-samsung/include
 
 obj-y  :=
 obj-m  :=
@@ -48,12 +49,12 @@ obj-$(CONFIG_MACH_EXYNOS5_DT)   += 
mach-exynos5-dt.o
 #

[PATCH 23/30] clk: exynos: prepare for multiplatform

2013-04-10 Thread Arnd Bergmann

The new common clock drivers for exynos are using compile
time constants and soc_is_exynos* macros to provide backwards
compatibility for pre-DT systems, which is not possible with
multiplatform kernels. This moves all the necessary
information back into platform code and removes the mach/*
header inclusions.

Signed-off-by: Arnd Bergmann a...@arndb.de
Cc: Mike Turquette mturque...@linaro.org
---
 arch/arm/mach-exynos/common.c|  2 +-
 arch/arm/mach-exynos/common.h|  2 +-
 drivers/clk/samsung/clk-exynos4.c| 93 
 drivers/clk/samsung/clk-exynos5250.c |  1 -
 drivers/clk/samsung/clk-exynos5440.c |  1 -
 drivers/clk/samsung/clk.h|  2 -
 6 files changed, 44 insertions(+), 57 deletions(-)

diff --git a/arch/arm/mach-exynos/common.c b/arch/arm/mach-exynos/common.c
index 46089fe..87b2e06 100644
--- a/arch/arm/mach-exynos/common.c
+++ b/arch/arm/mach-exynos/common.c
@@ -445,7 +445,7 @@ void __init exynos_init_time(void)
} else {
/* todo: remove after migrating legacy E4 platforms to dt */
 #ifdef CONFIG_ARCH_EXYNOS4
-   exynos4_clk_init(NULL);
+   exynos4_clk_init(NULL, !soc_is_exynos4210(), S5P_VA_CMU, 
readl(S5P_VA_CHIPID + 8)  1);
exynos4_clk_register_fixed_ext(xxti_f, xusbxti_f);
 #endif
mct_init();
diff --git a/arch/arm/mach-exynos/common.h b/arch/arm/mach-exynos/common.h
index b17448c..9832e03 100644
--- a/arch/arm/mach-exynos/common.h
+++ b/arch/arm/mach-exynos/common.h
@@ -27,7 +27,7 @@ void exynos5_restart(char mode, const char *cmd);
 void exynos_init_late(void);
 
 /* ToDo: remove these after migrating legacy exynos4 platforms to dt */
-void exynos4_clk_init(struct device_node *np);
+void exynos4_clk_init(struct device_node *np, int is_exynos4210, void __iomem 
*reg_base, unsigned long xom);
 void exynos4_clk_register_fixed_ext(unsigned long, unsigned long);
 
 void exynos_firmware_init(void);
diff --git a/drivers/clk/samsung/clk-exynos4.c 
b/drivers/clk/samsung/clk-exynos4.c
index 7104669..d0940e6 100644
--- a/drivers/clk/samsung/clk-exynos4.c
+++ b/drivers/clk/samsung/clk-exynos4.c
@@ -16,7 +16,6 @@
 #include linux/of.h
 #include linux/of_address.h
 
-#include plat/cpu.h
 #include clk.h
 #include clk-pll.h
 
@@ -910,16 +909,6 @@ struct samsung_gate_clock exynos4x12_gate_clks[] 
__initdata = {
CLK_IGNORE_UNUSED, 0),
 };
 
-#ifdef CONFIG_OF
-static struct of_device_id exynos4_clk_ids[] __initdata = {
-   { .compatible = samsung,exynos4210-clock,
-   .data = (void *)EXYNOS4210, },
-   { .compatible = samsung,exynos4412-clock,
-   .data = (void *)EXYNOS4X12, },
-   { },
-};
-#endif
-
 /*
  * The parent of the fin_pll clock is selected by the XOM[0] bit. This bit
  * resides in chipid register space, outside of the clock controller memory
@@ -927,33 +916,40 @@ static struct of_device_id exynos4_clk_ids[] __initdata = 
{
  * controller is first remapped and the value of XOM[0] bit is read to
  * determine the parent clock.
  */
-static void __init exynos4_clk_register_finpll(void)
+static unsigned long exynos4_get_xom(void)
 {
-   struct samsung_fixed_rate_clock fclk;
+   unsigned long xom = 0;
+   void __iomem *chipid_base;
struct device_node *np;
-   struct clk *clk;
-   void __iomem *chipid_base = S5P_VA_CHIPID;
-   unsigned long xom, finpll_f = 2400;
-   char *parent_name;
 
np = of_find_compatible_node(NULL, NULL, samsung,exynos4210-chipid);
-   if (np)
+   if (np) {
chipid_base = of_iomap(np, 0);
 
-   if (chipid_base) {
-   xom = readl(chipid_base + 8);
-   parent_name = xom  1 ? xusbxti : xxti;
-   clk = clk_get(NULL, parent_name);
-   if (IS_ERR(clk)) {
-   pr_err(%s: failed to lookup parent clock %s, assuming 
-   fin_pll clock frequency is 24MHz\n, __func__,
-   parent_name);
-   } else {
-   finpll_f = clk_get_rate(clk);
-   }
+   if (chipid_base)
+   xom = readl(chipid_base + 8);
+
+   iounmap(chipid_base);
+   }
+
+   return xom;
+}
+
+static void __init exynos4_clk_register_finpll(unsigned long xom)
+{
+   struct samsung_fixed_rate_clock fclk;
+   struct clk *clk;
+   unsigned long finpll_f = 2400;
+   char *parent_name;
+
+   parent_name = xom  1 ? xusbxti : xxti;
+   clk = clk_get(NULL, parent_name);
+   if (IS_ERR(clk)) {
+   pr_err(%s: failed to lookup parent clock %s, assuming 
+   fin_pll clock frequency is 24MHz\n, __func__,
+   parent_name);
} else {
-   pr_err(%s: failed to map chipid registers, assuming 
-   fin_pll clock frequency is 24MHz\n,

[PATCH 09/30] mmc: sdhci-s3c: remove platform dependencies

2013-04-10 Thread Arnd Bergmann

plat/regs-sdhci.h is not used anywhere but in the sdhci-s3c
driver, so it can become a local file there and all other
inclusions removed.

plat/sdhci.h is used only to define the platform devices,
and with the exception of the platform_data structure not
needed by the driver, so we can split out the platform_data
definition instead and leave the rest to platform code.

Signed-off-by: Arnd Bergmann a...@arndb.de
Cc: linux-...@vger.kernel.org
Cc: Chris Ball c...@laptop.org
---
 arch/arm/mach-exynos/setup-sdhci-gpio.c|  2 +-
 arch/arm/mach-s5pc100/setup-sdhci-gpio.c   |  1 -
 arch/arm/mach-s5pv210/setup-sdhci-gpio.c   |  1 -
 arch/arm/plat-samsung/include/plat/sdhci.h | 56 +-
 drivers/mmc/host/Kconfig   |  2 +-
 .../mmc/host/sdhci-s3c-regs.h  |  0
 drivers/mmc/host/sdhci-s3c.c   |  5 +-
 include/linux/platform_data/mmc-sdhci-s3c.h| 56 ++
 8 files changed, 61 insertions(+), 62 deletions(-)
 rename arch/arm/plat-samsung/include/plat/regs-sdhci.h = 
drivers/mmc/host/sdhci-s3c-regs.h (100%)
 create mode 100644 include/linux/platform_data/mmc-sdhci-s3c.h

diff --git a/arch/arm/mach-exynos/setup-sdhci-gpio.c 
b/arch/arm/mach-exynos/setup-sdhci-gpio.c
index e8d08bf..d5b98c8 100644
--- a/arch/arm/mach-exynos/setup-sdhci-gpio.c
+++ b/arch/arm/mach-exynos/setup-sdhci-gpio.c
@@ -19,8 +19,8 @@
 #include linux/mmc/host.h
 #include linux/mmc/card.h
 
+#include mach/gpio.h
 #include plat/gpio-cfg.h
-#include plat/regs-sdhci.h
 #include plat/sdhci.h
 
 void exynos4_setup_sdhci0_cfg_gpio(struct platform_device *dev, int width)
diff --git a/arch/arm/mach-s5pc100/setup-sdhci-gpio.c 
b/arch/arm/mach-s5pc100/setup-sdhci-gpio.c
index 03c02d0..6010c03 100644
--- a/arch/arm/mach-s5pc100/setup-sdhci-gpio.c
+++ b/arch/arm/mach-s5pc100/setup-sdhci-gpio.c
@@ -19,7 +19,6 @@
 #include linux/mmc/card.h
 
 #include plat/gpio-cfg.h
-#include plat/regs-sdhci.h
 #include plat/sdhci.h
 
 void s5pc100_setup_sdhci0_cfg_gpio(struct platform_device *dev, int width)
diff --git a/arch/arm/mach-s5pv210/setup-sdhci-gpio.c 
b/arch/arm/mach-s5pv210/setup-sdhci-gpio.c
index 3e3ac05..0512ada 100644
--- a/arch/arm/mach-s5pv210/setup-sdhci-gpio.c
+++ b/arch/arm/mach-s5pv210/setup-sdhci-gpio.c
@@ -20,7 +20,6 @@
 #include linux/mmc/card.h
 
 #include plat/gpio-cfg.h
-#include plat/regs-sdhci.h
 #include plat/sdhci.h
 
 void s5pv210_setup_sdhci0_cfg_gpio(struct platform_device *dev, int width)
diff --git a/arch/arm/plat-samsung/include/plat/sdhci.h 
b/arch/arm/plat-samsung/include/plat/sdhci.h
index 5560586..ce1d0f7 100644
--- a/arch/arm/plat-samsung/include/plat/sdhci.h
+++ b/arch/arm/plat-samsung/include/plat/sdhci.h
@@ -18,62 +18,9 @@
 #ifndef __PLAT_S3C_SDHCI_H
 #define __PLAT_S3C_SDHCI_H __FILE__
 
+#include linux/platform_data/mmc-sdhci-s3c.h
 #include plat/devs.h
 
-struct platform_device;
-struct mmc_host;
-struct mmc_card;
-struct mmc_ios;
-
-enum cd_types {
-   S3C_SDHCI_CD_INTERNAL,  /* use mmc internal CD line */
-   S3C_SDHCI_CD_EXTERNAL,  /* use external callback */
-   S3C_SDHCI_CD_GPIO,  /* use external gpio pin for CD line */
-   S3C_SDHCI_CD_NONE,  /* no CD line, use polling to detect card */
-   S3C_SDHCI_CD_PERMANENT, /* no CD line, card permanently wired to host */
-};
-
-/**
- * struct s3c_sdhci_platdata() - Platform device data for Samsung SDHCI
- * @max_width: The maximum number of data bits supported.
- * @host_caps: Standard MMC host capabilities bit field.
- * @host_caps2: The second standard MMC host capabilities bit field.
- * @cd_type: Type of Card Detection method (see cd_types enum above)
- * @ext_cd_init: Initialize external card detect subsystem. Called on
- *  sdhci-s3c driver probe when cd_type == S3C_SDHCI_CD_EXTERNAL.
- *  notify_func argument is a callback to the sdhci-s3c driver
- *  that triggers the card detection event. Callback arguments:
- *  dev is pointer to platform device of the host controller,
- *  state is new state of the card (0 - removed, 1 - inserted).
- * @ext_cd_cleanup: Cleanup external card detect subsystem. Called on
- *  sdhci-s3c driver remove when cd_type == S3C_SDHCI_CD_EXTERNAL.
- *  notify_func argument is the same callback as for ext_cd_init.
- * @ext_cd_gpio: gpio pin used for external CD line, valid only if
- *  cd_type == S3C_SDHCI_CD_GPIO
- * @ext_cd_gpio_invert: invert values for external CD gpio line
- * @cfg_gpio: Configure the GPIO for a specific card bit-width
- *
- * Initialisation data specific to either the machine or the platform
- * for the device driver to use or call-back when configuring gpio or
- * card speed information.
-*/
-struct s3c_sdhci_platdata {
-   unsigned intmax_width;
-   unsigned inthost_caps;
-   unsigned inthost_caps2;
-   unsigned intpm_caps;
-   enum

[PATCH 02/30] ARM: exynos: prepare for sparse IRQ

2013-04-10 Thread Arnd Bergmann

When we enable CONFIG_SPARSE_IRQ, we have to set the value of NR_IRQS in
the machine_desc for legacy IRQ domains, and any file referring to the
number of interrupts or a specific number must include the mach/irqs.h
header file explicitly.

Signed-off-by: Arnd Bergmann a...@arndb.de
---
 arch/arm/mach-exynos/dev-uart.c  | 1 +
 arch/arm/mach-exynos/include/mach/irqs.h | 5 -
 arch/arm/mach-exynos/mach-armlex4210.c   | 2 ++
 arch/arm/mach-exynos/mach-exynos4-dt.c   | 3 +++
 arch/arm/mach-exynos/mach-exynos5-dt.c   | 2 ++
 arch/arm/mach-exynos/mach-nuri.c | 2 ++
 arch/arm/mach-exynos/mach-origen.c   | 2 ++
 arch/arm/mach-exynos/mach-smdk4x12.c | 2 ++
 arch/arm/mach-exynos/mach-smdkv310.c | 3 +++
 arch/arm/plat-samsung/irq-vic-timer.c| 1 +
 arch/arm/plat-samsung/pm.c   | 1 +
 arch/arm/plat-samsung/s5p-irq.c  | 1 +
 12 files changed, 24 insertions(+), 1 deletion(-)

diff --git a/arch/arm/mach-exynos/dev-uart.c b/arch/arm/mach-exynos/dev-uart.c
index 7c42f4b..c48aff0 100644
--- a/arch/arm/mach-exynos/dev-uart.c
+++ b/arch/arm/mach-exynos/dev-uart.c
@@ -20,6 +20,7 @@
 #include asm/mach/irq.h
 #include mach/hardware.h
 #include mach/map.h
+#include mach/irqs.h
 
 #include plat/devs.h
 
diff --git a/arch/arm/mach-exynos/include/mach/irqs.h 
b/arch/arm/mach-exynos/include/mach/irqs.h
index 35fe6d5..c72f59d 100644
--- a/arch/arm/mach-exynos/include/mach/irqs.h
+++ b/arch/arm/mach-exynos/include/mach/irqs.h
@@ -467,7 +467,10 @@
 #define IRQ_TIMER_BASE (IRQ_GPIO_END + 64)
 
 /* Set the default NR_IRQS */
+#define EXYNOS_NR_IRQS (IRQ_TIMER_BASE + IRQ_TIMER_COUNT)
 
-#define NR_IRQS(IRQ_TIMER_BASE + 
IRQ_TIMER_COUNT)
+#ifndef CONFIG_SPARSE_IRQ
+#define NR_IRQSEXYNOS_NR_IRQS
+#endif
 
 #endif /* __ASM_ARCH_IRQS_H */
diff --git a/arch/arm/mach-exynos/mach-armlex4210.c 
b/arch/arm/mach-exynos/mach-armlex4210.c
index 2c23b65..a503e02 100644
--- a/arch/arm/mach-exynos/mach-armlex4210.c
+++ b/arch/arm/mach-exynos/mach-armlex4210.c
@@ -25,6 +25,7 @@
 #include plat/regs-srom.h
 #include plat/sdhci.h
 
+#include mach/irqs.h
 #include mach/map.h
 
 #include common.h
@@ -196,6 +197,7 @@ static void __init armlex4210_machine_init(void)
 MACHINE_START(ARMLEX4210, ARMLEX4210)
/* Maintainer: Alim Akhtar alim.akh...@samsung.com */
.atag_offset= 0x100,
+   .nr_irqs= EXYNOS_NR_IRQS,
.smp= smp_ops(exynos_smp_ops),
.init_irq   = exynos4_init_irq,
.map_io = armlex4210_map_io,
diff --git a/arch/arm/mach-exynos/mach-exynos4-dt.c 
b/arch/arm/mach-exynos/mach-exynos4-dt.c
index b9ed834..5f23682 100644
--- a/arch/arm/mach-exynos/mach-exynos4-dt.c
+++ b/arch/arm/mach-exynos/mach-exynos4-dt.c
@@ -20,6 +20,8 @@
 
 #include asm/mach/arch.h
 #include plat/mfc.h
+#include mach/irqs.h
+
 
 #include common.h
 
@@ -54,6 +56,7 @@ static void __init exynos4_reserve(void)
 }
 DT_MACHINE_START(EXYNOS4210_DT, Samsung Exynos4 (Flattened Device Tree))
/* Maintainer: Thomas Abraham thomas.abra...@linaro.org */
+   .nr_irqs= EXYNOS_NR_IRQS,
.smp= smp_ops(exynos_smp_ops),
.init_irq   = exynos4_init_irq,
.map_io = exynos4_dt_map_io,
diff --git a/arch/arm/mach-exynos/mach-exynos5-dt.c 
b/arch/arm/mach-exynos/mach-exynos5-dt.c
index 753b94f..8b7456a 100644
--- a/arch/arm/mach-exynos/mach-exynos5-dt.c
+++ b/arch/arm/mach-exynos/mach-exynos5-dt.c
@@ -16,6 +16,7 @@
 #include linux/clocksource.h
 
 #include asm/mach/arch.h
+#include mach/irqs.h
 #include mach/regs-pmu.h
 
 #include plat/cpu.h
@@ -76,6 +77,7 @@ static void __init exynos5_reserve(void)
 
 DT_MACHINE_START(EXYNOS5_DT, SAMSUNG EXYNOS5 (Flattened Device Tree))
/* Maintainer: Kukjin Kim kgene@samsung.com */
+   .nr_irqs= EXYNOS_NR_IRQS,
.init_irq   = exynos5_init_irq,
.smp= smp_ops(exynos_smp_ops),
.map_io = exynos5_dt_map_io,
diff --git a/arch/arm/mach-exynos/mach-nuri.c b/arch/arm/mach-exynos/mach-nuri.c
index 0c10852..fbae331 100644
--- a/arch/arm/mach-exynos/mach-nuri.c
+++ b/arch/arm/mach-exynos/mach-nuri.c
@@ -53,6 +53,7 @@
 #include plat/fimc-core.h
 #include plat/camport.h
 
+#include mach/irqs.h
 #include mach/map.h
 
 #include common.h
@@ -1376,6 +1377,7 @@ static void __init nuri_machine_init(void)
 MACHINE_START(NURI, NURI)
/* Maintainer: Kyungmin Park kyungmin.p...@samsung.com */
.atag_offset= 0x100,
+   .nr_irqs= EXYNOS_NR_IRQS,
.smp= smp_ops(exynos_smp_ops),
.init_irq   = exynos4_init_irq,
.map_io = nuri_map_io,
diff --git a/arch/arm/mach-exynos/mach-origen.c 
b/arch/arm/mach-exynos/mach-origen.c
index f662345..a3ee06a 100644
--- a/arch/arm/mach-exynos/mach-origen.c
+++ b/arch/arm/mach-exynos/mach-origen.c
@@ -46,6 +46,7 @@
 #include plat/hdmi.h

[PATCH 14/30] thermal/exynos: remove unnecessary header inclusions

2013-04-10 Thread Arnd Bergmann

In multiplatform configurations, we cannot include headers
provided by only the exynos platform. Fortunately a number
of drivers that include those headers do not actually need
them, so we can just remove the inclusions.

Signed-off-by: Arnd Bergmann a...@arndb.de
Cc: linux...@vger.kernel.org
Cc: Zhang Rui rui.zh...@intel.com
---
 drivers/thermal/exynos_thermal.c | 2 --
 1 file changed, 2 deletions(-)

diff --git a/drivers/thermal/exynos_thermal.c b/drivers/thermal/exynos_thermal.c
index 46568c0..b777ae6 100644
--- a/drivers/thermal/exynos_thermal.c
+++ b/drivers/thermal/exynos_thermal.c
@@ -39,8 +39,6 @@
 #include linux/cpu_cooling.h
 #include linux/of.h
 
-#include plat/cpu.h
-
 /* Exynos generic registers */
 #define EXYNOS_TMU_REG_TRIMINFO0x0
 #define EXYNOS_TMU_REG_CONTROL 0x20
-- 
1.8.1.2

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[PATCH 08/30] i2c: s3c2410: make header file local

2013-04-10 Thread Arnd Bergmann

No other file in the kernel besides i2c-s3c2410.c uses the current
plat/regs-iic.h, so we can simply move the header file to live in the
same directory as the driver, as a preparation to multiplatform builds.

Signed-off-by: Arnd Bergmann a...@arndb.de
Cc: linux-...@vger.kernel.org
Cc: Wolfram Sang w...@the-dreams.de
Cc: Ben Dooks ben-li...@fluff.org
---
 arch/arm/mach-s3c24xx/mach-rx1950.c| 1 -
 arch/arm/plat-samsung/devs.c   | 1 -
 drivers/i2c/busses/i2c-s3c2410.c   | 3 ++-
 .../include/plat/regs-iic.h = drivers/i2c/busses/i2c-s3c2410.h| 0
 4 files changed, 2 insertions(+), 3 deletions(-)
 rename arch/arm/plat-samsung/include/plat/regs-iic.h = 
drivers/i2c/busses/i2c-s3c2410.h (100%)

diff --git a/arch/arm/mach-s3c24xx/mach-rx1950.c 
b/arch/arm/mach-s3c24xx/mach-rx1950.c
index e4d67a3..44ca018 100644
--- a/arch/arm/mach-s3c24xx/mach-rx1950.c
+++ b/arch/arm/mach-s3c24xx/mach-rx1950.c
@@ -56,7 +56,6 @@
 #include plat/cpu.h
 #include plat/devs.h
 #include plat/pm.h
-#include plat/regs-iic.h
 #include plat/regs-serial.h
 #include plat/samsung-time.h
 
diff --git a/arch/arm/plat-samsung/devs.c b/arch/arm/plat-samsung/devs.c
index 4cf660e..78be9c0 100644
--- a/arch/arm/plat-samsung/devs.c
+++ b/arch/arm/plat-samsung/devs.c
@@ -62,7 +62,6 @@
 #include linux/platform_data/usb-s3c2410_udc.h
 #include linux/platform_data/usb-ohci-s3c2410.h
 #include plat/usb-phy.h
-#include plat/regs-iic.h
 #include plat/regs-serial.h
 #include plat/regs-spi.h
 #include linux/platform_data/spi-s3c64xx.h
diff --git a/drivers/i2c/busses/i2c-s3c2410.c b/drivers/i2c/busses/i2c-s3c2410.c
index f6b880b..d042ad0 100644
--- a/drivers/i2c/busses/i2c-s3c2410.c
+++ b/drivers/i2c/busses/i2c-s3c2410.c
@@ -42,9 +42,10 @@
 
 #include asm/irq.h
 
-#include plat/regs-iic.h
 #include linux/platform_data/i2c-s3c2410.h
 
+#include i2c-s3c2410.h
+
 /* Treat S3C2410 as baseline hardware, anything else is supported via quirks */
 #define QUIRK_S3C2440  (1  0)
 #define QUIRK_HDMIPHY  (1  1)
diff --git a/arch/arm/plat-samsung/include/plat/regs-iic.h 
b/drivers/i2c/busses/i2c-s3c2410.h
similarity index 100%
rename from arch/arm/plat-samsung/include/plat/regs-iic.h
rename to drivers/i2c/busses/i2c-s3c2410.h
-- 
1.8.1.2

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[PATCH 06/30] tty: serial/samsung: make register definitions global

2013-04-10 Thread Arnd Bergmann

The registers for the Samsung S3C serial port are currently defined in
the platform specific arch/arm/plat-samsung/include/plat/regs-serial.h
file, which is not visible to multiplatform capable drivers.

Unfortunately, it is not possible to move the file into a more local
place as we should normally try to, because the same registers
may be used in one of four places:

* In the driver itself
* In platform-independent ARM code for early debug output
* In platform_data definitions
* In the Samsung platform power management code

I have also found no way to logically split out a platform_data
file, other than possibly move everything into
include/linux/platform_data, which also felt wrong. The only
part of this file that makes sense to keep specific to the s3c24xx
platform are the virtual and physical addresses defined here,
which are needed in no other location.

Signed-off-by: Arnd Bergmann a...@arndb.de
Cc: linux-ser...@vger.kernel.org
Cc: Greg Kroah-Hartman gre...@linuxfoundation.org
---
 arch/arm/mach-s3c24xx/clock-s3c2440.c|   5 +
 arch/arm/mach-s3c24xx/common.c   |   5 +
 arch/arm/plat-samsung/include/plat/regs-serial.h | 282 +--
 drivers/tty/serial/samsung.c |   6 +-
 include/linux/serial_s3c.h   | 260 +
 5 files changed, 274 insertions(+), 284 deletions(-)
 create mode 100644 include/linux/serial_s3c.h

diff --git a/arch/arm/mach-s3c24xx/clock-s3c2440.c 
b/arch/arm/mach-s3c24xx/clock-s3c2440.c
index 04b87ec..1069b56 100644
--- a/arch/arm/mach-s3c24xx/clock-s3c2440.c
+++ b/arch/arm/mach-s3c24xx/clock-s3c2440.c
@@ -123,6 +123,11 @@ static struct clk s3c2440_clk_ac97 = {
.ctrlbit= S3C2440_CLKCON_AC97,
 };
 
+#define S3C24XX_VA_UART0  (S3C_VA_UART)
+#define S3C24XX_VA_UART1  (S3C_VA_UART + 0x4000 )
+#define S3C24XX_VA_UART2  (S3C_VA_UART + 0x8000 )
+#define S3C24XX_VA_UART3  (S3C_VA_UART + 0xC000 )
+
 static unsigned long  s3c2440_fclk_n_getrate(struct clk *clk)
 {
unsigned long ucon0, ucon1, ucon2, divisor;
diff --git a/arch/arm/mach-s3c24xx/common.c b/arch/arm/mach-s3c24xx/common.c
index d97533d..c157103 100644
--- a/arch/arm/mach-s3c24xx/common.c
+++ b/arch/arm/mach-s3c24xx/common.c
@@ -236,6 +236,11 @@ void __init s3c24xx_init_io(struct map_desc *mach_desc, 
int size)
 
 /* Serial port registrations */
 
+#define S3C2410_PA_UART0  (S3C24XX_PA_UART)
+#define S3C2410_PA_UART1  (S3C24XX_PA_UART + 0x4000 )
+#define S3C2410_PA_UART2  (S3C24XX_PA_UART + 0x8000 )
+#define S3C2443_PA_UART3  (S3C24XX_PA_UART + 0xC000 )
+
 static struct resource s3c2410_uart0_resource[] = {
[0] = DEFINE_RES_MEM(S3C2410_PA_UART0, SZ_16K),
[1] = DEFINE_RES_NAMED(IRQ_S3CUART_RX0, \
diff --git a/arch/arm/plat-samsung/include/plat/regs-serial.h 
b/arch/arm/plat-samsung/include/plat/regs-serial.h
index 29c26a8..f05f2af 100644
--- a/arch/arm/plat-samsung/include/plat/regs-serial.h
+++ b/arch/arm/plat-samsung/include/plat/regs-serial.h
@@ -1,281 +1 @@
-/* arch/arm/plat-samsung/include/plat/regs-serial.h
- *
- *  From linux/include/asm-arm/hardware/serial_s3c2410.h
- *
- *  Internal header file for Samsung S3C2410 serial ports (UART0-2)
- *
- *  Copyright (C) 2002 Shane Nay (sh...@minirl.com)
- *
- *  Additional defines, Copyright 2003 Simtec Electronics (li...@simtec.co.uk)
- *
- *  Adapted from:
- *
- *  Internal header file for MX1ADS serial ports (UART1  2)
- *
- *  Copyright (C) 2002 Shane Nay (sh...@minirl.com)
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or
- * (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
-*/
-
-#ifndef __ASM_ARM_REGS_SERIAL_H
-#define __ASM_ARM_REGS_SERIAL_H
-
-#define S3C24XX_VA_UART0  (S3C_VA_UART)
-#define S3C24XX_VA_UART1  (S3C_VA_UART + 0x4000 )
-#define S3C24XX_VA_UART2  (S3C_VA_UART + 0x8000 )
-#define S3C24XX_VA_UART3  (S3C_VA_UART + 0xC000 )
-
-#define S3C2410_PA_UART0  (S3C24XX_PA_UART)
-#define S3C2410_PA_UART1  (S3C24XX_PA_UART + 0x4000 )
-#define S3C2410_PA_UART2  (S3C24XX_PA_UART + 0x8000 )
-#define S3C2443_PA_UART3  (S3C24XX_PA_UART + 0xC000 )
-
-#define S3C2410_URXH (0x24)
-#define S3C2410_UTXH (0x20)
-#define S3C2410_ULCON(0x00)
-#define S3C2410_UCON (0x04)
-#define S3C2410_UFCON(0x08)
-#define S3C2410_UMCON(0x0C)
-#define S3C2410_UBRDIV

[PATCH 24/30] clocksource: exynos_mct: remove platform header dependency

2013-04-10 Thread Arnd Bergmann

For the non-DT case, the mct_init() function requires access
to a couple of platform specific constants, but cannot include
the header files in case we are building for multiplatform.

This changes the interface to the platform so we pass all
the necessary data as arguments to mct_init.

Signed-off-by: Arnd Bergmann a...@arndb.de
Cc: Thomas Gleixner t...@linutronix.de
Cc: John Stultz john.stu...@linaro.org
---
 arch/arm/mach-exynos/common.c|  2 +-
 arch/arm/mach-exynos/common.h|  2 +-
 drivers/clocksource/exynos_mct.c | 21 ++---
 3 files changed, 8 insertions(+), 17 deletions(-)

diff --git a/arch/arm/mach-exynos/common.c b/arch/arm/mach-exynos/common.c
index 87b2e06..8e85d6c 100644
--- a/arch/arm/mach-exynos/common.c
+++ b/arch/arm/mach-exynos/common.c
@@ -448,7 +448,7 @@ void __init exynos_init_time(void)
exynos4_clk_init(NULL, !soc_is_exynos4210(), S5P_VA_CMU, 
readl(S5P_VA_CHIPID + 8)  1);
exynos4_clk_register_fixed_ext(xxti_f, xusbxti_f);
 #endif
-   mct_init();
+   mct_init(S5P_VA_SYSTIMER, EXYNOS4_IRQ_MCT_G0, 
EXYNOS4_IRQ_MCT_L0, EXYNOS4_IRQ_MCT_L1);
}
 }
 
diff --git a/arch/arm/mach-exynos/common.h b/arch/arm/mach-exynos/common.h
index 9832e03..f426a5b 100644
--- a/arch/arm/mach-exynos/common.h
+++ b/arch/arm/mach-exynos/common.h
@@ -14,7 +14,7 @@
 
 #include linux/of.h
 
-extern void mct_init(void);
+void mct_init(void __iomem *base, int irq_g0, int irq_l0, int irq_l1);
 void exynos_init_time(void);
 extern unsigned long xxti_f, xusbxti_f;
 
diff --git a/drivers/clocksource/exynos_mct.c b/drivers/clocksource/exynos_mct.c
index 020ba55..88ff404 100644
--- a/drivers/clocksource/exynos_mct.c
+++ b/drivers/clocksource/exynos_mct.c
@@ -26,11 +26,6 @@
 
 #include asm/arch_timer.h
 #include asm/localtimer.h
-
-#include plat/cpu.h
-
-#include mach/map.h
-#include mach/irqs.h
 #include asm/mach/time.h
 
 #define EXYNOS4_MCTREG(x)  (x)
@@ -511,18 +506,14 @@ static void __init exynos4_timer_resources(struct 
device_node *np, void __iomem
 #endif /* CONFIG_LOCAL_TIMERS */
 }
 
-void __init mct_init(void)
+void __init mct_init(void __iomem *base, int irq_g0, int irq_l0, int irq_l1)
 {
-   if (soc_is_exynos4210()) {
-   mct_irqs[MCT_G0_IRQ] = EXYNOS4_IRQ_MCT_G0;
-   mct_irqs[MCT_L0_IRQ] = EXYNOS4_IRQ_MCT_L0;
-   mct_irqs[MCT_L1_IRQ] = EXYNOS4_IRQ_MCT_L1;
-   mct_int_type = MCT_INT_SPI;
-   } else {
-   panic(unable to determine mct controller type\n);
-   }
+   mct_irqs[MCT_G0_IRQ] = irq_g0;
+   mct_irqs[MCT_L0_IRQ] = irq_l0;
+   mct_irqs[MCT_L1_IRQ] = irq_l1;
+   mct_int_type = MCT_INT_SPI;
 
-   exynos4_timer_resources(NULL, S5P_VA_SYSTIMER);
+   exynos4_timer_resources(NULL, base);
exynos4_clocksource_init();
exynos4_clockevent_init();
 }
-- 
1.8.1.2

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[PATCH 17/30] pwm: samsung: repair the worst MMIO abuses

2013-04-10 Thread Arnd Bergmann

The Samsung PWM driver uses magic pointers that are mapped
at boot time to point its MMIO registers. This fails horribly
with a multiplatform kernel, which can not rely on platform
specific header files to contain the right values, aside from
this being a really bad idea in general.

This changes the driver to at least pass an __iomem token
around in the device structure to dereference that. Fixing
the platform code is much harder, so we'll leave that
until we have a DT binding for pwm-samsung, which may require
other changes in this area. Since we are already touching
every MMIO accessor in this driver, let's also use the
proper readl_relaxed variant rather than __raw_readl.

Tomasz Figa has a set of patches to clean this up in a proper
way, but that might be too late for 3.10.

Signed-off-by: Arnd Bergmann a...@arndb.de
Cc: Tomasz Figa t.f...@samsung.com
Cc: Thierry Reding thierry.red...@avionic-design.de
---
 drivers/pwm/pwm-samsung.c | 60 +--
 1 file changed, 42 insertions(+), 18 deletions(-)

diff --git a/drivers/pwm/pwm-samsung.c b/drivers/pwm/pwm-samsung.c
index 5207e6c..9d7234d 100644
--- a/drivers/pwm/pwm-samsung.c
+++ b/drivers/pwm/pwm-samsung.c
@@ -22,9 +22,25 @@
 #include linux/io.h
 #include linux/pwm.h
 
-#include mach/map.h
+#ifndef CONFIG_ARCH_MULTIPLATFORM
+/*
+ * This is gross: the platform maps the timer at a fixed
+ * virtual address and expects us to use that address
+ * rather than a proper resource. This should get done properly
+ * when we get a DT binding for this driver.
+ */
+#include plat/map-base.h
+static inline void dummy(void)
+{
+   BUILD_BUG_ON(S3C_VA_TIMER != IOMEM(0xf630));
+}
+#else
+#define S3C_VA_TIMER IOMEM(0xf630);
+#endif
 
-#include plat/regs-timer.h
+#define S3C2410_TCON   8
+#define S3C2410_TCNTB(tmr) (0x0c + (tmr)*0x0c + 0x00)
+#define S3C2410_TCMPB(tmr) (0x0c + (tmr)*0x0c + 0x04)
 
 struct s3c_chip {
struct platform_device  *pdev;
@@ -38,6 +54,7 @@ struct s3c_chip {
 
unsigned chartcon_base;
unsigned charpwm_id;
+   void __iomem*base;
struct pwm_chip  chip;
 };
 
@@ -65,9 +82,9 @@ static int s3c_pwm_enable(struct pwm_chip *chip, struct 
pwm_device *pwm)
 
local_irq_save(flags);
 
-   tcon = __raw_readl(S3C2410_TCON);
+   tcon = readl_relaxed(s3c-base + S3C2410_TCON);
tcon |= pwm_tcon_start(s3c);
-   __raw_writel(tcon, S3C2410_TCON);
+   writel_relaxed(tcon, s3c-base + S3C2410_TCON);
 
local_irq_restore(flags);
 
@@ -82,9 +99,9 @@ static void s3c_pwm_disable(struct pwm_chip *chip, struct 
pwm_device *pwm)
 
local_irq_save(flags);
 
-   tcon = __raw_readl(S3C2410_TCON);
+   tcon = readl_relaxed(s3c-base + S3C2410_TCON);
tcon = ~pwm_tcon_start(s3c);
-   __raw_writel(tcon, S3C2410_TCON);
+   writel_relaxed(tcon, s3c-base + S3C2410_TCON);
 
local_irq_restore(flags);
 }
@@ -133,8 +150,8 @@ static int s3c_pwm_config(struct pwm_chip *chip, struct 
pwm_device *pwm,
/* The TCMP and TCNT can be read without a lock, they're not
 * shared between the timers. */
 
-   tcmp = __raw_readl(S3C2410_TCMPB(s3c-pwm_id));
-   tcnt = __raw_readl(S3C2410_TCNTB(s3c-pwm_id));
+   tcmp = readl_relaxed(s3c-base + S3C2410_TCMPB(s3c-pwm_id));
+   tcnt = readl_relaxed(s3c-base + S3C2410_TCNTB(s3c-pwm_id));
 
period = NS_IN_HZ / period_ns;
 
@@ -177,16 +194,16 @@ static int s3c_pwm_config(struct pwm_chip *chip, struct 
pwm_device *pwm,
 
local_irq_save(flags);
 
-   __raw_writel(tcmp, S3C2410_TCMPB(s3c-pwm_id));
-   __raw_writel(tcnt, S3C2410_TCNTB(s3c-pwm_id));
+   writel_relaxed(tcmp, s3c-base + S3C2410_TCMPB(s3c-pwm_id));
+   writel_relaxed(tcnt, s3c-base + S3C2410_TCNTB(s3c-pwm_id));
 
-   tcon = __raw_readl(S3C2410_TCON);
+   tcon = readl_relaxed(s3c-base + S3C2410_TCON);
tcon |= pwm_tcon_manulupdate(s3c);
tcon |= pwm_tcon_autoreload(s3c);
-   __raw_writel(tcon, S3C2410_TCON);
+   writel_relaxed(tcon, s3c-base + S3C2410_TCON);
 
tcon = ~pwm_tcon_manulupdate(s3c);
-   __raw_writel(tcon, S3C2410_TCON);
+   writel_relaxed(tcon, s3c-base + S3C2410_TCON);
 
local_irq_restore(flags);
 
@@ -207,6 +224,7 @@ static int s3c_pwm_probe(struct platform_device *pdev)
unsigned long flags;
unsigned long tcon;
unsigned int id = pdev-id;
+   struct resource *res;
int ret;
 
if (id == 4) {
@@ -220,6 +238,12 @@ static int s3c_pwm_probe(struct platform_device *pdev)
return -ENOMEM;
}
 
+   /* try to get a proper base address, fall back to S3C_VA_TIMER */
+   s3c-base = S3C_VA_TIMER;
+   res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
+   if (res)
+   s3c-base = devm_ioremap(dev, res-start, resource_size(res));
+
/* calculate base of control bits in TCON

Re: [PATCH 11/30] [media] exynos: remove unnecessary header inclusions

2013-04-10 Thread Mauro Carvalho Chehab

Em Thu, 11 Apr 2013 02:04:53 +0200
Arnd Bergmann a...@arndb.de escreveu:

 In multiplatform configurations, we cannot include headers
 provided by only the exynos platform. Fortunately a number
 of drivers that include those headers do not actually need
 them, so we can just remove the inclusions.
 
 Signed-off-by: Arnd Bergmann a...@arndb.de
 Cc: linux-me...@vger.kernel.org
 Cc: Mauro Carvalho Chehab mche...@redhat.com

Acked-by: Mauro Carvalho Chehab mche...@redhat.com
 ---
  drivers/media/platform/exynos-gsc/gsc-regs.c | 1 -
  drivers/media/platform/s5p-tv/sii9234_drv.c  | 3 ---
  2 files changed, 4 deletions(-)
 
 diff --git a/drivers/media/platform/exynos-gsc/gsc-regs.c 
 b/drivers/media/platform/exynos-gsc/gsc-regs.c
 index 6f5b5a4..e22d147 100644
 --- a/drivers/media/platform/exynos-gsc/gsc-regs.c
 +++ b/drivers/media/platform/exynos-gsc/gsc-regs.c
 @@ -12,7 +12,6 @@
  
  #include linux/io.h
  #include linux/delay.h
 -#include mach/map.h
  
  #include gsc-core.h
  
 diff --git a/drivers/media/platform/s5p-tv/sii9234_drv.c 
 b/drivers/media/platform/s5p-tv/sii9234_drv.c
 index d90d228..39b77d2 100644
 --- a/drivers/media/platform/s5p-tv/sii9234_drv.c
 +++ b/drivers/media/platform/s5p-tv/sii9234_drv.c
 @@ -23,9 +23,6 @@
  #include linux/regulator/machine.h
  #include linux/slab.h
  
 -#include mach/gpio.h
 -#include plat/gpio-cfg.h
 -
  #include media/sii9234.h
  #include media/v4l2-subdev.h
  


-- 

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Mauro
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[PATCH 13/30] video/s3c: move platform_data out of arch/arm

2013-04-10 Thread Arnd Bergmann

The s3c-fb driver requires header files from the samsung platforms
to find its platform_data definition, but this no longer works on
multiplatform kernels, so let's move the data into a new header
file under include/linux/platform_data.

Signed-off-by: Arnd Bergmann a...@arndb.de
Cc: linux-fb...@vger.kernel.org
Cc: Jingoo Han jg1@samsung.com
---
 arch/arm/plat-samsung/include/plat/fb.h | 50 +-
 drivers/video/s3c-fb.c  |  3 +-
 include/linux/platform_data/video_s3c.h | 54 +
 3 files changed, 56 insertions(+), 51 deletions(-)
 create mode 100644 include/linux/platform_data/video_s3c.h

diff --git a/arch/arm/plat-samsung/include/plat/fb.h 
b/arch/arm/plat-samsung/include/plat/fb.h
index b885322..9ae5072 100644
--- a/arch/arm/plat-samsung/include/plat/fb.h
+++ b/arch/arm/plat-samsung/include/plat/fb.h
@@ -15,55 +15,7 @@
 #ifndef __PLAT_S3C_FB_H
 #define __PLAT_S3C_FB_H __FILE__
 
-/* S3C_FB_MAX_WIN
- * Set to the maximum number of windows that any of the supported hardware
- * can use. Since the platform data uses this for an array size, having it
- * set to the maximum of any version of the hardware can do is safe.
- */
-#define S3C_FB_MAX_WIN (5)
-
-/**
- * struct s3c_fb_pd_win - per window setup data
- * @xres : The window X size.
- * @yres : The window Y size.
- * @virtual_x: The virtual X size.
- * @virtual_y: The virtual Y size.
- */
-struct s3c_fb_pd_win {
-   unsigned short  default_bpp;
-   unsigned short  max_bpp;
-   unsigned short  xres;
-   unsigned short  yres;
-   unsigned short  virtual_x;
-   unsigned short  virtual_y;
-};
-
-/**
- * struct s3c_fb_platdata -  S3C driver platform specific information
- * @setup_gpio: Setup the external GPIO pins to the right state to transfer
- * the data from the display system to the connected display
- * device.
- * @vidcon0: The base vidcon0 values to control the panel data format.
- * @vidcon1: The base vidcon1 values to control the panel data output.
- * @vtiming: Video timing when connected to a RGB type panel.
- * @win: The setup data for each hardware window, or NULL for unused.
- * @display_mode: The LCD output display mode.
- *
- * The platform data supplies the video driver with all the information
- * it requires to work with the display(s) attached to the machine. It
- * controls the initial mode, the number of display windows (0 is always
- * the base framebuffer) that are initialised etc.
- *
- */
-struct s3c_fb_platdata {
-   void(*setup_gpio)(void);
-
-   struct s3c_fb_pd_win*win[S3C_FB_MAX_WIN];
-   struct fb_videomode *vtiming;
-
-   u32  vidcon0;
-   u32  vidcon1;
-};
+#include linux/platform_data/video_s3c.h
 
 /**
  * s3c_fb_set_platdata() - Setup the FB device with platform data.
diff --git a/drivers/video/s3c-fb.c b/drivers/video/s3c-fb.c
index 968a625..2e7991c 100644
--- a/drivers/video/s3c-fb.c
+++ b/drivers/video/s3c-fb.c
@@ -24,10 +24,9 @@
 #include linux/uaccess.h
 #include linux/interrupt.h
 #include linux/pm_runtime.h
+#include linux/platform_data/video_s3c.h
 
 #include video/samsung_fimd.h
-#include mach/map.h
-#include plat/fb.h
 
 /* This driver will export a number of framebuffer interfaces depending
  * on the configuration passed in via the platform data. Each fb instance
diff --git a/include/linux/platform_data/video_s3c.h 
b/include/linux/platform_data/video_s3c.h
new file mode 100644
index 000..fa40f96
--- /dev/null
+++ b/include/linux/platform_data/video_s3c.h
@@ -0,0 +1,54 @@
+#ifndef __PLATFORM_DATA_VIDEO_S3C
+#define __PLATFORM_DATA_VIDEO_S3C
+
+/* S3C_FB_MAX_WIN
+ * Set to the maximum number of windows that any of the supported hardware
+ * can use. Since the platform data uses this for an array size, having it
+ * set to the maximum of any version of the hardware can do is safe.
+ */
+#define S3C_FB_MAX_WIN (5)
+
+/**
+ * struct s3c_fb_pd_win - per window setup data
+ * @xres : The window X size.
+ * @yres : The window Y size.
+ * @virtual_x: The virtual X size.
+ * @virtual_y: The virtual Y size.
+ */
+struct s3c_fb_pd_win {
+   unsigned short  default_bpp;
+   unsigned short  max_bpp;
+   unsigned short  xres;
+   unsigned short  yres;
+   unsigned short  virtual_x;
+   unsigned short  virtual_y;
+};
+
+/**
+ * struct s3c_fb_platdata -  S3C driver platform specific information
+ * @setup_gpio: Setup the external GPIO pins to the right state to transfer
+ * the data from the display system to the connected display
+ * device.
+ * @vidcon0: The base vidcon0 values to control the panel data format.
+ * @vidcon1: The base vidcon1 values to control the panel data output.
+ * @vtiming: Video timing when connected to a RGB type panel.
+ * @win: The setup data

[PATCH 15/30] mtd: onenand/samsung: make regs-onenand.h file local

2013-04-10 Thread Arnd Bergmann

Nothing uses the NAND register definitions other than the
actual driver, so we can move the header file into the
same local directory, which lets us build it in a multiplatform
configuration.

Signed-off-by: Arnd Bergmann a...@arndb.de
Cc: linux-...@lists.infradead.org
Cc: Kyungmin Park kyungmin.p...@samsung.com
Cc: David Woodhouse dw...@infradead.org
---
 drivers/mtd/onenand/samsung.c | 4 ++--
 .../include/plat/regs-onenand.h = drivers/mtd/onenand/samsung.h  | 2 --
 2 files changed, 2 insertions(+), 4 deletions(-)
 rename arch/arm/plat-samsung/include/plat/regs-onenand.h = 
drivers/mtd/onenand/samsung.h (98%)

diff --git a/drivers/mtd/onenand/samsung.c b/drivers/mtd/onenand/samsung.c
index 33f2a8f..2cf7408 100644
--- a/drivers/mtd/onenand/samsung.c
+++ b/drivers/mtd/onenand/samsung.c
@@ -23,11 +23,11 @@
 #include linux/mtd/partitions.h
 #include linux/dma-mapping.h
 #include linux/interrupt.h
+#include linux/io.h
 
 #include asm/mach/flash.h
-#include plat/regs-onenand.h
 
-#include linux/io.h
+#include samsung.h
 
 enum soc_type {
TYPE_S3C6400,
diff --git a/arch/arm/plat-samsung/include/plat/regs-onenand.h 
b/drivers/mtd/onenand/samsung.h
similarity index 98%
rename from arch/arm/plat-samsung/include/plat/regs-onenand.h
rename to drivers/mtd/onenand/samsung.h
index 930ea8b..c4a80e6 100644
--- a/arch/arm/plat-samsung/include/plat/regs-onenand.h
+++ b/drivers/mtd/onenand/samsung.h
@@ -11,8 +11,6 @@
 #ifndef __SAMSUNG_ONENAND_H__
 #define __SAMSUNG_ONENAND_H__
 
-#include mach/hardware.h
-
 /*
  * OneNAND Controller
  */
-- 
1.8.1.2

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[PATCH 04/30] ARM: samsung: move mfc device definition to s5p-dev-mfc.c

2013-04-10 Thread Arnd Bergmann

For a DT-only build we don't want to compile devs.c, but we do need
the mfc device, which is also referenced by the DT based platforms,
so move it all into one place.

Signed-off-by: Arnd Bergmann a...@arndb.de
---
 arch/arm/plat-samsung/devs.c| 45 -
 arch/arm/plat-samsung/s5p-dev-mfc.c | 42 +-
 2 files changed, 41 insertions(+), 46 deletions(-)

diff --git a/arch/arm/plat-samsung/devs.c b/arch/arm/plat-samsung/devs.c
index e1124d9..4cf660e 100644
--- a/arch/arm/plat-samsung/devs.c
+++ b/arch/arm/plat-samsung/devs.c
@@ -878,51 +878,6 @@ void __init s3c24xx_fb_set_platdata(struct 
s3c2410fb_mach_info *pd)
 }
 #endif /* CONFIG_PLAT_S3C24XX */
 
-/* MFC */
-
-#ifdef CONFIG_S5P_DEV_MFC
-static struct resource s5p_mfc_resource[] = {
-   [0] = DEFINE_RES_MEM(S5P_PA_MFC, SZ_64K),
-   [1] = DEFINE_RES_IRQ(IRQ_MFC),
-};
-
-struct platform_device s5p_device_mfc = {
-   .name   = s5p-mfc,
-   .id = -1,
-   .num_resources  = ARRAY_SIZE(s5p_mfc_resource),
-   .resource   = s5p_mfc_resource,
-};
-
-/*
- * MFC hardware has 2 memory interfaces which are modelled as two separate
- * platform devices to let dma-mapping distinguish between them.
- *
- * MFC parent device (s5p_device_mfc) must be registered before memory
- * interface specific devices (s5p_device_mfc_l and s5p_device_mfc_r).
- */
-
-struct platform_device s5p_device_mfc_l = {
-   .name   = s5p-mfc-l,
-   .id = -1,
-   .dev= {
-   .parent = s5p_device_mfc.dev,
-   .dma_mask   = samsung_device_dma_mask,
-   .coherent_dma_mask  = DMA_BIT_MASK(32),
-   },
-};
-
-struct platform_device s5p_device_mfc_r = {
-   .name   = s5p-mfc-r,
-   .id = -1,
-   .dev= {
-   .parent = s5p_device_mfc.dev,
-   .dma_mask   = samsung_device_dma_mask,
-   .coherent_dma_mask  = DMA_BIT_MASK(32),
-   },
-};
-
-#endif /* CONFIG_S5P_DEV_MFC */
-
 /* MIPI CSIS */
 
 #ifdef CONFIG_S5P_DEV_CSIS0
diff --git a/arch/arm/plat-samsung/s5p-dev-mfc.c 
b/arch/arm/plat-samsung/s5p-dev-mfc.c
index 5ec104b..a93fb6f 100644
--- a/arch/arm/plat-samsung/s5p-dev-mfc.c
+++ b/arch/arm/plat-samsung/s5p-dev-mfc.c
@@ -18,10 +18,50 @@
 #include linux/of.h
 
 #include mach/map.h
+#include mach/irqs.h
 #include plat/devs.h
-#include plat/irqs.h
 #include plat/mfc.h
 
+static struct resource s5p_mfc_resource[] = {
+   [0] = DEFINE_RES_MEM(S5P_PA_MFC, SZ_64K),
+   [1] = DEFINE_RES_IRQ(IRQ_MFC),
+};
+
+struct platform_device s5p_device_mfc = {
+   .name   = s5p-mfc,
+   .id = -1,
+   .num_resources  = ARRAY_SIZE(s5p_mfc_resource),
+   .resource   = s5p_mfc_resource,
+};
+
+/*
+ * MFC hardware has 2 memory interfaces which are modelled as two separate
+ * platform devices to let dma-mapping distinguish between them.
+ *
+ * MFC parent device (s5p_device_mfc) must be registered before memory
+ * interface specific devices (s5p_device_mfc_l and s5p_device_mfc_r).
+ */
+
+struct platform_device s5p_device_mfc_l = {
+   .name   = s5p-mfc-l,
+   .id = -1,
+   .dev= {
+   .parent = s5p_device_mfc.dev,
+   .dma_mask   = 
s5p_device_mfc_l.dev.coherent_dma_mask,
+   .coherent_dma_mask  = DMA_BIT_MASK(32),
+   },
+};
+
+struct platform_device s5p_device_mfc_r = {
+   .name   = s5p-mfc-r,
+   .id = -1,
+   .dev= {
+   .parent = s5p_device_mfc.dev,
+   .dma_mask   = 
s5p_device_mfc_r.dev.coherent_dma_mask,
+   .coherent_dma_mask  = DMA_BIT_MASK(32),
+   },
+};
+
 struct s5p_mfc_reserved_mem {
phys_addr_t base;
unsigned long   size;
-- 
1.8.1.2

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[PATCH 07/30] tty: serial/samsung: fix modular build

2013-04-10 Thread Arnd Bergmann

There are a few bugs in the samsung serial driver when built as a
loadable module, which makes the console code unavailable, as well as
giving no access to the 'printascii' early debug function. This adds
the appropriate compile time conditionals.

Signed-off-by: Arnd Bergmann a...@arndb.de
Cc: linux-ser...@vger.kernel.org
Cc: Greg Kroah-Hartman gre...@linuxfoundation.org
---
 drivers/tty/serial/samsung.c | 4 ++--
 drivers/tty/serial/samsung.h | 4 +++-
 2 files changed, 5 insertions(+), 3 deletions(-)

diff --git a/drivers/tty/serial/samsung.c b/drivers/tty/serial/samsung.c
index 729a60d..a3277ca 100644
--- a/drivers/tty/serial/samsung.c
+++ b/drivers/tty/serial/samsung.c
@@ -894,7 +894,7 @@ console_initcall(s3c24xx_serial_console_init);
 #define S3C24XX_SERIAL_CONSOLE NULL
 #endif
 
-#ifdef CONFIG_CONSOLE_POLL
+#if defined(CONFIG_SERIAL_SAMSUNG_CONSOLE)  defined(CONFIG_CONSOLE_POLL)
 static int s3c24xx_serial_get_poll_char(struct uart_port *port);
 static void s3c24xx_serial_put_poll_char(struct uart_port *port,
 unsigned char c);
@@ -918,7 +918,7 @@ static struct uart_ops s3c24xx_serial_ops = {
.request_port   = s3c24xx_serial_request_port,
.config_port= s3c24xx_serial_config_port,
.verify_port= s3c24xx_serial_verify_port,
-#ifdef CONFIG_CONSOLE_POLL
+#if defined(CONFIG_SERIAL_SAMSUNG_CONSOLE)  defined(CONFIG_CONSOLE_POLL)
.poll_get_char = s3c24xx_serial_get_poll_char,
.poll_put_char = s3c24xx_serial_put_poll_char,
 #endif
diff --git a/drivers/tty/serial/samsung.h b/drivers/tty/serial/samsung.h
index 1a4bca3..00a499e 100644
--- a/drivers/tty/serial/samsung.h
+++ b/drivers/tty/serial/samsung.h
@@ -76,7 +76,9 @@ struct s3c24xx_uart_port {
 #define wr_regb(port, reg, val) __raw_writeb(val, portaddr(port, reg))
 #define wr_regl(port, reg, val) __raw_writel(val, portaddr(port, reg))
 
-#ifdef CONFIG_SERIAL_SAMSUNG_DEBUG
+#if defined(CONFIG_SERIAL_SAMSUNG_DEBUG)  \
+defined(CONFIG_DEBUG_LL)  \
+!defined(MODULE)
 
 extern void printascii(const char *);
 
-- 
1.8.1.2

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[PATCH 18/30] ASoC: samsung: move plat/ headers to local directory

2013-04-10 Thread Arnd Bergmann

The plat/iis.h and plat/ac97.h files in the samsung platform are
only needed by the ASoC drivers, so they can be moved into the
same directory, as one more step towards a multiplatform build.

Signed-off-by: Arnd Bergmann a...@arndb.de
Cc: alsa-de...@alsa-project.org
Cc: Mark Brown broo...@opensource.wolfsonmicro.com
Cc: Liam Girdwood lgirdw...@gmail.com
---
 arch/arm/mach-s3c24xx/dma-s3c2410.c   | 2 --
 arch/arm/mach-s3c24xx/dma-s3c2412.c   | 2 --
 arch/arm/mach-s3c24xx/dma-s3c2440.c   | 2 --
 arch/arm/mach-s3c24xx/dma-s3c2443.c   | 2 --
 sound/soc/samsung/ac97.c  | 2 +-
 sound/soc/samsung/h1940_uda1380.c | 2 +-
 sound/soc/samsung/neo1973_wm8753.c| 2 +-
 {arch/arm/plat-samsung/include/plat = sound/soc/samsung}/regs-ac97.h | 0
 {arch/arm/plat-samsung/include/plat = sound/soc/samsung}/regs-iis.h  | 0
 sound/soc/samsung/rx1950_uda1380.c| 2 +-
 sound/soc/samsung/s3c24xx-i2s.c   | 2 +-
 sound/soc/samsung/s3c24xx_uda134x.c   | 2 +-
 12 files changed, 6 insertions(+), 14 deletions(-)
 rename {arch/arm/plat-samsung/include/plat = sound/soc/samsung}/regs-ac97.h 
(100%)
 rename {arch/arm/plat-samsung/include/plat = sound/soc/samsung}/regs-iis.h 
(100%)

diff --git a/arch/arm/mach-s3c24xx/dma-s3c2410.c 
b/arch/arm/mach-s3c24xx/dma-s3c2410.c
index a6c94b8..30aa53f 100644
--- a/arch/arm/mach-s3c24xx/dma-s3c2410.c
+++ b/arch/arm/mach-s3c24xx/dma-s3c2410.c
@@ -25,10 +25,8 @@
 
 #include plat/regs-serial.h
 #include mach/regs-gpio.h
-#include plat/regs-ac97.h
 #include plat/regs-dma.h
 #include mach/regs-lcd.h
-#include plat/regs-iis.h
 #include plat/regs-spi.h
 
 static struct s3c24xx_dma_map __initdata s3c2410_dma_mappings[] = {
diff --git a/arch/arm/mach-s3c24xx/dma-s3c2412.c 
b/arch/arm/mach-s3c24xx/dma-s3c2412.c
index c0e8c3f..ab1700e 100644
--- a/arch/arm/mach-s3c24xx/dma-s3c2412.c
+++ b/arch/arm/mach-s3c24xx/dma-s3c2412.c
@@ -25,10 +25,8 @@
 
 #include plat/regs-serial.h
 #include mach/regs-gpio.h
-#include plat/regs-ac97.h
 #include plat/regs-dma.h
 #include mach/regs-lcd.h
-#include plat/regs-iis.h
 #include plat/regs-spi.h
 
 #define MAP(x) { (x)| DMA_CH_VALID, (x)| DMA_CH_VALID, (x)| DMA_CH_VALID, (x)| 
DMA_CH_VALID }
diff --git a/arch/arm/mach-s3c24xx/dma-s3c2440.c 
b/arch/arm/mach-s3c24xx/dma-s3c2440.c
index 1c08eccd..cd25de2 100644
--- a/arch/arm/mach-s3c24xx/dma-s3c2440.c
+++ b/arch/arm/mach-s3c24xx/dma-s3c2440.c
@@ -25,10 +25,8 @@
 
 #include plat/regs-serial.h
 #include mach/regs-gpio.h
-#include plat/regs-ac97.h
 #include plat/regs-dma.h
 #include mach/regs-lcd.h
-#include plat/regs-iis.h
 #include plat/regs-spi.h
 
 static struct s3c24xx_dma_map __initdata s3c2440_dma_mappings[] = {
diff --git a/arch/arm/mach-s3c24xx/dma-s3c2443.c 
b/arch/arm/mach-s3c24xx/dma-s3c2443.c
index 000e4c6..5fe3539 100644
--- a/arch/arm/mach-s3c24xx/dma-s3c2443.c
+++ b/arch/arm/mach-s3c24xx/dma-s3c2443.c
@@ -25,10 +25,8 @@
 
 #include plat/regs-serial.h
 #include mach/regs-gpio.h
-#include plat/regs-ac97.h
 #include plat/regs-dma.h
 #include mach/regs-lcd.h
-#include plat/regs-iis.h
 #include plat/regs-spi.h
 
 #define MAP(x) { \
diff --git a/sound/soc/samsung/ac97.c b/sound/soc/samsung/ac97.c
index 0df3c56..c76abdf 100644
--- a/sound/soc/samsung/ac97.c
+++ b/sound/soc/samsung/ac97.c
@@ -20,7 +20,7 @@
 #include sound/soc.h
 
 #include mach/dma.h
-#include plat/regs-ac97.h
+#include regs-ac97.h
 #include linux/platform_data/asoc-s3c.h
 
 #include dma.h
diff --git a/sound/soc/samsung/h1940_uda1380.c 
b/sound/soc/samsung/h1940_uda1380.c
index 15a3817..fa91376 100644
--- a/sound/soc/samsung/h1940_uda1380.c
+++ b/sound/soc/samsung/h1940_uda1380.c
@@ -20,7 +20,7 @@
 #include sound/soc.h
 #include sound/jack.h
 
-#include plat/regs-iis.h
+#include regs-iis.h
 #include asm/mach-types.h
 
 #include s3c24xx-i2s.h
diff --git a/sound/soc/samsung/neo1973_wm8753.c 
b/sound/soc/samsung/neo1973_wm8753.c
index a301d8c..ccc601d 100644
--- a/sound/soc/samsung/neo1973_wm8753.c
+++ b/sound/soc/samsung/neo1973_wm8753.c
@@ -21,7 +21,7 @@
 #include sound/soc.h
 
 #include asm/mach-types.h
-#include plat/regs-iis.h
+#include regs-iis.h
 #include mach/gta02.h
 
 #include ../codecs/wm8753.h
diff --git a/arch/arm/plat-samsung/include/plat/regs-ac97.h 
b/sound/soc/samsung/regs-ac97.h
similarity index 100%
rename from arch/arm/plat-samsung/include/plat/regs-ac97.h
rename to sound/soc/samsung/regs-ac97.h
diff --git a/arch/arm/plat-samsung/include/plat/regs-iis.h 
b/sound/soc/samsung/regs-iis.h
similarity index 100%
rename from arch/arm/plat-samsung/include/plat/regs-iis.h
rename to sound/soc/samsung/regs-iis.h
diff --git a/sound/soc/samsung/rx1950_uda1380.c 
b/sound/soc/samsung/rx1950_uda1380.c
index

[PATCH 01/30] ARM: exynos: introduce EXYNOS_ATAGS symbol

2013-04-10 Thread Arnd Bergmann

As a preparation for multiplatform support, this introduces
a new Kconfig symbol to split the ATAGS based EXYNOS platforms
from the DT based ones. Turning off CONFIG_EXYNOS_ATAGS disables
all platforms that are not yet converted to DT, and we can
have code that relies on DT checking for this symbol being
disabled.

Signed-off-by: Arnd Bergmann a...@arndb.de
---
 arch/arm/mach-exynos/Kconfig | 15 +++
 1 file changed, 15 insertions(+)

diff --git a/arch/arm/mach-exynos/Kconfig b/arch/arm/mach-exynos/Kconfig
index a62cfa0..e815057 100644
--- a/arch/arm/mach-exynos/Kconfig
+++ b/arch/arm/mach-exynos/Kconfig
@@ -82,6 +82,19 @@ config SOC_EXYNOS5440
help
  Enable EXYNOS5440 SoC support
 
+config EXYNOS_ATAGS
+   bool ATAGS based boot for EXYNOS (deprecated)
+   depends on ARCH_EXYNOS_SINGLE
+   depends on ATAGS
+   default y
+   help
+ The EXYNOS platform is moving towards being completely probed
+ through device tree. This enables support for board files using
+ the traditional ATAGS boot format.
+ Note that this option is not available for multiplatform builds.
+
+if EXYNOS_ATAGS
+
 config EXYNOS_DEV_DMA
bool
help
@@ -386,6 +399,8 @@ config MACH_SMDK4412
  Machine support for Samsung SMDK4412
 endif
 
+endif
+
 comment Flattened Device Tree based board for EXYNOS SoCs
 
 config MACH_EXYNOS4_DT
-- 
1.8.1.2

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[PATCH 10/30] usb: exynos: do not include plat/usb-phy.h

2013-04-10 Thread Arnd Bergmann

The definitions have moved to include/linux/usb/samsung-usb-phy.h,
and plat/usb-phy.h is unavailable from drivers in a multiplatform
configuration.

Also fix up the plat/usb-phy.h header file to use the definitions
from the new header instead of providing a separate copy.

Signed-off-by: Arnd Bergmann a...@arndb.de
Cc: linux-...@vger.kernel.org
Cc: Greg Kroah-Hartman gre...@linuxfoundation.org
Cc: Alan Stern st...@rowland.harvard.edu
---
 arch/arm/mach-exynos/setup-usb-phy.c | 8 
 arch/arm/mach-s3c64xx/setup-usb-phy.c| 4 ++--
 arch/arm/mach-s5pv210/setup-usb-phy.c| 4 ++--
 arch/arm/plat-samsung/include/plat/usb-phy.h | 5 +
 drivers/usb/host/ehci-s5p.c  | 1 -
 drivers/usb/host/ohci-exynos.c   | 1 -
 6 files changed, 9 insertions(+), 14 deletions(-)

diff --git a/arch/arm/mach-exynos/setup-usb-phy.c 
b/arch/arm/mach-exynos/setup-usb-phy.c
index b81cc56..6af4066 100644
--- a/arch/arm/mach-exynos/setup-usb-phy.c
+++ b/arch/arm/mach-exynos/setup-usb-phy.c
@@ -204,9 +204,9 @@ static int exynos4210_usb_phy1_exit(struct platform_device 
*pdev)
 
 int s5p_usb_phy_init(struct platform_device *pdev, int type)
 {
-   if (type == S5P_USB_PHY_DEVICE)
+   if (type == USB_PHY_TYPE_DEVICE)
return exynos4210_usb_phy0_init(pdev);
-   else if (type == S5P_USB_PHY_HOST)
+   else if (type == USB_PHY_TYPE_HOST)
return exynos4210_usb_phy1_init(pdev);
 
return -EINVAL;
@@ -214,9 +214,9 @@ int s5p_usb_phy_init(struct platform_device *pdev, int type)
 
 int s5p_usb_phy_exit(struct platform_device *pdev, int type)
 {
-   if (type == S5P_USB_PHY_DEVICE)
+   if (type == USB_PHY_TYPE_DEVICE)
return exynos4210_usb_phy0_exit(pdev);
-   else if (type == S5P_USB_PHY_HOST)
+   else if (type == USB_PHY_TYPE_HOST)
return exynos4210_usb_phy1_exit(pdev);
 
return -EINVAL;
diff --git a/arch/arm/mach-s3c64xx/setup-usb-phy.c 
b/arch/arm/mach-s3c64xx/setup-usb-phy.c
index c8174d9..ca960bd 100644
--- a/arch/arm/mach-s3c64xx/setup-usb-phy.c
+++ b/arch/arm/mach-s3c64xx/setup-usb-phy.c
@@ -76,7 +76,7 @@ static int s3c_usb_otgphy_exit(struct platform_device *pdev)
 
 int s5p_usb_phy_init(struct platform_device *pdev, int type)
 {
-   if (type == S5P_USB_PHY_DEVICE)
+   if (type == USB_PHY_TYPE_DEVICE)
return s3c_usb_otgphy_init(pdev);
 
return -EINVAL;
@@ -84,7 +84,7 @@ int s5p_usb_phy_init(struct platform_device *pdev, int type)
 
 int s5p_usb_phy_exit(struct platform_device *pdev, int type)
 {
-   if (type == S5P_USB_PHY_DEVICE)
+   if (type == USB_PHY_TYPE_DEVICE)
return s3c_usb_otgphy_exit(pdev);
 
return -EINVAL;
diff --git a/arch/arm/mach-s5pv210/setup-usb-phy.c 
b/arch/arm/mach-s5pv210/setup-usb-phy.c
index 356a090..b2ee533 100644
--- a/arch/arm/mach-s5pv210/setup-usb-phy.c
+++ b/arch/arm/mach-s5pv210/setup-usb-phy.c
@@ -80,7 +80,7 @@ static int s5pv210_usb_otgphy_exit(struct platform_device 
*pdev)
 
 int s5p_usb_phy_init(struct platform_device *pdev, int type)
 {
-   if (type == S5P_USB_PHY_DEVICE)
+   if (type == USB_PHY_TYPE_DEVICE)
return s5pv210_usb_otgphy_init(pdev);
 
return -EINVAL;
@@ -88,7 +88,7 @@ int s5p_usb_phy_init(struct platform_device *pdev, int type)
 
 int s5p_usb_phy_exit(struct platform_device *pdev, int type)
 {
-   if (type == S5P_USB_PHY_DEVICE)
+   if (type == USB_PHY_TYPE_DEVICE)
return s5pv210_usb_otgphy_exit(pdev);
 
return -EINVAL;
diff --git a/arch/arm/plat-samsung/include/plat/usb-phy.h 
b/arch/arm/plat-samsung/include/plat/usb-phy.h
index 959bcdb..ab34dfa 100644
--- a/arch/arm/plat-samsung/include/plat/usb-phy.h
+++ b/arch/arm/plat-samsung/include/plat/usb-phy.h
@@ -11,10 +11,7 @@
 #ifndef __PLAT_SAMSUNG_USB_PHY_H
 #define __PLAT_SAMSUNG_USB_PHY_H __FILE__
 
-enum s5p_usb_phy_type {
-   S5P_USB_PHY_DEVICE,
-   S5P_USB_PHY_HOST,
-};
+#include linux/usb/samsung_usb_phy.h
 
 extern int s5p_usb_phy_init(struct platform_device *pdev, int type);
 extern int s5p_usb_phy_exit(struct platform_device *pdev, int type);
diff --git a/drivers/usb/host/ehci-s5p.c b/drivers/usb/host/ehci-s5p.c
index 20ebf6a..7dc9c15 100644
--- a/drivers/usb/host/ehci-s5p.c
+++ b/drivers/usb/host/ehci-s5p.c
@@ -19,7 +19,6 @@
 #include linux/platform_data/usb-ehci-s5p.h
 #include linux/usb/phy.h
 #include linux/usb/samsung_usb_phy.h
-#include plat/usb-phy.h
 
 #define EHCI_INSNREG00(base)   (base + 0x90)
 #define EHCI_INSNREG00_ENA_INCR16  (0x1  25)
diff --git a/drivers/usb/host/ohci-exynos.c b/drivers/usb/host/ohci-exynos.c
index 0bd6f47..0792bfd 100644
--- a/drivers/usb/host/ohci-exynos.c
+++ b/drivers/usb/host/ohci-exynos.c
@@ -18,7 +18,6 @@
 #include linux/usb/phy.h
 #include linux/usb/samsung_usb_phy.h
 
-#include plat/usb-phy.h
 
 struct exynos_ohci_hcd {
struct device *dev;
-- 
1.8.1.2

--
To

Re: [PATCH 02/30] ARM: exynos: prepare for sparse IRQ

2013-04-10 Thread Kyungmin Park

On Thu, Apr 11, 2013 at 9:04 AM, Arnd Bergmann a...@arndb.de wrote:
 When we enable CONFIG_SPARSE_IRQ, we have to set the value of NR_IRQS in
 the machine_desc for legacy IRQ domains, and any file referring to the
 number of interrupts or a specific number must include the mach/irqs.h
 header file explicitly.

It's really wanted feature.

 Signed-off-by: Arnd Bergmann a...@arndb.de
Acked-by: Kyungmin Park kyungmin.p...@samsung.com
 ---
  arch/arm/mach-exynos/dev-uart.c  | 1 +
  arch/arm/mach-exynos/include/mach/irqs.h | 5 -
  arch/arm/mach-exynos/mach-armlex4210.c   | 2 ++
  arch/arm/mach-exynos/mach-exynos4-dt.c   | 3 +++
  arch/arm/mach-exynos/mach-exynos5-dt.c   | 2 ++
  arch/arm/mach-exynos/mach-nuri.c | 2 ++
  arch/arm/mach-exynos/mach-origen.c   | 2 ++
  arch/arm/mach-exynos/mach-smdk4x12.c | 2 ++
  arch/arm/mach-exynos/mach-smdkv310.c | 3 +++
  arch/arm/plat-samsung/irq-vic-timer.c| 1 +
  arch/arm/plat-samsung/pm.c   | 1 +
  arch/arm/plat-samsung/s5p-irq.c  | 1 +
  12 files changed, 24 insertions(+), 1 deletion(-)

 diff --git a/arch/arm/mach-exynos/dev-uart.c b/arch/arm/mach-exynos/dev-uart.c
 index 7c42f4b..c48aff0 100644
 --- a/arch/arm/mach-exynos/dev-uart.c
 +++ b/arch/arm/mach-exynos/dev-uart.c
 @@ -20,6 +20,7 @@
  #include asm/mach/irq.h
  #include mach/hardware.h
  #include mach/map.h
 +#include mach/irqs.h

  #include plat/devs.h

 diff --git a/arch/arm/mach-exynos/include/mach/irqs.h 
 b/arch/arm/mach-exynos/include/mach/irqs.h
 index 35fe6d5..c72f59d 100644
 --- a/arch/arm/mach-exynos/include/mach/irqs.h
 +++ b/arch/arm/mach-exynos/include/mach/irqs.h
 @@ -467,7 +467,10 @@
  #define IRQ_TIMER_BASE (IRQ_GPIO_END + 64)

  /* Set the default NR_IRQS */
 +#define EXYNOS_NR_IRQS (IRQ_TIMER_BASE + IRQ_TIMER_COUNT)

 -#define NR_IRQS(IRQ_TIMER_BASE + 
 IRQ_TIMER_COUNT)
 +#ifndef CONFIG_SPARSE_IRQ
 +#define NR_IRQSEXYNOS_NR_IRQS
 +#endif

  #endif /* __ASM_ARCH_IRQS_H */
 diff --git a/arch/arm/mach-exynos/mach-armlex4210.c 
 b/arch/arm/mach-exynos/mach-armlex4210.c
 index 2c23b65..a503e02 100644
 --- a/arch/arm/mach-exynos/mach-armlex4210.c
 +++ b/arch/arm/mach-exynos/mach-armlex4210.c
 @@ -25,6 +25,7 @@
  #include plat/regs-srom.h
  #include plat/sdhci.h

 +#include mach/irqs.h
  #include mach/map.h

  #include common.h
 @@ -196,6 +197,7 @@ static void __init armlex4210_machine_init(void)
  MACHINE_START(ARMLEX4210, ARMLEX4210)
 /* Maintainer: Alim Akhtar alim.akh...@samsung.com */
 .atag_offset= 0x100,
 +   .nr_irqs= EXYNOS_NR_IRQS,
 .smp= smp_ops(exynos_smp_ops),
 .init_irq   = exynos4_init_irq,
 .map_io = armlex4210_map_io,
 diff --git a/arch/arm/mach-exynos/mach-exynos4-dt.c 
 b/arch/arm/mach-exynos/mach-exynos4-dt.c
 index b9ed834..5f23682 100644
 --- a/arch/arm/mach-exynos/mach-exynos4-dt.c
 +++ b/arch/arm/mach-exynos/mach-exynos4-dt.c
 @@ -20,6 +20,8 @@

  #include asm/mach/arch.h
  #include plat/mfc.h
 +#include mach/irqs.h
 +

  #include common.h

 @@ -54,6 +56,7 @@ static void __init exynos4_reserve(void)
  }
  DT_MACHINE_START(EXYNOS4210_DT, Samsung Exynos4 (Flattened Device Tree))
 /* Maintainer: Thomas Abraham thomas.abra...@linaro.org */
 +   .nr_irqs= EXYNOS_NR_IRQS,
 .smp= smp_ops(exynos_smp_ops),
 .init_irq   = exynos4_init_irq,
 .map_io = exynos4_dt_map_io,
 diff --git a/arch/arm/mach-exynos/mach-exynos5-dt.c 
 b/arch/arm/mach-exynos/mach-exynos5-dt.c
 index 753b94f..8b7456a 100644
 --- a/arch/arm/mach-exynos/mach-exynos5-dt.c
 +++ b/arch/arm/mach-exynos/mach-exynos5-dt.c
 @@ -16,6 +16,7 @@
  #include linux/clocksource.h

  #include asm/mach/arch.h
 +#include mach/irqs.h
  #include mach/regs-pmu.h

  #include plat/cpu.h
 @@ -76,6 +77,7 @@ static void __init exynos5_reserve(void)

  DT_MACHINE_START(EXYNOS5_DT, SAMSUNG EXYNOS5 (Flattened Device Tree))
 /* Maintainer: Kukjin Kim kgene@samsung.com */
 +   .nr_irqs= EXYNOS_NR_IRQS,
 .init_irq   = exynos5_init_irq,
 .smp= smp_ops(exynos_smp_ops),
 .map_io = exynos5_dt_map_io,
 diff --git a/arch/arm/mach-exynos/mach-nuri.c 
 b/arch/arm/mach-exynos/mach-nuri.c
 index 0c10852..fbae331 100644
 --- a/arch/arm/mach-exynos/mach-nuri.c
 +++ b/arch/arm/mach-exynos/mach-nuri.c
 @@ -53,6 +53,7 @@
  #include plat/fimc-core.h
  #include plat/camport.h

 +#include mach/irqs.h
  #include mach/map.h

  #include common.h
 @@ -1376,6 +1377,7 @@ static void __init nuri_machine_init(void)
  MACHINE_START(NURI, NURI)
 /* Maintainer: Kyungmin Park kyungmin.p...@samsung.com */
 .atag_offset= 0x100,
 +   .nr_irqs= EXYNOS_NR_IRQS,
 .smp= smp_ops(exynos_smp_ops),
 .init_irq   = exynos4_init_irq,
 .map_io =

Re: [PATCH 15/30] mtd: onenand/samsung: make regs-onenand.h file local

2013-04-10 Thread Kyungmin Park

Thanks Arnd.

On Thu, Apr 11, 2013 at 9:04 AM, Arnd Bergmann a...@arndb.de wrote:
 Nothing uses the NAND register definitions other than the
 actual driver, so we can move the header file into the
 same local directory, which lets us build it in a multiplatform
 configuration.

 Signed-off-by: Arnd Bergmann a...@arndb.de
 Cc: linux-...@lists.infradead.org
 Cc: Kyungmin Park kyungmin.p...@samsung.com
Acked-by: Kyungmin Park kyungmin.p...@samsung.com
 Cc: David Woodhouse dw...@infradead.org
 ---
  drivers/mtd/onenand/samsung.c | 4 
 ++--
  .../include/plat/regs-onenand.h = drivers/mtd/onenand/samsung.h  | 2 --
  2 files changed, 2 insertions(+), 4 deletions(-)
  rename arch/arm/plat-samsung/include/plat/regs-onenand.h = 
 drivers/mtd/onenand/samsung.h (98%)

 diff --git a/drivers/mtd/onenand/samsung.c b/drivers/mtd/onenand/samsung.c
 index 33f2a8f..2cf7408 100644
 --- a/drivers/mtd/onenand/samsung.c
 +++ b/drivers/mtd/onenand/samsung.c
 @@ -23,11 +23,11 @@
  #include linux/mtd/partitions.h
  #include linux/dma-mapping.h
  #include linux/interrupt.h
 +#include linux/io.h

  #include asm/mach/flash.h
 -#include plat/regs-onenand.h

 -#include linux/io.h
 +#include samsung.h

  enum soc_type {
 TYPE_S3C6400,
 diff --git a/arch/arm/plat-samsung/include/plat/regs-onenand.h 
 b/drivers/mtd/onenand/samsung.h
 similarity index 98%
 rename from arch/arm/plat-samsung/include/plat/regs-onenand.h
 rename to drivers/mtd/onenand/samsung.h
 index 930ea8b..c4a80e6 100644
 --- a/arch/arm/plat-samsung/include/plat/regs-onenand.h
 +++ b/drivers/mtd/onenand/samsung.h
 @@ -11,8 +11,6 @@
  #ifndef __SAMSUNG_ONENAND_H__
  #define __SAMSUNG_ONENAND_H__

 -#include mach/hardware.h
 -
  /*
   * OneNAND Controller
   */
 --
 1.8.1.2


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Re: [PATCH 09/30] mmc: sdhci-s3c: remove platform dependencies

2013-04-10 Thread Chris Ball

Hi,

On Wed, Apr 10 2013, Arnd Bergmann wrote:
 plat/regs-sdhci.h is not used anywhere but in the sdhci-s3c
 driver, so it can become a local file there and all other
 inclusions removed.

 plat/sdhci.h is used only to define the platform devices,
 and with the exception of the platform_data structure not
 needed by the driver, so we can split out the platform_data
 definition instead and leave the rest to platform code.

 Signed-off-by: Arnd Bergmann a...@arndb.de
 Cc: linux-...@vger.kernel.org
 Cc: Chris Ball c...@laptop.org

Acked-by: Chris Ball c...@laptop.org

- Chris.
-- 
Chris Ball   c...@laptop.org   http://printf.net/
One Laptop Per Child
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Re: [PATCH 14/30] thermal/exynos: remove unnecessary header inclusions

2013-04-10 Thread Eduardo Valentin


Rui, Arnd,

As agreed in [1], I will be helping on the thermal maintenance.

On 10-04-2013 20:04, Arnd Bergmann wrote:

In multiplatform configurations, we cannot include headers
provided by only the exynos platform. Fortunately a number
of drivers that include those headers do not actually need
them, so we can just remove the inclusions.

Signed-off-by: Arnd Bergmann a...@arndb.de
Cc: linux...@vger.kernel.org
Cc: Zhang Rui rui.zh...@intel.com


This patch looks good to me.

You can add my:
Acked-by: Eduardo Valentin eduardo.valen...@ti.com


[1] - http://marc.info/?l=linux-pmm=136560509922173w=2
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RE: [PATCH v4] mmc: dw_mmc: let device core setup the default pin configuration

2013-04-10 Thread Seungwon Jeon

On Wednesday, April 10, 2013, Doug Anderson wrote:
 Thomas,
 
 On Wed, Apr 10, 2013 at 6:56 AM, Doug Anderson diand...@chromium.org wrote:
  On Wed, Apr 10, 2013 at 5:48 AM, Thomas Abraham
  thomas.abra...@linaro.org wrote:
  The call to regulator_enable() is prior to the call to mmc_add_host().
  Hence, call to mmc_fre_host is not required in this case. So the above
  change should be right.
 
  Are you sure that mmc_free_host() is the opposite of mmc_add_host()
  and not mmc_alloc_host()?
 
  I'll double-check myself in a few hours when I'm in front of a computer.
 
 OK, I double checked and I'm still convinced that the free is needed
 because we've already called mmc_alloc_host().  Current code always
 makes sure to free when it returns an error and that seems right to
 me.
mmc_alloc_host corresponds to mmc_free_host. And mmc_add_host matches
with mmc_remove_host. Let's focus on mmc_alloc_host.
mmc_alloc_host is called prior to regulator_enable.
So, if regulator_enable is failed, call of mmc_free_host makes sense.

Thanks,
Seungwon Jeon
 
 -Doug
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Re: [PATCH] rtc: rtc-s3c: use clk_prepare_enable and clk_disable_unprepare

2013-04-10 Thread Jingoo Han

On Wednesday, April 10, 2013 6:50 PM, Sylwester Nawrocki wrote:
 On 04/09/2013 04:27 PM, Vivek Gautam wrote:
  From: Thomas Abraham thomas.abra...@linaro.org
 
  Convert clk_enable/clk_disable to clk_prepare_enable/clk_disable_unprepare
  calls as required by common clock framework.
 
  Signed-off-by: Thomas Abraham thomas.abra...@linaro.org
  Signed-off-by: Vivek Gautam gautam.vi...@samsung.com
 
 Thanks Vivek.
 
 Reviewed-by: Sylwester Nawrocki s.nawro...@samsung.com

CC'ed Andrew Morton

It looks good.
Reviewed-by: Jingoo Han jg1@samsung.com

 
  ---
 
  The v1 of this patch is pretty old, but the change needs to be merged to
  avoid getting those needless WARN_ON() dumps on console.
 
  Changes from v1:
   - Not using clk_disable_unprepare() at the end of s3c_rtc_probe(), since
 this will unprepare the rtc clock which is again getting used in other
 funtions later.
   - Using clk_unprepare() at the remove() instead to fix things up.
 
   drivers/rtc/rtc-s3c.c |5 +++--
   1 files changed, 3 insertions(+), 2 deletions(-)
 
  diff --git a/drivers/rtc/rtc-s3c.c b/drivers/rtc/rtc-s3c.c
  index fb994e9..e3528c9 100644
  --- a/drivers/rtc/rtc-s3c.c
  +++ b/drivers/rtc/rtc-s3c.c
  @@ -430,6 +430,7 @@ static int s3c_rtc_remove(struct platform_device *dev)
 
  s3c_rtc_setaie(dev-dev, 0);
 
  +   clk_unprepare(rtc_clk);
  rtc_clk = NULL;
 
  return 0;
  @@ -498,7 +499,7 @@ static int s3c_rtc_probe(struct platform_device *pdev)
  return ret;
  }
 
  -   clk_enable(rtc_clk);
  +   clk_prepare_enable(rtc_clk);
 
  /* check to see if everything is setup correctly */
 
  @@ -578,7 +579,7 @@ static int s3c_rtc_probe(struct platform_device *pdev)
 
err_nortc:
  s3c_rtc_enable(pdev, 0);
  -   clk_disable(rtc_clk);
  +   clk_disable_unprepare(rtc_clk);
 
  return ret;
   }
 
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Re: [PATCH 13/30] video/s3c: move platform_data out of arch/arm

2013-04-10 Thread Jingoo Han

On Thursday, April 11, 2013 9:05 AM, Arnd Bergmann wrote:
 
 The s3c-fb driver requires header files from the samsung platforms
 to find its platform_data definition, but this no longer works on
 multiplatform kernels, so let's move the data into a new header
 file under include/linux/platform_data.
 
 Signed-off-by: Arnd Bergmann a...@arndb.de
 Cc: linux-fb...@vger.kernel.org
 Cc: Jingoo Han jg1@samsung.com

CC'ed Tomi Valkeinen.


Hi Arnd,
It looks good. Thank you for your patch. :)

Acked-by: Jingoo Han jg1@samsung.com

Best regards,
Jingoo Han

 ---
  arch/arm/plat-samsung/include/plat/fb.h | 50 +-
  drivers/video/s3c-fb.c  |  3 +-
  include/linux/platform_data/video_s3c.h | 54 
 +
  3 files changed, 56 insertions(+), 51 deletions(-)
  create mode 100644 include/linux/platform_data/video_s3c.h
 
 diff --git a/arch/arm/plat-samsung/include/plat/fb.h 
 b/arch/arm/plat-samsung/include/plat/fb.h
 index b885322..9ae5072 100644
 --- a/arch/arm/plat-samsung/include/plat/fb.h
 +++ b/arch/arm/plat-samsung/include/plat/fb.h
 @@ -15,55 +15,7 @@
  #ifndef __PLAT_S3C_FB_H
  #define __PLAT_S3C_FB_H __FILE__
 
 -/* S3C_FB_MAX_WIN
 - * Set to the maximum number of windows that any of the supported hardware
 - * can use. Since the platform data uses this for an array size, having it
 - * set to the maximum of any version of the hardware can do is safe.
 - */
 -#define S3C_FB_MAX_WIN   (5)
 -
 -/**
 - * struct s3c_fb_pd_win - per window setup data
 - * @xres : The window X size.
 - * @yres : The window Y size.
 - * @virtual_x: The virtual X size.
 - * @virtual_y: The virtual Y size.
 - */
 -struct s3c_fb_pd_win {
 - unsigned short  default_bpp;
 - unsigned short  max_bpp;
 - unsigned short  xres;
 - unsigned short  yres;
 - unsigned short  virtual_x;
 - unsigned short  virtual_y;
 -};
 -
 -/**
 - * struct s3c_fb_platdata -  S3C driver platform specific information
 - * @setup_gpio: Setup the external GPIO pins to the right state to transfer
 - *   the data from the display system to the connected display
 - *   device.
 - * @vidcon0: The base vidcon0 values to control the panel data format.
 - * @vidcon1: The base vidcon1 values to control the panel data output.
 - * @vtiming: Video timing when connected to a RGB type panel.
 - * @win: The setup data for each hardware window, or NULL for unused.
 - * @display_mode: The LCD output display mode.
 - *
 - * The platform data supplies the video driver with all the information
 - * it requires to work with the display(s) attached to the machine. It
 - * controls the initial mode, the number of display windows (0 is always
 - * the base framebuffer) that are initialised etc.
 - *
 - */
 -struct s3c_fb_platdata {
 - void(*setup_gpio)(void);
 -
 - struct s3c_fb_pd_win*win[S3C_FB_MAX_WIN];
 - struct fb_videomode *vtiming;
 -
 - u32  vidcon0;
 - u32  vidcon1;
 -};
 +#include linux/platform_data/video_s3c.h
 
  /**
   * s3c_fb_set_platdata() - Setup the FB device with platform data.
 diff --git a/drivers/video/s3c-fb.c b/drivers/video/s3c-fb.c
 index 968a625..2e7991c 100644
 --- a/drivers/video/s3c-fb.c
 +++ b/drivers/video/s3c-fb.c
 @@ -24,10 +24,9 @@
  #include linux/uaccess.h
  #include linux/interrupt.h
  #include linux/pm_runtime.h
 +#include linux/platform_data/video_s3c.h
 
  #include video/samsung_fimd.h
 -#include mach/map.h
 -#include plat/fb.h
 
  /* This driver will export a number of framebuffer interfaces depending
   * on the configuration passed in via the platform data. Each fb instance
 diff --git a/include/linux/platform_data/video_s3c.h 
 b/include/linux/platform_data/video_s3c.h
 new file mode 100644
 index 000..fa40f96
 --- /dev/null
 +++ b/include/linux/platform_data/video_s3c.h
 @@ -0,0 +1,54 @@
 +#ifndef __PLATFORM_DATA_VIDEO_S3C
 +#define __PLATFORM_DATA_VIDEO_S3C
 +
 +/* S3C_FB_MAX_WIN
 + * Set to the maximum number of windows that any of the supported hardware
 + * can use. Since the platform data uses this for an array size, having it
 + * set to the maximum of any version of the hardware can do is safe.
 + */
 +#define S3C_FB_MAX_WIN   (5)
 +
 +/**
 + * struct s3c_fb_pd_win - per window setup data
 + * @xres : The window X size.
 + * @yres : The window Y size.
 + * @virtual_x: The virtual X size.
 + * @virtual_y: The virtual Y size.
 + */
 +struct s3c_fb_pd_win {
 + unsigned short  default_bpp;
 + unsigned short  max_bpp;
 + unsigned short  xres;
 + unsigned short  yres;
 + unsigned short  virtual_x;
 + unsigned short  virtual_y;
 +};
 +
 +/**
 + * struct s3c_fb_platdata -  S3C driver platform specific information
 + * @setup_gpio: Setup the external GPIO pins to the right state to transfer
 + *   the data

Re: [PATCH 12/30] video/exynos: remove unnecessary header inclusions

2013-04-10 Thread Jingoo Han

On Thursday, April 11, 2013 9:05 AM, Arnd Bergmann wrote:
 
 In multiplatform configurations, we cannot include headers
 provided by only the exynos platform. Fortunately a number
 of drivers that include those headers do not actually need
 them, so we can just remove the inclusions.
 
 Signed-off-by: Arnd Bergmann a...@arndb.de
 Cc: linux-fb...@vger.kernel.org
 Cc: Jingoo Han jg1@samsung.com

CC'ed Tomi Valkeinen, Inki Dae, Donghwa Lee, Kyungmin Park


Acked-by: Jingoo Han jg1@samsung.com

Best regards,
Jingoo Han

 ---
  drivers/video/exynos/exynos_mipi_dsi.c  | 2 --
  drivers/video/exynos/exynos_mipi_dsi_common.c   | 2 --
  drivers/video/exynos/exynos_mipi_dsi_lowlevel.c | 2 --
  3 files changed, 6 deletions(-)
 
 diff --git a/drivers/video/exynos/exynos_mipi_dsi.c 
 b/drivers/video/exynos/exynos_mipi_dsi.c
 index fac7df6..3dd43ca 100644
 --- a/drivers/video/exynos/exynos_mipi_dsi.c
 +++ b/drivers/video/exynos/exynos_mipi_dsi.c
 @@ -35,8 +35,6 @@
 
  #include video/exynos_mipi_dsim.h
 
 -#include plat/fb.h
 -
  #include exynos_mipi_dsi_common.h
  #include exynos_mipi_dsi_lowlevel.h
 
 diff --git a/drivers/video/exynos/exynos_mipi_dsi_common.c
 b/drivers/video/exynos/exynos_mipi_dsi_common.c
 index c70cb89..520fc9b 100644
 --- a/drivers/video/exynos/exynos_mipi_dsi_common.c
 +++ b/drivers/video/exynos/exynos_mipi_dsi_common.c
 @@ -31,8 +31,6 @@
  #include video/mipi_display.h
  #include video/exynos_mipi_dsim.h
 
 -#include mach/map.h
 -
  #include exynos_mipi_dsi_regs.h
  #include exynos_mipi_dsi_lowlevel.h
  #include exynos_mipi_dsi_common.h
 diff --git a/drivers/video/exynos/exynos_mipi_dsi_lowlevel.c
 b/drivers/video/exynos/exynos_mipi_dsi_lowlevel.c
 index 95cb99a..15c5abd 100644
 --- a/drivers/video/exynos/exynos_mipi_dsi_lowlevel.c
 +++ b/drivers/video/exynos/exynos_mipi_dsi_lowlevel.c
 @@ -26,8 +26,6 @@
 
  #include video/exynos_mipi_dsim.h
 
 -#include mach/map.h
 -
  #include exynos_mipi_dsi_regs.h
 
  void exynos_mipi_dsi_func_reset(struct mipi_dsim_device *dsim)
 --
 1.8.1.2

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Re: [PATCH 13/30] video/s3c: move platform_data out of arch/arm

2013-04-10 Thread Jingoo Han

On Thursday, April 11, 2013 9:05 AM, Arnd Bergmann wrote:

 The s3c-fb driver requires header files from the samsung platforms
 to find its platform_data definition, but this no longer works on
 multiplatform kernels, so let's move the data into a new header
 file under include/linux/platform_data.

 Signed-off-by: Arnd Bergmann a...@arndb.de
 Cc: linux-fb...@vger.kernel.org
 Cc: Jingoo Han jg1@samsung.com
 ---
  arch/arm/plat-samsung/include/plat/fb.h | 50 +-
  drivers/video/s3c-fb.c  |  3 +-
  include/linux/platform_data/video_s3c.h | 54 
 +
  3 files changed, 56 insertions(+), 51 deletions(-)
  create mode 100644 include/linux/platform_data/video_s3c.h

[.]

 +struct s3c_fb_platdata {
 + void(*setup_gpio)(void);
 +
 + struct s3c_fb_pd_win*win[S3C_FB_MAX_WIN];
 + struct fb_videomode *vtiming;
 +
 + u32  vidcon0;
 + u32  vidcon1;
 +};
 + 

There is an unnecessary space.
When the patch is merged, this space should be removed.

Best regards,
Jingoo Han

 +#endif
 --
 1.8.1.2

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