Re: [PATCH 3/3] ARM: S5P64X0: Remove duplicate uncompress code
On 06/01/2013 02:11 PM, Sylwester Nawrocki wrote: Hi, On 05/31/2013 01:49 PM, Tushar Behera wrote: The uncompress code in S5P64X0 is almost same as the uncompress code defined in plat-samsung. Better to reuse that code. Signed-off-by: Tushar Beheratushar.beh...@linaro.org --- arch/arm/mach-s5p64x0/include/mach/uncompress.h | 163 ++- 1 file changed, 8 insertions(+), 155 deletions(-) Not sure if you are aware of it, Tomasz has already posted a patch that removes this duplicated code: https://patchwork.kernel.org/patch/2589331 I think that patch is not yet merged though. Regards, Sylwester Tomasz, I had somehow missed that mail. The patch that I have additionally makes calculation of uart_base conditional on DEBUG_LL in line with the rest of the patches. Would you mind re-spining your patch with those changes? Alternately, I can take your patch and do above modifications in them. Let me know your opinion on this. -- Tushar Behera -- To unsubscribe from this list: send the line unsubscribe linux-samsung-soc in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
Re: [PATCH 1/3] ARM: EXYNOS: uncompress - print debug messages if DEBUG_LL is defined
On 06/01/2013 09:29 AM, Olof Johansson wrote: On Fri, May 31, 2013 at 05:19:02PM +0530, Tushar Behera wrote: Printing low-level debug messages make an assumption that the specified UART port has been preconfigured by the bootloader. Incorrectly specified UART port results in system getting stalled while printing the message Uncompressing Linux... done, booting the kernel This UART port number is specified through S3C_LOWLEVEL_UART_PORT. Since the UART port might different for different board, it is not possible to specify it correctly for every board that use a common defconfig file. Calling this print subroutine only when DEBUG_LL fixes the problem. By disabling DEBUG_LL in default config file, we would be able to boot multiple boards with different default UART ports. With this current approach, we miss the print Uncompressing Linux... done, booting the kernel. when DEBUG_LL is not defined. Signed-off-by: Tushar Behera tushar.beh...@linaro.org --- arch/arm/mach-exynos/include/mach/uncompress.h | 11 --- arch/arm/plat-samsung/include/plat/uncompress.h | 10 +- 2 files changed, 17 insertions(+), 4 deletions(-) diff --git a/arch/arm/mach-exynos/include/mach/uncompress.h b/arch/arm/mach-exynos/include/mach/uncompress.h index 2979995..730f69f 100644 --- a/arch/arm/mach-exynos/include/mach/uncompress.h +++ b/arch/arm/mach-exynos/include/mach/uncompress.h @@ -37,11 +37,16 @@ static void arch_detect_cpu(void) chip_id = 20; chip_id = 0xf; +#ifdef CONFIG_DEBUG_LL if (chip_id == 0x5) -uart_base = (volatile u8 *)EXYNOS5_PA_UART + (S3C_UART_OFFSET * CONFIG_S3C_LOWLEVEL_UART_PORT); +uart_base = (volatile u8 *)EXYNOS5_PA_UART + +(S3C_UART_OFFSET * CONFIG_S3C_LOWLEVEL_UART_PORT); else -uart_base = (volatile u8 *)EXYNOS4_PA_UART + (S3C_UART_OFFSET * CONFIG_S3C_LOWLEVEL_UART_PORT); - +uart_base = (volatile u8 *)EXYNOS4_PA_UART + +(S3C_UART_OFFSET * CONFIG_S3C_LOWLEVEL_UART_PORT); +#else +uart_base = NULL; +#endif You can do: if (!config_enabled(CONFIG_DEBUG_LL)) return; Thanks for the hint. Or rather, we calculate uart_base unconditionally in mach/uncompress.h and replace check for uart_base with config_enabled(CONFIG_DEBUG_LL) in plat/uncompress.h. That would get rid of all the ifdef's in the mach/uncompress.h files. Let me spin out another version with this change. Since uart_base will be set to 0 by being in BSS anyway. -Olof -- Tushar Behera -- To unsubscribe from this list: send the line unsubscribe linux-samsung-soc in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
[PATCH V4 1/4] ARM: samsung: use #include for all device trees
Replace /include/ (dtc) with #include (C pre-processor) for all
Samsung DT files
Signed-off-by: Padmavathi Venna padm...@samsung.com
Reviewed-by: Sylwester Nawrocki s.nawro...@samsung.com
---
arch/arm/boot/dts/exynos4.dtsi |2 +-
arch/arm/boot/dts/exynos4210-origen.dts |2 +-
arch/arm/boot/dts/exynos4210-smdkv310.dts |2 +-
arch/arm/boot/dts/exynos4210-trats.dts |2 +-
arch/arm/boot/dts/exynos4210-universal_c210.dts |2 +-
arch/arm/boot/dts/exynos4210.dtsi |4 ++--
arch/arm/boot/dts/exynos4212.dtsi |2 +-
arch/arm/boot/dts/exynos4412-odroidx.dts|2 +-
arch/arm/boot/dts/exynos4412-origen.dts |2 +-
arch/arm/boot/dts/exynos4412-smdk4412.dts |2 +-
arch/arm/boot/dts/exynos4412.dtsi |2 +-
arch/arm/boot/dts/exynos4x12.dtsi |4 ++--
arch/arm/boot/dts/exynos5250-arndale.dts|2 +-
arch/arm/boot/dts/exynos5250-smdk5250.dts |2 +-
arch/arm/boot/dts/exynos5250-snow.dts |4 ++--
arch/arm/boot/dts/exynos5250.dtsi |4 ++--
arch/arm/boot/dts/exynos5440-sd5v1.dts |2 +-
arch/arm/boot/dts/exynos5440-ssdk5440.dts |2 +-
arch/arm/boot/dts/exynos5440.dtsi |2 +-
arch/arm/boot/dts/s3c2416-smdk2416.dts |2 +-
arch/arm/boot/dts/s3c2416.dtsi |4 ++--
arch/arm/boot/dts/s3c24xx.dtsi |2 +-
22 files changed, 27 insertions(+), 27 deletions(-)
diff --git a/arch/arm/boot/dts/exynos4.dtsi b/arch/arm/boot/dts/exynos4.dtsi
index bed40ee..3f94fe8 100644
--- a/arch/arm/boot/dts/exynos4.dtsi
+++ b/arch/arm/boot/dts/exynos4.dtsi
@@ -19,7 +19,7 @@
* published by the Free Software Foundation.
*/
-/include/ skeleton.dtsi
+#include skeleton.dtsi
/ {
interrupt-parent = gic;
diff --git a/arch/arm/boot/dts/exynos4210-origen.dts
b/arch/arm/boot/dts/exynos4210-origen.dts
index bcf8079..5f851d7 100644
--- a/arch/arm/boot/dts/exynos4210-origen.dts
+++ b/arch/arm/boot/dts/exynos4210-origen.dts
@@ -15,7 +15,7 @@
*/
/dts-v1/;
-/include/ exynos4210.dtsi
+#include exynos4210.dtsi
/ {
model = Insignal Origen evaluation board based on Exynos4210;
diff --git a/arch/arm/boot/dts/exynos4210-smdkv310.dts
b/arch/arm/boot/dts/exynos4210-smdkv310.dts
index 91332b7..9c01b71 100644
--- a/arch/arm/boot/dts/exynos4210-smdkv310.dts
+++ b/arch/arm/boot/dts/exynos4210-smdkv310.dts
@@ -15,7 +15,7 @@
*/
/dts-v1/;
-/include/ exynos4210.dtsi
+#include exynos4210.dtsi
/ {
model = Samsung smdkv310 evaluation board based on Exynos4210;
diff --git a/arch/arm/boot/dts/exynos4210-trats.dts
b/arch/arm/boot/dts/exynos4210-trats.dts
index 9a14484..94eebff 100644
--- a/arch/arm/boot/dts/exynos4210-trats.dts
+++ b/arch/arm/boot/dts/exynos4210-trats.dts
@@ -13,7 +13,7 @@
*/
/dts-v1/;
-/include/ exynos4210.dtsi
+#include exynos4210.dtsi
/ {
model = Samsung Trats based on Exynos4210;
diff --git a/arch/arm/boot/dts/exynos4210-universal_c210.dts
b/arch/arm/boot/dts/exynos4210-universal_c210.dts
index 345cdb5..889cdad 100644
--- a/arch/arm/boot/dts/exynos4210-universal_c210.dts
+++ b/arch/arm/boot/dts/exynos4210-universal_c210.dts
@@ -13,7 +13,7 @@
*/
/dts-v1/;
-/include/ exynos4210.dtsi
+#include exynos4210.dtsi
/ {
model = Samsung Universal C210 based on Exynos4210 rev0;
diff --git a/arch/arm/boot/dts/exynos4210.dtsi
b/arch/arm/boot/dts/exynos4210.dtsi
index 366795a..75c2756 100644
--- a/arch/arm/boot/dts/exynos4210.dtsi
+++ b/arch/arm/boot/dts/exynos4210.dtsi
@@ -19,8 +19,8 @@
* published by the Free Software Foundation.
*/
-/include/ exynos4.dtsi
-/include/ exynos4210-pinctrl.dtsi
+#include exynos4.dtsi
+#include exynos4210-pinctrl.dtsi
/ {
compatible = samsung,exynos4210;
diff --git a/arch/arm/boot/dts/exynos4212.dtsi
b/arch/arm/boot/dts/exynos4212.dtsi
index c0f60f4..6f34d7f 100644
--- a/arch/arm/boot/dts/exynos4212.dtsi
+++ b/arch/arm/boot/dts/exynos4212.dtsi
@@ -17,7 +17,7 @@
* published by the Free Software Foundation.
*/
-/include/ exynos4x12.dtsi
+#include exynos4x12.dtsi
/ {
compatible = samsung,exynos4212;
diff --git a/arch/arm/boot/dts/exynos4412-odroidx.dts
b/arch/arm/boot/dts/exynos4412-odroidx.dts
index 53bc8bf..7bb8d48 100644
--- a/arch/arm/boot/dts/exynos4412-odroidx.dts
+++ b/arch/arm/boot/dts/exynos4412-odroidx.dts
@@ -12,7 +12,7 @@
*/
/dts-v1/;
-/include/ exynos4412.dtsi
+#include exynos4412.dtsi
/ {
model = Hardkernel ODROID-X board based on Exynos4412;
diff --git a/arch/arm/boot/dts/exynos4412-origen.dts
b/arch/arm/boot/dts/exynos4412-origen.dts
index 790a999..df097b5 100644
--- a/arch/arm/boot/dts/exynos4412-origen.dts
+++ b/arch/arm/boot/dts/exynos4412-origen.dts
@@ -13,7 +13,7 @@
*/
/dts-v1/;
-/include/ exynos4412.dtsi
+#include exynos4412.dtsi
/ {
model = Insignal Origen evaluation board based on Exynos4412;
[PATCH V4 0/4] clk: Samsung: audss: Register audio subsytem clocks using common clk framework
Samsung S5PV210 and Exynos SoC has a separate subsystem for audio. This subsystem has a internal clock controller which controls i2s0 and pcm0 clocks. This patch series adds the Samsung audio subsytem clock to the common clock framework and provides the I2S controllers clock information in the dtsi file. This patch series is made based on Kukjin Kim for-next branch Changes since V3: - Replaced samsung with exynos in the macro prefixes and function names as this driver supports mainly exynos and s5p family. - Added Reviewed-by:Sylwester Nawrocki s.nawro...@samsung.com Changes since V2: - Removed s5pv210 compatible name from driver as it is not yet supported which is different from Exynos series audio subsystem clock conroller. - Removed clkdev lookup support and added alias names in the i2s0 controller node. Changes since V1: - Reworked on all review comments by Sylwester Nawrocki - Added a header file for all clock indexes as requested by Sylwester - Added different compatible names for s5pv210, exynos4 and exynos5 - Registered the pcm clocks with common clock framework Padmavathi Venna (4): ARM: samsung: use #include for all device trees clk: samsung: register audio subsystem clocks using common clock framework ARM: dts: add Exynos audio subsystem clock controller node ARM: dts: add clock provider information for i2s controllers in Exynos5250 .../devicetree/bindings/clock/clk-exynos-audss.txt | 64 ++ arch/arm/boot/dts/exynos4.dtsi |2 +- arch/arm/boot/dts/exynos4210-origen.dts|2 +- arch/arm/boot/dts/exynos4210-smdkv310.dts |2 +- arch/arm/boot/dts/exynos4210-trats.dts |2 +- arch/arm/boot/dts/exynos4210-universal_c210.dts|2 +- arch/arm/boot/dts/exynos4210.dtsi |4 +- arch/arm/boot/dts/exynos4212.dtsi |2 +- arch/arm/boot/dts/exynos4412-odroidx.dts |2 +- arch/arm/boot/dts/exynos4412-origen.dts|2 +- arch/arm/boot/dts/exynos4412-smdk4412.dts |2 +- arch/arm/boot/dts/exynos4412.dtsi |2 +- arch/arm/boot/dts/exynos4x12.dtsi |4 +- arch/arm/boot/dts/exynos5250-arndale.dts |2 +- arch/arm/boot/dts/exynos5250-smdk5250.dts |2 +- arch/arm/boot/dts/exynos5250-snow.dts |4 +- arch/arm/boot/dts/exynos5250.dtsi | 23 +++- arch/arm/boot/dts/exynos5440-sd5v1.dts |2 +- arch/arm/boot/dts/exynos5440-ssdk5440.dts |2 +- arch/arm/boot/dts/exynos5440.dtsi |2 +- arch/arm/boot/dts/s3c2416-smdk2416.dts |2 +- arch/arm/boot/dts/s3c2416.dtsi |4 +- arch/arm/boot/dts/s3c24xx.dtsi |2 +- drivers/clk/samsung/Makefile |1 + drivers/clk/samsung/clk-exynos-audss.c | 133 include/dt-bindings/clk/exynos-audss-clk.h | 25 26 files changed, 269 insertions(+), 27 deletions(-) create mode 100644 Documentation/devicetree/bindings/clock/clk-exynos-audss.txt create mode 100644 drivers/clk/samsung/clk-exynos-audss.c create mode 100644 include/dt-bindings/clk/exynos-audss-clk.h -- 1.7.4.4 -- To unsubscribe from this list: send the line unsubscribe linux-samsung-soc in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
[PATCH V4 4/4] ARM: dts: add clock provider information for i2s controllers in Exynos5250
Add clock lookup information for i2s controllers on exynos5250 SoC.
Signed-off-by: Padmavathi Venna padm...@samsung.com
Reviewed-by: Sylwester Nawrocki s.nawro...@samsung.com
---
arch/arm/boot/dts/exynos5250.dtsi | 13 +
1 files changed, 13 insertions(+), 0 deletions(-)
diff --git a/arch/arm/boot/dts/exynos5250.dtsi
b/arch/arm/boot/dts/exynos5250.dtsi
index 388983e..2b917ba 100644
--- a/arch/arm/boot/dts/exynos5250.dtsi
+++ b/arch/arm/boot/dts/exynos5250.dtsi
@@ -20,6 +20,8 @@
#include skeleton.dtsi
#include exynos5250-pinctrl.dtsi
+#include dt-bindings/clk/exynos-audss-clk.h
+
/ {
compatible = samsung,exynos5250;
interrupt-parent = gic;
@@ -457,6 +459,13 @@
pdma0 9
pdma0 8;
dma-names = tx, rx, tx-sec;
+ clocks = clock_audss EXYNOS_I2S_BUS,
+ clock_audss EXYNOS_I2S_BUS,
+ clock_audss EXYNOS_SCLK_I2S,
+ clock_audss EXYNOS_MOUT_AUDSS,
+ clock_audss EXYNOS_MOUT_I2S;
+ clock-names = iis, i2s_opclk0, i2s_opclk1,
+ mout_audss, mout_i2s;
samsung,supports-6ch;
samsung,supports-rstclr;
samsung,supports-secdai;
@@ -471,6 +480,8 @@
dmas = pdma1 12
pdma1 11;
dma-names = tx, rx;
+ clocks = clock 307;
+ clock-names = iis;
pinctrl-names = default;
pinctrl-0 = i2s1_bus;
};
@@ -481,6 +492,8 @@
dmas = pdma0 12
pdma0 11;
dma-names = tx, rx;
+ clocks = clock 308;
+ clock-names = iis;
pinctrl-names = default;
pinctrl-0 = i2s2_bus;
};
--
1.7.4.4
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[PATCH V4 2/4] clk: samsung: register audio subsystem clocks using common clock framework
Audio subsystem is introduced in s5pv210 and exynos platforms.
This has seperate clock controller which can control i2s0 and
pcm0 clocks. This patch registers the audio subsystem clocks
with the common clock framework on Exynos family.
Signed-off-by: Padmavathi Venna padm...@samsung.com
Reviewed-by: Sylwester Nawrocki s.nawro...@samsung.com
---
.../devicetree/bindings/clock/clk-exynos-audss.txt | 64 ++
drivers/clk/samsung/Makefile |1 +
drivers/clk/samsung/clk-exynos-audss.c | 133
include/dt-bindings/clk/exynos-audss-clk.h | 25
4 files changed, 223 insertions(+), 0 deletions(-)
create mode 100644 Documentation/devicetree/bindings/clock/clk-exynos-audss.txt
create mode 100644 drivers/clk/samsung/clk-exynos-audss.c
create mode 100644 include/dt-bindings/clk/exynos-audss-clk.h
diff --git a/Documentation/devicetree/bindings/clock/clk-exynos-audss.txt
b/Documentation/devicetree/bindings/clock/clk-exynos-audss.txt
new file mode 100644
index 000..c401134
--- /dev/null
+++ b/Documentation/devicetree/bindings/clock/clk-exynos-audss.txt
@@ -0,0 +1,64 @@
+* Samsung Audio Subsystem Clock Controller
+
+The Samsung Audio Subsystem clock controller generates and supplies clocks
+to Audio Subsystem block available in the S5PV210 and Exynos SoCs. The clock
+binding described here is applicable to all SoC's in Exynos family.
+
+Required Properties:
+
+- compatible: should be one of the following:
+ - samsung,exynos4210-audss-clock - controller compatible with all Exynos4
SoCs.
+ - samsung,exynos5250-audss-clock - controller compatible with all Exynos5
SoCs.
+
+- reg: physical base address and length of the controller's register set.
+
+- #clock-cells: should be 1.
+
+The following is the list of clocks generated by the controller. Each clock is
+assigned an identifier and client nodes use this identifier to specify the
+clock which they consume. Some of the clocks are available only on a particular
+Exynos4 SoC and this is specified where applicable.
+
+Provided clocks:
+
+Clock ID SoC (if specific)
+---
+
+mout_audss 0
+mout_i2s1
+dout_srp2
+dout_bus3
+dout_i2s4
+srp_clk 5
+i2s_bus 6
+sclk_i2s7
+pcm_bus 8
+sclk_pcm9
+
+Example 1: An example of a clock controller node is listed below.
+
+clock_audss: audss-clock-controller@381 {
+ compatible = samsung,exynos5250-audss-clock;
+ reg = 0x0381 0x0C;
+ #clock-cells = 1;
+};
+
+Example 2: I2S controller node that consumes the clock generated by the clock
+ controller. Refer to the standard clock bindings for information
+ about 'clocks' and 'clock-names' property.
+
+i2s0: i2s@0383 {
+ compatible = samsung,i2s-v5;
+ reg = 0x0383 0x100;
+ dmas = pdma0 10
+ pdma0 9
+ pdma0 8;
+ dma-names = tx, rx, tx-sec;
+ clocks = clock_audss EXYNOS_I2S_BUS,
+ clock_audss EXYNOS_I2S_BUS,
+ clock_audss EXYNOS_SCLK_I2S,
+ clock_audss EXYNOS_MOUT_AUDSS,
+ clock_audss EXYNOS_MOUT_I2S;
+ clock-names = iis, i2s_opclk0, i2s_opclk1,
+ mout_audss, mout_i2s;
+};
diff --git a/drivers/clk/samsung/Makefile b/drivers/clk/samsung/Makefile
index b7c232e..1876810 100644
--- a/drivers/clk/samsung/Makefile
+++ b/drivers/clk/samsung/Makefile
@@ -6,3 +6,4 @@ obj-$(CONFIG_COMMON_CLK)+= clk.o clk-pll.o
obj-$(CONFIG_ARCH_EXYNOS4) += clk-exynos4.o
obj-$(CONFIG_SOC_EXYNOS5250) += clk-exynos5250.o
obj-$(CONFIG_SOC_EXYNOS5440) += clk-exynos5440.o
+obj-$(CONFIG_ARCH_EXYNOS) += clk-exynos-audss.o
diff --git a/drivers/clk/samsung/clk-exynos-audss.c
b/drivers/clk/samsung/clk-exynos-audss.c
new file mode 100644
index 000..8a77919
--- /dev/null
+++ b/drivers/clk/samsung/clk-exynos-audss.c
@@ -0,0 +1,133 @@
+/*
+ * Copyright (c) 2013 Samsung Electronics Co., Ltd.
+ * Author: Padmavathi Venna padm...@samsung.com
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ *
+ * Common Clock Framework support for Audio Subsystem Clock Controller.
+*/
+
+#include linux/clkdev.h
+#include linux/io.h
+#include linux/clk-provider.h
+#include linux/of_address.h
+#include linux/syscore_ops.h
+
+#include dt-bindings/clk/exynos-audss-clk.h
+
+static DEFINE_SPINLOCK(lock);
+static struct clk **clk_table;
+static void __iomem *reg_base;
+static struct clk_onecell_data clk_data;
+
+#define ASS_CLK_SRC 0x0
+#define ASS_CLK_DIV 0x4
+#define ASS_CLK_GATE 0x8
+
+static unsigned long reg_save[][2] = {
+ {ASS_CLK_SRC, 0},
+ {ASS_CLK_DIV, 0},
+ {ASS_CLK_GATE, 0},
+};
+
+/* list of all parent clock list */
+static const char *mout_audss_p[] = { fin_pll,
[PATCH V4 3/4] ARM: dts: add Exynos audio subsystem clock controller node
Audio subsystem introduced in s5pv210 and exynos platforms
which has a internal clock controller. This patch adds a node
for the same on exynos5250.
Signed-off-by: Padmavathi Venna padm...@samsung.com
Reviewed-by: Sylwester Nawrocki s.nawro...@samsung.com
---
arch/arm/boot/dts/exynos5250.dtsi |6 ++
1 files changed, 6 insertions(+), 0 deletions(-)
diff --git a/arch/arm/boot/dts/exynos5250.dtsi
b/arch/arm/boot/dts/exynos5250.dtsi
index bccda67..388983e 100644
--- a/arch/arm/boot/dts/exynos5250.dtsi
+++ b/arch/arm/boot/dts/exynos5250.dtsi
@@ -72,6 +72,12 @@
#clock-cells = 1;
};
+ clock_audss: audss-clock-controller@381 {
+ compatible = samsung,exynos5250-audss-clock;
+ reg = 0x0381 0x0C;
+ #clock-cells = 1;
+ };
+
gic:interrupt-controller@10481000 {
compatible = arm,cortex-a15-gic, arm,cortex-a9-gic;
#interrupt-cells = 3;
--
1.7.4.4
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